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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2009-04-02 11:12:04 +0200
committerIngo Molnar <mingo@elte.hu>2009-04-06 09:30:47 +0200
commit92f22a3865abe87eea2609a6f8e5be5123f7ce4f (patch)
tree4ded8d6858a4e50f0e3401e5e3f2a6c37fee8f58 /kernel
parent5872bdb88a35fae7d224bd6b21e5f377e854ccfc (diff)
perf_counter: update mmap() counter read
Paul noted that we don't need SMP barriers for the mmap() counter read because its always on the same cpu (otherwise you can't access the hw counter anyway). So remove the SMP barriers and replace them with regular compiler barriers. Further, update the comment to include a race free method of reading said hardware counter. The primary change is putting the pmc_read inside the seq-loop, otherwise we can still race and read rubbish. Noticed-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> Orig-LKML-Reference: <20090402091319.577951445@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'kernel')
-rw-r--r--kernel/perf_counter.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/perf_counter.c b/kernel/perf_counter.c
index f105a6e696c..2a5d4f52556 100644
--- a/kernel/perf_counter.c
+++ b/kernel/perf_counter.c
@@ -1340,13 +1340,13 @@ void perf_counter_update_userpage(struct perf_counter *counter)
*/
preempt_disable();
++userpg->lock;
- smp_wmb();
+ barrier();
userpg->index = counter->hw.idx;
userpg->offset = atomic64_read(&counter->count);
if (counter->state == PERF_COUNTER_STATE_ACTIVE)
userpg->offset -= atomic64_read(&counter->hw.prev_count);
- smp_wmb();
+ barrier();
++userpg->lock;
preempt_enable();
unlock: