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authorMarkus Pietrek <Markus.Pietrek@emtrion.de>2010-02-02 11:29:15 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-02-02 11:29:15 +0900
commite8708ef7e86a463b3a5b01d4a9abf16c8748b464 (patch)
tree38ef7ec68597da137f49a3e67886503afca82234 /mm/memcontrol.c
parentab658321f32770b903a4426e2a6fae0392757755 (diff)
spi: spi_sh_msiof: Fixed data sampling on the correct edge
The spi_sh_msiof.c driver presently misconfigures REDG and TEDG. TEDG==0 outputs data at the **rising edge** of the clock and REDG==0 samples data at the **falling edge** of the clock. Therefore for SPI, TEDG must be equal to REDG, otherwise the last byte received is not sampled in SPI mode 3. This brings the driver in line with the SH7723 HW Reference Manual settings documented in Figures 20.20 and 20.21 ("SPI Clock and data timing"). Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'mm/memcontrol.c')
0 files changed, 0 insertions, 0 deletions