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authorDavid S. Miller <davem@davemloft.net>2005-07-04 13:24:38 -0700
committerDavid S. Miller <davem@davemloft.net>2005-07-04 13:24:38 -0700
commit088dd1f81b3577c17c4c4381696bf2105ea0e43a (patch)
tree11fda00dc3ae5c3202c6c0bb0a22fa3235f4f101 /net/rose/sysctl_net_rose.c
parent06326e40b7c66477d4a460bfc23c951f7b39f191 (diff)
[SPARC64]: Add support for IRQ pre-handlers.
This allows a PCI controller to shim into IRQ delivery so that DMA queues can be drained, if necessary. If some bus specific code needs to run before an IRQ handler is invoked, the bus driver simply needs to setup the function pointer in bucket->irq_info->pre_handler and the two args bucket->irq_info->pre_handler_arg[12]. The Schizo PCI driver is converted over to use a pre-handler for the DMA write-sync processing it needs when a device is behind a PCI->PCI bus deeper than the top-level APB bridges. While we're here, clean up all of the action allocation and handling. Now, we allocate the irqaction as part of the bucket->irq_info area. There is an array of 4 irqaction (for PCI irq sharing) and a bitmask saying which entries are active. The bucket->irq_info is allocated at build_irq() time, not at request_irq() time. This simplifies request_irq() and free_irq() tremendously. The SMP dynamic IRQ retargetting code got removed in this change too. It was disabled for a few months now, and we can resurrect it in the future if we want. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/rose/sysctl_net_rose.c')
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