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authorMa Ling <ling.ma@intel.com>2009-03-18 20:13:27 +0800
committerEric Anholt <eric@anholt.net>2009-03-27 14:45:12 -0700
commitd490609321828c62e8dfa6220f0acd82e5cb3756 (patch)
treea15e45265673aa20784dfd693fd9903395dcb536 /scripts/mod
parent044c7c415a68077b7c444c753aa03a35149e881a (diff)
drm/i915: Use a different PLL timing search function on G4X.
This improves the PLL timings according to the suggestion of the hardware engineers. This results in some outputs being able to sync that weren't able to before. This is part of fixing fd.o bug #17508. Signed-off-by: Ma Ling <ling.ma@intel.com> [anholt: cleaned up a couple of redundant comments] Signed-off-by: Eric Anholt <eric@anholt.net>
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