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authorGrant Likely <grant.likely@secretlab.ca>2009-07-02 11:57:19 -0600
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-07-03 10:41:46 +0100
commit07573534b0b030226ee5ab560e53aac7e6c0dd84 (patch)
treea6ec53bce47517827296430feab9dc8aabd36985 /sound/soc/fsl
parent1df892cba45f9856d369a6a317ad2d1e44bca423 (diff)
ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared
When doing register reads, it is possible for there to be a stale data ready bit set which will cause subsequent reads to return prematurely with incorrect data. This patch fixes the issues by ensuring stale data is cleared before starting another transaction. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jon Smirl <jonsmirl@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/fsl')
-rw-r--r--sound/soc/fsl/mpc5200_psc_ac97.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_ac97.c
index 794a247b3eb..9b8503f2d68 100644
--- a/sound/soc/fsl/mpc5200_psc_ac97.c
+++ b/sound/soc/fsl/mpc5200_psc_ac97.c
@@ -41,6 +41,10 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
pr_err("timeout on ac97 bus (rdy)\n");
return -ENODEV;
}
+
+ /* Force clear the data valid bit */
+ in_be32(&psc_dma->psc_regs->ac97_data);
+
/* Send the read */
out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));