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authorPeter Ujfalusi <peter.ujfalusi@nokia.com>2010-03-19 11:10:20 +0200
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-03-19 11:17:24 +0000
commitfdb6b1e195757a66670801702e4b5fcc66ed3d72 (patch)
treea76c720311ce163fbf290d9004d9e0e6f635495f /sound
parent44f497b4e0bba6ce1b73a107cc13636393344252 (diff)
ASoC: tlv320dac33: Internal clocking changes
During validation of the internal clocking setup it has been found that the following settings were not configured in an optimal way: ASRC_CTRL_A: SRCLKDIV was incorrect, instad of divide ratio 3, ratio of 2 has to be used (as the comment stated) DAC_CTRL_A: Fs = Fsref is the desired configuration instead of Fs = Fsref / 1.5 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/tlv320dac33.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index 00d6f36aabc..d50f1699ccb 100644
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -778,7 +778,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
if (dac33->fifo_mode) {
/* Generic for all FIFO modes */
/* 50-51 : ASRC Control registers */
- dac33_write(codec, DAC33_ASRC_CTRL_A, (1 << 4)); /* div=2 */
+ dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */
/* Write registers 0x34 and 0x35 (MSB, LSB) */
@@ -1062,7 +1062,7 @@ static void dac33_init_chip(struct snd_soc_codec *codec)
{
/* 44-46: DAC Control Registers */
/* A : DAC sample rate Fsref/1.5 */
- dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(1));
+ dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
/* B : DAC src=normal, not muted */
dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
DAC33_DACSRCL_LEFT);