diff options
| -rw-r--r-- | arch/arm/mach-s3c2410/mach-h1940.c | 29 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/h1940-latch.h | 64 |
2 files changed, 91 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 1c316f14ed9..646a3a5d33a 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -46,10 +46,11 @@ #include <asm/irq.h> #include <asm/mach-types.h> -//#include <asm/debug-ll.h> + #include <asm/arch/regs-serial.h> #include <asm/arch/regs-lcd.h> +#include <asm/arch/h1940-latch.h> #include <asm/arch/fb.h> #include <linux/serial_core.h> @@ -59,7 +60,12 @@ #include "cpu.h" static struct map_desc h1940_iodesc[] __initdata = { - /* nothing here yet */ + [0] = { + .virtual = (unsigned long)H1940_LATCH, + .pfn = __phys_to_pfn(H1940_PA_LATCH), + .length = SZ_16K, + .type = MT_DEVICE + }, }; #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK @@ -92,6 +98,25 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = { } }; +/* Board control latch control */ + +static unsigned int latch_state = H1940_LATCH_DEFAULT; + +void h1940_latch_control(unsigned int clear, unsigned int set) +{ + unsigned long flags; + + local_irq_save(flags); + + latch_state &= ~clear; + latch_state |= set; + + __raw_writel(latch_state, H1940_LATCH); + + local_irq_restore(flags); +} + +EXPORT_SYMBOL_GPL(h1940_latch_control); /** diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h new file mode 100644 index 00000000000..c5802411f43 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/h1940-latch.h @@ -0,0 +1,64 @@ +/* linux/include/asm-arm/arch-s3c2410/h1940-latch.h + * + * (c) 2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * iPAQ H1940 series - latch definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_H1940_LATCH_H +#define __ASM_ARCH_H1940_LATCH_H + + +#ifndef __ASSEMBLY__ +#define H1940_LATCH ((void __iomem *)0xF8000000) +#else +#define H1940_LATCH 0xF8000000 +#endif + +#define H1940_PA_LATCH (S3C2410_CS2) + +/* SD layer latch */ + +#define H1940_LATCH_SDQ1 (1<<16) +#define H1940_LATCH_LCD_P1 (1<<17) +#define H1940_LATCH_LCD_P2 (1<<18) +#define H1940_LATCH_LCD_P3 (1<<19) +#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ +#define H1940_LATCH_LED_RED (1<<21) +#define H1940_LATCH_SDQ7 (1<<22) +#define H1940_LATCH_USB_DP (1<<23) + +/* CPU layer latch */ + +#define H1940_LATCH_UDA_POWER (1<<24) +#define H1940_LATCH_AUDIO_POWER (1<<25) +#define H1940_LATCH_SM803_ENABLE (1<<26) +#define H1940_LATCH_LCD_P4 (1<<27) +#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ +#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ +#define H1940_LATCH_LED_GREEN (1<<30) +#define H1940_LATCH_LED_FLASH (1<<31) + +/* default settings */ + +#define H1940_LATCH_DEFAULT \ + H1940_LATCH_LCD_P4 | \ + H1940_LATCH_SM803_ENABLE | \ + H1940_LATCH_SDQ1 | \ + H1940_LATCH_LCD_P1 | \ + H1940_LATCH_LCD_P2 | \ + H1940_LATCH_LCD_P3 | \ + H1940_LATCH_MAX1698_nSHUTDOWN | \ + H1940_LATCH_CPUQ5 + +/* control functions */ + +extern void h1940_latch_control(unsigned int clear, unsigned int set); + +#endif /* __ASM_ARCH_H1940_LATCH_H */ |