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-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/cobalt/console.c5
-rw-r--r--arch/mips/pci/fixup-cobalt.c2
-rw-r--r--include/asm-mips/cacheops.h2
4 files changed, 9 insertions, 2 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 291d368ffd2..b22c043b6ef 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -59,6 +59,8 @@ config BCM47XX
select SYS_SUPPORTS_LITTLE_ENDIAN
select SSB
select SSB_DRIVER_MIPS
+ select SSB_DRIVER_EXTIF
+ select SSB_PCICORE_HOSTMODE if PCI
select GENERIC_GPIO
select SYS_HAS_EARLY_PRINTK
select CFE
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index db330e81102..d1ba701c9dd 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -4,10 +4,15 @@
#include <linux/io.h>
#include <linux/serial_reg.h>
+#include <cobalt.h>
+
#define UART_BASE ((void __iomem *)CKSEG1ADDR(0x1c800000))
void prom_putchar(char c)
{
+ if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
+ return;
+
while (!(readb(UART_BASE + UART_LSR) & UART_LSR_THRE))
;
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index f7df1142912..9553b14002d 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -177,7 +177,7 @@ static char irq_tab_raq2[] __initdata = {
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
- if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
+ if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
return irq_tab_qube1[slot];
if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
diff --git a/include/asm-mips/cacheops.h b/include/asm-mips/cacheops.h
index df7f2deb3b5..256ad2cc6eb 100644
--- a/include/asm-mips/cacheops.h
+++ b/include/asm-mips/cacheops.h
@@ -64,7 +64,7 @@
#define Page_Invalidate_T 0x16
/*
- * R1000-specific cacheops
+ * R10000-specific cacheops
*
* Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
* Most of the _S cacheops are identical to the R4000SC _SD cacheops.