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-rw-r--r--arch/arm/mach-s3c2412/Makefile1
-rw-r--r--arch/arm/mach-s3c2412/gpio.c60
-rw-r--r--include/asm-arm/arch-s3c2410/hardware.h5
-rw-r--r--include/asm-arm/arch-s3c2410/regs-gpio.h5
4 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index 7b782c7df7b..267f3348301 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -12,6 +12,7 @@ obj- :=
obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
obj-$(CONFIG_CPU_S3C2412) += irq.o
obj-$(CONFIG_CPU_S3C2412) += clock.o
+obj-$(CONFIG_CPU_S3C2412) += gpio.o
obj-$(CONFIG_S3C2412_DMA) += dma.o
obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c
new file mode 100644
index 00000000000..8e55c3a2eab
--- /dev/null
+++ b/arch/arm/mach-s3c2412/gpio.c
@@ -0,0 +1,60 @@
+/* linux/arch/arm/mach-s3c2412/gpio.c
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * http://armlinux.simtec.co.uk/.
+ *
+ * S3C2412/S3C2413 specific GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/regs-gpio.h>
+
+#include <asm/hardware.h>
+
+int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
+{
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
+ unsigned long offs = S3C2410_GPIO_OFFSET(pin);
+ unsigned long flags;
+ unsigned long slpcon;
+
+ offs *= 2;
+
+ if (pin < S3C2410_GPIO_BANKB)
+ return -EINVAL;
+
+ if (pin >= S3C2410_GPIO_BANKF &&
+ pin <= S3C2410_GPIO_BANKG)
+ return -EINVAL;
+
+ if (pin > (S3C2410_GPIO_BANKH + 32))
+ return -EINVAL;
+
+ local_irq_save(flags);
+
+ slpcon = __raw_readl(base + 0x0C);
+
+ slpcon &= ~(3 << offs);
+ slpcon |= state << offs;
+
+ __raw_writel(slpcon, base + 0x0C);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg);
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h
index 6dadf58ff98..faeaba514ff 100644
--- a/include/asm-arm/arch-s3c2410/hardware.h
+++ b/include/asm-arm/arch-s3c2410/hardware.h
@@ -99,6 +99,11 @@ extern int s3c2440_set_dsc(unsigned int pin, unsigned int value);
#endif /* CONFIG_CPU_S3C2440 */
+#ifdef CONFIG_CPU_S3C2412
+
+extern int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state);
+
+#endif /* CONFIG_CPU_S3C2412 */
#endif /* __ASSEMBLY__ */
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index 1f089fb71a8..0ad75d716de 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -1138,6 +1138,11 @@
#define S3C2412_GPHSLPCON S3C2410_GPIOREG(0x7C)
/* definitions for each pin bit */
+#define S3C2412_GPIO_SLPCON_LOW ( 0x00 )
+#define S3C2412_GPIO_SLPCON_HIGH ( 0x01 )
+#define S3C2412_GPIO_SLPCON_IN ( 0x02 )
+#define S3C2412_GPIO_SLPCON_PULL ( 0x03 )
+
#define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2))
#define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2))
#define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2))