diff options
Diffstat (limited to 'arch/arm/lib')
| -rw-r--r-- | arch/arm/lib/bitops.h | 33 | ||||
| -rw-r--r-- | arch/arm/lib/changebit.S | 11 | ||||
| -rw-r--r-- | arch/arm/lib/clearbit.S | 13 | ||||
| -rw-r--r-- | arch/arm/lib/setbit.S | 11 | ||||
| -rw-r--r-- | arch/arm/lib/testchangebit.S | 15 | ||||
| -rw-r--r-- | arch/arm/lib/testclearbit.S | 15 | ||||
| -rw-r--r-- | arch/arm/lib/testsetbit.S | 15 |
7 files changed, 45 insertions, 68 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h new file mode 100644 index 00000000000..4a83ab6cd56 --- /dev/null +++ b/arch/arm/lib/bitops.h @@ -0,0 +1,33 @@ + .macro bitop, instr + and r2, r0, #7 + mov r3, #1 + mov r3, r3, lsl r2 + save_and_disable_irqs ip, r2 + ldrb r2, [r1, r0, lsr #3] + \instr r2, r2, r3 + strb r2, [r1, r0, lsr #3] + restore_irqs ip + mov pc, lr + .endm + +/** + * testop - implement a test_and_xxx_bit operation. + * @instr: operational instruction + * @store: store instruction + * + * Note: we can trivially conditionalise the store instruction + * to avoid dirting the data cache. + */ + .macro testop, instr, store + add r1, r1, r0, lsr #3 + and r3, r0, #7 + mov r0, #1 + save_and_disable_irqs ip, r2 + ldrb r2, [r1] + tst r2, r0, lsl r3 + \instr r2, r2, r0, lsl r3 + \store r2, [r1] + restore_irqs ip + moveq r0, #0 + mov pc, lr + .endm diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S index 3af45cab70e..389567c2409 100644 --- a/arch/arm/lib/changebit.S +++ b/arch/arm/lib/changebit.S @@ -9,6 +9,7 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text /* Purpose : Function to change a bit @@ -17,12 +18,4 @@ ENTRY(_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_change_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - eor r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) + bitop eor diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S index 069a2ce413f..34751653302 100644 --- a/arch/arm/lib/clearbit.S +++ b/arch/arm/lib/clearbit.S @@ -9,6 +9,7 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text /* @@ -18,14 +19,4 @@ ENTRY(_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_clear_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - bic r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) - - + bitop bic diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S index 8f337df5d99..83bc23d5b03 100644 --- a/arch/arm/lib/setbit.S +++ b/arch/arm/lib/setbit.S @@ -9,6 +9,7 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text /* @@ -18,12 +19,4 @@ ENTRY(_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_set_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - orr r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) + bitop orr diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S index 4aba4676b98..b25dcd2be53 100644 --- a/arch/arm/lib/testchangebit.S +++ b/arch/arm/lib/testchangebit.S @@ -9,21 +9,10 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text ENTRY(_test_and_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_change_bit_le) - add r1, r1, r0, lsr #3 - and r3, r0, #7 - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - eor r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop eor, strb diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S index e07c5bd2430..2dcc4b16b68 100644 --- a/arch/arm/lib/testclearbit.S +++ b/arch/arm/lib/testclearbit.S @@ -9,21 +9,10 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text ENTRY(_test_and_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_clear_bit_le) - add r1, r1, r0, lsr #3 @ Get byte offset - and r3, r0, #7 @ Get bit offset - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - bic r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop bicne, strneb diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S index a570fc74cdd..9011c969761 100644 --- a/arch/arm/lib/testsetbit.S +++ b/arch/arm/lib/testsetbit.S @@ -9,21 +9,10 @@ */ #include <linux/linkage.h> #include <asm/assembler.h> +#include "bitops.h" .text ENTRY(_test_and_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_set_bit_le) - add r1, r1, r0, lsr #3 @ Get byte offset - and r3, r0, #7 @ Get bit offset - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - orr r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop orreq, streqb |