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-rw-r--r--arch/arm/mach-iop13xx/Makefile1
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c5
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c5
-rw-r--r--arch/arm/mach-iop13xx/irq.c19
-rw-r--r--arch/arm/mach-iop13xx/time.c102
5 files changed, 6 insertions, 126 deletions
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
index c3d6c08f2d4..4185e0586c3 100644
--- a/arch/arm/mach-iop13xx/Makefile
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -5,7 +5,6 @@ obj- :=
obj-$(CONFIG_ARCH_IOP13XX) += setup.o
obj-$(CONFIG_ARCH_IOP13XX) += irq.o
-obj-$(CONFIG_ARCH_IOP13XX) += time.o
obj-$(CONFIG_ARCH_IOP13XX) += pci.o
obj-$(CONFIG_ARCH_IOP13XX) += io.o
obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 2a1bbfe9896..a519d707571 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -25,6 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/arch/pci.h>
#include <asm/mach/time.h>
+#include <asm/arch/time.h>
extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void)
static void __init iq81340mc_timer_init(void)
{
- iop13xx_init_time(400000000);
+ iop_init_time(400000000);
}
static struct sys_timer iq81340mc_timer = {
.init = iq81340mc_timer_init,
- .offset = iop13xx_gettimeoffset,
+ .offset = iop_gettimeoffset,
};
MACHINE_START(IQ81340MC, "Intel IQ81340MC")
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 5ad2b62c9bf..0e71fbcabe0 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -25,6 +25,7 @@
#include <asm/mach/arch.h>
#include <asm/arch/pci.h>
#include <asm/mach/time.h>
+#include <asm/arch/time.h>
extern int init_atu;
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void)
static void __init iq81340sc_timer_init(void)
{
- iop13xx_init_time(400000000);
+ iop_init_time(400000000);
}
static struct sys_timer iq81340sc_timer = {
.init = iq81340sc_timer_init,
- .offset = iop13xx_gettimeoffset,
+ .offset = iop_gettimeoffset,
};
MACHINE_START(IQ81340SC, "Intel IQ81340SC")
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index 162b9321496..b2eb0b96103 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -161,65 +161,49 @@ static void write_intsize(u32 val)
static void
iop13xx_irq_mask0 (unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_mask1 (unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_mask2 (unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_mask3 (unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_unmask0(unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_unmask1(unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_unmask2(unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
- iop13xx_cp6_restore(cp_flags);
}
static void
iop13xx_irq_unmask3(unsigned int irq)
{
- u32 cp_flags = iop13xx_cp6_save();
write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
- iop13xx_cp6_restore(cp_flags);
}
static struct irq_chip iop13xx_irqchip1 = {
@@ -256,7 +240,6 @@ void __init iop13xx_init_irq(void)
{
unsigned int i;
- u32 cp_flags = iop13xx_cp6_save();
iop_init_cp6_handler();
/* disable all interrupts */
@@ -288,6 +271,4 @@ void __init iop13xx_init_irq(void)
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
}
-
- iop13xx_cp6_restore(cp_flags);
}
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
deleted file mode 100644
index 8b21365f653..00000000000
--- a/arch/arm/mach-iop13xx/time.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * arch/arm/mach-iop13xx/time.c
- *
- * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright 2002-2003 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/timex.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-
-static unsigned long ticks_per_jiffy;
-static unsigned long ticks_per_usec;
-static unsigned long next_jiffy_time;
-
-static inline u32 read_tcr1(void)
-{
- u32 val;
- asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
- return val;
-}
-
-unsigned long iop13xx_gettimeoffset(void)
-{
- unsigned long offset;
- u32 cp_flags;
-
- cp_flags = iop13xx_cp6_save();
- offset = next_jiffy_time - read_tcr1();
- iop13xx_cp6_restore(cp_flags);
-
- return offset / ticks_per_usec;
-}
-
-static irqreturn_t
-iop13xx_timer_interrupt(int irq, void *dev_id)
-{
- u32 cp_flags = iop13xx_cp6_save();
-
- write_seqlock(&xtime_lock);
-
- asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
-
- while ((signed long)(next_jiffy_time - read_tcr1())
- >= ticks_per_jiffy) {
- timer_tick();
- next_jiffy_time -= ticks_per_jiffy;
- }
-
- write_sequnlock(&xtime_lock);
-
- iop13xx_cp6_restore(cp_flags);
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction iop13xx_timer_irq = {
- .name = "IOP13XX Timer Tick",
- .handler = iop13xx_timer_interrupt,
- .flags = IRQF_DISABLED | IRQF_TIMER,
-};
-
-void __init iop13xx_init_time(unsigned long tick_rate)
-{
- u32 timer_ctl;
- u32 cp_flags;
-
- ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
- ticks_per_usec = tick_rate / 1000000;
- next_jiffy_time = 0xffffffff;
-
- timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
- IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
-
- /*
- * We use timer 0 for our timer interrupt, and timer 1 as
- * monotonic counter for tracking missed jiffies.
- */
- cp_flags = iop13xx_cp6_save();
- asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
- asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
- asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
- asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
- iop13xx_cp6_restore(cp_flags);
-
- setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
-}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-29 23:06:34 +0000