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Diffstat (limited to 'arch/arm/mach-pxa/pxa25x.c')
-rw-r--r--arch/arm/mach-pxa/pxa25x.c142
1 files changed, 96 insertions, 46 deletions
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index e5b417d14bb..25d17a1dab7 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -23,17 +23,25 @@
#include <linux/suspend.h>
#include <linux/sysdev.h>
-#include <asm/hardware.h>
-#include <asm/arch/irqs.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/arch/mfp-pxa25x.h>
-#include <asm/arch/pm.h>
-#include <asm/arch/dma.h>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/reset.h>
+#include <mach/pm.h>
+#include <mach/dma.h>
#include "generic.h"
#include "devices.h"
#include "clock.h"
+int cpu_is_pxa26x(void)
+{
+ return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
+}
+EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
+
/*
* Various clock factors driven by the CCCR register.
*/
@@ -108,6 +116,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
.getrate = clk_pxa25x_lcd_getrate,
};
+static unsigned long gpio12_config_32k[] = {
+ GPIO12_32KHz,
+};
+
+static unsigned long gpio12_config_gpio[] = {
+ GPIO12_GPIO,
+};
+
+static void clk_gpio12_enable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio12_config_32k, 1);
+}
+
+static void clk_gpio12_disable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio12_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio12_ops = {
+ .enable = clk_gpio12_enable,
+ .disable = clk_gpio12_disable,
+};
+
+static unsigned long gpio11_config_3m6[] = {
+ GPIO11_3_6MHz,
+};
+
+static unsigned long gpio11_config_gpio[] = {
+ GPIO11_GPIO,
+};
+
+static void clk_gpio11_enable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio11_config_3m6, 1);
+}
+
+static void clk_gpio11_disable(struct clk *clk)
+{
+ pxa2xx_mfp_config(gpio11_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio11_ops = {
+ .enable = clk_gpio11_enable,
+ .disable = clk_gpio11_disable,
+};
+
/*
* 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
@@ -117,24 +171,29 @@ static struct clk pxa25x_hwuart_clk =
INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
;
+/*
+ * PXA 2xx clock declarations.
+ */
static struct clk pxa25x_clks[] = {
INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
- INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
+ INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
+ INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
+ INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev),
INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
+ INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev),
+ INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev),
INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
/*
- INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
- INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL),
*/
INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
@@ -150,48 +209,21 @@ static struct clk pxa25x_clks[] = {
* More ones like CP and general purpose register values are preserved
* with the stack pointer in sleep.S.
*/
-enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
-
- SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
- SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
- SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
-
+enum {
SLEEP_SAVE_PSTR,
-
SLEEP_SAVE_CKEN,
-
SLEEP_SAVE_COUNT
};
static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
{
- SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
-
- SAVE(GAFR0_L); SAVE(GAFR0_U);
- SAVE(GAFR1_L); SAVE(GAFR1_U);
- SAVE(GAFR2_L); SAVE(GAFR2_U);
-
SAVE(CKEN);
SAVE(PSTR);
-
- /* Clear GPIO transition detect bits */
- GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
}
static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
{
- /* ensure not to come back here if it wasn't intended */
- PSPR = 0;
-
- /* restore registers */
- RESTORE(GAFR0_L); RESTORE(GAFR0_U);
- RESTORE(GAFR1_L); RESTORE(GAFR1_U);
- RESTORE(GAFR2_L); RESTORE(GAFR2_U);
- RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
-
- PSSR = PSSR_RDH | PSSR_PH;
-
RESTORE(CKEN);
RESTORE(PSTR);
}
@@ -203,19 +235,32 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
switch (state) {
case PM_SUSPEND_MEM:
- /* set resume return address */
- PSPR = virt_to_phys(pxa_cpu_resume);
pxa25x_cpu_suspend(PWRMODE_SLEEP);
break;
}
}
+static int pxa25x_cpu_pm_prepare(void)
+{
+ /* set resume return address */
+ PSPR = virt_to_phys(pxa_cpu_resume);
+ return 0;
+}
+
+static void pxa25x_cpu_pm_finish(void)
+{
+ /* ensure not to come back here if it wasn't intended */
+ PSPR = 0;
+}
+
static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
.save_count = SLEEP_SAVE_COUNT,
.valid = suspend_valid_only_mem,
.save = pxa25x_cpu_pm_save,
.restore = pxa25x_cpu_pm_restore,
.enter = pxa25x_cpu_pm_enter,
+ .prepare = pxa25x_cpu_pm_prepare,
+ .finish = pxa25x_cpu_pm_finish,
};
static void __init pxa25x_init_pm(void)
@@ -260,7 +305,7 @@ void __init pxa25x_init_irq(void)
}
static struct platform_device *pxa25x_devices[] __initdata = {
- &pxa_device_udc,
+ &pxa25x_device_udc,
&pxa_device_ffuart,
&pxa_device_btuart,
&pxa_device_stuart,
@@ -269,12 +314,16 @@ static struct platform_device *pxa25x_devices[] __initdata = {
&pxa25x_device_ssp,
&pxa25x_device_nssp,
&pxa25x_device_assp,
+ &pxa25x_device_pwm0,
+ &pxa25x_device_pwm1,
};
static struct sys_device pxa25x_sysdev[] = {
{
.cls = &pxa_irq_sysclass,
}, {
+ .cls = &pxa2xx_mfp_sysclass,
+ }, {
.cls = &pxa_gpio_sysclass,
},
};
@@ -283,11 +332,10 @@ static int __init pxa25x_init(void)
{
int i, ret = 0;
- /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
- if (cpu_is_pxa25x())
- clks_register(&pxa25x_hwuart_clk, 1);
+ if (cpu_is_pxa25x()) {
+
+ reset_status = RCSR;
- if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
if ((ret = pxa_init_dma(16)))
@@ -307,9 +355,11 @@ static int __init pxa25x_init(void)
return ret;
}
- /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
- if (cpu_is_pxa25x())
+ /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
+ if (cpu_is_pxa255() || cpu_is_pxa26x()) {
+ clks_register(&pxa25x_hwuart_clk, 1);
ret = platform_device_register(&pxa_device_hwuart);
+ }
return ret;
}