diff options
Diffstat (limited to 'arch/arm/mach-pxa')
| -rw-r--r-- | arch/arm/mach-pxa/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/cm-x270.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/devices.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/generic.c | 57 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/generic.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/irq.c | 62 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/mfp.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pcm027.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/poodle.c | 8 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pxa25x.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pxa27x.c | 49 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 99 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/sleep.S | 102 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/smemc.c | 88 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/spitz.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/tosa.c | 1 |
16 files changed, 455 insertions, 74 deletions
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index b5c916c0747..8604938bd94 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -6,7 +6,7 @@ obj-y += clock.o devices.o generic.o irq.o dma.o time.o obj-$(CONFIG_PXA25x) += pxa25x.o obj-$(CONFIG_PXA27x) += pxa27x.o -obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o +obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o smemc.o obj-$(CONFIG_CPU_PXA300) += pxa300.o obj-$(CONFIG_CPU_PXA320) += pxa320.o diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index 28cfd71c032..6012177a29a 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -29,6 +29,7 @@ #include <asm/mach/map.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/pxafb.h> #include <asm/arch/ohci.h> #include <asm/arch/mmc.h> diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 50ff453ad37..bfccb80ac8e 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -10,6 +10,7 @@ #include <asm/arch/mmc.h> #include <asm/arch/irda.h> #include <asm/arch/i2c.h> +#include <asm/arch/ohci.h> #include "devices.h" diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 698aeec5296..76970598f55 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -23,6 +23,7 @@ #include <linux/ioport.h> #include <linux/pm.h> #include <linux/string.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/irq.h> @@ -226,3 +227,59 @@ void __init pxa_map_io(void) iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); get_clk_frequency_khz(1); } + +#ifdef CONFIG_PM + +static unsigned long saved_gplr[4]; +static unsigned long saved_gpdr[4]; +static unsigned long saved_grer[4]; +static unsigned long saved_gfer[4]; + +static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state) +{ + int i, gpio; + + for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { + saved_gplr[i] = GPLR(gpio); + saved_gpdr[i] = GPDR(gpio); + saved_grer[i] = GRER(gpio); + saved_gfer[i] = GFER(gpio); + + /* Clear GPIO transition detect bits */ + GEDR(gpio) = GEDR(gpio); + } + return 0; +} + +static int pxa_gpio_resume(struct sys_device *dev) +{ + int i, gpio; + + for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) { + /* restore level with set/clear */ + GPSR(gpio) = saved_gplr[i]; + GPCR(gpio) = ~saved_gplr[i]; + + GRER(gpio) = saved_grer[i]; + GFER(gpio) = saved_gfer[i]; + GPDR(gpio) = saved_gpdr[i]; + } + return 0; +} +#else +#define pxa_gpio_suspend NULL +#define pxa_gpio_resume NULL +#endif + +struct sysdev_class pxa_gpio_sysclass = { + .name = "gpio", + .suspend = pxa_gpio_suspend, + .resume = pxa_gpio_resume, +}; + +static int __init pxa_gpio_init(void) +{ + return sysdev_class_register(&pxa_gpio_sysclass); +} + +core_initcall(pxa_gpio_init); diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index b30f240a16c..1a16ad3ecee 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -52,3 +52,6 @@ extern unsigned pxa3xx_get_memclk_frequency_10khz(void); #define pxa3xx_get_clk_frequency_khz(x) (0) #define pxa3xx_get_memclk_frequency_10khz() (0) #endif + +extern struct sysdev_class pxa_irq_sysclass; +extern struct sysdev_class pxa_gpio_sysclass; diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 07acb45b16e..5a1d5eef10a 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/irq.h> @@ -321,3 +322,64 @@ void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)) pxa_low_gpio_chip.set_wake = set_wake; pxa_muxed_gpio_chip.set_wake = set_wake; } + +#ifdef CONFIG_PM +static unsigned long saved_icmr[2]; + +static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) +{ + switch (dev->id) { + case 0: + saved_icmr[0] = ICMR; + ICMR = 0; + break; +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) + case 1: + saved_icmr[1] = ICMR2; + ICMR2 = 0; + break; +#endif + default: + return -EINVAL; + } + + return 0; +} + +static int pxa_irq_resume(struct sys_device *dev) +{ + switch (dev->id) { + case 0: + ICMR = saved_icmr[0]; + ICLR = 0; + ICCR = 1; + break; +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) + case 1: + ICMR2 = saved_icmr[1]; + ICLR2 = 0; + break; +#endif + default: + return -EINVAL; + } + + return 0; +} +#else +#define pxa_irq_suspend NULL +#define pxa_irq_resume NULL +#endif + +struct sysdev_class pxa_irq_sysclass = { + .name = "irq", + .suspend = pxa_irq_suspend, + .resume = pxa_irq_resume, +}; + +static int __init pxa_irq_init(void) +{ + return sysdev_class_register(&pxa_irq_sysclass); +} + +core_initcall(pxa_irq_init); diff --git a/arch/arm/mach-pxa/mfp.c b/arch/arm/mach-pxa/mfp.c index ec1b2d8f61c..f5809adce29 100644 --- a/arch/arm/mach-pxa/mfp.c +++ b/arch/arm/mach-pxa/mfp.c @@ -22,6 +22,7 @@ #include <asm/hardware.h> #include <asm/arch/mfp.h> #include <asm/arch/mfp-pxa3xx.h> +#include <asm/arch/pxa3xx-regs.h> /* mfp_spin_lock is used to ensure that MFP register configuration * (most likely a read-modify-write operation) is atomic, and that @@ -223,11 +224,19 @@ static int pxa3xx_mfp_resume(struct sys_device *d) struct pxa3xx_mfp_pin *p = &mfp_table[pin]; __mfp_config_run(p); } + + /* clear RDH bit when MFP settings are restored + * + * NOTE: the last 3 bits DxS are write-1-to-clear so carefully + * preserve them here in case they will be referenced later + */ + ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); + return 0; } static struct sysdev_class mfp_sysclass = { - set_kset_name("mfp"), + .name = "mfp", .suspend = pxa3xx_mfp_suspend, .resume = pxa3xx_mfp_resume, }; diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 540c3bba5f9..c14696b9979 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -29,6 +29,7 @@ #include <asm/mach/arch.h> #include <asm/arch/hardware.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/pxa2xx_spi.h> #include <asm/arch/pcm027.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index dd54496083c..209eabf0ed3 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -164,7 +164,7 @@ static struct resource poodlets_resources[] = { }, }; -static unsigned long poodle_get_hsync_len(void) +static unsigned long poodle_get_hsync_invperiod(void) { return 0; } @@ -174,9 +174,9 @@ static void poodle_null_hsync(void) } static struct corgits_machinfo poodle_ts_machinfo = { - .get_hsync_len = poodle_get_hsync_len, - .put_hsync = poodle_null_hsync, - .wait_hsync = poodle_null_hsync, + .get_hsync_invperiod = poodle_get_hsync_invperiod, + .put_hsync = poodle_null_hsync, + .wait_hsync = poodle_null_hsync, }; static struct platform_device poodle_ts_device = { diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index ddd05bf78e0..599e53fcc2c 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -21,6 +21,7 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/suspend.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/arch/irqs.h> @@ -141,11 +142,6 @@ static struct clk pxa25x_clks[] = { #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] -#define RESTORE_GPLEVEL(n) do { \ - GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \ - GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \ -} while (0) - /* * List of global PXA peripheral registers to preserve. * More ones like CP and general purpose register values are preserved @@ -153,10 +149,6 @@ static struct clk pxa25x_clks[] = { */ enum { SLEEP_SAVE_START = 0, - SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, - SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, - SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, - SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, @@ -165,7 +157,6 @@ enum { SLEEP_SAVE_START = 0, SLEEP_SAVE_PSTR, - SLEEP_SAVE_ICMR, SLEEP_SAVE_CKEN, SLEEP_SAVE_SIZE @@ -174,17 +165,12 @@ enum { SLEEP_SAVE_START = 0, static void pxa25x_cpu_pm_save(unsigned long *sleep_save) { - SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); - SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); - SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); - SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(GAFR0_L); SAVE(GAFR0_U); SAVE(GAFR1_L); SAVE(GAFR1_U); SAVE(GAFR2_L); SAVE(GAFR2_U); - SAVE(ICMR); ICMR = 0; SAVE(CKEN); SAVE(PSTR); @@ -198,22 +184,14 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) PSPR = 0; /* restore registers */ - RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); - RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GAFR0_L); RESTORE(GAFR0_U); RESTORE(GAFR1_L); RESTORE(GAFR1_U); RESTORE(GAFR2_L); RESTORE(GAFR2_U); - RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); - RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); PSSR = PSSR_RDH | PSSR_PH; RESTORE(CKEN); - - ICLR = 0; - ICCR = 1; - RESTORE(ICMR); RESTORE(PSTR); } @@ -304,9 +282,17 @@ static struct platform_device *pxa25x_devices[] __initdata = { &pxa25x_device_assp, }; +static struct sys_device pxa25x_sysdev[] = { + { + .cls = &pxa_irq_sysclass, + }, { + .cls = &pxa_gpio_sysclass, + }, +}; + static int __init pxa25x_init(void) { - int ret = 0; + int i, ret = 0; /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ if (cpu_is_pxa25x()) @@ -320,9 +306,18 @@ static int __init pxa25x_init(void) pxa25x_init_pm(); + for (i = 0; i < ARRAY_SIZE(pxa25x_sysdev); i++) { + ret = sysdev_register(&pxa25x_sysdev[i]); + if (ret) + pr_err("failed to register sysdev[%d]\n", i); + } + ret = platform_add_devices(pxa25x_devices, ARRAY_SIZE(pxa25x_devices)); + if (ret) + return ret; } + /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ if (cpu_is_pxa25x()) ret = platform_device_register(&pxa_device_hwuart); diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 96cf274ec7c..46a951c3e5a 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -16,6 +16,7 @@ #include <linux/init.h> #include <linux/suspend.h> #include <linux/platform_device.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/irq.h> @@ -171,11 +172,6 @@ static struct clk pxa27x_clks[] = { #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] -#define RESTORE_GPLEVEL(n) do { \ - GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \ - GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \ -} while (0) - /* * List of global PXA peripheral registers to preserve. * More ones like CP and general purpose register values are preserved @@ -183,10 +179,6 @@ static struct clk pxa27x_clks[] = { */ enum { SLEEP_SAVE_START = 0, - SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3, - SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3, - SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3, - SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3, SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, @@ -196,7 +188,6 @@ enum { SLEEP_SAVE_START = 0, SLEEP_SAVE_PSTR, - SLEEP_SAVE_ICMR, SLEEP_SAVE_CKEN, SLEEP_SAVE_MDREFR, @@ -208,10 +199,6 @@ enum { SLEEP_SAVE_START = 0, void pxa27x_cpu_pm_save(unsigned long *sleep_save) { - SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); SAVE(GPLR3); - SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); SAVE(GPDR3); - SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); SAVE(GRER3); - SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); SAVE(GFER3); SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3); SAVE(GAFR0_L); SAVE(GAFR0_U); @@ -223,12 +210,8 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save) SAVE(PWER); SAVE(PCFR); SAVE(PRER); SAVE(PFER); SAVE(PKWR); - SAVE(ICMR); ICMR = 0; SAVE(CKEN); SAVE(PSTR); - - /* Clear GPIO transition detect bits */ - GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; GEDR3 = GEDR3; } void pxa27x_cpu_pm_restore(unsigned long *sleep_save) @@ -237,15 +220,10 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save) PSPR = 0; /* restore registers */ - RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); - RESTORE_GPLEVEL(2); RESTORE_GPLEVEL(3); - RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GPDR3); RESTORE(GAFR0_L); RESTORE(GAFR0_U); RESTORE(GAFR1_L); RESTORE(GAFR1_U); RESTORE(GAFR2_L); RESTORE(GAFR2_U); RESTORE(GAFR3_L); RESTORE(GAFR3_U); - RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GRER3); - RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(GFER3); RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3); RESTORE(MDREFR); @@ -256,9 +234,6 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save) RESTORE(CKEN); - ICLR = 0; - ICCR = 1; - RESTORE(ICMR); RESTORE(PSTR); } @@ -409,9 +384,22 @@ static struct platform_device *devices[] __initdata = { &pxa27x_device_ssp3, }; +static struct sys_device pxa27x_sysdev[] = { + { + .id = 0, + .cls = &pxa_irq_sysclass, + }, { + .id = 1, + .cls = &pxa_irq_sysclass, + }, { + .cls = &pxa_gpio_sysclass, + }, +}; + static int __init pxa27x_init(void) { - int ret = 0; + int i, ret = 0; + if (cpu_is_pxa27x()) { clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); @@ -420,8 +408,15 @@ static int __init pxa27x_init(void) pxa27x_init_pm(); + for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) { + ret = sysdev_register(&pxa27x_sysdev[i]); + if (ret) + pr_err("failed to register sysdev[%d]\n", i); + } + ret = platform_add_devices(devices, ARRAY_SIZE(devices)); } + return ret; } diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 5cbf057a1b3..e47e67c11af 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -20,6 +20,7 @@ #include <linux/platform_device.h> #include <linux/irq.h> #include <linux/io.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/arch/pxa3xx-regs.h> @@ -39,6 +40,7 @@ #define RO_CLK 60000000 #define ACCR_D0CS (1 << 26) +#define ACCR_PCCE (1 << 11) /* crystal frequency to static memory controller multiplier (SMCFS) */ static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; @@ -203,7 +205,6 @@ static struct clk pxa3xx_clks[] = { }; #ifdef CONFIG_PM -#define SLEEP_SAVE_SIZE 4 #define ISRAM_START 0x5c000000 #define ISRAM_SIZE SZ_256K @@ -211,25 +212,29 @@ static struct clk pxa3xx_clks[] = { static void __iomem *sram; static unsigned long wakeup_src; -static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) -{ - pr_debug("PM: CKENA=%08x CKENB=%08x\n", CKENA, CKENB); +#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x +#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] - if (CKENA & (1 << CKEN_USBH)) { - printk(KERN_ERR "PM: USB host clock not stopped?\n"); - CKENA &= ~(1 << CKEN_USBH); - } -// CKENA |= 1 << (CKEN_ISC & 31); +enum { SLEEP_SAVE_START = 0, + SLEEP_SAVE_CKENA, + SLEEP_SAVE_CKENB, + SLEEP_SAVE_ACCR, - /* - * Low power modes require the HSIO2 clock to be enabled. - */ - CKENB |= 1 << (CKEN_HSIO2 & 31); + SLEEP_SAVE_SIZE, +}; + +static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) +{ + SAVE(CKENA); + SAVE(CKENB); + SAVE(ACCR); } static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save) { - CKENB &= ~(1 << (CKEN_HSIO2 & 31)); + RESTORE(ACCR); + RESTORE(CKENA); + RESTORE(CKENB); } /* @@ -265,6 +270,46 @@ static void pxa3xx_cpu_standby(unsigned int pwrmode) printk("PM: AD2D0SR=%08x ASCR=%08x\n", AD2D0SR, ASCR); } +/* + * NOTE: currently, the OBM (OEM Boot Module) binary comes along with + * PXA3xx development kits assumes that the resuming process continues + * with the address stored within the first 4 bytes of SDRAM. The PSPR + * register is used privately by BootROM and OBM, and _must_ be set to + * 0x5c014000 for the moment. + */ +static void pxa3xx_cpu_pm_suspend(void) +{ + volatile unsigned long *p = (volatile void *)0xc0000000; + unsigned long saved_data = *p; + + extern void pxa3xx_cpu_suspend(void); + extern void pxa3xx_cpu_resume(void); + + /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ + CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM); + CKENB |= 1 << (CKEN_HSIO2 & 0x1f); + + /* clear and setup wakeup source */ + AD3SR = ~0; + AD3ER = wakeup_src; + ASCR = ASCR; + ARSR = ARSR; + + PCFR |= (1u << 13); /* L1_DIS */ + PCFR &= ~((1u << 12) | (1u << 1)); /* L0_EN | SL_ROD */ + + PSPR = 0x5c014000; + + /* overwrite with the resume address */ + *p = virt_to_phys(pxa3xx_cpu_resume); + + pxa3xx_cpu_suspend(); + + *p = saved_data; + + AD3ER = 0; +} + static void pxa3xx_cpu_pm_enter(suspend_state_t state) { /* @@ -279,6 +324,7 @@ static void pxa3xx_cpu_pm_enter(suspend_state_t state) break; case PM_SUSPEND_MEM: + pxa3xx_cpu_pm_suspend(); break; } } @@ -452,9 +498,21 @@ static struct platform_device *devices[] __initdata = { &pxa3xx_device_ssp4, }; +static struct sys_device pxa3xx_sysdev[] = { + { + .id = 0, + .cls = &pxa_irq_sysclass, + }, { + .id = 1, + .cls = &pxa_irq_sysclass, + }, { + .cls = &pxa_gpio_sysclass, + }, +}; + static int __init pxa3xx_init(void) { - int ret = 0; + int i, ret = 0; if (cpu_is_pxa3xx()) { clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); @@ -464,9 +522,16 @@ static int __init pxa3xx_init(void) pxa3xx_init_pm(); - return platform_add_devices(devices, ARRAY_SIZE(devices)); + for (i = 0; i < ARRAY_SIZE(pxa3xx_sysdev); i++) { + ret = sysdev_register(&pxa3xx_sysdev[i]); + if (ret) + pr_err("failed to register sysdev[%d]\n", i); + } + + ret = platform_add_devices(devices, ARRAY_SIZE(devices)); } - return 0; + + return ret; } subsys_initcall(pxa3xx_init); diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index 14bb4a93ea5..784716eb7fc 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -50,6 +50,108 @@ pxa_cpu_save_sp: str r0, [r1] ldr pc, [sp], #4 +#ifdef CONFIG_PXA3xx +/* + * pxa3xx_cpu_suspend() - forces CPU into sleep state (S2D3C4) + * + * NOTE: unfortunately, pxa_cpu_save_cp can not be reused here since + * the auxiliary control register address is different between pxa3xx + * and pxa{25x,27x} + */ + +ENTRY(pxa3xx_cpu_suspend) + +#ifndef CONFIG_IWMMXT + mra r2, r3, acc0 +#endif + stmfd sp!, {r2 - r12, lr} @ save registers on stack + + mrc p14, 0, r3, c6, c0, 0 @ clock configuration, for turbo mode + mrc p15, 0, r4, c15, c1, 0 @ CP access reg + mrc p15, 0, r5, c13, c0, 0 @ PID + mrc p15, 0, r6, c3, c0, 0 @ domain ID + mrc p15, 0, r7, c2, c0, 0 @ translation table base addr + mrc p15, 0, r8, c1, c0, 1 @ auxiliary control reg + mrc p15, 0, r9, c1, c0, 0 @ control reg + + bic r3, r3, #2 @ clear frequency change bit + + @ store them plus current virtual stack ptr on stack + mov r10, sp + stmfd sp!, {r3 - r10} + + @ store physical address of stack pointer + mov r0, sp + bl sleep_phys_sp + ldr r1, =sleep_save_sp + str r0, [r1] + + @ clean data cache + bl xsc3_flush_kern_cache_all + + mov r0, #0x06 @ S2D3C4 mode + mcr p14, 0, r0, c7, c0, 0 @ enter sleep + +20: b 20b @ waiting for sleep + + .data + .align 5 +/* + * pxa3xx_cpu_resume + */ + +ENTRY(pxa3xx_cpu_resume) + + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off + msr cpsr_c, r0 + + ldr r0, sleep_save_sp @ stack phys addr + ldmfd r0, {r3 - r9, sp} @ CP regs + virt stack ptr + + mov r1, #0 + mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB + mcr p15, 0, r1, c7, c10, 4 @ drain write (&fill) buffer + mcr p15, 0, r1, c7, c5, 4 @ flush prefetch buffer + mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs + + mcr p14, 0, r3, c6, c0, 0 @ clock configuration, turbo mode. + mcr p15, 0, r4, c15, c1, 0 @ CP access reg + mcr p15, 0, r5, c13, c0, 0 @ PID + mcr p15, 0, r6, c3, c0, 0 @ domain ID + mcr p15, 0, r7, c2, c0, 0 @ translation table base addr + mcr p15, 0, r8, c1, c0, 1 @ auxiliary control reg + + @ temporarily map resume_turn_on_mmu into the page table, + @ otherwise prefetch abort occurs after MMU is turned on + mov r1, r7 + bic r1, r1, #0x00ff + bic r1, r1, #0x3f00 + ldr r2, =0x542e + + adr r3, resume_turn_on_mmu + mov r3, r3, lsr #20 + orr r4, r2, r3, lsl #20 + ldr r5, [r1, r3, lsl #2] + str r4, [r1, r3, lsl #2] + + @ Mapping page table address in the page table + mov r6, r1, lsr #20 + orr r7, r2, r6, lsl #20 + ldr r8, [r1, r6, lsl #2] + str r7, [r1, r6, lsl #2] + + ldr r2, =pxa3xx_resume_after_mmu @ absolute virtual address + b resume_turn_on_mmu @ cache align execution + + .text +pxa3xx_resume_after_mmu: + /* restore the temporary mapping */ + str r5, [r1, r3, lsl #2] + str r8, [r1, r6, lsl #2] + b resume_after_mmu + +#endif /* CONFIG_PXA3xx */ + #ifdef CONFIG_PXA27x /* * pxa27x_cpu_suspend() diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c new file mode 100644 index 00000000000..ad346addc02 --- /dev/null +++ b/arch/arm/mach-pxa/smemc.c @@ -0,0 +1,88 @@ +/* + * Static Memory Controller + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/sysdev.h> + +#define SMEMC_PHYS_BASE (0x4A000000) +#define SMEMC_PHYS_SIZE (0x90) + +#define MSC0 (0x08) /* Static Memory Controller Register 0 */ +#define MSC1 (0x0C) /* Static Memory Controller Register 1 */ +#define SXCNFG (0x1C) /* Synchronous Static Memory Control Register */ +#define MEMCLKCFG (0x68) /* Clock Configuration */ +#define CSADRCFG0 (0x80) /* Address Configuration Register for CS0 */ +#define CSADRCFG1 (0x84) /* Address Configuration Register for CS1 */ +#define CSADRCFG2 (0x88) /* Address Configuration Register for CS2 */ +#define CSADRCFG3 (0x8C) /* Address Configuration Register for CS3 */ + +#ifdef CONFIG_PM +static void __iomem *smemc_mmio_base; + +static unsigned long msc[2]; +static unsigned long sxcnfg, memclkcfg; +static unsigned long csadrcfg[4]; + +static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state) +{ + msc[0] = __raw_readl(smemc_mmio_base + MSC0); + msc[1] = __raw_readl(smemc_mmio_base + MSC1); + sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG); + memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG); + csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0); + csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1); + csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2); + csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3); + + return 0; +} + +static int pxa3xx_smemc_resume(struct sys_device *dev) +{ + __raw_writel(msc[0], smemc_mmio_base + MSC0); + __raw_writel(msc[1], smemc_mmio_base + MSC1); + __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG); + __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG); + __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0); + __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1); + __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2); + __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3); + + return 0; +} + +static struct sysdev_class smemc_sysclass = { + .name = "smemc", + .suspend = pxa3xx_smemc_suspend, + .resume = pxa3xx_smemc_resume, +}; + +static struct sys_device smemc_sysdev = { + .id = 0, + .cls = &smemc_sysclass, +}; + +static int __init smemc_init(void) +{ + int ret = 0; + + if (cpu_is_pxa3xx()) { + smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE); + if (smemc_mmio_base == NULL) + return -ENODEV; + + ret = sysdev_class_register(&smemc_sysclass); + if (ret) + return ret; + + ret = sysdev_register(&smemc_sysdev); + } + + return ret; +} +subsys_initcall(smemc_init); +#endif diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 5078edeadf9..9e7773fca01 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -36,6 +36,7 @@ #include <asm/mach/irq.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/irda.h> #include <asm/arch/mmc.h> #include <asm/arch/ohci.h> diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 1a9c844ac7e..9b26fa5edad 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -29,6 +29,7 @@ #include <asm/irq.h> #include <asm/system.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/irda.h> #include <asm/arch/mmc.h> #include <asm/arch/udc.h> |