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Diffstat (limited to 'arch/arm/mach-realview/platsmp.c')
-rw-r--r--arch/arm/mach-realview/platsmp.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index fce3596f995..de2b7159557 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -18,6 +18,7 @@
#include <asm/hardware/arm_scu.h>
#include <asm/hardware.h>
#include <asm/io.h>
+#include <asm/mach-types.h>
extern void realview_secondary_startup(void);
@@ -31,9 +32,13 @@ static unsigned int __init get_core_count(void)
{
unsigned int ncores;
- ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
+ if (machine_is_realview_eb() && core_tile_eb11mp()) {
+ ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
+ ncores = (ncores & 0x03) + 1;
+ } else
+ ncores = 1;
- return (ncores & 0x03) + 1;
+ return ncores;
}
static DEFINE_SPINLOCK(boot_lock);
@@ -52,7 +57,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
- gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
+ gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
/*
* let the primary processor know we're out of the
@@ -187,10 +192,15 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (max_cpus > ncores)
max_cpus = ncores;
+#ifdef CONFIG_LOCAL_TIMERS
/*
- * Enable the local timer for primary CPU
+ * Enable the local timer for primary CPU. If the device is
+ * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
+ * realview_timer_init
*/
- local_timer_setup(cpu);
+ if (machine_is_realview_eb() && core_tile_eb11mp())
+ local_timer_setup(cpu);
+#endif
/*
* Initialise the present map, which describes the set of CPUs