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-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c54
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c83
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c56
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c219
5 files changed, 182 insertions, 232 deletions
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 80d83739ab9..8f12e855ef5 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -145,7 +145,7 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
},
};
-static int s3c2410_dma_add(struct sys_device *sysdev)
+static int __init s3c2410_dma_add(struct sys_device *sysdev)
{
s3c2410_dma_init();
s3c24xx_dma_order_set(&s3c2410_dma_order);
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 43bb5e10630..a67a0685664 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -168,13 +168,31 @@ static void __init amlm5900_map_io(void)
}
#ifdef CONFIG_FB_S3C2410
-static struct s3c2410fb_mach_info __initdata amlm5900_lcd_info = {
+static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
.width = 160,
.height = 160,
-/* commented out until stn patch is submitted
-* .type = S3C2410_LCDCON1_STN4,
-*/
+ .type = S3C2410_LCDCON1_STN4,
+
+ .pixclock = 680000, /* HCLK = 100MHz */
+ .xres = 160,
+ .yres = 160,
+ .bpp = 4,
+ .left_margin = 1 << (4 + 3),
+ .right_margin = 8 << 3,
+ .hsync_len = 48,
+ .upper_margin = 0,
+ .lower_margin = 0,
+
+ .lcdcon5 = 0x00000001,
+};
+
+static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = {
+
+ .displays = &amlm5900_lcd_info,
+ .num_displays = 1,
+ .default_display = 0,
+
.gpccon = 0xaaaaaaaa,
.gpccon_mask = 0xffffffff,
.gpcup = 0x0000ffff,
@@ -184,32 +202,6 @@ static struct s3c2410fb_mach_info __initdata amlm5900_lcd_info = {
.gpdcon_mask = 0xffffffff,
.gpdup = 0x0000ffff,
.gpdup_mask = 0xffffffff,
-
- .xres = {
- .min = 160,
- .max = 160,
- .defval = 160,
- },
-
- .yres = {
- .min = 160,
- .max = 160,
- .defval = 160,
- },
-
- .bpp = {
- .min = 4,
- .max = 4,
- .defval = 4,
- },
-
- .regs = {
- .lcdcon1 = 0x00008225,
- .lcdcon2 = 0x0027c000,
- .lcdcon3 = 0x00182708,
- .lcdcon4 = 0x00000002,
- .lcdcon5 = 0x00000001,
- }
};
#endif
@@ -239,7 +231,7 @@ static void __init amlm5900_init(void)
{
amlm5900_init_pm();
#ifdef CONFIG_FB_S3C2410
- s3c24xx_fb_set_platdata(&amlm5900_lcd_info);
+ s3c24xx_fb_set_platdata(&amlm5900_fb_info);
#endif
platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices));
}
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index bc926992b4e..587864fe25f 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -467,35 +467,70 @@ static struct platform_device bast_device_axpp = {
/* LCD/VGA controller */
-static struct s3c2410fb_mach_info __initdata bast_lcd_info = {
- .width = 640,
- .height = 480,
-
- .xres = {
- .min = 320,
- .max = 1024,
- .defval = 640,
- },
+static struct s3c2410fb_display __initdata bast_lcd_info[] = {
+ {
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 640,
+ .height = 480,
+
+ .pixclock = 33333,
+ .xres = 640,
+ .yres = 480,
+ .bpp = 4,
+ .left_margin = 40,
+ .right_margin = 20,
+ .hsync_len = 88,
+ .upper_margin = 30,
+ .lower_margin = 32,
+ .vsync_len = 3,
- .yres = {
- .min = 240,
- .max = 600,
- .defval = 480,
+ .lcdcon5 = 0x00014b02,
},
+ {
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 640,
+ .height = 480,
+
+ .pixclock = 33333,
+ .xres = 640,
+ .yres = 480,
+ .bpp = 8,
+ .left_margin = 40,
+ .right_margin = 20,
+ .hsync_len = 88,
+ .upper_margin = 30,
+ .lower_margin = 32,
+ .vsync_len = 3,
- .bpp = {
- .min = 4,
- .max = 16,
- .defval = 8,
+ .lcdcon5 = 0x00014b02,
},
+ {
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 640,
+ .height = 480,
+
+ .pixclock = 33333,
+ .xres = 640,
+ .yres = 480,
+ .bpp = 16,
+ .left_margin = 40,
+ .right_margin = 20,
+ .hsync_len = 88,
+ .upper_margin = 30,
+ .lower_margin = 32,
+ .vsync_len = 3,
- .regs = {
- .lcdcon1 = 0x00000176,
- .lcdcon2 = 0x1d77c7c2,
- .lcdcon3 = 0x013a7f13,
- .lcdcon4 = 0x00000057,
.lcdcon5 = 0x00014b02,
- }
+ },
+};
+
+/* LCD/VGA controller */
+
+static struct s3c2410fb_mach_info __initdata bast_fb_info = {
+
+ .displays = bast_lcd_info,
+ .num_displays = ARRAY_SIZE(bast_lcd_info),
+ .default_display = 4,
};
/* Standard BAST devices */
@@ -552,7 +587,7 @@ static void __init bast_map_io(void)
static void __init bast_init(void)
{
- s3c24xx_fb_set_platdata(&bast_lcd_info);
+ s3c24xx_fb_set_platdata(&bast_fb_info);
platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices));
}
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 9a172b4ad72..7c1145e87c1 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -133,29 +133,31 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = {
/**
* Set lcd on or off
**/
-static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = {
- .fixed_syncs= 1,
- .regs={
- .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \
- S3C2410_LCDCON1_TFT | \
- S3C2410_LCDCON1_CLKVAL(0x0C),
-
- .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \
- S3C2410_LCDCON2_LINEVAL(319) | \
- S3C2410_LCDCON2_VFPD(6) | \
- S3C2410_LCDCON2_VSPW(0),
-
- .lcdcon3= S3C2410_LCDCON3_HBPD(19) | \
- S3C2410_LCDCON3_HOZVAL(239) | \
- S3C2410_LCDCON3_HFPD(7),
-
- .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \
- S3C2410_LCDCON4_HSPW(3),
-
- .lcdcon5= S3C2410_LCDCON5_FRM565 | \
- S3C2410_LCDCON5_INVVLINE | \
- S3C2410_LCDCON5_HWSWP,
- },
+static struct s3c2410fb_display h1940_lcd __initdata = {
+ .lcdcon5= S3C2410_LCDCON5_FRM565 | \
+ S3C2410_LCDCON5_INVVLINE | \
+ S3C2410_LCDCON5_HWSWP,
+
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 240,
+ .height = 320,
+ .pixclock = 260000,
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .left_margin = 20,
+ .right_margin = 8,
+ .hsync_len = 4,
+ .upper_margin = 8,
+ .lower_margin = 7,
+ .vsync_len = 1,
+};
+
+static struct s3c2410fb_mach_info h1940_fb_info __initdata = {
+ .displays = &h1940_lcd,
+ .num_displays = 1,
+ .default_display = 0,
+
.lpcsel= 0x02,
.gpccon= 0xaa940659,
.gpccon_mask= 0xffffffff,
@@ -165,12 +167,6 @@ static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = {
.gpdcon_mask= 0xffffffff,
.gpdup= 0x0000faff,
.gpdup_mask= 0xffffffff,
-
- .width= 240,
- .height= 320,
- .xres= {240,240,240},
- .yres= {320,320,320},
- .bpp= {16,16,16},
};
static struct platform_device s3c_device_leds = {
@@ -217,7 +213,7 @@ static void __init h1940_init(void)
{
u32 tmp;
- s3c24xx_fb_set_platdata(&h1940_lcdcfg);
+ s3c24xx_fb_set_platdata(&h1940_fb_info);
s3c24xx_udc_set_platdata(&h1940_udc_cfg);
/* Turn off suspend on both USB ports, and switch the
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index e670b1e1631..a1caf4b0ada 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -95,157 +95,83 @@ static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
/* LCD driver info */
-/* Configuration for 640x480 SHARP LQ080V3DG01 */
-static struct s3c2410fb_mach_info qt2410_biglcd_cfg __initdata = {
- .regs = {
-
- .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
- S3C2410_LCDCON1_TFT |
- S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
-
- .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
- S3C2410_LCDCON2_LINEVAL(479) |
- S3C2410_LCDCON2_VFPD(10) | /* 11 */
- S3C2410_LCDCON2_VSPW(14), /* 15 */
-
- .lcdcon3 = S3C2410_LCDCON3_HBPD(43) | /* 44 */
- S3C2410_LCDCON3_HOZVAL(639) | /* 640 */
- S3C2410_LCDCON3_HFPD(115), /* 116 */
-
- .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
- S3C2410_LCDCON4_HSPW(95), /* 96 */
-
- .lcdcon5 = S3C2410_LCDCON5_FRM565 |
- S3C2410_LCDCON5_INVVLINE |
- S3C2410_LCDCON5_INVVFRAME |
- S3C2410_LCDCON5_PWREN |
- S3C2410_LCDCON5_HWSWP,
+static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
+ {
+ /* Configuration for 640x480 SHARP LQ080V3DG01 */
+ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+ S3C2410_LCDCON5_INVVLINE |
+ S3C2410_LCDCON5_INVVFRAME |
+ S3C2410_LCDCON5_PWREN |
+ S3C2410_LCDCON5_HWSWP,
+
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 640,
+ .height = 480,
+
+ .pixclock = 40000, /* HCLK/4 */
+ .xres = 640,
+ .yres = 480,
+ .bpp = 16,
+ .left_margin = 44,
+ .right_margin = 116,
+ .hsync_len = 96,
+ .upper_margin = 19,
+ .lower_margin = 11,
+ .vsync_len = 15,
},
-
- .lpcsel = ((0xCE6) & ~7) | 1<<4,
-
- .width = 640,
- .height = 480,
-
- .xres = {
- .min = 640,
- .max = 640,
- .defval = 640,
- },
-
- .yres = {
- .min = 480,
- .max = 480,
- .defval = 480,
- },
-
- .bpp = {
- .min = 16,
- .max = 16,
- .defval = 16,
- },
-};
-
-/* Configuration for 480x640 toppoly TD028TTEC1 */
-static struct s3c2410fb_mach_info qt2410_prodlcd_cfg __initdata = {
- .regs = {
-
- .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
- S3C2410_LCDCON1_TFT |
- S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
-
- .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
- S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
- S3C2410_LCDCON2_VFPD(3) | /* 4 */
- S3C2410_LCDCON2_VSPW(1), /* 2 */
-
- .lcdcon3 = S3C2410_LCDCON3_HBPD(7) | /* 8 */
- S3C2410_LCDCON3_HOZVAL(479) | /* 479 */
- S3C2410_LCDCON3_HFPD(23), /* 24 */
-
- .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
- S3C2410_LCDCON4_HSPW(7), /* 8 */
-
- .lcdcon5 = S3C2410_LCDCON5_FRM565 |
- S3C2410_LCDCON5_INVVLINE |
- S3C2410_LCDCON5_INVVFRAME |
- S3C2410_LCDCON5_PWREN |
- S3C2410_LCDCON5_HWSWP,
- },
-
- .lpcsel = ((0xCE6) & ~7) | 1<<4,
-
- .width = 480,
- .height = 640,
-
- .xres = {
- .min = 480,
- .max = 480,
- .defval = 480,
+ {
+ /* Configuration for 480x640 toppoly TD028TTEC1 */
+ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+ S3C2410_LCDCON5_INVVLINE |
+ S3C2410_LCDCON5_INVVFRAME |
+ S3C2410_LCDCON5_PWREN |
+ S3C2410_LCDCON5_HWSWP,
+
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 480,
+ .height = 640,
+ .pixclock = 40000, /* HCLK/4 */
+ .xres = 480,
+ .yres = 640,
+ .bpp = 16,
+ .left_margin = 8,
+ .right_margin = 24,
+ .hsync_len = 8,
+ .upper_margin = 2,
+ .lower_margin = 4,
+ .vsync_len = 2,
},
-
- .yres = {
- .min = 640,
- .max = 640,
- .defval = 640,
- },
-
- .bpp = {
- .min = 16,
- .max = 16,
- .defval = 16,
+ {
+ /* Config for 240x320 LCD */
+ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
+ S3C2410_LCDCON5_INVVLINE |
+ S3C2410_LCDCON5_INVVFRAME |
+ S3C2410_LCDCON5_PWREN |
+ S3C2410_LCDCON5_HWSWP,
+
+ .type = S3C2410_LCDCON1_TFT,
+ .width = 240,
+ .height = 320,
+ .pixclock = 100000, /* HCLK/10 */
+ .xres = 240,
+ .yres = 320,
+ .bpp = 16,
+ .left_margin = 13,
+ .right_margin = 8,
+ .hsync_len = 4,
+ .upper_margin = 2,
+ .lower_margin = 7,
+ .vsync_len = 4,
},
};
-/* Config for 240x320 LCD */
-static struct s3c2410fb_mach_info qt2410_lcd_cfg __initdata = {
- .regs = {
-
- .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
- S3C2410_LCDCON1_TFT |
- S3C2410_LCDCON1_CLKVAL(0x04),
-
- .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
- S3C2410_LCDCON2_LINEVAL(319) |
- S3C2410_LCDCON2_VFPD(6) |
- S3C2410_LCDCON2_VSPW(3),
-
- .lcdcon3 = S3C2410_LCDCON3_HBPD(12) |
- S3C2410_LCDCON3_HOZVAL(239) |
- S3C2410_LCDCON3_HFPD(7),
- .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
- S3C2410_LCDCON4_HSPW(3),
-
- .lcdcon5 = S3C2410_LCDCON5_FRM565 |
- S3C2410_LCDCON5_INVVLINE |
- S3C2410_LCDCON5_INVVFRAME |
- S3C2410_LCDCON5_PWREN |
- S3C2410_LCDCON5_HWSWP,
- },
+static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
+ .displays = qt2410_lcd_cfg,
+ .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
+ .default_display = 0,
.lpcsel = ((0xCE6) & ~7) | 1<<4,
-
- .width = 240,
- .height = 320,
-
- .xres = {
- .min = 240,
- .max = 240,
- .defval = 240,
- },
-
- .yres = {
- .min = 320,
- .max = 320,
- .defval = 320,
- },
-
- .bpp = {
- .min = 16,
- .max = 16,
- .defval = 16,
- },
};
/* CS8900 */
@@ -408,16 +334,17 @@ static void __init qt2410_machine_init(void)
switch (tft_type) {
case 'p': /* production */
- s3c24xx_fb_set_platdata(&qt2410_prodlcd_cfg);
+ qt2410_fb_info.default_display = 1;
break;
case 'b': /* big */
- s3c24xx_fb_set_platdata(&qt2410_biglcd_cfg);
+ qt2410_fb_info.default_display = 0;
break;
case 's': /* small */
default:
- s3c24xx_fb_set_platdata(&qt2410_lcd_cfg);
+ qt2410_fb_info.default_display = 2;
break;
}
+ s3c24xx_fb_set_platdata(&qt2410_fb_info);
s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_setpin(S3C2410_GPB0, 1);
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-25 09:45:34 +0000