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-rw-r--r--arch/arm/mach-sa1100/generic.c15
-rw-r--r--arch/arm/mach-sa1100/h3600.c6
-rw-r--r--arch/arm/mach-sa1100/irq.c8
-rw-r--r--arch/arm/mach-sa1100/neponset.c8
-rw-r--r--arch/arm/mach-sa1100/time.c7
5 files changed, 26 insertions, 18 deletions
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 4575f316e14..e510295c258 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <asm/div64.h>
+#include <asm/cnt32_to_63.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
@@ -118,15 +119,21 @@ EXPORT_SYMBOL(cpufreq_get);
/*
* This is the SA11x0 sched_clock implementation. This has
- * a resolution of 271ns, and a maximum value of 1165s.
+ * a resolution of 271ns, and a maximum value of 32025597s (370 days).
+ *
+ * The return value is guaranteed to be monotonic in that range as
+ * long as there is always less than 582 seconds between successive
+ * calls to this function.
+ *
* ( * 1E9 / 3686400 => * 78125 / 288)
*/
unsigned long long sched_clock(void)
{
- unsigned long long v;
+ unsigned long long v = cnt32_to_63(OSCR);
- v = (unsigned long long)OSCR * 78125;
- do_div(v, 288);
+ /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
+ v *= 78125<<1;
+ do_div(v, 288<<1);
return v;
}
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index fa6dc71bd6a..b034ad69a32 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -702,7 +702,7 @@ static u32 gpio_irq_mask[] = {
GPIO2_SD_CON_SLT,
};
-static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
+static void h3800_IRQ_demux(unsigned int irq, struct irq_desc *desc)
{
int i;
@@ -719,14 +719,14 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
if (irq & kpio_irq_mask[j])
- do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
+ handle_edge_irq(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
/* GPIO2 */
irq = H3800_ASIC2_GPIINTFLAG;
if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
if (irq & gpio_irq_mask[j])
- do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
+ handle_edge_irq(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
}
if (i >= MAX_ASIC_ISR_LOOPS)
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index f4c6322ca33..5642aeca079 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -110,7 +110,7 @@ static struct irq_chip sa1100_low_gpio_chip = {
* and call the handler.
*/
static void
-sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc)
+sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned int mask;
@@ -327,19 +327,19 @@ void __init sa1100_init_irq(void)
for (irq = 0; irq <= 10; irq++) {
set_irq_chip(irq, &sa1100_low_gpio_chip);
- set_irq_handler(irq, do_edge_IRQ);
+ set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
for (irq = 12; irq <= 31; irq++) {
set_irq_chip(irq, &sa1100_normal_chip);
- set_irq_handler(irq, do_level_IRQ);
+ set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
for (irq = 32; irq <= 48; irq++) {
set_irq_chip(irq, &sa1100_high_gpio_chip);
- set_irq_handler(irq, do_edge_IRQ);
+ set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 354d5e91da5..075d4d1d63b 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -29,12 +29,12 @@
* is rather unfortunate.
*/
static void
-neponset_irq_handler(unsigned int irq, struct irqdesc *desc)
+neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned int irr;
while (1) {
- struct irqdesc *d;
+ struct irq_desc *d;
/*
* Acknowledge the parent IRQ.
@@ -168,9 +168,9 @@ static int neponset_probe(struct platform_device *dev)
* Setup other Neponset IRQs. SA1111 will be done by the
* generic SA1111 code.
*/
- set_irq_handler(IRQ_NEPONSET_SMC9196, do_simple_IRQ);
+ set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
- set_irq_handler(IRQ_NEPONSET_USAR, do_simple_IRQ);
+ set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
/*
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 4284bd6f7a1..29c89f9eb2c 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -118,6 +118,7 @@ static struct irqaction sa1100_timer_irq = {
static void __init sa1100_timer_init(void)
{
struct timespec tv;
+ unsigned long flags;
set_rtc = sa1100_set_rtc;
@@ -126,12 +127,12 @@ static void __init sa1100_timer_init(void)
do_settimeofday(&tv);
OIER = 0; /* disable any timer interrupts */
- OSCR = LATCH*2; /* push OSCR out of the way */
- OSMR0 = LATCH; /* set initial match */
OSSR = 0xf; /* clear status on all timers */
setup_irq(IRQ_OST0, &sa1100_timer_irq);
+ local_irq_save(flags);
OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
- OSCR = 0; /* initialize free-running timer */
+ OSMR0 = OSCR + LATCH; /* set initial match */
+ local_irq_restore(flags);
}
#ifdef CONFIG_NO_IDLE_HZ