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-rw-r--r--arch/arm/mm/copypage-v4mc.c4
-rw-r--r--arch/arm/mm/copypage-v6.c4
-rw-r--r--arch/arm/mm/copypage-xscale.c4
-rw-r--r--arch/arm/mm/flush.c4
-rw-r--r--arch/arm/mm/init.c20
-rw-r--r--arch/arm/mm/mm-armv.c14
-rw-r--r--arch/arm/mm/mm.h19
7 files changed, 36 insertions, 33 deletions
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index fc69dccdace..df1645e14b4 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -20,6 +20,8 @@
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+#include "mm.h"
+
/*
* 0xffff8000 to 0xffffffff is reserved for any ARM architecture
* specific hacks for copying pages efficiently.
@@ -27,8 +29,6 @@
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
L_PTE_CACHEABLE)
-#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
-
static DEFINE_SPINLOCK(minicache_lock);
/*
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 269ce6913ee..3d0d3a963d2 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -17,6 +17,8 @@
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
+#include "mm.h"
+
#if SHMLBA > 16384
#error FIX ME
#endif
@@ -24,8 +26,6 @@
#define from_address (0xffff8000)
#define to_address (0xffffc000)
-#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
-
static DEFINE_SPINLOCK(v6_lock);
/*
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 42a6ee255ce..84ebe0aa379 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -20,6 +20,8 @@
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+#include "mm.h"
+
/*
* 0xffff8000 to 0xffffffff is reserved for any ARM architecture
* specific hacks for copying pages efficiently.
@@ -29,8 +31,6 @@
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
L_PTE_CACHEABLE)
-#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
-
static DEFINE_SPINLOCK(minicache_lock);
/*
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index d438ce41cdd..1efb05c64db 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -15,12 +15,12 @@
#include <asm/system.h>
#include <asm/tlbflush.h>
+#include "mm.h"
+
#ifdef CONFIG_CPU_CACHE_VIPT
#define ALIAS_FLUSH_START 0xffff4000
-#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
-
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
{
unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fe3f7f62500..1099af6d470 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -25,6 +25,8 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include "mm.h"
+
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
@@ -44,6 +46,11 @@ static struct meminfo meminfo __initdata = { 0, };
*/
struct page *empty_zero_page;
+/*
+ * The pmd table for the upper-most set of pages.
+ */
+pmd_t *top_pmd;
+
void show_mem(void)
{
int free = 0, total = 0, reserved = 0;
@@ -83,16 +90,6 @@ void show_mem(void)
printk("%d pages swap cached\n", cached);
}
-static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
-{
- return pmd_offset(pgd, virt);
-}
-
-static inline pmd_t *pmd_off_k(unsigned long virt)
-{
- return pmd_off(pgd_offset_k(virt), virt);
-}
-
#define for_each_nodebank(iter,mi,no) \
for (iter = 0; iter < mi->nr_banks; iter++) \
if (mi->bank[iter].node == no)
@@ -229,9 +226,6 @@ static __init void reserve_node_zero(pg_data_t *pgdat)
reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size);
}
-void __init build_mem_type_table(void);
-void __init create_mapping(struct map_desc *md);
-
static unsigned long __init
bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
{
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 38769f5862b..ee9647823fa 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -23,6 +23,8 @@
#include <asm/mach/map.h>
+#include "mm.h"
+
#define CPOLICY_UNCACHED 0
#define CPOLICY_BUFFERED 1
#define CPOLICY_WRITETHROUGH 2
@@ -35,8 +37,6 @@ pgprot_t pgprot_kernel;
EXPORT_SYMBOL(pgprot_kernel);
-pmd_t *top_pmd;
-
struct cachepolicy {
const char policy[16];
unsigned int cr_mask;
@@ -142,16 +142,6 @@ __setup("noalign", noalign_setup);
#define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
-static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
-{
- return pmd_offset(pgd, virt);
-}
-
-static inline pmd_t *pmd_off_k(unsigned long virt)
-{
- return pmd_off(pgd_offset_k(virt), virt);
-}
-
/*
* need to get a 16k page for level 1
*/
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
new file mode 100644
index 00000000000..8d73ffbce8d
--- /dev/null
+++ b/arch/arm/mm/mm.h
@@ -0,0 +1,19 @@
+/* the upper-most page table pointer */
+extern pmd_t *top_pmd;
+
+#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
+
+static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
+{
+ return pmd_offset(pgd, virt);
+}
+
+static inline pmd_t *pmd_off_k(unsigned long virt)
+{
+ return pmd_off(pgd_offset_k(virt), virt);
+}
+
+struct map_desc;
+
+void __init build_mem_type_table(void);
+void __init create_mapping(struct map_desc *md);