diff options
Diffstat (limited to 'arch/arm/plat-s3c24xx')
| -rw-r--r-- | arch/arm/plat-s3c24xx/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/plat-s3c24xx/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | 38 |
3 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 5b0bc914f58..aaae456018b 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -105,6 +105,12 @@ config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7 SPI GPIO configuration code for BUS 1 when connected to GPG5, GPG6 and GPG7. +config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10 + bool + help + SPI GPIO configuration code for BUS 1 when connected to + GPD8, GPD9 and GPD10. + # common code for s3c24xx based machines, such as the SMDKs. config MACH_SMDK diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 579a165c282..59416796fb1 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7) += spi-bus1-gpg5_6_7.o +obj-$(CONFIG_S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10) += spi-bus1-gpd8_9_10.o # machine common support diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c new file mode 100644 index 00000000000..89fcf5308cf --- /dev/null +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c @@ -0,0 +1,38 @@ +/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpd8_9_10.c + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX SPI - gpio configuration for bus 1 on gpd8,9,10 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. +*/ + +#include <linux/kernel.h> +#include <linux/gpio.h> + +#include <mach/spi.h> +#include <mach/regs-gpio.h> + +void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, + int enable) +{ + + printk(KERN_INFO "%s(%d)\n", __func__, enable); + if (enable) { + s3c2410_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); + s3c2410_gpio_pullup(S3C2410_GPD(10), 0); + s3c2410_gpio_pullup(S3C2410_GPD(9), 0); + } else { + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPD(10), 1); + s3c2410_gpio_pullup(S3C2410_GPD(9), 1); + s3c2410_gpio_pullup(S3C2410_GPD(8), 1); + } +} |