diff options
Diffstat (limited to 'arch/arm')
790 files changed, 32766 insertions, 8371 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 70dba166890..df39d20f742 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -8,6 +8,7 @@ mainmenu "Linux Kernel Configuration" config ARM bool default y + select HAVE_AOUT select HAVE_IDE select RTC_LIB select SYS_SUPPORTS_APM_EMULATION @@ -140,15 +141,11 @@ config GENERIC_CALIBRATE_DELAY bool default y -config ARCH_SUPPORTS_AOUT - def_bool y - config ARCH_MAY_HAVE_PC_FDC bool config ZONE_DMA bool - default y config GENERIC_ISA_DMA bool @@ -178,6 +175,11 @@ config OPROFILE_MPCORE config OPROFILE_ARM11_CORE bool +config OPROFILE_ARMV7 + def_bool y + depends on CPU_V7 && !SMP + bool + endif config VECTORS_BASE @@ -190,6 +192,8 @@ config VECTORS_BASE source "init/Kconfig" +source "kernel/Kconfig.freezer" + menu "System Type" choice @@ -245,6 +249,7 @@ config ARCH_CLPS7500 select TIMER_ACORN select ISA select NO_IOPORT + select ARCH_SPARSEMEM_ENABLE help Support for the Cirrus Logic PS7500FE system-on-a-chip. @@ -306,6 +311,7 @@ config ARCH_IOP13XX select PLAT_IOP select PCI select ARCH_SUPPORTS_MSI + select VMSPLIT_1G help Support for Intel's IOP13XX (XScale) family of processors. @@ -350,6 +356,7 @@ config ARCH_IXP4XX select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS + select ZONE_DMA if PCI help Support for Intel's IXP4XX (XScale) family of processors. @@ -434,7 +441,7 @@ config ARCH_ORION5X help Support for the following Marvell Orion 5x series SoCs: Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), - Orion-2 (5281). + Orion-2 (5281), Orion-1-90 (6183). config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" @@ -464,6 +471,7 @@ config ARCH_RPC select HAVE_PATA_PLATFORM select ISA_DMA_API select NO_IOPORT + select ARCH_SPARSEMEM_ENABLE help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. @@ -471,9 +479,7 @@ config ARCH_RPC config ARCH_SA1100 bool "SA1100-based" select ISA - select ARCH_DISCONTIGMEM_ENABLE select ARCH_SPARSEMEM_ENABLE - select ARCH_SELECT_MEMORY_MODEL select ARCH_MTD_XIP select GENERIC_GPIO select GENERIC_TIME @@ -497,6 +503,7 @@ config ARCH_SHARK bool "Shark" select ISA select ISA_DMA + select ZONE_DMA select PCI help Support for the StrongARM based Digital DNARD machine, also known @@ -504,6 +511,8 @@ config ARCH_SHARK config ARCH_LH7A40X bool "Sharp LH7A40X" + select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM + select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM help Say Y here for systems based on one of the Sharp LH7A40X System on a Chip processors. These CPUs include an ARM922T @@ -515,7 +524,9 @@ config ARCH_DAVINCI select GENERIC_TIME select GENERIC_CLOCKEVENTS select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB select HAVE_CLK + select ZONE_DMA help Support for TI's DaVinci platform. @@ -734,6 +745,29 @@ config SMP If you don't know what to do here, say N. +choice + prompt "Memory split" + default VMSPLIT_3G + help + Select the desired split between kernel and user memory. + + If you are not absolutely sure what you are doing, leave this + option alone! + + config VMSPLIT_3G + bool "3G/1G user/kernel split" + config VMSPLIT_2G + bool "2G/2G user/kernel split" + config VMSPLIT_1G + bool "1G/3G user/kernel split" +endchoice + +config PAGE_OFFSET + hex + default 0x40000000 if VMSPLIT_1G + default 0x80000000 if VMSPLIT_2G + default 0xC0000000 + config NR_CPUS int "Maximum number of CPUs (2-32)" range 2 32 @@ -815,20 +849,18 @@ config ARCH_FLATMEM_HAS_HOLES default y depends on FLATMEM +# Discontigmem is deprecated config ARCH_DISCONTIGMEM_ENABLE bool - default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) - help - Say Y to support efficient handling of discontiguous physical memory, - for architectures which are either NUMA (Non-Uniform Memory Access) - or have huge holes in the physical address space for other reasons. - See <file:Documentation/vm/numa> for more. config ARCH_SPARSEMEM_ENABLE bool +config ARCH_SPARSEMEM_DEFAULT + def_bool ARCH_SPARSEMEM_ENABLE + config ARCH_SELECT_MEMORY_MODEL - bool + def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE config NODES_SHIFT int @@ -845,7 +877,7 @@ config LEDS ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ - ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ + ARCH_AT91 || ARCH_DAVINCI || \ ARCH_KS8695 || MACH_RD88F5182 help If you say Y here, the LEDs on your machine will be used @@ -1005,9 +1037,9 @@ config ATAGS_PROC endmenu -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) +menu "CPU Power Management" -menu "CPU Frequency scaling" +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) source "drivers/cpufreq/Kconfig" @@ -1047,10 +1079,12 @@ config CPU_FREQ_PXA default y select CPU_FREQ_DEFAULT_GOV_USERSPACE -endmenu - endif +source "drivers/cpuidle/Kconfig" + +endmenu + menu "Floating point emulation" comment "At least one emulation must be selected" @@ -1202,6 +1236,8 @@ source "drivers/power/Kconfig" source "drivers/hwmon/Kconfig" +source "drivers/thermal/Kconfig" + source "drivers/watchdog/Kconfig" source "drivers/ssb/Kconfig" @@ -1222,6 +1258,10 @@ source "drivers/usb/Kconfig" source "drivers/mmc/Kconfig" +source "drivers/memstick/Kconfig" + +source "drivers/accessibility/Kconfig" + source "drivers/leds/Kconfig" source "drivers/rtc/Kconfig" @@ -1230,6 +1270,8 @@ source "drivers/dma/Kconfig" source "drivers/dca/Kconfig" +source "drivers/auxdisplay/Kconfig" + source "drivers/regulator/Kconfig" source "drivers/uio/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 703a44fa0f9..7d5121260fd 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -47,7 +47,7 @@ comma = , # Note that GCC does not numerically define an architecture version # macro, but instead defines a whole series of macros which makes # testing for a specific architecture or later rather impossible. -arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7a,-march=armv5t -Wa$(comma)-march=armv7a) +arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a) arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) # Only override the compiler option if ARMv6. The ARMv6K extensions are # always available in ARMv7 @@ -118,9 +118,10 @@ endif machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx machine-$(CONFIG_ARCH_OMAP1) := omap1 machine-$(CONFIG_ARCH_OMAP2) := omap2 + machine-$(CONFIG_ARCH_OMAP3) := omap2 plat-$(CONFIG_ARCH_OMAP) := omap machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 - plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx + plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_IMX) := imx diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 94462a097f8..7a03f200788 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -76,7 +76,7 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) endif EXTRA_CFLAGS := -fpic -fno-builtin -EXTRA_AFLAGS := +EXTRA_AFLAGS := -Wa,-march=all # Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via # linker symbols. We only define initrd_phys and params_phys if the diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d42f89b7760..84a1e0496a3 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -421,6 +421,7 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size add r1, r1, #1048576 str r1, [r0] mov pc, lr +ENDPROC(__setup_mmu) __armv4_mmu_cache_on: mov r12, lr @@ -801,7 +802,7 @@ loop1: add r2, r2, #4 @ add 4 (line length offset) ldr r4, =0x3ff ands r4, r4, r1, lsr #3 @ find maximum number on the way size - .word 0xe16f5f14 @ clz r5, r4 - find bit position of way size increment + clz r5, r4 @ find bit position of way size increment ldr r7, =0x7fff ands r7, r7, r1, lsr #13 @ extract max number of the index size loop2: diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 3e073467cac..2e32acca02f 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -12,7 +12,8 @@ config ICST307 config SA1111 bool - select DMABOUNCE + select DMABOUNCE if !ARCH_PXA + select ZONE_DMA if !ARCH_PXA config DMABOUNCE bool diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index aecc6c3f908..f030f0775be 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c @@ -154,9 +154,7 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, #endif write_lock_irqsave(&device_info->lock, flags); - list_add(&buf->node, &device_info->safe_buffers); - write_unlock_irqrestore(&device_info->lock, flags); return buf; @@ -205,8 +203,22 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer * /* ************************************************** */ -static inline dma_addr_t -map_single(struct device *dev, void *ptr, size_t size, +static struct safe_buffer *find_safe_buffer_dev(struct device *dev, + dma_addr_t dma_addr, const char *where) +{ + if (!dev || !dev->archdata.dmabounce) + return NULL; + if (dma_mapping_error(dev, dma_addr)) { + if (dev) + dev_err(dev, "Trying to %s invalid mapping\n", where); + else + pr_err("unknown device: Trying to %s invalid mapping\n", where); + return NULL; + } + return find_safe_buffer(dev->archdata.dmabounce, dma_addr); +} + +static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir) { struct dmabounce_device_info *device_info = dev->archdata.dmabounce; @@ -270,33 +282,21 @@ map_single(struct device *dev, void *ptr, size_t size, return dma_addr; } -static inline void -unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction dir) +static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, enum dma_data_direction dir) { - struct dmabounce_device_info *device_info = dev->archdata.dmabounce; - struct safe_buffer *buf = NULL; - - /* - * Trying to unmap an invalid mapping - */ - if (dma_mapping_error(dev, dma_addr)) { - dev_err(dev, "Trying to unmap invalid mapping\n"); - return; - } - - if (device_info) - buf = find_safe_buffer(device_info, dma_addr); + struct safe_buffer *buf = find_safe_buffer_dev(dev, dma_addr, "unmap"); if (buf) { BUG_ON(buf->size != size); + BUG_ON(buf->direction != dir); dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", __func__, buf->ptr, virt_to_dma(dev, buf->ptr), buf->safe, buf->safe_dma_addr); - DO_STATS ( device_info->bounce_count++ ); + DO_STATS(dev->archdata.dmabounce->bounce_count++); if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { void *ptr = buf->ptr; @@ -317,74 +317,7 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, dmac_clean_range(ptr, ptr + size); outer_clean_range(__pa(ptr), __pa(ptr) + size); } - free_safe_buffer(device_info, buf); - } -} - -static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction dir) -{ - struct dmabounce_device_info *device_info = dev->archdata.dmabounce; - struct safe_buffer *buf = NULL; - - if (device_info) - buf = find_safe_buffer(device_info, dma_addr); - - if (buf) { - /* - * Both of these checks from original code need to be - * commented out b/c some drivers rely on the following: - * - * 1) Drivers may map a large chunk of memory into DMA space - * but only sync a small portion of it. Good example is - * allocating a large buffer, mapping it, and then - * breaking it up into small descriptors. No point - * in syncing the whole buffer if you only have to - * touch one descriptor. - * - * 2) Buffers that are mapped as DMA_BIDIRECTIONAL are - * usually only synced in one dir at a time. - * - * See drivers/net/eepro100.c for examples of both cases. - * - * -ds - * - * BUG_ON(buf->size != size); - * BUG_ON(buf->direction != dir); - */ - - dev_dbg(dev, - "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", - __func__, buf->ptr, virt_to_dma(dev, buf->ptr), - buf->safe, buf->safe_dma_addr); - - DO_STATS ( device_info->bounce_count++ ); - - switch (dir) { - case DMA_FROM_DEVICE: - dev_dbg(dev, - "%s: copy back safe %p to unsafe %p size %d\n", - __func__, buf->safe, buf->ptr, size); - memcpy(buf->ptr, buf->safe, size); - break; - case DMA_TO_DEVICE: - dev_dbg(dev, - "%s: copy out unsafe %p to safe %p, size %d\n", - __func__,buf->ptr, buf->safe, size); - memcpy(buf->safe, buf->ptr, size); - break; - case DMA_BIDIRECTIONAL: - BUG(); /* is this allowed? what does it mean? */ - default: - BUG(); - } - /* - * No need to sync the safe buffer - it was allocated - * via the coherent allocators. - */ - return 0; - } else { - return 1; + free_safe_buffer(dev->archdata.dmabounce, buf); } } @@ -396,21 +329,29 @@ static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size, * substitute the safe buffer for the unsafe one. * (basically move the buffer from an unsafe area to a safe one) */ -dma_addr_t -dma_map_single(struct device *dev, void *ptr, size_t size, +dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir) { - dma_addr_t dma_addr; - dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", __func__, ptr, size, dir); - BUG_ON(dir == DMA_NONE); + BUG_ON(!valid_dma_direction(dir)); - dma_addr = map_single(dev, ptr, size, dir); + return map_single(dev, ptr, size, dir); +} +EXPORT_SYMBOL(dma_map_single); - return dma_addr; +dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, enum dma_data_direction dir) +{ + dev_dbg(dev, "%s(page=%p,off=%#lx,size=%zx,dir=%x)\n", + __func__, page, offset, size, dir); + + BUG_ON(!valid_dma_direction(dir)); + + return map_single(dev, page_address(page) + offset, size, dir); } +EXPORT_SYMBOL(dma_map_page); /* * see if a mapped address was really a "safe" buffer and if so, copy @@ -419,126 +360,76 @@ dma_map_single(struct device *dev, void *ptr, size_t size, * should be) */ -void -dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction dir) +void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, + enum dma_data_direction dir) { dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", __func__, (void *) dma_addr, size, dir); - BUG_ON(dir == DMA_NONE); - unmap_single(dev, dma_addr, size, dir); } +EXPORT_SYMBOL(dma_unmap_single); -int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) +int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr, + unsigned long off, size_t sz, enum dma_data_direction dir) { - int i; - - dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", - __func__, sg, nents, dir); - - BUG_ON(dir == DMA_NONE); - - for (i = 0; i < nents; i++, sg++) { - struct page *page = sg_page(sg); - unsigned int offset = sg->offset; - unsigned int length = sg->length; - void *ptr = page_address(page) + offset; + struct safe_buffer *buf; - sg->dma_address = - map_single(dev, ptr, length, dir); - } + dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n", + __func__, addr, off, sz, dir); - return nents; -} - -void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; + buf = find_safe_buffer_dev(dev, addr, __func__); + if (!buf) + return 1; - dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", - __func__, sg, nents, dir); + BUG_ON(buf->direction != dir); - BUG_ON(dir == DMA_NONE); + dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", + __func__, buf->ptr, virt_to_dma(dev, buf->ptr), + buf->safe, buf->safe_dma_addr); - for (i = 0; i < nents; i++, sg++) { - dma_addr_t dma_addr = sg->dma_address; - unsigned int length = sg->length; + DO_STATS(dev->archdata.dmabounce->bounce_count++); - unmap_single(dev, dma_addr, length, dir); + if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { + dev_dbg(dev, "%s: copy back safe %p to unsafe %p size %d\n", + __func__, buf->safe + off, buf->ptr + off, sz); + memcpy(buf->ptr + off, buf->safe + off, sz); } + return 0; } +EXPORT_SYMBOL(dmabounce_sync_for_cpu); -void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_addr, - unsigned long offset, size_t size, - enum dma_data_direction dir) -{ - dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n", - __func__, dma_addr, offset, size, dir); - - if (sync_single(dev, dma_addr, offset + size, dir)) - dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir); -} -EXPORT_SYMBOL(dma_sync_single_range_for_cpu); - -void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_addr, - unsigned long offset, size_t size, - enum dma_data_direction dir) -{ - dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n", - __func__, dma_addr, offset, size, dir); - - if (sync_single(dev, dma_addr, offset + size, dir)) - dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir); -} -EXPORT_SYMBOL(dma_sync_single_range_for_device); - -void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) +int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr, + unsigned long off, size_t sz, enum dma_data_direction dir) { - int i; - - dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", - __func__, sg, nents, dir); - - BUG_ON(dir == DMA_NONE); + struct safe_buffer *buf; - for (i = 0; i < nents; i++, sg++) { - dma_addr_t dma_addr = sg->dma_address; - unsigned int length = sg->length; + dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n", + __func__, addr, off, sz, dir); - sync_single(dev, dma_addr, length, dir); - } -} - -void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; + buf = find_safe_buffer_dev(dev, addr, __func__); + if (!buf) + return 1; - dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n", - __func__, sg, nents, dir); + BUG_ON(buf->direction != dir); - BUG_ON(dir == DMA_NONE); + dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", + __func__, buf->ptr, virt_to_dma(dev, buf->ptr), + buf->safe, buf->safe_dma_addr); - for (i = 0; i < nents; i++, sg++) { - dma_addr_t dma_addr = sg->dma_address; - unsigned int length = sg->length; + DO_STATS(dev->archdata.dmabounce->bounce_count++); - sync_single(dev, dma_addr, length, dir); + if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) { + dev_dbg(dev, "%s: copy out unsafe %p to safe %p, size %d\n", + __func__,buf->ptr + off, buf->safe + off, sz); + memcpy(buf->safe + off, buf->ptr + off, sz); } + return 0; } +EXPORT_SYMBOL(dmabounce_sync_for_device); -static int -dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char *name, - unsigned long size) +static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, + const char *name, unsigned long size) { pool->size = size; DO_STATS(pool->allocs = 0); @@ -549,9 +440,8 @@ dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char return pool->pool ? 0 : -ENOMEM; } -int -dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, - unsigned long large_buffer_size) +int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, + unsigned long large_buffer_size) { struct dmabounce_device_info *device_info; int ret; @@ -607,9 +497,9 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, kfree(device_info); return ret; } +EXPORT_SYMBOL(dmabounce_register_dev); -void -dmabounce_unregister_dev(struct device *dev) +void dmabounce_unregister_dev(struct device *dev) { struct dmabounce_device_info *device_info = dev->archdata.dmabounce; @@ -642,15 +532,6 @@ dmabounce_unregister_dev(struct device *dev) dev_info(dev, "dmabounce: device unregistered\n"); } - - -EXPORT_SYMBOL(dma_map_single); -EXPORT_SYMBOL(dma_unmap_single); -EXPORT_SYMBOL(dma_map_sg); -EXPORT_SYMBOL(dma_unmap_sg); -EXPORT_SYMBOL(dma_sync_sg_for_cpu); -EXPORT_SYMBOL(dma_sync_sg_for_device); -EXPORT_SYMBOL(dmabounce_register_dev); EXPORT_SYMBOL(dmabounce_unregister_dev); MODULE_AUTHOR("Christopher Hoover <ch@hpl.hp.com>, Deepak Saxena <dsaxena@plexity.net>"); diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 0c89bd35e06..7fc9860a97d 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -27,9 +27,9 @@ #include <linux/list.h> #include <linux/smp.h> #include <linux/cpumask.h> +#include <linux/io.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <asm/hardware/gic.h> diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 5fe9588db07..2793447621c 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -66,14 +66,6 @@ static void it8152_unmask_irq(unsigned int irq) } } -static inline void it8152_irq(int irq) -{ - struct irq_desc *desc; - - desc = irq_desc + irq; - desc_handle_irq(irq, desc); -} - static struct irq_chip it8152_irq_chip = { .name = "it8152", .ack = it8152_mask_irq, @@ -128,21 +120,21 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1); while (bits_pd) { i = __ffs(bits_pd); - it8152_irq(IT8152_PD_IRQ(i)); + generic_handle_irq(IT8152_PD_IRQ(i)); bits_pd &= ~(1 << i); } bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1); while (bits_lp) { i = __ffs(bits_lp); - it8152_irq(IT8152_LP_IRQ(i)); + generic_handle_irq(IT8152_LP_IRQ(i)); bits_lp &= ~(1 << i); } bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1); while (bits_ld) { i = __ffs(bits_ld); - it8152_irq(IT8152_LD_IRQ(i)); + generic_handle_irq(IT8152_LD_IRQ(i)); bits_ld &= ~(1 << i); } } diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index 283051eaf93..7c6b4b99a2d 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -24,9 +24,9 @@ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/spinlock.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> @@ -169,7 +169,6 @@ static struct locomo_dev_info locomo_devices[] = { static void locomo_handler(unsigned int irq, struct irq_desc *desc) { int req, i; - struct irq_desc *d; void __iomem *mapbase = get_irq_chip_data(irq); /* Acknowledge the parent IRQ */ @@ -181,10 +180,9 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) if (req) { /* generate the next interrupt(s) */ irq = LOCOMO_IRQ_START; - d = irq_desc + irq; - for (i = 0; i <= 3; i++, d++, irq++) { + for (i = 0; i <= 3; i++, irq++) { if (req & (0x0100 << i)) { - desc_handle_irq(irq, d); + generic_handle_irq(irq); } } @@ -222,12 +220,10 @@ static struct irq_chip locomo_chip = { static void locomo_key_handler(unsigned int irq, struct irq_desc *desc) { - struct irq_desc *d; void __iomem *mapbase = get_irq_chip_data(irq); if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { - d = irq_desc + LOCOMO_IRQ_KEY_START; - desc_handle_irq(LOCOMO_IRQ_KEY_START, d); + generic_handle_irq(LOCOMO_IRQ_KEY_START); } } @@ -268,7 +264,6 @@ static struct irq_chip locomo_key_chip = { static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) { int req, i; - struct irq_desc *d; void __iomem *mapbase = get_irq_chip_data(irq); req = locomo_readl(mapbase + LOCOMO_GIR) & @@ -277,10 +272,9 @@ static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc) if (req) { irq = LOCOMO_IRQ_GPIO_START; - d = irq_desc + LOCOMO_IRQ_GPIO_START; - for (i = 0; i <= 15; i++, irq++, d++) { + for (i = 0; i <= 15; i++, irq++) { if (req & (0x0001 << i)) { - desc_handle_irq(irq, d); + generic_handle_irq(irq); } } } @@ -361,12 +355,10 @@ static struct irq_chip locomo_gpio_chip = { static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) { - struct irq_desc *d; void __iomem *mapbase = get_irq_chip_data(irq); if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { - d = irq_desc + LOCOMO_IRQ_LT_START; - desc_handle_irq(LOCOMO_IRQ_LT_START, d); + generic_handle_irq(LOCOMO_IRQ_LT_START); } } @@ -407,17 +399,15 @@ static struct irq_chip locomo_lt_chip = { static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc) { int req, i; - struct irq_desc *d; void __iomem *mapbase = get_irq_chip_data(irq); req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F; if (req) { irq = LOCOMO_IRQ_SPI_START; - d = irq_desc + irq; - for (i = 0; i <= 3; i++, irq++, d++) { + for (i = 0; i <= 3; i++, irq++) { if (req & (0x0001 << i)) { - desc_handle_irq(irq, d); + generic_handle_irq(irq); } } } diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index ec8a5471bf0..fb86f248aab 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -25,10 +25,10 @@ #include <linux/spinlock.h> #include <linux/dma-mapping.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/sizes.h> diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index ae39553589d..697c6491399 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c @@ -15,7 +15,7 @@ #include <linux/string.h> #include <linux/slab.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/gpio.h> #include <asm/hardware/scoop.h> diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c index aad4d94ba8f..d56c932580e 100644 --- a/arch/arm/common/sharpsl_param.c +++ b/arch/arm/common/sharpsl_param.c @@ -12,6 +12,7 @@ */ #include <linux/kernel.h> +#include <linux/module.h> #include <linux/string.h> #include <asm/mach/sharpsl_param.h> @@ -36,6 +37,7 @@ #define PHAD_MAGIC MAGIC_CHG('P','H','A','D') struct sharpsl_param_info sharpsl_param; +EXPORT_SYMBOL(sharpsl_param); void sharpsl_save_param(void) { diff --git a/arch/arm/common/time-acorn.c b/arch/arm/common/time-acorn.c index df0983aafe6..deeed561b16 100644 --- a/arch/arm/common/time-acorn.c +++ b/arch/arm/common/time-acorn.c @@ -17,9 +17,9 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/hardware/ioc.h> #include <asm/mach/time.h> diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c index 7ecd3c0ab01..b520e56216a 100644 --- a/arch/arm/common/uengine.c +++ b/arch/arm/common/uengine.c @@ -16,9 +16,9 @@ #include <linux/slab.h> #include <linux/module.h> #include <linux/string.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/hardware/uengine.h> -#include <asm/io.h> #if defined(CONFIG_ARCH_IXP2000) #define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c index 79a8206e62a..8421d39109b 100644 --- a/arch/arm/common/via82c505.c +++ b/arch/arm/common/via82c505.c @@ -4,8 +4,8 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/ioport.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/system.h> #include <asm/mach/pci.h> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index c026fa2214a..f1e4b8f60ca 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -20,8 +20,8 @@ */ #include <linux/init.h> #include <linux/list.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <asm/hardware/vic.h> diff --git a/arch/arm/configs/afeb9260_defconfig b/arch/arm/configs/afeb9260_defconfig new file mode 100644 index 00000000000..ce909586a34 --- /dev/null +++ b/arch/arm/configs/afeb9260_defconfig @@ -0,0 +1,1259 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc2 +# Tue Aug 12 22:30:16 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +CONFIG_ARCH_AT91SAM9260=y +# CONFIG_ARCH_AT91SAM9261 is not set +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91SAM9G20 is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9260 Variants +# +# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set + +# +# AT91SAM9260 / AT91SAM9XE Board Type +# +# CONFIG_MACH_AT91SAM9260EK is not set +# CONFIG_MACH_CAM60 is not set +# CONFIG_MACH_SAM9_L9260 is not set +CONFIG_MACH_AFEB9260=y +# CONFIG_MACH_USB_A9260 is not set +# CONFIG_MACH_QIL_A9260 is not set + +# +# AT91 Board Options +# + +# +# AT91 Feature Selections +# +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_ATMEL=y +# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set +CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y +# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ATMEL_PWM is not set +# CONFIG_ATMEL_TCLIB is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +CONFIG_SERIAL_ATMEL_PDC=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_GPIO=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +CONFIG_AT24=y +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_DEBUG=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_FM3130=y + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_AT91SAM9 is not set +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rlek_defconfig index 1c76642272a..811bebbdc78 100644 --- a/arch/arm/configs/at91sam9rlek_defconfig +++ b/arch/arm/configs/at91sam9rlek_defconfig @@ -496,6 +496,7 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y # CONFIG_TOUCHSCREEN_UCB1400 is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_INPUT_MISC is not set diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig new file mode 100644 index 00000000000..46f1c9dc350 --- /dev/null +++ b/arch/arm/configs/cm_x300_defconfig @@ -0,0 +1,1466 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc3 +# Tue Aug 19 11:26:54 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-cm-x300" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# + +# +# Supported PXA3xx Processor Variants +# +CONFIG_CPU_PXA300=y +# CONFIG_CPU_PXA310 is not set +# CONFIG_CPU_PXA320 is not set +# CONFIG_CPU_PXA930 is not set +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +CONFIG_MACH_CM_X300=y +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set +CONFIG_PXA3xx=y +# CONFIG_PXA_PWM is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSC3=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_IO_36=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_XSC3L2=y +CONFIG_IWMMXT=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_SHARPSL is not set +CONFIG_MTD_NAND_PXA3xx=y +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +CONFIG_DM9000=y +CONFIG_DM9000_DEBUGLEVEL=0 +CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +CONFIG_LIBERTAS=m +# CONFIG_LIBERTAS_USB is not set +CONFIG_LIBERTAS_SDIO=m +# CONFIG_LIBERTAS_DEBUG is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_HOSTAP is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_PXA27x=m +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set +# CONFIG_FB_W100 is not set +# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +CONFIG_FONT_6x11=y +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +# CONFIG_SND_PXA2XX_AC97 is not set +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=m +CONFIG_SND_PXA2XX_SOC=m +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_SIERRA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_PXA=m +# CONFIG_MMC_SDHCI is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_PCA955X is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=y +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/jornada720_defconfig b/arch/arm/configs/jornada720_defconfig index 0c556289a3f..81fadafae02 100644 --- a/arch/arm/configs/jornada720_defconfig +++ b/arch/arm/configs/jornada720_defconfig @@ -1,84 +1,174 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.12-rc1-bk2 -# Sun Mar 27 23:10:35 2005 +# Linux kernel version: 2.6.27-rc6 +# Tue Sep 16 18:56:58 2008 # CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y -CONFIG_UID16=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_IOMAP=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# +CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y +# CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set -CONFIG_HOTPLUG=y -CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set # CONFIG_MODULE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP3XX is not set -# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set CONFIG_ARCH_SA1100=y # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_MSM7X00A is not set +CONFIG_DMABOUNCE=y # # SA11x0 Implementations @@ -91,12 +181,21 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set CONFIG_SA1100_JORNADA720=y +CONFIG_SA1100_JORNADA720_SSP=y # CONFIG_SA1100_HACKKIT is not set # CONFIG_SA1100_LART is not set # CONFIG_SA1100_PLEB is not set # CONFIG_SA1100_SHANNON is not set # CONFIG_SA1100_SIMPAD is not set -# CONFIG_SA1100_SSP is not set +CONFIG_SA1100_SSP=y + +# +# Boot options +# + +# +# Power management +# # # Processor Type @@ -105,44 +204,71 @@ CONFIG_CPU_32=y CONFIG_CPU_SA1100=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_V4WB=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WB=y -CONFIG_CPU_MINICACHE=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y # # Processor Features # +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set CONFIG_SA1111=y -CONFIG_DMABOUNCE=y CONFIG_FORCE_MAX_ZONEORDER=9 # # Bus support # CONFIG_ISA=y - -# -# PCCARD (PCMCIA/CardBus) support -# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCCARD=y # CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y # # PC-card bridges # -CONFIG_I82365=y +# CONFIG_I82365 is not set # CONFIG_TCIC is not set CONFIG_PCMCIA_SA1100=y # CONFIG_PCMCIA_SA1111 is not set -CONFIG_PCCARD_NONSTATIC=y # # Kernel Features # +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_PREEMPT is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +CONFIG_ARCH_DISCONTIGMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_NODES_SHIFT=2 +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_DISCONTIGMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set CONFIG_DISCONTIGMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_NEED_MULTIPLE_NODES=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y # CONFIG_LEDS is not set CONFIG_ALIGNMENT_TRAP=y @@ -151,8 +277,9 @@ CONFIG_ALIGNMENT_TRAP=y # CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="keepinitrd mem=32M" +CONFIG_CMDLINE="" # CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set # # CPU Frequency scaling @@ -174,7 +301,7 @@ CONFIG_FPE_FASTFPE=y # Userspace binary formats # CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_AOUT=y # CONFIG_BINFMT_MISC is not set # CONFIG_ARTHUR is not set @@ -182,188 +309,12 @@ CONFIG_BINFMT_AOUT=m # Power management options # CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_APM is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -CONFIG_MTD_DEBUG=y -CONFIG_MTD_DEBUG_VERBOSE=1 -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=m -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_GEOMETRY=y -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_XIP is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_ARM_INTEGRATOR is not set -CONFIG_MTD_SA1100=y -# CONFIG_MTD_EDB7312 is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=m -CONFIG_BLK_DEV_IDE=m - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=m -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -CONFIG_BLK_DEV_IDECD=m -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_IDE_TASK_IOCTL is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=m -# CONFIG_IDE_ARM is not set -# CONFIG_IDE_CHIPSETS is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Networking support -# +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_NET=y # @@ -371,12 +322,17 @@ CONFIG_NET=y # CONFIG_PACKET=y CONFIG_PACKET_MMAP=y -# CONFIG_NETLINK_DEV is not set CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set @@ -386,31 +342,42 @@ CONFIG_IP_MULTICAST=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set -# CONFIG_IP_TCPDIAG is not set -# CONFIG_IP_TCPDIAG_IPV6 is not set - -# -# IP: Virtual Server Configuration -# +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set # CONFIG_IP_VS is not set # CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_XTABLES is not set # # IP: Netfilter Configuration # -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_CONNTRACK_MARK is not set # CONFIG_IP_NF_QUEUE is not set # CONFIG_IP_NF_IPTABLES is not set # CONFIG_IP_NF_ARPTABLES is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# +# CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set @@ -420,30 +387,22 @@ CONFIG_NETFILTER=y # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set # # Network testing # # CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set CONFIG_IRDA=m # # IrDA protocols # CONFIG_IRLAN=m -# CONFIG_IRNET is not set CONFIG_IRCOMM=m # CONFIG_IRDA_ULTRA is not set @@ -468,89 +427,105 @@ CONFIG_IRCOMM=m # # -# Old SIR device drivers -# -# CONFIG_IRPORT_SIR is not set - -# -# Old Serial dongle support -# - -# # FIR device drivers # -# CONFIG_NSC_FIR is not set -# CONFIG_WINBOND_FIR is not set -# CONFIG_SMC_IRCC_FIR is not set -# CONFIG_ALI_FIR is not set CONFIG_SA1100_FIR=m # CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -# CONFIG_NET_ETHERNET is not set -CONFIG_MII=m +# CONFIG_AF_RXRPC is not set # -# Ethernet (1000 Mbit) +# Wireless # +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) +# Device Drivers # -CONFIG_NET_RADIO=y # -# Obsolete Wireless cards support (pre-802.11) +# Generic Driver Options # -# CONFIG_STRIP is not set -CONFIG_ARLAN=m -CONFIG_WAVELAN=m -CONFIG_PCMCIA_WAVELAN=m -# CONFIG_PCMCIA_NETWAVE is not set +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +# CONFIG_PNP is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y # -# Wireless 802.11 Frequency Hopping cards support +# Please see Documentation/ide/ide.txt for help/info on IDE drives # -# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y # -# Wireless 802.11b ISA/PCI cards support +# IDE chipset support/bugfixes # -CONFIG_HERMES=m -# CONFIG_ATMEL is not set +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEDMA is not set # -# Wireless 802.11b Pcmcia/Cardbus cards support +# SCSI device support # -CONFIG_PCMCIA_HERMES=m -CONFIG_AIRO_CS=m -# CONFIG_PCMCIA_WL3501 is not set -CONFIG_NET_WIRELESS=y +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_MII=m +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set # -# PCMCIA network device support +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set CONFIG_NET_PCMCIA=y CONFIG_PCMCIA_3C589=m CONFIG_PCMCIA_3C574=m @@ -560,32 +535,20 @@ CONFIG_PCMCIA_NMCLAN=m CONFIG_PCMCIA_SMC91C92=m CONFIG_PCMCIA_XIRC2PS=m CONFIG_PCMCIA_AXNET=m - -# -# Wan interfaces -# # CONFIG_WAN is not set -CONFIG_PPP=m -# CONFIG_PPP_MULTILINK is not set -# CONFIG_PPP_FILTER is not set -CONFIG_PPP_ASYNC=m -# CONFIG_PPP_SYNC_TTY is not set -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -# CONFIG_PPPOE is not set +# CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces @@ -595,7 +558,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -603,20 +565,31 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_INPORT is not set -# CONFIG_MOUSE_LOGIBM is not set -# CONFIG_MOUSE_PC110PAD is not set -# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_HP7XX=y +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_HP7XX=y +# CONFIG_TOUCHSCREEN_HTCPEN is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_INPUT_MISC is not set # @@ -625,17 +598,18 @@ CONFIG_MOUSE_PS2=y CONFIG_SERIO=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_SA1111 is not set -CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y # # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -652,69 +626,120 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_LEGACY_PTY_COUNT=32 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set # -# IPMI +# PCMCIA character devices # -# CONFIG_IPMI_HANDLER is not set +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set # -# Watchdog Cards +# I2C GPIO expanders: # -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set # -# Ftape, the floppy tape device driver +# PCI GPIO expanders: # -# CONFIG_DRM is not set # -# PCMCIA character devices +# SPI GPIO expanders: # -# CONFIG_SYNCLINK_CS is not set -# CONFIG_RAW_DRIVER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set # -# TPM devices +# Sonics Silicon Backplane # -# CONFIG_TCG_TPM is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# I2C support +# Multifunction device drivers # -# CONFIG_I2C is not set +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set # -# Misc devices +# Multimedia Capabilities Port drivers # +# CONFIG_MCP_SA11X0 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # -# Digital Video Broadcasting Devices +# Multimedia drivers # -# CONFIG_DVB is not set +# CONFIG_DAB is not set # # Graphics support # +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y -# CONFIG_FB_CFB_FILLRECT is not set -# CONFIG_FB_CFB_COPYAREA is not set -# CONFIG_FB_CFB_IMAGEBLIT is not set -# CONFIG_FB_SOFT_CURSOR is not set +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# # CONFIG_FB_SA1100 is not set +CONFIG_FB_S1D13XXX=y # CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -722,94 +747,110 @@ CONFIG_FB=y # CONFIG_VGA_CONSOLE is not set # CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set - -# -# Logo configuration -# +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y # CONFIG_LOGO is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -CONFIG_SOUND=m +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set # -# Advanced Linux Sound Architecture +# RTC interfaces # -# CONFIG_SND is not set +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # -# Open Sound System +# SPI RTC drivers # -# CONFIG_SOUND_PRIME is not set # -# USB support +# Platform RTC drivers # -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set # -# USB Gadget Support +# on-CPU RTC drivers # -# CONFIG_USB_GADGET is not set +CONFIG_RTC_DRV_SA1100=y +# CONFIG_DMADEVICES is not set # -# MMC/SD Card support +# Voltage and Current regulators # -# CONFIG_MMC is not set +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set # # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set +# CONFIG_EXT4DEV_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set - -# -# XFS support -# +# CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set +# CONFIG_OCFS2_FS is not set CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set # # CD-ROM/DVD Filesystems # -CONFIG_ISO9660_FS=m -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set +# CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_NTFS_FS is not set # # Pseudo filesystems # CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -CONFIG_DEVFS_DEBUG=y -# CONFIG_DEVPTS_FS_XATTR is not set # CONFIG_TMPFS is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -821,75 +862,122 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=2 -# CONFIG_JFFS2_FS_NAND is not set -# CONFIG_JFFS2_FS_NOR_ECC is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_LOCKD=m -CONFIG_LOCKD_V4=y -CONFIG_SUNRPC=m -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set -CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set -CONFIG_DEBUG_SLAB=y +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set # CONFIG_DEBUG_USER is not set CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -898,21 +986,100 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set # -# Cryptographic options +# Ciphers # -# CONFIG_CRYPTO is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # -# Hardware crypto devices +# Compression # +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y # # Library routines # +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig new file mode 100644 index 00000000000..e042d27eae1 --- /dev/null +++ b/arch/arm/configs/omap3_beagle_defconfig @@ -0,0 +1,1321 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc8 +# Wed Oct 1 17:14:22 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +# CONFIG_OMAP_MUX is not set +# CONFIG_OMAP_MCBSP is not set +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +CONFIG_MACH_OMAP3_BEAGLE=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +# CONFIG_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# OMAP 343x high speed USB support +# +CONFIG_USB_MUSB_HOST=y +# CONFIG_USB_MUSB_PERIPHERAL is not set +# CONFIG_USB_MUSB_OTG is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_INVENTRA_DMA=y +# CONFIG_USB_TI_CPPI_DMA is not set +# CONFIG_USB_MUSB_DEBUG is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA25X is not set +CONFIG_USB_GADGET_M66592=y +CONFIG_USB_M66592=y +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig new file mode 100644 index 00000000000..948a212fb1c --- /dev/null +++ b/arch/arm/configs/omap_ldp_defconfig @@ -0,0 +1,1044 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc5 +# Fri Oct 10 11:49:41 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +CONFIG_OMAP_MUX=y +CONFIG_OMAP_MUX_DEBUG=y +CONFIG_OMAP_MUX_WARNINGS=y +CONFIG_OMAP_MCBSP=y +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_OMAP_SERIAL_WAKE=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +# CONFIG_MACH_OMAP3_BEAGLE is not set +CONFIG_MACH_OMAP_LDP=y +# CONFIG_MACH_OVERO is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +# CONFIG_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_OMAP24XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +CONFIG_W1=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2760 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MMC_SPI is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig index 4017d83c9d2..b2456ca544c 100644 --- a/arch/arm/configs/orion5x_defconfig +++ b/arch/arm/configs/orion5x_defconfig @@ -176,14 +176,17 @@ CONFIG_MACH_KUROBOX_PRO=y CONFIG_MACH_DNS323=y CONFIG_MACH_TS209=y CONFIG_MACH_LINKSTATION_PRO=y +CONFIG_MACH_LINKSTATION_MINI=y CONFIG_MACH_TS409=y CONFIG_MACH_WRT350N_V2=y CONFIG_MACH_TS78XX=y CONFIG_MACH_MV2120=y +CONFIG_MACH_EDMINI_V2=y CONFIG_MACH_MSS2=y CONFIG_MACH_WNR854T=y CONFIG_MACH_RD88F5181L_GE=y CONFIG_MACH_RD88F5181L_FXO=y +CONFIG_MACH_RD88F6183AP_GE=y # # Boot options diff --git a/arch/arm/configs/overo_defconfig b/arch/arm/configs/overo_defconfig new file mode 100644 index 00000000000..49200967a15 --- /dev/null +++ b/arch/arm/configs/overo_defconfig @@ -0,0 +1,1885 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc8 +# Fri Oct 3 11:50:34 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_OPROFILE_ARMV7=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +# CONFIG_ELF_CORE is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_LSF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +# CONFIG_OMAP_MUX is not set +CONFIG_OMAP_MCBSP=y +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +# CONFIG_MACH_OMAP3_BEAGLE is not set +CONFIG_MACH_OVERO=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_LEDS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" debug " +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_DEFAULT_PID=y +CONFIG_MAC80211_RC_DEFAULT="pid" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=y +CONFIG_IEEE80211_CRYPT_CCMP=y +CONFIG_IEEE80211_CRYPT_TKIP=y +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +CONFIG_EEPROM_93CX6=m +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID5_RESHAPE=y +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_DELAY=m +# CONFIG_DM_UEVENT is not set +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_MII=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +CONFIG_LIBERTAS=y +CONFIG_LIBERTAS_USB=y +CONFIG_LIBERTAS_SDIO=y +CONFIG_LIBERTAS_DEBUG=y +CONFIG_USB_ZD1201=m +# CONFIG_USB_NET_RNDIS_WLAN is not set +CONFIG_RTL8187=m +# CONFIG_MAC80211_HWSIM is not set +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +# CONFIG_IWLWIFI_LEDS is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_CDCETHER=y +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GPIO is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +CONFIG_SENSORS_EEPROM=y +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_OMAP24XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=m +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_DVB_CORE=m +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX2341X=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_VIDEO_AU0828 is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +# CONFIG_USB_GSPCA is not set +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +# CONFIG_VIDEO_EM28XX is not set +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +# CONFIG_USB_ET61X251 is not set +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +# CONFIG_USB_ZC0301 is not set +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +CONFIG_DVB_CAPTURE_DRIVERS=y +# CONFIG_TTPCI_EEPROM is not set + +# +# Supported USB Adapters +# +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_CXUSB=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +# CONFIG_DVB_USB_DW2102 is not set +# CONFIG_DVB_USB_ANYSEE is not set +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_CINERGYT2=m +# CONFIG_DVB_CINERGYT2_TUNING is not set +# CONFIG_DVB_SIANO_SMS1XXX is not set + +# +# Supported FlexCopII (B2C2) Adapters +# +# CONFIG_DVB_B2C2_FLEXCOP is not set + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_FE_CUSTOMISE is not set + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +# CONFIG_DVB_DRX397XD is not set +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_TDA10048=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_S5H1411=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_LNBP21=m +# CONFIG_DVB_ISL6405 is not set +CONFIG_DVB_ISL6421=m +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=y + +# +# Display hardware drivers +# + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +# CONFIG_SND_PCM_XRUN_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_SOC=y +CONFIG_SND_OMAP_SOC=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# OMAP 343x high speed USB support +# +CONFIG_USB_MUSB_HOST=y +# CONFIG_USB_MUSB_PERIPHERAL is not set +# CONFIG_USB_MUSB_OTG is not set +CONFIG_USB_MUSB_HDRC_HCD=y +CONFIG_MUSB_PIO_ONLY=y +# CONFIG_USB_MUSB_DEBUG is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +# CONFIG_USB_BERRY_CHARGE is not set +CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=y +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_PCA955X is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_RUBIN=y +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_CRYPTD=m +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig new file mode 100644 index 00000000000..3245f8f33e0 --- /dev/null +++ b/arch/arm/configs/palmz72_defconfig @@ -0,0 +1,951 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc4 +# Sun Aug 24 02:29:27 2008 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +CONFIG_ARCH_PXA_PALM=y +# CONFIG_MACH_PALMTX is not set +CONFIG_MACH_PALMZ72=y +# CONFIG_PXA_EZX is not set +CONFIG_PXA27x=y +CONFIG_PXA_PWM=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_NETDEVICES is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_PXA27x=y +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_PXA is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_PXA2XX is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PDA_POWER=y +# CONFIG_APM_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set +# CONFIG_FB_W100 is not set +# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_PWM=y + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=y + +# +# Display hardware drivers +# + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +CONFIG_MMC_DEBUG=y +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_PXA=y +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=y +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=866 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +CONFIG_NLS_CODEPAGE_866=y +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_FRAME_POINTER=y +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig new file mode 100644 index 00000000000..d01fecb8673 --- /dev/null +++ b/arch/arm/configs/viper_defconfig @@ -0,0 +1,1678 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc4 +# Thu Aug 21 17:12:07 2008 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=13 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +# CONFIG_ELF_CORE is not set +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_SHMEM is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_TINY_SHMEM=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +CONFIG_ARCH_VIPER=y +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set +CONFIG_PXA25x=y +CONFIG_PXA_PWM=m +CONFIG_PXA_HAVE_ISA_IRQS=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +CONFIG_ISA=y +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PXA2XX=m +CONFIG_PCMCIA_PROBE=y + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=m +CONFIG_CPU_FREQ_GOV_ONDEMAND=m +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_PXA=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +# CONFIG_BT_SCO is not set +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +# CONFIG_BT_HIDP is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +# CONFIG_BT_HCIUSB_SCO is not set +# CONFIG_BT_HCIBTUSB is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIDTL1 is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBTUART is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x8000000 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +CONFIG_MTD_PXA2XX=y +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set +CONFIG_MTD_SPARSE_RAM=y + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +# CONFIG_PNP is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_PATA_PCMCIA=m +# CONFIG_PATA_QDI is not set +# CONFIG_PATA_WINBOND_VLB is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_SMC is not set +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +# CONFIG_PCMCIA_PCNET is not set +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=m +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_FUJITSU=m +# CONFIG_TOUCHSCREEN_GUNZE is not set +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_INEXIO=m +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_HTCPEN=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +# CONFIG_CONSOLE_TRANSLATIONS is not set +# CONFIG_VT_CONSOLE is not set +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=m +# CONFIG_SERIAL_8250_CS is not set +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_HELPER_AUTO is not set + +# +# I2C Algorithms +# +CONFIG_I2C_ALGOBIT=y +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_GPIO=y +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_ELEKTOR is not set +# CONFIG_I2C_PCA_ISA is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_SA1100_WATCHDOG is not set + +# +# ISA-based Watchdog Cards +# +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=m +CONFIG_FB_CFB_COPYAREA=m +CONFIG_FB_CFB_IMAGEBLIT=m +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=m +# CONFIG_FB_PXA_SMARTPANEL is not set +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_W100 is not set +# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=m +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_PWM=m + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=m +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_ARM=y +CONFIG_SND_PXA2XX_PCM=m +CONFIG_SND_PXA2XX_AC97=m +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_PCMCIA=y +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_ISP116X_HCD=m +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_SL811_HCD=m +# CONFIG_USB_SL811_CS is not set +CONFIG_USB_R8A66597_HCD=m +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_SIERRA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_EZUSB is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +CONFIG_USB_GADGET_PXA25X=y +CONFIG_USB_PXA25X=m +# CONFIG_USB_PXA25X_SMALL is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_USB_G_PRINTER=m +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=m + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=m +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=m +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=m +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/xm_x270_defconfig b/arch/arm/configs/xm_x2xx_defconfig index aa40d91ce59..f891364dece 100644 --- a/arch/arm/configs/xm_x270_defconfig +++ b/arch/arm/configs/xm_x2xx_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25 -# Sun May 11 15:12:52 2008 +# Linux kernel version: 2.6.27-rc8 +# Sun Oct 5 11:05:36 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -12,6 +12,7 @@ CONFIG_MMU=y # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_HARDIRQS=y CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y @@ -24,6 +25,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_ZONE_DMA=y CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -62,7 +64,6 @@ CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y -CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set @@ -88,14 +89,21 @@ CONFIG_SLUB=y # CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set # CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y # CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set @@ -106,6 +114,7 @@ CONFIG_BLOCK=y # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set # CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers @@ -131,7 +140,6 @@ CONFIG_CLASSIC_RCU=y # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set @@ -145,8 +153,11 @@ CONFIG_CLASSIC_RCU=y # CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set # CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set # CONFIG_ARCH_MXC is not set # CONFIG_ARCH_ORION5X is not set # CONFIG_ARCH_PNX4008 is not set @@ -164,26 +175,32 @@ CONFIG_DMABOUNCE=y # # Intel PXA2xx/PXA3xx Implementations # - -# -# Select target boards -# # CONFIG_ARCH_GUMSTIX is not set # CONFIG_ARCH_LUBBOCK is not set # CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set +# CONFIG_MACH_MP900C is not set # CONFIG_ARCH_PXA_IDP is not set # CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_VIPER is not set # CONFIG_ARCH_PXA_ESERIES is not set -# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_TRIZEPS_PXA is not set CONFIG_MACH_EM_X270=y # CONFIG_MACH_COLIBRI is not set # CONFIG_MACH_ZYLONITE is not set # CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set CONFIG_MACH_ARMCORE=y +# CONFIG_MACH_CM_X300 is not set # CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_MIOA701 is not set # CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set +CONFIG_PXA25x=y CONFIG_PXA27x=y +CONFIG_PXA_SSP=y # CONFIG_PXA_PWM is not set # @@ -253,11 +270,17 @@ CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y # CONFIG_HIGH_RES_TIMERS is not set CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 # CONFIG_PREEMPT is not set CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -284,9 +307,10 @@ CONFIG_CMDLINE="root=1f03 mem=32M" # CONFIG_KEXEC is not set # -# CPU Frequency scaling +# CPU Power Management # # CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set # # Floating point emulation @@ -316,10 +340,6 @@ CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_APM_EMULATION=m CONFIG_ARCH_SUSPEND_POSSIBLE=y - -# -# Networking -# CONFIG_NET=y # @@ -402,6 +422,7 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HCIUSB=m CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTUSB is not set # CONFIG_BT_HCIBTSDIO is not set # CONFIG_BT_HCIUART is not set # CONFIG_BT_HCIBCM203X is not set @@ -419,6 +440,7 @@ CONFIG_BT_HCIUSB_SCO=y # # CONFIG_CFG80211 is not set CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y # CONFIG_MAC80211 is not set # CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set @@ -435,6 +457,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=m +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set @@ -527,6 +551,7 @@ CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_ECC_SMC is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_GPIO=m CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_SHARPSL is not set @@ -636,6 +661,7 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set CONFIG_ATA=m # CONFIG_ATA_NONSTANDARD is not set # CONFIG_SATA_PMP is not set @@ -696,17 +722,21 @@ CONFIG_PATA_PCMCIA=m # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set # CONFIG_MD is not set # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # + +# +# Enable only one of the two stacks, unless you know what you are doing +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set @@ -725,6 +755,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set CONFIG_DM9000=y CONFIG_DM9000_DEBUGLEVEL=1 +# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set # CONFIG_SMC911X is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set @@ -780,7 +811,6 @@ CONFIG_LIBERTAS_SDIO=m # CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set # CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_IWLWIFI is not set # CONFIG_IWLWIFI_LEDS is not set # CONFIG_HOSTAP is not set @@ -853,17 +883,18 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set -CONFIG_TOUCHSCREEN_UCB1400=m CONFIG_TOUCHSCREEN_WM97XX=m # CONFIG_TOUCHSCREEN_WM9705 is not set CONFIG_TOUCHSCREEN_WM9712=y # CONFIG_TOUCHSCREEN_WM9713 is not set # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_INPUT_MISC is not set # @@ -880,6 +911,7 @@ CONFIG_SERIO_LIBPS2=y # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set @@ -922,45 +954,66 @@ CONFIG_DEVPORT=y CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=m +CONFIG_I2C_HELPER_AUTO=y # # I2C Hardware Bus support # + +# +# PC SMBus host controller drivers +# # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_GPIO is not set # CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -CONFIG_I2C_PXA=y -# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_ISCH is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_TINY_USB is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Graphics adapter I2C/DDC channel drivers +# # CONFIG_I2C_VOODOO3 is not set + +# +# Other I2C/SMBus bus drivers +# # CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set # # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set +# CONFIG_AT24 is not set # CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_TPS65010 is not set # CONFIG_SENSORS_MAX6875 is not set @@ -970,25 +1023,31 @@ CONFIG_I2C_PXA=y # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set # CONFIG_SPI is not set -CONFIG_HAVE_GPIO_LIB=y - -# -# GPIO Support -# +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y # CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set # # I2C GPIO expanders: # +# CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCF857X is not set # +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set + +# # SPI GPIO expanders: # # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set # @@ -1000,10 +1059,16 @@ CONFIG_SSB_POSSIBLE=y # # Multifunction device drivers # +# CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_ASIC3 is not set # CONFIG_HTC_EGPIO is not set # CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set # # Multimedia devices @@ -1014,6 +1079,7 @@ CONFIG_SSB_POSSIBLE=y # # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # # Multimedia drivers @@ -1038,7 +1104,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_SYS_IMAGEBLIT is not set # CONFIG_FB_FOREIGN_ENDIAN is not set # CONFIG_FB_SYS_FOPS is not set -CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set @@ -1071,12 +1136,14 @@ CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_TRIDENT is not set # CONFIG_FB_ARK is not set # CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set CONFIG_FB_PXA=y # CONFIG_FB_PXA_SMARTPANEL is not set CONFIG_FB_PXA_PARAMETERS=y CONFIG_FB_MBX=m -# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_W100 is not set # CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # @@ -1099,15 +1166,7 @@ CONFIG_LOGO=y CONFIG_LOGO_LINUX_MONO=y CONFIG_LOGO_LINUX_VGA16=y CONFIG_LOGO_LINUX_CLUT224=y - -# -# Sound -# CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -1121,19 +1180,15 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# +CONFIG_SND_VMASTER=y CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set - -# -# PCI devices -# +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set # CONFIG_SND_ALS300 is not set # CONFIG_SND_ALI5451 is not set @@ -1193,42 +1248,16 @@ CONFIG_SND_AC97_CODEC=m # CONFIG_SND_VIRTUOSO is not set # CONFIG_SND_VX222 is not set # CONFIG_SND_YMFPCI is not set -# CONFIG_SND_AC97_POWER_SAVE is not set - -# -# ALSA ARM devices -# +CONFIG_SND_ARM=y CONFIG_SND_PXA2XX_PCM=m CONFIG_SND_PXA2XX_AC97=m - -# -# USB devices -# +CONFIG_SND_USB=y # CONFIG_SND_USB_AUDIO is not set # CONFIG_SND_USB_CAIAQ is not set - -# -# PCMCIA devices -# +CONFIG_SND_PCMCIA=y # CONFIG_SND_VXPOCKET is not set # CONFIG_SND_PDAUDIOCF is not set - -# -# System on Chip audio support -# # CONFIG_SND_SOC is not set - -# -# ALSA SoC audio for Freescale SOCs -# - -# -# SoC Audio for the Texas Instruments OMAP -# - -# -# Open Sound System -# # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m CONFIG_HID_SUPPORT=y @@ -1261,12 +1290,15 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_EHCI_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set @@ -1274,12 +1306,14 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set # # USB Device Class drivers # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1309,7 +1343,6 @@ CONFIG_USB_STORAGE=y # # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set -CONFIG_USB_MON=y # # USB port drivers @@ -1322,7 +1355,6 @@ CONFIG_USB_MON=y # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set @@ -1338,6 +1370,7 @@ CONFIG_USB_MON=y # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_GADGET is not set CONFIG_MMC=m # CONFIG_MMC_DEBUG is not set @@ -1349,6 +1382,7 @@ CONFIG_MMC=m CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_BOUNCE=y # CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set # # MMC/SD Host Controller Drivers @@ -1356,14 +1390,19 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_PXA=m # CONFIG_MMC_SDHCI is not set # CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SDRICOH_CS is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # # LED drivers # +# CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set CONFIG_LEDS_CM_X270=y +# CONFIG_LEDS_PCA955X is not set # # LED Triggers @@ -1401,6 +1440,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set # # SPI RTC drivers @@ -1422,6 +1462,15 @@ CONFIG_RTC_DRV_V3020=y # on-CPU RTC drivers # CONFIG_RTC_DRV_SA1100=y +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set # CONFIG_UIO is not set # @@ -1501,6 +1550,7 @@ CONFIG_JFFS2_RTIME=y # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_ROMFS_FS is not set @@ -1511,13 +1561,12 @@ CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFSD is not set CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1626,6 +1675,7 @@ CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y @@ -1633,7 +1683,17 @@ CONFIG_FRAME_POINTER=y # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set # CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set CONFIG_DEBUG_USER=y CONFIG_DEBUG_ERRORS=y # CONFIG_DEBUG_STACK_USAGE is not set @@ -1689,6 +1749,10 @@ CONFIG_CRYPTO=y # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set @@ -1729,6 +1793,7 @@ CONFIG_BITREVERSE=y # CONFIG_GENERIC_FIND_NEXT_BIT is not set CONFIG_CRC_CCITT=m # CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h index 7b62351f097..4d88425a416 100644 --- a/arch/arm/include/asm/bug.h +++ b/arch/arm/include/asm/bug.h @@ -12,7 +12,7 @@ extern void __bug(const char *file, int line) __attribute__((noreturn)); #else /* this just causes an oops */ -#define BUG() (*(int *)0 = 0) +#define BUG() do { *(int *)0 = 0; } while (1) #endif diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 9073d9c6567..de6c59f814a 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -444,94 +444,4 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, dmac_inv_range(start, start + size); } -#define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) -#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29)) - -#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25)) -#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25)) -#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25)) -#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23)) - -#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val)) -#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val)) -#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val)) -#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val)) -#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0) - -#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) -/* - * VIVT caches only - */ -#define cache_is_vivt() 1 -#define cache_is_vipt() 0 -#define cache_is_vipt_nonaliasing() 0 -#define cache_is_vipt_aliasing() 0 -#define icache_is_vivt_asid_tagged() 0 - -#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT) -/* - * VIPT caches only - */ -#define cache_is_vivt() 0 -#define cache_is_vipt() 1 -#define cache_is_vipt_nonaliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vipt_nonaliasing(__val); \ - }) - -#define cache_is_vipt_aliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vipt_aliasing(__val); \ - }) - -#define icache_is_vivt_asid_tagged() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vivt_asid_tagged_instr(__val); \ - }) - -#else -/* - * VIVT or VIPT caches. Note that this is unreliable since ARM926 - * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test. - * There's no way to tell from the CacheType register what type (!) - * the cache is. - */ -#define cache_is_vivt() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - (!__cacheid_present(__val)) || __cacheid_vivt(__val); \ - }) - -#define cache_is_vipt() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && __cacheid_vipt(__val); \ - }) - -#define cache_is_vipt_nonaliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vipt_nonaliasing(__val); \ - }) - -#define cache_is_vipt_aliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vipt_aliasing(__val); \ - }) - -#define icache_is_vivt_asid_tagged() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vivt_asid_tagged_instr(__val); \ - }) - -#endif - #endif diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h new file mode 100644 index 00000000000..d3a4c2cb9f2 --- /dev/null +++ b/arch/arm/include/asm/cachetype.h @@ -0,0 +1,52 @@ +#ifndef __ASM_ARM_CACHETYPE_H +#define __ASM_ARM_CACHETYPE_H + +#define CACHEID_VIVT (1 << 0) +#define CACHEID_VIPT_NONALIASING (1 << 1) +#define CACHEID_VIPT_ALIASING (1 << 2) +#define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING) +#define CACHEID_ASID_TAGGED (1 << 3) + +extern unsigned int cacheid; + +#define cache_is_vivt() cacheid_is(CACHEID_VIVT) +#define cache_is_vipt() cacheid_is(CACHEID_VIPT) +#define cache_is_vipt_nonaliasing() cacheid_is(CACHEID_VIPT_NONALIASING) +#define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING) +#define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED) + +/* + * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture + * Mask out support which will never be present on newer CPUs. + * - v6+ is never VIVT + * - v7+ VIPT never aliases + */ +#if __LINUX_ARM_ARCH__ >= 7 +#define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING | CACHEID_ASID_TAGGED) +#elif __LINUX_ARM_ARCH__ >= 6 +#define __CACHEID_ARCH_MIN (~CACHEID_VIVT) +#else +#define __CACHEID_ARCH_MIN (~0) +#endif + +/* + * Mask out support which isn't configured + */ +#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) +#define __CACHEID_ALWAYS (CACHEID_VIVT) +#define __CACHEID_NEVER (~CACHEID_VIVT) +#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT) +#define __CACHEID_ALWAYS (0) +#define __CACHEID_NEVER (CACHEID_VIVT) +#else +#define __CACHEID_ALWAYS (0) +#define __CACHEID_NEVER (0) +#endif + +static inline unsigned int __attribute__((pure)) cacheid_is(unsigned int mask) +{ + return (__CACHEID_ALWAYS & mask) | + (~__CACHEID_NEVER & __CACHEID_ARCH_MIN & mask & cacheid); +} + +#endif diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h new file mode 100644 index 00000000000..7b9d27e749b --- /dev/null +++ b/arch/arm/include/asm/cputype.h @@ -0,0 +1,64 @@ +#ifndef __ASM_ARM_CPUTYPE_H +#define __ASM_ARM_CPUTYPE_H + +#include <linux/stringify.h> + +#define CPUID_ID 0 +#define CPUID_CACHETYPE 1 +#define CPUID_TCM 2 +#define CPUID_TLBTYPE 3 + +#ifdef CONFIG_CPU_CP15 +#define read_cpuid(reg) \ + ({ \ + unsigned int __val; \ + asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ + : "=r" (__val) \ + : \ + : "cc"); \ + __val; \ + }) +#else +extern unsigned int processor_id; +#define read_cpuid(reg) (processor_id) +#endif + +/* + * The CPU ID never changes at run time, so we might as well tell the + * compiler that it's constant. Use this function to read the CPU ID + * rather than directly reading processor_id or read_cpuid() directly. + */ +static inline unsigned int __attribute_const__ read_cpuid_id(void) +{ + return read_cpuid(CPUID_ID); +} + +static inline unsigned int __attribute_const__ read_cpuid_cachetype(void) +{ + return read_cpuid(CPUID_CACHETYPE); +} + +/* + * Intel's XScale3 core supports some v6 features (supersections, L2) + * but advertises itself as v5 as it does not support the v6 ISA. For + * this reason, we need a way to explicitly test for this type of CPU. + */ +#ifndef CONFIG_CPU_XSC3 +#define cpu_is_xsc3() 0 +#else +static inline int cpu_is_xsc3(void) +{ + if ((read_cpuid_id() & 0xffffe000) == 0x69056000) + return 1; + + return 0; +} +#endif + +#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) +#define cpu_is_xscale() 0 +#else +#define cpu_is_xscale() 1 +#endif + +#endif diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 7b95d205839..1cb8602dd9d 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -104,15 +104,14 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) * Dummy noncoherent implementation. We don't provide a dma_cache_sync * function so drivers using this API are highlighted with build warnings. */ -static inline void * -dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) +static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, + dma_addr_t *handle, gfp_t gfp) { return NULL; } -static inline void -dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t handle) +static inline void dma_free_noncoherent(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t handle) { } @@ -127,8 +126,7 @@ dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, * return the CPU-viewed address, and sets @handle to be the * device-viewed address. */ -extern void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); +extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t); /** * dma_free_coherent - free memory allocated by dma_alloc_coherent @@ -143,9 +141,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf * References to memory and mappings associated with cpu_addr/handle * during and after this call executing are illegal. */ -extern void -dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t handle); +extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t); /** * dma_mmap_coherent - map a coherent DMA allocation into user space @@ -159,8 +155,8 @@ dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, * into user space. The coherent DMA buffer must not be freed by the * driver until the user space mapping has been released. */ -int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t handle, size_t size); +int dma_mmap_coherent(struct device *, struct vm_area_struct *, + void *, dma_addr_t, size_t); /** @@ -174,14 +170,94 @@ int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, * return the CPU-viewed address, and sets @handle to be the * device-viewed address. */ -extern void * -dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); +extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *, + gfp_t); #define dma_free_writecombine(dev,size,cpu_addr,handle) \ dma_free_coherent(dev,size,cpu_addr,handle) -int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t handle, size_t size); +int dma_mmap_writecombine(struct device *, struct vm_area_struct *, + void *, dma_addr_t, size_t); + + +#ifdef CONFIG_DMABOUNCE +/* + * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" + * and utilize bounce buffers as needed to work around limited DMA windows. + * + * On the SA-1111, a bug limits DMA to only certain regions of RAM. + * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) + * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) + * + * The following are helper functions used by the dmabounce subystem + * + */ + +/** + * dmabounce_register_dev + * + * @dev: valid struct device pointer + * @small_buf_size: size of buffers to use with small buffer pool + * @large_buf_size: size of buffers to use with large buffer pool (can be 0) + * + * This function should be called by low-level platform code to register + * a device as requireing DMA buffer bouncing. The function will allocate + * appropriate DMA pools for the device. + * + */ +extern int dmabounce_register_dev(struct device *, unsigned long, + unsigned long); + +/** + * dmabounce_unregister_dev + * + * @dev: valid struct device pointer + * + * This function should be called by low-level platform code when device + * that was previously registered with dmabounce_register_dev is removed + * from the system. + * + */ +extern void dmabounce_unregister_dev(struct device *); + +/** + * dma_needs_bounce + * + * @dev: valid struct device pointer + * @dma_handle: dma_handle of unbounced buffer + * @size: size of region being mapped + * + * Platforms that utilize the dmabounce mechanism must implement + * this function. + * + * The dmabounce routines call this function whenever a dma-mapping + * is requested to determine whether a given buffer needs to be bounced + * or not. The function must return 0 if the buffer is OK for + * DMA access and 1 if the buffer needs to be bounced. + * + */ +extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); + +/* + * The DMA API, implemented by dmabounce.c. See below for descriptions. + */ +extern dma_addr_t dma_map_single(struct device *, void *, size_t, + enum dma_data_direction); +extern dma_addr_t dma_map_page(struct device *, struct page *, + unsigned long, size_t, enum dma_data_direction); +extern void dma_unmap_single(struct device *, dma_addr_t, size_t, + enum dma_data_direction); + +/* + * Private functions + */ +int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long, + size_t, enum dma_data_direction); +int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long, + size_t, enum dma_data_direction); +#else +#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1) +#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1) /** @@ -198,19 +274,16 @@ int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, * can regain ownership by calling dma_unmap_single() or * dma_sync_single_for_cpu(). */ -#ifndef CONFIG_DMABOUNCE -static inline dma_addr_t -dma_map_single(struct device *dev, void *cpu_addr, size_t size, - enum dma_data_direction dir) +static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, + size_t size, enum dma_data_direction dir) { + BUG_ON(!valid_dma_direction(dir)); + if (!arch_is_coherent()) dma_cache_maint(cpu_addr, size, dir); return virt_to_dma(dev, cpu_addr); } -#else -extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction); -#endif /** * dma_map_page - map a portion of a page for streaming DMA @@ -224,23 +297,25 @@ extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_d * or written back. * * The device owns this memory once this call has completed. The CPU - * can regain ownership by calling dma_unmap_page() or - * dma_sync_single_for_cpu(). + * can regain ownership by calling dma_unmap_page(). */ -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction dir) +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, enum dma_data_direction dir) { - return dma_map_single(dev, page_address(page) + offset, size, dir); + BUG_ON(!valid_dma_direction(dir)); + + if (!arch_is_coherent()) + dma_cache_maint(page_address(page) + offset, size, dir); + + return page_to_dma(dev, page) + offset; } /** * dma_unmap_single - unmap a single buffer previously mapped * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction + * @size: size of buffer (same as passed to dma_map_single) + * @dir: DMA transfer direction (same as passed to dma_map_single) * * Unmap a single streaming mode DMA translation. The handle and size * must match what was provided in the previous dma_map_single() call. @@ -249,108 +324,34 @@ dma_map_page(struct device *dev, struct page *page, * After this call, reads by the CPU to the buffer are guaranteed to see * whatever the device wrote there. */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) +static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, + size_t size, enum dma_data_direction dir) { /* nothing to do */ } -#else -extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction); -#endif +#endif /* CONFIG_DMABOUNCE */ /** * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction + * @size: size of buffer (same as passed to dma_map_page) + * @dir: DMA transfer direction (same as passed to dma_map_page) * - * Unmap a single streaming mode DMA translation. The handle and size - * must match what was provided in the previous dma_map_single() call. + * Unmap a page streaming mode DMA translation. The handle and size + * must match what was provided in the previous dma_map_page() call. * All other usages are undefined. * * After this call, reads by the CPU to the buffer are guaranteed to see * whatever the device wrote there. */ -static inline void -dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) +static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, + size_t size, enum dma_data_direction dir) { dma_unmap_single(dev, handle, size, dir); } /** - * dma_map_sg - map a set of SG buffers for streaming mode DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Map a set of buffers described by scatterlist in streaming - * mode for DMA. This is the scatter-gather version of the - * above dma_map_single interface. Here the scatter gather list - * elements are each tagged with the appropriate dma address - * and length. They are obtained via sg_dma_{address,length}(SG). - * - * NOTE: An implementation may be able to use a smaller number of - * DMA address/length pairs than there are SG table elements. - * (for example via virtual mapping capabilities) - * The routine returns the number of addr/length pairs actually - * used, at most nents. - * - * Device ownership issues as mentioned above for dma_map_single are - * the same here. - */ -#ifndef CONFIG_DMABOUNCE -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt; - - sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset; - virt = sg_virt(sg); - - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } - - return nents; -} -#else -extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); -#endif - -/** - * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Unmap a set of streaming mode DMA translations. - * Again, CPU read rules concerning calls here are the same as for - * dma_unmap_single() above. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - - /* nothing to do */ -} -#else -extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); -#endif - - -/** * dma_sync_single_range_for_cpu * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices * @handle: DMA address of buffer @@ -368,145 +369,52 @@ extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_da * must first the perform a dma_sync_for_device, and then the * device again owns the buffer. */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle, - unsigned long offset, size_t size, - enum dma_data_direction dir) +static inline void dma_sync_single_range_for_cpu(struct device *dev, + dma_addr_t handle, unsigned long offset, size_t size, + enum dma_data_direction dir) { - if (!arch_is_coherent()) - dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); + BUG_ON(!valid_dma_direction(dir)); + + dmabounce_sync_for_cpu(dev, handle, offset, size, dir); } -static inline void -dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle, - unsigned long offset, size_t size, - enum dma_data_direction dir) +static inline void dma_sync_single_range_for_device(struct device *dev, + dma_addr_t handle, unsigned long offset, size_t size, + enum dma_data_direction dir) { + BUG_ON(!valid_dma_direction(dir)); + + if (!dmabounce_sync_for_device(dev, handle, offset, size, dir)) + return; + if (!arch_is_coherent()) dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); } -#else -extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction); -extern void dma_sync_single_range_for_device(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction); -#endif -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t handle, size_t size, enum dma_data_direction dir) { dma_sync_single_range_for_cpu(dev, handle, 0, size, dir); } -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t handle, size_t size, enum dma_data_direction dir) { dma_sync_single_range_for_device(dev, handle, 0, size, dir); } - -/** - * dma_sync_sg_for_cpu - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Make physical memory consistent for a set of streaming - * mode DMA translations after a transfer. - * - * The same as dma_sync_single_for_* but for a scatter-gather list, - * same rules and usage. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt = sg_virt(sg); - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt = sg_virt(sg); - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } -} -#else -extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction); -extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction); -#endif - -#ifdef CONFIG_DMABOUNCE /* - * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" - * and utilize bounce buffers as needed to work around limited DMA windows. - * - * On the SA-1111, a bug limits DMA to only certain regions of RAM. - * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) - * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) - * - * The following are helper functions used by the dmabounce subystem - * - */ - -/** - * dmabounce_register_dev - * - * @dev: valid struct device pointer - * @small_buf_size: size of buffers to use with small buffer pool - * @large_buf_size: size of buffers to use with large buffer pool (can be 0) - * - * This function should be called by low-level platform code to register - * a device as requireing DMA buffer bouncing. The function will allocate - * appropriate DMA pools for the device. - * - */ -extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long); - -/** - * dmabounce_unregister_dev - * - * @dev: valid struct device pointer - * - * This function should be called by low-level platform code when device - * that was previously registered with dmabounce_register_dev is removed - * from the system. - * + * The scatter list versions of the above methods. */ -extern void dmabounce_unregister_dev(struct device *); +extern int dma_map_sg(struct device *, struct scatterlist *, int, + enum dma_data_direction); +extern void dma_unmap_sg(struct device *, struct scatterlist *, int, + enum dma_data_direction); +extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int, + enum dma_data_direction); +extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int, + enum dma_data_direction); -/** - * dma_needs_bounce - * - * @dev: valid struct device pointer - * @dma_handle: dma_handle of unbounced buffer - * @size: size of region being mapped - * - * Platforms that utilize the dmabounce mechanism must implement - * this function. - * - * The dmabounce routines call this function whenever a dma-mapping - * is requested to determine whether a given buffer needs to be bounced - * or not. The function must return 0 if the buffer is OK for - * DMA access and 1 if the buffer needs to be bounced. - * - */ -extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); -#endif /* CONFIG_DMABOUNCE */ #endif /* __KERNEL__ */ #endif diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 4ca75162748..a58378c343b 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -3,7 +3,6 @@ #include <asm/hwcap.h> -#ifndef __ASSEMBLY__ /* * ELF register definitions.. */ @@ -17,12 +16,34 @@ typedef unsigned long elf_freg_t[3]; typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef struct user_fp elf_fpregset_t; -#endif #define EM_ARM 40 -#define EF_ARM_APCS26 0x08 -#define EF_ARM_SOFT_FLOAT 0x200 -#define EF_ARM_EABI_MASK 0xFF000000 + +#define EF_ARM_EABI_MASK 0xff000000 +#define EF_ARM_EABI_UNKNOWN 0x00000000 +#define EF_ARM_EABI_VER1 0x01000000 +#define EF_ARM_EABI_VER2 0x02000000 +#define EF_ARM_EABI_VER3 0x03000000 +#define EF_ARM_EABI_VER4 0x04000000 +#define EF_ARM_EABI_VER5 0x05000000 + +#define EF_ARM_BE8 0x00800000 /* ABI 4,5 */ +#define EF_ARM_LE8 0x00400000 /* ABI 4,5 */ +#define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */ +#define EF_ARM_VFP_FLOAT 0x00000400 /* ABI 0 */ +#define EF_ARM_SOFT_FLOAT 0x00000200 /* ABI 0 */ +#define EF_ARM_OLD_ABI 0x00000100 /* ABI 0 */ +#define EF_ARM_NEW_ABI 0x00000080 /* ABI 0 */ +#define EF_ARM_ALIGN8 0x00000040 /* ABI 0 */ +#define EF_ARM_PIC 0x00000020 /* ABI 0 */ +#define EF_ARM_MAPSYMSFIRST 0x00000010 /* ABI 2 */ +#define EF_ARM_APCS_FLOAT 0x00000010 /* ABI 0, floats in fp regs */ +#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ABI 2 */ +#define EF_ARM_APCS_26 0x00000008 /* ABI 0 */ +#define EF_ARM_SYMSARESORTED 0x00000004 /* ABI 1,2 */ +#define EF_ARM_INTERWORK 0x00000004 /* ABI 0 */ +#define EF_ARM_HASENTRY 0x00000002 /* All */ +#define EF_ARM_RELEXEC 0x00000001 /* All */ #define R_ARM_NONE 0 #define R_ARM_PC24 1 @@ -41,7 +62,6 @@ typedef struct user_fp elf_fpregset_t; #endif #define ELF_ARCH EM_ARM -#ifndef __ASSEMBLY__ /* * This yields a string that ld.so will use to load implementation * specific libraries for optimization. This is more specific in @@ -59,25 +79,17 @@ typedef struct user_fp elf_fpregset_t; #define ELF_PLATFORM (elf_platform) extern char elf_platform[]; -#endif -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x)) +struct elf32_hdr; /* - * 32-bit code is always OK. Some cpus can do 26-bit, some can't. + * This is used to ensure we don't load something for the wrong architecture. */ -#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x)) - -#define ELF_THUMB_OK(x) \ - ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \ - ((x)->e_entry & 3) == 0) +extern int elf_check_arch(const struct elf32_hdr *); +#define elf_check_arch elf_check_arch -#define ELF_26BIT_OK(x) \ - ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \ - ((x)->e_flags & EF_ARM_APCS26) == 0) +extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); +#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 @@ -94,23 +106,7 @@ extern char elf_platform[]; have no such handler. */ #define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 -/* - * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 - * and CP1, we only enable access to the iWMMXt coprocessor if the - * binary is EABI or softfloat (and thus, guaranteed not to use - * FPA instructions.) - */ -#define SET_PERSONALITY(ex, ibcs2) \ - do { \ - if ((ex).e_flags & EF_ARM_APCS26) { \ - set_personality(PER_LINUX); \ - } else { \ - set_personality(PER_LINUX_32BIT); \ - if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \ - set_thread_flag(TIF_USING_IWMMXT); \ - else \ - clear_thread_flag(TIF_USING_IWMMXT); \ - } \ - } while (0) +extern void elf_set_personality(const struct elf32_hdr *); +#define SET_PERSONALITY(ex) elf_set_personality(&(ex)) #endif diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h index 6a332a9f099..9ee743b95de 100644 --- a/arch/arm/include/asm/futex.h +++ b/arch/arm/include/asm/futex.h @@ -1,6 +1,124 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H +#ifndef _ASM_ARM_FUTEX_H +#define _ASM_ARM_FUTEX_H + +#ifdef __KERNEL__ + +#ifdef CONFIG_SMP #include <asm-generic/futex.h> -#endif +#else /* !SMP, we can work around lack of atomic ops by disabling preemption */ + +#include <linux/futex.h> +#include <linux/preempt.h> +#include <linux/uaccess.h> +#include <asm/errno.h> + +#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ + __asm__ __volatile__( \ + "1: ldrt %1, [%2]\n" \ + " " insn "\n" \ + "2: strt %0, [%2]\n" \ + " mov %0, #0\n" \ + "3:\n" \ + " .section __ex_table,\"a\"\n" \ + " .align 3\n" \ + " .long 1b, 4f, 2b, 4f\n" \ + " .previous\n" \ + " .section .fixup,\"ax\"\n" \ + "4: mov %0, %4\n" \ + " b 3b\n" \ + " .previous" \ + : "=&r" (ret), "=&r" (oldval) \ + : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \ + : "cc", "memory") + +static inline int +futex_atomic_op_inuser (int encoded_op, int __user *uaddr) +{ + int op = (encoded_op >> 28) & 7; + int cmp = (encoded_op >> 24) & 15; + int oparg = (encoded_op << 8) >> 20; + int cmparg = (encoded_op << 20) >> 20; + int oldval = 0, ret; + + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + pagefault_disable(); /* implies preempt_disable() */ + + switch (op) { + case FUTEX_OP_SET: + __futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_ADD: + __futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_OR: + __futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_ANDN: + __futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg); + break; + case FUTEX_OP_XOR: + __futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg); + break; + default: + ret = -ENOSYS; + } + + pagefault_enable(); /* subsumes preempt_enable() */ + + if (!ret) { + switch (cmp) { + case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; + case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; + case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; + case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; + case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; + case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; + default: ret = -ENOSYS; + } + } + return ret; +} + +static inline int +futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) +{ + int val; + + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + pagefault_disable(); /* implies preempt_disable() */ + + __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" + "1: ldrt %0, [%3]\n" + " teq %0, %1\n" + "2: streqt %2, [%3]\n" + "3:\n" + " .section __ex_table,\"a\"\n" + " .align 3\n" + " .long 1b, 4f, 2b, 4f\n" + " .previous\n" + " .section .fixup,\"ax\"\n" + "4: mov %0, %4\n" + " b 3b\n" + " .previous" + : "=&r" (val) + : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT) + : "cc", "memory"); + + pagefault_enable(); /* subsumes preempt_enable() */ + + return val; +} + +#endif /* !SMP */ + +#endif /* __KERNEL__ */ +#endif /* _ASM_ARM_FUTEX_H */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 71934856fc2..a8094451be5 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -60,10 +60,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); #define MT_DEVICE 0 #define MT_DEVICE_NONSHARED 1 #define MT_DEVICE_CACHED 2 -#define MT_DEVICE_IXP2000 3 -#define MT_DEVICE_WC 4 +#define MT_DEVICE_WC 3 /* - * types 5 onwards can be found in asm/mach/map.h and are undefined + * types 4 onwards can be found in asm/mach/map.h and are undefined * for ioremap */ diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index d6786090d02..a0009aa5d15 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h @@ -22,6 +22,10 @@ #ifndef __ASSEMBLY__ struct irqaction; extern void migrate_irqs(void); + +extern void asm_do_IRQ(unsigned int, struct pt_regs *); +void init_IRQ(void); + #endif #endif diff --git a/arch/arm/include/asm/kprobes.h b/arch/arm/include/asm/kprobes.h index a5d0d99ad38..bb8a19bd582 100644 --- a/arch/arm/include/asm/kprobes.h +++ b/arch/arm/include/asm/kprobes.h @@ -61,7 +61,6 @@ struct kprobe_ctlblk { void arch_remove_kprobe(struct kprobe *); void kretprobe_trampoline(void); -int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr); int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr); int kprobe_exceptions_notify(struct notifier_block *self, unsigned long val, void *data); diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index 9eb936e49cc..cb1139ac194 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h @@ -18,16 +18,13 @@ struct map_desc { unsigned int type; }; -/* types 0-4 are defined in asm/io.h */ -#define MT_CACHECLEAN 5 -#define MT_MINICLEAN 6 -#define MT_LOW_VECTORS 7 -#define MT_HIGH_VECTORS 8 -#define MT_MEMORY 9 -#define MT_ROM 10 - -#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED -#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 +/* types 0-3 are defined in asm/io.h */ +#define MT_CACHECLEAN 4 +#define MT_MINICLEAN 5 +#define MT_LOW_VECTORS 6 +#define MT_HIGH_VECTORS 7 +#define MT_MEMORY 8 +#define MT_ROM 9 #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h index 270902c353f..f3eabf1ecec 100644 --- a/arch/arm/include/asm/mach/udc_pxa2xx.h +++ b/arch/arm/include/asm/mach/udc_pxa2xx.h @@ -18,8 +18,7 @@ struct pxa2xx_udc_mach_info { /* Boards following the design guidelines in the developer's manual, * with on-chip GPIOs not Lubbock's weird hardware, can have a sane * VBUS IRQ and omit the methods above. Store the GPIO number - * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits. - * Note that sometimes the signals go through inverters... + * here. Note that sometimes the signals go through inverters... */ bool gpio_vbus_inverted; u16 gpio_vbus; /* high == vbus present */ diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h index e1ca48a9e97..6b884d2b0b6 100644 --- a/arch/arm/include/asm/mc146818rtc.h +++ b/arch/arm/include/asm/mc146818rtc.h @@ -4,8 +4,8 @@ #ifndef _ASM_MC146818RTC_H #define _ASM_MC146818RTC_H +#include <linux/io.h> #include <mach/irqs.h> -#include <asm/io.h> #ifndef RTC_PORT #define RTC_PORT(x) (0x70 + (x)) diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index bf7c737c922..809ff9ab853 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -13,30 +13,27 @@ #ifndef __ASM_ARM_MEMORY_H #define __ASM_ARM_MEMORY_H +#include <linux/compiler.h> +#include <linux/const.h> +#include <mach/memory.h> +#include <asm/sizes.h> + /* * Allow for constants defined here to be used from assembly code * by prepending the UL suffix only with actual C code compilation. */ -#ifndef __ASSEMBLY__ -#define UL(x) (x##UL) -#else -#define UL(x) (x) -#endif - -#include <linux/compiler.h> -#include <mach/memory.h> -#include <asm/sizes.h> +#define UL(x) _AC(x, UL) #ifdef CONFIG_MMU -#ifndef TASK_SIZE /* + * PAGE_OFFSET - the virtual address of the start of the kernel image * TASK_SIZE - the maximum size of a user space task. * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area */ -#define TASK_SIZE UL(0xbf000000) -#define TASK_UNMAPPED_BASE UL(0x40000000) -#endif +#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET) +#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000)) +#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3) /* * The maximum size of a 26-bit user space task. @@ -44,13 +41,6 @@ #define TASK_SIZE_26 UL(0x04000000) /* - * Page offset: 3GB - */ -#ifndef PAGE_OFFSET -#define PAGE_OFFSET UL(0xc0000000) -#endif - -/* * The module space lives between the addresses given by TASK_SIZE * and PAGE_OFFSET - it must be within 32MB of the kernel text. */ @@ -147,17 +137,11 @@ #ifndef arch_adjust_zones #define arch_adjust_zones(node,size,holes) do { } while (0) +#elif !defined(CONFIG_ZONE_DMA) +#error "custom arch_adjust_zones() requires CONFIG_ZONE_DMA" #endif /* - * Amount of memory reserved for the vmalloc() area, and minimum - * address for vmalloc mappings. - */ -extern unsigned long vmalloc_reserve; - -#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve) - -/* * PFNs are used to describe any physical page; this means * PFN 0 == physical address 0. * diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h index a301e446007..0559f37c2a2 100644 --- a/arch/arm/include/asm/mmu_context.h +++ b/arch/arm/include/asm/mmu_context.h @@ -15,6 +15,7 @@ #include <linux/compiler.h> #include <asm/cacheflush.h> +#include <asm/cachetype.h> #include <asm/proc-fns.h> #include <asm-generic/mm_hooks.h> diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index cf2e2680daa..bed1c0a0036 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h @@ -184,8 +184,9 @@ typedef struct page *pgtable_t; #endif /* !__ASSEMBLY__ */ -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) +#define VM_DATA_DEFAULT_FLAGS \ + (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \ + VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) /* * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 8e21ef15bd7..110295c5461 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -164,14 +164,30 @@ extern void __pgd_error(const char *file, int line, unsigned long val); #define L_PTE_PRESENT (1 << 0) #define L_PTE_FILE (1 << 1) /* only when !PRESENT */ #define L_PTE_YOUNG (1 << 1) -#define L_PTE_BUFFERABLE (1 << 2) /* matches PTE */ -#define L_PTE_CACHEABLE (1 << 3) /* matches PTE */ -#define L_PTE_USER (1 << 4) -#define L_PTE_WRITE (1 << 5) -#define L_PTE_EXEC (1 << 6) -#define L_PTE_DIRTY (1 << 7) +#define L_PTE_BUFFERABLE (1 << 2) /* obsolete, matches PTE */ +#define L_PTE_CACHEABLE (1 << 3) /* obsolete, matches PTE */ +#define L_PTE_DIRTY (1 << 6) +#define L_PTE_WRITE (1 << 7) +#define L_PTE_USER (1 << 8) +#define L_PTE_EXEC (1 << 9) #define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ +/* + * These are the memory types, defined to be compatible with + * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB + */ +#define L_PTE_MT_UNCACHED (0x00 << 2) /* 0000 */ +#define L_PTE_MT_BUFFERABLE (0x01 << 2) /* 0001 */ +#define L_PTE_MT_WRITETHROUGH (0x02 << 2) /* 0010 */ +#define L_PTE_MT_WRITEBACK (0x03 << 2) /* 0011 */ +#define L_PTE_MT_MINICACHE (0x06 << 2) /* 0110 (sa1100, xscale) */ +#define L_PTE_MT_WRITEALLOC (0x07 << 2) /* 0111 */ +#define L_PTE_MT_DEV_SHARED (0x04 << 2) /* 0100 */ +#define L_PTE_MT_DEV_NONSHARED (0x0c << 2) /* 1100 */ +#define L_PTE_MT_DEV_WC (0x09 << 2) /* 1001 */ +#define L_PTE_MT_DEV_CACHED (0x0b << 2) /* 1011 */ +#define L_PTE_MT_MASK (0x0f << 2) + #ifndef __ASSEMBLY__ /* @@ -180,23 +196,30 @@ extern void __pgd_error(const char *file, int line, unsigned long val); * as well as any architecture dependent bits like global/ASID and SMP * shared mapping bits. */ -#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE -#define _L_PTE_READ L_PTE_USER | L_PTE_EXEC +#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG extern pgprot_t pgprot_user; extern pgprot_t pgprot_kernel; -#define PAGE_NONE pgprot_user -#define PAGE_COPY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) -#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \ - L_PTE_WRITE) -#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) -#define PAGE_KERNEL pgprot_kernel - -#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) -#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) -#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE) -#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) +#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b)) + +#define PAGE_NONE pgprot_user +#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE) +#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) +#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER) +#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) +#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER) +#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC) +#define PAGE_KERNEL pgprot_kernel +#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_kernel, L_PTE_EXEC) + +#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) +#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE) +#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC) +#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) +#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) +#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER) +#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC) #endif /* __ASSEMBLY__ */ @@ -212,19 +235,19 @@ extern pgprot_t pgprot_kernel; #define __P001 __PAGE_READONLY #define __P010 __PAGE_COPY #define __P011 __PAGE_COPY -#define __P100 __PAGE_READONLY -#define __P101 __PAGE_READONLY -#define __P110 __PAGE_COPY -#define __P111 __PAGE_COPY +#define __P100 __PAGE_READONLY_EXEC +#define __P101 __PAGE_READONLY_EXEC +#define __P110 __PAGE_COPY_EXEC +#define __P111 __PAGE_COPY_EXEC #define __S000 __PAGE_NONE #define __S001 __PAGE_READONLY #define __S010 __PAGE_SHARED #define __S011 __PAGE_SHARED -#define __S100 __PAGE_READONLY -#define __S101 __PAGE_READONLY -#define __S110 __PAGE_SHARED -#define __S111 __PAGE_SHARED +#define __S100 __PAGE_READONLY_EXEC +#define __S101 __PAGE_READONLY_EXEC +#define __S110 __PAGE_SHARED_EXEC +#define __S111 __PAGE_SHARED_EXEC #ifndef __ASSEMBLY__ /* @@ -286,8 +309,10 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; } /* * Mark the prot value as uncacheable and unbufferable. */ -#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) -#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~L_PTE_CACHEABLE) +#define pgprot_noncached(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED) +#define pgprot_writecombine(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE) #define pmd_none(pmd) (!pmd_val(pmd)) #define pmd_present(pmd) (pmd_val(pmd)) @@ -320,11 +345,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd))) /* - * Permanent address of a page. We never have highmem, so this is trivial. - */ -#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) - -/* * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index b415c0e8545..73192618f1c 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h @@ -54,7 +54,6 @@ #define PSR_C_BIT 0x20000000 #define PSR_Z_BIT 0x40000000 #define PSR_N_BIT 0x80000000 -#define PCMASK 0 /* * Groups of PSR bits @@ -139,11 +138,7 @@ static inline int valid_user_regs(struct pt_regs *regs) return 0; } -#define pc_pointer(v) \ - ((v) & ~PCMASK) - -#define instruction_pointer(regs) \ - (pc_pointer((regs)->ARM_pc)) +#define instruction_pointer(regs) (regs)->ARM_pc #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *regs); diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 7bbf105463f..a65413ba121 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h @@ -209,6 +209,17 @@ struct meminfo { struct membank bank[NR_BANKS]; }; +#define for_each_nodebank(iter,mi,no) \ + for (iter = 0; iter < mi->nr_banks; iter++) \ + if (mi->bank[iter].node == no) + +#define bank_pfn_start(bank) __phys_to_pfn((bank)->start) +#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) +#define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT) +#define bank_phys_start(bank) (bank)->start +#define bank_phys_end(bank) ((bank)->start + (bank)->size) +#define bank_phys_size(bank) (bank)->size + /* * Early command line parameters. */ diff --git a/arch/arm/include/asm/sparsemem.h b/arch/arm/include/asm/sparsemem.h index 277158191a0..00098615c6f 100644 --- a/arch/arm/include/asm/sparsemem.h +++ b/arch/arm/include/asm/sparsemem.h @@ -3,8 +3,22 @@ #include <asm/memory.h> -#define MAX_PHYSADDR_BITS 32 -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS +/* + * Two definitions are required for sparsemem: + * + * MAX_PHYSMEM_BITS: The number of physical address bits required + * to address the last byte of memory. + * + * SECTION_SIZE_BITS: The number of physical address bits to cover + * the maximum amount of memory in a section. + * + * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000, + * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26. + * + * Define these in your mach/memory.h. + */ +#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS) +#error Sparsemem is not supported on this platform +#endif #endif diff --git a/arch/arm/include/asm/statfs.h b/arch/arm/include/asm/statfs.h index a02e6a8c3d7..079447c05ba 100644 --- a/arch/arm/include/asm/statfs.h +++ b/arch/arm/include/asm/statfs.h @@ -1,42 +1,12 @@ #ifndef _ASMARM_STATFS_H #define _ASMARM_STATFS_H -#ifndef __KERNEL_STRICT_NAMES -# include <linux/types.h> -typedef __kernel_fsid_t fsid_t; -#endif - -struct statfs { - __u32 f_type; - __u32 f_bsize; - __u32 f_blocks; - __u32 f_bfree; - __u32 f_bavail; - __u32 f_files; - __u32 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; - /* * With EABI there is 4 bytes of padding added to this structure. * Let's pack it so the padding goes away to simplify dual ABI support. * Note that user space does NOT have to pack this structure. */ -struct statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -} __attribute__ ((packed,aligned(4))); +#define ARCH_PACK_STATFS64 __attribute__((packed,aligned(4))) +#include <asm-generic/statfs.h> #endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 514af792a59..7aad78420f1 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -43,11 +43,6 @@ #define CR_XP (1 << 23) /* Extended page tables */ #define CR_VE (1 << 24) /* Vectored interrupts */ -#define CPUID_ID 0 -#define CPUID_CACHETYPE 1 -#define CPUID_TCM 2 -#define CPUID_TLBTYPE 3 - /* * This is used to ensure the compiler did actually allocate the register we * asked it for some inline assembly sequences. Apparently we can't trust @@ -61,36 +56,8 @@ #ifndef __ASSEMBLY__ #include <linux/linkage.h> -#include <linux/stringify.h> #include <linux/irqflags.h> -#ifdef CONFIG_CPU_CP15 -#define read_cpuid(reg) \ - ({ \ - unsigned int __val; \ - asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ - : "=r" (__val) \ - : \ - : "cc"); \ - __val; \ - }) -#else -extern unsigned int processor_id; -#define read_cpuid(reg) (processor_id) -#endif - -/* - * The CPU ID never changes at run time, so we might as well tell the - * compiler that it's constant. Use this function to read the CPU ID - * rather than directly reading processor_id or read_cpuid() directly. - */ -static inline unsigned int read_cpuid_id(void) __attribute_const__; - -static inline unsigned int read_cpuid_id(void) -{ - return read_cpuid(CPUID_ID); -} - #define __exception __attribute__((section(".exception.text"))) struct thread_info; @@ -131,31 +98,6 @@ extern void cpu_init(void); void arm_machine_restart(char mode); extern void (*arm_pm_restart)(char str); -/* - * Intel's XScale3 core supports some v6 features (supersections, L2) - * but advertises itself as v5 as it does not support the v6 ISA. For - * this reason, we need a way to explicitly test for this type of CPU. - */ -#ifndef CONFIG_CPU_XSC3 -#define cpu_is_xsc3() 0 -#else -static inline int cpu_is_xsc3(void) -{ - extern unsigned int processor_id; - - if ((processor_id & 0xffffe000) == 0x69056000) - return 1; - - return 0; -} -#endif - -#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) -#define cpu_is_xscale() 0 -#else -#define cpu_is_xscale() 1 -#endif - #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) #define UDBG_BADABORT (1 << 2) diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h index e56fa48e4ae..68b9ec82a37 100644 --- a/arch/arm/include/asm/thread_info.h +++ b/arch/arm/include/asm/thread_info.h @@ -98,7 +98,7 @@ static inline struct thread_info *current_thread_info(void) } #define thread_saved_pc(tsk) \ - ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc))) + ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) #define thread_saved_fp(tsk) \ ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index d0f51ff900b..e98ec60b340 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -225,7 +225,7 @@ do { \ #define __get_user_asm_byte(x,addr,err) \ __asm__ __volatile__( \ - "1: ldrbt %1,[%2],#0\n" \ + "1: ldrbt %1,[%2]\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -261,7 +261,7 @@ do { \ #define __get_user_asm_word(x,addr,err) \ __asm__ __volatile__( \ - "1: ldrt %1,[%2],#0\n" \ + "1: ldrt %1,[%2]\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -306,7 +306,7 @@ do { \ #define __put_user_asm_byte(x,__pu_addr,err) \ __asm__ __volatile__( \ - "1: strbt %1,[%2],#0\n" \ + "1: strbt %1,[%2]\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -339,7 +339,7 @@ do { \ #define __put_user_asm_word(x,__pu_addr,err) \ __asm__ __volatile__( \ - "1: strt %1,[%2],#0\n" \ + "1: strt %1,[%2]\n" \ "2:\n" \ " .section .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -365,7 +365,7 @@ do { \ #define __put_user_asm_dword(x,__pu_addr,err) \ __asm__ __volatile__( \ "1: strt " __reg_oper1 ", [%1], #4\n" \ - "2: strt " __reg_oper0 ", [%1], #0\n" \ + "2: strt " __reg_oper0 ", [%1]\n" \ "3:\n" \ " .section .fixup,\"ax\"\n" \ " .align 2\n" \ diff --git a/arch/arm/include/asm/vga.h b/arch/arm/include/asm/vga.h index 6a3cd2a2f67..250a4dd0063 100644 --- a/arch/arm/include/asm/vga.h +++ b/arch/arm/include/asm/vga.h @@ -1,8 +1,8 @@ #ifndef ASMARM_VGA_H #define ASMARM_VGA_H +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x)) diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 1d296fc8494..4305345987d 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -10,7 +10,7 @@ endif # Object file lists. -obj-y := compat.o entry-armv.o entry-common.o irq.o \ +obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \ process.o ptrace.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index cc7b246e965..2357b1cf1cf 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -13,11 +13,11 @@ #include <linux/delay.h> #include <linux/in6.h> #include <linux/syscalls.h> +#include <linux/uaccess.h> +#include <linux/io.h> #include <asm/checksum.h> -#include <asm/io.h> #include <asm/system.h> -#include <asm/uaccess.h> #include <asm/ftrace.h> /* diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index e5747547b44..17a59b6e521 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -10,8 +10,8 @@ #include <linux/pci.h> #include <linux/slab.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/mach/pci.h> diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c index 3b6a1c293ee..99995c2b231 100644 --- a/arch/arm/kernel/crunch.c +++ b/arch/arm/kernel/crunch.c @@ -15,9 +15,9 @@ #include <linux/signal.h> #include <linux/sched.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/ep93xx-regs.h> #include <asm/thread_notify.h> -#include <asm/io.h> struct crunch_state *crunch_owner; diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 9550ff0ddde..f53c5829054 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -89,10 +89,12 @@ ENTRY(printhex8) mov r1, #8 b printhex +ENDPROC(printhex8) ENTRY(printhex4) mov r1, #4 b printhex +ENDPROC(printhex4) ENTRY(printhex2) mov r1, #2 @@ -110,6 +112,7 @@ printhex: adr r2, hexbuf bne 1b mov r0, r2 b printascii +ENDPROC(printhex2) .ltorg @@ -127,11 +130,13 @@ ENTRY(printascii) teqne r1, #0 bne 1b mov pc, lr +ENDPROC(printascii) ENTRY(printch) addruart r3 mov r1, r0 mov r0, #0 b 1b +ENDPROC(printch) hexbuf: .space 16 diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c index 2f080a35a2d..4a3a50495c6 100644 --- a/arch/arm/kernel/dma-isa.c +++ b/arch/arm/kernel/dma-isa.c @@ -19,10 +19,9 @@ #include <linux/ioport.h> #include <linux/init.h> #include <linux/dma-mapping.h> +#include <linux/io.h> #include <asm/dma.h> -#include <asm/io.h> - #include <asm/mach/dma.h> #define ISA_DMA_MODE_READ 0x44 diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c index ba99a203552..d006085ed7e 100644 --- a/arch/arm/kernel/dma.c +++ b/arch/arm/kernel/dma.c @@ -26,23 +26,6 @@ EXPORT_SYMBOL(dma_spin_lock); static dma_t dma_chan[MAX_DMA_CHANNELS]; /* - * Get dma list for /proc/dma - */ -int get_dma_list(char *buf) -{ - dma_t *dma; - char *p = buf; - int i; - - for (i = 0, dma = dma_chan; i < MAX_DMA_CHANNELS; i++, dma++) - if (dma->lock) - p += sprintf(p, "%2d: %14s %s\n", i, - dma->d_ops->type, dma->device_id); - - return p - buf; -} - -/* * Request DMA channel * * On certain platforms, we have to allocate an interrupt as well... diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 7a50575a8d4..60c079d8535 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -587,8 +587,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc) pending = ecard_default_ops.irqpending(ec); if (pending) { - struct irq_desc *d = irq_desc + ec->irq; - desc_handle_irq(ec->irq, d); + generic_handle_irq(ec->irq); called ++; } } @@ -622,7 +621,6 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc) ecard_t *ec = slot_to_ecard(slot); if (ec->claimed) { - struct irq_desc *d = irq_desc + ec->irq; /* * this ugly code is so that we can operate a * prioritorising system: @@ -635,7 +633,7 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc) * Serial cards should go in 0/1, ethernet/scsi in 2/3 * otherwise you will lose serial data at high speeds! */ - desc_handle_irq(ec->irq, d); + generic_handle_irq(ec->irq); } else { printk(KERN_WARNING "card%d: interrupt from unclaimed " "card???\n", slot); diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c new file mode 100644 index 00000000000..513f332f040 --- /dev/null +++ b/arch/arm/kernel/elf.c @@ -0,0 +1,79 @@ +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/personality.h> +#include <linux/binfmts.h> +#include <linux/elf.h> + +int elf_check_arch(const struct elf32_hdr *x) +{ + unsigned int eflags; + + /* Make sure it's an ARM executable */ + if (x->e_machine != EM_ARM) + return 0; + + /* Make sure the entry address is reasonable */ + if (x->e_entry & 1) { + if (!(elf_hwcap & HWCAP_THUMB)) + return 0; + } else if (x->e_entry & 3) + return 0; + + eflags = x->e_flags; + if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { + /* APCS26 is only allowed if the CPU supports it */ + if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) + return 0; + + /* VFP requires the supporting code */ + if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP)) + return 0; + } + return 1; +} +EXPORT_SYMBOL(elf_check_arch); + +void elf_set_personality(const struct elf32_hdr *x) +{ + unsigned int eflags = x->e_flags; + unsigned int personality = PER_LINUX_32BIT; + + /* + * APCS-26 is only valid for OABI executables + */ + if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { + if (eflags & EF_ARM_APCS_26) + personality = PER_LINUX; + } + + set_personality(personality); + + /* + * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 + * and CP1, we only enable access to the iWMMXt coprocessor if the + * binary is EABI or softfloat (and thus, guaranteed not to use + * FPA instructions.) + */ + if (elf_hwcap & HWCAP_IWMMXT && + eflags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) { + set_thread_flag(TIF_USING_IWMMXT); + } else { + clear_thread_flag(TIF_USING_IWMMXT); + } +} +EXPORT_SYMBOL(elf_set_personality); + +/* + * Set READ_IMPLIES_EXEC if: + * - the binary requires an executable stack + * - we're running on a CPU which doesn't support NX. + */ +int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) +{ + if (executable_stack != EXSTACK_ENABLE_X) + return 1; + if (cpu_architecture() <= CPU_ARCH_ARMv6) + return 1; + return 0; +} +EXPORT_SYMBOL(arm_elf_read_implies_exec); diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 617e509d60d..77b04747553 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -76,14 +76,17 @@ __pabt_invalid: inv_entry BAD_PREFETCH b common_invalid +ENDPROC(__pabt_invalid) __dabt_invalid: inv_entry BAD_DATA b common_invalid +ENDPROC(__dabt_invalid) __irq_invalid: inv_entry BAD_IRQ b common_invalid +ENDPROC(__irq_invalid) __und_invalid: inv_entry BAD_UNDEFINSTR @@ -107,6 +110,7 @@ common_invalid: mov r0, sp b bad_mode +ENDPROC(__und_invalid) /* * SVC mode handlers @@ -192,6 +196,7 @@ __dabt_svc: ldr r0, [sp, #S_PSR] msr spsr_cxsf, r0 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr +ENDPROC(__dabt_svc) .align 5 __irq_svc: @@ -223,6 +228,7 @@ __irq_svc: bleq trace_hardirqs_on #endif ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr +ENDPROC(__irq_svc) .ltorg @@ -272,6 +278,7 @@ __und_svc: ldr lr, [sp, #S_PSR] @ Get SVC cpsr msr spsr_cxsf, lr ldmia sp, {r0 - pc}^ @ Restore SVC registers +ENDPROC(__und_svc) .align 5 __pabt_svc: @@ -313,6 +320,7 @@ __pabt_svc: ldr r0, [sp, #S_PSR] msr spsr_cxsf, r0 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr +ENDPROC(__pabt_svc) .align 5 .LCcralign: @@ -412,6 +420,7 @@ __dabt_usr: mov r2, sp adr lr, ret_from_exception b do_DataAbort +ENDPROC(__dabt_usr) .align 5 __irq_usr: @@ -441,6 +450,7 @@ __irq_usr: mov why, #0 b ret_to_user +ENDPROC(__irq_usr) .ltorg @@ -474,6 +484,7 @@ __und_usr: #else b __und_usr_unknown #endif +ENDPROC(__und_usr) @ @ fallthrough to call_fpe @@ -642,6 +653,7 @@ __und_usr_unknown: mov r0, sp adr lr, ret_from_exception b do_undefinstr +ENDPROC(__und_usr_unknown) .align 5 __pabt_usr: @@ -666,6 +678,8 @@ ENTRY(ret_from_exception) get_thread_info tsk mov why, #0 b ret_to_user +ENDPROC(__pabt_usr) +ENDPROC(ret_from_exception) /* * Register switch for ARMv3 and ARMv4 processors @@ -702,6 +716,7 @@ ENTRY(__switch_to) bl atomic_notifier_call_chain mov r0, r5 ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously +ENDPROC(__switch_to) __INIT @@ -1029,6 +1044,7 @@ vector_\name: mov r0, sp ldr lr, [pc, lr, lsl #2] movs pc, lr @ branch to handler in SVC mode +ENDPROC(vector_\name) .endm .globl __stubs_start diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 060d7e2e9f6..3aa14dcc5ba 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -77,6 +77,7 @@ no_work_pending: mov r0, r0 add sp, sp, #S_FRAME_SIZE - S_PC movs pc, lr @ return & move spsr_svc into cpsr +ENDPROC(ret_to_user) /* * This is how we return from a fork. @@ -92,7 +93,7 @@ ENTRY(ret_from_fork) mov r0, #1 @ trace exit [IP = 1] bl syscall_trace b ret_slow_syscall - +ENDPROC(ret_from_fork) .equ NR_syscalls,0 #define CALL(x) .equ NR_syscalls,NR_syscalls+1 @@ -269,6 +270,7 @@ ENTRY(vector_swi) eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back bcs arm_syscall b sys_ni_syscall @ not private func +ENDPROC(vector_swi) /* * This is the really slow path. We're going to be doing @@ -326,7 +328,6 @@ ENTRY(sys_call_table) */ @ r0 = syscall number @ r8 = syscall table - .type sys_syscall, #function sys_syscall: bic scno, r0, #__NR_OABI_SYSCALL_BASE cmp scno, #__NR_syscall - __NR_SYSCALL_BASE @@ -338,53 +339,65 @@ sys_syscall: movlo r3, r4 ldrlo pc, [tbl, scno, lsl #2] b sys_ni_syscall +ENDPROC(sys_syscall) sys_fork_wrapper: add r0, sp, #S_OFF b sys_fork +ENDPROC(sys_fork_wrapper) sys_vfork_wrapper: add r0, sp, #S_OFF b sys_vfork +ENDPROC(sys_vfork_wrapper) sys_execve_wrapper: add r3, sp, #S_OFF b sys_execve +ENDPROC(sys_execve_wrapper) sys_clone_wrapper: add ip, sp, #S_OFF str ip, [sp, #4] b sys_clone +ENDPROC(sys_clone_wrapper) sys_sigsuspend_wrapper: add r3, sp, #S_OFF b sys_sigsuspend +ENDPROC(sys_sigsuspend_wrapper) sys_rt_sigsuspend_wrapper: add r2, sp, #S_OFF b sys_rt_sigsuspend +ENDPROC(sys_rt_sigsuspend_wrapper) sys_sigreturn_wrapper: add r0, sp, #S_OFF b sys_sigreturn +ENDPROC(sys_sigreturn_wrapper) sys_rt_sigreturn_wrapper: add r0, sp, #S_OFF b sys_rt_sigreturn +ENDPROC(sys_rt_sigreturn_wrapper) sys_sigaltstack_wrapper: ldr r2, [sp, #S_OFF + S_SP] b do_sigaltstack +ENDPROC(sys_sigaltstack_wrapper) sys_statfs64_wrapper: teq r1, #88 moveq r1, #84 b sys_statfs64 +ENDPROC(sys_statfs64_wrapper) sys_fstatfs64_wrapper: teq r1, #88 moveq r1, #84 b sys_fstatfs64 +ENDPROC(sys_fstatfs64_wrapper) /* * Note: off_4k (r5) is always units of 4K. If we can't do the requested @@ -402,11 +415,14 @@ sys_mmap2: str r5, [sp, #4] b do_mmap2 #endif +ENDPROC(sys_mmap2) ENTRY(pabort_ifar) mrc p15, 0, r0, cr6, cr0, 2 ENTRY(pabort_noifar) mov pc, lr +ENDPROC(pabort_ifar) +ENDPROC(pabort_noifar) #ifdef CONFIG_OABI_COMPAT @@ -417,26 +433,31 @@ ENTRY(pabort_noifar) sys_oabi_pread64: stmia sp, {r3, r4} b sys_pread64 +ENDPROC(sys_oabi_pread64) sys_oabi_pwrite64: stmia sp, {r3, r4} b sys_pwrite64 +ENDPROC(sys_oabi_pwrite64) sys_oabi_truncate64: mov r3, r2 mov r2, r1 b sys_truncate64 +ENDPROC(sys_oabi_truncate64) sys_oabi_ftruncate64: mov r3, r2 mov r2, r1 b sys_ftruncate64 +ENDPROC(sys_oabi_ftruncate64) sys_oabi_readahead: str r3, [sp] mov r3, r2 mov r2, r1 b sys_readahead +ENDPROC(sys_oabi_readahead) /* * Let's declare a second syscall table for old ABI binaries diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index e8e90346f11..36f81d96797 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -45,7 +45,6 @@ #include <asm/fiq.h> #include <asm/irq.h> #include <asm/system.h> -#include <asm/uaccess.h> static unsigned long no_fiq_insn; diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index 1c3c6ea5f9e..bde52df1c66 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S @@ -36,7 +36,6 @@ __switch_data: * r2 = atags pointer * r9 = processor ID */ - .type __mmap_switched, %function __mmap_switched: adr r3, __switch_data + 4 @@ -59,6 +58,7 @@ __mmap_switched: bic r4, r0, #CR_A @ Clear 'A' bit stmia r7, {r0, r4} @ Save control register values b start_kernel +ENDPROC(__mmap_switched) /* * Exception handling. Something went wrong and we can't proceed. We @@ -69,8 +69,6 @@ __mmap_switched: * and hope for the best (useful if bootloader fails to pass a proper * machine ID for example). */ - - .type __error_p, %function __error_p: #ifdef CONFIG_DEBUG_LL adr r0, str_p1 @@ -84,8 +82,8 @@ str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" str_p2: .asciz ").\n" .align #endif +ENDPROC(__error_p) - .type __error_a, %function __error_a: #ifdef CONFIG_DEBUG_LL mov r4, r1 @ preserve machine ID @@ -115,13 +113,14 @@ __error_a: adr r0, str_a3 bl printascii b __error +ENDPROC(__error_a) + str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x" str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n" str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" .align #endif - .type __error, %function __error: #ifdef CONFIG_ARCH_RPC /* @@ -138,6 +137,7 @@ __error: #endif 1: mov r0, r0 b 1b +ENDPROC(__error) /* @@ -153,7 +153,6 @@ __error: * r5 = proc_info pointer in physical address space * r9 = cpuid (preserved) */ - .type __lookup_processor_type, %function __lookup_processor_type: adr r3, 3f ldmda r3, {r5 - r7} @@ -169,6 +168,7 @@ __lookup_processor_type: blo 1b mov r5, #0 @ unknown processor 2: mov pc, lr +ENDPROC(__lookup_processor_type) /* * This provides a C-API version of the above function. @@ -179,6 +179,7 @@ ENTRY(lookup_processor_type) bl __lookup_processor_type mov r0, r5 ldmfd sp!, {r4 - r7, r9, pc} +ENDPROC(lookup_processor_type) /* * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for @@ -201,7 +202,6 @@ ENTRY(lookup_processor_type) * r3, r4, r6 corrupted * r5 = mach_info pointer in physical address space */ - .type __lookup_machine_type, %function __lookup_machine_type: adr r3, 3b ldmia r3, {r4, r5, r6} @@ -216,6 +216,7 @@ __lookup_machine_type: blo 1b mov r5, #0 @ unknown machine 2: mov pc, lr +ENDPROC(__lookup_machine_type) /* * This provides a C-API version of the above function. @@ -226,6 +227,7 @@ ENTRY(lookup_machine_type) bl __lookup_machine_type mov r0, r5 ldmfd sp!, {r4 - r6, pc} +ENDPROC(lookup_machine_type) /* Determine validity of the r2 atags pointer. The heuristic requires * that the pointer be aligned, in the first 16k of physical RAM and @@ -239,8 +241,6 @@ ENTRY(lookup_machine_type) * r2 either valid atags pointer, or zero * r5, r6 corrupted */ - - .type __vet_atags, %function __vet_atags: tst r2, #0x3 @ aligned? bne 1f @@ -257,3 +257,4 @@ __vet_atags: 1: mov r2, #0 mov pc, lr +ENDPROC(__vet_atags) diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index 27329bd3203..cc87e1765ed 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -33,7 +33,6 @@ * */ .section ".text.head", "ax" - .type stext, %function ENTRY(stext) msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled @@ -53,11 +52,11 @@ ENTRY(stext) @ the initialization is done adr lr, __after_proc_init @ return (PIC) address add pc, r10, #PROCINFO_INITFUNC +ENDPROC(stext) /* * Set the Control Register and Read the process ID. */ - .type __after_proc_init, %function __after_proc_init: #ifdef CONFIG_CPU_CP15 mrc p15, 0, r0, c1, c0, 0 @ read control reg @@ -85,6 +84,7 @@ __after_proc_init: mov pc, r13 @ clear the BSS and jump @ to start_kernel +ENDPROC(__after_proc_init) .ltorg #include "head-common.S" diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index bff4c6e90dd..21e17dc94cb 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -75,7 +75,6 @@ * circumstances, zImage) is for. */ .section ".text.head", "ax" - .type stext, %function ENTRY(stext) msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode @ and irqs disabled @@ -100,9 +99,9 @@ ENTRY(stext) @ mmu has been enabled adr lr, __enable_mmu @ return (PIC) address add pc, r10, #PROCINFO_INITFUNC +ENDPROC(stext) #if defined(CONFIG_SMP) - .type secondary_startup, #function ENTRY(secondary_startup) /* * Common entry point for secondary CPUs. @@ -128,6 +127,7 @@ ENTRY(secondary_startup) adr lr, __enable_mmu @ return address add pc, r10, #PROCINFO_INITFUNC @ initialise processor @ (return control reg) +ENDPROC(secondary_startup) /* * r6 = &secondary_data @@ -136,6 +136,7 @@ ENTRY(__secondary_switched) ldr sp, [r7, #4] @ get secondary_data.stack mov fp, #0 b secondary_start_kernel +ENDPROC(__secondary_switched) .type __secondary_data, %object __secondary_data: @@ -151,7 +152,6 @@ __secondary_data: * this is just loading the page table pointer and domain access * registers. */ - .type __enable_mmu, %function __enable_mmu: #ifdef CONFIG_ALIGNMENT_TRAP orr r0, r0, #CR_A @@ -174,6 +174,7 @@ __enable_mmu: mcr p15, 0, r5, c3, c0, 0 @ load domain access register mcr p15, 0, r4, c2, c0, 0 @ load page table pointer b __turn_mmu_on +ENDPROC(__enable_mmu) /* * Enable the MMU. This completely changes the structure of the visible @@ -187,7 +188,6 @@ __enable_mmu: * other registers depend on the function called upon completion */ .align 5 - .type __turn_mmu_on, %function __turn_mmu_on: mov r0, r0 mcr p15, 0, r0, c1, c0, 0 @ write control reg @@ -195,7 +195,7 @@ __turn_mmu_on: mov r3, r3 mov r3, r3 mov pc, r13 - +ENDPROC(__turn_mmu_on) /* @@ -211,7 +211,6 @@ __turn_mmu_on: * r0, r3, r6, r7 corrupted * r4 = physical page table address */ - .type __create_page_tables, %function __create_page_tables: pgtbl r4 @ page table address @@ -325,6 +324,7 @@ __create_page_tables: #endif #endif mov pc, lr +ENDPROC(__create_page_tables) .ltorg #include "head-common.S" diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c index 8b8c9d38a76..0bbf8062539 100644 --- a/arch/arm/kernel/init_task.c +++ b/arch/arm/kernel/init_task.c @@ -8,8 +8,8 @@ #include <linux/init.h> #include <linux/init_task.h> #include <linux/mqueue.h> +#include <linux/uaccess.h> -#include <asm/uaccess.h> #include <asm/pgtable.h> static struct fs_struct init_fs = INIT_FS; diff --git a/arch/arm/kernel/io.c b/arch/arm/kernel/io.c index 1f6822dfae7..f4470307edb 100644 --- a/arch/arm/kernel/io.c +++ b/arch/arm/kernel/io.c @@ -1,7 +1,6 @@ #include <linux/module.h> #include <linux/types.h> - -#include <asm/io.h> +#include <linux/io.h> /* * Copy data from IO memory space to "real" memory space. diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index f88efb135b7..2f3eb795fa6 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -112,18 +112,17 @@ static struct irq_desc bad_irq_desc = { asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); - struct irq_desc *desc = irq_desc + irq; + + irq_enter(); /* * Some hardware gives randomly wrong interrupts. Rather * than crashing, do something sensible. */ if (irq >= NR_IRQS) - desc = &bad_irq_desc; - - irq_enter(); - - desc_handle_irq(irq, desc); + handle_bad_irq(irq, &bad_irq_desc); + else + generic_handle_irq(irq); /* AT91 specific workaround */ irq_finish(irq); diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c index b4565bb133c..da1f94906a4 100644 --- a/arch/arm/kernel/kprobes-decode.c +++ b/arch/arm/kernel/kprobes-decode.c @@ -488,7 +488,7 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) if (!ubit) addr -= reg_count; - addr += (!pbit ^ !ubit); + addr += (!pbit == !ubit); reg_bit_vector = insn & 0xffff; while (reg_bit_vector) { @@ -503,7 +503,7 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) if (wbit) { if (!ubit) addr -= reg_count; - addr -= (!pbit ^ !ubit); + addr -= (!pbit == !ubit); regs->uregs[rn] = (long)addr; } } diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c index d28513f14d0..3f9abe0e9af 100644 --- a/arch/arm/kernel/kprobes.c +++ b/arch/arm/kernel/kprobes.c @@ -200,9 +200,12 @@ void __kprobes kprobe_handler(struct pt_regs *regs) } } -int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) +static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) { + unsigned long flags; + local_irq_save(flags); kprobe_handler(regs); + local_irq_restore(flags); return 0; } diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index fae5beb3c3d..440dc62cdc3 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -6,10 +6,10 @@ #include <linux/kexec.h> #include <linux/delay.h> #include <linux/reboot.h> +#include <linux/io.h> #include <asm/pgtable.h> #include <asm/pgalloc.h> #include <asm/mmu_context.h> -#include <asm/io.h> #include <asm/cacheflush.h> #include <asm/mach-types.h> diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index a68259a0ccc..9203ba7d58e 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -47,7 +47,7 @@ void *module_alloc(unsigned long size) if (!area) return NULL; - return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); + return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC); } #else /* CONFIG_MMU */ void *module_alloc(unsigned long size) diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 3fd88233706..d3ea6fa8952 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -28,12 +28,12 @@ #include <linux/pm.h> #include <linux/tick.h> #include <linux/utsname.h> +#include <linux/uaccess.h> #include <asm/leds.h> #include <asm/processor.h> #include <asm/system.h> #include <asm/thread_notify.h> -#include <asm/uaccess.h> #include <asm/mach/time.h> static const char *processor_modes[] = { @@ -267,35 +267,6 @@ void show_regs(struct pt_regs * regs) __backtrace(); } -void show_fpregs(struct user_fp *regs) -{ - int i; - - for (i = 0; i < 8; i++) { - unsigned long *p; - char type; - - p = (unsigned long *)(regs->fpregs + i); - - switch (regs->ftype[i]) { - case 1: type = 'f'; break; - case 2: type = 'd'; break; - case 3: type = 'e'; break; - default: type = '?'; break; - } - if (regs->init_flag) - type = '?'; - - printk(" f%d(%c): %08lx %08lx %08lx%c", - i, type, p[0], p[1], p[2], i & 1 ? '\n' : ' '); - } - - - printk("FPSR: %08lx FPCR: %08lx\n", - (unsigned long)regs->fpsr, - (unsigned long)regs->fpcr); -} - /* * Free current thread data structures etc.. */ @@ -414,7 +385,7 @@ unsigned long get_wchan(struct task_struct *p) do { if (fp < stack_start || fp > stack_end) return 0; - lr = pc_pointer (((unsigned long *)fp)[-1]); + lr = ((unsigned long *)fp)[-1]; if (!in_sched_functions(lr)) return lr; fp = *(unsigned long *) (fp - 12); diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 4b05dc5c102..df653ea5925 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -18,8 +18,8 @@ #include <linux/security.h> #include <linux/init.h> #include <linux/signal.h> +#include <linux/uaccess.h> -#include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/system.h> #include <asm/traps.h> @@ -126,7 +126,7 @@ ptrace_getrn(struct task_struct *child, unsigned long insn) val = get_user_reg(child, reg); if (reg == 15) - val = pc_pointer(val + 8); + val += 8; return val; } @@ -278,8 +278,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in else base -= aluop2; } - if (read_u32(child, base, &alt) == 0) - alt = pc_pointer(alt); + read_u32(child, base, &alt); } break; @@ -305,8 +304,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in base = ptrace_getrn(child, insn); - if (read_u32(child, base + nr_regs, &alt) == 0) - alt = pc_pointer(alt); + read_u32(child, base + nr_regs, &alt); break; } break; diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 2ca7038b67a..1f1eecca7f5 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -26,11 +26,13 @@ #include <linux/fs.h> #include <asm/cpu.h> +#include <asm/cputype.h> #include <asm/elf.h> #include <asm/procinfo.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/cacheflush.h> +#include <asm/cachetype.h> #include <asm/tlbflush.h> #include <asm/mach/arch.h> @@ -59,13 +61,14 @@ __setup("fpe=", fpe_setup); extern void paging_init(struct meminfo *, struct machine_desc *desc); extern void reboot_setup(char *str); -extern int root_mountflags; -extern void _stext, _text, _etext, __data_start, _edata, _end; +extern void _text, _etext, __data_start, _edata, _end; unsigned int processor_id; EXPORT_SYMBOL(processor_id); unsigned int __machine_arch_type; EXPORT_SYMBOL(__machine_arch_type); +unsigned int cacheid; +EXPORT_SYMBOL(cacheid); unsigned int __atags_pointer __initdata; @@ -81,8 +84,6 @@ EXPORT_SYMBOL(system_serial_high); unsigned int elf_hwcap; EXPORT_SYMBOL(elf_hwcap); -unsigned long __initdata vmalloc_reserve = 128 << 20; - #ifdef MULTI_CPU struct processor processor; @@ -111,9 +112,6 @@ static struct stack stacks[NR_CPUS]; char elf_platform[ELF_PLATFORM_SIZE]; EXPORT_SYMBOL(elf_platform); -unsigned long phys_initrd_start __initdata = 0; -unsigned long phys_initrd_size __initdata = 0; - static struct meminfo meminfo __initdata = { 0, }; static const char *cpu_name; static const char *machine_name; @@ -178,63 +176,6 @@ static struct resource io_res[] = { #define lp1 io_res[1] #define lp2 io_res[2] -static const char *cache_types[16] = { - "write-through", - "write-back", - "write-back", - "undefined 3", - "undefined 4", - "undefined 5", - "write-back", - "write-back", - "undefined 8", - "undefined 9", - "undefined 10", - "undefined 11", - "undefined 12", - "undefined 13", - "write-back", - "undefined 15", -}; - -static const char *cache_clean[16] = { - "not required", - "read-block", - "cp15 c7 ops", - "undefined 3", - "undefined 4", - "undefined 5", - "cp15 c7 ops", - "cp15 c7 ops", - "undefined 8", - "undefined 9", - "undefined 10", - "undefined 11", - "undefined 12", - "undefined 13", - "cp15 c7 ops", - "undefined 15", -}; - -static const char *cache_lockdown[16] = { - "not supported", - "not supported", - "not supported", - "undefined 3", - "undefined 4", - "undefined 5", - "format A", - "format B", - "undefined 8", - "undefined 9", - "undefined 10", - "undefined 11", - "undefined 12", - "undefined 13", - "format C", - "undefined 15", -}; - static const char *proc_arch[] = { "undefined/unknown", "3", @@ -255,61 +196,19 @@ static const char *proc_arch[] = { "?(17)", }; -#define CACHE_TYPE(x) (((x) >> 25) & 15) -#define CACHE_S(x) ((x) & (1 << 24)) -#define CACHE_DSIZE(x) (((x) >> 12) & 4095) /* only if S=1 */ -#define CACHE_ISIZE(x) ((x) & 4095) - -#define CACHE_SIZE(y) (((y) >> 6) & 7) -#define CACHE_ASSOC(y) (((y) >> 3) & 7) -#define CACHE_M(y) ((y) & (1 << 2)) -#define CACHE_LINE(y) ((y) & 3) - -static inline void dump_cache(const char *prefix, int cpu, unsigned int cache) -{ - unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); - - printk("CPU%u: %s: %d bytes, associativity %d, %d byte lines, %d sets\n", - cpu, prefix, - mult << (8 + CACHE_SIZE(cache)), - (mult << CACHE_ASSOC(cache)) >> 1, - 8 << CACHE_LINE(cache), - 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) - - CACHE_LINE(cache))); -} - -static void __init dump_cpu_info(int cpu) -{ - unsigned int info = read_cpuid(CPUID_CACHETYPE); - - if (info != processor_id) { - printk("CPU%u: D %s %s cache\n", cpu, cache_is_vivt() ? "VIVT" : "VIPT", - cache_types[CACHE_TYPE(info)]); - if (CACHE_S(info)) { - dump_cache("I cache", cpu, CACHE_ISIZE(info)); - dump_cache("D cache", cpu, CACHE_DSIZE(info)); - } else { - dump_cache("cache", cpu, CACHE_ISIZE(info)); - } - } - - if (arch_is_coherent()) - printk("Cache coherency enabled\n"); -} - int cpu_architecture(void) { int cpu_arch; - if ((processor_id & 0x0008f000) == 0) { + if ((read_cpuid_id() & 0x0008f000) == 0) { cpu_arch = CPU_ARCH_UNKNOWN; - } else if ((processor_id & 0x0008f000) == 0x00007000) { - cpu_arch = (processor_id & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; - } else if ((processor_id & 0x00080000) == 0x00000000) { - cpu_arch = (processor_id >> 16) & 7; + } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { + cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3; + } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) { + cpu_arch = (read_cpuid_id() >> 16) & 7; if (cpu_arch) cpu_arch += CPU_ARCH_ARMv3; - } else if ((processor_id & 0x000f0000) == 0x000f0000) { + } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { unsigned int mmfr0; /* Revised CPUID format. Read the Memory Model Feature @@ -330,6 +229,34 @@ int cpu_architecture(void) return cpu_arch; } +static void __init cacheid_init(void) +{ + unsigned int cachetype = read_cpuid_cachetype(); + unsigned int arch = cpu_architecture(); + + if (arch >= CPU_ARCH_ARMv7) { + cacheid = CACHEID_VIPT_NONALIASING; + if ((cachetype & (3 << 14)) == 1 << 14) + cacheid |= CACHEID_ASID_TAGGED; + } else if (arch >= CPU_ARCH_ARMv6) { + if (cachetype & (1 << 23)) + cacheid = CACHEID_VIPT_ALIASING; + else + cacheid = CACHEID_VIPT_NONALIASING; + } else { + cacheid = CACHEID_VIVT; + } + + printk("CPU: %s data cache, %s instruction cache\n", + cache_is_vivt() ? "VIVT" : + cache_is_vipt_aliasing() ? "VIPT aliasing" : + cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown", + cache_is_vivt() ? "VIVT" : + icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : + cache_is_vipt_aliasing() ? "VIPT aliasing" : + cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); +} + /* * These functions re-use the assembly code in head.S, which * already provide the required functionality. @@ -346,10 +273,10 @@ static void __init setup_processor(void) * types. The linker builds this table for us from the * entries in arch/arm/mm/proc-*.S */ - list = lookup_processor_type(processor_id); + list = lookup_processor_type(read_cpuid_id()); if (!list) { printk("CPU configuration botched (ID %08x), unable " - "to continue.\n", processor_id); + "to continue.\n", read_cpuid_id()); while (1); } @@ -369,7 +296,7 @@ static void __init setup_processor(void) #endif printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", - cpu_name, processor_id, (int)processor_id & 15, + cpu_name, read_cpuid_id(), read_cpuid_id() & 15, proc_arch[cpu_architecture()], cr_alignment); sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); @@ -379,14 +306,14 @@ static void __init setup_processor(void) elf_hwcap &= ~HWCAP_THUMB; #endif + cacheid_init(); cpu_proc_init(); } /* * cpu_init - initialise one CPU. * - * cpu_init dumps the cache information, initialises SMP specific - * information, and sets up the per-CPU stacks. + * cpu_init sets up the per-CPU stacks. */ void cpu_init(void) { @@ -398,9 +325,6 @@ void cpu_init(void) BUG(); } - if (system_state == SYSTEM_BOOTING) - dump_cpu_info(cpu); - /* * setup stacks for re-entrant exception handlers */ @@ -443,20 +367,6 @@ static struct machine_desc * __init setup_machine(unsigned int nr) return list; } -static void __init early_initrd(char **p) -{ - unsigned long start, size; - - start = memparse(*p, p); - if (**p == ',') { - size = memparse((*p) + 1, p); - - phys_initrd_start = start; - phys_initrd_size = size; - } -} -__early_param("initrd=", early_initrd); - static void __init arm_add_memory(unsigned long start, unsigned long size) { struct membank *bank; @@ -503,17 +413,6 @@ static void __init early_mem(char **p) __early_param("mem=", early_mem); /* - * vmalloc=size forces the vmalloc area to be exactly 'size' - * bytes. This can be used to increase (or decrease) the vmalloc - * area - the default is 128m. - */ -static void __init early_vmalloc(char **arg) -{ - vmalloc_reserve = memparse(*arg, arg); -} -__early_param("vmalloc=", early_vmalloc); - -/* * Initial parsing of the command line. */ static void __init parse_cmdline(char **cmdline_p, char *from) @@ -527,12 +426,12 @@ static void __init parse_cmdline(char **cmdline_p, char *from) struct early_params *p; for (p = &__early_begin; p < &__early_end; p++) { - int len = strlen(p->arg); + int arglen = strlen(p->arg); - if (memcmp(from, p->arg, len) == 0) { + if (memcmp(from, p->arg, arglen) == 0) { if (to != command_line) to -= 1; - from += len; + from += arglen; p->fn(&from); while (*from != ' ' && *from != '\0') @@ -579,18 +478,13 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc) kernel_data.end = virt_to_phys(&_end - 1); for (i = 0; i < mi->nr_banks; i++) { - unsigned long virt_start, virt_end; - if (mi->bank[i].size == 0) continue; - virt_start = __phys_to_virt(mi->bank[i].start); - virt_end = virt_start + mi->bank[i].size - 1; - res = alloc_bootmem_low(sizeof(*res)); res->name = "System RAM"; - res->start = __virt_to_phys(virt_start); - res->end = __virt_to_phys(virt_end); + res->start = mi->bank[i].start; + res->end = mi->bank[i].start + mi->bank[i].size - 1; res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; request_resource(&iomem_resource, res); @@ -694,26 +588,6 @@ static int __init parse_tag_ramdisk(const struct tag *tag) __tagtable(ATAG_RAMDISK, parse_tag_ramdisk); -static int __init parse_tag_initrd(const struct tag *tag) -{ - printk(KERN_WARNING "ATAG_INITRD is deprecated; " - "please update your bootloader.\n"); - phys_initrd_start = __virt_to_phys(tag->u.initrd.start); - phys_initrd_size = tag->u.initrd.size; - return 0; -} - -__tagtable(ATAG_INITRD, parse_tag_initrd); - -static int __init parse_tag_initrd2(const struct tag *tag) -{ - phys_initrd_start = tag->u.initrd.start; - phys_initrd_size = tag->u.initrd.size; - return 0; -} - -__tagtable(ATAG_INITRD2, parse_tag_initrd2); - static int __init parse_tag_serialnr(const struct tag *tag) { system_serial_low = tag->u.serialnr.low; @@ -901,28 +775,12 @@ static const char *hwcap_str[] = { NULL }; -static void -c_show_cache(struct seq_file *m, const char *type, unsigned int cache) -{ - unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); - - seq_printf(m, "%s size\t\t: %d\n" - "%s assoc\t\t: %d\n" - "%s line length\t: %d\n" - "%s sets\t\t: %d\n", - type, mult << (8 + CACHE_SIZE(cache)), - type, (mult << CACHE_ASSOC(cache)) >> 1, - type, 8 << CACHE_LINE(cache), - type, 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) - - CACHE_LINE(cache))); -} - static int c_show(struct seq_file *m, void *v) { int i; seq_printf(m, "Processor\t: %s rev %d (%s)\n", - cpu_name, (int)processor_id & 15, elf_platform); + cpu_name, read_cpuid_id() & 15, elf_platform); #if defined(CONFIG_SMP) for_each_online_cpu(i) { @@ -949,47 +807,26 @@ static int c_show(struct seq_file *m, void *v) if (elf_hwcap & (1 << i)) seq_printf(m, "%s ", hwcap_str[i]); - seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24); + seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]); - if ((processor_id & 0x0008f000) == 0x00000000) { + if ((read_cpuid_id() & 0x0008f000) == 0x00000000) { /* pre-ARM7 */ - seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4); + seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4); } else { - if ((processor_id & 0x0008f000) == 0x00007000) { + if ((read_cpuid_id() & 0x0008f000) == 0x00007000) { /* ARM7 */ seq_printf(m, "CPU variant\t: 0x%02x\n", - (processor_id >> 16) & 127); + (read_cpuid_id() >> 16) & 127); } else { /* post-ARM7 */ seq_printf(m, "CPU variant\t: 0x%x\n", - (processor_id >> 20) & 15); + (read_cpuid_id() >> 20) & 15); } seq_printf(m, "CPU part\t: 0x%03x\n", - (processor_id >> 4) & 0xfff); - } - seq_printf(m, "CPU revision\t: %d\n", processor_id & 15); - - { - unsigned int cache_info = read_cpuid(CPUID_CACHETYPE); - if (cache_info != processor_id) { - seq_printf(m, "Cache type\t: %s\n" - "Cache clean\t: %s\n" - "Cache lockdown\t: %s\n" - "Cache format\t: %s\n", - cache_types[CACHE_TYPE(cache_info)], - cache_clean[CACHE_TYPE(cache_info)], - cache_lockdown[CACHE_TYPE(cache_info)], - CACHE_S(cache_info) ? "Harvard" : "Unified"); - - if (CACHE_S(cache_info)) { - c_show_cache(m, "I", CACHE_ISIZE(cache_info)); - c_show_cache(m, "D", CACHE_DSIZE(cache_info)); - } else { - c_show_cache(m, "Cache", CACHE_ISIZE(cache_info)); - } - } + (read_cpuid_id() >> 4) & 0xfff); } + seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); seq_puts(m, "\n"); diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index ef2f86a5e78..80b8b5c7e07 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -11,11 +11,11 @@ #include <linux/signal.h> #include <linux/personality.h> #include <linux/freezer.h> +#include <linux/uaccess.h> #include <asm/elf.h> #include <asm/cacheflush.h> #include <asm/ucontext.h> -#include <asm/uaccess.h> #include <asm/unistd.h> #include "ptrace.h" diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index e9842f6767f..e42a749a56d 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -277,6 +277,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) /* * Enable local interrupts. */ + notify_cpu_starting(cpu); local_irq_enable(); local_fiq_enable(); diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index 0128687ba0f..b3ec641b5cf 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c @@ -27,8 +27,7 @@ #include <linux/file.h> #include <linux/utsname.h> #include <linux/ipc.h> - -#include <asm/uaccess.h> +#include <linux/uaccess.h> extern unsigned long do_mremap(unsigned long addr, unsigned long old_len, unsigned long new_len, unsigned long flags, diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c index 96ab5f52949..42623db7f87 100644 --- a/arch/arm/kernel/sys_oabi-compat.c +++ b/arch/arm/kernel/sys_oabi-compat.c @@ -82,7 +82,7 @@ #include <linux/socket.h> #include <linux/net.h> #include <linux/ipc.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> struct oldabi_stat64 { unsigned long long st_dev; diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 368d171754c..c68b44aa88d 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -59,7 +59,7 @@ unsigned long profile_pc(struct pt_regs *regs) if (in_lock_functions(pc)) { fp = regs->ARM_fp; - pc = pc_pointer(((unsigned long *)fp)[-1]); + pc = ((unsigned long *)fp)[-1]; } return pc; diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 872f1f8fbb5..57e6874d0b8 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -19,15 +19,13 @@ #include <linux/kallsyms.h> #include <linux/delay.h> #include <linux/init.h> -#include <linux/kprobes.h> +#include <linux/uaccess.h> #include <asm/atomic.h> #include <asm/cacheflush.h> #include <asm/system.h> -#include <asm/uaccess.h> #include <asm/unistd.h> #include <asm/traps.h> -#include <asm/io.h> #include "ptrace.h" #include "signal.h" @@ -69,7 +67,8 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long */ static int verify_stack(unsigned long sp) { - if (sp < PAGE_OFFSET || (sp > (unsigned long)high_memory && high_memory != 0)) + if (sp < PAGE_OFFSET || + (sp > (unsigned long)high_memory && high_memory != NULL)) return -EFAULT; return 0; @@ -328,17 +327,6 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) get_user(instr, (u32 __user *)pc); } -#ifdef CONFIG_KPROBES - /* - * It is possible to have recursive kprobes, so we can't call - * the kprobe trap handler with the undef_lock held. - */ - if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) { - kprobe_trap_handler(regs, instr); - return; - } -#endif - if (call_undef_hook(regs, instr) == 0) return; diff --git a/arch/arm/kernel/xscale-cp0.c b/arch/arm/kernel/xscale-cp0.c index 180000bfdc8..17127db906f 100644 --- a/arch/arm/kernel/xscale-cp0.c +++ b/arch/arm/kernel/xscale-cp0.c @@ -14,8 +14,8 @@ #include <linux/signal.h> #include <linux/sched.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/thread_notify.h> -#include <asm/io.h> static inline void dsp_save_state(u32 *state) { diff --git a/arch/arm/lib/ashldi3.S b/arch/arm/lib/ashldi3.S index 55e57a1c2e6..1154d924080 100644 --- a/arch/arm/lib/ashldi3.S +++ b/arch/arm/lib/ashldi3.S @@ -47,3 +47,5 @@ ENTRY(__aeabi_llsl) mov al, al, lsl r2 mov pc, lr +ENDPROC(__ashldi3) +ENDPROC(__aeabi_llsl) diff --git a/arch/arm/lib/ashrdi3.S b/arch/arm/lib/ashrdi3.S index 0b31398f89b..9f8b35572f8 100644 --- a/arch/arm/lib/ashrdi3.S +++ b/arch/arm/lib/ashrdi3.S @@ -47,3 +47,5 @@ ENTRY(__aeabi_lasr) mov ah, ah, asr r2 mov pc, lr +ENDPROC(__ashrdi3) +ENDPROC(__aeabi_lasr) diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index 84dc890d2bf..b0951d0e8b2 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S @@ -30,6 +30,8 @@ ENTRY(c_backtrace) #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) mov pc, lr +ENDPROC(__backtrace) +ENDPROC(c_backtrace) #else stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... movs frame, r0 @ if frame pointer is zero @@ -103,6 +105,8 @@ for_each_frame: tst frame, mask @ Check for address exceptions mov r1, frame bl printk no_frame: ldmfd sp!, {r4 - r8, pc} +ENDPROC(__backtrace) +ENDPROC(c_backtrace) .section __ex_table,"a" .align 3 diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S index 389567c2409..80f3115cbee 100644 --- a/arch/arm/lib/changebit.S +++ b/arch/arm/lib/changebit.S @@ -19,3 +19,5 @@ ENTRY(_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_change_bit_le) bitop eor +ENDPROC(_change_bit_be) +ENDPROC(_change_bit_le) diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S index ecb28dcdaf7..4d6bc71231f 100644 --- a/arch/arm/lib/clear_user.S +++ b/arch/arm/lib/clear_user.S @@ -41,9 +41,10 @@ USER( strplt r2, [r0], #4) USER( strnebt r2, [r0], #1) USER( strnebt r2, [r0], #1) tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 -USER( strnebt r2, [r0], #1) +USER( strnebt r2, [r0]) mov r0, #0 ldmfd sp!, {r1, pc} +ENDPROC(__clear_user) .section .fixup,"ax" .align 0 diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S index 34751653302..1a63e43a1df 100644 --- a/arch/arm/lib/clearbit.S +++ b/arch/arm/lib/clearbit.S @@ -20,3 +20,5 @@ ENTRY(_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_clear_bit_le) bitop bic +ENDPROC(_clear_bit_be) +ENDPROC(_clear_bit_le) diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S index 6b7363ce749..56799a165cc 100644 --- a/arch/arm/lib/copy_from_user.S +++ b/arch/arm/lib/copy_from_user.S @@ -87,6 +87,8 @@ ENTRY(__copy_from_user) #include "copy_template.S" +ENDPROC(__copy_from_user) + .section .fixup,"ax" .align 0 copy_abort_preamble diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S index 666c99cc074..6ae04db1ca4 100644 --- a/arch/arm/lib/copy_page.S +++ b/arch/arm/lib/copy_page.S @@ -44,3 +44,4 @@ ENTRY(copy_page) PLD( ldmeqia r1!, {r3, r4, ip, lr} ) PLD( beq 2b ) ldmfd sp!, {r4, pc} @ 3 +ENDPROC(copy_page) diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S index 5224d94688d..22f968bbdff 100644 --- a/arch/arm/lib/copy_to_user.S +++ b/arch/arm/lib/copy_to_user.S @@ -90,6 +90,8 @@ ENTRY(__copy_to_user) #include "copy_template.S" +ENDPROC(__copy_to_user) + .section .fixup,"ax" .align 0 copy_abort_preamble diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S index 9621469beec..3ac6ef01bc4 100644 --- a/arch/arm/lib/csumipv6.S +++ b/arch/arm/lib/csumipv6.S @@ -29,4 +29,5 @@ ENTRY(__csum_ipv6_magic) adcs r0, r0, r2 adcs r0, r0, #0 ldmfd sp!, {pc} +ENDPROC(__csum_ipv6_magic) diff --git a/arch/arm/lib/csumpartial.S b/arch/arm/lib/csumpartial.S index a78dae5a7b2..31d3cb34740 100644 --- a/arch/arm/lib/csumpartial.S +++ b/arch/arm/lib/csumpartial.S @@ -139,3 +139,4 @@ ENTRY(csum_partial) tst len, #0x1c bne 4b b .Lless4 +ENDPROC(csum_partial) diff --git a/arch/arm/lib/csumpartialcopy.S b/arch/arm/lib/csumpartialcopy.S index 21effe0dbf9..d03fc71fc88 100644 --- a/arch/arm/lib/csumpartialcopy.S +++ b/arch/arm/lib/csumpartialcopy.S @@ -18,13 +18,11 @@ */ .macro save_regs - mov ip, sp - stmfd sp!, {r1, r4 - r8, fp, ip, lr, pc} - sub fp, ip, #4 + stmfd sp!, {r1, r4 - r8, lr} .endm .macro load_regs - ldmfd sp, {r1, r4 - r8, fp, sp, pc} + ldmfd sp!, {r1, r4 - r8, pc} .endm .macro load1b, reg1 @@ -50,5 +48,6 @@ .endm #define FN_ENTRY ENTRY(csum_partial_copy_nocheck) +#define FN_EXIT ENDPROC(csum_partial_copy_nocheck) #include "csumpartialcopygeneric.S" diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S index c50e8f5285d..d620a5f22a0 100644 --- a/arch/arm/lib/csumpartialcopygeneric.S +++ b/arch/arm/lib/csumpartialcopygeneric.S @@ -329,3 +329,4 @@ FN_ENTRY adcs sum, sum, r4, push #24 mov r5, r4, get_byte_1 b .Lexit +FN_EXIT diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S index c3b93e22ea2..14677fb4b0c 100644 --- a/arch/arm/lib/csumpartialcopyuser.S +++ b/arch/arm/lib/csumpartialcopyuser.S @@ -18,13 +18,11 @@ .text .macro save_regs - mov ip, sp - stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc} - sub fp, ip, #4 + stmfd sp!, {r1, r2, r4 - r8, lr} .endm .macro load_regs - ldmfd sp, {r1, r2, r4-r8, fp, sp, pc} + ldmfd sp!, {r1, r2, r4 - r8, pc} .endm .macro load1b, reg1 @@ -82,6 +80,7 @@ */ #define FN_ENTRY ENTRY(csum_partial_copy_from_user) +#define FN_EXIT ENDPROC(csum_partial_copy_from_user) #include "csumpartialcopygeneric.S" diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S index 930a7025922..8d6a8762ab8 100644 --- a/arch/arm/lib/delay.S +++ b/arch/arm/lib/delay.S @@ -60,3 +60,6 @@ ENTRY(__delay) #endif bhi __delay mov pc, lr +ENDPROC(__udelay) +ENDPROC(__const_udelay) +ENDPROC(__delay) diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S index 58eef660762..1425e789ba8 100644 --- a/arch/arm/lib/div64.S +++ b/arch/arm/lib/div64.S @@ -198,3 +198,4 @@ ENTRY(__do_div64) mov xh, #0 ldr pc, [sp], #8 +ENDPROC(__do_div64) diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S index a5ca0248aa4..8c4defc4f3c 100644 --- a/arch/arm/lib/findbit.S +++ b/arch/arm/lib/findbit.S @@ -33,6 +33,7 @@ ENTRY(_find_first_zero_bit_le) blo 1b 3: mov r0, r1 @ no free bits mov pc, lr +ENDPROC(_find_first_zero_bit_le) /* * Purpose : Find next 'zero' bit @@ -50,6 +51,7 @@ ENTRY(_find_next_zero_bit_le) orr r2, r2, #7 @ if zero, then no bits here add r2, r2, #1 @ align bit pointer b 2b @ loop for next bit +ENDPROC(_find_next_zero_bit_le) /* * Purpose : Find a 'one' bit @@ -67,6 +69,7 @@ ENTRY(_find_first_bit_le) blo 1b 3: mov r0, r1 @ no free bits mov pc, lr +ENDPROC(_find_first_bit_le) /* * Purpose : Find next 'one' bit @@ -83,6 +86,7 @@ ENTRY(_find_next_bit_le) orr r2, r2, #7 @ if zero, then no bits here add r2, r2, #1 @ align bit pointer b 2b @ loop for next bit +ENDPROC(_find_next_bit_le) #ifdef __ARMEB__ @@ -99,6 +103,7 @@ ENTRY(_find_first_zero_bit_be) blo 1b 3: mov r0, r1 @ no free bits mov pc, lr +ENDPROC(_find_first_zero_bit_be) ENTRY(_find_next_zero_bit_be) teq r1, #0 @@ -113,6 +118,7 @@ ENTRY(_find_next_zero_bit_be) orr r2, r2, #7 @ if zero, then no bits here add r2, r2, #1 @ align bit pointer b 2b @ loop for next bit +ENDPROC(_find_next_zero_bit_be) ENTRY(_find_first_bit_be) teq r1, #0 @@ -127,6 +133,7 @@ ENTRY(_find_first_bit_be) blo 1b 3: mov r0, r1 @ no free bits mov pc, lr +ENDPROC(_find_first_bit_be) ENTRY(_find_next_bit_be) teq r1, #0 @@ -140,6 +147,7 @@ ENTRY(_find_next_bit_be) orr r2, r2, #7 @ if zero, then no bits here add r2, r2, #1 @ align bit pointer b 2b @ loop for next bit +ENDPROC(_find_next_bit_be) #endif diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S index 2034d4dbe6a..6763088b760 100644 --- a/arch/arm/lib/getuser.S +++ b/arch/arm/lib/getuser.S @@ -26,16 +26,16 @@ * Note that ADDR_LIMIT is either 0 or 0xc0000000. * Note also that it is intended that __get_user_bad is not global. */ +#include <linux/linkage.h> #include <asm/errno.h> - .global __get_user_1 -__get_user_1: +ENTRY(__get_user_1) 1: ldrbt r2, [r0] mov r0, #0 mov pc, lr +ENDPROC(__get_user_1) - .global __get_user_2 -__get_user_2: +ENTRY(__get_user_2) 2: ldrbt r2, [r0], #1 3: ldrbt r3, [r0] #ifndef __ARMEB__ @@ -45,17 +45,19 @@ __get_user_2: #endif mov r0, #0 mov pc, lr +ENDPROC(__get_user_2) - .global __get_user_4 -__get_user_4: +ENTRY(__get_user_4) 4: ldrt r2, [r0] mov r0, #0 mov pc, lr +ENDPROC(__get_user_4) __get_user_bad: mov r2, #0 mov r0, #-EFAULT mov pc, lr +ENDPROC(__get_user_bad) .section __ex_table, "a" .long 1b, __get_user_bad diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S index fb966ad0276..9f4238987fe 100644 --- a/arch/arm/lib/io-readsb.S +++ b/arch/arm/lib/io-readsb.S @@ -120,3 +120,4 @@ ENTRY(__raw_readsb) strgtb r3, [r1] ldmfd sp!, {r4 - r6, pc} +ENDPROC(__raw_readsb) diff --git a/arch/arm/lib/io-readsl.S b/arch/arm/lib/io-readsl.S index 75a9121cb23..5fb97e7f9f4 100644 --- a/arch/arm/lib/io-readsl.S +++ b/arch/arm/lib/io-readsl.S @@ -76,3 +76,4 @@ ENTRY(__raw_readsl) 8: mov r3, ip, get_byte_0 strb r3, [r1, #0] mov pc, lr +ENDPROC(__raw_readsl) diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S index 4db1c5f0b21..1f393d42593 100644 --- a/arch/arm/lib/io-readsw-armv4.S +++ b/arch/arm/lib/io-readsw-armv4.S @@ -128,3 +128,4 @@ ENTRY(__raw_readsw) _BE_ONLY_( movne ip, ip, lsr #24 ) strneb ip, [r1] ldmfd sp!, {r4, pc} +ENDPROC(__raw_readsw) diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S index 7eba2b6cc69..68b92f4acae 100644 --- a/arch/arm/lib/io-writesb.S +++ b/arch/arm/lib/io-writesb.S @@ -91,3 +91,4 @@ ENTRY(__raw_writesb) strgtb r3, [r0] ldmfd sp!, {r4, r5, pc} +ENDPROC(__raw_writesb) diff --git a/arch/arm/lib/io-writesl.S b/arch/arm/lib/io-writesl.S index f8f14dd227c..8d3b7813725 100644 --- a/arch/arm/lib/io-writesl.S +++ b/arch/arm/lib/io-writesl.S @@ -64,3 +64,4 @@ ENTRY(__raw_writesl) str ip, [r0] bne 6b mov pc, lr +ENDPROC(__raw_writesl) diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S index c8e85bd653b..d6585612c86 100644 --- a/arch/arm/lib/io-writesw-armv4.S +++ b/arch/arm/lib/io-writesw-armv4.S @@ -94,3 +94,4 @@ ENTRY(__raw_writesw) 3: movne ip, r3, lsr #8 strneh ip, [r0] mov pc, lr +ENDPROC(__raw_writesw) diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S index 4e492f4b3f0..67964bcfc85 100644 --- a/arch/arm/lib/lib1funcs.S +++ b/arch/arm/lib/lib1funcs.S @@ -230,6 +230,8 @@ ENTRY(__aeabi_uidiv) mov r0, r0, lsr r2 mov pc, lr +ENDPROC(__udivsi3) +ENDPROC(__aeabi_uidiv) ENTRY(__umodsi3) @@ -245,6 +247,7 @@ ENTRY(__umodsi3) mov pc, lr +ENDPROC(__umodsi3) ENTRY(__divsi3) ENTRY(__aeabi_idiv) @@ -284,6 +287,8 @@ ENTRY(__aeabi_idiv) rsbmi r0, r0, #0 mov pc, lr +ENDPROC(__divsi3) +ENDPROC(__aeabi_idiv) ENTRY(__modsi3) @@ -305,6 +310,8 @@ ENTRY(__modsi3) rsbmi r0, r0, #0 mov pc, lr +ENDPROC(__modsi3) + #ifdef CONFIG_AEABI ENTRY(__aeabi_uidivmod) @@ -316,6 +323,8 @@ ENTRY(__aeabi_uidivmod) sub r1, r1, r3 mov pc, lr +ENDPROC(__aeabi_uidivmod) + ENTRY(__aeabi_idivmod) stmfd sp!, {r0, r1, ip, lr} @@ -325,6 +334,8 @@ ENTRY(__aeabi_idivmod) sub r1, r1, r3 mov pc, lr +ENDPROC(__aeabi_idivmod) + #endif Ldiv0: diff --git a/arch/arm/lib/lshrdi3.S b/arch/arm/lib/lshrdi3.S index a86dbdd59cc..99ea338bf87 100644 --- a/arch/arm/lib/lshrdi3.S +++ b/arch/arm/lib/lshrdi3.S @@ -47,3 +47,5 @@ ENTRY(__aeabi_llsr) mov ah, ah, lsr r2 mov pc, lr +ENDPROC(__lshrdi3) +ENDPROC(__aeabi_llsr) diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S index e7ab1ea8eba..1da86991d70 100644 --- a/arch/arm/lib/memchr.S +++ b/arch/arm/lib/memchr.S @@ -23,3 +23,4 @@ ENTRY(memchr) sub r0, r0, #1 2: movne r0, #0 mov pc, lr +ENDPROC(memchr) diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S index 7e71d6708a8..e0d002641d3 100644 --- a/arch/arm/lib/memcpy.S +++ b/arch/arm/lib/memcpy.S @@ -57,3 +57,4 @@ ENTRY(memcpy) #include "copy_template.S" +ENDPROC(memcpy) diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S index 2e301b7bd8f..12549187088 100644 --- a/arch/arm/lib/memmove.S +++ b/arch/arm/lib/memmove.S @@ -196,3 +196,4 @@ ENTRY(memmove) 18: backward_copy_shift push=24 pull=8 +ENDPROC(memmove) diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index b477d4ac88e..761eefa7624 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -124,3 +124,4 @@ ENTRY(memset) tst r2, #1 strneb r1, [r0], #1 mov pc, lr +ENDPROC(memset) diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S index b8f79d80ee9..3fbdef5f802 100644 --- a/arch/arm/lib/memzero.S +++ b/arch/arm/lib/memzero.S @@ -122,3 +122,4 @@ ENTRY(__memzero) tst r1, #1 @ 1 a byte left over strneb r2, [r0], #1 @ 1 mov pc, lr @ 1 +ENDPROC(__memzero) diff --git a/arch/arm/lib/muldi3.S b/arch/arm/lib/muldi3.S index d89c6061579..36c91b4957e 100644 --- a/arch/arm/lib/muldi3.S +++ b/arch/arm/lib/muldi3.S @@ -43,3 +43,5 @@ ENTRY(__aeabi_lmul) adc xh, xh, ip, lsr #16 mov pc, lr +ENDPROC(__muldi3) +ENDPROC(__aeabi_lmul) diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S index 08ec7dffa52..864f3c1c4f1 100644 --- a/arch/arm/lib/putuser.S +++ b/arch/arm/lib/putuser.S @@ -26,16 +26,16 @@ * Note that ADDR_LIMIT is either 0 or 0xc0000000 * Note also that it is intended that __put_user_bad is not global. */ +#include <linux/linkage.h> #include <asm/errno.h> - .global __put_user_1 -__put_user_1: +ENTRY(__put_user_1) 1: strbt r2, [r0] mov r0, #0 mov pc, lr +ENDPROC(__put_user_1) - .global __put_user_2 -__put_user_2: +ENTRY(__put_user_2) mov ip, r2, lsr #8 #ifndef __ARMEB__ 2: strbt r2, [r0], #1 @@ -46,23 +46,25 @@ __put_user_2: #endif mov r0, #0 mov pc, lr +ENDPROC(__put_user_2) - .global __put_user_4 -__put_user_4: +ENTRY(__put_user_4) 4: strt r2, [r0] mov r0, #0 mov pc, lr +ENDPROC(__put_user_4) - .global __put_user_8 -__put_user_8: +ENTRY(__put_user_8) 5: strt r2, [r0], #4 6: strt r3, [r0] mov r0, #0 mov pc, lr +ENDPROC(__put_user_8) __put_user_bad: mov r0, #-EFAULT mov pc, lr +ENDPROC(__put_user_bad) .section __ex_table, "a" .long 1b, __put_user_bad diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S index 83bc23d5b03..1dd7176c4b2 100644 --- a/arch/arm/lib/setbit.S +++ b/arch/arm/lib/setbit.S @@ -20,3 +20,5 @@ ENTRY(_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_set_bit_le) bitop orr +ENDPROC(_set_bit_be) +ENDPROC(_set_bit_le) diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S index 67c2bf4774b..a16fb208c84 100644 --- a/arch/arm/lib/sha1.S +++ b/arch/arm/lib/sha1.S @@ -185,6 +185,8 @@ ENTRY(sha_transform) ldmfd sp!, {r4 - r8, pc} +ENDPROC(sha_transform) + .L_sha_K: .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 @@ -204,3 +206,4 @@ ENTRY(sha_init) stmia r0, {r1, r2, r3, ip, lr} ldr pc, [sp], #4 +ENDPROC(sha_init) diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S index 9f18d6fdee6..d8f2a1c1aea 100644 --- a/arch/arm/lib/strchr.S +++ b/arch/arm/lib/strchr.S @@ -24,3 +24,4 @@ ENTRY(strchr) movne r0, #0 subeq r0, r0, #1 mov pc, lr +ENDPROC(strchr) diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S index 36e3741a377..330373c26dd 100644 --- a/arch/arm/lib/strncpy_from_user.S +++ b/arch/arm/lib/strncpy_from_user.S @@ -31,6 +31,7 @@ USER( ldrplbt r3, [r1], #1) sub r1, r1, #1 @ take NUL character out of count 2: sub r0, r1, ip mov pc, lr +ENDPROC(__strncpy_from_user) .section .fixup,"ax" .align 0 diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S index 18d8fa4f925..90bb9d02083 100644 --- a/arch/arm/lib/strnlen_user.S +++ b/arch/arm/lib/strnlen_user.S @@ -31,6 +31,7 @@ USER( ldrbt r3, [r0], #1) add r0, r0, #1 2: sub r0, r0, r2 mov pc, lr +ENDPROC(__strnlen_user) .section .fixup,"ax" .align 0 diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S index 538df220aa4..302f20cd242 100644 --- a/arch/arm/lib/strrchr.S +++ b/arch/arm/lib/strrchr.S @@ -23,3 +23,4 @@ ENTRY(strrchr) bne 1b mov r0, r3 mov pc, lr +ENDPROC(strrchr) diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S index b25dcd2be53..5c98dc567f0 100644 --- a/arch/arm/lib/testchangebit.S +++ b/arch/arm/lib/testchangebit.S @@ -16,3 +16,5 @@ ENTRY(_test_and_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_change_bit_le) testop eor, strb +ENDPROC(_test_and_change_bit_be) +ENDPROC(_test_and_change_bit_le) diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S index 2dcc4b16b68..543d7094d18 100644 --- a/arch/arm/lib/testclearbit.S +++ b/arch/arm/lib/testclearbit.S @@ -16,3 +16,5 @@ ENTRY(_test_and_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_clear_bit_le) testop bicne, strneb +ENDPROC(_test_and_clear_bit_be) +ENDPROC(_test_and_clear_bit_le) diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S index 9011c969761..0b3f390401c 100644 --- a/arch/arm/lib/testsetbit.S +++ b/arch/arm/lib/testsetbit.S @@ -16,3 +16,5 @@ ENTRY(_test_and_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_set_bit_le) testop orreq, streqb +ENDPROC(_test_and_set_bit_be) +ENDPROC(_test_and_set_bit_le) diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index b48bd6d5fd8..ffdd27498ce 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -277,6 +277,7 @@ USER( strgebt r3, [r0], #1) @ May fault ldrgtb r3, [r1], #0 USER( strgtbt r3, [r0], #1) @ May fault b .Lc2u_finished +ENDPROC(__copy_to_user) .section .fixup,"ax" .align 0 @@ -542,6 +543,7 @@ USER( ldrgebt r3, [r1], #1) @ May fault USER( ldrgtbt r3, [r1], #1) @ May fault strgtb r3, [r0], #1 b .Lcfu_finished +ENDPROC(__copy_from_user) .section .fixup,"ax" .align 0 diff --git a/arch/arm/lib/ucmpdi2.S b/arch/arm/lib/ucmpdi2.S index f76de07ac18..f0df6a91db0 100644 --- a/arch/arm/lib/ucmpdi2.S +++ b/arch/arm/lib/ucmpdi2.S @@ -33,6 +33,8 @@ ENTRY(__ucmpdi2) movhi r0, #2 mov pc, lr +ENDPROC(__ucmpdi2) + #ifdef CONFIG_AEABI ENTRY(__aeabi_ulcmp) @@ -44,5 +46,7 @@ ENTRY(__aeabi_ulcmp) movhi r0, #1 mov pc, lr +ENDPROC(__aeabi_ulcmp) + #endif diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a048b92cb40..5aafb2e2ca7 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -175,6 +175,15 @@ config MACH_SAM9_L9260 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. <http://www.olimex.com/dev/sam9-L9260.html> +config MACH_AFEB9260 + bool "Custom afeb9260 board v1" + depends on ARCH_AT91SAM9260 + help + Select this if you are using custom afeb9260 board based on + open hardware design. Select this for revision 1 of the board. + <svn://194.85.238.22/home/users/george/svn/arm9eb> + <http://groups.google.com/group/arm9fpga-evolution-board> + config MACH_USB_A9260 bool "CALAO USB-A9260" depends on ARCH_AT91SAM9260 @@ -314,6 +323,19 @@ config AT91_PROGRAMMABLE_CLOCKS Select this if you need to program one or more of the PCK0..PCK3 programmable clock outputs. +config AT91_SLOW_CLOCK + bool "Suspend-to-RAM disables main oscillator" + depends on SUSPEND + help + Select this if you want Suspend-to-RAM to save the most power + possible (without powering off the CPU) by disabling the PLLs + and main oscillator so that only the 32 KiHz clock is available. + + When only that slow-clock is available, some peripherals lose + functionality. Many can't issue wakeup events unless faster + clocks are available. Some lose their operating state and + need to be completely re-initialized. + config AT91_TIMER_HZ int "Kernel HZ (jiffies per second)" range 32 1024 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 7d641f97516..cca612d97ca 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_MACH_CAM60) += board-cam60.o obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o +obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o # AT91SAM9261 board-specific support obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o @@ -64,6 +65,7 @@ obj-y += leds.o # Power Management obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index 638948c1677..0fc0adaebd5 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c @@ -141,8 +141,8 @@ static struct clk tcb_clk = { .pmc_mask = 1 << AT91CAP9_ID_TCB, .type = CLK_TYPE_PERIPHERAL, }; -static struct clk pwmc_clk = { - .name = "pwmc_clk", +static struct clk pwm_clk = { + .name = "pwm_clk", .pmc_mask = 1 << AT91CAP9_ID_PWMC, .type = CLK_TYPE_PERIPHERAL, }; @@ -207,7 +207,7 @@ static struct clk *periph_clocks[] __initdata = { &ssc1_clk, &ac97_clk, &tcb_clk, - &pwmc_clk, + &pwm_clk, &macb_clk, &aestdes_clk, &adc_clk, diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index abb4aac8fa9..5ebd4273d35 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c @@ -719,6 +719,60 @@ static void __init at91_add_device_watchdog(void) {} /* -------------------------------------------------------------------- + * PWM + * --------------------------------------------------------------------*/ + +#if defined(CONFIG_ATMEL_PWM) +static u32 pwm_mask; + +static struct resource pwm_resources[] = { + [0] = { + .start = AT91CAP9_BASE_PWMC, + .end = AT91CAP9_BASE_PWMC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_PWMC, + .end = AT91CAP9_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_pwm0_device = { + .name = "atmel_pwm", + .id = -1, + .dev = { + .platform_data = &pwm_mask, + }, + .resource = pwm_resources, + .num_resources = ARRAY_SIZE(pwm_resources), +}; + +void __init at91_add_device_pwm(u32 mask) +{ + if (mask & (1 << AT91_PWM0)) + at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */ + + if (mask & (1 << AT91_PWM1)) + at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */ + + if (mask & (1 << AT91_PWM2)) + at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */ + + if (mask & (1 << AT91_PWM3)) + at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */ + + pwm_mask = mask; + + platform_device_register(&at91cap9_pwm0_device); +} +#else +void __init at91_add_device_pwm(u32 mask) {} +#endif + + + +/* -------------------------------------------------------------------- * AC97 * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 80bfab5680e..ada4b676910 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -129,8 +129,8 @@ static struct clk tcb_clk = { .pmc_mask = 1 << AT91SAM9263_ID_TCB, .type = CLK_TYPE_PERIPHERAL, }; -static struct clk pwmc_clk = { - .name = "pwmc_clk", +static struct clk pwm_clk = { + .name = "pwm_clk", .pmc_mask = 1 << AT91SAM9263_ID_PWMC, .type = CLK_TYPE_PERIPHERAL, }; @@ -187,7 +187,7 @@ static struct clk *periph_clocks[] __initdata = { &ssc1_clk, &ac97_clk, &tcb_clk, - &pwmc_clk, + &pwm_clk, &macb_clk, &twodge_clk, &udc_clk, diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index c93992f55dc..8b884083f76 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -886,6 +886,59 @@ static void __init at91_add_device_watchdog(void) {} /* -------------------------------------------------------------------- + * PWM + * --------------------------------------------------------------------*/ + +#if defined(CONFIG_ATMEL_PWM) +static u32 pwm_mask; + +static struct resource pwm_resources[] = { + [0] = { + .start = AT91SAM9263_BASE_PWMC, + .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_PWMC, + .end = AT91SAM9263_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9263_pwm0_device = { + .name = "atmel_pwm", + .id = -1, + .dev = { + .platform_data = &pwm_mask, + }, + .resource = pwm_resources, + .num_resources = ARRAY_SIZE(pwm_resources), +}; + +void __init at91_add_device_pwm(u32 mask) +{ + if (mask & (1 << AT91_PWM0)) + at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */ + + if (mask & (1 << AT91_PWM1)) + at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */ + + if (mask & (1 << AT91_PWM2)) + at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */ + + if (mask & (1 << AT91_PWM3)) + at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */ + + pwm_mask = mask; + + platform_device_register(&at91sam9263_pwm0_device); +} +#else +void __init at91_add_device_pwm(u32 mask) {} +#endif + + +/* -------------------------------------------------------------------- * SSC -- Synchronous Serial Controller * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 556bddf35b4..252e954b49f 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -131,8 +131,8 @@ static struct clk tc2_clk = { .pmc_mask = 1 << AT91SAM9RL_ID_TC2, .type = CLK_TYPE_PERIPHERAL, }; -static struct clk pwmc_clk = { - .name = "pwmc_clk", +static struct clk pwm_clk = { + .name = "pwm_clk", .pmc_mask = 1 << AT91SAM9RL_ID_PWMC, .type = CLK_TYPE_PERIPHERAL, }; @@ -180,7 +180,7 @@ static struct clk *periph_clocks[] __initdata = { &tc0_clk, &tc1_clk, &tc2_clk, - &pwmc_clk, + &pwm_clk, &tsc_clk, &dma_clk, &udphs_clk, diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 620886341fb..87deb1e1b52 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -527,6 +527,51 @@ static void __init at91_add_device_tc(void) { } /* -------------------------------------------------------------------- + * Touchscreen + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE) +static u64 tsadcc_dmamask = DMA_BIT_MASK(32); + +static struct resource tsadcc_resources[] = { + [0] = { + .start = AT91SAM9RL_BASE_TSC, + .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9RL_ID_TSC, + .end = AT91SAM9RL_ID_TSC, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device at91sam9rl_tsadcc_device = { + .name = "atmel_tsadcc", + .id = -1, + .dev = { + .dma_mask = &tsadcc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = tsadcc_resources, + .num_resources = ARRAY_SIZE(tsadcc_resources), +}; + +void __init at91_add_device_tsadcc(void) +{ + at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */ + at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */ + at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */ + at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */ + + platform_device_register(&at91sam9rl_tsadcc_device); +} +#else +void __init at91_add_device_tsadcc(void) {} +#endif + + +/* -------------------------------------------------------------------- * RTC * -------------------------------------------------------------------- */ @@ -592,6 +637,59 @@ static void __init at91_add_device_watchdog(void) {} /* -------------------------------------------------------------------- + * PWM + * --------------------------------------------------------------------*/ + +#if defined(CONFIG_ATMEL_PWM) +static u32 pwm_mask; + +static struct resource pwm_resources[] = { + [0] = { + .start = AT91SAM9RL_BASE_PWMC, + .end = AT91SAM9RL_BASE_PWMC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9RL_ID_PWMC, + .end = AT91SAM9RL_ID_PWMC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9rl_pwm0_device = { + .name = "atmel_pwm", + .id = -1, + .dev = { + .platform_data = &pwm_mask, + }, + .resource = pwm_resources, + .num_resources = ARRAY_SIZE(pwm_resources), +}; + +void __init at91_add_device_pwm(u32 mask) +{ + if (mask & (1 << AT91_PWM0)) + at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM0 */ + + if (mask & (1 << AT91_PWM1)) + at91_set_B_periph(AT91_PIN_PB9, 1); /* enable PWM1 */ + + if (mask & (1 << AT91_PWM2)) + at91_set_B_periph(AT91_PIN_PD5, 1); /* enable PWM2 */ + + if (mask & (1 << AT91_PWM3)) + at91_set_B_periph(AT91_PIN_PD8, 1); /* enable PWM3 */ + + pwm_mask = mask; + + platform_device_register(&at91sam9rl_pwm0_device); +} +#else +void __init at91_add_device_pwm(u32 mask) {} +#endif + + +/* -------------------------------------------------------------------- * SSC -- Synchronous Serial Controller * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index 869b5e28d19..dfff2895f4b 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c @@ -23,8 +23,8 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/time.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/time.h> #include <mach/at91_tc.h> diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c new file mode 100644 index 00000000000..9c040c78889 --- /dev/null +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -0,0 +1,210 @@ +/* + * linux/arch/arm/mach-at91/board-afeb-9260v1.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2006 Atmel + * Copyright (C) 2008 Sergey Lapin + * + * A custom board designed as open hardware; PCBs and various information + * is available at http://groups.google.com/group/arm9fpga-evolution-board/ + * Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/clk.h> +#include <linux/dma-mapping.h> + +#include <mach/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <mach/board.h> +#include <mach/gpio.h> + +#include "generic.h" + + +static void __init afeb9260_map_io(void) +{ + /* Initialize processor: 18.432 MHz crystal */ + at91sam9260_initialize(18432000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR + | ATMEL_UART_DCD | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init afeb9260_init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata afeb9260_usbh_data = { + .ports = 1, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata afeb9260_udc_data = { + .vbus_pin = AT91_PIN_PC5, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + + + +/* + * SPI devices. + */ +static struct spi_board_info afeb9260_spi_devices[] = { + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .chip_select = 1, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +}; + + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata afeb9260_macb_data = { + .phy_irq_pin = AT91_PIN_PA9, + .is_rmii = 0, +}; + + +/* + * NAND flash + */ +static struct mtd_partition __initdata afeb9260_nand_partition[] = { + { + .name = "bootloader", + .offset = 0, + .size = (640 * SZ_1K), + }, + { + .name = "kernel", + .offset = MTDPART_OFS_NXTBLK, + .size = SZ_2M, + }, + { + .name = "rootfs", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(afeb9260_nand_partition); + return afeb9260_nand_partition; +} + +static struct atmel_nand_data __initdata afeb9260_nand_data = { + .ale = 21, + .cle = 22, + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, + .partition_info = nand_partitions, + .bus_width_16 = 0, +}; + + +/* + * MCI (SD/MMC) + */ +static struct at91_mmc_data __initdata afeb9260_mmc_data = { + .slot_b = 1, + .wire4 = 1, +}; + + + +static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { + { + I2C_BOARD_INFO("fm3130", 0x68), + I2C_BOARD_INFO("24c64", 0x50), + }, +}; + +static void __init afeb9260_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&afeb9260_usbh_data); + /* USB Device */ + at91_add_device_udc(&afeb9260_udc_data); + /* SPI */ + at91_add_device_spi(afeb9260_spi_devices, + ARRAY_SIZE(afeb9260_spi_devices)); + /* NAND */ + at91_add_device_nand(&afeb9260_nand_data); + /* Ethernet */ + at91_add_device_eth(&afeb9260_macb_data); + + /* Standard function's pin assignments are not + * appropriate for us and generic code provide + * no API to configure these pins any other way */ + at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ + /* MMC */ + at91_add_device_mmc(0, &afeb9260_mmc_data); + /* I2C */ + at91_add_device_i2c(afeb9260_i2c_devices, + ARRAY_SIZE(afeb9260_i2c_devices)); +} + +MACHINE_START(AFEB9260, "Custom afeb9260 board") + /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = afeb9260_map_io, + .init_irq = afeb9260_init_irq, + .init_machine = afeb9260_board_init, +MACHINE_END + diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 196199552eb..201b89392dc 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -214,7 +214,7 @@ static struct physmap_flash_data cap9adk_nor_data = { }; #define NOR_BASE AT91_CHIPSELECT_0 -#define NOR_SIZE 0x800000 +#define NOR_SIZE SZ_8M static struct resource nor_flash_resources[] = { { diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index afa1ff0e957..db1f9544d2e 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -25,7 +25,6 @@ #include <linux/module.h> #include <linux/platform_device.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -34,6 +33,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> @@ -114,6 +114,30 @@ static struct spi_board_info carmeva_spi_devices[] = { }, }; +static struct gpio_led carmeva_leds[] = { + { /* "user led 1", LED9 */ + .name = "led9", + .gpio = AT91_PIN_PA21, + .active_low = 1, + .default_trigger = "heartbeat", + }, + { /* "user led 2", LED10 */ + .name = "led10", + .gpio = AT91_PIN_PA25, + .active_low = 1, + }, + { /* "user led 3", LED11 */ + .name = "led11", + .gpio = AT91_PIN_PA26, + .active_low = 1, + }, + { /* "user led 4", LED12 */ + .name = "led12", + .gpio = AT91_PIN_PA18, + .active_low = 1, + } +}; + static void __init carmeva_board_init(void) { /* Serial */ @@ -132,6 +156,8 @@ static void __init carmeva_board_init(void) // at91_add_device_cf(&carmeva_cf_data); /* MMC */ at91_add_device_mmc(0, &carmeva_mmc_data); + /* LEDs */ + at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds)); } MACHINE_START(CARMEVA, "Carmeva") diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index cb7c9a8fa48..fea2529ebcf 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -28,7 +28,6 @@ #include <linux/input.h> #include <linux/gpio_keys.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -37,6 +36,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> @@ -114,7 +114,7 @@ static struct spi_board_info csb337_spi_devices[] = { }; #define CSB_FLASH_BASE AT91_CHIPSELECT_0 -#define CSB_FLASH_SIZE 0x800000 +#define CSB_FLASH_SIZE SZ_8M static struct mtd_partition csb_flash_partitions[] = { { @@ -193,11 +193,11 @@ static struct platform_device csb300_button_device = { static void __init csb300_add_device_buttons(void) { - at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */ + at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */ at91_set_deglitch(AT91_PIN_PB29, 1); - at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */ + at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */ at91_set_deglitch(AT91_PIN_PB28, 1); - at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */ + at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */ at91_set_deglitch(AT91_PIN_PA21, 1); platform_device_register(&csb300_button_device); @@ -224,7 +224,7 @@ static struct gpio_led csb_leds[] = { .gpio = AT91_PIN_PB0, .active_low = 1, .default_trigger = "ide-disk", - }, + } }; diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 8db8bd8babd..cfa3f04b220 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -25,7 +25,6 @@ #include <linux/platform_device.h> #include <linux/mtd/physmap.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -34,6 +33,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> @@ -72,7 +72,7 @@ static struct at91_udc_data __initdata csb637_udc_data = { }; #define CSB_FLASH_BASE AT91_CHIPSELECT_0 -#define CSB_FLASH_SIZE 0x1000000 +#define CSB_FLASH_SIZE SZ_16M static struct mtd_partition csb_flash_partitions[] = { { diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c index 43e1aa7ecef..0fd0f5bc77e 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-dk.c @@ -29,7 +29,6 @@ #include <linux/spi/spi.h> #include <linux/mtd/physmap.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -38,6 +37,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91rm9200_mc.h> @@ -157,7 +157,7 @@ static struct atmel_nand_data __initdata dk_nand_data = { }; #define DK_FLASH_BASE AT91_CHIPSELECT_0 -#define DK_FLASH_SIZE 0x200000 +#define DK_FLASH_SIZE SZ_2M static struct physmap_flash_data dk_flash_data = { .width = 2, diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index bfeee8a2af2..1d69908617f 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -86,7 +86,7 @@ static struct mtd_partition __initdata my_flash0_partitions[] = { /* 0x8400 */ .name = "Darrell-loader", .offset = 0, - .size = 12* 1056, + .size = 12 * 1056, }, { .name = "U-boot", diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c index 60626e7a349..4cdfaac8e59 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-ek.c @@ -29,7 +29,6 @@ #include <linux/spi/spi.h> #include <linux/mtd/physmap.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -38,6 +37,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91rm9200_mc.h> @@ -116,7 +116,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = { }; #define EK_FLASH_BASE AT91_CHIPSELECT_0 -#define EK_FLASH_SIZE 0x200000 +#define EK_FLASH_SIZE SZ_2M static struct physmap_flash_data ek_flash_data = { .width = 2, diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index dbc912d633c..859727e7ea3 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -105,7 +105,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { // }; #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 -#define PICOTUX200_FLASH_SIZE 0x400000 +#define PICOTUX200_FLASH_SIZE SZ_4M static struct physmap_flash_data picotux200_flash_data = { .width = 2, diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 4c28413426c..cfb4571a2e2 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -30,7 +30,6 @@ #include <linux/input.h> #include <linux/clk.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -39,6 +38,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91_shdwc.h> @@ -119,18 +119,18 @@ static struct at91_eth_data __initdata ek_macb_data = { static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Uboot & Kernel", - .offset = 0x00000000, - .size = 16 * 1024 * 1024, + .offset = 0, + .size = SZ_16M, }, { .name = "Root FS", - .offset = 0x01000000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, }, { .name = "FS", - .offset = 0x08800000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, }, }; diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index e4910cb26c1..99bb4cc23a0 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -126,11 +126,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Bootloader Area", .offset = 0, - .size = 10 * 1024 * 1024, + .size = 10 * SZ_1M, }, { .name = "User Area", - .offset = 10 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index cb20e70b3b0..b49eb6e4918 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -27,8 +27,10 @@ #include <linux/spi/spi.h> #include <linux/spi/at73c213.h> #include <linux/clk.h> +#include <linux/i2c/at24.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -37,6 +39,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> @@ -163,11 +166,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Partition 1", .offset = 0, - .size = 256 * 1024, + .size = SZ_256K, }, { .name = "Partition 2", - .offset = 256 * 1024, + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; @@ -222,6 +225,73 @@ static struct gpio_led ek_leds[] = { } }; +/* + * I2C devices + */ +static struct at24_platform_data at24c512 = { + .byte_len = SZ_512K / 8, + .page_size = 128, + .flags = AT24_FLAG_ADDR16, +}; + +static struct i2c_board_info __initdata ek_i2c_devices[] = { + { + I2C_BOARD_INFO("24c512", 0x50), + .platform_data = &at24c512, + }, + /* more devices can be added using expansion connectors */ +}; + + +/* + * GPIO Buttons + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { + .gpio = AT91_PIN_PA30, + .code = BTN_3, + .desc = "Button 3", + .active_low = 1, + .wakeup = 1, + }, + { + .gpio = AT91_PIN_PA31, + .code = BTN_4, + .desc = "Button 4", + .active_low = 1, + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */ + at91_set_deglitch(AT91_PIN_PA30, 1); + at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */ + at91_set_deglitch(AT91_PIN_PA31, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + + static void __init ek_board_init(void) { /* Serial */ @@ -239,12 +309,14 @@ static void __init ek_board_init(void) /* MMC */ at91_add_device_mmc(0, &ek_mmc_data); /* I2C */ - at91_add_device_i2c(NULL, 0); + at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); /* SSC (to AT73C213) */ at73c213_set_clk(&at73c213_data); at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX); /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* Push Buttons */ + ek_add_device_buttons(); } MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 1a9963b811c..4977409d4fc 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -35,7 +35,6 @@ #include <video/atmel_lcdc.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -44,6 +43,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91sam9_smc.h> @@ -168,11 +168,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Partition 1", .offset = 0, - .size = 256 * 1024, + .size = SZ_256K, }, { .name = "Partition 2", - .offset = 256 * 1024 , + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; @@ -435,24 +435,28 @@ static struct gpio_keys_button ek_buttons[] = { .code = BTN_0, .desc = "Button 0", .active_low = 1, + .wakeup = 1, }, { .gpio = AT91_PIN_PA26, .code = BTN_1, .desc = "Button 1", .active_low = 1, + .wakeup = 1, }, { .gpio = AT91_PIN_PA25, .code = BTN_2, .desc = "Button 2", .active_low = 1, + .wakeup = 1, }, { .gpio = AT91_PIN_PA24, .code = BTN_3, .desc = "Button 3", .active_low = 1, + .wakeup = 1, } }; @@ -472,13 +476,13 @@ static struct platform_device ek_button_device = { static void __init ek_add_device_buttons(void) { - at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */ + at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */ at91_set_deglitch(AT91_PIN_PA27, 1); - at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */ + at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */ at91_set_deglitch(AT91_PIN_PA26, 1); - at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */ + at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */ at91_set_deglitch(AT91_PIN_PA25, 1); - at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */ + at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */ at91_set_deglitch(AT91_PIN_PA24, 1); platform_device_register(&ek_button_device); diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index b1d11960a73..8354015c6a2 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -26,13 +26,14 @@ #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> +#include <linux/i2c/at24.h> #include <linux/fb.h> #include <linux/gpio_keys.h> #include <linux/input.h> +#include <linux/leds.h> #include <video/atmel_lcdc.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -41,6 +42,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91sam9_smc.h> @@ -172,11 +174,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Partition 1", .offset = 0, - .size = 64 * 1024 * 1024, + .size = SZ_64M, }, { .name = "Partition 2", - .offset = 64 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; @@ -203,12 +205,30 @@ static struct atmel_nand_data __initdata ek_nand_data = { /* + * I2C devices + */ +static struct at24_platform_data at24c512 = { + .byte_len = SZ_512K / 8, + .page_size = 128, + .flags = AT24_FLAG_ADDR16, +}; + + +static struct i2c_board_info __initdata ek_i2c_devices[] = { + { + I2C_BOARD_INFO("24c512", 0x50), + .platform_data = &at24c512, + }, + /* more devices can be added using expansion connectors */ +}; + +/* * LCD Controller */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) static struct fb_videomode at91_tft_vga_modes[] = { { - .name = "TX09D50VM1CCA @ 60", + .name = "TX09D50VM1CCA @ 60", .refresh = 60, .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(4965), @@ -224,7 +244,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { static struct fb_monspecs at91fb_default_monspecs = { .manufacturer = "HIT", - .monitor = "TX09D70VM1CCA", + .monitor = "TX09D70VM1CCA", .modedb = at91_tft_vga_modes, .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), @@ -235,7 +255,7 @@ static struct fb_monspecs at91fb_default_monspecs = { }; #define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ - | ATMEL_LCDC_DISTYPE_TFT \ + | ATMEL_LCDC_DISTYPE_TFT \ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) static void at91_lcdc_power_control(int on) @@ -277,7 +297,7 @@ static struct gpio_keys_button ek_buttons[] = { .active_low = 1, .desc = "right_click", .wakeup = 1, - }, + } }; static struct gpio_keys_platform_data ek_button_data = { @@ -296,9 +316,9 @@ static struct platform_device ek_button_device = { static void __init ek_add_device_buttons(void) { - at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */ + at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */ at91_set_deglitch(AT91_PIN_PC5, 1); - at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */ + at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */ at91_set_deglitch(AT91_PIN_PC4, 1); platform_device_register(&ek_button_device); @@ -320,25 +340,32 @@ static struct atmel_ac97_data ek_ac97_data = { * LEDs ... these could all be PWM-driven, for variable brightness */ static struct gpio_led ek_leds[] = { - { /* "left" led, green, userled1, pwm1 */ - .name = "ds1", - .gpio = AT91_PIN_PB8, - .active_low = 1, - .default_trigger = "mmc0", - }, - { /* "right" led, green, userled2, pwm2 */ + { /* "right" led, green, userled2 (could be driven by pwm2) */ .name = "ds2", .gpio = AT91_PIN_PC29, .active_low = 1, .default_trigger = "nand-disk", }, - { /* "power" led, yellow, pwm0 */ + { /* "power" led, yellow (could be driven by pwm0) */ .name = "ds3", .gpio = AT91_PIN_PB7, .default_trigger = "heartbeat", } }; +/* + * PWM Leds + */ +static struct gpio_led ek_pwm_led[] = { + /* For now only DS1 is PWM-driven (by pwm1) */ + { + .name = "ds1", + .gpio = 1, /* is PWM channel number */ + .active_low = 1, + .default_trigger = "none", + } +}; + static void __init ek_board_init(void) { @@ -360,7 +387,7 @@ static void __init ek_board_init(void) /* NAND */ at91_add_device_nand(&ek_nand_data); /* I2C */ - at91_add_device_i2c(NULL, 0); + at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); /* LCD Controller */ at91_add_device_lcdc(&ek_lcdc_data); /* Push Buttons */ @@ -369,6 +396,7 @@ static void __init ek_board_init(void) at91_add_device_ac97(&ek_ac97_data); /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led)); } MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index d4eba5c0ce0..b588ead14d6 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -122,16 +122,16 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Bootstrap", .offset = 0, - .size = 4 * 1024 * 1024, + .size = 4 * SZ_1M, }, { .name = "Partition 1", - .offset = 4 * 1024 * 1024, - .size = 60 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 60 * SZ_1M, }, { .name = "Partition 2", - .offset = 64 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index c6dce49c388..27085186430 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -18,7 +18,6 @@ #include <video/atmel_lcdc.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -27,6 +26,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91sam9_smc.h> @@ -81,11 +81,11 @@ static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Partition 1", .offset = 0, - .size = 256 * 1024, + .size = SZ_256K, }, { .name = "Partition 2", - .offset = 256 * 1024 , + .offset = MTDPART_OFS_NXTBLK, .size = MTDPART_SIZ_FULL, }, }; @@ -195,6 +195,8 @@ static void __init ek_board_init(void) at91_add_device_mmc(0, &ek_mmc_data); /* LCD Controller */ at91_add_device_lcdc(&ek_lcdc_data); + /* Touch Screen Controller */ + at91_add_device_tsadcc(); } MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c index f9d0b65da40..7c350357333 100644 --- a/arch/arm/mach-at91/board-usb-a9260.c +++ b/arch/arm/mach-at91/board-usb-a9260.c @@ -30,7 +30,6 @@ #include <linux/input.h> #include <linux/clk.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -39,6 +38,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91_shdwc.h> @@ -93,18 +93,18 @@ static struct at91_eth_data __initdata ek_macb_data = { static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Uboot & Kernel", - .offset = 0x00000000, - .size = 16 * 1024 * 1024, + .offset = 0, + .size = SZ_16M, }, { .name = "Root FS", - .offset = 0x01000000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, }, { .name = "FS", - .offset = 0x08800000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, } }; diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c index 673e5c27214..391b566c457 100644 --- a/arch/arm/mach-at91/board-usb-a9263.c +++ b/arch/arm/mach-at91/board-usb-a9263.c @@ -29,7 +29,6 @@ #include <linux/gpio_keys.h> #include <linux/input.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -38,6 +37,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91_shdwc.h> @@ -106,18 +106,18 @@ static struct at91_eth_data __initdata ek_macb_data = { static struct mtd_partition __initdata ek_nand_partition[] = { { .name = "Linux Kernel", - .offset = 0x00000000, - .size = 16 * 1024 * 1024, + .offset = 0, + .size = SZ_16M, }, { .name = "Root FS", - .offset = 0x01000000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, }, { .name = "FS", - .offset = 0x08800000, - .size = 120 * 1024 * 1024, + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, } }; diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 36b380aad00..e22bf051f83 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -33,7 +33,6 @@ #include <linux/gpio_keys.h> #include <linux/input.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/irq.h> @@ -42,6 +41,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91rm9200_mc.h> @@ -150,27 +150,27 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = { { .name = "AT91 NAND partition 1, boot", .offset = 0, - .size = 1 * SZ_256K + .size = SZ_256K }, { .name = "AT91 NAND partition 2, kernel", - .offset = 1 * SZ_256K, - .size = 2 * SZ_1M - 1 * SZ_256K + .offset = MTDPART_OFS_NXTBLK, + .size = (2 * SZ_1M) - SZ_256K }, { .name = "AT91 NAND partition 3, filesystem", - .offset = 2 * SZ_1M, + .offset = MTDPART_OFS_NXTBLK, .size = 14 * SZ_1M }, { .name = "AT91 NAND partition 4, storage", - .offset = 16 * SZ_1M, - .size = 16 * SZ_1M + .offset = MTDPART_OFS_NXTBLK, + .size = SZ_16M }, { .name = "AT91 NAND partition 5, ext-fs", - .offset = 32 * SZ_1M, - .size = 32 * SZ_1M + .offset = MTDPART_OFS_NXTBLK, + .size = SZ_32M } }; @@ -193,24 +193,24 @@ static struct atmel_nand_data __initdata yl9200_nand_data = { * NOR Flash */ #define YL9200_FLASH_BASE AT91_CHIPSELECT_0 -#define YL9200_FLASH_SIZE 0x1000000 +#define YL9200_FLASH_SIZE SZ_16M static struct mtd_partition yl9200_flash_partitions[] = { { .name = "Bootloader", - .size = 0x00040000, .offset = 0, + .size = SZ_256K, .mask_flags = MTD_WRITEABLE, /* force read-only */ }, { .name = "Kernel", - .size = 0x001C0000, - .offset = 0x00040000, + .offset = MTDPART_OFS_NXTBLK, + .size = (2 * SZ_1M) - SZ_256K }, { .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00200000 + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL } }; @@ -390,10 +390,6 @@ static struct spi_board_info yl9200_spi_devices[] = { #if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) #include <video/s1d13xxxfb.h> -#define AT91_FB_REG_BASE 0x80000000L -#define AT91_FB_REG_SIZE 0x200 -#define AT91_FB_VMEM_BASE 0x80200000L -#define AT91_FB_VMEM_SIZE 0x200000L static void __init yl9200_init_video(void) { @@ -516,29 +512,33 @@ static struct s1d13xxxfb_regval yl9200_s1dfb_initregs[] = {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ }; -static u64 s1dfb_dmamask = DMA_BIT_MASK(32); - static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = { .initregs = yl9200_s1dfb_initregs, .initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs), .platform_init_video = yl9200_init_video, }; +#define YL9200_FB_REG_BASE AT91_CHIPSELECT_7 +#define YL9200_FB_VMEM_BASE YL9200_FB_REG_BASE + SZ_2M +#define YL9200_FB_VMEM_SIZE SZ_2M + static struct resource yl9200_s1dfb_resource[] = { [0] = { /* video mem */ .name = "s1d13xxxfb memory", - .start = AT91_FB_VMEM_BASE, - .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1, + .start = YL9200_FB_VMEM_BASE, + .end = YL9200_FB_VMEM_BASE + YL9200_FB_VMEM_SIZE -1, .flags = IORESOURCE_MEM, }, [1] = { /* video registers */ .name = "s1d13xxxfb registers", - .start = AT91_FB_REG_BASE, - .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1, + .start = YL9200_FB_REG_BASE, + .end = YL9200_FB_REG_BASE + SZ_512 -1, .flags = IORESOURCE_MEM, }, }; +static u64 s1dfb_dmamask = DMA_BIT_MASK(32); + static struct platform_device yl9200_s1dfb_device = { .name = "s1d13806fb", .id = -1, diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index f5c2847161f..e4345106ee5 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -22,8 +22,7 @@ #include <linux/spinlock.h> #include <linux/delay.h> #include <linux/clk.h> - -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <mach/at91_pmc.h> diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 8392d5b517f..7e5ebb5bdd1 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -18,8 +18,8 @@ #include <linux/kernel.h> #include <linux/list.h> #include <linux/module.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <mach/at91_pio.h> #include <mach/gpio.h> @@ -404,7 +404,6 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) } pin = bank->chipbase; - gpio = &irq_desc[pin]; while (isr) { if (isr & 1) { @@ -417,7 +416,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) gpio_irq_mask(pin); } else - desc_handle_irq(pin, gpio); + generic_handle_irq(pin); } pin++; gpio++; diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h index 0448ac36ead..974d0bd05b5 100644 --- a/arch/arm/mach-at91/include/mach/at91_pit.h +++ b/arch/arm/mach-at91/include/mach/at91_pit.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91_pit.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Periodic Interval Timer (PIT) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91_rstc.h b/arch/arm/mach-at91/include/mach/at91_rstc.h index 7cd1b39aaa4..cbd2bf052c1 100644 --- a/arch/arm/mach-at91/include/mach/at91_rstc.h +++ b/arch/arm/mach-at91/include/mach/at91_rstc.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91_rstc.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Reset Controller (RSTC) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h index 71782e5d215..7ec75de8bbb 100644 --- a/arch/arm/mach-at91/include/mach/at91_rtt.h +++ b/arch/arm/mach-at91/include/mach/at91_rtt.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91_rtt.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Real-time Timer (RTT) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index 60be5ae624f..c4ce07e8a8f 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91_shdwc.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Shutdown Controller (SHDWC) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h index 973b4526a98..fecc2e9f0ca 100644 --- a/arch/arm/mach-at91/include/mach/at91_wdt.h +++ b/arch/arm/mach-at91/include/mach/at91_wdt.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91_wdt.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Watchdog Timer (WDT) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h index bca878f3bd8..1499b1cbffd 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h @@ -1,6 +1,8 @@ /* * arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h * + * (C) 2008 Andrew Victor + * * DDR/SDR Controller (DDRSDRC) - System peripherals registers. * Based on AT91CAP9 datasheet revision B. * diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h index f027de5df95..020f02ed921 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h @@ -1,6 +1,8 @@ /* * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h * + * Copyright (C) 2007 Atmel Corporation. + * * Memory Controllers (MATRIX, EBI) - System peripherals registers. * Based on AT91SAM9260 datasheet revision B. * diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h index db62b1f1830..69c6501915d 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h @@ -1,6 +1,8 @@ /* * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h * + * Copyright (C) 2007 Atmel Corporation. + * * Memory Controllers (MATRIX, EBI) - System peripherals registers. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h index 1921181c63c..b7260389f7c 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91sam9_sdramc.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * SDRAM Controllers (SDRAMC) - System peripherals registers. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index ec6ad1338b5..57de6207e57 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h @@ -1,6 +1,9 @@ /* * arch/arm/mach-at91/include/mach/at91sam9_smc.h * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * * Static Memory Controllers (SMC) - System peripherals registers. * Based on AT91SAM9261 datasheet revision D. * diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index acd60f2a072..fb51f0e0a83 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -133,6 +133,16 @@ struct atmel_uart_data { extern void __init at91_add_device_serial(void); /* + * PWM + */ +#define AT91_PWM0 0 +#define AT91_PWM1 1 +#define AT91_PWM2 2 +#define AT91_PWM3 3 + +extern void __init at91_add_device_pwm(u32 mask); + +/* * SSC -- accessed through ssc_request(id). Drivers don't bind to SSC * platform devices. Their SSC ID is part of their configuration data, * along with information about which SSC signals they should use. @@ -162,9 +172,13 @@ extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); /* ISI */ extern void __init at91_add_device_isi(void); + /* Touchscreen Controller */ +extern void __init at91_add_device_tsadcc(void); + /* LEDs */ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); +extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); /* FIXME: this needs a better location, but gets stuff building again */ extern int at91_suspend_entering_slow_clock(void); diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h index bda29ccbcd9..36bd55f3fc6 100644 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ b/arch/arm/mach-at91/include/mach/irqs.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H -#include <asm/io.h> +#include <linux/io.h> #include <mach/at91_aic.h> #define NR_AIC_IRQS 32 diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 0410d548e9b..18bdcdeb474 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include <asm/io.h> +#include <linux/io.h> #include <linux/atmel_serial.h> #if defined(CONFIG_AT91_EARLY_DBGU) diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c index fec03c59ff9..0415a839e1a 100644 --- a/arch/arm/mach-at91/leds.c +++ b/arch/arm/mach-at91/leds.c @@ -12,6 +12,7 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> +#include <linux/platform_device.h> #include <mach/board.h> #include <mach/gpio.h> @@ -21,15 +22,13 @@ #if defined(CONFIG_NEW_LEDS) -#include <linux/platform_device.h> - /* * New cross-platform LED support. */ static struct gpio_led_platform_data led_data; -static struct platform_device at91_leds = { +static struct platform_device at91_gpio_leds_device = { .name = "leds-gpio", .id = -1, .dev.platform_data = &led_data, @@ -47,7 +46,7 @@ void __init at91_gpio_leds(struct gpio_led *leds, int nr) led_data.leds = leds; led_data.num_leds = nr; - platform_device_register(&at91_leds); + platform_device_register(&at91_gpio_leds_device); } #else @@ -57,6 +56,44 @@ void __init at91_gpio_leds(struct gpio_led *leds, int nr) {} /* ------------------------------------------------------------------------- */ +#if defined (CONFIG_LEDS_ATMEL_PWM) + +/* + * PWM Leds + */ + +static struct gpio_led_platform_data pwm_led_data; + +static struct platform_device at91_pwm_leds_device = { + .name = "leds-atmel-pwm", + .id = -1, + .dev.platform_data = &pwm_led_data, +}; + +void __init at91_pwm_leds(struct gpio_led *leds, int nr) +{ + int i; + u32 pwm_mask = 0; + + if (!nr) + return; + + for (i = 0; i < nr; i++) + pwm_mask |= (1 << leds[i].gpio); + + pwm_led_data.leds = leds; + pwm_led_data.num_leds = nr; + + at91_add_device_pwm(pwm_mask); + platform_device_register(&at91_pwm_leds_device); +} +#else +void __init at91_pwm_leds(struct gpio_led *leds, int nr){} +#endif + + +/* ------------------------------------------------------------------------- */ + #if defined(CONFIG_LEDS) #include <asm/leds.h> diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index ec2fe4ca1e2..9bb4f043aa2 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -17,8 +17,8 @@ #include <linux/sysfs.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/atomic.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S new file mode 100644 index 00000000000..987fab3d846 --- /dev/null +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -0,0 +1,283 @@ +/* + * arch/arm/mach-at91/pm_slow_clock.S + * + * Copyright (C) 2006 Savin Zlobec + * + * AT91SAM9 support: + * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/linkage.h> +#include <mach/hardware.h> +#include <mach/at91_pmc.h> + +#ifdef CONFIG_ARCH_AT91RM9200 +#include <mach/at91rm9200_mc.h> +#elif defined(CONFIG_ARCH_AT91CAP9) +#include <mach/at91cap9_ddrsdr.h> +#else +#include <mach/at91sam9_sdramc.h> +#endif + + +#ifdef CONFIG_ARCH_AT91SAM9263 +/* + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; + * handle those cases both here and in the Suspend-To-RAM support. + */ +#define AT91_SDRAMC AT91_SDRAMC0 +#warning Assuming EB1 SDRAM controller is *NOT* used +#endif + +/* + * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master + * clock during suspend by adjusting its prescalar and divisor. + * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there + * are errata regarding adjusting the prescalar and divisor. + */ +#undef SLOWDOWN_MASTER_CLOCK + +#define MCKRDY_TIMEOUT 1000 +#define MOSCRDY_TIMEOUT 1000 +#define PLLALOCK_TIMEOUT 1000 +#define PLLBLOCK_TIMEOUT 1000 + + +/* + * Wait until master clock is ready (after switching master clock source) + */ + .macro wait_mckrdy + mov r4, #MCKRDY_TIMEOUT +1: sub r4, r4, #1 + cmp r4, #0 + beq 2f + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] + tst r3, #AT91_PMC_MCKRDY + beq 1b +2: + .endm + +/* + * Wait until master oscillator has stabilized. + */ + .macro wait_moscrdy + mov r4, #MOSCRDY_TIMEOUT +1: sub r4, r4, #1 + cmp r4, #0 + beq 2f + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] + tst r3, #AT91_PMC_MOSCS + beq 1b +2: + .endm + +/* + * Wait until PLLA has locked. + */ + .macro wait_pllalock + mov r4, #PLLALOCK_TIMEOUT +1: sub r4, r4, #1 + cmp r4, #0 + beq 2f + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] + tst r3, #AT91_PMC_LOCKA + beq 1b +2: + .endm + +/* + * Wait until PLLB has locked. + */ + .macro wait_pllblock + mov r4, #PLLBLOCK_TIMEOUT +1: sub r4, r4, #1 + cmp r4, #0 + beq 2f + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)] + tst r3, #AT91_PMC_LOCKB + beq 1b +2: + .endm + + .text + +ENTRY(at91_slow_clock) + /* Save registers on stack */ + stmfd sp!, {r0 - r12, lr} + + /* + * Register usage: + * R1 = Base address of AT91_PMC + * R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200) + * R3 = temporary register + * R4 = temporary register + */ + ldr r1, .at91_va_base_pmc + ldr r2, .at91_va_base_sdramc + + /* Drain write buffer */ + mcr p15, 0, r0, c7, c10, 4 + +#ifdef CONFIG_ARCH_AT91RM9200 + /* Put SDRAM in self-refresh mode */ + mov r3, #1 + str r3, [r2, #AT91_SDRAMC_SRR] +#elif defined(CONFIG_ARCH_AT91CAP9) + /* Enable SDRAM self-refresh mode */ + ldr r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC] + str r3, .saved_sam9_lpr + + mov r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH + str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC] +#else + /* Enable SDRAM self-refresh mode */ + ldr r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC] + str r3, .saved_sam9_lpr + + mov r3, #AT91_SDRAMC_LPCB_SELF_REFRESH + str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC] +#endif + + /* Save Master clock setting */ + ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + str r3, .saved_mckr + + /* + * Set the Master clock source to slow clock + */ + bic r3, r3, #AT91_PMC_CSS + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + + wait_mckrdy + +#ifdef SLOWDOWN_MASTER_CLOCK + /* + * Set the Master Clock PRES and MDIV fields. + * + * See AT91RM9200 errata #27 and #28 for details. + */ + mov r3, #0 + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + + wait_mckrdy +#endif + + /* Save PLLA setting and disable it */ + ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] + str r3, .saved_pllar + + mov r3, #AT91_PMC_PLLCOUNT + orr r3, r3, #(1 << 29) /* bit 29 always set */ + str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] + + wait_pllalock + + /* Save PLLB setting and disable it */ + ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] + str r3, .saved_pllbr + + mov r3, #AT91_PMC_PLLCOUNT + str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] + + wait_pllblock + + /* Turn off the main oscillator */ + ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + bic r3, r3, #AT91_PMC_MOSCEN + str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + + /* Wait for interrupt */ + mcr p15, 0, r0, c7, c0, 4 + + /* Turn on the main oscillator */ + ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + orr r3, r3, #AT91_PMC_MOSCEN + str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] + + wait_moscrdy + + /* Restore PLLB setting */ + ldr r3, .saved_pllbr + str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] + + wait_pllblock + + /* Restore PLLA setting */ + ldr r3, .saved_pllar + str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] + + wait_pllalock + +#ifdef SLOWDOWN_MASTER_CLOCK + /* + * First set PRES if it was not 0, + * than set CSS and MDIV fields. + * + * See AT91RM9200 errata #27 and #28 for details. + */ + ldr r3, .saved_mckr + tst r3, #AT91_PMC_PRES + beq 2f + and r3, r3, #AT91_PMC_PRES + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + + wait_mckrdy +#endif + + /* + * Restore master clock setting + */ +2: ldr r3, .saved_mckr + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)] + + wait_mckrdy + +#ifdef CONFIG_ARCH_AT91RM9200 + /* Do nothing - self-refresh is automatically disabled. */ +#elif defined(CONFIG_ARCH_AT91CAP9) + /* Restore LPR on AT91CAP9 */ + ldr r3, .saved_sam9_lpr + str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC] +#else + /* Restore LPR on AT91SAM9 */ + ldr r3, .saved_sam9_lpr + str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC] +#endif + + /* Restore registers, and return */ + ldmfd sp!, {r0 - r12, pc} + + +.saved_mckr: + .word 0 + +.saved_pllar: + .word 0 + +.saved_pllbr: + .word 0 + +.saved_sam9_lpr: + .word 0 + +.at91_va_base_pmc: + .word AT91_VA_BASE_SYS + AT91_PMC + +#ifdef CONFIG_ARCH_AT91RM9200 +.at91_va_base_sdramc: + .word AT91_VA_BASE_SYS +#elif defined(CONFIG_ARCH_AT91CAP9) +.at91_va_base_sdramc: + .word AT91_VA_BASE_SYS + AT91_DDRSDRC +#else +.at91_va_base_sdramc: + .word AT91_VA_BASE_SYS + AT91_SDRAMC +#endif + +ENTRY(at91_slow_clock_sz) + .word .-at91_slow_clock diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index 474616dcd7a..5f18eccdc72 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c @@ -22,10 +22,10 @@ #include <linux/types.h> #include <linux/string.h> #include <linux/mm.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/sizes.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index aa02aa5a01f..71a80b5b8ad 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c @@ -22,9 +22,9 @@ #include <linux/types.h> #include <linux/string.h> #include <linux/mm.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/setup.h> diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h index a8eade40317..24e96159e3e 100644 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ b/arch/arm/mach-clps711x/include/mach/system.h @@ -20,9 +20,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +#include <linux/io.h> #include <mach/hardware.h> #include <asm/hardware/clps7111.h> -#include <asm/io.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c index 38623cfcac5..9a12d856228 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/irq.c @@ -19,10 +19,10 @@ */ #include <linux/init.h> #include <linux/list.h> +#include <linux/io.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/hardware/clps7111.h> diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c index 262c3c36145..15121446efc 100644 --- a/arch/arm/mach-clps711x/p720t-leds.c +++ b/arch/arm/mach-clps711x/p720t-leds.c @@ -21,9 +21,9 @@ */ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/system.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index f51f97d4f21..0d94a30fd6f 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -22,9 +22,9 @@ #include <linux/types.h> #include <linux/string.h> #include <linux/mm.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/setup.h> diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c index ef1fcd17189..d581ef0bcd2 100644 --- a/arch/arm/mach-clps711x/time.c +++ b/arch/arm/mach-clps711x/time.c @@ -21,11 +21,11 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/sched.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> #include <asm/leds.h> -#include <asm/io.h> #include <asm/hardware/clps7111.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index cc1b82179e8..c3a33b8a5aa 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/serial_8250.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -23,7 +24,6 @@ #include <mach/hardware.h> #include <asm/hardware/iomd.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h index e8da3c58df7..d02fcf28ee0 100644 --- a/arch/arm/mach-clps7500/include/mach/irq.h +++ b/arch/arm/mach-clps7500/include/mach/irq.h @@ -10,8 +10,8 @@ * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code */ +#include <linux/io.h> #include <asm/hardware/iomd.h> -#include <asm/io.h> static inline int fixup_irq(unsigned int irq) { diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h index 3326aa99d3e..87b32db470c 100644 --- a/arch/arm/mach-clps7500/include/mach/memory.h +++ b/arch/arm/mach-clps7500/include/mach/memory.h @@ -32,4 +32,12 @@ #define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE 0xdf000000 +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + #endif diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h index 624fc2830ae..6d325fbe8b0 100644 --- a/arch/arm/mach-clps7500/include/mach/system.h +++ b/arch/arm/mach-clps7500/include/mach/system.h @@ -6,8 +6,8 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +#include <linux/io.h> #include <asm/hardware/iomd.h> -#include <asm/io.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 99ac2e55774..4dc458597f4 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -5,7 +5,7 @@ # Common objects obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \ - gpio.o mux.o + gpio.o mux.o devices.o usb.o # Board specific obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c index 13435578781..a957d239a68 100644 --- a/arch/arm/mach-davinci/board-evm.c +++ b/arch/arm/mach-davinci/board-evm.c @@ -13,20 +13,28 @@ #include <linux/init.h> #include <linux/dma-mapping.h> #include <linux/platform_device.h> +#include <linux/gpio.h> +#include <linux/leds.h> + +#include <linux/i2c.h> +#include <linux/i2c/pcf857x.h> +#include <linux/i2c/at24.h> + #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> +#include <linux/io.h> #include <asm/setup.h> -#include <asm/io.h> #include <asm/mach-types.h> -#include <mach/hardware.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/flash.h> +#include <mach/hardware.h> #include <mach/common.h> +#include <mach/i2c.h> /* other misc. init functions */ void __init davinci_psc_init(void); @@ -34,10 +42,10 @@ void __init davinci_irq_init(void); void __init davinci_map_common_io(void); void __init davinci_init_common_hw(void); -/* NOR Flash base address set to CS0 by default */ -#define NOR_FLASH_PHYS 0x02000000 +#if defined(CONFIG_MTD_PHYSMAP) || \ + defined(CONFIG_MTD_PHYSMAP_MODULE) -static struct mtd_partition davinci_evm_partitions[] = { +static struct mtd_partition davinci_evm_norflash_partitions[] = { /* bootloader (U-Boot, etc) in first 4 sectors */ { .name = "bootloader", @@ -68,32 +76,323 @@ static struct mtd_partition davinci_evm_partitions[] = { } }; -static struct physmap_flash_data davinci_evm_flash_data = { +static struct physmap_flash_data davinci_evm_norflash_data = { .width = 2, - .parts = davinci_evm_partitions, - .nr_parts = ARRAY_SIZE(davinci_evm_partitions), + .parts = davinci_evm_norflash_partitions, + .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions), }; /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF * limits addresses to 16M, so using addresses past 16M will wrap */ -static struct resource davinci_evm_flash_resource = { - .start = NOR_FLASH_PHYS, - .end = NOR_FLASH_PHYS + SZ_16M - 1, +static struct resource davinci_evm_norflash_resource = { + .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, + .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, .flags = IORESOURCE_MEM, }; -static struct platform_device davinci_evm_flash_device = { +static struct platform_device davinci_evm_norflash_device = { .name = "physmap-flash", .id = 0, .dev = { - .platform_data = &davinci_evm_flash_data, + .platform_data = &davinci_evm_norflash_data, }, .num_resources = 1, - .resource = &davinci_evm_flash_resource, + .resource = &davinci_evm_norflash_resource, +}; + +#endif + +#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ + defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) + +static struct resource ide_resources[] = { + { + .start = DAVINCI_CFC_ATA_BASE, + .end = DAVINCI_CFC_ATA_BASE + 0x7ff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_IDE, + .end = IRQ_IDE, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ide_dma_mask = DMA_32BIT_MASK; + +static struct platform_device ide_dev = { + .name = "palm_bk3710", + .id = -1, + .resource = ide_resources, + .num_resources = ARRAY_SIZE(ide_resources), + .dev = { + .dma_mask = &ide_dma_mask, + .coherent_dma_mask = DMA_32BIT_MASK, + }, +}; + +#endif + +/*----------------------------------------------------------------------*/ + +/* + * I2C GPIO expanders + */ + +#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8)) + + +/* U2 -- LEDs */ + +static struct gpio_led evm_leds[] = { + { .name = "DS8", .active_low = 1, + .default_trigger = "heartbeat", }, + { .name = "DS7", .active_low = 1, }, + { .name = "DS6", .active_low = 1, }, + { .name = "DS5", .active_low = 1, }, + { .name = "DS4", .active_low = 1, }, + { .name = "DS3", .active_low = 1, }, + { .name = "DS2", .active_low = 1, + .default_trigger = "mmc0", }, + { .name = "DS1", .active_low = 1, + .default_trigger = "ide-disk", }, +}; + +static const struct gpio_led_platform_data evm_led_data = { + .num_leds = ARRAY_SIZE(evm_leds), + .leds = evm_leds, +}; + +static struct platform_device *evm_led_dev; + +static int +evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + struct gpio_led *leds = evm_leds; + int status; + + while (ngpio--) { + leds->gpio = gpio++; + leds++; + } + + /* what an extremely annoying way to be forced to handle + * device unregistration ... + */ + evm_led_dev = platform_device_alloc("leds-gpio", 0); + platform_device_add_data(evm_led_dev, + &evm_led_data, sizeof evm_led_data); + + evm_led_dev->dev.parent = &client->dev; + status = platform_device_add(evm_led_dev); + if (status < 0) { + platform_device_put(evm_led_dev); + evm_led_dev = NULL; + } + return status; +} + +static int +evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + if (evm_led_dev) { + platform_device_unregister(evm_led_dev); + evm_led_dev = NULL; + } + return 0; +} + +static struct pcf857x_platform_data pcf_data_u2 = { + .gpio_base = PCF_Uxx_BASE(0), + .setup = evm_led_setup, + .teardown = evm_led_teardown, +}; + + +/* U18 - A/V clock generator and user switch */ + +static int sw_gpio; + +static ssize_t +sw_show(struct device *d, struct device_attribute *a, char *buf) +{ + char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n"; + + strcpy(buf, s); + return strlen(s); +} + +static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL); + +static int +evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + int status; + + /* export dip switch option */ + sw_gpio = gpio + 7; + status = gpio_request(sw_gpio, "user_sw"); + if (status == 0) + status = gpio_direction_input(sw_gpio); + if (status == 0) + status = device_create_file(&client->dev, &dev_attr_user_sw); + else + gpio_free(sw_gpio); + if (status != 0) + sw_gpio = -EINVAL; + + /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */ + gpio_request(gpio + 3, "pll_fs2"); + gpio_direction_output(gpio + 3, 0); + + gpio_request(gpio + 2, "pll_fs1"); + gpio_direction_output(gpio + 2, 0); + + gpio_request(gpio + 1, "pll_sr"); + gpio_direction_output(gpio + 1, 0); + + return 0; +} + +static int +evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + gpio_free(gpio + 1); + gpio_free(gpio + 2); + gpio_free(gpio + 3); + + if (sw_gpio > 0) { + device_remove_file(&client->dev, &dev_attr_user_sw); + gpio_free(sw_gpio); + } + return 0; +} + +static struct pcf857x_platform_data pcf_data_u18 = { + .gpio_base = PCF_Uxx_BASE(1), + .n_latch = (1 << 3) | (1 << 2) | (1 << 1), + .setup = evm_u18_setup, + .teardown = evm_u18_teardown, }; + +/* U35 - various I/O signals used to manage USB, CF, ATA, etc */ + +static int +evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + /* p0 = nDRV_VBUS (initial: don't supply it) */ + gpio_request(gpio + 0, "nDRV_VBUS"); + gpio_direction_output(gpio + 0, 1); + + /* p1 = VDDIMX_EN */ + gpio_request(gpio + 1, "VDDIMX_EN"); + gpio_direction_output(gpio + 1, 1); + + /* p2 = VLYNQ_EN */ + gpio_request(gpio + 2, "VLYNQ_EN"); + gpio_direction_output(gpio + 2, 1); + + /* p3 = n3V3_CF_RESET (initial: stay in reset) */ + gpio_request(gpio + 3, "nCF_RESET"); + gpio_direction_output(gpio + 3, 0); + + /* (p4 unused) */ + + /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */ + gpio_request(gpio + 5, "WLAN_RESET"); + gpio_direction_output(gpio + 5, 1); + + /* p6 = nATA_SEL (initial: select) */ + gpio_request(gpio + 6, "nATA_SEL"); + gpio_direction_output(gpio + 6, 0); + + /* p7 = nCF_SEL (initial: deselect) */ + gpio_request(gpio + 7, "nCF_SEL"); + gpio_direction_output(gpio + 7, 1); + + return 0; +} + +static int +evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) +{ + gpio_free(gpio + 7); + gpio_free(gpio + 6); + gpio_free(gpio + 5); + gpio_free(gpio + 3); + gpio_free(gpio + 2); + gpio_free(gpio + 1); + gpio_free(gpio + 0); + return 0; +} + +static struct pcf857x_platform_data pcf_data_u35 = { + .gpio_base = PCF_Uxx_BASE(2), + .setup = evm_u35_setup, + .teardown = evm_u35_teardown, +}; + +/*----------------------------------------------------------------------*/ + +/* Most of this EEPROM is unused, but U-Boot uses some data: + * - 0x7f00, 6 bytes Ethernet Address + * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL) + * - ... newer boards may have more + */ +static struct at24_platform_data eeprom_info = { + .byte_len = (256*1024) / 8, + .page_size = 64, + .flags = AT24_FLAG_ADDR16, +}; + +static struct i2c_board_info __initdata i2c_info[] = { + { + I2C_BOARD_INFO("pcf8574", 0x38), + .platform_data = &pcf_data_u2, + }, + { + I2C_BOARD_INFO("pcf8574", 0x39), + .platform_data = &pcf_data_u18, + }, + { + I2C_BOARD_INFO("pcf8574", 0x3a), + .platform_data = &pcf_data_u35, + }, + { + I2C_BOARD_INFO("24c256", 0x50), + .platform_data = &eeprom_info, + }, + /* ALSO: + * - tvl320aic33 audio codec (0x1b) + * - msp430 microcontroller (0x23) + * - tvp5146 video decoder (0x5d) + */ +}; + +/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz), + * which requires 100 usec of idle bus after i2c writes sent to it. + */ +static struct davinci_i2c_platform_data i2c_pdata = { + .bus_freq = 20 /* kHz */, + .bus_delay = 100 /* usec */, +}; + +static void __init evm_init_i2c(void) +{ + davinci_init_i2c(&i2c_pdata); + i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); +} + static struct platform_device *davinci_evm_devices[] __initdata = { - &davinci_evm_flash_device, +#if defined(CONFIG_MTD_PHYSMAP) || \ + defined(CONFIG_MTD_PHYSMAP_MODULE) + &davinci_evm_norflash_device, +#endif +#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ + defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) + &ide_dev, +#endif }; static void __init @@ -106,13 +405,21 @@ static __init void davinci_evm_init(void) { davinci_psc_init(); -#if defined(CONFIG_BLK_DEV_DAVINCI) || defined(CONFIG_BLK_DEV_DAVINCI_MODULE) +#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ + defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) +#if defined(CONFIG_MTD_PHYSMAP) || \ + defined(CONFIG_MTD_PHYSMAP_MODULE) printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, " "but share pins.\n\t Disable IDE for NOR support.\n"); #endif +#endif platform_add_devices(davinci_evm_devices, ARRAY_SIZE(davinci_evm_devices)); + evm_init_i2c(); + + /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ + setup_usb(500, 8); } static __init void davinci_evm_irq_init(void) @@ -124,7 +431,7 @@ static __init void davinci_evm_irq_init(void) MACHINE_START(DAVINCI_EVM, "DaVinci EVM") /* Maintainer: MontaVista Software <source@mvista.com> */ .phys_io = IO_PHYS, - .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc, + .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DAVINCI_DDR_BASE + 0x100), .map_io = davinci_evm_map_io, .init_irq = davinci_evm_irq_init, diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index d46c69b55aa..28f6dbc95bd 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -16,9 +16,9 @@ #include <linux/err.h> #include <linux/mutex.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/psc.h> #include "clock.h" diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c new file mode 100644 index 00000000000..3d4b1de8f89 --- /dev/null +++ b/arch/arm/mach-davinci/devices.c @@ -0,0 +1,48 @@ +/* + * mach-davinci/devices.c + * + * DaVinci platform device setup/initialization + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/io.h> + +#include <asm/mach/map.h> + +#include <mach/hardware.h> +#include <mach/i2c.h> + +static struct resource i2c_resources[] = { + { + .start = DAVINCI_I2C_BASE, + .end = DAVINCI_I2C_BASE + 0x40, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device davinci_i2c_device = { + .name = "i2c_davinci", + .id = 1, + .num_resources = ARRAY_SIZE(i2c_resources), + .resource = i2c_resources, +}; + +void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) +{ + davinci_i2c_device.dev.platform_data = pdata; + (void) platform_device_register(&davinci_i2c_device); +} + diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index c9cb4f09b18..b49e9d092aa 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -1,7 +1,7 @@ /* * TI DaVinci GPIO Support * - * Copyright (c) 2006 David Brownell + * Copyright (c) 2006-2007 David Brownell * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com> * * This program is free software; you can redistribute it and/or modify @@ -26,47 +26,45 @@ #include <asm/mach/irq.h> -static DEFINE_SPINLOCK(gpio_lock); -static DECLARE_BITMAP(gpio_in_use, DAVINCI_N_GPIO); -int gpio_request(unsigned gpio, const char *tag) -{ - if (gpio >= DAVINCI_N_GPIO) - return -EINVAL; +static DEFINE_SPINLOCK(gpio_lock); - if (test_and_set_bit(gpio, gpio_in_use)) - return -EBUSY; +struct davinci_gpio { + struct gpio_chip chip; + struct gpio_controller *__iomem regs; +}; - return 0; -} -EXPORT_SYMBOL(gpio_request); +static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; -void gpio_free(unsigned gpio) -{ - if (gpio >= DAVINCI_N_GPIO) - return; - - clear_bit(gpio, gpio_in_use); -} -EXPORT_SYMBOL(gpio_free); /* create a non-inlined version */ -static struct gpio_controller *__iomem gpio2controller(unsigned gpio) +static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio) { return __gpio_to_controller(gpio); } + +/*--------------------------------------------------------------------------*/ + /* - * Assuming the pin is muxed as a gpio output, set its output value. + * board setup code *MUST* set PINMUX0 and PINMUX1 as + * needed, and enable the GPIO clock. */ -void __gpio_set(unsigned gpio, int value) + +static int davinci_direction_in(struct gpio_chip *chip, unsigned offset) { - struct gpio_controller *__iomem g = gpio2controller(gpio); + struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); + struct gpio_controller *__iomem g = d->regs; + u32 temp; - __raw_writel(__gpio_mask(gpio), value ? &g->set_data : &g->clr_data); -} -EXPORT_SYMBOL(__gpio_set); + spin_lock(&gpio_lock); + temp = __raw_readl(&g->dir); + temp |= (1 << offset); + __raw_writel(temp, &g->dir); + spin_unlock(&gpio_lock); + return 0; +} /* * Read the pin's value (works even if it's set up as output); @@ -75,61 +73,72 @@ EXPORT_SYMBOL(__gpio_set); * Note that changes are synched to the GPIO clock, so reading values back * right after you've set them may give old values. */ -int __gpio_get(unsigned gpio) +static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) { - struct gpio_controller *__iomem g = gpio2controller(gpio); + struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); + struct gpio_controller *__iomem g = d->regs; - return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); + return (1 << offset) & __raw_readl(&g->in_data); } -EXPORT_SYMBOL(__gpio_get); - -/*--------------------------------------------------------------------------*/ - -/* - * board setup code *MUST* set PINMUX0 and PINMUX1 as - * needed, and enable the GPIO clock. - */ - -int gpio_direction_input(unsigned gpio) +static int +davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value) { - struct gpio_controller *__iomem g = gpio2controller(gpio); + struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); + struct gpio_controller *__iomem g = d->regs; u32 temp; - u32 mask; - - if (!g) - return -EINVAL; + u32 mask = 1 << offset; spin_lock(&gpio_lock); - mask = __gpio_mask(gpio); temp = __raw_readl(&g->dir); - temp |= mask; + temp &= ~mask; + __raw_writel(mask, value ? &g->set_data : &g->clr_data); __raw_writel(temp, &g->dir); spin_unlock(&gpio_lock); return 0; } -EXPORT_SYMBOL(gpio_direction_input); -int gpio_direction_output(unsigned gpio, int value) +/* + * Assuming the pin is muxed as a gpio output, set its output value. + */ +static void +davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { - struct gpio_controller *__iomem g = gpio2controller(gpio); - u32 temp; - u32 mask; + struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); + struct gpio_controller *__iomem g = d->regs; - if (!g) - return -EINVAL; + __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); +} + +static int __init davinci_gpio_setup(void) +{ + int i, base; + + for (i = 0, base = 0; + i < ARRAY_SIZE(chips); + i++, base += 32) { + chips[i].chip.label = "DaVinci"; + + chips[i].chip.direction_input = davinci_direction_in; + chips[i].chip.get = davinci_gpio_get; + chips[i].chip.direction_output = davinci_direction_out; + chips[i].chip.set = davinci_gpio_set; + + chips[i].chip.base = base; + chips[i].chip.ngpio = DAVINCI_N_GPIO - base; + if (chips[i].chip.ngpio > 32) + chips[i].chip.ngpio = 32; + + chips[i].regs = gpio2controller(base); + + gpiochip_add(&chips[i].chip); + } - spin_lock(&gpio_lock); - mask = __gpio_mask(gpio); - temp = __raw_readl(&g->dir); - temp &= ~mask; - __raw_writel(mask, value ? &g->set_data : &g->clr_data); - __raw_writel(temp, &g->dir); - spin_unlock(&gpio_lock); return 0; } -EXPORT_SYMBOL(gpio_direction_output); +pure_initcall(davinci_gpio_setup); +/*--------------------------------------------------------------------------*/ /* * We expect irqs will normally be set up as input pins, but they can also be * used as output pins ... which is convenient for testing. @@ -201,7 +210,6 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) desc->chip->ack(irq); while (1) { u32 status; - struct irq_desc *gpio; int n; int res; @@ -215,12 +223,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) /* now demux them to the right lowlevel handler */ n = (int)get_irq_data(irq); - gpio = &irq_desc[n]; while (status) { res = ffs(status); n += res; - gpio += res; - desc_handle_irq(n - 1, gpio - 1); + generic_handle_irq(n - 1); status >>= res; } } diff --git a/arch/arm/mach-davinci/id.c b/arch/arm/mach-davinci/id.c index 70608f76aed..bf067d60491 100644 --- a/arch/arm/mach-davinci/id.c +++ b/arch/arm/mach-davinci/id.c @@ -13,8 +13,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> - -#include <asm/io.h> +#include <linux/io.h> #define JTAG_ID_BASE 0x01c40028 diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index a97dfbb15e5..4b522e5c70e 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -16,4 +16,7 @@ struct sys_timer; extern struct sys_timer davinci_timer; +/* parameters describe VBUS sourcing for host mode */ +extern void setup_usb(unsigned mA, unsigned potpgt_msec); + #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index ec151ccf1e8..b3a2961f0f4 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -14,6 +14,7 @@ #define __DAVINCI_GPIO_H #include <linux/io.h> +#include <asm-generic/gpio.h> #include <mach/hardware.h> /* @@ -27,13 +28,16 @@ * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are * used as gpios, not with other peripherals. * - * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe - * for later updates, code should write GPIO(N) or: + * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, + * and maybe for later updates, code should write GPIO(N) or: * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) * * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc * for now, that's != GPIO(N) + * + * GPIOs can also be on external chips, numbered after the ones built-in + * to the DaVinci chip. For now, they won't be usable as IRQ sources. */ #define GPIO(X) (X) /* 0 <= X <= 70 */ #define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ @@ -67,11 +71,11 @@ __gpio_to_controller(unsigned gpio) void *__iomem ptr; if (gpio < 32) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); + ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); else if (gpio < 64) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); + ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); else if (gpio < DAVINCI_N_GPIO) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); + ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); else ptr = NULL; return ptr; @@ -83,25 +87,17 @@ static inline u32 __gpio_mask(unsigned gpio) } /* The get/set/clear functions will inline when called with constant - * parameters, for low-overhead bitbanging. Illegal constant parameters - * cause link-time errors. + * parameters referencing built-in GPIOs, for low-overhead bitbanging. * - * Otherwise, calls with variable parameters use outlined functions. + * Otherwise, calls with variable parameters or referencing external + * GPIOs (e.g. on GPIO expander chips) use outlined functions. */ -extern int __error_inval_gpio(void); - -extern void __gpio_set(unsigned gpio, int value); -extern int __gpio_get(unsigned gpio); - static inline void gpio_set_value(unsigned gpio, int value) { - if (__builtin_constant_p(value)) { + if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) { struct gpio_controller *__iomem g; u32 mask; - if (gpio >= DAVINCI_N_GPIO) - __error_inval_gpio(); - g = __gpio_to_controller(gpio); mask = __gpio_mask(gpio); if (value) @@ -111,48 +107,47 @@ static inline void gpio_set_value(unsigned gpio, int value) return; } - __gpio_set(gpio, value); + __gpio_set_value(gpio, value); } /* Returns zero or nonzero; works for gpios configured as inputs OR - * as outputs. + * as outputs, at least for built-in GPIOs. * - * NOTE: changes in reported values are synchronized to the GPIO clock. - * This is most easily seen after calling gpio_set_value() and then immediatly - * gpio_get_value(), where the gpio_get_value() would return the old value - * until the GPIO clock ticks and the new value gets latched. + * NOTE: for built-in GPIOs, changes in reported values are synchronized + * to the GPIO clock. This is easily seen after calling gpio_set_value() + * and then immediately gpio_get_value(), where the gpio_get_value() will + * return the old value until the GPIO clock ticks and the new value gets + * latched. */ - static inline int gpio_get_value(unsigned gpio) { - struct gpio_controller *__iomem g; - - if (!__builtin_constant_p(gpio)) - return __gpio_get(gpio); + struct gpio_controller *__iomem g; - if (gpio >= DAVINCI_N_GPIO) - return __error_inval_gpio(); + if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO) + return __gpio_get_value(gpio); g = __gpio_to_controller(gpio); - return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); + return __gpio_mask(gpio) & __raw_readl(&g->in_data); } -/* powerup default direction is IN */ -extern int gpio_direction_input(unsigned gpio); -extern int gpio_direction_output(unsigned gpio, int value); - -#include <asm-generic/gpio.h> /* cansleep wrappers */ - -extern int gpio_request(unsigned gpio, const char *tag); -extern void gpio_free(unsigned gpio); +static inline int gpio_cansleep(unsigned gpio) +{ + if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO) + return 0; + else + return __gpio_cansleep(gpio); +} static inline int gpio_to_irq(unsigned gpio) { + if (gpio >= DAVINCI_N_GPIO) + return -EINVAL; return DAVINCI_N_AINTC_IRQ + gpio; } static inline int irq_to_gpio(unsigned irq) { + /* caller guarantees gpio_to_irq() succeeded */ return irq - DAVINCI_N_AINTC_IRQ; } diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h index e2f54168abd..c248e9b7e82 100644 --- a/arch/arm/mach-davinci/include/mach/i2c.h +++ b/arch/arm/mach-davinci/include/mach/i2c.h @@ -14,8 +14,11 @@ /* All frequencies are expressed in kHz */ struct davinci_i2c_platform_data { - unsigned int bus_freq; /* standard bus frequency */ - unsigned int bus_delay; /* transaction delay */ + unsigned int bus_freq; /* standard bus frequency (kHz) */ + unsigned int bus_delay; /* post-transaction delay (usec) */ }; +/* for board setup code */ +void davinci_init_i2c(struct davinci_i2c_platform_data *); + #endif /* __ASM_ARCH_I2C_H */ diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index e7accb91086..b78ee914049 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h @@ -22,9 +22,8 @@ #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ #define IO_SIZE 0x00400000 #define IO_VIRT (IO_PHYS + IO_OFFSET) -#define io_p2v(pa) ((pa) + IO_OFFSET) #define io_v2p(va) ((va) - IO_OFFSET) -#define IO_ADDRESS(x) io_p2v(x) +#define __IO_ADDRESS(x) ((x) + IO_OFFSET) /* * We don't actually have real ISA nor PCI buses, but there is so many @@ -35,7 +34,12 @@ #define __mem_pci(a) (a) #define __mem_isa(a) (a) -#ifndef __ASSEMBLER__ +#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) + +#ifdef __ASSEMBLER__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __force __iomem *)(x)) /* * Functions to access the DaVinci IO region @@ -46,34 +50,13 @@ * - DO NOT use hardcoded virtual addresses to allow changing the * IO address space again if needed */ -#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) - -#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) - -/* 16 bit uses LDRH/STRH, base +/- offset_8 */ -typedef struct { volatile u16 offset[256]; } __regbase16; -#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \ - ->offset[((vaddr)&0xff)>>1] -#define __REG16(paddr) __REGV16(io_p2v(paddr)) - -/* 8/32 bit uses LDR/STR, base +/- offset_12 */ -typedef struct { volatile u8 offset[4096]; } __regbase8; -#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \ - ->offset[((vaddr)&4095)>>0] -#define __REG8(paddr) __REGV8(io_p2v(paddr)) - -typedef struct { volatile u32 offset[4096]; } __regbase32; -#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \ - ->offset[((vaddr)&4095)>>2] - -#define __REG(paddr) __REGV32(io_p2v(paddr)) -#else +#define davinci_readb(a) __raw_readb(IO_ADDRESS(a)) +#define davinci_readw(a) __raw_readw(IO_ADDRESS(a)) +#define davinci_readl(a) __raw_readl(IO_ADDRESS(a)) -#define __REG(x) (*((volatile unsigned long *)io_p2v(x))) +#define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a)) +#define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a)) +#define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a)) #endif /* __ASSEMBLER__ */ #endif /* __ASM_ARCH_IO_H */ diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h index 84ff77aeb73..17ca41dc2c5 100644 --- a/arch/arm/mach-davinci/include/mach/system.h +++ b/arch/arm/mach-davinci/include/mach/system.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> extern void davinci_watchdog_reset(void); diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c index 5bb66b61c1a..299515f70b8 100644 --- a/arch/arm/mach-davinci/io.c +++ b/arch/arm/mach-davinci/io.c @@ -11,9 +11,9 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/tlb.h> -#include <asm/io.h> #include <asm/memory.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 12ca9f29f84..38021af8359 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -22,9 +22,9 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/irq.h> #define IRQ_BIT(irq) ((irq) & 0x1f) diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index aa2fc375a32..58754f066d5 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -21,8 +21,8 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <mach/psc.h> #include <mach/mux.h> diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c index caf101e2cc6..3010f997125 100644 --- a/arch/arm/mach-davinci/serial.c +++ b/arch/arm/mach-davinci/serial.c @@ -26,8 +26,8 @@ #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> #include <mach/serial.h> diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 206e80d4171..3b9a296b5c4 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -15,8 +15,8 @@ #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/spinlock.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/system.h> #include <asm/irq.h> diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c new file mode 100644 index 00000000000..fe182a85159 --- /dev/null +++ b/arch/arm/mach-davinci/usb.c @@ -0,0 +1,116 @@ +/* + * USB + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <linux/usb/musb.h> +#include <linux/usb/otg.h> + +#include <mach/common.h> +#include <mach/hardware.h> + +#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) +static struct musb_hdrc_eps_bits musb_eps[] = { + { "ep1_tx", 8, }, + { "ep1_rx", 8, }, + { "ep2_tx", 8, }, + { "ep2_rx", 8, }, + { "ep3_tx", 5, }, + { "ep3_rx", 5, }, + { "ep4_tx", 5, }, + { "ep4_rx", 5, }, +}; + +static struct musb_hdrc_config musb_config = { + .multipoint = true, + .dyn_fifo = true, + .soft_con = true, + .dma = true, + + .num_eps = 5, + .dma_channels = 8, + .ram_bits = 10, + .eps_bits = musb_eps, +}; + +static struct musb_hdrc_platform_data usb_data = { +#if defined(CONFIG_USB_MUSB_OTG) + /* OTG requires a Mini-AB connector */ + .mode = MUSB_OTG, +#elif defined(CONFIG_USB_MUSB_PERIPHERAL) + .mode = MUSB_PERIPHERAL, +#elif defined(CONFIG_USB_MUSB_HOST) + .mode = MUSB_HOST, +#endif + .config = &musb_config, +}; + +static struct resource usb_resources[] = { + { + /* physical address */ + .start = DAVINCI_USB_OTG_BASE, + .end = DAVINCI_USB_OTG_BASE + 0x5ff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_USBINT, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 usb_dmamask = DMA_32BIT_MASK; + +static struct platform_device usb_dev = { + .name = "musb_hdrc", + .id = -1, + .dev = { + .platform_data = &usb_data, + .dma_mask = &usb_dmamask, + .coherent_dma_mask = DMA_32BIT_MASK, + }, + .resource = usb_resources, + .num_resources = ARRAY_SIZE(usb_resources), +}; + +#ifdef CONFIG_USB_MUSB_OTG + +static struct otg_transceiver *xceiv; + +struct otg_transceiver *otg_get_transceiver(void) +{ + if (xceiv) + get_device(xceiv->dev); + return xceiv; +} +EXPORT_SYMBOL(otg_get_transceiver); + +int otg_set_transceiver(struct otg_transceiver *x) +{ + if (xceiv && x) + return -EBUSY; + xceiv = x; + return 0; +} +EXPORT_SYMBOL(otg_set_transceiver); + +#endif + +void __init setup_usb(unsigned mA, unsigned potpgt_msec) +{ + usb_data.power = mA / 2; + usb_data.potpgt = potpgt_msec / 2; + platform_device_register(&usb_dev); +} + +#else + +void __init setup_usb(unsigned mA, unsigned potpgt_msec) +{ +} + +#endif /* CONFIG_USB_MUSB_HDRC */ + diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 65cc7c27191..c7bc7fbb11a 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -14,10 +14,10 @@ #include <linux/interrupt.h> #include <linux/serial_8250.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/pgtable.h> diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index 53748f5462e..c52e3047a7e 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c @@ -23,9 +23,9 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/page.h> static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr) diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index ea8549bfbef..5a1b8c05c95 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig @@ -88,6 +88,20 @@ config MACH_TS72XX Say 'Y' here if you want your kernel to support the Technologic Systems TS-72xx board. +choice + prompt "Select a UART for early kernel messages" + +config EP93XX_EARLY_UART1 + bool "UART1" + +config EP93XX_EARLY_UART2 + bool "UART2" + +config EP93XX_EARLY_UART3 + bool "UART3" + +endchoice + endmenu endif diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c index aa1fb352fb8..561db73ec1a 100644 --- a/arch/arm/mach-ep93xx/adssphere.c +++ b/arch/arm/mach-ep93xx/adssphere.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -47,36 +47,12 @@ static struct ep93xx_eth_data adssphere_eth_data = { .phy_id = 1, }; -static struct resource adssphere_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device adssphere_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &adssphere_eth_data, - }, - .num_resources = 2, - .resource = adssphere_eth_resource, -}; - static void __init adssphere_init_machine(void) { ep93xx_init_devices(); platform_device_register(&adssphere_flash); - memcpy(adssphere_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(&adssphere_eth_device); + ep93xx_register_eth(&adssphere_eth_data, 1); } MACHINE_START(ADSSPHERE, "ADS Sphere board") diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index 6062e47f204..8c9f2491dcc 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c @@ -15,9 +15,9 @@ #include <linux/err.h> #include <linux/module.h> #include <linux/string.h> +#include <linux/io.h> #include <asm/div64.h> #include <mach/hardware.h> -#include <asm/io.h> struct clk { char *name; diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index f99f4366939..de53f0be71b 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -32,6 +32,7 @@ #include <linux/termios.h> #include <linux/amba/bus.h> #include <linux/amba/serial.h> +#include <linux/io.h> #include <asm/types.h> #include <asm/setup.h> @@ -41,7 +42,6 @@ #include <asm/system.h> #include <asm/tlbflush.h> #include <asm/pgtable.h> -#include <asm/io.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -157,7 +157,7 @@ static unsigned char gpio_int_type2[3]; static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; -static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; +static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 }; void ep93xx_gpio_update_int_params(unsigned port) { @@ -192,8 +192,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) for (i = 0; i < 8; i++) { if (status & (1 << i)) { int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; - desc = irq_desc + gpio_irq; - desc_handle_irq(gpio_irq, desc); + generic_handle_irq(gpio_irq); } } @@ -202,7 +201,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) if (status & (1 << i)) { int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; desc = irq_desc + gpio_irq; - desc_handle_irq(gpio_irq, desc); + generic_handle_irq(gpio_irq); } } } @@ -217,7 +216,7 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; - desc_handle_irq(gpio_irq, irq_desc + gpio_irq); + generic_handle_irq(gpio_irq); } static void ep93xx_gpio_irq_ack(unsigned int irq) @@ -461,6 +460,41 @@ static struct platform_device ep93xx_ohci_device = { .resource = ep93xx_ohci_resources, }; +static struct ep93xx_eth_data ep93xx_eth_data; + +static struct resource ep93xx_eth_resource[] = { + { + .start = EP93XX_ETHERNET_PHYS_BASE, + .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_EP93XX_ETHERNET, + .end = IRQ_EP93XX_ETHERNET, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device ep93xx_eth_device = { + .name = "ep93xx-eth", + .id = -1, + .dev = { + .platform_data = &ep93xx_eth_data, + }, + .num_resources = ARRAY_SIZE(ep93xx_eth_resource), + .resource = ep93xx_eth_resource, +}; + +void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) +{ + if (copy_addr) { + memcpy(data->dev_addr, + (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); + } + + ep93xx_eth_data = *data; + platform_device_register(&ep93xx_eth_device); +} + extern void ep93xx_gpio_init(void); void __init ep93xx_init_devices(void) diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c index 97550c0ad7b..e4add5bdccf 100644 --- a/arch/arm/mach-ep93xx/edb9302.c +++ b/arch/arm/mach-ep93xx/edb9302.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -43,10 +43,16 @@ static struct platform_device edb9302_flash = { .resource = &edb9302_flash_resource, }; +static struct ep93xx_eth_data edb9302_eth_data = { + .phy_id = 1, +}; + static void __init edb9302_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9302_flash); + + ep93xx_register_eth(&edb9302_eth_data, 1); } MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c index 99b01d44bf1..02c4405afed 100644 --- a/arch/arm/mach-ep93xx/edb9302a.c +++ b/arch/arm/mach-ep93xx/edb9302a.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9302a_eth_data = { .phy_id = 1, }; -static struct resource edb9302a_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device edb9302a_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &edb9302a_eth_data, - }, - .num_resources = 2, - .resource = edb9302a_eth_resource, -}; - static void __init edb9302a_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9302a_flash); - memcpy(edb9302a_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(&edb9302a_eth_device); + ep93xx_register_eth(&edb9302a_eth_data, 1); } MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c index 9fb72d01a36..040edbd2ea0 100644 --- a/arch/arm/mach-ep93xx/edb9307.c +++ b/arch/arm/mach-ep93xx/edb9307.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9307_eth_data = { .phy_id = 1, }; -static struct resource edb9307_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device edb9307_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &edb9307_eth_data, - }, - .num_resources = 2, - .resource = edb9307_eth_resource, -}; - static void __init edb9307_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9307_flash); - memcpy(edb9307_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(&edb9307_eth_device); + ep93xx_register_eth(&edb9307_eth_data, 1); } MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c index 87267a574f5..6853e302bc3 100644 --- a/arch/arm/mach-ep93xx/edb9312.c +++ b/arch/arm/mach-ep93xx/edb9312.c @@ -19,7 +19,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -44,10 +44,16 @@ static struct platform_device edb9312_flash = { .resource = &edb9312_flash_resource, }; +static struct ep93xx_eth_data edb9312_eth_data = { + .phy_id = 1, +}; + static void __init edb9312_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9312_flash); + + ep93xx_register_eth(&edb9312_eth_data, 1); } MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c index 7e373950be4..9469b350d25 100644 --- a/arch/arm/mach-ep93xx/edb9315.c +++ b/arch/arm/mach-ep93xx/edb9315.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -43,10 +43,16 @@ static struct platform_device edb9315_flash = { .resource = &edb9315_flash_resource, }; +static struct ep93xx_eth_data edb9315_eth_data = { + .phy_id = 1, +}; + static void __init edb9315_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9315_flash); + + ep93xx_register_eth(&edb9315_eth_data, 1); } MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c index 08a7c9bfb68..584457ce7c8 100644 --- a/arch/arm/mach-ep93xx/edb9315a.c +++ b/arch/arm/mach-ep93xx/edb9315a.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -47,36 +47,12 @@ static struct ep93xx_eth_data edb9315a_eth_data = { .phy_id = 1, }; -static struct resource edb9315a_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device edb9315a_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &edb9315a_eth_data, - }, - .num_resources = 2, - .resource = edb9315a_eth_resource, -}; - static void __init edb9315a_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9315a_flash); - memcpy(edb9315a_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(&edb9315a_eth_device); + ep93xx_register_eth(&edb9315a_eth_data, 1); } MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index 9b41ec1f089..035b24e31b6 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c @@ -18,7 +18,7 @@ #include <linux/ioport.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -44,36 +44,15 @@ static struct platform_device gesbc9312_flash = { }; static struct ep93xx_eth_data gesbc9312_eth_data = { - .phy_id = 1, -}; - -static struct resource gesbc9312_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device gesbc9312_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &gesbc9312_eth_data, - }, - .num_resources = 2, - .resource = gesbc9312_eth_resource, + .phy_id = 1, }; static void __init gesbc9312_init_machine(void) { ep93xx_init_devices(); platform_device_register(&gesbc9312_flash); - platform_device_register(&gesbc9312_eth_device); + + ep93xx_register_eth(&gesbc9312_eth_data, 0); } MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 0f3fb87ca4b..482cf3d2fbc 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -16,9 +16,9 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/seq_file.h> +#include <linux/io.h> #include <mach/ep93xx-regs.h> -#include <asm/io.h> #include <asm/gpio.h> struct ep93xx_gpio_chip { @@ -141,10 +141,10 @@ static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = { EP93XX_GPIO_BANK("A", 0x00, 0x10, 0), EP93XX_GPIO_BANK("B", 0x04, 0x14, 8), - EP93XX_GPIO_BANK("C", 0x30, 0x34, 40), + EP93XX_GPIO_BANK("C", 0x08, 0x18, 40), EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24), EP93XX_GPIO_BANK("E", 0x20, 0x24, 32), - EP93XX_GPIO_BANK("F", 0x08, 0x18, 16), + EP93XX_GPIO_BANK("F", 0x30, 0x34, 16), EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48), EP93XX_GPIO_BANK("H", 0x40, 0x44, 56), }; diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 9f4458c8e07..22d6c9a6e4c 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -6,6 +6,40 @@ #define __ASM_ARCH_EP93XX_REGS_H /* + * EP93xx Physical Memory Map: + * + * The ASDO pin is sampled at system reset to select a synchronous or + * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up) + * the synchronous boot mode is selected. When ASDO is "0" (i.e + * pulled-down) the asynchronous boot mode is selected. + * + * In synchronous boot mode nSDCE3 is decoded starting at physical address + * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous + * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3 + * decoded at 0xf0000000. + * + * There is known errata for the EP93xx dealing with External Memory + * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design + * Guidelines" for more information. This document can be found at: + * + * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf + */ + +#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */ +#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */ +#define EP93XX_CS1_PHYS_BASE 0x10000000 +#define EP93XX_CS2_PHYS_BASE 0x20000000 +#define EP93XX_CS3_PHYS_BASE 0x30000000 +#define EP93XX_PCMCIA_PHYS_BASE 0x40000000 +#define EP93XX_CS6_PHYS_BASE 0x60000000 +#define EP93XX_CS7_PHYS_BASE 0x70000000 +#define EP93XX_SDCE0_PHYS_BASE 0xc0000000 +#define EP93XX_SDCE1_PHYS_BASE 0xd0000000 +#define EP93XX_SDCE2_PHYS_BASE 0xe0000000 +#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */ +#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */ + +/* * EP93xx linux memory map: * * virt phys size diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index b5c182473f5..db2489d3bda 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h @@ -4,17 +4,17 @@ #ifndef __ASSEMBLY__ -void ep93xx_map_io(void); -void ep93xx_init_irq(void); -void ep93xx_init_time(unsigned long); -void ep93xx_init_devices(void); -extern struct sys_timer ep93xx_timer; - struct ep93xx_eth_data { unsigned char dev_addr[6]; unsigned char phy_id; }; +void ep93xx_map_io(void); +void ep93xx_init_irq(void); +void ep93xx_init_time(unsigned long); +void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); +void ep93xx_init_devices(void); +extern struct sys_timer ep93xx_timer; #endif diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h index 30b318aa1a1..34ddec081c4 100644 --- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h +++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h @@ -70,7 +70,7 @@ #ifndef __ASSEMBLY__ -#include <asm/io.h> +#include <linux/io.h> static inline int board_is_ts7200(void) { diff --git a/arch/arm/mach-ep93xx/include/mach/uncompress.h b/arch/arm/mach-ep93xx/include/mach/uncompress.h index 1fd2f17de32..16026c2b1c8 100644 --- a/arch/arm/mach-ep93xx/include/mach/uncompress.h +++ b/arch/arm/mach-ep93xx/include/mach/uncompress.h @@ -31,10 +31,19 @@ static void __raw_writel(unsigned int value, unsigned int ptr) *((volatile unsigned int *)ptr) = value; } - -#define PHYS_UART1_DATA 0x808c0000 -#define PHYS_UART1_FLAG 0x808c0018 -#define UART1_FLAG_TXFF 0x20 +#if defined(CONFIG_EP93XX_EARLY_UART1) +#define UART_BASE EP93XX_UART1_PHYS_BASE +#elif defined(CONFIG_EP93XX_EARLY_UART2) +#define UART_BASE EP93XX_UART2_PHYS_BASE +#elif defined(CONFIG_EP93XX_EARLY_UART3) +#define UART_BASE EP93XX_UART3_PHYS_BASE +#else +#define UART_BASE EP93XX_UART1_PHYS_BASE +#endif + +#define PHYS_UART_DATA (UART_BASE + 0x00) +#define PHYS_UART_FLAG (UART_BASE + 0x18) +#define UART_FLAG_TXFF 0x20 static inline void putc(int c) { @@ -42,11 +51,11 @@ static inline void putc(int c) for (i = 0; i < 1000; i++) { /* Transmit fifo not full? */ - if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF)) + if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)) break; } - __raw_writeb(c, PHYS_UART1_DATA); + __raw_writeb(c, PHYS_UART_DATA); } static inline void flush(void) diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index de047a5c811..c2197236b63 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c @@ -16,10 +16,9 @@ #include <linux/mm.h> #include <linux/platform_device.h> #include <linux/sched.h> - +#include <linux/io.h> #include <linux/mtd/physmap.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/mach/arch.h> @@ -29,38 +28,9 @@ static struct ep93xx_eth_data micro9_eth_data = { .phy_id = 0x1f, }; -static struct resource micro9_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device micro9_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = µ9_eth_data, - }, - .num_resources = ARRAY_SIZE(micro9_eth_resource), - .resource = micro9_eth_resource, -}; - -static void __init micro9_eth_init(void) -{ - memcpy(micro9_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(µ9_eth_device); -} - static void __init micro9_init(void) { - micro9_eth_init(); + ep93xx_register_eth(µ9_eth_data, 1); } /* diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index c3cbff126d0..b4aa4c05427 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c @@ -19,7 +19,7 @@ #include <linux/mtd/physmap.h> #include <linux/platform_device.h> #include <linux/m48t86.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -161,28 +161,6 @@ static struct ep93xx_eth_data ts72xx_eth_data = { .phy_id = 1, }; -static struct resource ts72xx_eth_resource[] = { - { - .start = EP93XX_ETHERNET_PHYS_BASE, - .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_EP93XX_ETHERNET, - .end = IRQ_EP93XX_ETHERNET, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device ts72xx_eth_device = { - .name = "ep93xx-eth", - .id = -1, - .dev = { - .platform_data = &ts72xx_eth_data, - }, - .num_resources = 2, - .resource = ts72xx_eth_resource, -}; - static void __init ts72xx_init_machine(void) { ep93xx_init_devices(); @@ -190,9 +168,7 @@ static void __init ts72xx_init_machine(void) platform_device_register(&ts72xx_flash); platform_device_register(&ts72xx_rtc_device); - memcpy(ts72xx_eth_data.dev_addr, - (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); - platform_device_register(&ts72xx_eth_device); + ep93xx_register_eth(&ts72xx_eth_data, 1); } MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index c261472208c..6a5b437ab86 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c @@ -9,9 +9,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/screen_info.h> +#include <linux/io.h> #include <asm/hardware/dec21285.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/setup.h> diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index b08ab507c05..818014e09f4 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -13,11 +13,11 @@ #include <linux/ioport.h> #include <linux/list.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/setup.h> #include <asm/hardware/dec21285.h> diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index d0dc51e8133..d4c1e526f59 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c @@ -16,8 +16,8 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/irq.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> #include <asm/mach/pci.h> diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c index 1f9b09b8ed8..b653e9cfa3f 100644 --- a/arch/arm/mach-footbridge/dma.c +++ b/arch/arm/mach-footbridge/dma.c @@ -11,9 +11,9 @@ * ISA DMA controllers. */ #include <linux/init.h> +#include <linux/io.h> #include <asm/dma.h> -#include <asm/io.h> #include <asm/scatterlist.h> #include <asm/mach/dma.h> diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h index e9cae99dd1f..6ae2f1a07ab 100644 --- a/arch/arm/mach-footbridge/include/mach/memory.h +++ b/arch/arm/mach-footbridge/include/mach/memory.h @@ -42,10 +42,6 @@ extern unsigned long __bus_to_virt(unsigned long); #endif -/* Task size and page offset at 3GB */ -#define TASK_SIZE UL(0xbf000000) -#define PAGE_OFFSET UL(0xc0000000) - /* * Cache flushing area. */ @@ -56,12 +52,6 @@ extern unsigned long __bus_to_virt(unsigned long); */ #define PHYS_OFFSET UL(0x00000000) -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) - #define FLUSH_BASE_PHYS 0x50000000 #endif diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h index 01c9f407f49..2db7f36bd6c 100644 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ b/arch/arm/mach-footbridge/include/mach/system.h @@ -7,8 +7,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include <linux/io.h> #include <asm/hardware/dec21285.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/leds.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c index 7132e522c36..54fec9ae28b 100644 --- a/arch/arm/mach-footbridge/isa-irq.c +++ b/arch/arm/mach-footbridge/isa-irq.c @@ -18,13 +18,13 @@ #include <linux/interrupt.h> #include <linux/list.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/mach/irq.h> #include <mach/hardware.h> #include <asm/hardware/dec21285.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach-types.h> static void isa_mask_pic_lo_irq(unsigned int irq) @@ -94,8 +94,7 @@ isa_irq_handler(unsigned int irq, struct irq_desc *desc) return; } - desc = irq_desc + isa_irq; - desc_handle_irq(isa_irq, desc); + generic_handle_irq(isa_irq); } static struct irqaction irq_cascade = { diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index a764e01d357..0c8390082fa 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c @@ -7,8 +7,8 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index a1f381c64a3..00b0ddcac28 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -10,9 +10,9 @@ #include <linux/kernel.h> #include <linux/delay.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/hardware/dec21285.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/mach-types.h> #include <asm/setup.h> diff --git a/arch/arm/mach-footbridge/time.c b/arch/arm/mach-footbridge/time.c index 004819ea85c..cd1b54ff9fe 100644 --- a/arch/arm/mach-footbridge/time.c +++ b/arch/arm/mach-footbridge/time.c @@ -22,9 +22,9 @@ #include <linux/sched.h> #include <linux/mc146818rtc.h> #include <linux/bcd.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/time.h> #include "common.h" diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index b5f9741ae13..7a261482821 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -18,11 +18,11 @@ #include <linux/mman.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/io.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/dma.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach/irq.h> @@ -104,14 +104,12 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq, struct irq_desc *desc) { IRQDBG("%s irq: %d\n", __func__, irq); - desc = irq_desc + irq; while (mask) { if (mask & 1) { IRQDBG("handling irq %d\n", irq); - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } irq++; - desc++; mask >>= 1; } } diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index 53e1f62f2e7..fd33a19c813 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -120,12 +120,10 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc) mask >>= 1; irq = IRQ_TIMER1; - desc = irq_desc + irq; while (mask) { if (mask & 1) - desc_handle_irq(irq, desc); + generic_handle_irq(irq); irq++; - desc++; mask >>= 1; } } diff --git a/arch/arm/mach-imx/clock.c b/arch/arm/mach-imx/clock.c index 4b4230db376..7ec60fc9156 100644 --- a/arch/arm/mach-imx/clock.c +++ b/arch/arm/mach-imx/clock.c @@ -21,8 +21,8 @@ #include <linux/list.h> #include <linux/math64.h> #include <linux/err.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/imx-regs.h> /* diff --git a/arch/arm/mach-imx/include/mach/irqs.h b/arch/arm/mach-imx/include/mach/irqs.h index eb8d5bd05d5..67812c5ac1f 100644 --- a/arch/arm/mach-imx/include/mach/irqs.h +++ b/arch/arm/mach-imx/include/mach/irqs.h @@ -111,6 +111,11 @@ /* decode irq number to use with IMR(x), ISR(x) and friends */ #define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) +/* all normal IRQs can be FIQs */ +#define FIQ_START 0 +/* switch betwean IRQ and FIQ */ +extern int imx_set_irq_fiq(unsigned int irq, unsigned int type); + #define NR_IRQS (IRQ_GPIOD(32) + 1) #define IRQ_GPIO(x) #endif diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c index 798f221eb3b..531b95deadc 100644 --- a/arch/arm/mach-imx/irq.c +++ b/arch/arm/mach-imx/irq.c @@ -26,20 +26,17 @@ #include <linux/init.h> #include <linux/list.h> #include <linux/timer.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> /* * * We simply use the ENABLE DISABLE registers inside of the IMX - * to turn on/off specific interrupts. FIXME- We should - * also add support for the accelerated interrupt controller - * by putting offets to irq jump code in the appropriate - * places. + * to turn on/off specific interrupts. * */ @@ -102,6 +99,28 @@ imx_unmask_irq(unsigned int irq) __raw_writel(irq, IMX_AITC_INTENNUM); } +#ifdef CONFIG_FIQ +int imx_set_irq_fiq(unsigned int irq, unsigned int type) +{ + unsigned int irqt; + + if (irq >= IMX_IRQS) + return -EINVAL; + + if (irq < IMX_IRQS / 2) { + irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL); + } else { + irq -= IMX_IRQS / 2; + irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH); + } + + return 0; +} +EXPORT_SYMBOL(imx_set_irq_fiq); +#endif /* CONFIG_FIQ */ + static int imx_gpio_irq_type(unsigned int _irq, unsigned int type) { @@ -182,14 +201,12 @@ static void imx_gpio_handler(unsigned int mask, unsigned int irq, struct irq_desc *desc) { - desc = irq_desc + irq; while (mask) { if (mask & 1) { DEBUG_IRQ("handling irq %d\n", irq); - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } irq++; - desc++; mask >>= 1; } } @@ -286,4 +303,9 @@ imx_init_irq(void) /* Release masking of interrupts according to priority */ __raw_writel(-1, IMX_AITC_NIMASK); + +#ifdef CONFIG_FIQ + /* Initialize FIQ */ + init_FIQ(); +#endif } diff --git a/arch/arm/mach-imx/leds-mx1ads.c b/arch/arm/mach-imx/leds-mx1ads.c index af81621f689..1d48f2762cb 100644 --- a/arch/arm/mach-imx/leds-mx1ads.c +++ b/arch/arm/mach-imx/leds-mx1ads.c @@ -13,9 +13,9 @@ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/system.h> -#include <asm/io.h> #include <asm/leds.h> #include "leds.h" diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index 08be3875c59..a11765f5f23 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -18,9 +18,9 @@ #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/irq.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 8bacf6d4d09..595b7392ee4 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -19,10 +19,10 @@ #include <linux/termios.h> #include <linux/amba/bus.h> #include <linux/amba/serial.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/hardware/arm_timer.h> #include <mach/cm.h> #include <asm/system.h> diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c index 7c49d55e6b2..44d4c2e8207 100644 --- a/arch/arm/mach-integrator/cpu.c +++ b/arch/arm/mach-integrator/cpu.c @@ -17,9 +17,9 @@ #include <linux/sched.h> #include <linux/smp.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/hardware/icst525.h> @@ -184,7 +184,6 @@ static int integrator_cpufreq_init(struct cpufreq_policy *policy) { /* set default policy and cpuinfo */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.max_freq = 160000; policy->cpuinfo.min_freq = 12000; policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */ diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 3c8383dbe9e..172299a7830 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c @@ -20,8 +20,8 @@ #include <linux/mm.h> #include <linux/amba/bus.h> #include <linux/amba/clcd.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/hardware/icst525.h> #include <mach/lm.h> #include <mach/impd1.h> diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 6e472b5f8f2..8138a7e2456 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -27,9 +27,9 @@ #include <linux/sysdev.h> #include <linux/amba/bus.h> #include <linux/amba/kmi.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/setup.h> #include <asm/param.h> /* HZ */ diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 6b99e9c258b..88026ccd5ac 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -19,9 +19,9 @@ #include <linux/amba/bus.h> #include <linux/amba/kmi.h> #include <linux/amba/clcd.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -217,8 +217,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc) irq += IRQ_SIC_START; - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } while (status); } diff --git a/arch/arm/mach-integrator/leds.c b/arch/arm/mach-integrator/leds.c index 7bc6881434e..8dcc823f413 100644 --- a/arch/arm/mach-integrator/leds.c +++ b/arch/arm/mach-integrator/leds.c @@ -24,9 +24,9 @@ #include <linux/init.h> #include <linux/smp.h> #include <linux/spinlock.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/system.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 9f2b1ea8fb2..f1d72b22545 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -27,9 +27,9 @@ #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> #include <asm/mach/pci.h> diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h index e8b59d8f1bb..b82602d529b 100644 --- a/arch/arm/mach-iop13xx/include/mach/memory.h +++ b/arch/arm/mach-iop13xx/include/mach/memory.h @@ -7,9 +7,6 @@ * Physical DRAM offset. */ #define PHYS_OFFSET UL(0x00000000) -#define TASK_SIZE UL(0x3f000000) -#define PAGE_OFFSET UL(0x40000000) -#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) #ifndef __ASSEMBLY__ @@ -29,32 +26,52 @@ /* RAM has 1:1 mapping on the PCIe/x Busses */ #define __virt_to_bus(x) (__virt_to_phys(x)) -#define __bus_to_virt(x) (__phys_to_virt(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) -#define virt_to_lbus(x) \ -(( ((void*)(x) >= (void*)IOP13XX_PMMR_V_START) && \ -((void*)(x) < (void*)IOP13XX_PMMR_V_END) ) ? \ -((x) - IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_PHYS_MEM_BASE) : \ -((x) - PAGE_OFFSET + PHYS_OFFSET)) +static inline dma_addr_t __virt_to_lbus(unsigned long x) +{ + return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE; +} -#define lbus_to_virt(x) \ -(( ((x) >= IOP13XX_PMMR_P_START) && ((x) < IOP13XX_PMMR_P_END) ) ? \ -((x) - IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_VIRT_MEM_BASE ) : \ -((x) - PHYS_OFFSET + PAGE_OFFSET)) +static inline unsigned long __lbus_to_virt(dma_addr_t x) +{ + return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE; +} + +#define __is_lbus_dma(a) \ + ((a) >= IOP13XX_PMMR_P_START && (a) < IOP13XX_PMMR_P_END) + +#define __is_lbus_virt(a) \ + ((a) >= IOP13XX_PMMR_V_START && (a) < IOP13XX_PMMR_V_END) /* Device is an lbus device if it is on the platform bus of the IOP13XX */ -#define is_lbus_device(dev) (dev &&\ - (strncmp(dev->bus->name, "platform", 8) == 0)) +#define is_lbus_device(dev) \ + (dev && strncmp(dev->bus->name, "platform", 8) == 0) -#define __arch_page_to_dma(dev, page) \ -({is_lbus_device(dev) ? (dma_addr_t)virt_to_lbus(page_address(page)) : \ -(dma_addr_t)__virt_to_bus(page_address(page));}) +#define __arch_dma_to_virt(dev, addr) \ + ({ \ + unsigned long __virt; \ + dma_addr_t __dma = addr; \ + if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \ + __virt = __lbus_to_virt(__dma); \ + else \ + __virt = __bus_to_virt(__dma); \ + (void *)__virt; \ + }) -#define __arch_dma_to_virt(dev, addr) \ -({is_lbus_device(dev) ? lbus_to_virt(addr) : __bus_to_virt(addr);}) +#define __arch_virt_to_dma(dev, addr) \ + ({ \ + unsigned long __virt = (unsigned long)addr; \ + dma_addr_t __dma; \ + if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \ + __dma = __virt_to_lbus(__virt); \ + else \ + __dma = __virt_to_bus(__virt); \ + __dma; \ + }) -#define __arch_virt_to_dma(dev, addr) \ -({is_lbus_device(dev) ? virt_to_lbus(addr) : __virt_to_bus(addr);}) +#define __arch_page_to_dma(dev, page) \ + __arch_virt_to_dma(dev, page_address(page)) #endif /* CONFIG_ARCH_IOP13XX */ #endif /* !ASSEMBLY */ diff --git a/arch/arm/mach-iop13xx/include/mach/pci.h b/arch/arm/mach-iop13xx/include/mach/pci.h index 17b5515af8b..59f42b53557 100644 --- a/arch/arm/mach-iop13xx/include/mach/pci.h +++ b/arch/arm/mach-iop13xx/include/mach/pci.h @@ -1,7 +1,7 @@ #ifndef _IOP13XX_PCI_H_ #define _IOP13XX_PCI_H_ +#include <linux/io.h> #include <mach/irqs.h> -#include <asm/io.h> struct pci_sys_data; struct hw_pci; diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h index 49213d9d7ca..d6d52527589 100644 --- a/arch/arm/mach-iop13xx/include/mach/time.h +++ b/arch/arm/mach-iop13xx/include/mach/time.h @@ -41,7 +41,7 @@ static inline unsigned long iop13xx_core_freq(void) return 1200000000; default: printk("%s: warning unknown frequency, defaulting to 800Mhz\n", - __FUNCTION__); + __func__); } return 800000000; @@ -60,7 +60,7 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void) return 4; default: printk("%s: warning unknown ratio, defaulting to 2\n", - __FUNCTION__); + __func__); } return 2; diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index 26cfa318142..52958099781 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c @@ -18,8 +18,8 @@ */ #include <linux/kernel.h> #include <linux/module.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> void * __iomem __iop13xx_io(unsigned long io_addr) { diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c index 63ef1124ca5..f34b0ed8063 100644 --- a/arch/arm/mach-iop13xx/msi.c +++ b/arch/arm/mach-iop13xx/msi.c @@ -110,8 +110,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) do { j = find_first_bit(&status, 32); (write_imipr[i])(1 << j); /* write back to clear bit */ - desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i); - desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc); + generic_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i)); status = (read_imipr[i])(); } while (status); } diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index b17ccc8cb47..cfd4d2e6dac 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c @@ -18,13 +18,13 @@ */ #include <linux/serial_8250.h> +#include <linux/io.h> #ifdef CONFIG_MTD_PHYSMAP #include <linux/mtd/physmap.h> #endif #include <asm/mach/map.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/hardware/iop_adma.h> #define IOP13XX_UART_XTAL 33334000 diff --git a/arch/arm/mach-iop13xx/tpmi.c b/arch/arm/mach-iop13xx/tpmi.c index 2476347ea62..c6af1e1bee3 100644 --- a/arch/arm/mach-iop13xx/tpmi.c +++ b/arch/arm/mach-iop13xx/tpmi.c @@ -21,7 +21,7 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/irq.h> #include <asm/sizes.h> diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 45d61276d23..a9c2dfdb250 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -25,8 +25,8 @@ #include <linux/mtd/physmap.h> #include <linux/i2c.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 082818aaa20..dd1cd990451 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -26,8 +26,9 @@ #include <linux/serial_8250.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> +#include <asm/cputype.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -49,8 +50,7 @@ static int force_ep80219; static int is_80219(void) { - extern int processor_id; - return !!((processor_id & 0xffffffe0) == 0x69052e20); + return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20); } static int is_ep80219(void) diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index d735539808b..fbe27798759 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -23,8 +23,8 @@ #include <linux/serial_8250.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index 3173f9c5835..d2e42789972 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c @@ -30,8 +30,8 @@ #include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/reboot.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index c7d99f9fafe..d51e10cddf2 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -22,8 +22,8 @@ #include <linux/serial_8250.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index af616c5f4fb..92fb44cdbca 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -22,8 +22,8 @@ #include <linux/serial_8250.h> #include <linux/mtd/physmap.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c index 8c21870fa80..cdae24e46ee 100644 --- a/arch/arm/mach-iop33x/uart.c +++ b/arch/arm/mach-iop33x/uart.c @@ -17,7 +17,7 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/serial_8250.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index a6a4f93085f..babb2259716 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -84,64 +84,57 @@ static struct map_desc ixp2000_io_desc[] __initdata = { .virtual = IXP2000_CAP_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_INTCTL_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_MSF_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), .length = IXP2000_SCRATCH_RING_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_SRAM0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), .length = IXP2000_SRAM0_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, } }; void __init ixp2000_map_io(void) { - /* - * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that - * XCB=101 (to avoid triggering erratum #66), and given that - * this mode speeds up I/O accesses and we have write buffer - * flushes in the right places anyway, it doesn't hurt to use - * XCB=101 for all IXP2000s. - */ iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); /* Set slowport to 8-bit mode. */ @@ -311,8 +304,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc) for (i = 0; i <= 7; i++) { if (status & (1<<i)) { - desc = irq_desc + i + IRQ_IXP2000_GPIO0; - desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc); + generic_handle_irq(i + IRQ_IXP2000_GPIO0); } } } @@ -404,8 +396,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc) for(i = 31; i >= 0; i--) { if(status & (1 << i)) { - desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i; - desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc); + generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i); } } } diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index c62ed655c1a..c84dfac1388 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -32,8 +32,8 @@ #include <linux/tty.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = { .virtual = ENP2611_CALEB_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), .length = ENP2611_CALEB_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = ENP2611_PM3386_0_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), .length = ENP2611_PM3386_0_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, }, { .virtual = ENP2611_PM3386_1_VIRT_BASE, .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), .length = ENP2611_PM3386_1_SIZE, - .type = MT_DEVICE_IXP2000, + .type = MT_DEVICE, } }; diff --git a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h index 19d80379a3e..822f63f2f4a 100644 --- a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h +++ b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h @@ -41,13 +41,7 @@ * Most of the registers are clumped in 4K regions spread throughout * the 0xc0000000 -> 0xc0100000 address range, but we just map in * the whole range using a single 1 MB section instead of small - * 4K pages. This has two advantages for us: - * - * 1) We use only one TLB entry for large number of on-chip I/O devices. - * - * 2) We can easily set the Section attributes to XCB=101 on the IXP2400 - * as required per erratum #66. We accomplish this by using a - * new MT_IXP2000_DEVICE memory type with the bits set as required. + * 4K pages. * * CAP stands for CSR Access Proxy. * diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index c673b9ef9f6..4467c4224d7 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/slab.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/page.h> diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index 6715b50829a..94f68ba9ea5 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/slab.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/page.h> diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 5a781fd9757..30451300751 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/slab.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -129,10 +129,8 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc) for(i = 0; i < board_irq_count; i++) { if(ex_interrupt & (1 << i)) { - struct irq_desc *cpld_desc; int cpld_irq = IXP2000_BOARD_IRQ(0) + i; - cpld_desc = irq_desc + cpld_irq; - desc_handle_irq(cpld_irq, cpld_desc); + generic_handle_irq(cpld_irq); } } @@ -145,7 +143,7 @@ static struct irq_chip ixdp2x00_cpld_irq_chip = { .unmask = ixdp2x00_irq_unmask }; -void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs) +void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs) { unsigned int irq; @@ -156,7 +154,7 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne board_irq_stat = stat_reg; board_irq_mask = mask_reg; - board_irq_count = nr_irqs; + board_irq_count = nr_of_irqs; *board_irq_mask = 0xffffffff; diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 78a2341dee2..4a12327a09a 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -30,8 +30,8 @@ #include <linux/serial_core.h> #include <linux/platform_device.h> #include <linux/serial_8250.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -79,10 +79,8 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc) for (i = 0; i < IXP2000_BOARD_IRQS; i++) { if (ex_interrupt & (1 << i)) { - struct irq_desc *cpld_desc; int cpld_irq = IXP2000_BOARD_IRQ(0) + i; - cpld_desc = irq_desc + cpld_irq; - desc_handle_irq(cpld_irq, cpld_desc); + generic_handle_irq(cpld_irq); } } diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c index 03d916fbe53..60e9fd08ab8 100644 --- a/arch/arm/mach-ixp2000/pci.c +++ b/arch/arm/mach-ixp2000/pci.c @@ -24,8 +24,8 @@ #include <linux/ioport.h> #include <linux/slab.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 68b4ac5b248..aa4c4420ff3 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -253,7 +253,6 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) { u32 pci_interrupt; unsigned int irqno; - struct irq_desc *int_desc; pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; @@ -268,8 +267,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) BUG(); } - int_desc = irq_desc + irqno; - desc_handle_irq(irqno, int_desc); + generic_handle_irq(irqno); desc->chip->unmask(irq); } diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index b6e0bfa44df..f1b124a709a 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -68,11 +68,9 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { if (ex_interrupt & (1 << i)) { - struct irq_desc *cpld_desc; int cpld_irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i); - cpld_desc = irq_desc + cpld_irq; - desc_handle_irq(cpld_irq, cpld_desc); + generic_handle_irq(cpld_irq); } } @@ -105,11 +103,9 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { if (ex_interrupt & (1 << i)) { - struct irq_desc *cpld_desc; int cpld_irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i); - cpld_desc = irq_desc + cpld_irq; - desc_handle_irq(cpld_irq, cpld_desc); + generic_handle_irq(cpld_irq); } } diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c index 701d60aa0ef..59022becb13 100644 --- a/arch/arm/mach-ixp23xx/pci.c +++ b/arch/arm/mach-ixp23xx/pci.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/slab.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/sizes.h> #include <asm/system.h> diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 192538a0457..d816c51320c 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -25,9 +25,10 @@ #include <linux/slab.h> #include <linux/delay.h> #include <linux/device.h> +#include <linux/io.h> #include <asm/dma-mapping.h> -#include <asm/io.h> +#include <asm/cputype.h> #include <asm/irq.h> #include <asm/sizes.h> #include <asm/system.h> @@ -366,15 +367,13 @@ void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size, void __init ixp4xx_pci_preinit(void) { - unsigned long processor_id; - - asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :); + unsigned long cpuid = read_cpuid_id(); /* * Determine which PCI read method to use. * Rev 0 IXP425 requires workaround. */ - if (!(processor_id & 0xf) && cpu_is_ixp42x()) { + if (!(cpuid & 0xf) && cpu_is_ixp42x()) { printk("PCI: IXP42x A0 silicon detected - " "PCI Non-Prefetch Workaround Enabled\n"); ixp4xx_pci_read = ixp4xx_pci_read_errata; diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 58bd2842a6f..7766f469456 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -28,11 +28,11 @@ #include <linux/timex.h> #include <linux/clocksource.h> #include <linux/clockchips.h> +#include <linux/io.h> #include <mach/udc.h> #include <mach/hardware.h> #include <asm/uaccess.h> -#include <asm/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/irq.h> diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 501dfdcc39f..e7c6386782e 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c @@ -23,11 +23,11 @@ #include <linux/reboot.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> -#include <asm/io.h> #include <asm/gpio.h> static struct flash_platform_data fsg_flash_data = { diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h index ff8aa2393bf..51bd69c46d9 100644 --- a/arch/arm/mach-ixp4xx/include/mach/cpu.h +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h @@ -14,18 +14,19 @@ #ifndef __ASM_ARCH_CPU_H__ #define __ASM_ARCH_CPU_H__ -extern unsigned int processor_id; +#include <asm/cputype.h> + /* Processor id value in CP15 Register 0 */ #define IXP425_PROCESSOR_ID_VALUE 0x690541c0 #define IXP435_PROCESSOR_ID_VALUE 0x69054040 #define IXP465_PROCESSOR_ID_VALUE 0x69054200 #define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 -#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ +#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ IXP425_PROCESSOR_ID_VALUE) -#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ +#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ IXP435_PROCESSOR_ID_VALUE) -#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ +#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ IXP465_PROCESSOR_ID_VALUE) static inline u32 ixp4xx_read_feature_bits(void) diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 9b2d2ec14c8..f4a0c1bc133 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -20,6 +20,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> +#include <linux/delay.h> #include <asm/types.h> #include <asm/setup.h> @@ -29,7 +30,6 @@ #include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> -#include <asm/delay.h> static struct flash_platform_data ixdp425_flash_data = { .map_name = "cfi_probe", diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index 84b5e62a9c0..0acd95ecf27 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -28,11 +28,11 @@ #include <linux/reboot.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> -#include <asm/io.h> #include <asm/gpio.h> static struct flash_platform_data nas100d_flash_data = { diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index a48a6655b88..bc9d920ae54 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -25,12 +25,12 @@ #include <linux/reboot.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> #include <asm/mach/time.h> -#include <asm/io.h> #include <asm/gpio.h> static struct flash_platform_data nslu2_flash_data = { diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c index c79f492072f..5db4f0bbe5e 100644 --- a/arch/arm/mach-kirkwood/addr-map.c +++ b/arch/arm/mach-kirkwood/addr-map.c @@ -48,6 +48,7 @@ struct mbus_dram_target_info kirkwood_mbus_dram_info; +static int __initdata win_alloc_count; static int __init cpu_win_can_remap(int win) { @@ -111,6 +112,8 @@ void __init kirkwood_setup_cpu_mbus(void) setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, TARGET_DEV_BUS, ATTR_DEV_NAND, -1); + win_alloc_count = 3; + /* * Setup MBUS dram target info. */ @@ -137,3 +140,8 @@ void __init kirkwood_setup_cpu_mbus(void) } kirkwood_mbus_dram_info.num_cs = cs; } + +void __init kirkwood_setup_sram_win(u32 base, u32 size) +{ + setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1); +} diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 189f16f3619..85cad05d8c5 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -98,7 +98,6 @@ void __init kirkwood_ehci_init(void) * GE00 ****************************************************************************/ struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = { - .t_clk = KIRKWOOD_TCLK, .dram = &kirkwood_mbus_dram_info, }; @@ -108,6 +107,11 @@ static struct resource kirkwood_ge00_shared_resources[] = { .start = GE00_PHYS_BASE + 0x2000, .end = GE00_PHYS_BASE + 0x3fff, .flags = IORESOURCE_MEM, + }, { + .name = "ge00 err irq", + .start = IRQ_KIRKWOOD_GE00_ERR, + .end = IRQ_KIRKWOOD_GE00_ERR, + .flags = IORESOURCE_IRQ, }, }; @@ -117,7 +121,7 @@ static struct platform_device kirkwood_ge00_shared = { .dev = { .platform_data = &kirkwood_ge00_shared_data, }, - .num_resources = 1, + .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources), .resource = kirkwood_ge00_shared_resources, }; @@ -201,7 +205,6 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) * SPI ****************************************************************************/ static struct orion_spi_info kirkwood_spi_plat_data = { - .tclk = KIRKWOOD_TCLK, }; static struct resource kirkwood_spi_resources[] = { @@ -239,7 +242,7 @@ static struct plat_serial8250_port kirkwood_uart0_data[] = { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = KIRKWOOD_TCLK, + .uartclk = 0, }, { }, }; @@ -283,7 +286,7 @@ static struct plat_serial8250_port kirkwood_uart1_data[] = { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = KIRKWOOD_TCLK, + .uartclk = 0, }, { }, }; @@ -525,9 +528,23 @@ void __init kirkwood_xor1_init(void) /***************************************************************************** * Time handling ****************************************************************************/ +int kirkwood_tclk; + +int __init kirkwood_find_tclk(void) +{ + u32 dev, rev; + + kirkwood_pcie_id(&dev, &rev); + if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0) + return 200000000; + + return 166666667; +} + static void kirkwood_timer_init(void) { - orion_time_init(IRQ_KIRKWOOD_BRIDGE, KIRKWOOD_TCLK); + kirkwood_tclk = kirkwood_find_tclk(); + orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); } struct sys_timer kirkwood_timer = { @@ -538,33 +555,62 @@ struct sys_timer kirkwood_timer = { /***************************************************************************** * General ****************************************************************************/ +/* + * Identify device ID and revision. + */ static char * __init kirkwood_id(void) { - switch (readl(DEVICE_ID) & 0x3) { - case 0: - return "88F6180"; - case 1: - return "88F6192"; - case 2: - return "88F6281"; + u32 dev, rev; + + kirkwood_pcie_id(&dev, &rev); + + if (dev == MV88F6281_DEV_ID) { + if (rev == MV88F6281_REV_Z0) + return "MV88F6281-Z0"; + else if (rev == MV88F6281_REV_A0) + return "MV88F6281-A0"; + else + return "MV88F6281-Rev-Unsupported"; + } else if (dev == MV88F6192_DEV_ID) { + if (rev == MV88F6192_REV_Z0) + return "MV88F6192-Z0"; + else if (rev == MV88F6192_REV_A0) + return "MV88F6192-A0"; + else + return "MV88F6192-Rev-Unsupported"; + } else if (dev == MV88F6180_DEV_ID) { + if (rev == MV88F6180_REV_A0) + return "MV88F6180-Rev-A0"; + else + return "MV88F6180-Rev-Unsupported"; + } else { + return "Device-Unknown"; } - - return "unknown 88F6000 variant"; } -static int __init is_l2_writethrough(void) +static void __init kirkwood_l2_init(void) { - return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH); +#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH + writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); + feroceon_l2_init(1); +#else + writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); + feroceon_l2_init(0); +#endif } void __init kirkwood_init(void) { printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", - kirkwood_id(), KIRKWOOD_TCLK); + kirkwood_id(), kirkwood_tclk); + kirkwood_ge00_shared_data.t_clk = kirkwood_tclk; + kirkwood_spi_plat_data.tclk = kirkwood_tclk; + kirkwood_uart0_data[0].uartclk = kirkwood_tclk; + kirkwood_uart1_data[0].uartclk = kirkwood_tclk; kirkwood_setup_cpu_mbus(); #ifdef CONFIG_CACHE_FEROCEON_L2 - feroceon_l2_init(is_l2_writethrough()); + kirkwood_l2_init(); #endif } diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index 69cd113af03..8fa0f6a2763 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h @@ -23,10 +23,9 @@ void kirkwood_init_irq(void); extern struct mbus_dram_target_info kirkwood_mbus_dram_info; void kirkwood_setup_cpu_mbus(void); -void kirkwood_setup_pcie_io_win(int window, u32 base, u32 size, - int maj, int min); -void kirkwood_setup_pcie_mem_win(int window, u32 base, u32 size, - int maj, int min); +void kirkwood_setup_sram_win(u32 base, u32 size); + +void kirkwood_pcie_id(u32 *dev, u32 *rev); void kirkwood_ehci_init(void); void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index 610fb24d8ae..a14c2948c62 100644 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c @@ -25,7 +25,7 @@ #include "common.h" static struct mv643xx_eth_platform_data db88f6281_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data db88f6281_sata_data = { @@ -44,7 +44,6 @@ static void __init db88f6281_init(void) kirkwood_rtc_init(); kirkwood_sata_init(&db88f6281_sata_data); kirkwood_uart0_init(); - kirkwood_uart1_init(); } static int __init db88f6281_pci_init(void) diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h index 6fd05838c72..ffab89f21c1 100644 --- a/arch/arm/mach-kirkwood/include/mach/irqs.h +++ b/arch/arm/mach-kirkwood/include/mach/irqs.h @@ -50,6 +50,7 @@ #define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 #define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 #define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 +#define IRQ_KIRKWOOD_GE00_ERR 46 /* * KIRKWOOD General Purpose Pins diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 5c69992295e..eae42406fd8 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -68,6 +68,20 @@ #define L2_WRITETHROUGH 0x00000010 /* + * Supported devices and revisions. + */ +#define MV88F6281_DEV_ID 0x6281 +#define MV88F6281_REV_Z0 0 +#define MV88F6281_REV_A0 2 + +#define MV88F6192_DEV_ID 0x6192 +#define MV88F6192_REV_Z0 0 +#define MV88F6192_REV_A0 2 + +#define MV88F6180_DEV_ID 0x6180 +#define MV88F6180_REV_A0 2 + +/* * Register Map */ #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h index f77ef4a32c5..c923cd169b9 100644 --- a/arch/arm/mach-kirkwood/include/mach/timex.h +++ b/arch/arm/mach-kirkwood/include/mach/timex.h @@ -8,4 +8,3 @@ #define CLOCK_TICK_RATE (100 * HZ) -#define KIRKWOOD_TCLK 166666667 diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 2195fa31f6b..f6b08f207c8 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -18,6 +18,12 @@ #define PCIE_BASE ((void __iomem *)PCIE_VIRT_BASE) +void __init kirkwood_pcie_id(u32 *dev, u32 *rev) +{ + *dev = orion_pcie_dev_id(PCIE_BASE); + *rev = orion_pcie_rev(PCIE_BASE); +} + static int pcie_valid_config(int bus, int dev) { /* diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index a3012d44597..b1d1a87a682 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -30,7 +30,7 @@ #define RD88F6192_GPIO_USB_VBUS 10 static struct mv643xx_eth_platform_data rd88f6192_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data rd88f6192_sata_data = { diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index d96487a0f18..f785093e433 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -69,7 +69,7 @@ static struct platform_device rd88f6281_nand_flash = { }; static struct mv643xx_eth_platform_data rd88f6281_ge00_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; @@ -90,7 +90,6 @@ static void __init rd88f6281_init(void) kirkwood_rtc_init(); kirkwood_sata_init(&rd88f6281_sata_data); kirkwood_uart0_init(); - kirkwood_uart1_init(); platform_device_register(&rd88f6281_nand_flash); } diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c index c6c08e80023..7f3f24053a0 100644 --- a/arch/arm/mach-ks8695/cpu.c +++ b/arch/arm/mach-ks8695/cpu.c @@ -24,9 +24,9 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c index 3624e65cd89..9aecf0c4b8b 100644 --- a/arch/arm/mach-ks8695/gpio.c +++ b/arch/arm/mach-ks8695/gpio.c @@ -23,8 +23,8 @@ #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/module.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/mach/irq.h> @@ -72,7 +72,7 @@ int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type) /* set pin as input */ x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); - x &= ~IOPM_(pin); + x &= ~IOPM(pin); __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); local_irq_restore(flags); @@ -108,7 +108,7 @@ int __init_or_module gpio_direction_input(unsigned int pin) /* set pin as input */ x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); - x &= ~IOPM_(pin); + x &= ~IOPM(pin); __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); local_irq_restore(flags); @@ -136,14 +136,14 @@ int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state) /* set line state */ x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); if (state) - x |= (1 << pin); + x |= IOPD(pin); else - x &= ~(1 << pin); + x &= ~IOPD(pin); __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); /* set pin as output */ x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); - x |= IOPM_(pin); + x |= IOPM(pin); __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM); local_irq_restore(flags); @@ -168,9 +168,9 @@ void gpio_set_value(unsigned int pin, unsigned int state) /* set output line state */ x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); if (state) - x |= (1 << pin); + x |= IOPD(pin); else - x &= ~(1 << pin); + x &= ~IOPD(pin); __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD); local_irq_restore(flags); @@ -189,7 +189,7 @@ int gpio_get_value(unsigned int pin) return -EINVAL; x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); - return (x & (1 << pin)) != 0; + return (x & IOPD(pin)) != 0; } EXPORT_SYMBOL(gpio_get_value); @@ -240,7 +240,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused) for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) { seq_printf(s, "%i:\t", i); - seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input"); + seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input"); if (i <= KS8695_GPIO_3) { if (ctrl & enable[i]) { @@ -273,7 +273,7 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused) seq_printf(s, "\t"); - seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0); + seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0); } return 0; } diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h index dadbe66cb75..8fbc4c76c38 100644 --- a/arch/arm/mach-ks8695/include/mach/memory.h +++ b/arch/arm/mach-ks8695/include/mach/memory.h @@ -31,8 +31,8 @@ /* Platform-bus mapping */ extern struct bus_type platform_bus_type; #define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type) -#define __arch_dma_to_virt(dev, x) ({ is_lbus_device(dev) ? \ - __phys_to_virt(x) : __bus_to_virt(x); }) +#define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \ + __phys_to_virt(x) : __bus_to_virt(x)); }) #define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \ (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) #define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x)) diff --git a/arch/arm/mach-ks8695/include/mach/regs-gpio.h b/arch/arm/mach-ks8695/include/mach/regs-gpio.h index 0df6fe61d1c..90614a7d054 100644 --- a/arch/arm/mach-ks8695/include/mach/regs-gpio.h +++ b/arch/arm/mach-ks8695/include/mach/regs-gpio.h @@ -24,7 +24,7 @@ /* Port Mode Register */ -#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */ +#define IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */ /* Port Control Register */ #define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ @@ -50,6 +50,6 @@ #define IOPC_TM_EDGE (6) /* Both Edge Detection */ /* Port Data Register */ -#define IOPD_(x) (1 << (x)) /* Signal Level of GPIO Pin x */ +#define IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */ #endif diff --git a/arch/arm/mach-ks8695/include/mach/regs-lan.h b/arch/arm/mach-ks8695/include/mach/regs-lan.h index 9ef409901e7..82c5f3791af 100644 --- a/arch/arm/mach-ks8695/include/mach/regs-lan.h +++ b/arch/arm/mach-ks8695/include/mach/regs-lan.h @@ -29,8 +29,8 @@ #define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */ #define KS8695_LMAL (0x18) /* MAC Station Address Low */ #define KS8695_LMAH (0x1c) /* MAC Station Address High */ -#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ -#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ +#define KS8695_LMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ +#define KS8695_LMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ /* DMA Transmit Control Register */ diff --git a/arch/arm/mach-ks8695/include/mach/regs-wan.h b/arch/arm/mach-ks8695/include/mach/regs-wan.h index eb494ec6e95..c475bed22b8 100644 --- a/arch/arm/mach-ks8695/include/mach/regs-wan.h +++ b/arch/arm/mach-ks8695/include/mach/regs-wan.h @@ -29,8 +29,8 @@ #define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */ #define KS8695_WMAL (0x18) /* MAC Station Address Low */ #define KS8695_WMAH (0x1c) /* MAC Station Address High */ -#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ -#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ +#define KS8695_WMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ +#define KS8695_WMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ /* DMA Transmit Control Register */ diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h index 2a6f9186905..5a9b032bdbe 100644 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ b/arch/arm/mach-ks8695/include/mach/system.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <asm/io.h> +#include <linux/io.h> #include <mach/regs-timer.h> static void arch_idle(void) diff --git a/arch/arm/mach-ks8695/include/mach/uncompress.h b/arch/arm/mach-ks8695/include/mach/uncompress.h index 0eee37a6907..9495cb4d701 100644 --- a/arch/arm/mach-ks8695/include/mach/uncompress.h +++ b/arch/arm/mach-ks8695/include/mach/uncompress.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include <asm/io.h> +#include <linux/io.h> #include <mach/regs-uart.h> static void putc(char c) diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c index e5e71f4dbb8..e375c1d53f8 100644 --- a/arch/arm/mach-ks8695/irq.c +++ b/arch/arm/mach-ks8695/irq.c @@ -24,10 +24,10 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c index 1746c67af17..f5ebcc0fcab 100644 --- a/arch/arm/mach-ks8695/pci.c +++ b/arch/arm/mach-ks8695/pci.c @@ -27,8 +27,8 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/delay.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/signal.h> #include <asm/mach/pci.h> #include <mach/hardware.h> @@ -141,7 +141,7 @@ static struct pci_ops ks8695_pci_ops = { .write = ks8695_pci_writeconfig, }; -static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) +static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) { return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); } diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index 940888dffc1..69c072c2c0f 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c @@ -24,8 +24,8 @@ #include <linux/irq.h> #include <linux/kernel.h> #include <linux/sched.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/mach/time.h> #include <mach/regs-timer.h> diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig index 6f4c6a1798c..9be7466e346 100644 --- a/arch/arm/mach-lh7a40x/Kconfig +++ b/arch/arm/mach-lh7a40x/Kconfig @@ -40,23 +40,22 @@ config LPD7A40X_CPLD_SSP bool config LH7A40X_CONTIGMEM - bool "Disable NUMA Support" - depends on ARCH_LH7A40X + bool "Disable NUMA/SparseMEM Support" help Say Y here if your bootloader sets the SROMLL bit(s) in the SDRAM controller, organizing memory as a contiguous - array. This option will disable CONFIG_DISCONTIGMEM and - force the kernel to manage all memory in one node. + array. This option will disable sparse memory support + and force the kernel to manage all memory in one node. - Setting this option incorrectly may prevent the kernel from - booting. It is OK to leave it N. + Setting this option incorrectly may prevent the kernel + from booting. It is OK to leave it N. For more information, consult <file:Documentation/arm/Sharp-LH/SDRAM>. config LH7A40X_ONE_BANK_PER_NODE bool "Optimize NUMA Node Tables for Size" - depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM + depends on !LH7A40X_CONTIGMEM help Say Y here to produce compact memory node tables. By default pairs of adjacent physical RAM banks are managed diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index 551b9726182..3d7bd50b909 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c @@ -77,7 +77,7 @@ static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc) irq = IRQ_KEV7A400_CPLD; for (; mask; mask >>= 1, ++irq) if (mask & 1) - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } void __init lh7a40x_init_board_irq (void) diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index e373fb8e269..cb15e5d3212 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -214,11 +214,11 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) desc->chip->ack (irq); if ((mask & (1<<0)) == 0) /* WLAN */ - IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); + generic_handle_irq(IRQ_LPD7A40X_ETH_INT); #if defined (IRQ_TOUCH) if ((mask & (1<<1)) == 0) /* Touch */ - IRQ_DISPATCH (IRQ_TOUCH); + generic_handle_irq(IRQ_TOUCH); #endif desc->chip->unmask (irq); /* Level-triggered need this */ diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h index 0ca20c6c83b..6ed3f6b6db7 100644 --- a/arch/arm/mach-lh7a40x/common.h +++ b/arch/arm/mach-lh7a40x/common.h @@ -15,4 +15,3 @@ extern void lh7a404_init_irq (void); extern void lh7a40x_clcd_init (void); extern void lh7a40x_init_board_irq (void); -#define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq)) diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h index f7107b4c197..1da14ff66c9 100644 --- a/arch/arm/mach-lh7a40x/include/mach/memory.h +++ b/arch/arm/mach-lh7a40x/include/mach/memory.h @@ -73,4 +73,10 @@ #endif +/* + * Sparsemem version of the above + */ +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 24 + #endif diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c index 0d5063ebda1..fd033bb4342 100644 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c @@ -63,10 +63,10 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) desc->chip->ack (irq); if ((mask & 0x1) == 0) /* WLAN */ - IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT); + generic_handle_irq(IRQ_LPD7A40X_ETH_INT); if ((mask & 0x2) == 0) /* Touch */ - IRQ_DISPATCH (IRQ_LPD7A400_TS); + generic_handle_irq(IRQ_LPD7A400_TS); desc->chip->unmask (irq); /* Level-triggered need this */ } diff --git a/arch/arm/mach-lh7a40x/ssp-cpld.c b/arch/arm/mach-lh7a40x/ssp-cpld.c index 51fbef9601b..2901d49d148 100644 --- a/arch/arm/mach-lh7a40x/ssp-cpld.c +++ b/arch/arm/mach-lh7a40x/ssp-cpld.c @@ -43,8 +43,8 @@ #include <linux/init.h> #include <linux/delay.h> #include <linux/spinlock.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index 7fe9e06cf66..4601e425bae 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c @@ -13,9 +13,9 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/time.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> diff --git a/arch/arm/mach-loki/addr-map.c b/arch/arm/mach-loki/addr-map.c index 70ca56bb6f3..0332d8f5c18 100644 --- a/arch/arm/mach-loki/addr-map.c +++ b/arch/arm/mach-loki/addr-map.c @@ -11,8 +11,8 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/mbus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include "common.h" /* diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c index 5a487930cb2..e1f97338d5b 100644 --- a/arch/arm/mach-loki/irq.c +++ b/arch/arm/mach-loki/irq.c @@ -11,7 +11,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/irq.h> -#include <asm/io.h> +#include <linux/io.h> #include <plat/irq.h> #include "common.h" diff --git a/arch/arm/mach-loki/lb88rc8480-setup.c b/arch/arm/mach-loki/lb88rc8480-setup.c index 2cc9ac9b488..85f9c1296aa 100644 --- a/arch/arm/mach-loki/lb88rc8480-setup.c +++ b/arch/arm/mach-loki/lb88rc8480-setup.c @@ -67,7 +67,7 @@ static struct platform_device lb88rc8480_boot_flash = { }; static struct mv643xx_eth_platform_data lb88rc8480_ge0_data = { - .phy_addr = 1, + .phy_addr = MV643XX_ETH_PHY_ADDR(1), .mac_addr = { 0x00, 0x50, 0x43, 0x11, 0x22, 0x33 }, }; diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index 995afc4ade4..a24259133e0 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -18,6 +18,8 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/input.h> +#include <linux/io.h> +#include <linux/delay.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -28,9 +30,6 @@ #include <mach/board.h> #include <mach/msm_iomap.h> -#include <asm/io.h> -#include <asm/delay.h> - #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c index 3a511368a5d..604f8ade958 100644 --- a/arch/arm/mach-msm/common.c +++ b/arch/arm/mach-msm/common.c @@ -19,9 +19,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/flash.h> -#include <asm/io.h> #include <asm/setup.h> diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c index 9de08265d97..0c8f252637e 100644 --- a/arch/arm/mach-msm/dma.c +++ b/arch/arm/mach-msm/dma.c @@ -13,7 +13,7 @@ * */ -#include <asm/io.h> +#include <linux/io.h> #include <linux/interrupt.h> #include <mach/dma.h> diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 5976200de99..7999e4ba8e2 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -18,9 +18,9 @@ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/page.h> #include <mach/msm_iomap.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 66901baf8c8..04b8d182ff8 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -19,11 +19,10 @@ #include <linux/interrupt.h> #include <linux/ptrace.h> #include <linux/timer.h> - #include <linux/irq.h> -#include <mach/hardware.h> +#include <linux/io.h> -#include <asm/io.h> +#include <mach/hardware.h> #include <mach/msm_iomap.h> diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 9f02d7dca98..2bffe9b7e9f 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -20,12 +20,11 @@ #include <linux/clk.h> #include <linux/clockchips.h> #include <linux/delay.h> +#include <linux/io.h> #include <asm/mach/time.h> #include <mach/msm_iomap.h> -#include <asm/io.h> - #define MSM_DGT_BASE (MSM_GPT_BASE + 0x10) #define MSM_DGT_SHIFT (5) diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c index 4004b672a2e..311d5b0e9bc 100644 --- a/arch/arm/mach-mv78xx0/addr-map.c +++ b/arch/arm/mach-mv78xx0/addr-map.c @@ -11,7 +11,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/mbus.h> -#include <asm/io.h> +#include <linux/io.h> #include "common.h" /* diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 953a26c469c..238a2f8c2d5 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -285,6 +285,11 @@ static struct resource mv78xx0_ge00_shared_resources[] = { .start = GE00_PHYS_BASE + 0x2000, .end = GE00_PHYS_BASE + 0x3fff, .flags = IORESOURCE_MEM, + }, { + .name = "ge err irq", + .start = IRQ_MV78XX0_GE_ERR, + .end = IRQ_MV78XX0_GE_ERR, + .flags = IORESOURCE_IRQ, }, }; @@ -294,7 +299,7 @@ static struct platform_device mv78xx0_ge00_shared = { .dev = { .platform_data = &mv78xx0_ge00_shared_data, }, - .num_resources = 1, + .num_resources = ARRAY_SIZE(mv78xx0_ge00_shared_resources), .resource = mv78xx0_ge00_shared_resources, }; @@ -330,6 +335,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) struct mv643xx_eth_shared_platform_data mv78xx0_ge01_shared_data = { .t_clk = 0, .dram = &mv78xx0_mbus_dram_info, + .shared_smi = &mv78xx0_ge00_shared, }; static struct resource mv78xx0_ge01_shared_resources[] = { @@ -370,7 +376,6 @@ static struct platform_device mv78xx0_ge01 = { void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) { eth_data->shared = &mv78xx0_ge01_shared; - eth_data->shared_smi = &mv78xx0_ge00_shared; mv78xx0_ge01.dev.platform_data = eth_data; platform_device_register(&mv78xx0_ge01_shared); @@ -384,6 +389,7 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) struct mv643xx_eth_shared_platform_data mv78xx0_ge10_shared_data = { .t_clk = 0, .dram = &mv78xx0_mbus_dram_info, + .shared_smi = &mv78xx0_ge00_shared, }; static struct resource mv78xx0_ge10_shared_resources[] = { @@ -424,7 +430,6 @@ static struct platform_device mv78xx0_ge10 = { void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) { eth_data->shared = &mv78xx0_ge10_shared; - eth_data->shared_smi = &mv78xx0_ge00_shared; mv78xx0_ge10.dev.platform_data = eth_data; platform_device_register(&mv78xx0_ge10_shared); @@ -438,6 +443,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) struct mv643xx_eth_shared_platform_data mv78xx0_ge11_shared_data = { .t_clk = 0, .dram = &mv78xx0_mbus_dram_info, + .shared_smi = &mv78xx0_ge00_shared, }; static struct resource mv78xx0_ge11_shared_resources[] = { @@ -478,7 +484,6 @@ static struct platform_device mv78xx0_ge11 = { void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) { eth_data->shared = &mv78xx0_ge11_shared; - eth_data->shared_smi = &mv78xx0_ge00_shared; mv78xx0_ge11.dev.platform_data = eth_data; platform_device_register(&mv78xx0_ge11_shared); diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index a2d0c978360..49f434c39eb 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -19,19 +19,19 @@ #include "common.h" static struct mv643xx_eth_platform_data db78x00_ge00_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv643xx_eth_platform_data db78x00_ge01_data = { - .phy_addr = 9, + .phy_addr = MV643XX_ETH_PHY_ADDR(9), }; static struct mv643xx_eth_platform_data db78x00_ge10_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, }; static struct mv643xx_eth_platform_data db78x00_ge11_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, }; static struct mv_sata_platform_data db78x00_sata_data = { diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index ed4a46bcd3b..fbfb2693ce6 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -26,14 +26,22 @@ ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] mov \irqnr, #31 ands \irqstat, \irqstat, \tmp + bne 1001f @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #63 - andeqs \irqstat, \irqstat, \tmp + ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] + ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] + mov \irqnr, #63 + ands \irqstat, \irqstat, \tmp + bne 1001f + + @ if no high interrupts set, check error interrupts + ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF] + ldr \tmp, [\base, #IRQ_MASK_ERR_OFF] + mov \irqnr, #95 + ands \irqstat, \irqstat, \tmp @ find first active interrupt source - clzne \irqstat, \irqstat +1001: clzne \irqstat, \irqstat subne \irqnr, \irqnr, \irqstat .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h index 995d7fb8d06..bebc330281e 100644 --- a/arch/arm/mach-mv78xx0/include/mach/irqs.h +++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h @@ -80,9 +80,14 @@ #define IRQ_MV78XX0_DB_OUT 61 /* + * MV78xx0 Error Interrupt Controller + */ +#define IRQ_MV78XX0_GE_ERR 70 + +/* * MV78XX0 General Purpose Pins */ -#define IRQ_MV78XX0_GPIO_START 64 +#define IRQ_MV78XX0_GPIO_START 96 #define NR_GPIO_IRQS GPIO_MAX #define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index ad664178d6e..ee9c5593ee9 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -71,8 +71,10 @@ #define BRIDGE_INT_TIMER1 0x0004 #define BRIDGE_INT_TIMER1_CLR (~0x0004) #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_ERR_OFF 0x0000 #define IRQ_CAUSE_LOW_OFF 0x0004 #define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_ERR_OFF 0x000c #define IRQ_MASK_LOW_OFF 0x0010 #define IRQ_MASK_HIGH_OFF 0x0014 #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 28248d37b99..503e5d195ae 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -19,4 +19,5 @@ void __init mv78xx0_init_irq(void) { orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); + orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF)); } diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h new file mode 100644 index 00000000000..c77a4b8f73b --- /dev/null +++ b/arch/arm/mach-mx2/devices.h @@ -0,0 +1,15 @@ + +extern struct platform_device mxc_gpt1; +extern struct platform_device mxc_gpt2; +extern struct platform_device mxc_gpt3; +extern struct platform_device mxc_gpt4; +extern struct platform_device mxc_gpt5; +extern struct platform_device mxc_wdt; +extern struct platform_device mxc_irda_device; +extern struct platform_device mxc_uart_device0; +extern struct platform_device mxc_uart_device1; +extern struct platform_device mxc_uart_device2; +extern struct platform_device mxc_uart_device3; +extern struct platform_device mxc_uart_device4; +extern struct platform_device mxc_uart_device5; + diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c index 4ce56ef4d8d..56e22d3ca07 100644 --- a/arch/arm/mach-mx2/mx27ads.c +++ b/arch/arm/mach-mx2/mx27ads.c @@ -34,6 +34,8 @@ #include <mach/iomux-mx1-mx2.h> #include <mach/board-mx27ads.h> +#include "devices.h" + /* ADS's NOR flash */ static struct physmap_flash_data mx27ads_flash_data = { .width = 2, @@ -251,12 +253,14 @@ static struct imxuart_platform_data uart_pdata[] = { static void __init mx27ads_board_init(void) { - int i; - gpio_fec_active(); - for (i = 0; i < 6; i++) - imx_init_uart(i, &uart_pdata[i]); + mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); + mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); + mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); + mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); + mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); + mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index 1028f453cfc..7f55746e259 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c @@ -28,6 +28,8 @@ #include <mach/imx-uart.h> #include <mach/board-pcm038.h> +#include "devices.h" + /* * Phytec's phyCORE-i.MX27 comes with 32MiB flash, * 16 bit width @@ -170,11 +172,11 @@ static struct platform_device *platform_devices[] __initdata = { static void __init pcm038_init(void) { - int i; gpio_fec_active(); - for (i = 0; i < 3; i++) - imx_init_uart(i, &uart_pdata[i]); + mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); + mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); + mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c index e31fd44f794..16debc296da 100644 --- a/arch/arm/mach-mx2/serial.c +++ b/arch/arm/mach-mx2/serial.c @@ -35,7 +35,7 @@ static struct resource uart0[] = { }, }; -static struct platform_device mxc_uart_device0 = { +struct platform_device mxc_uart_device0 = { .name = "imx-uart", .id = 0, .resource = uart0, @@ -54,7 +54,7 @@ static struct resource uart1[] = { }, }; -static struct platform_device mxc_uart_device1 = { +struct platform_device mxc_uart_device1 = { .name = "imx-uart", .id = 1, .resource = uart1, @@ -73,7 +73,7 @@ static struct resource uart2[] = { }, }; -static struct platform_device mxc_uart_device2 = { +struct platform_device mxc_uart_device2 = { .name = "imx-uart", .id = 2, .resource = uart2, @@ -92,7 +92,7 @@ static struct resource uart3[] = { }, }; -static struct platform_device mxc_uart_device3 = { +struct platform_device mxc_uart_device3 = { .name = "imx-uart", .id = 3, .resource = uart3, @@ -111,7 +111,7 @@ static struct resource uart4[] = { }, }; -static struct platform_device mxc_uart_device4 = { +struct platform_device mxc_uart_device4 = { .name = "imx-uart", .id = 4, .resource = uart4, @@ -130,48 +130,9 @@ static struct resource uart5[] = { }, }; -static struct platform_device mxc_uart_device5 = { +struct platform_device mxc_uart_device5 = { .name = "imx-uart", .id = 5, .resource = uart5, .num_resources = ARRAY_SIZE(uart5), }; - -/* - * Register only those UARTs that physically exists - */ -int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata) -{ - switch (uart_no) { - case 0: - mxc_uart_device0.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device0); - break; - case 1: - mxc_uart_device1.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device1); - break; -#ifndef CONFIG_MXC_IRDA - case 2: - mxc_uart_device2.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device2); - break; -#endif - case 3: - mxc_uart_device3.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device3); - break; - case 4: - mxc_uart_device4.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device4); - break; - case 5: - mxc_uart_device5.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device5); - break; - default: - return -ENODEV; - } - - return 0; -} diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index e08c6a8ac56..a6bdcc07f3c 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -36,7 +36,7 @@ static struct resource uart0[] = { }, }; -static struct platform_device mxc_uart_device0 = { +struct platform_device mxc_uart_device0 = { .name = "imx-uart", .id = 0, .resource = uart0, @@ -55,7 +55,7 @@ static struct resource uart1[] = { }, }; -static struct platform_device mxc_uart_device1 = { +struct platform_device mxc_uart_device1 = { .name = "imx-uart", .id = 1, .resource = uart1, @@ -74,7 +74,7 @@ static struct resource uart2[] = { }, }; -static struct platform_device mxc_uart_device2 = { +struct platform_device mxc_uart_device2 = { .name = "imx-uart", .id = 2, .resource = uart2, @@ -93,7 +93,7 @@ static struct resource uart3[] = { }, }; -static struct platform_device mxc_uart_device3 = { +struct platform_device mxc_uart_device3 = { .name = "imx-uart", .id = 3, .resource = uart3, @@ -112,46 +112,13 @@ static struct resource uart4[] = { }, }; -static struct platform_device mxc_uart_device4 = { +struct platform_device mxc_uart_device4 = { .name = "imx-uart", .id = 4, .resource = uart4, .num_resources = ARRAY_SIZE(uart4), }; -/* - * Register only those UARTs that physically exist - */ -int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata) -{ - switch (uart_no) { - case 0: - mxc_uart_device0.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device0); - break; - case 1: - mxc_uart_device1.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device1); - break; - case 2: - mxc_uart_device2.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device2); - break; - case 3: - mxc_uart_device3.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device3); - break; - case 4: - mxc_uart_device4.dev.platform_data = pdata; - platform_device_register(&mxc_uart_device4); - break; - default: - return -ENODEV; - } - - return 0; -} - /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { [0] = { diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h new file mode 100644 index 00000000000..4dc03f9e600 --- /dev/null +++ b/arch/arm/mach-mx3/devices.h @@ -0,0 +1,6 @@ + +extern struct platform_device mxc_uart_device0; +extern struct platform_device mxc_uart_device1; +extern struct platform_device mxc_uart_device2; +extern struct platform_device mxc_uart_device3; +extern struct platform_device mxc_uart_device4; diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c index 3dda1fe23cb..6e664be8cc1 100644 --- a/arch/arm/mach-mx3/iomux.c +++ b/arch/arm/mach-mx3/iomux.c @@ -43,7 +43,8 @@ static DEFINE_SPINLOCK(gpio_mux_lock); */ int mxc_iomux_mode(unsigned int pin_mode) { - u32 reg, field, l, mode, ret = 0; + u32 field, l, mode, ret = 0; + void __iomem *reg; reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK); field = pin_mode & 0x3; @@ -70,7 +71,8 @@ EXPORT_SYMBOL(mxc_iomux_mode); */ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) { - u32 reg, field, l; + u32 field, l; + void __iomem *reg; reg = IOMUXSW_PAD_CTL + (pin + 2) / 3; field = (pin + 2) % 3; diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 30d842bd4d6..0589b5cd33c 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c @@ -49,7 +49,7 @@ static struct map_desc mxc_io_desc[] __initdata = { .virtual = AVIC_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AVIC_BASE_ADDR), .length = AVIC_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, }; diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 60fb4e0d5ac..1be4a390c63 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c @@ -22,6 +22,7 @@ #include <linux/init.h> #include <linux/clk.h> #include <linux/serial_8250.h> +#include <linux/irq.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -31,6 +32,8 @@ #include <asm/mach/map.h> #include <mach/common.h> #include <mach/board-mx31ads.h> +#include <mach/imx-uart.h> +#include <mach/iomux-mx3.h> /*! * @file mx31ads.c @@ -84,6 +87,108 @@ static inline int mxc_init_extuart(void) } #endif +#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) +static struct imxuart_platform_data uart_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static inline void mxc_init_imx_uart(void) +{ + mxc_iomux_mode(MX31_PIN_CTS1__CTS1); + mxc_iomux_mode(MX31_PIN_RTS1__RTS1); + mxc_iomux_mode(MX31_PIN_TXD1__TXD1); + mxc_iomux_mode(MX31_PIN_RXD1__RXD1); + + mxc_register_device(&mxc_uart_device0, &uart_pdata); +} +#else /* !SERIAL_IMX */ +static inline void mxc_init_imx_uart(void) +{ +} +#endif /* !SERIAL_IMX */ + +static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 imr_val; + u32 int_valid; + u32 expio_irq; + + imr_val = __raw_readw(PBC_INTMASK_SET_REG); + int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val; + + expio_irq = MXC_EXP_IO_BASE; + for (; int_valid != 0; int_valid >>= 1, expio_irq++) { + if ((int_valid & 1) == 0) + continue; + + generic_handle_irq(expio_irq); + } +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* mask the interrupt */ + __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG); + __raw_readw(PBC_INTMASK_CLEAR_REG); +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* clear the interrupt status */ + __raw_writew(1 << expio, PBC_INTSTATUS_REG); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* unmask the interrupt */ + __raw_writew(1 << expio, PBC_INTMASK_SET_REG); +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static void __init mx31ads_init_expio(void) +{ + int i; + + printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n"); + + /* + * Configure INT line as GPIO input + */ + mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO)); + + /* disable the interrupt and clear the status */ + __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); + __raw_writew(0xFFFF, PBC_INTSTATUS_REG); + for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); + i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); + set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); +} + /*! * This structure defines static mappings for the i.MX31ADS board. */ @@ -92,17 +197,17 @@ static struct map_desc mx31ads_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), @@ -120,12 +225,19 @@ void __init mx31ads_map_io(void) iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); } +void __init mx31ads_init_irq(void) +{ + mxc_init_irq(); + mx31ads_init_expio(); +} + /*! * Board specific initialization. */ static void __init mxc_board_init(void) { mxc_init_extuart(); + mxc_init_imx_uart(); } static void __init mx31ads_timer_init(void) @@ -148,7 +260,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, - .init_irq = mxc_init_irq, + .init_irq = mx31ads_init_irq, .init_machine = mxc_board_init, .timer = &mx31ads_timer, MACHINE_END diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index d363a6e79f8..c4344007014 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c @@ -45,17 +45,17 @@ static struct map_desc mx31lite_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, - .type = MT_NONSHARED_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index df8582a6231..11fda95c86a 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c @@ -33,6 +33,8 @@ #include <mach/iomux-mx3.h> #include <mach/board-pcm037.h> +#include "devices.h" + static struct physmap_flash_data pcm037_flash_data = { .width = 2, }; @@ -73,12 +75,12 @@ static void __init mxc_board_init(void) mxc_iomux_mode(MX31_PIN_TXD1__TXD1); mxc_iomux_mode(MX31_PIN_RXD1__RXD1); - imx_init_uart(0, &uart_pdata); + mxc_register_device(&mxc_uart_device0, &uart_pdata); mxc_iomux_mode(MX31_PIN_CSPI3_MOSI__RXD3); mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3); - imx_init_uart(2, &uart_pdata); + mxc_register_device(&mxc_uart_device2, &uart_pdata); } /* diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 1b40483ea75..79df60c20e7 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -22,10 +22,10 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach/map.h> #include <asm/hardware/vic.h> -#include <asm/io.h> #include <mach/netx-regs.h> #include <asm/mach/irq.h> @@ -77,15 +77,12 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc) stat = ((readl(NETX_DPMAS_INT_EN) & readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; - desc = irq_desc + NETX_IRQ_HIF_CHAINED(0); - while (stat) { if (stat & 1) { DEBUG_IRQ("handling irq %d\n", irq); - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } irq++; - desc++; stat >>= 1; } } diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h index 27d8ef8e8e2..6c1023b8a9a 100644 --- a/arch/arm/mach-netx/include/mach/system.h +++ b/arch/arm/mach-netx/include/mach/system.h @@ -19,7 +19,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <asm/io.h> +#include <linux/io.h> #include <mach/hardware.h> #include "netx-regs.h" diff --git a/arch/arm/mach-netx/pfifo.c b/arch/arm/mach-netx/pfifo.c index 19ae0a72bea..03984943e16 100644 --- a/arch/arm/mach-netx/pfifo.c +++ b/arch/arm/mach-netx/pfifo.c @@ -20,8 +20,8 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/mutex.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <mach/netx-regs.h> #include <mach/pfifo.h> diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index ac8e5bfed69..7c540c1f01f 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c @@ -21,9 +21,9 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/clocksource.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/time.h> #include <mach/netx-regs.h> diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c index 04c34e82fe6..32eabf5dfa4 100644 --- a/arch/arm/mach-netx/xc.c +++ b/arch/arm/mach-netx/xc.c @@ -21,8 +21,8 @@ #include <linux/device.h> #include <linux/firmware.h> #include <linux/mutex.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <mach/netx-regs.h> diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index a22a608a7ab..b45bb3b802f 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -86,13 +86,10 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq, while (stat != 0) { int irqno = fls(stat) - 1; - struct irq_desc *fpgadesc; stat &= ~(1 << irqno); - fpgadesc = irq_desc + FPGA_IRQ(irqno); - - desc_handle_irq(FPGA_IRQ(irqno), fpgadesc); + generic_handle_irq(FPGA_IRQ(irqno)); } desc->chip->unmask(irq); diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c index 804c3007596..5241e6a286c 100644 --- a/arch/arm/mach-ns9xxx/gpio.c +++ b/arch/arm/mach-ns9xxx/gpio.c @@ -12,13 +12,13 @@ #include <linux/init.h> #include <linux/spinlock.h> #include <linux/module.h> +#include <linux/bitops.h> #include <mach/gpio.h> #include <mach/processor.h> #include <mach/processor-ns9360.h> #include <asm/bug.h> #include <asm/types.h> -#include <asm/bitops.h> #include "gpio-ns9360.h" diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h index 5dbc3c5167c..1b12d324b08 100644 --- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h +++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include <asm/io.h> +#include <linux/io.h> #define __REG(x) ((void __iomem __force *)(x)) diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 38260d5f849..22e0eb6e9ec 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -10,7 +10,7 @@ */ #include <linux/interrupt.h> #include <linux/kernel_stat.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/mach/irq.h> #include <mach/regs-sys-common.h> #include <mach/irqs.h> diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 2ced6d9984d..adfcd7b5139 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -476,6 +476,10 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = { I2C_BOARD_INFO("tps65013", 0x48), /* .irq = OMAP_GPIO_IRQ(??), */ }, + { + I2C_BOARD_INFO("isp1301_omap", 0x2d), + .irq = OMAP_GPIO_IRQ(14), + }, }; static struct omap_gpio_switch h3_gpio_switches[] __initdata = { diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 213b4878710..45a01311669 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -21,6 +21,7 @@ #include <linux/reboot.h> #include <linux/serial_8250.h> #include <linux/serial_reg.h> +#include <linux/irq.h> #include <mach/hardware.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 5965cf09f8c..5fba2073171 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -17,8 +17,8 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/cpu.h> @@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return -EINVAL; parent = clk->parent; - if (unlikely(parent == 0)) + if (unlikely(parent == NULL)) return -EIO; realrate = parent->rate; @@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk) if (clk->flags & ALWAYS_ENABLED) return 0; - if (unlikely(clk->enable_reg == 0)) { + if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); return -EINVAL; @@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk) __u16 regval16; __u32 regval32; - if (clk->enable_reg == 0) + if (clk->enable_reg == NULL) return; if (clk->flags & ENABLE_REG_32BIT) { @@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } - if(clk->round_rate != 0) + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); return clk->rate; @@ -625,7 +625,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) /* Clocks in the DSP domain need api_ck. Just assume bootloader * has not enabled any DSP clocks */ - if ((u32)clk->enable_reg == DSP_IDLECT2) { + if (clk->enable_reg == DSP_IDLECT2) { printk(KERN_INFO "Skipping reset check for DSP domain " "clock \"%s\"\n", clk->name); return; diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 6eadf72828d..5635b511ab6 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -324,7 +324,7 @@ static struct clk dspper_ck = { .parent = &ck_dpll1, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | RATE_CKCTL | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc_dsp_domain, @@ -338,7 +338,7 @@ static struct clk dspxor_ck = { .parent = &ck_ref, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, .enable = &omap1_clk_enable_dsp_domain, @@ -350,7 +350,7 @@ static struct clk dsptim_ck = { .parent = &ck_ref, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, .recalc = &followparent_recalc, .enable = &omap1_clk_enable_dsp_domain, diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index ab708d4c597..e382b438c64 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -13,9 +13,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/map.h> #include <mach/tc.h> @@ -101,7 +101,7 @@ static inline void omap_init_mbox(void) { } #if defined(CONFIG_OMAP_STI) -#define OMAP1_STI_BASE IO_ADDRESS(0xfffea000) +#define OMAP1_STI_BASE 0xfffea000 #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) static struct resource sti_resources[] = { diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 4449d86095f..04995381aa5 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -21,9 +21,9 @@ #include <linux/kernel.h> #include <linux/device.h> #include <linux/errno.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> @@ -86,7 +86,6 @@ static void fpga_mask_ack_irq(unsigned int irq) void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) { - struct irq_desc *d; u32 stat; int fpga_irq; @@ -99,8 +98,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) (fpga_irq < OMAP_FPGA_IRQ_END) && stat; fpga_irq++, stat >>= 1) { if (stat & 1) { - d = irq_desc + fpga_irq; - desc_handle_irq(fpga_irq, d); + generic_handle_irq(fpga_irq); } } } diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index da13c3e8285..13083d7e692 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -14,8 +14,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> - -#include <asm/io.h> +#include <linux/io.h> #define OMAP_DIE_ID_0 0xfffe1800 #define OMAP_DIE_ID_1 0xfffe1804 diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 2b9750b200c..b3bd8ca8511 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -11,10 +11,10 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/tlb.h> #include <asm/mach/map.h> -#include <asm/io.h> #include <mach/mux.h> #include <mach/tc.h> diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 0ec6c1ec425..9ad5197075f 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -40,6 +40,7 @@ #include <linux/module.h> #include <linux/sched.h> #include <linux/interrupt.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> @@ -47,8 +48,6 @@ #include <mach/gpio.h> #include <mach/cpu.h> -#include <asm/io.h> - #define IRQ_BANK(irq) ((irq) >> 5) #define IRQ_BIT(irq) ((irq) & 0x1f) diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c index 610f51f1874..71fe2cc7f7c 100644 --- a/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/arch/arm/mach-omap1/leds-h2p2-debug.c @@ -12,8 +12,8 @@ #include <linux/init.h> #include <linux/kernel_stat.h> #include <linux/sched.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/leds.h> #include <asm/system.h> diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index af44eab1ed2..59abbf331a9 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c @@ -13,9 +13,9 @@ #include <linux/resource.h> #include <linux/interrupt.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/mailbox.h> #include <mach/irqs.h> -#include <asm/io.h> #define MAILBOX_ARM2DSP1 0x00 #define MAILBOX_ARM2DSP1b 0x04 diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2baeaeb0c90..7de7c691558 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -103,30 +103,6 @@ static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) { } #endif -static int omap1_mcbsp_check(unsigned int id) -{ - /* REVISIT: Check correctly for number of registered McBSPs */ - if (cpu_is_omap730()) { - if (id > OMAP_MAX_MCBSP_COUNT - 2) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", - id + 1); - return -ENODEV; - } - return 0; - } - - if (cpu_is_omap15xx() || cpu_is_omap16xx()) { - if (id > OMAP_MAX_MCBSP_COUNT - 1) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", - id + 1); - return -ENODEV; - } - return 0; - } - - return -ENODEV; -} - static void omap1_mcbsp_request(unsigned int id) { /* @@ -151,7 +127,6 @@ static void omap1_mcbsp_free(unsigned int id) } static struct omap_mcbsp_ops omap1_mcbsp_ops = { - .check = omap1_mcbsp_check, .request = omap1_mcbsp_request, .free = omap1_mcbsp_free, }; @@ -160,7 +135,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { { .phys_base = OMAP730_MCBSP1_BASE, - .virt_base = io_p2v(OMAP730_MCBSP1_BASE), .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_730_McBSP1RX, @@ -169,7 +143,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { }, { .phys_base = OMAP730_MCBSP2_BASE, - .virt_base = io_p2v(OMAP730_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_730_McBSP2RX, @@ -187,7 +160,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { { .phys_base = OMAP1510_MCBSP1_BASE, - .virt_base = OMAP1510_MCBSP1_BASE, .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_McBSP1RX, @@ -197,7 +169,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1510_MCBSP2_BASE, - .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP2_RX, .dma_tx_sync = OMAP_DMA_MCBSP2_TX, .rx_irq = INT_1510_SPI_RX, @@ -206,7 +177,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1510_MCBSP3_BASE, - .virt_base = OMAP1510_MCBSP3_BASE, .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_McBSP3RX, @@ -225,7 +195,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { { .phys_base = OMAP1610_MCBSP1_BASE, - .virt_base = OMAP1610_MCBSP1_BASE, .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_McBSP1RX, @@ -235,7 +204,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1610_MCBSP2_BASE, - .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP2_RX, .dma_tx_sync = OMAP_DMA_MCBSP2_TX, .rx_irq = INT_1610_McBSP2_RX, @@ -244,7 +212,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1610_MCBSP3_BASE, - .virt_base = OMAP1610_MCBSP3_BASE, .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_McBSP3RX, @@ -271,6 +238,18 @@ int __init omap1_mcbsp_init(void) } if (cpu_is_omap730()) + omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; + if (cpu_is_omap15xx()) + omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; + if (cpu_is_omap16xx()) + omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; + + mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), + GFP_KERNEL); + if (!mcbsp_ptr) + return -ENOMEM; + + if (cpu_is_omap730()) omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, OMAP730_MCBSP_PDATA_SZ); diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 898516e362e..062c905c2ba 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -24,10 +24,11 @@ */ #include <linux/module.h> #include <linux/init.h> -#include <asm/system.h> -#include <asm/io.h> +#include <linux/io.h> #include <linux/spinlock.h> +#include <asm/system.h> + #include <mach/mux.h> #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 63c4ea18b1c..770d256c790 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -41,8 +41,8 @@ #include <linux/interrupt.h> #include <linux/sysfs.h> #include <linux/module.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/atomic.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 0e25a996bb4..528691d5cb5 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -18,8 +18,8 @@ #include <linux/serial_8250.h> #include <linux/serial_reg.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/board.h> @@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index e54708595ec..2cf7e32bd29 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -43,10 +43,10 @@ #include <linux/err.h> #include <linux/clocksource.h> #include <linux/clockchips.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/irq.h> #include <asm/mach/irq.h> diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index e67760189d1..705367ece17 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -44,10 +44,10 @@ #include <linux/clk.h> #include <linux/clocksource.h> #include <linux/clockchips.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/irq.h> #include <asm/mach/irq.h> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7069c9d536f..4832fcc7d04 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -15,8 +15,17 @@ config ARCH_OMAP2430 bool "OMAP2430 support" depends on ARCH_OMAP24XX +config ARCH_OMAP34XX + bool "OMAP34xx Based System" + depends on ARCH_OMAP3 + +config ARCH_OMAP3430 + bool "OMAP3430 support" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + select ARCH_OMAP_OTG + comment "OMAP Board Type" - depends on ARCH_OMAP2 + depends on ARCH_OMAP2 || ARCH_OMAP3 config MACH_OMAP_GENERIC bool "Generic OMAP board" @@ -35,3 +44,14 @@ config MACH_OMAP_2430SDP bool "OMAP 2430 SDP board" depends on ARCH_OMAP2 && ARCH_OMAP24XX +config MACH_OMAP3_BEAGLE + bool "OMAP3 BEAGLE board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + +config MACH_OMAP_LDP + bool "OMAP3 LDP board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + +config MACH_OVERO + bool "Gumstix Overo board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 93ee990618e..c69392372c9 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -4,16 +4,21 @@ # Common support obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ - devices.o serial.o gpmc.o timer-gp.o + devices.o serial.o gpmc.o timer-gp.o powerdomain.o \ + clockdomain.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o # Functions loaded to SRAM obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o +obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o # Power Management -obj-$(CONFIG_PM) += pm.o sleep.o +ifeq ($(CONFIG_PM),y) +obj-y += pm.o +obj-$(CONFIG_ARCH_OMAP24XX) += sleep24xx.o +endif # Clock framework obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o @@ -24,4 +29,7 @@ obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o +obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o +obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o +obj-$(CONFIG_MACH_OVERO) += board-overo.o diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index b72ca13b3ac..24688efaa44 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -21,6 +21,7 @@ #include <linux/delay.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -34,8 +35,6 @@ #include <mach/common.h> #include <mach/gpmc.h> -#include <asm/io.h> - #define SDP2430_FLASH_CS 0 #define SDP2430_SMC91X_CS 5 diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 9e2624ca70a..2fef2c84508 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -18,9 +18,11 @@ #include <linux/mtd/partitions.h> #include <linux/delay.h> #include <linux/workqueue.h> +#include <linux/i2c.h> #include <linux/input.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -41,8 +43,6 @@ #include <mach/dma.h> #include <mach/gpmc.h> -#include <asm/io.h> - #define H4_FLASH_CS 0 #define H4_SMC91X_CS 1 @@ -392,6 +392,13 @@ static struct omap_board_config_kernel h4_config[] = { { OMAP_TAG_LCD, &h4_lcd_config }, }; +static struct i2c_board_info __initdata h4_i2c_board_info[] = { + { + I2C_BOARD_INFO("isp1301_omap", 0x2d), + .irq = OMAP_GPIO_IRQ(125), + }, +}; + static void __init omap_h4_init(void) { /* @@ -412,6 +419,9 @@ static void __init omap_h4_init(void) } #endif + i2c_register_board_info(1, h4_i2c_board_info, + ARRAY_SIZE(h4_i2c_board_info)); + platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); omap_board_config = h4_config; omap_board_config_size = ARRAY_SIZE(h4_config); diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c new file mode 100644 index 00000000000..1ea59986aa7 --- /dev/null +++ b/arch/arm/mach-omap2/board-ldp.c @@ -0,0 +1,86 @@ +/* + * linux/arch/arm/mach-omap2/board-ldp.c + * + * Copyright (C) 2008 Texas Instruments Inc. + * Nishant Kamat <nskamat@ti.com> + * + * Modified from mach-omap2/board-3430sdp.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/input.h> +#include <linux/workqueue.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + +#include <mach/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/board-ldp.h> +#include <mach/mcspi.h> +#include <mach/gpio.h> +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpmc.h> + +#include <asm/io.h> +#include <asm/delay.h> +#include <mach/control.h> + +static void __init omap_ldp_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct omap_uart_config ldp_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static struct omap_board_config_kernel ldp_config[] __initdata = { + { OMAP_TAG_UART, &ldp_uart_config }, +}; + +static int __init omap_i2c_init(void) +{ + omap_register_i2c_bus(1, 2600, NULL, 0); + omap_register_i2c_bus(2, 400, NULL, 0); + omap_register_i2c_bus(3, 400, NULL, 0); + return 0; +} + +static void __init omap_ldp_init(void) +{ + omap_i2c_init(); + omap_board_config = ldp_config; + omap_board_config_size = ARRAY_SIZE(ldp_config); + omap_serial_init(); +} + +static void __init omap_ldp_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OMAP_LDP, "OMAP LDP board") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap_ldp_map_io, + .init_irq = omap_ldp_init_irq, + .init_machine = omap_ldp_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c new file mode 100644 index 00000000000..baa79674e9d --- /dev/null +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -0,0 +1,244 @@ +/* + * linux/arch/arm/mach-omap2/board-omap3beagle.c + * + * Copyright (C) 2008 Texas Instruments + * + * Modified from mach-omap2/board-3430sdp.c + * + * Initial code: Syed Mohammed Khasim + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/leds.h> +#include <linux/gpio.h> +#include <linux/input.h> +#include <linux/gpio_keys.h> + +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/nand.h> + +#include <mach/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/flash.h> + +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpmc.h> +#include <mach/nand.h> + + +#define GPMC_CS0_BASE 0x60 +#define GPMC_CS_SIZE 0x30 + +#define NAND_BLOCK_SIZE SZ_128K + +static struct mtd_partition omap3beagle_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader", + .offset = 0, + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 15 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot Env", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ + .size = 1 * NAND_BLOCK_SIZE, + }, + { + .name = "Kernel", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 32 * NAND_BLOCK_SIZE, + }, + { + .name = "File System", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_nand_platform_data omap3beagle_nand_data = { + .options = NAND_BUSWIDTH_16, + .parts = omap3beagle_nand_partitions, + .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions), + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ + .nand_setup = NULL, + .dev_ready = NULL, +}; + +static struct resource omap3beagle_nand_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device omap3beagle_nand_device = { + .name = "omap2-nand", + .id = -1, + .dev = { + .platform_data = &omap3beagle_nand_data, + }, + .num_resources = 1, + .resource = &omap3beagle_nand_resource, +}; + +static struct omap_uart_config omap3_beagle_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static void __init omap3_beagle_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct platform_device omap3_beagle_lcd_device = { + .name = "omap3beagle_lcd", + .id = -1, +}; + +static struct omap_lcd_config omap3_beagle_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct gpio_led gpio_leds[] = { + { + .name = "beagleboard::usr0", + .default_trigger = "heartbeat", + .gpio = 150, + }, + { + .name = "beagleboard::usr1", + .default_trigger = "mmc0", + .gpio = 149, + }, +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device leds_gpio = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_led_info, + }, +}; + +static struct gpio_keys_button gpio_buttons[] = { + { + .code = BTN_EXTRA, + .gpio = 7, + .desc = "user", + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data gpio_key_info = { + .buttons = gpio_buttons, + .nbuttons = ARRAY_SIZE(gpio_buttons), +}; + +static struct platform_device keys_gpio = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &gpio_key_info, + }, +}; + +static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { + { OMAP_TAG_UART, &omap3_beagle_uart_config }, + { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, +}; + +static struct platform_device *omap3_beagle_devices[] __initdata = { + &omap3_beagle_lcd_device, + &leds_gpio, + &keys_gpio, +}; + +static void __init omap3beagle_flash_init(void) +{ + u8 cs = 0; + u8 nandcs = GPMC_CS_NUM + 1; + + u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; + + /* find out the chip-select on which NAND exists */ + while (cs < GPMC_CS_NUM) { + u32 ret = 0; + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + if ((ret & 0xC00) == 0x800) { + printk(KERN_INFO "Found NAND on CS%d\n", cs); + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + } + cs++; + } + + if (nandcs > GPMC_CS_NUM) { + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); + return; + } + + if (nandcs < GPMC_CS_NUM) { + omap3beagle_nand_data.cs = nandcs; + omap3beagle_nand_data.gpmc_cs_baseaddr = (void *) + (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); + omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); + + printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); + if (platform_device_register(&omap3beagle_nand_device) < 0) + printk(KERN_ERR "Unable to register NAND device\n"); + } +} + +static void __init omap3_beagle_init(void) +{ + platform_add_devices(omap3_beagle_devices, + ARRAY_SIZE(omap3_beagle_devices)); + omap_board_config = omap3_beagle_config; + omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); + omap_serial_init(); + omap3beagle_flash_init(); +} + +static void __init omap3_beagle_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") + /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap3_beagle_map_io, + .init_irq = omap3_beagle_init_irq, + .init_machine = omap3_beagle_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c new file mode 100644 index 00000000000..e09aa59a399 --- /dev/null +++ b/arch/arm/mach-omap2/board-overo.c @@ -0,0 +1,242 @@ +/* + * board-overo.c (Gumstix Overo) + * + * Initial code: Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> + +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/flash.h> +#include <asm/mach/map.h> + +#include <mach/board-overo.h> +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpio.h> +#include <mach/gpmc.h> +#include <mach/hardware.h> +#include <mach/nand.h> + +#define NAND_BLOCK_SIZE SZ_128K +#define GPMC_CS0_BASE 0x60 +#define GPMC_CS_SIZE 0x30 + +static struct mtd_partition overo_nand_partitions[] = { + { + .name = "xloader", + .offset = 0, /* Offset = 0x00000 */ + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE + }, + { + .name = "uboot", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 14 * NAND_BLOCK_SIZE, + }, + { + .name = "uboot environment", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */ + .size = 2 * NAND_BLOCK_SIZE, + }, + { + .name = "linux", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 32 * NAND_BLOCK_SIZE, + }, + { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_nand_platform_data overo_nand_data = { + .parts = overo_nand_partitions, + .nr_parts = ARRAY_SIZE(overo_nand_partitions), + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ +}; + +static struct resource overo_nand_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device overo_nand_device = { + .name = "omap2-nand", + .id = -1, + .dev = { + .platform_data = &overo_nand_data, + }, + .num_resources = 1, + .resource = &overo_nand_resource, +}; + + +static void __init overo_flash_init(void) +{ + u8 cs = 0; + u8 nandcs = GPMC_CS_NUM + 1; + + u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; + + /* find out the chip-select on which NAND exists */ + while (cs < GPMC_CS_NUM) { + u32 ret = 0; + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + if ((ret & 0xC00) == 0x800) { + printk(KERN_INFO "Found NAND on CS%d\n", cs); + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + } + cs++; + } + + if (nandcs > GPMC_CS_NUM) { + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); + return; + } + + if (nandcs < GPMC_CS_NUM) { + overo_nand_data.cs = nandcs; + overo_nand_data.gpmc_cs_baseaddr = (void *) + (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); + overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); + + printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); + if (platform_device_register(&overo_nand_device) < 0) + printk(KERN_ERR "Unable to register NAND device\n"); + } +} +static struct omap_uart_config overo_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static int __init overo_i2c_init(void) +{ + /* i2c2 pins are used for gpio */ + omap_register_i2c_bus(3, 400, NULL, 0); + return 0; +} + +static void __init overo_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct platform_device overo_lcd_device = { + .name = "overo_lcd", + .id = -1, +}; + +static struct omap_lcd_config overo_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct omap_board_config_kernel overo_config[] __initdata = { + { OMAP_TAG_UART, &overo_uart_config }, + { OMAP_TAG_LCD, &overo_lcd_config }, +}; + +static struct platform_device *overo_devices[] __initdata = { + &overo_lcd_device, +}; + +static void __init overo_init(void) +{ + overo_i2c_init(); + platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); + omap_board_config = overo_config; + omap_board_config_size = ARRAY_SIZE(overo_config); + omap_serial_init(); + overo_flash_init(); + + if ((gpio_request(OVERO_GPIO_W2W_NRESET, + "OVERO_GPIO_W2W_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { + gpio_export(OVERO_GPIO_W2W_NRESET, 0); + gpio_set_value(OVERO_GPIO_W2W_NRESET, 0); + udelay(10); + gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); + } else { + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_W2W_NRESET\n"); + } + + if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) && + (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0)) + gpio_export(OVERO_GPIO_BT_XGATE, 0); + else + printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n"); + + if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) { + gpio_export(OVERO_GPIO_BT_NRESET, 0); + gpio_set_value(OVERO_GPIO_BT_NRESET, 0); + mdelay(6); + gpio_set_value(OVERO_GPIO_BT_NRESET, 1); + } else { + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_BT_NRESET\n"); + } + + if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) && + (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0)) + gpio_export(OVERO_GPIO_USBH_CPEN, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_USBH_CPEN\n"); + + if ((gpio_request(OVERO_GPIO_USBH_NRESET, + "OVERO_GPIO_USBH_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_USBH_NRESET, 1) == 0)) + gpio_export(OVERO_GPIO_USBH_NRESET, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_USBH_NRESET\n"); +} + +static void __init overo_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OVERO, "Gumstix Overo") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = overo_map_io, + .init_irq = overo_init_irq, + .init_machine = overo_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 1d891e4a693..ad721e0cbf7 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -21,11 +21,11 @@ #include <linux/errno.h> #include <linux/delay.h> #include <linux/clk.h> -#include <asm/bitops.h> - -#include <asm/io.h> +#include <linux/io.h> +#include <linux/bitops.h> #include <mach/clock.h> +#include <mach/clockdomain.h> #include <mach/sram.h> #include <mach/cpu.h> #include <asm/div64.h> @@ -62,10 +62,36 @@ u8 cpu_mask; /*------------------------------------------------------------------------- - * Omap2 specific clock functions + * OMAP2/3 specific clock functions *-------------------------------------------------------------------------*/ /** + * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk + * @clk: OMAP clock struct ptr to use + * + * Convert a clockdomain name stored in a struct clk 'clk' into a + * clockdomain pointer, and save it into the struct clk. Intended to be + * called during clk_register(). No return value. + */ +void omap2_init_clk_clkdm(struct clk *clk) +{ + struct clockdomain *clkdm; + + if (!clk->clkdm_name) + return; + + clkdm = clkdm_lookup(clk->clkdm_name); + if (clkdm) { + pr_debug("clock: associated clk %s to clkdm %s\n", + clk->name, clk->clkdm_name); + clk->clkdm = clkdm; + } else { + pr_debug("clock: could not associate clk %s to " + "clkdm %s\n", clk->name, clk->clkdm_name); + } +} + +/** * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware * @clk: OMAP clock struct ptr to use * @@ -251,7 +277,7 @@ int _omap2_clk_enable(struct clk *clk) if (clk->enable) return clk->enable(clk); - if (unlikely(clk->enable_reg == 0)) { + if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); return 0; /* REVISIT: -EINVAL */ @@ -283,7 +309,7 @@ void _omap2_clk_disable(struct clk *clk) return; } - if (clk->enable_reg == 0) { + if (clk->enable_reg == NULL) { /* * 'Independent' here refers to a clock which is not * controlled by its parent. @@ -308,6 +334,9 @@ void omap2_clk_disable(struct clk *clk) _omap2_clk_disable(clk); if (likely((u32)clk->parent)) omap2_clk_disable(clk->parent); + if (clk->clkdm) + omap2_clkdm_clk_disable(clk->clkdm, clk); + } } @@ -324,11 +353,19 @@ int omap2_clk_enable(struct clk *clk) return ret; } + if (clk->clkdm) + omap2_clkdm_clk_enable(clk->clkdm, clk); + ret = _omap2_clk_enable(clk); - if (unlikely(ret != 0) && clk->parent) { - omap2_clk_disable(clk->parent); - clk->usecount--; + if (unlikely(ret != 0)) { + if (clk->clkdm) + omap2_clkdm_clk_disable(clk->clkdm, clk); + + if (clk->parent) { + omap2_clk_disable(clk->parent); + clk->usecount--; + } } } @@ -477,7 +514,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) /* Given a clock and a rate apply a clock specific rounding function */ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) { - if (clk->round_rate != 0) + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); if (clk->flags & RATE_FIXED) @@ -566,7 +603,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) */ void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask) { - if (unlikely((clk->clksel_reg == 0) || (clk->clksel_mask == 0))) + if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL))) return NULL; *field_mask = clk->clksel_mask; @@ -586,7 +623,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk) void __iomem *div_addr; div_addr = omap2_get_clksel(clk, &field_mask); - if (div_addr == 0) + if (div_addr == NULL) return 0; field_val = __raw_readl(div_addr) & field_mask; @@ -605,7 +642,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; div_addr = omap2_get_clksel(clk, &field_mask); - if (div_addr == 0) + if (div_addr == NULL) return -EINVAL; field_val = omap2_divisor_to_clksel(clk, new_div); @@ -643,7 +680,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ - if (clk->set_rate != 0) + if (clk->set_rate != NULL) ret = clk->set_rate(clk, rate); if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) @@ -664,7 +701,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr, const struct clksel_rate *clkr; *parent_div = 0; - *src_addr = 0; + *src_addr = NULL; clks = omap2_get_clksel_by_parent(clk, src_clk); if (clks == NULL) @@ -705,7 +742,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) field_val = omap2_clksel_get_src_field(&src_addr, new_parent, &field_mask, clk, &parent_div); - if (src_addr == 0) + if (src_addr == NULL) return -EINVAL; if (clk->usecount > 0) diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 626e5fa93b6..1fb330e0847 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -21,6 +21,7 @@ /* The maximum error between a target DPLL rate and the rounded rate in Hz */ #define DEFAULT_DPLL_RATE_TOLERANCE 50000 +int omap2_clk_init(void); int omap2_clk_enable(struct clk *clk); void omap2_clk_disable(struct clk *clk); long omap2_clk_round_rate(struct clk *clk, unsigned long rate); @@ -36,6 +37,7 @@ void omap2_clk_disable_unused(struct clk *clk); #endif void omap2_clksel_recalc(struct clk *clk); +void omap2_init_clk_clkdm(struct clk *clk); void omap2_init_clksel_parent(struct clk *clk); u32 omap2_clksel_get_divisor(struct clk *clk); u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index 295e671e9cf..d382eb0184a 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -24,14 +24,13 @@ #include <linux/errno.h> #include <linux/delay.h> #include <linux/clk.h> - #include <linux/io.h> #include <linux/cpufreq.h> +#include <linux/bitops.h> #include <mach/clock.h> #include <mach/sram.h> #include <asm/div64.h> -#include <asm/bitops.h> #include "memory.h" #include "clock.h" diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h index be4e25554e0..242a19d86cc 100644 --- a/arch/arm/mach-omap2/clock24xx.h +++ b/arch/arm/mach-omap2/clock24xx.h @@ -626,6 +626,7 @@ static struct clk func_32k_ck = { .rate = 32000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &propagate_rate, }; @@ -634,17 +635,19 @@ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ .name = "osc_ck", .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable = &omap2_enable_osc_ck, .disable = &omap2_disable_osc_ck, .recalc = &omap2_osc_clk_recalc, }; -/* With out modem likely 12MHz, with modem likely 13MHz */ +/* Without modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */ .name = "sys_ck", /* ~ ref_clk also */ .parent = &osc_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_sys_clk_recalc, }; @@ -653,6 +656,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ .rate = 54000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &propagate_rate, }; @@ -684,6 +688,7 @@ static struct clk dpll_ck = { .dpll_data = &dpll_dd, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_dpllcore_recalc, .set_rate = &omap2_reprogram_dpllcore, }; @@ -694,6 +699,7 @@ static struct clk apll96_ck = { .rate = 96000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, .enable = &omap2_clk_fixed_enable, @@ -707,6 +713,7 @@ static struct clk apll54_ck = { .rate = 54000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, .enable = &omap2_clk_fixed_enable, @@ -741,6 +748,7 @@ static struct clk func_54m_ck = { .parent = &apll54_ck, /* can also be alt_clk */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_54M_SOURCE, @@ -753,6 +761,7 @@ static struct clk core_ck = { .parent = &dpll_ck, /* can also be 32k */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -779,6 +788,7 @@ static struct clk func_96m_ck = { .parent = &apll96_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP2430_96M_SOURCE, @@ -811,6 +821,7 @@ static struct clk func_48m_ck = { .parent = &apll96_ck, /* 96M or Alt */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_48M_SOURCE, @@ -826,6 +837,7 @@ static struct clk func_12m_ck = { .fixed_div = 4, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_fixed_divisor_recalc, }; @@ -878,6 +890,7 @@ static struct clk sys_clkout_src = { .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP24XX_CLKOUT_EN_SHIFT, .init = &omap2_init_clksel_parent, @@ -908,6 +921,7 @@ static struct clk sys_clkout = { .parent = &sys_clkout_src, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP24XX_CLKOUT_DIV_MASK, .clksel = sys_clkout_clksel, @@ -921,6 +935,7 @@ static struct clk sys_clkout2_src = { .name = "sys_clkout2_src", .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP2420_CLKOUT2_EN_SHIFT, .init = &omap2_init_clksel_parent, @@ -942,6 +957,7 @@ static struct clk sys_clkout2 = { .name = "sys_clkout2", .parent = &sys_clkout2_src, .flags = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP2420_CLKOUT2_DIV_MASK, .clksel = sys_clkout2_clksel, @@ -954,6 +970,7 @@ static struct clk emul_ck = { .name = "emul_ck", .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKEMUL_CTRL, .enable_bit = OMAP24XX_EMULATION_EN_SHIFT, .recalc = &followparent_recalc, @@ -990,12 +1007,13 @@ static struct clk mpu_ck = { /* Control cpu */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "mpu_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK, .clksel = mpu_clksel, .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, + .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate }; @@ -1031,6 +1049,7 @@ static struct clk dsp_fck = { .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "dsp_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), @@ -1054,10 +1073,7 @@ static const struct clksel dsp_irate_ick_clksel[] = { { .parent = NULL } }; -/* - * This clock does not exist as such in the TRM, but is added to - * separate source selection from XXX - */ +/* This clock does not exist as such in the TRM. */ static struct clk dsp_irate_ick = { .name = "dsp_irate_ick", .parent = &dsp_fck, @@ -1089,11 +1105,17 @@ static struct clk iva2_1_ick = { .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, }; +/* + * The IVA1 is an ARM7 core on the 2420 that has nothing to do with + * the C54x, but which is contained in the DSP powerdomain. Does not + * exist on later OMAPs. + */ static struct clk iva1_ifck = { .name = "iva1_ifck", .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT | RATE_PROPAGATES | DELAYED_APP, + .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), @@ -1109,6 +1131,7 @@ static struct clk iva1_mpu_int_ifck = { .name = "iva1_mpu_int_ifck", .parent = &iva1_ifck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_MPU_SHIFT, .fixed_div = 2, @@ -1156,6 +1179,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "core_l3_clkdm", .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, .clksel = core_l3_clksel, @@ -1177,11 +1201,13 @@ static const struct clksel usb_l4_ick_clksel[] = { { .parent = NULL }, }; +/* It is unclear from TRM whether usb_l4_ick is really in L3 or L4 clkdm */ static struct clk usb_l4_ick = { /* FS-USB interface clock */ .name = "usb_l4_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), @@ -1193,10 +1219,42 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */ }; /* + * L4 clock management domain + * + * This domain contains lots of interface clocks from the L4 interface, some + * functional clocks. Fixed APLL functional source clocks are managed in + * this domain. + */ +static const struct clksel_rate l4_core_l3_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, + { .div = 2, .val = 2, .flags = RATE_IN_24XX }, + { .div = 0 } +}; + +static const struct clksel l4_clksel[] = { + { .parent = &core_l3_ck, .rates = l4_core_l3_rates }, + { .parent = NULL } +}; + +static struct clk l4_ck = { /* used both as an ick and fck */ + .name = "l4_ck", + .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES, + .clkdm_name = "core_l4_clkdm", + .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), + .clksel_mask = OMAP24XX_CLKSEL_L4_MASK, + .clksel = l4_clksel, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate +}; + +/* * SSI is in L3 management domain, its direct parent is core not l3, * many core power domain entities are grouped into the L3 clock * domain. - * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_CLIK + * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_ICLK * * ssr = core/1/2/3/4/5, sst = 1/2 ssr. */ @@ -1221,6 +1279,7 @@ static struct clk ssi_ssr_sst_fck = { .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_SSI_SHIFT, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), @@ -1231,6 +1290,7 @@ static struct clk ssi_ssr_sst_fck = { .set_rate = &omap2_clksel_set_rate }; + /* * GFX clock domain * Clocks: @@ -1254,6 +1314,7 @@ static struct clk gfx_3d_fck = { .name = "gfx_3d_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_3D_SHIFT, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), @@ -1268,6 +1329,7 @@ static struct clk gfx_2d_fck = { .name = "gfx_2d_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_2D_SHIFT, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), @@ -1282,6 +1344,7 @@ static struct clk gfx_ick = { .name = "gfx_ick", /* From l3 */ .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, .recalc = &followparent_recalc, @@ -1311,6 +1374,7 @@ static struct clk mdm_ick = { /* used both as a ick and fck */ .name = "mdm_ick", .parent = &core_ck, .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, + .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_CLKSEL), @@ -1325,52 +1389,13 @@ static struct clk mdm_osc_ck = { .name = "mdm_osc_ck", .parent = &osc_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN), .enable_bit = OMAP2430_EN_OSC_SHIFT, .recalc = &followparent_recalc, }; /* - * L4 clock management domain - * - * This domain contains lots of interface clocks from the L4 interface, some - * functional clocks. Fixed APLL functional source clocks are managed in - * this domain. - */ -static const struct clksel_rate l4_core_l3_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, - { .div = 2, .val = 2, .flags = RATE_IN_24XX }, - { .div = 0 } -}; - -static const struct clksel l4_clksel[] = { - { .parent = &core_l3_ck, .rates = l4_core_l3_rates }, - { .parent = NULL } -}; - -static struct clk l4_ck = { /* used both as an ick and fck */ - .name = "l4_ck", - .parent = &core_l3_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | - ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES, - .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), - .clksel_mask = OMAP24XX_CLKSEL_L4_MASK, - .clksel = l4_clksel, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate -}; - -static struct clk ssi_l4_ick = { - .name = "ssi_l4_ick", - .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, - .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), - .enable_bit = OMAP24XX_EN_SSI_SHIFT, - .recalc = &followparent_recalc, -}; - -/* * DSS clock domain * CLOCKs: * DSS_L4_ICLK, DSS_L3_ICLK, @@ -1409,6 +1434,7 @@ static struct clk dss_ick = { /* Enables both L3,L4 ICLK's */ .name = "dss_ick", .parent = &l4_ck, /* really both l3 and l4 */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, .recalc = &followparent_recalc, @@ -1419,6 +1445,7 @@ static struct clk dss1_fck = { .parent = &core_ck, /* Core or sys */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, .init = &omap2_init_clksel_parent, @@ -1451,6 +1478,7 @@ static struct clk dss2_fck = { /* Alt clk used in power management */ .parent = &sys_ck, /* fixed at sys_ck or 48MHz */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS2_SHIFT, .init = &omap2_init_clksel_parent, @@ -1464,6 +1492,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */ .name = "dss_54m_fck", /* 54m tv clk */ .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_TV_SHIFT, .recalc = &followparent_recalc, @@ -1491,6 +1520,7 @@ static struct clk gpt1_ick = { .name = "gpt1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, .recalc = &followparent_recalc, @@ -1500,6 +1530,7 @@ static struct clk gpt1_fck = { .name = "gpt1_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, .init = &omap2_init_clksel_parent, @@ -1515,6 +1546,7 @@ static struct clk gpt2_ick = { .name = "gpt2_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, .recalc = &followparent_recalc, @@ -1524,6 +1556,7 @@ static struct clk gpt2_fck = { .name = "gpt2_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, .init = &omap2_init_clksel_parent, @@ -1537,6 +1570,7 @@ static struct clk gpt3_ick = { .name = "gpt3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, .recalc = &followparent_recalc, @@ -1546,6 +1580,7 @@ static struct clk gpt3_fck = { .name = "gpt3_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, .init = &omap2_init_clksel_parent, @@ -1559,6 +1594,7 @@ static struct clk gpt4_ick = { .name = "gpt4_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, .recalc = &followparent_recalc, @@ -1568,6 +1604,7 @@ static struct clk gpt4_fck = { .name = "gpt4_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, .init = &omap2_init_clksel_parent, @@ -1581,6 +1618,7 @@ static struct clk gpt5_ick = { .name = "gpt5_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, .recalc = &followparent_recalc, @@ -1590,6 +1628,7 @@ static struct clk gpt5_fck = { .name = "gpt5_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, .init = &omap2_init_clksel_parent, @@ -1603,6 +1642,7 @@ static struct clk gpt6_ick = { .name = "gpt6_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, .recalc = &followparent_recalc, @@ -1612,6 +1652,7 @@ static struct clk gpt6_fck = { .name = "gpt6_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, .init = &omap2_init_clksel_parent, @@ -1634,6 +1675,7 @@ static struct clk gpt7_fck = { .name = "gpt7_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, .init = &omap2_init_clksel_parent, @@ -1647,6 +1689,7 @@ static struct clk gpt8_ick = { .name = "gpt8_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, .recalc = &followparent_recalc, @@ -1656,6 +1699,7 @@ static struct clk gpt8_fck = { .name = "gpt8_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, .init = &omap2_init_clksel_parent, @@ -1669,6 +1713,7 @@ static struct clk gpt9_ick = { .name = "gpt9_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, .recalc = &followparent_recalc, @@ -1678,6 +1723,7 @@ static struct clk gpt9_fck = { .name = "gpt9_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, .init = &omap2_init_clksel_parent, @@ -1691,6 +1737,7 @@ static struct clk gpt10_ick = { .name = "gpt10_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, .recalc = &followparent_recalc, @@ -1700,6 +1747,7 @@ static struct clk gpt10_fck = { .name = "gpt10_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, .init = &omap2_init_clksel_parent, @@ -1713,6 +1761,7 @@ static struct clk gpt11_ick = { .name = "gpt11_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, .recalc = &followparent_recalc, @@ -1722,6 +1771,7 @@ static struct clk gpt11_fck = { .name = "gpt11_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, .init = &omap2_init_clksel_parent, @@ -1735,6 +1785,7 @@ static struct clk gpt12_ick = { .name = "gpt12_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, .recalc = &followparent_recalc, @@ -1744,6 +1795,7 @@ static struct clk gpt12_fck = { .name = "gpt12_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, .init = &omap2_init_clksel_parent, @@ -1758,6 +1810,7 @@ static struct clk mcbsp1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, .recalc = &followparent_recalc, @@ -1768,6 +1821,7 @@ static struct clk mcbsp1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, .recalc = &followparent_recalc, @@ -1778,6 +1832,7 @@ static struct clk mcbsp2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, .recalc = &followparent_recalc, @@ -1788,6 +1843,7 @@ static struct clk mcbsp2_fck = { .id = 2, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, .recalc = &followparent_recalc, @@ -1798,6 +1854,7 @@ static struct clk mcbsp3_ick = { .id = 3, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, .recalc = &followparent_recalc, @@ -1808,6 +1865,7 @@ static struct clk mcbsp3_fck = { .id = 3, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, .recalc = &followparent_recalc, @@ -1818,6 +1876,7 @@ static struct clk mcbsp4_ick = { .id = 4, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, .recalc = &followparent_recalc, @@ -1828,6 +1887,7 @@ static struct clk mcbsp4_fck = { .id = 4, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, .recalc = &followparent_recalc, @@ -1838,6 +1898,7 @@ static struct clk mcbsp5_ick = { .id = 5, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, .recalc = &followparent_recalc, @@ -1848,6 +1909,7 @@ static struct clk mcbsp5_fck = { .id = 5, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, .recalc = &followparent_recalc, @@ -1857,6 +1919,7 @@ static struct clk mcspi1_ick = { .name = "mcspi_ick", .id = 1, .parent = &l4_ck, + .clkdm_name = "core_l4_clkdm", .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, @@ -1868,6 +1931,7 @@ static struct clk mcspi1_fck = { .id = 1, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, .recalc = &followparent_recalc, @@ -1878,6 +1942,7 @@ static struct clk mcspi2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, .recalc = &followparent_recalc, @@ -1888,6 +1953,7 @@ static struct clk mcspi2_fck = { .id = 2, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, .recalc = &followparent_recalc, @@ -1898,6 +1964,7 @@ static struct clk mcspi3_ick = { .id = 3, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, .recalc = &followparent_recalc, @@ -1908,6 +1975,7 @@ static struct clk mcspi3_fck = { .id = 3, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, .recalc = &followparent_recalc, @@ -1917,6 +1985,7 @@ static struct clk uart1_ick = { .name = "uart1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, .recalc = &followparent_recalc, @@ -1926,6 +1995,7 @@ static struct clk uart1_fck = { .name = "uart1_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, .recalc = &followparent_recalc, @@ -1935,6 +2005,7 @@ static struct clk uart2_ick = { .name = "uart2_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, .recalc = &followparent_recalc, @@ -1944,6 +2015,7 @@ static struct clk uart2_fck = { .name = "uart2_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, .recalc = &followparent_recalc, @@ -1953,6 +2025,7 @@ static struct clk uart3_ick = { .name = "uart3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, .recalc = &followparent_recalc, @@ -1962,6 +2035,7 @@ static struct clk uart3_fck = { .name = "uart3_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, .recalc = &followparent_recalc, @@ -1971,6 +2045,7 @@ static struct clk gpios_ick = { .name = "gpios_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, .recalc = &followparent_recalc, @@ -1980,6 +2055,7 @@ static struct clk gpios_fck = { .name = "gpios_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, .recalc = &followparent_recalc, @@ -1989,6 +2065,7 @@ static struct clk mpu_wdt_ick = { .name = "mpu_wdt_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .recalc = &followparent_recalc, @@ -1998,6 +2075,7 @@ static struct clk mpu_wdt_fck = { .name = "mpu_wdt_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .recalc = &followparent_recalc, @@ -2006,31 +2084,40 @@ static struct clk mpu_wdt_fck = { static struct clk sync_32k_ick = { .name = "sync_32k_ick", .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_32KSYNC_SHIFT, .recalc = &followparent_recalc, }; + static struct clk wdt1_ick = { .name = "wdt1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_WDT1_SHIFT, .recalc = &followparent_recalc, }; + static struct clk omapctrl_ick = { .name = "omapctrl_ick", .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT, .recalc = &followparent_recalc, }; + static struct clk icr_ick = { .name = "icr_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP2430_EN_ICR_SHIFT, .recalc = &followparent_recalc, @@ -2040,15 +2127,22 @@ static struct clk cam_ick = { .name = "cam_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, .recalc = &followparent_recalc, }; +/* + * cam_fck controls both CAM_MCLK and CAM_FCLK. It should probably be + * split into two separate clocks, since the parent clocks are different + * and the clockdomains are also different. + */ static struct clk cam_fck = { .name = "cam_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, .recalc = &followparent_recalc, @@ -2058,6 +2152,7 @@ static struct clk mailboxes_ick = { .name = "mailboxes_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT, .recalc = &followparent_recalc, @@ -2067,6 +2162,7 @@ static struct clk wdt4_ick = { .name = "wdt4_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, .recalc = &followparent_recalc, @@ -2076,6 +2172,7 @@ static struct clk wdt4_fck = { .name = "wdt4_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, .recalc = &followparent_recalc, @@ -2085,6 +2182,7 @@ static struct clk wdt3_ick = { .name = "wdt3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, .recalc = &followparent_recalc, @@ -2094,6 +2192,7 @@ static struct clk wdt3_fck = { .name = "wdt3_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, .recalc = &followparent_recalc, @@ -2103,6 +2202,7 @@ static struct clk mspro_ick = { .name = "mspro_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, .recalc = &followparent_recalc, @@ -2112,6 +2212,7 @@ static struct clk mspro_fck = { .name = "mspro_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, .recalc = &followparent_recalc, @@ -2121,6 +2222,7 @@ static struct clk mmc_ick = { .name = "mmc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, .recalc = &followparent_recalc, @@ -2130,6 +2232,7 @@ static struct clk mmc_fck = { .name = "mmc_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, .recalc = &followparent_recalc, @@ -2139,6 +2242,7 @@ static struct clk fac_ick = { .name = "fac_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, .recalc = &followparent_recalc, @@ -2148,6 +2252,7 @@ static struct clk fac_fck = { .name = "fac_fck", .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, .recalc = &followparent_recalc, @@ -2157,6 +2262,7 @@ static struct clk eac_ick = { .name = "eac_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, .recalc = &followparent_recalc, @@ -2166,6 +2272,7 @@ static struct clk eac_fck = { .name = "eac_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, .recalc = &followparent_recalc, @@ -2175,6 +2282,7 @@ static struct clk hdq_ick = { .name = "hdq_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, .recalc = &followparent_recalc, @@ -2184,6 +2292,7 @@ static struct clk hdq_fck = { .name = "hdq_fck", .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, .recalc = &followparent_recalc, @@ -2194,6 +2303,7 @@ static struct clk i2c2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, .recalc = &followparent_recalc, @@ -2204,6 +2314,7 @@ static struct clk i2c2_fck = { .id = 2, .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, .recalc = &followparent_recalc, @@ -2214,6 +2325,7 @@ static struct clk i2chs2_fck = { .id = 2, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS2_SHIFT, .recalc = &followparent_recalc, @@ -2224,6 +2336,7 @@ static struct clk i2c1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, .recalc = &followparent_recalc, @@ -2234,6 +2347,7 @@ static struct clk i2c1_fck = { .id = 1, .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, .recalc = &followparent_recalc, @@ -2244,6 +2358,7 @@ static struct clk i2chs1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS1_SHIFT, .recalc = &followparent_recalc, @@ -2252,7 +2367,9 @@ static struct clk i2chs1_fck = { static struct clk gpmc_fck = { .name = "gpmc_fck", .parent = &core_l3_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2260,6 +2377,7 @@ static struct clk sdma_fck = { .name = "sdma_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2267,6 +2385,7 @@ static struct clk sdma_ick = { .name = "sdma_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2274,6 +2393,7 @@ static struct clk vlynq_ick = { .name = "vlynq_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, .recalc = &followparent_recalc, @@ -2308,6 +2428,7 @@ static struct clk vlynq_fck = { .name = "vlynq_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | DELAYED_APP, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, .init = &omap2_init_clksel_parent, @@ -2323,6 +2444,7 @@ static struct clk sdrc_ick = { .name = "sdrc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP2430_EN_SDRC_SHIFT, .recalc = &followparent_recalc, @@ -2332,6 +2454,7 @@ static struct clk des_ick = { .name = "des_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_DES_SHIFT, .recalc = &followparent_recalc, @@ -2341,6 +2464,7 @@ static struct clk sha_ick = { .name = "sha_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_SHA_SHIFT, .recalc = &followparent_recalc, @@ -2350,6 +2474,7 @@ static struct clk rng_ick = { .name = "rng_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_RNG_SHIFT, .recalc = &followparent_recalc, @@ -2359,6 +2484,7 @@ static struct clk aes_ick = { .name = "aes_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_AES_SHIFT, .recalc = &followparent_recalc, @@ -2368,6 +2494,7 @@ static struct clk pka_ick = { .name = "pka_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_PKA_SHIFT, .recalc = &followparent_recalc, @@ -2377,6 +2504,7 @@ static struct clk usb_fck = { .name = "usb_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, .recalc = &followparent_recalc, @@ -2386,6 +2514,7 @@ static struct clk usbhs_ick = { .name = "usbhs_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_USBHS_SHIFT, .recalc = &followparent_recalc, @@ -2396,6 +2525,7 @@ static struct clk mmchs1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, .recalc = &followparent_recalc, @@ -2406,6 +2536,7 @@ static struct clk mmchs1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, .recalc = &followparent_recalc, @@ -2416,6 +2547,7 @@ static struct clk mmchs2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, .recalc = &followparent_recalc, @@ -2435,6 +2567,7 @@ static struct clk gpio5_ick = { .name = "gpio5_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, .recalc = &followparent_recalc, @@ -2444,6 +2577,7 @@ static struct clk gpio5_fck = { .name = "gpio5_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, .recalc = &followparent_recalc, @@ -2453,6 +2587,7 @@ static struct clk mdm_intc_ick = { .name = "mdm_intc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MDM_INTC_SHIFT, .recalc = &followparent_recalc, @@ -2463,6 +2598,7 @@ static struct clk mmchsdb1_fck = { .id = 1, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB1_SHIFT, .recalc = &followparent_recalc, @@ -2473,6 +2609,7 @@ static struct clk mmchsdb2_fck = { .id = 2, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB2_SHIFT, .recalc = &followparent_recalc, @@ -2551,7 +2688,6 @@ static struct clk *onchip_24xx_clks[] __initdata = { &usb_l4_ick, /* L4 domain clocks */ &l4_ck, /* used as both core_l4 and wu_l4 */ - &ssi_l4_ick, /* virtual meta-group clock */ &virt_prcm_set, /* general l4 interface ck, multi-parent functional clk */ diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 3ff74952f83..084e11082f8 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -25,11 +25,11 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/limits.h> +#include <linux/bitops.h> #include <mach/clock.h> #include <mach/sram.h> #include <asm/div64.h> -#include <asm/bitops.h> #include "memory.h" #include "clock.h" @@ -62,11 +62,14 @@ static void omap3_dpll_recalc(struct clk *clk) static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits) { const struct dpll_data *dd; + u32 v; dd = clk->dpll_data; - cm_rmw_reg_bits(dd->enable_mask, clken_bits << __ffs(dd->enable_mask), - dd->control_reg); + v = __raw_readl(dd->control_reg); + v &= ~dd->enable_mask; + v |= clken_bits << __ffs(dd->enable_mask); + __raw_writel(v, dd->control_reg); } /* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */ @@ -82,7 +85,7 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state) state <<= dd->idlest_bit; idlest_mask = 1 << dd->idlest_bit; - while (((cm_read_reg(dd->idlest_reg) & idlest_mask) != state) && + while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) && i < MAX_DPLL_WAIT_TRIES) { i++; udelay(1); @@ -285,7 +288,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk) dd = clk->dpll_data; - v = cm_read_reg(dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); v &= dd->autoidle_mask; v >>= __ffs(dd->autoidle_mask); @@ -304,6 +307,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk) static void omap3_dpll_allow_idle(struct clk *clk) { const struct dpll_data *dd; + u32 v; if (!clk || !clk->dpll_data) return; @@ -315,9 +319,10 @@ static void omap3_dpll_allow_idle(struct clk *clk) * by writing 0x5 instead of 0x1. Add some mechanism to * optionally enter this mode. */ - cm_rmw_reg_bits(dd->autoidle_mask, - DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask), - dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); + v &= ~dd->autoidle_mask; + v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask); + __raw_writel(v, dd->autoidle_reg); } /** @@ -329,15 +334,17 @@ static void omap3_dpll_allow_idle(struct clk *clk) static void omap3_dpll_deny_idle(struct clk *clk) { const struct dpll_data *dd; + u32 v; if (!clk || !clk->dpll_data) return; dd = clk->dpll_data; - cm_rmw_reg_bits(dd->autoidle_mask, - DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask), - dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); + v &= ~dd->autoidle_mask; + v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask); + __raw_writel(v, dd->autoidle_reg); } /* Clock control for DPLL outputs */ @@ -482,8 +489,10 @@ int __init omap2_clk_init(void) for (clkp = onchip_34xx_clks; clkp < onchip_34xx_clks + ARRAY_SIZE(onchip_34xx_clks); clkp++) { - if ((*clkp)->flags & cpu_clkflg) + if ((*clkp)->flags & cpu_clkflg) { clk_register(*clkp); + omap2_init_clk_clkdm(*clkp); + } } /* REVISIT: Not yet ready for OMAP3 */ diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index ec664457a11..c38a8a09692 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -478,7 +478,7 @@ static struct clk dpll3_m2_ck = { }; static const struct clksel core_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -495,7 +495,7 @@ static struct clk core_ck = { }; static const struct clksel dpll3_m2x2_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -541,7 +541,7 @@ static struct clk dpll3_m3x2_ck = { }; static const struct clksel emu_core_alwon_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_m3x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -633,7 +633,7 @@ static struct clk dpll4_m2x2_ck = { }; static const struct clksel omap_96m_alwon_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -659,7 +659,7 @@ static struct clk omap_96m_fck = { }; static const struct clksel cm_96m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -701,7 +701,7 @@ static struct clk dpll4_m3x2_ck = { }; static const struct clksel virt_omap_54m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m3x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -911,7 +911,7 @@ static struct clk dpll5_m2_ck = { }; static const struct clksel omap_120m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll5_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -919,13 +919,13 @@ static const struct clksel omap_120m_fck_clksel[] = { static struct clk omap_120m_fck = { .name = "omap_120m_fck", .parent = &dpll5_m2_ck, - .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), - .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, - .clksel = omap_120m_fck_clksel, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), + .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, + .clksel = omap_120m_fck_clksel, .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, - .recalc = &omap2_clksel_recalc, + .recalc = &omap2_clksel_recalc, }; /* CM EXTERNAL CLOCK OUTPUTS */ @@ -1034,7 +1034,7 @@ static struct clk dpll1_fck = { * called 'dpll1_fck' */ static const struct clksel mpu_clksel[] = { - { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, { .parent = &dpll1_x2m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -1048,6 +1048,7 @@ static struct clk mpu_ck = { .clksel = mpu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "mpu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1075,6 +1076,8 @@ static struct clk arm_fck = { .recalc = &omap2_clksel_recalc, }; +/* XXX What about neon_clkdm ? */ + /* * REVISIT: This clock is never specifically defined in the 3430 TRM, * although it is referenced - so this is a guess @@ -1107,7 +1110,7 @@ static struct clk dpll2_fck = { */ static const struct clksel iva2_clksel[] = { - { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, { .parent = &dpll2_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -1123,6 +1126,7 @@ static struct clk iva2_ck = { .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, .clksel = iva2_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .clkdm_name = "iva2_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1137,6 +1141,7 @@ static struct clk l3_ick = { .clksel = div2_core_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l3_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1154,6 +1159,7 @@ static struct clk l4_ick = { .clksel = div2_l3_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1183,43 +1189,57 @@ static const struct clksel gfx_l3_clksel[] = { { .parent = NULL } }; -static struct clk gfx_l3_fck = { - .name = "gfx_l3_fck", +/* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */ +static struct clk gfx_l3_ck = { + .name = "gfx_l3_ck", .parent = &l3_ick, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, + .recalc = &followparent_recalc, +}; + +static struct clk gfx_l3_fck = { + .name = "gfx_l3_fck", + .parent = &gfx_l3_ck, + .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), .clksel_mask = OMAP_CLKSEL_GFX_MASK, .clksel = gfx_l3_clksel, - .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gfx_l3_ick = { .name = "gfx_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), - .enable_bit = OMAP_EN_GFX_SHIFT, - .flags = CLOCK_IN_OMAP3430ES1, + .parent = &gfx_l3_ck, + .flags = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg1_ck = { .name = "gfx_cg1_ck", .parent = &gfx_l3_fck, /* REVISIT: correct? */ + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_2D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg2_ck = { .name = "gfx_cg2_ck", .parent = &gfx_l3_fck, /* REVISIT: correct? */ + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_3D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; @@ -1252,15 +1272,18 @@ static struct clk sgx_fck = { .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, .clksel = sgx_clksel, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "sgx_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk sgx_ick = { .name = "sgx_ick", .parent = &l3_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "sgx_clkdm", .recalc = &followparent_recalc, }; @@ -1269,9 +1292,11 @@ static struct clk sgx_ick = { static struct clk d2d_26m_fck = { .name = "d2d_26m_fck", .parent = &sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "d2d_clkdm", .recalc = &followparent_recalc, }; @@ -1291,6 +1316,7 @@ static struct clk gpt10_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT10_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1304,6 +1330,7 @@ static struct clk gpt11_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT11_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1341,6 +1368,7 @@ static struct clk core_96m_fck = { .parent = &omap_96m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1351,6 +1379,7 @@ static struct clk mmchs3_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1361,6 +1390,7 @@ static struct clk mmchs2_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1370,6 +1400,7 @@ static struct clk mspro_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1380,6 +1411,7 @@ static struct clk mmchs1_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1390,16 +1422,18 @@ static struct clk i2c3_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c2_fck = { .name = "i2c_fck", - .id = 2, + .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1410,6 +1444,7 @@ static struct clk i2c1_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1443,6 +1478,7 @@ static struct clk mcbsp5_fck = { .clksel_mask = OMAP2_MCBSP5_CLKS_MASK, .clksel = mcbsp_15_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1456,6 +1492,7 @@ static struct clk mcbsp1_fck = { .clksel_mask = OMAP2_MCBSP1_CLKS_MASK, .clksel = mcbsp_15_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1466,6 +1503,7 @@ static struct clk core_48m_fck = { .parent = &omap_48m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1543,6 +1581,7 @@ static struct clk core_12m_fck = { .parent = &omap_12m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1581,6 +1620,7 @@ static struct clk ssi_ssr_fck = { .clksel_mask = OMAP3430_CLKSEL_SSI_MASK, .clksel = ssi_ssr_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1596,11 +1636,17 @@ static struct clk ssi_sst_fck = { /* CORE_L3_ICK based clocks */ +/* + * XXX must add clk_enable/clk_disable for these if standard code won't + * handle it + */ static struct clk core_l3_ick = { .name = "core_l3_ick", .parent = &l3_ick, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1610,6 +1656,7 @@ static struct clk hsotgusb_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1619,6 +1666,7 @@ static struct clk sdrc_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SDRC_SHIFT, .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1627,6 +1675,7 @@ static struct clk gpmc_fck = { .parent = &core_l3_ick, .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK | ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1654,8 +1703,10 @@ static struct clk pka_ick = { static struct clk core_l4_ick = { .name = "core_l4_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1665,6 +1716,7 @@ static struct clk usbtll_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1675,6 +1727,7 @@ static struct clk mmchs3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1685,6 +1738,7 @@ static struct clk icr_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_ICR_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1694,6 +1748,7 @@ static struct clk aes2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_AES2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1703,6 +1758,7 @@ static struct clk sha12_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SHA12_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1712,6 +1768,7 @@ static struct clk des2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_DES2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1722,6 +1779,7 @@ static struct clk mmchs2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1732,6 +1790,7 @@ static struct clk mmchs1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1741,6 +1800,7 @@ static struct clk mspro_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1750,6 +1810,7 @@ static struct clk hdq_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HDQ_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1760,6 +1821,7 @@ static struct clk mcspi4_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1770,6 +1832,7 @@ static struct clk mcspi3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1780,6 +1843,7 @@ static struct clk mcspi2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1790,6 +1854,7 @@ static struct clk mcspi1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1800,6 +1865,7 @@ static struct clk i2c3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1810,6 +1876,7 @@ static struct clk i2c2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1820,6 +1887,7 @@ static struct clk i2c1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1829,6 +1897,7 @@ static struct clk uart2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1838,6 +1907,7 @@ static struct clk uart1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1847,6 +1917,7 @@ static struct clk gpt11_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT11_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1856,6 +1927,7 @@ static struct clk gpt10_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT10_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1866,6 +1938,7 @@ static struct clk mcbsp5_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1876,6 +1949,7 @@ static struct clk mcbsp1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1885,6 +1959,7 @@ static struct clk fac_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES1_EN_FAC_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1894,6 +1969,7 @@ static struct clk mailboxes_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1913,6 +1989,7 @@ static struct clk ssi_l4_ick = { .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1922,6 +1999,7 @@ static struct clk ssi_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SSI_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1996,7 +2074,7 @@ static struct clk des1_ick = { /* DSS */ static const struct clksel dss1_alwon_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m4x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -2011,33 +2089,40 @@ static struct clk dss1_alwon_fck = { .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, .clksel = dss1_alwon_fck_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk dss_tv_fck = { .name = "dss_tv_fck", .parent = &omap_54m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss_96m_fck = { .name = "dss_96m_fck", .parent = &omap_96m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss2_alwon_fck = { .name = "dss2_alwon_fck", .parent = &sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_DSS2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; @@ -2045,16 +2130,18 @@ static struct clk dss_ick = { /* Handles both L3 and L4 clocks */ .name = "dss_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; /* CAM */ static const struct clksel cam_mclk_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m5x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -2069,24 +2156,19 @@ static struct clk cam_mclk = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "cam_clkdm", .recalc = &omap2_clksel_recalc, }; -static struct clk cam_l3_ick = { - .name = "cam_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), - .enable_bit = OMAP3430_EN_CAM_SHIFT, - .flags = CLOCK_IN_OMAP343X, - .recalc = &followparent_recalc, -}; - -static struct clk cam_l4_ick = { - .name = "cam_l4_ick", +static struct clk cam_ick = { + /* Handles both L3 and L4 clocks */ + .name = "cam_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "cam_clkdm", .recalc = &followparent_recalc, }; @@ -2095,45 +2177,45 @@ static struct clk cam_l4_ick = { static struct clk usbhost_120m_fck = { .name = "usbhost_120m_fck", .parent = &omap_120m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; static struct clk usbhost_48m_fck = { .name = "usbhost_48m_fck", .parent = &omap_48m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; -static struct clk usbhost_l3_ick = { - .name = "usbhost_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), - .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, - .flags = CLOCK_IN_OMAP3430ES2, - .recalc = &followparent_recalc, -}; - -static struct clk usbhost_l4_ick = { - .name = "usbhost_l4_ick", +static struct clk usbhost_ick = { + /* Handles both L3 and L4 clocks */ + .name = "usbhost_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; static struct clk usbhost_sar_fck = { .name = "usbhost_sar_fck", .parent = &osc_sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; @@ -2175,6 +2257,7 @@ static struct clk usim_fck = { .recalc = &omap2_clksel_recalc, }; +/* XXX should gpt1's clksel have wkup_32k_fck as the 32k opt? */ static struct clk gpt1_fck = { .name = "gpt1_fck", .init = &omap2_init_clksel_parent, @@ -2184,13 +2267,16 @@ static struct clk gpt1_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT1_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk wkup_32k_fck = { .name = "wkup_32k_fck", + .init = &omap2_init_clk_clkdm, .parent = &omap_32k_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2200,6 +2286,7 @@ static struct clk gpio1_fck = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2209,6 +2296,7 @@ static struct clk wdt2_fck = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2216,6 +2304,7 @@ static struct clk wkup_l4_ick = { .name = "wkup_l4_ick", .parent = &sys_ck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2227,6 +2316,7 @@ static struct clk usim_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2236,6 +2326,7 @@ static struct clk wdt2_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2245,6 +2336,7 @@ static struct clk wdt1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2254,6 +2346,7 @@ static struct clk gpio1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2263,15 +2356,18 @@ static struct clk omap_32ksync_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_32KSYNC_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; +/* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_ick = { .name = "gpt12_ick", .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT12_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2281,6 +2377,7 @@ static struct clk gpt1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2291,16 +2388,20 @@ static struct clk gpt1_ick = { static struct clk per_96m_fck = { .name = "per_96m_fck", .parent = &omap_96m_alwon_fck, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk per_48m_fck = { .name = "per_48m_fck", .parent = &omap_48m_fck, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2310,6 +2411,7 @@ static struct clk uart3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2322,6 +2424,7 @@ static struct clk gpt2_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT2_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2334,6 +2437,7 @@ static struct clk gpt3_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT3_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2346,6 +2450,7 @@ static struct clk gpt4_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT4_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2358,6 +2463,7 @@ static struct clk gpt5_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT5_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2370,6 +2476,7 @@ static struct clk gpt6_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT6_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2382,6 +2489,7 @@ static struct clk gpt7_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT7_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2394,6 +2502,7 @@ static struct clk gpt8_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT8_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2406,12 +2515,14 @@ static struct clk gpt9_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT9_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk per_32k_alwon_fck = { .name = "per_32k_alwon_fck", .parent = &omap_32k_fck, + .clkdm_name = "per_clkdm", .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .recalc = &followparent_recalc, }; @@ -2422,6 +2533,7 @@ static struct clk gpio6_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2431,6 +2543,7 @@ static struct clk gpio5_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2440,6 +2553,7 @@ static struct clk gpio4_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2449,6 +2563,7 @@ static struct clk gpio3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2458,6 +2573,7 @@ static struct clk gpio2_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2467,6 +2583,7 @@ static struct clk wdt3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2475,6 +2592,7 @@ static struct clk per_l4_ick = { .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2484,6 +2602,7 @@ static struct clk gpio6_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2493,6 +2612,7 @@ static struct clk gpio5_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2502,6 +2622,7 @@ static struct clk gpio4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2511,6 +2632,7 @@ static struct clk gpio3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2520,6 +2642,7 @@ static struct clk gpio2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2529,6 +2652,7 @@ static struct clk wdt3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2538,6 +2662,7 @@ static struct clk uart3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2547,6 +2672,7 @@ static struct clk gpt9_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT9_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2556,6 +2682,7 @@ static struct clk gpt8_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT8_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2565,6 +2692,7 @@ static struct clk gpt7_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT7_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2574,6 +2702,7 @@ static struct clk gpt6_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2583,6 +2712,7 @@ static struct clk gpt5_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2592,6 +2722,7 @@ static struct clk gpt4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2601,6 +2732,7 @@ static struct clk gpt3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2610,6 +2742,7 @@ static struct clk gpt2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2620,6 +2753,7 @@ static struct clk mcbsp2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2630,6 +2764,7 @@ static struct clk mcbsp3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2640,12 +2775,13 @@ static struct clk mcbsp4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static const struct clksel mcbsp_234_clksel[] = { { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, - { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, + { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, { .parent = NULL } }; @@ -2659,6 +2795,7 @@ static struct clk mcbsp2_fck = { .clksel_mask = OMAP2_MCBSP2_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2672,6 +2809,7 @@ static struct clk mcbsp3_fck = { .clksel_mask = OMAP2_MCBSP3_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2685,6 +2823,7 @@ static struct clk mcbsp4_fck = { .clksel_mask = OMAP2_MCBSP4_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2732,6 +2871,7 @@ static struct clk emu_src_ck = { .clksel_mask = OMAP3430_MUX_CTRL_MASK, .clksel = emu_src_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2755,6 +2895,7 @@ static struct clk pclk_fck = { .clksel_mask = OMAP3430_CLKSEL_PCLK_MASK, .clksel = pclk_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2777,6 +2918,7 @@ static struct clk pclkx2_fck = { .clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK, .clksel = pclkx2_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2792,6 +2934,7 @@ static struct clk atclk_fck = { .clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK, .clksel = atclk_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2802,6 +2945,7 @@ static struct clk traceclk_src_fck = { .clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK, .clksel = emu_src_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2824,6 +2968,7 @@ static struct clk traceclk_fck = { .clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK, .clksel = traceclk_clksel, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2853,11 +2998,13 @@ static struct clk sr_l4_ick = { .name = "sr_l4_ick", .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; /* SECURE_32K_FCK clocks */ +/* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_fck = { .name = "gpt12_fck", .parent = &secure_32k_fck, @@ -2933,6 +3080,7 @@ static struct clk *onchip_34xx_clks[] __initdata = { &l3_ick, &l4_ick, &rm_ick, + &gfx_l3_ck, &gfx_l3_fck, &gfx_l3_ick, &gfx_cg1_ck, @@ -3014,12 +3162,10 @@ static struct clk *onchip_34xx_clks[] __initdata = { &dss2_alwon_fck, &dss_ick, &cam_mclk, - &cam_l3_ick, - &cam_l4_ick, + &cam_ick, &usbhost_120m_fck, &usbhost_48m_fck, - &usbhost_l3_ick, - &usbhost_l4_ick, + &usbhost_ick, &usbhost_sar_fck, &usim_fck, &gpt1_fck, diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c new file mode 100644 index 00000000000..4c3ce9cfd94 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomain.c @@ -0,0 +1,623 @@ +/* + * OMAP2/3 clockdomain framework functions + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley and Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifdef CONFIG_OMAP_DEBUG_CLOCKDOMAIN +# define DEBUG +#endif + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/delay.h> +#include <linux/clk.h> +#include <linux/limits.h> + +#include <linux/io.h> + +#include <linux/bitops.h> + +#include <mach/clock.h> + +#include "prm.h" +#include "prm-regbits-24xx.h" +#include "cm.h" + +#include <mach/powerdomain.h> +#include <mach/clockdomain.h> + +/* clkdm_list contains all registered struct clockdomains */ +static LIST_HEAD(clkdm_list); + +/* clkdm_mutex protects clkdm_list add and del ops */ +static DEFINE_MUTEX(clkdm_mutex); + +/* array of powerdomain deps to be added/removed when clkdm in hwsup mode */ +static struct clkdm_pwrdm_autodep *autodeps; + + +/* Private functions */ + +/* + * _autodep_lookup - resolve autodep pwrdm names to pwrdm pointers; store + * @autodep: struct clkdm_pwrdm_autodep * to resolve + * + * Resolve autodep powerdomain names to powerdomain pointers via + * pwrdm_lookup() and store the pointers in the autodep structure. An + * "autodep" is a powerdomain sleep/wakeup dependency that is + * automatically added and removed whenever clocks in the associated + * clockdomain are enabled or disabled (respectively) when the + * clockdomain is in hardware-supervised mode. Meant to be called + * once at clockdomain layer initialization, since these should remain + * fixed for a particular architecture. No return value. + */ +static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep) +{ + struct powerdomain *pwrdm; + + if (!autodep) + return; + + if (!omap_chip_is(autodep->omap_chip)) + return; + + pwrdm = pwrdm_lookup(autodep->pwrdm_name); + if (!pwrdm) { + pr_debug("clockdomain: _autodep_lookup: powerdomain %s " + "does not exist\n", autodep->pwrdm_name); + WARN_ON(1); + return; + } + autodep->pwrdm = pwrdm; + + return; +} + +/* + * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable + * @clkdm: struct clockdomain * + * + * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm' + * in hardware-supervised mode. Meant to be called from clock framework + * when a clock inside clockdomain 'clkdm' is enabled. No return value. + */ +static void _clkdm_add_autodeps(struct clockdomain *clkdm) +{ + struct clkdm_pwrdm_autodep *autodep; + + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) + continue; + + pr_debug("clockdomain: adding %s sleepdep/wkdep for " + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); + + pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm); + } +} + +/* + * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm + * @clkdm: struct clockdomain * + * + * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm' + * in hardware-supervised mode. Meant to be called from clock framework + * when a clock inside clockdomain 'clkdm' is disabled. No return value. + */ +static void _clkdm_del_autodeps(struct clockdomain *clkdm) +{ + struct clkdm_pwrdm_autodep *autodep; + + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) + continue; + + pr_debug("clockdomain: removing %s sleepdep/wkdep for " + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); + + pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm); + } +} + + +static struct clockdomain *_clkdm_lookup(const char *name) +{ + struct clockdomain *clkdm, *temp_clkdm; + + if (!name) + return NULL; + + clkdm = NULL; + + list_for_each_entry(temp_clkdm, &clkdm_list, node) { + if (!strcmp(name, temp_clkdm->name)) { + clkdm = temp_clkdm; + break; + } + } + + return clkdm; +} + + +/* Public functions */ + +/** + * clkdm_init - set up the clockdomain layer + * @clkdms: optional pointer to an array of clockdomains to register + * @init_autodeps: optional pointer to an array of autodeps to register + * + * Set up internal state. If a pointer to an array of clockdomains + * was supplied, loop through the list of clockdomains, register all + * that are available on the current platform. Similarly, if a + * pointer to an array of clockdomain-powerdomain autodependencies was + * provided, register those. No return value. + */ +void clkdm_init(struct clockdomain **clkdms, + struct clkdm_pwrdm_autodep *init_autodeps) +{ + struct clockdomain **c = NULL; + struct clkdm_pwrdm_autodep *autodep = NULL; + + if (clkdms) + for (c = clkdms; *c; c++) + clkdm_register(*c); + + autodeps = init_autodeps; + if (autodeps) + for (autodep = autodeps; autodep->pwrdm_name; autodep++) + _autodep_lookup(autodep); +} + +/** + * clkdm_register - register a clockdomain + * @clkdm: struct clockdomain * to register + * + * Adds a clockdomain to the internal clockdomain list. + * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is + * already registered by the provided name, or 0 upon success. + */ +int clkdm_register(struct clockdomain *clkdm) +{ + int ret = -EINVAL; + struct powerdomain *pwrdm; + + if (!clkdm || !clkdm->name) + return -EINVAL; + + if (!omap_chip_is(clkdm->omap_chip)) + return -EINVAL; + + pwrdm = pwrdm_lookup(clkdm->pwrdm_name); + if (!pwrdm) { + pr_debug("clockdomain: clkdm_register %s: powerdomain %s " + "does not exist\n", clkdm->name, clkdm->pwrdm_name); + return -EINVAL; + } + clkdm->pwrdm = pwrdm; + + mutex_lock(&clkdm_mutex); + /* Verify that the clockdomain is not already registered */ + if (_clkdm_lookup(clkdm->name)) { + ret = -EEXIST; + goto cr_unlock; + }; + + list_add(&clkdm->node, &clkdm_list); + + pwrdm_add_clkdm(pwrdm, clkdm); + + pr_debug("clockdomain: registered %s\n", clkdm->name); + ret = 0; + +cr_unlock: + mutex_unlock(&clkdm_mutex); + + return ret; +} + +/** + * clkdm_unregister - unregister a clockdomain + * @clkdm: struct clockdomain * to unregister + * + * Removes a clockdomain from the internal clockdomain list. Returns + * -EINVAL if clkdm argument is NULL. + */ +int clkdm_unregister(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + pwrdm_del_clkdm(clkdm->pwrdm, clkdm); + + mutex_lock(&clkdm_mutex); + list_del(&clkdm->node); + mutex_unlock(&clkdm_mutex); + + pr_debug("clockdomain: unregistered %s\n", clkdm->name); + + return 0; +} + +/** + * clkdm_lookup - look up a clockdomain by name, return a pointer + * @name: name of clockdomain + * + * Find a registered clockdomain by its name. Returns a pointer to the + * struct clockdomain if found, or NULL otherwise. + */ +struct clockdomain *clkdm_lookup(const char *name) +{ + struct clockdomain *clkdm, *temp_clkdm; + + if (!name) + return NULL; + + clkdm = NULL; + + mutex_lock(&clkdm_mutex); + list_for_each_entry(temp_clkdm, &clkdm_list, node) { + if (!strcmp(name, temp_clkdm->name)) { + clkdm = temp_clkdm; + break; + } + } + mutex_unlock(&clkdm_mutex); + + return clkdm; +} + +/** + * clkdm_for_each - call function on each registered clockdomain + * @fn: callback function * + * + * Call the supplied function for each registered clockdomain. + * The callback function can return anything but 0 to bail + * out early from the iterator. The callback function is called with + * the clkdm_mutex held, so no clockdomain structure manipulation + * functions should be called from the callback, although hardware + * clockdomain control functions are fine. Returns the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure; or -EINVAL if the function pointer + * is null. + */ +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) +{ + struct clockdomain *clkdm; + int ret = 0; + + if (!fn) + return -EINVAL; + + mutex_lock(&clkdm_mutex); + list_for_each_entry(clkdm, &clkdm_list, node) { + ret = (*fn)(clkdm); + if (ret) + break; + } + mutex_unlock(&clkdm_mutex); + + return ret; +} + + +/** + * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in + * @clkdm: struct clockdomain * + * + * Return a pointer to the struct powerdomain that the specified clockdomain + * 'clkdm' exists in, or returns NULL if clkdm argument is NULL. + */ +struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) +{ + if (!clkdm) + return NULL; + + return clkdm->pwrdm; +} + + +/* Hardware clockdomain control */ + +/** + * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode + * @clk: struct clk * of a clockdomain + * + * Return the clockdomain's current state transition mode from the + * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if clk + * is NULL or the current mode upon success. + */ +static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return -EINVAL; + + v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + v &= clkdm->clktrctrl_mask; + v >>= __ffs(clkdm->clktrctrl_mask); + + return v; +} + +/** + * omap2_clkdm_sleep - force clockdomain sleep transition + * @clkdm: struct clockdomain * + * + * Instruct the CM to force a sleep transition on the specified + * clockdomain 'clkdm'. Returns -EINVAL if clk is NULL or if + * clockdomain does not support software-initiated sleep; 0 upon + * success. + */ +int omap2_clkdm_sleep(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + pr_debug("clockdomain: %s does not support forcing " + "sleep via software\n", clkdm->name); + return -EINVAL; + } + + pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); + + if (cpu_is_omap24xx()) { + + cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); + + } else if (cpu_is_omap34xx()) { + + u32 v = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << + __ffs(clkdm->clktrctrl_mask)); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + } else { + BUG(); + }; + + return 0; +} + +/** + * omap2_clkdm_wakeup - force clockdomain wakeup transition + * @clkdm: struct clockdomain * + * + * Instruct the CM to force a wakeup transition on the specified + * clockdomain 'clkdm'. Returns -EINVAL if clkdm is NULL or if the + * clockdomain does not support software-controlled wakeup; 0 upon + * success. + */ +int omap2_clkdm_wakeup(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { + pr_debug("clockdomain: %s does not support forcing " + "wakeup via software\n", clkdm->name); + return -EINVAL; + } + + pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); + + if (cpu_is_omap24xx()) { + + cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); + + } else if (cpu_is_omap34xx()) { + + u32 v = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << + __ffs(clkdm->clktrctrl_mask)); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + } else { + BUG(); + }; + + return 0; +} + +/** + * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm + * @clkdm: struct clockdomain * + * + * Allow the hardware to automatically switch the clockdomain into + * active or idle states, as needed by downstream clocks. If the + * clockdomain has any downstream clocks enabled in the clock + * framework, wkdep/sleepdep autodependencies are added; this is so + * device drivers can read and write to the device. No return value. + */ +void omap2_clkdm_allow_idle(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return; + + if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { + pr_debug("clock: automatic idle transitions cannot be enabled " + "on clockdomain %s\n", clkdm->name); + return; + } + + pr_debug("clockdomain: enabling automatic idle transitions for %s\n", + clkdm->name); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + if (cpu_is_omap24xx()) + v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; + else if (cpu_is_omap34xx()) + v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; + else + BUG(); + + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, + v << __ffs(clkdm->clktrctrl_mask), + clkdm->pwrdm->prcm_offs, + CM_CLKSTCTRL); +} + +/** + * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm + * @clkdm: struct clockdomain * + * + * Prevent the hardware from automatically switching the clockdomain + * into inactive or idle states. If the clockdomain has downstream + * clocks enabled in the clock framework, wkdep/sleepdep + * autodependencies are removed. No return value. + */ +void omap2_clkdm_deny_idle(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return; + + if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { + pr_debug("clockdomain: automatic idle transitions cannot be " + "disabled on %s\n", clkdm->name); + return; + } + + pr_debug("clockdomain: disabling automatic idle transitions for %s\n", + clkdm->name); + + if (cpu_is_omap24xx()) + v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; + else if (cpu_is_omap34xx()) + v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; + else + BUG(); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, + v << __ffs(clkdm->clktrctrl_mask), + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + + +/* Clockdomain-to-clock framework interface code */ + +/** + * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm + * @clkdm: struct clockdomain * + * @clk: struct clk * of the enabled downstream clock + * + * Increment the usecount of this clockdomain 'clkdm' and ensure that + * it is awake. Intended to be called by clk_enable() code. If the + * clockdomain is in software-supervised idle mode, force the + * clockdomain to wake. If the clockdomain is in hardware-supervised + * idle mode, add clkdm-pwrdm autodependencies, to ensure that devices + * in the clockdomain can be read from/written to by on-chip processors. + * Returns -EINVAL if passed null pointers; returns 0 upon success or + * if the clockdomain is in hwsup idle mode. + */ +int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) +{ + int v; + + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream clocks for debugging purposes? + */ + + if (!clkdm || !clk) + return -EINVAL; + + if (atomic_inc_return(&clkdm->usecount) > 1) + return 0; + + /* Clockdomain now has one enabled downstream clock */ + + pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, + clk->name); + + v = omap2_clkdm_clktrctrl_read(clkdm); + + if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + _clkdm_add_autodeps(clkdm); + else + omap2_clkdm_wakeup(clkdm); + + return 0; +} + +/** + * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm + * @clkdm: struct clockdomain * + * @clk: struct clk * of the disabled downstream clock + * + * Decrement the usecount of this clockdomain 'clkdm'. Intended to be + * called by clk_disable() code. If the usecount goes to 0, put the + * clockdomain to sleep (software-supervised mode) or remove the + * clkdm-pwrdm autodependencies (hardware-supervised mode). Returns + * -EINVAL if passed null pointers; -ERANGE if the clkdm usecount + * underflows and debugging is enabled; or returns 0 upon success or + * if the clockdomain is in hwsup idle mode. + */ +int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) +{ + int v; + + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream clocks for debugging purposes? + */ + + if (!clkdm || !clk) + return -EINVAL; + +#ifdef DEBUG + if (atomic_read(&clkdm->usecount) == 0) { + WARN_ON(1); /* underflow */ + return -ERANGE; + } +#endif + + if (atomic_dec_return(&clkdm->usecount) > 0) + return 0; + + /* All downstream clocks of this clockdomain are now disabled */ + + pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, + clk->name); + + v = omap2_clkdm_clktrctrl_read(clkdm); + + if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + _clkdm_del_autodeps(clkdm); + else + omap2_clkdm_sleep(clkdm); + + return 0; +} + diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h new file mode 100644 index 00000000000..cd86dcc7b42 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomains.h @@ -0,0 +1,305 @@ +/* + * OMAP2/3 clockdomains + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H +#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H + +#include <mach/clockdomain.h> + +/* + * OMAP2/3-common clockdomains + */ + +/* This is an implicit clockdomain - it is never defined as such in TRM */ +static struct clockdomain wkup_clkdm = { + .name = "wkup_clkdm", + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + +/* + * 2420-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP2420) + +static struct clockdomain mpu_2420_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +static struct clockdomain iva1_2420_clkdm = { + .name = "iva1_clkdm", + .pwrdm_name = "dsp_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +#endif /* CONFIG_ARCH_OMAP2420 */ + + +/* + * 2430-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP2430) + +static struct clockdomain mpu_2430_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +static struct clockdomain mdm_clkdm = { + .name = "mdm_clkdm", + .pwrdm_name = "mdm_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +#endif /* CONFIG_ARCH_OMAP2430 */ + + +/* + * 24XX-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP24XX) + +static struct clockdomain dsp_clkdm = { + .name = "dsp_clkdm", + .pwrdm_name = "dsp_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain gfx_24xx_clkdm = { + .name = "gfx_clkdm", + .pwrdm_name = "gfx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain core_l3_24xx_clkdm = { + .name = "core_l3_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain core_l4_24xx_clkdm = { + .name = "core_l4_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain dss_24xx_clkdm = { + .name = "dss_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +#endif /* CONFIG_ARCH_OMAP24XX */ + + +/* + * 34xx clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP34XX) + +static struct clockdomain mpu_34xx_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain neon_clkdm = { + .name = "neon_clkdm", + .pwrdm_name = "neon_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain iva2_clkdm = { + .name = "iva2_clkdm", + .pwrdm_name = "iva2_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain gfx_3430es1_clkdm = { + .name = "gfx_clkdm", + .pwrdm_name = "gfx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), +}; + +static struct clockdomain sgx_clkdm = { + .name = "sgx_clkdm", + .pwrdm_name = "sgx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), +}; + +/* + * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but + * then that information was removed from the 34xx ES2+ TRM. It is + * unclear whether the core is still there, but the clockdomain logic + * is there, and must be programmed to an appropriate state if the + * CORE clockdomain is to become inactive. + */ +static struct clockdomain d2d_clkdm = { + .name = "d2d_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain core_l3_34xx_clkdm = { + .name = "core_l3_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain core_l4_34xx_clkdm = { + .name = "core_l4_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dss_34xx_clkdm = { + .name = "dss_clkdm", + .pwrdm_name = "dss_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain cam_clkdm = { + .name = "cam_clkdm", + .pwrdm_name = "cam_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain usbhost_clkdm = { + .name = "usbhost_clkdm", + .pwrdm_name = "usbhost_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), +}; + +static struct clockdomain per_clkdm = { + .name = "per_clkdm", + .pwrdm_name = "per_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain emu_clkdm = { + .name = "emu_clkdm", + .pwrdm_name = "emu_pwrdm", + .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +#endif /* CONFIG_ARCH_OMAP34XX */ + +/* + * Clockdomain-powerdomain hwsup dependencies (34XX only) + */ + +static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL } +}; + +/* + * + */ + +static struct clockdomain *clockdomains_omap[] = { + + &wkup_clkdm, + +#ifdef CONFIG_ARCH_OMAP2420 + &mpu_2420_clkdm, + &iva1_2420_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP2430 + &mpu_2430_clkdm, + &mdm_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP24XX + &dsp_clkdm, + &gfx_24xx_clkdm, + &core_l3_24xx_clkdm, + &core_l4_24xx_clkdm, + &dss_24xx_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP34XX + &mpu_34xx_clkdm, + &neon_clkdm, + &iva2_clkdm, + &gfx_3430es1_clkdm, + &sgx_clkdm, + &d2d_clkdm, + &core_l3_34xx_clkdm, + &core_l4_34xx_clkdm, + &dss_34xx_clkdm, + &cam_clkdm, + &usbhost_clkdm, + &per_clkdm, + &emu_clkdm, +#endif + + NULL, +}; + +#endif diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index 20ac3810067..1098ecfab86 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h @@ -63,7 +63,8 @@ #define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0) /* CM_CLKSTCTRL_MPU */ -#define OMAP24XX_AUTOSTATE_MPU (1 << 0) +#define OMAP24XX_AUTOSTATE_MPU_SHIFT 0 +#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0) /* CM_FCLKEN1_CORE specific bits*/ #define OMAP24XX_EN_TV_SHIFT 2 @@ -238,9 +239,12 @@ #define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2) /* CM_CLKSTCTRL_CORE */ -#define OMAP24XX_AUTOSTATE_DSS (1 << 2) -#define OMAP24XX_AUTOSTATE_L4 (1 << 1) -#define OMAP24XX_AUTOSTATE_L3 (1 << 0) +#define OMAP24XX_AUTOSTATE_DSS_SHIFT 2 +#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2) +#define OMAP24XX_AUTOSTATE_L4_SHIFT 1 +#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1) +#define OMAP24XX_AUTOSTATE_L3_SHIFT 0 +#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0) /* CM_FCLKEN_GFX */ #define OMAP24XX_EN_3D_SHIFT 2 @@ -255,7 +259,8 @@ /* CM_CLKSEL_GFX specific bits */ /* CM_CLKSTCTRL_GFX */ -#define OMAP24XX_AUTOSTATE_GFX (1 << 0) +#define OMAP24XX_AUTOSTATE_GFX_SHIFT 0 +#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0) /* CM_FCLKEN_WKUP specific bits */ @@ -367,8 +372,10 @@ #define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0) /* CM_CLKSTCTRL_DSP */ -#define OMAP2420_AUTOSTATE_IVA (1 << 8) -#define OMAP24XX_AUTOSTATE_DSP (1 << 0) +#define OMAP2420_AUTOSTATE_IVA_SHIFT 8 +#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8) +#define OMAP24XX_AUTOSTATE_DSP_SHIFT 0 +#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0) /* CM_FCLKEN_MDM */ /* 2430 only */ @@ -396,6 +403,7 @@ /* CM_CLKSTCTRL_MDM */ /* 2430 only */ -#define OMAP2430_AUTOSTATE_MDM (1 << 0) +#define OMAP2430_AUTOSTATE_MDM_SHIFT 0 +#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index ee4c0ca1a70..219f5c8d965 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -96,7 +96,8 @@ #define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0) /* CM_CLKSTST_IVA2 */ -#define OMAP3430_CLKACTIVITY_IVA2 (1 << 0) +#define OMAP3430_CLKACTIVITY_IVA2_SHIFT 0 +#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0) /* CM_REVISION specific bits */ @@ -140,7 +141,8 @@ #define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0) /* CM_CLKSTST_MPU */ -#define OMAP3430_CLKACTIVITY_MPU (1 << 0) +#define OMAP3430_CLKACTIVITY_MPU_SHIFT 0 +#define OMAP3430_CLKACTIVITY_MPU_MASK (1 << 0) /* CM_FCLKEN1_CORE specific bits */ @@ -300,9 +302,12 @@ #define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0) /* CM_CLKSTST_CORE */ -#define OMAP3430ES1_CLKACTIVITY_D2D (1 << 2) -#define OMAP3430_CLKACTIVITY_L4 (1 << 1) -#define OMAP3430_CLKACTIVITY_L3 (1 << 0) +#define OMAP3430ES1_CLKACTIVITY_D2D_SHIFT 2 +#define OMAP3430ES1_CLKACTIVITY_D2D_MASK (1 << 2) +#define OMAP3430_CLKACTIVITY_L4_SHIFT 1 +#define OMAP3430_CLKACTIVITY_L4_MASK (1 << 1) +#define OMAP3430_CLKACTIVITY_L3_SHIFT 0 +#define OMAP3430_CLKACTIVITY_L3_MASK (1 << 0) /* CM_FCLKEN_GFX */ #define OMAP3430ES1_EN_3D (1 << 2) @@ -323,7 +328,8 @@ #define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0) /* CM_CLKSTST_GFX */ -#define OMAP3430ES1_CLKACTIVITY_GFX (1 << 0) +#define OMAP3430ES1_CLKACTIVITY_GFX_SHIFT 0 +#define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) /* CM_FCLKEN_SGX */ #define OMAP3430ES2_EN_SGX_SHIFT 1 @@ -333,6 +339,14 @@ #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 #define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0) +/* CM_CLKSTCTRL_SGX */ +#define OMAP3430ES2_CLKTRCTRL_SGX_SHIFT 0 +#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0) + +/* CM_CLKSTST_SGX */ +#define OMAP3430ES2_CLKACTIVITY_SGX_SHIFT 0 +#define OMAP3430ES2_CLKACTIVITY_SGX_MASK (1 << 0) + /* CM_FCLKEN_WKUP specific bits */ #define OMAP3430ES2_EN_USIMOCP_SHIFT 9 @@ -498,7 +512,8 @@ #define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0) /* CM_CLKSTST_DSS */ -#define OMAP3430_CLKACTIVITY_DSS (1 << 0) +#define OMAP3430_CLKACTIVITY_DSS_SHIFT 0 +#define OMAP3430_CLKACTIVITY_DSS_MASK (1 << 0) /* CM_FCLKEN_CAM specific bits */ @@ -522,7 +537,8 @@ #define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0) /* CM_CLKSTST_CAM */ -#define OMAP3430_CLKACTIVITY_CAM (1 << 0) +#define OMAP3430_CLKACTIVITY_CAM_SHIFT 0 +#define OMAP3430_CLKACTIVITY_CAM_MASK (1 << 0) /* CM_FCLKEN_PER specific bits */ @@ -598,7 +614,8 @@ #define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0) /* CM_CLKSTST_PER */ -#define OMAP3430_CLKACTIVITY_PER (1 << 0) +#define OMAP3430_CLKACTIVITY_PER_SHIFT 0 +#define OMAP3430_CLKACTIVITY_PER_MASK (1 << 0) /* CM_CLKSEL1_EMU */ #define OMAP3430_DIV_DPLL4_SHIFT 24 @@ -623,7 +640,8 @@ #define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0) /* CM_CLKSTST_EMU */ -#define OMAP3430_CLKACTIVITY_EMU (1 << 0) +#define OMAP3430_CLKACTIVITY_EMU_SHIFT 0 +#define OMAP3430_CLKACTIVITY_EMU_MASK (1 << 0) /* CM_CLKSEL2_EMU specific bits */ #define OMAP3430_CORE_DPLL_EMU_MULT_SHIFT 8 @@ -673,6 +691,8 @@ #define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT 0 #define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0) - +/* CM_CLKSTST_USBHOST */ +#define OMAP3430ES2_CLKACTIVITY_USBHOST_SHIFT 0 +#define OMAP3430ES2_CLKACTIVITY_USBHOST_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 87a44c715aa..65fdf78c91e 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_CM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) #else #define OMAP2420_CM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 7a7f0255907..90af2ac469a 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -13,9 +13,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/mach/map.h> @@ -23,50 +23,7 @@ #include <mach/board.h> #include <mach/mux.h> #include <mach/gpio.h> - -#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) - -#define OMAP2_I2C_BASE2 0x48072000 -#define OMAP2_I2C_INT2 57 - -static struct resource i2c_resources2[] = { - { - .start = OMAP2_I2C_BASE2, - .end = OMAP2_I2C_BASE2 + 0x3f, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP2_I2C_INT2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device omap_i2c_device2 = { - .name = "i2c_omap", - .id = 2, - .num_resources = ARRAY_SIZE(i2c_resources2), - .resource = i2c_resources2, -}; - -/* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */ -static void omap_init_i2c(void) -{ - /* REVISIT: Second I2C not in use on H4? */ - if (machine_is_omap_h4()) - return; - - if (!cpu_is_omap2430()) { - omap_cfg_reg(J15_24XX_I2C2_SCL); - omap_cfg_reg(H19_24XX_I2C2_SDA); - } - (void) platform_device_register(&omap_i2c_device2); -} - -#else - -static void omap_init_i2c(void) {} - -#endif +#include <mach/eac.h> #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) #define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) @@ -104,7 +61,9 @@ static inline void omap_init_mbox(void) { } #if defined(CONFIG_OMAP_STI) -#define OMAP2_STI_BASE IO_ADDRESS(0x48068000) +#if defined(CONFIG_ARCH_OMAP2) + +#define OMAP2_STI_BASE 0x48068000 #define OMAP2_STI_CHANNEL_BASE 0x54000000 #define OMAP2_STI_IRQ 4 @@ -124,6 +83,25 @@ static struct resource sti_resources[] = { .flags = IORESOURCE_IRQ, } }; +#elif defined(CONFIG_ARCH_OMAP3) + +#define OMAP3_SDTI_BASE 0x54500000 +#define OMAP3_SDTI_CHANNEL_BASE 0x54600000 + +static struct resource sti_resources[] = { + { + .start = OMAP3_SDTI_BASE, + .end = OMAP3_SDTI_BASE + 0xFFF, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3_SDTI_CHANNEL_BASE, + .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1, + .flags = IORESOURCE_MEM, + } +}; + +#endif static struct platform_device sti_device = { .name = "sti", @@ -140,12 +118,14 @@ static inline void omap_init_sti(void) static inline void omap_init_sti(void) {} #endif -#if defined(CONFIG_SPI_OMAP24XX) +#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) #include <mach/mcspi.h> #define OMAP2_MCSPI1_BASE 0x48098000 #define OMAP2_MCSPI2_BASE 0x4809a000 +#define OMAP2_MCSPI3_BASE 0x480b8000 +#define OMAP2_MCSPI4_BASE 0x480ba000 static struct omap2_mcspi_platform_config omap2_mcspi1_config = { .num_cs = 4, @@ -159,7 +139,7 @@ static struct resource omap2_mcspi1_resources[] = { }, }; -struct platform_device omap2_mcspi1 = { +static struct platform_device omap2_mcspi1 = { .name = "omap2_mcspi", .id = 1, .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), @@ -181,7 +161,7 @@ static struct resource omap2_mcspi2_resources[] = { }, }; -struct platform_device omap2_mcspi2 = { +static struct platform_device omap2_mcspi2 = { .name = "omap2_mcspi", .id = 2, .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), @@ -191,16 +171,162 @@ struct platform_device omap2_mcspi2 = { }, }; +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) +static struct omap2_mcspi_platform_config omap2_mcspi3_config = { + .num_cs = 2, +}; + +static struct resource omap2_mcspi3_resources[] = { + { + .start = OMAP2_MCSPI3_BASE, + .end = OMAP2_MCSPI3_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_mcspi3 = { + .name = "omap2_mcspi", + .id = 3, + .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), + .resource = omap2_mcspi3_resources, + .dev = { + .platform_data = &omap2_mcspi3_config, + }, +}; +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct omap2_mcspi_platform_config omap2_mcspi4_config = { + .num_cs = 1, +}; + +static struct resource omap2_mcspi4_resources[] = { + { + .start = OMAP2_MCSPI4_BASE, + .end = OMAP2_MCSPI4_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_mcspi4 = { + .name = "omap2_mcspi", + .id = 4, + .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), + .resource = omap2_mcspi4_resources, + .dev = { + .platform_data = &omap2_mcspi4_config, + }, +}; +#endif + static void omap_init_mcspi(void) { platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi2); +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) + platform_device_register(&omap2_mcspi3); +#endif +#ifdef CONFIG_ARCH_OMAP3 + platform_device_register(&omap2_mcspi4); +#endif } #else static inline void omap_init_mcspi(void) {} #endif +#ifdef CONFIG_SND_OMAP24XX_EAC + +#define OMAP2_EAC_BASE 0x48090000 + +static struct resource omap2_eac_resources[] = { + { + .start = OMAP2_EAC_BASE, + .end = OMAP2_EAC_BASE + 0x109, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_eac_device = { + .name = "omap24xx-eac", + .id = -1, + .num_resources = ARRAY_SIZE(omap2_eac_resources), + .resource = omap2_eac_resources, + .dev = { + .platform_data = NULL, + }, +}; + +void omap_init_eac(struct eac_platform_data *pdata) +{ + omap2_eac_device.dev.platform_data = pdata; + platform_device_register(&omap2_eac_device); +} + +#else +void omap_init_eac(struct eac_platform_data *pdata) {} +#endif + +#ifdef CONFIG_OMAP_SHA1_MD5 +static struct resource sha1_md5_resources[] = { + { + .start = OMAP24XX_SEC_SHA1MD5_BASE, + .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_SHA1MD5, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device sha1_md5_device = { + .name = "OMAP SHA1/MD5", + .id = -1, + .num_resources = ARRAY_SIZE(sha1_md5_resources), + .resource = sha1_md5_resources, +}; + +static void omap_init_sha1_md5(void) +{ + platform_device_register(&sha1_md5_device); +} +#else +static inline void omap_init_sha1_md5(void) { } +#endif + +#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) +#define OMAP_HDQ_BASE 0x480B2000 +#endif +static struct resource omap_hdq_resources[] = { + { + .start = OMAP_HDQ_BASE, + .end = OMAP_HDQ_BASE + 0x1C, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_HDQ_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device omap_hdq_dev = { + .name = "omap_hdq", + .id = 0, + .dev = { + .platform_data = NULL, + }, + .num_resources = ARRAY_SIZE(omap_hdq_resources), + .resource = omap_hdq_resources, +}; +static inline void omap_hdq_init(void) +{ + (void) platform_device_register(&omap_hdq_dev); +} +#else +static inline void omap_hdq_init(void) {} +#endif + /*-------------------------------------------------------------------------*/ static int __init omap2_init_devices(void) @@ -208,10 +334,11 @@ static int __init omap2_init_devices(void) /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ - omap_init_i2c(); omap_init_mbox(); omap_init_mcspi(); + omap_hdq_init(); omap_init_sti(); + omap_init_sha1_md5(); return 0; } diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index f51d69bc457..763bdbeaf68 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -9,27 +9,23 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#undef DEBUG + #include <linux/kernel.h> #include <linux/init.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/ioport.h> #include <linux/spinlock.h> +#include <linux/io.h> +#include <linux/module.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/gpmc.h> -#undef DEBUG - -#ifdef CONFIG_ARCH_OMAP2420 -#define GPMC_BASE 0x6800a000 -#endif - -#ifdef CONFIG_ARCH_OMAP2430 -#define GPMC_BASE 0x6E000000 -#endif +#include <mach/sdrc.h> +/* GPMC register offsets */ #define GPMC_REVISION 0x00 #define GPMC_SYSCONFIG 0x10 #define GPMC_SYSSTATUS 0x14 @@ -51,7 +47,6 @@ #define GPMC_CS0 0x60 #define GPMC_CS_SIZE 0x30 -#define GPMC_CS_NUM 8 #define GPMC_MEM_START 0x00000000 #define GPMC_MEM_END 0x3FFFFFFF #define BOOT_ROM_SPACE 0x100000 /* 1MB */ @@ -64,12 +59,9 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); static unsigned gpmc_cs_map; -static void __iomem *gpmc_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE); -static void __iomem *gpmc_cs_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0; +static void __iomem *gpmc_base; -static struct clk *gpmc_fck; +static struct clk *gpmc_l3_clk; static void gpmc_write_reg(int idx, u32 val) { @@ -85,19 +77,32 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val) { void __iomem *reg_addr; - reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx; + reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; __raw_writel(val, reg_addr); } u32 gpmc_cs_read_reg(int cs, int idx) { - return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx); + void __iomem *reg_addr; + + reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; + return __raw_readl(reg_addr); } +/* TODO: Add support for gpmc_fck to clock framework and use it */ unsigned long gpmc_get_fclk_period(void) { - /* In picoseconds */ - return 1000000000 / ((clk_get_rate(gpmc_fck)) / 1000); + unsigned long rate = clk_get_rate(gpmc_l3_clk); + + if (rate == 0) { + printk(KERN_WARNING "gpmc_l3_clk not enabled\n"); + return 0; + } + + rate /= 1000; + rate = 1000000000 / rate; /* In picoseconds */ + + return rate; } unsigned int gpmc_ns_to_ticks(unsigned int time_ns) @@ -110,6 +115,11 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) return (time_ns * 1000 + tick_ps - 1) / tick_ps; } +unsigned int gpmc_ticks_to_ns(unsigned int ticks) +{ + return ticks * gpmc_get_fclk_period() / 1000; +} + unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) { unsigned long ticks = gpmc_ns_to_ticks(time_ns); @@ -210,6 +220,11 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); + if (cpu_is_omap34xx()) { + GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus); + GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access); + } + /* caller is expected to have initialized CONFIG1 to cover * at least sync vs async */ @@ -350,6 +365,7 @@ out: spin_unlock(&gpmc_mem_lock); return r; } +EXPORT_SYMBOL(gpmc_cs_request); void gpmc_cs_free(int cs) { @@ -365,8 +381,9 @@ void gpmc_cs_free(int cs) gpmc_cs_set_reserved(cs, 0); spin_unlock(&gpmc_mem_lock); } +EXPORT_SYMBOL(gpmc_cs_free); -void __init gpmc_mem_init(void) +static void __init gpmc_mem_init(void) { int cs; unsigned long boot_rom_space = 0; @@ -396,12 +413,33 @@ void __init gpmc_mem_init(void) void __init gpmc_init(void) { u32 l; + char *ck; + + if (cpu_is_omap24xx()) { + ck = "core_l3_ck"; + if (cpu_is_omap2420()) + l = OMAP2420_GPMC_BASE; + else + l = OMAP34XX_GPMC_BASE; + } else if (cpu_is_omap34xx()) { + ck = "gpmc_fck"; + l = OMAP34XX_GPMC_BASE; + } - gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ - if (IS_ERR(gpmc_fck)) - WARN_ON(1); - else - clk_enable(gpmc_fck); + gpmc_l3_clk = clk_get(NULL, ck); + if (IS_ERR(gpmc_l3_clk)) { + printk(KERN_ERR "Could not get GPMC clock %s\n", ck); + return -ENODEV; + } + + gpmc_base = ioremap(l, SZ_4K); + if (!gpmc_base) { + clk_put(gpmc_l3_clk); + printk(KERN_ERR "Could not get GPMC register memory\n"); + return -ENOMEM; + } + + BUG_ON(IS_ERR(gpmc_l3_clk)); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a5d4526ac4d..bf45ff39a7b 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -14,27 +14,19 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> +#include <asm/cputype.h> +#include <mach/common.h> #include <mach/control.h> #include <mach/cpu.h> -#if defined(CONFIG_ARCH_OMAP2420) -#define TAP_BASE io_p2v(0x48014000) -#elif defined(CONFIG_ARCH_OMAP2430) -#define TAP_BASE io_p2v(0x4900A000) -#elif defined(CONFIG_ARCH_OMAP34XX) -#define TAP_BASE io_p2v(0x4830A000) -#endif +static u32 class; +static void __iomem *tap_base; +static u16 tap_prod_id; #define OMAP_TAP_IDCODE 0x0204 -#if defined(CONFIG_ARCH_OMAP34XX) -#define OMAP_TAP_PROD_ID 0x0210 -#else -#define OMAP_TAP_PROD_ID 0x0208 -#endif - #define OMAP_TAP_DIE_ID_0 0x0218 #define OMAP_TAP_DIE_ID_1 0x021C #define OMAP_TAP_DIE_ID_2 0x0220 @@ -93,18 +85,24 @@ static u32 __init read_tap_reg(int reg) * it means its Cortex r0p0 which is 3430 ES1 */ if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) { + + if (reg == tap_prod_id) { + regval = 0x000F00F0; + goto out; + } + switch (reg) { case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break; /* Making DevType as 0xF in ES1 to differ from ES2 */ - case OMAP_TAP_PROD_ID : regval = 0x000F00F0; break; case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break; case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break; case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break; case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break; } } else - regval = __raw_readl(TAP_BASE + reg); + regval = __raw_readl(tap_base + reg); +out: return regval; } @@ -203,7 +201,7 @@ void __init omap2_check_revision(void) u8 rev; idcode = read_tap_reg(OMAP_TAP_IDCODE); - prod_id = read_tap_reg(OMAP_TAP_PROD_ID); + prod_id = read_tap_reg(tap_prod_id); hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0x0f; dev_type = (prod_id >> 16) & 0x0f; @@ -268,3 +266,13 @@ void __init omap2_check_revision(void) } +void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) +{ + class = omap2_globals->class; + tap_base = omap2_globals->tap; + + if (class == 0x3430) + tap_prod_id = 0x0210; + else + tap_prod_id = 0x0208; +} diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 987351f07d7..5ea64f926ed 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -4,8 +4,11 @@ * OMAP2 I/O mapping code * * Copyright (C) 2005 Nokia Corporation - * Author: Juha Yrjölä <juha.yrjola@nokia.com> - * Updated map desc to add 2430 support : <x0khasim@ti.com> + * Copyright (C) 2007 Texas Instruments + * + * Author: + * Juha Yrjola <juha.yrjola@nokia.com> + * Syed Khasim <x0khasim@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -15,27 +18,34 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/tlb.h> -#include <asm/io.h> #include <asm/mach/map.h> #include <mach/mux.h> #include <mach/omapfb.h> +#include <mach/sram.h> + +#include "memory.h" + +#include "clock.h" + +#include <mach/powerdomain.h> + +#include "powerdomains.h" -extern void omap_sram_init(void); -extern int omap2_clk_init(void); -extern void omap2_check_revision(void); -extern void omap2_init_memory(void); -extern void gpmc_init(void); -extern void omapfb_reserve_sdram(void); +#include <mach/clockdomain.h> +#include "clockdomains.h" /* * The machine specific code may provide the extra mapping besides the * default mapping provided here. */ -static struct map_desc omap2_io_desc[] __initdata = { + +#ifdef CONFIG_ARCH_OMAP24XX +static struct map_desc omap24xx_io_desc[] __initdata = { { .virtual = L3_24XX_VIRT, .pfn = __phys_to_pfn(L3_24XX_PHYS), @@ -43,12 +53,39 @@ static struct map_desc omap2_io_desc[] __initdata = { .type = MT_DEVICE }, { - .virtual = L4_24XX_VIRT, - .pfn = __phys_to_pfn(L4_24XX_PHYS), - .length = L4_24XX_SIZE, - .type = MT_DEVICE + .virtual = L4_24XX_VIRT, + .pfn = __phys_to_pfn(L4_24XX_PHYS), + .length = L4_24XX_SIZE, + .type = MT_DEVICE }, +}; + +#ifdef CONFIG_ARCH_OMAP2420 +static struct map_desc omap242x_io_desc[] __initdata = { + { + .virtual = DSP_MEM_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), + .length = DSP_MEM_24XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = DSP_IPI_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), + .length = DSP_IPI_24XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = DSP_MMU_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), + .length = DSP_MMU_24XX_SIZE, + .type = MT_DEVICE + }, +}; + +#endif + #ifdef CONFIG_ARCH_OMAP2430 +static struct map_desc omap243x_io_desc[] __initdata = { { .virtual = L4_WK_243X_VIRT, .pfn = __phys_to_pfn(L4_WK_243X_PHYS), @@ -61,30 +98,90 @@ static struct map_desc omap2_io_desc[] __initdata = { .length = OMAP243X_GPMC_SIZE, .type = MT_DEVICE }, + { + .virtual = OMAP243X_SDRC_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS), + .length = OMAP243X_SDRC_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP243X_SMS_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS), + .length = OMAP243X_SMS_SIZE, + .type = MT_DEVICE + }, +}; +#endif #endif + +#ifdef CONFIG_ARCH_OMAP34XX +static struct map_desc omap34xx_io_desc[] __initdata = { { - .virtual = DSP_MEM_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), - .length = DSP_MEM_24XX_SIZE, + .virtual = L3_34XX_VIRT, + .pfn = __phys_to_pfn(L3_34XX_PHYS), + .length = L3_34XX_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_IPI_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), - .length = DSP_IPI_24XX_SIZE, + .virtual = L4_34XX_VIRT, + .pfn = __phys_to_pfn(L4_34XX_PHYS), + .length = L4_34XX_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_MMU_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), - .length = DSP_MMU_24XX_SIZE, + .virtual = L4_WK_34XX_VIRT, + .pfn = __phys_to_pfn(L4_WK_34XX_PHYS), + .length = L4_WK_34XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP34XX_GPMC_VIRT, + .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), + .length = OMAP34XX_GPMC_SIZE, .type = MT_DEVICE - } + }, + { + .virtual = OMAP343X_SMS_VIRT, + .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS), + .length = OMAP343X_SMS_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP343X_SDRC_VIRT, + .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS), + .length = OMAP343X_SDRC_SIZE, + .type = MT_DEVICE + }, + { + .virtual = L4_PER_34XX_VIRT, + .pfn = __phys_to_pfn(L4_PER_34XX_PHYS), + .length = L4_PER_34XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = L4_EMU_34XX_VIRT, + .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS), + .length = L4_EMU_34XX_SIZE, + .type = MT_DEVICE + }, }; +#endif void __init omap2_map_common_io(void) { - iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc)); +#if defined(CONFIG_ARCH_OMAP2420) + iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); + iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); +#endif + +#if defined(CONFIG_ARCH_OMAP2430) + iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); + iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); +#endif + +#if defined(CONFIG_ARCH_OMAP34XX) + iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); +#endif /* Normally devicemaps_init() would flush caches and tlb after * mdesc->map_io(), but we must also do it here because of the CPU @@ -101,12 +198,9 @@ void __init omap2_map_common_io(void) void __init omap2_init_common_hw(void) { omap2_mux_init(); + pwrdm_init(powerdomains_omap); + clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); -/* - * Need to Fix this for 2430 - */ -#ifndef CONFIG_ARCH_OMAP2430 omap2_init_memory(); -#endif gpmc_init(); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 9ef15b31d8f..c40fc378a25 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -13,17 +13,23 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/mach/irq.h> -#include <asm/irq.h> -#include <asm/io.h> -#define INTC_REVISION 0x0000 -#define INTC_SYSCONFIG 0x0010 -#define INTC_SYSSTATUS 0x0014 -#define INTC_CONTROL 0x0048 -#define INTC_MIR_CLEAR0 0x0088 -#define INTC_MIR_SET0 0x008c + +/* selected INTC register offsets */ + +#define INTC_REVISION 0x0000 +#define INTC_SYSCONFIG 0x0010 +#define INTC_SYSSTATUS 0x0014 +#define INTC_CONTROL 0x0048 +#define INTC_MIR_CLEAR0 0x0088 +#define INTC_MIR_SET0 0x008c +#define INTC_PENDING_IRQ0 0x0098 + +/* Number of IRQ state bits in each MIR register */ +#define IRQ_BITS_PER_REG 32 /* * OMAP2 has a number of different interrupt controllers, each interrupt @@ -32,48 +38,50 @@ * for each bank.. when in doubt, consult the TRM. */ static struct omap_irq_bank { - unsigned long base_reg; + void __iomem *base_reg; unsigned int nr_irqs; } __attribute__ ((aligned(4))) irq_banks[] = { { /* MPU INTC */ - .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), + .base_reg = 0, .nr_irqs = 96, - }, { - /* XXX: DSP INTC */ - } + }, }; +/* INTC bank register get/set */ + +static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) +{ + __raw_writel(val, bank->base_reg + reg); +} + +static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg) +{ + return __raw_readl(bank->base_reg + reg); +} + /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(unsigned int irq) { - __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); + intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); } static void omap_mask_irq(unsigned int irq) { - int offset = (irq >> 5) << 5; + int offset = irq & (~(IRQ_BITS_PER_REG - 1)); - if (irq >= 64) { - irq %= 64; - } else if (irq >= 32) { - irq %= 32; - } + irq &= (IRQ_BITS_PER_REG - 1); - __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); + intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); } static void omap_unmask_irq(unsigned int irq) { - int offset = (irq >> 5) << 5; + int offset = irq & (~(IRQ_BITS_PER_REG - 1)); - if (irq >= 64) { - irq %= 64; - } else if (irq >= 32) { - irq %= 32; - } + irq &= (IRQ_BITS_PER_REG - 1); - __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); + intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); } static void omap_mask_ack_irq(unsigned int irq) @@ -93,45 +101,46 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) { unsigned long tmp; - tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; - printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " + tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; + printk(KERN_INFO "IRQ: Found an INTC at 0x%p " "(revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); - tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); + tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ - __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); + intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG); - while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) + while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; /* Enable autoidle */ - __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); + intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG); } void __init omap_init_irq(void) { - unsigned long nr_irqs = 0; + unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i; for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { struct omap_irq_bank *bank = irq_banks + i; - /* XXX */ - if (!bank->base_reg) - continue; + if (cpu_is_omap24xx()) + bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE); + else if (cpu_is_omap34xx()) + bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE); omap_irq_bank_init_one(bank); - nr_irqs += bank->nr_irqs; + nr_of_irqs += bank->nr_irqs; nr_banks++; } printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n", - nr_irqs, nr_banks, nr_banks > 1 ? "s" : ""); + nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); - for (i = 0; i < nr_irqs; i++) { + for (i = 0; i < nr_of_irqs; i++) { set_irq_chip(i, &omap_irq_chip); set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index a480b96948e..32b7af3c610 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -14,9 +14,9 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/mailbox.h> #include <mach/irqs.h> -#include <asm/io.h> #define MAILBOX_REVISION 0x00 #define MAILBOX_SYSCONFIG 0x10 diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b261f1f80b5..cae3ebe249b 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = { .disable = omap_mcbsp_clk_disable, }, }, + { + .clk = { + .name = "mcbsp_clk", + .id = 3, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 4, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 5, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, }; #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) @@ -117,25 +141,14 @@ static void omap2_mcbsp_request(unsigned int id) omap2_mcbsp2_mux_setup(); } -static int omap2_mcbsp_check(unsigned int id) -{ - if (id > OMAP_MAX_MCBSP_COUNT - 1) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); - return -ENODEV; - } - return 0; -} - static struct omap_mcbsp_ops omap2_mcbsp_ops = { .request = omap2_mcbsp_request, - .check = omap2_mcbsp_check, }; -#ifdef CONFIG_ARCH_OMAP24XX -static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { +#ifdef CONFIG_ARCH_OMAP2420 +static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { { .phys_base = OMAP24XX_MCBSP1_BASE, - .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, .rx_irq = INT_24XX_MCBSP1_IRQ_RX, @@ -145,7 +158,6 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { }, { .phys_base = OMAP24XX_MCBSP2_BASE, - .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, .rx_irq = INT_24XX_MCBSP2_IRQ_RX, @@ -154,17 +166,70 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { .clk_name = "mcbsp_clk", }, }; -#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) +#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) #else -#define omap24xx_mcbsp_pdata NULL -#define OMAP24XX_MCBSP_PDATA_SZ 0 +#define omap2420_mcbsp_pdata NULL +#define OMAP2420_MCBSP_PDATA_SZ 0 +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { + { + .phys_base = OMAP24XX_MCBSP1_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, + .rx_irq = INT_24XX_MCBSP1_IRQ_RX, + .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP24XX_MCBSP2_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, + .rx_irq = INT_24XX_MCBSP2_IRQ_RX, + .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP3_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP4_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP5_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, + .rx_irq = INT_24XX_MCBSP5_IRQ_RX, + .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, +}; +#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) +#else +#define omap2430_mcbsp_pdata NULL +#define OMAP2430_MCBSP_PDATA_SZ 0 #endif #ifdef CONFIG_ARCH_OMAP34XX static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { { .phys_base = OMAP34XX_MCBSP1_BASE, - .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, .rx_irq = INT_24XX_MCBSP1_IRQ_RX, @@ -174,7 +239,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { }, { .phys_base = OMAP34XX_MCBSP2_BASE, - .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, .rx_irq = INT_24XX_MCBSP2_IRQ_RX, @@ -182,6 +246,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .ops = &omap2_mcbsp_ops, .clk_name = "mcbsp_clk", }, + { + .phys_base = OMAP34XX_MCBSP3_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP4_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP5_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, + .rx_irq = INT_24XX_MCBSP5_IRQ_RX, + .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) #else @@ -189,7 +280,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { #define OMAP34XX_MCBSP_PDATA_SZ 0 #endif -int __init omap2_mcbsp_init(void) +static int __init omap2_mcbsp_init(void) { int i; @@ -199,10 +290,24 @@ int __init omap2_mcbsp_init(void) clk_register(&omap_mcbsp_clks[i].clk); } - if (cpu_is_omap24xx()) - omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, - OMAP24XX_MCBSP_PDATA_SZ); + if (cpu_is_omap2420()) + omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; + if (cpu_is_omap2430()) + omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; + if (cpu_is_omap34xx()) + omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; + + mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), + GFP_KERNEL); + if (!mcbsp_ptr) + return -ENOMEM; + if (cpu_is_omap2420()) + omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, + OMAP2420_MCBSP_PDATA_SZ); + if (cpu_is_omap2430()) + omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, + OMAP2430_MCBSP_PDATA_SZ); if (cpu_is_omap34xx()) omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, OMAP34XX_MCBSP_PDATA_SZ); diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index 6b49cc9cbdc..882c7022429 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -21,8 +21,7 @@ #include <linux/errno.h> #include <linux/delay.h> #include <linux/clk.h> - -#include <asm/io.h> +#include <linux/io.h> #include <mach/common.h> #include <mach/clock.h> @@ -102,6 +101,17 @@ u32 omap2_reprogram_sdrc(u32 level, u32 force) return prev; } +#if !defined(CONFIG_ARCH_OMAP2) +void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock) +{ +} +void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type) +{ +} +#endif + void omap2_init_memory_params(u32 force_lock_to_unlock_mode) { unsigned long dll_cnt; @@ -166,6 +176,9 @@ void __init omap2_init_memory(void) { u32 l; + if (!cpu_is_omap2420()) + return; + l = sms_read_reg(SMS_SYSCONFIG); l &= ~(0x3 << 3); l |= (0x2 << 3); diff --git a/arch/arm/mach-omap2/memory.h b/arch/arm/mach-omap2/memory.h index 9a280b50a89..bb3db80a7c4 100644 --- a/arch/arm/mach-omap2/memory.h +++ b/arch/arm/mach-omap2/memory.h @@ -14,6 +14,9 @@ * published by the Free Software Foundation. */ +#ifndef ARCH_ARM_MACH_OMAP2_MEMORY_H +#define ARCH_ARM_MACH_OMAP2_MEMORY_H + /* Memory timings */ #define M_DDR 1 #define M_LOCK_CTRL (1 << 2) @@ -34,3 +37,7 @@ extern u32 omap2_memory_get_fast_dll_ctrl(void); extern u32 omap2_memory_get_type(void); u32 omap2_dll_force_needed(void); u32 omap2_reprogram_sdrc(u32 level, u32 force); +void __init omap2_init_memory(void); +void __init gpmc_init(void); + +#endif diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 443d07fef7f..b1393673d95 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-omap2/mux.c * - * OMAP2 pin multiplexing configurations + * OMAP2 and OMAP3 pin multiplexing configurations * * Copyright (C) 2004 - 2008 Texas Instruments Inc. * Copyright (C) 2003 - 2008 Nokia Corporation @@ -25,10 +25,11 @@ */ #include <linux/module.h> #include <linux/init.h> -#include <asm/system.h> -#include <asm/io.h> +#include <linux/io.h> #include <linux/spinlock.h> +#include <asm/system.h> + #include <mach/control.h> #include <mach/mux.h> @@ -219,16 +220,222 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) #define OMAP24XX_PINS_SZ 0 #endif /* CONFIG_ARCH_OMAP24XX */ -#define OMAP24XX_PULL_ENA (1 << 3) -#define OMAP24XX_PULL_UP (1 << 4) +#ifdef CONFIG_ARCH_OMAP34XX +static struct pin_config __initdata_or_module omap34xx_pins[] = { +/* + * Name, reg-offset, + * mux-mode | [active-mode | off-mode] + */ + +/* 34xx I2C */ +MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) + +/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ +MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/ +MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 1*/ +MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 2*/ +MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 3*/ +MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */ +MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) + +/* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */ +MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) + +/* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */ +MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT) + +}; + +#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) + +#else +#define omap34xx_pins NULL +#define OMAP34XX_PINS_SZ 0 +#endif /* CONFIG_ARCH_OMAP34XX */ #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) -void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) +static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg) { u16 orig; u8 warn = 0, debug = 0; - orig = omap_ctrl_readb(cfg->mux_reg); + if (cpu_is_omap24xx()) + orig = omap_ctrl_readb(cfg->mux_reg); + else + orig = omap_ctrl_readw(cfg->mux_reg); #ifdef CONFIG_OMAP_MUX_DEBUG debug = cfg->debug; @@ -254,9 +461,9 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) spin_lock_irqsave(&mux_spin_lock, flags); reg |= cfg->mask & 0x7; if (cfg->pull_val) - reg |= OMAP24XX_PULL_ENA; + reg |= OMAP2_PULL_ENA; if (cfg->pu_pd_val) - reg |= OMAP24XX_PULL_UP; + reg |= OMAP2_PULL_UP; omap2_cfg_debug(cfg, reg); omap_ctrl_writeb(reg, cfg->mux_reg); spin_unlock_irqrestore(&mux_spin_lock, flags); @@ -264,7 +471,26 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) return 0; } #else -#define omap24xx_cfg_reg 0 +#define omap24xx_cfg_reg NULL +#endif + +#ifdef CONFIG_ARCH_OMAP34XX +static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg) +{ + static DEFINE_SPINLOCK(mux_spin_lock); + unsigned long flags; + u16 reg = 0; + + spin_lock_irqsave(&mux_spin_lock, flags); + reg |= cfg->mux_val; + omap2_cfg_debug(cfg, reg); + omap_ctrl_writew(reg, cfg->mux_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); + + return 0; +} +#else +#define omap34xx_cfg_reg NULL #endif int __init omap2_mux_init(void) @@ -273,6 +499,10 @@ int __init omap2_mux_init(void) arch_mux_cfg.pins = omap24xx_pins; arch_mux_cfg.size = OMAP24XX_PINS_SZ; arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; + } else if (cpu_is_omap34xx()) { + arch_mux_cfg.pins = omap34xx_pins; + arch_mux_cfg.size = OMAP34XX_PINS_SZ; + arch_mux_cfg.cfg_reg = omap34xx_cfg_reg; } return omap_mux_register(&arch_mux_cfg); diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 8671e1079ab..55361c16c9d 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -24,8 +24,8 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/atomic.h> #include <asm/mach/time.h> diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c new file mode 100644 index 00000000000..73e2971b175 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomain.c @@ -0,0 +1,1113 @@ +/* + * OMAP powerdomain control + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifdef CONFIG_OMAP_DEBUG_POWERDOMAIN +# define DEBUG +#endif + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/delay.h> +#include <linux/spinlock.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> + +#include <asm/atomic.h> + +#include "cm.h" +#include "cm-regbits-34xx.h" +#include "prm.h" +#include "prm-regbits-34xx.h" + +#include <mach/cpu.h> +#include <mach/powerdomain.h> +#include <mach/clockdomain.h> + +/* pwrdm_list contains all registered struct powerdomains */ +static LIST_HEAD(pwrdm_list); + +/* + * pwrdm_rwlock protects pwrdm_list add and del ops - also reused to + * protect pwrdm_clkdms[] during clkdm add/del ops + */ +static DEFINE_RWLOCK(pwrdm_rwlock); + + +/* Private functions */ + +static u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +static struct powerdomain *_pwrdm_lookup(const char *name) +{ + struct powerdomain *pwrdm, *temp_pwrdm; + + pwrdm = NULL; + + list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { + if (!strcmp(name, temp_pwrdm->name)) { + pwrdm = temp_pwrdm; + break; + } + } + + return pwrdm; +} + +/* _pwrdm_deps_lookup - look up the specified powerdomain in a pwrdm list */ +static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, + struct pwrdm_dep *deps) +{ + struct pwrdm_dep *pd; + + if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) + return ERR_PTR(-EINVAL); + + for (pd = deps; pd; pd++) { + + if (!omap_chip_is(pd->omap_chip)) + continue; + + if (!pd->pwrdm && pd->pwrdm_name) + pd->pwrdm = pwrdm_lookup(pd->pwrdm_name); + + if (pd->pwrdm == pwrdm) + break; + + } + + if (!pd) + return ERR_PTR(-ENOENT); + + return pd->pwrdm; +} + + +/* Public functions */ + +/** + * pwrdm_init - set up the powerdomain layer + * + * Loop through the list of powerdomains, registering all that are + * available on the current CPU. If pwrdm_list is supplied and not + * null, all of the referenced powerdomains will be registered. No + * return value. + */ +void pwrdm_init(struct powerdomain **pwrdm_list) +{ + struct powerdomain **p = NULL; + + if (pwrdm_list) + for (p = pwrdm_list; *p; p++) + pwrdm_register(*p); +} + +/** + * pwrdm_register - register a powerdomain + * @pwrdm: struct powerdomain * to register + * + * Adds a powerdomain to the internal powerdomain list. Returns + * -EINVAL if given a null pointer, -EEXIST if a powerdomain is + * already registered by the provided name, or 0 upon success. + */ +int pwrdm_register(struct powerdomain *pwrdm) +{ + unsigned long flags; + int ret = -EINVAL; + + if (!pwrdm) + return -EINVAL; + + if (!omap_chip_is(pwrdm->omap_chip)) + return -EINVAL; + + write_lock_irqsave(&pwrdm_rwlock, flags); + if (_pwrdm_lookup(pwrdm->name)) { + ret = -EEXIST; + goto pr_unlock; + } + + list_add(&pwrdm->node, &pwrdm_list); + + pr_debug("powerdomain: registered %s\n", pwrdm->name); + ret = 0; + +pr_unlock: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_unregister - unregister a powerdomain + * @pwrdm: struct powerdomain * to unregister + * + * Removes a powerdomain from the internal powerdomain list. Returns + * -EINVAL if pwrdm argument is NULL. + */ +int pwrdm_unregister(struct powerdomain *pwrdm) +{ + unsigned long flags; + + if (!pwrdm) + return -EINVAL; + + write_lock_irqsave(&pwrdm_rwlock, flags); + list_del(&pwrdm->node); + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + pr_debug("powerdomain: unregistered %s\n", pwrdm->name); + + return 0; +} + +/** + * pwrdm_lookup - look up a powerdomain by name, return a pointer + * @name: name of powerdomain + * + * Find a registered powerdomain by its name. Returns a pointer to the + * struct powerdomain if found, or NULL otherwise. + */ +struct powerdomain *pwrdm_lookup(const char *name) +{ + struct powerdomain *pwrdm; + unsigned long flags; + + if (!name) + return NULL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + pwrdm = _pwrdm_lookup(name); + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return pwrdm; +} + +/** + * pwrdm_for_each - call function on each registered clockdomain + * @fn: callback function * + * + * Call the supplied function for each registered powerdomain. The + * callback function can return anything but 0 to bail out early from + * the iterator. The callback function is called with the pwrdm_rwlock + * held for reading, so no powerdomain structure manipulation + * functions should be called from the callback, although hardware + * powerdomain control functions are fine. Returns the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure; or -EINVAL if the function + * pointer is null. + */ +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) +{ + struct powerdomain *temp_pwrdm; + unsigned long flags; + int ret = 0; + + if (!fn) + return -EINVAL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { + ret = (*fn)(temp_pwrdm); + if (ret) + break; + } + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_add_clkdm - add a clockdomain to a powerdomain + * @pwrdm: struct powerdomain * to add the clockdomain to + * @clkdm: struct clockdomain * to associate with a powerdomain + * + * Associate the clockdomain 'clkdm' with a powerdomain 'pwrdm'. This + * enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if + * presented with invalid pointers; -ENOMEM if memory could not be allocated; + * or 0 upon success. + */ +int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) +{ + unsigned long flags; + int i; + int ret = -EINVAL; + + if (!pwrdm || !clkdm) + return -EINVAL; + + pr_debug("powerdomain: associating clockdomain %s with powerdomain " + "%s\n", clkdm->name, pwrdm->name); + + write_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS; i++) { + if (!pwrdm->pwrdm_clkdms[i]) + break; +#ifdef DEBUG + if (pwrdm->pwrdm_clkdms[i] == clkdm) { + ret = -EINVAL; + goto pac_exit; + } +#endif + } + + if (i == PWRDM_MAX_CLKDMS) { + pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for " + "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name); + WARN_ON(1); + ret = -ENOMEM; + goto pac_exit; + } + + pwrdm->pwrdm_clkdms[i] = clkdm; + + ret = 0; + +pac_exit: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_del_clkdm - remove a clockdomain from a powerdomain + * @pwrdm: struct powerdomain * to add the clockdomain to + * @clkdm: struct clockdomain * to associate with a powerdomain + * + * Dissociate the clockdomain 'clkdm' from the powerdomain + * 'pwrdm'. Returns -EINVAL if presented with invalid pointers; + * -ENOENT if the clkdm was not associated with the powerdomain, or 0 + * upon success. + */ +int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) +{ + unsigned long flags; + int ret = -EINVAL; + int i; + + if (!pwrdm || !clkdm) + return -EINVAL; + + pr_debug("powerdomain: dissociating clockdomain %s from powerdomain " + "%s\n", clkdm->name, pwrdm->name); + + write_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS; i++) + if (pwrdm->pwrdm_clkdms[i] == clkdm) + break; + + if (i == PWRDM_MAX_CLKDMS) { + pr_debug("powerdomain: clkdm %s not associated with pwrdm " + "%s ?!\n", clkdm->name, pwrdm->name); + ret = -ENOENT; + goto pdc_exit; + } + + pwrdm->pwrdm_clkdms[i] = NULL; + + ret = 0; + +pdc_exit: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm + * @pwrdm: struct powerdomain * to iterate over + * @fn: callback function * + * + * Call the supplied function for each clockdomain in the powerdomain + * 'pwrdm'. The callback function can return anything but 0 to bail + * out early from the iterator. The callback function is called with + * the pwrdm_rwlock held for reading, so no powerdomain structure + * manipulation functions should be called from the callback, although + * hardware powerdomain control functions are fine. Returns -EINVAL + * if presented with invalid pointers; or passes along the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure. + */ +int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, + int (*fn)(struct powerdomain *pwrdm, + struct clockdomain *clkdm)) +{ + unsigned long flags; + int ret = 0; + int i; + + if (!fn) + return -EINVAL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++) + ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]); + + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + + +/** + * pwrdm_add_wkdep - add a wakeup dependency from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * When the powerdomain represented by pwrdm2 wakes up (due to an + * interrupt), wake up pwrdm1. Implemented in hardware on the OMAP, + * this feature is designed to reduce wakeup latency of the dependent + * powerdomain. Returns -EINVAL if presented with invalid powerdomain + * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or + * 0 upon success. + */ +int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: hardware will wake up %s when %s wakes up\n", + pwrdm1->name, pwrdm2->name); + + prm_set_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, PM_WKDEP); + + return 0; +} + +/** + * pwrdm_del_wkdep - remove a wakeup dependency from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * Remove a wakeup dependency that causes pwrdm1 to wake up when pwrdm2 + * wakes up. Returns -EINVAL if presented with invalid powerdomain + * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or + * 0 upon success. + */ +int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: hardware will no longer wake up %s after %s " + "wakes up\n", pwrdm1->name, pwrdm2->name); + + prm_clear_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, PM_WKDEP); + + return 0; +} + +/** + * pwrdm_read_wkdep - read wakeup dependency state from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * Return 1 if a hardware wakeup dependency exists wherein pwrdm1 will be + * awoken when pwrdm2 wakes up; 0 if dependency is not set; -EINVAL + * if either powerdomain pointer is invalid; or -ENOENT if the hardware + * is incapable. + * + * REVISIT: Currently this function only represents software-controllable + * wakeup dependencies. Wakeup dependencies fixed in hardware are not + * yet handled here. + */ +int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + return prm_read_mod_bits_shift(pwrdm1->prcm_offs, PM_WKDEP, + (1 << pwrdm2->dep_bit)); +} + +/** + * pwrdm_add_sleepdep - add a sleep dependency from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Prevent pwrdm1 from automatically going inactive (and then to + * retention or off) if pwrdm2 is still active. Returns -EINVAL if + * presented with invalid powerdomain pointers or called on a machine + * that does not support software-configurable hardware sleep dependencies, + * -ENOENT if the specified dependency cannot be set in hardware, or + * 0 upon success. + */ +int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: will prevent %s from sleeping if %s is active\n", + pwrdm1->name, pwrdm2->name); + + cm_set_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP); + + return 0; +} + +/** + * pwrdm_del_sleepdep - remove a sleep dependency from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Allow pwrdm1 to automatically go inactive (and then to retention or + * off), independent of the activity state of pwrdm2. Returns -EINVAL + * if presented with invalid powerdomain pointers or called on a machine + * that does not support software-configurable hardware sleep dependencies, + * -ENOENT if the specified dependency cannot be cleared in hardware, or + * 0 upon success. + */ +int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: will no longer prevent %s from sleeping if " + "%s is active\n", pwrdm1->name, pwrdm2->name); + + cm_clear_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP); + + return 0; +} + +/** + * pwrdm_read_sleepdep - read sleep dependency state from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Return 1 if a hardware sleep dependency exists wherein pwrdm1 will + * not be allowed to automatically go inactive if pwrdm2 is active; + * 0 if pwrdm1's automatic power state inactivity transition is independent + * of pwrdm2's; -EINVAL if either powerdomain pointer is invalid or called + * on a machine that does not support software-configurable hardware sleep + * dependencies; or -ENOENT if the hardware is incapable. + * + * REVISIT: Currently this function only represents software-controllable + * sleep dependencies. Sleep dependencies fixed in hardware are not + * yet handled here. + */ +int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + return prm_read_mod_bits_shift(pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP, + (1 << pwrdm2->dep_bit)); +} + +/** + * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain + * @pwrdm: struct powerdomain * + * + * Return the number of controllable memory banks in powerdomain pwrdm, + * starting with 1. Returns -EINVAL if the powerdomain pointer is null. + */ +int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return pwrdm->banks; +} + +/** + * pwrdm_set_next_pwrst - set next powerdomain power state + * @pwrdm: struct powerdomain * to set + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the powerdomain pwrdm's next power state to pwrst. The powerdomain + * may not enter this state immediately if the preconditions for this state + * have not been satisfied. Returns -EINVAL if the powerdomain pointer is + * null or if the power state is invalid for the powerdomin, or returns 0 + * upon success. + */ +int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->pwrsts & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next powerstate for %s to %0x\n", + pwrdm->name, pwrst); + + prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_read_next_pwrst - get next powerdomain power state + * @pwrdm: struct powerdomain * to get power state + * + * Return the powerdomain pwrdm's next power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the next power state + * upon success. + */ +int pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); +} + +/** + * pwrdm_read_pwrst - get current powerdomain power state + * @pwrdm: struct powerdomain * to get power state + * + * Return the powerdomain pwrdm's current power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the current power state + * upon success. + */ +int pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, + OMAP_POWERSTATEST_MASK); +} + +/** + * pwrdm_read_prev_pwrst - get previous powerdomain power state + * @pwrdm: struct powerdomain * to get previous power state + * + * Return the powerdomain pwrdm's previous power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the previous power state + * upon success. + */ +int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, + OMAP3430_LASTPOWERSTATEENTERED_MASK); +} + +/** + * pwrdm_set_logic_retst - set powerdomain logic power state upon retention + * @pwrdm: struct powerdomain * to set + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that the logic portion of the powerdomain + * pwrdm will enter when the powerdomain enters retention. This will + * be either RETENTION or OFF, if supported. Returns -EINVAL if the + * powerdomain pointer is null or the target power state is not not + * supported, or returns 0 upon success. + */ +int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n", + pwrdm->name, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE, + (pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_set_mem_onst - set memory power state while powerdomain ON + * @pwrdm: struct powerdomain * to set + * @bank: memory bank number to set (0-3) + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that memory bank x of the powerdomain + * pwrdm will enter when the powerdomain enters the ON state. Bank + * will be a number from 0 to 3, and represents different types of + * memory, depending on the powerdomain. Returns -EINVAL if the + * powerdomain pointer is null or the target power state is not not + * supported for this memory bank, -EEXIST if the target memory bank + * does not exist or is not controllable, or returns 0 upon success. + */ +int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK; + break; + case 1: + m = OMAP3430_L1FLATMEMONSTATE_MASK; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK; + break; + case 3: + m = OMAP3430_L2FLATMEMONSTATE_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_set_mem_retst - set memory power state while powerdomain in RET + * @pwrdm: struct powerdomain * to set + * @bank: memory bank number to set (0-3) + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that memory bank x of the powerdomain + * pwrdm will enter when the powerdomain enters the RETENTION state. + * Bank will be a number from 0 to 3, and represents different types + * of memory, depending on the powerdomain. pwrst will be either + * RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain + * pointer is null or the target power state is not not supported for + * this memory bank, -EEXIST if the target memory bank does not exist + * or is not controllable, or returns 0 upon success. + */ +int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATRETSTATE; + break; + case 1: + m = OMAP3430_L1FLATMEMRETSTATE; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATRETSTATE; + break; + case 3: + m = OMAP3430_L2FLATMEMRETSTATE; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state + * @pwrdm: struct powerdomain * to get current logic retention power state + * + * Return the current power state that the logic portion of + * powerdomain pwrdm will enter + * Returns -EINVAL if the powerdomain pointer is null or returns the + * current logic retention power state upon success. + */ +int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, + OMAP3430_LOGICSTATEST); +} + +/** + * pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state + * @pwrdm: struct powerdomain * to get previous logic power state + * + * Return the powerdomain pwrdm's logic power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the previous logic + * power state upon success. + */ +int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED); +} + +/** + * pwrdm_read_mem_pwrst - get current memory bank power state + * @pwrdm: struct powerdomain * to get current memory bank power state + * @bank: memory bank number (0-3) + * + * Return the powerdomain pwrdm's current memory power state for bank + * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if + * the target memory bank does not exist or is not controllable, or + * returns the current memory power state upon success. + */ +int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK; + break; + case 1: + m = OMAP3430_L1FLATMEMSTATEST_MASK; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK; + break; + case 3: + m = OMAP3430_L2FLATMEMSTATEST_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, m); +} + +/** + * pwrdm_read_prev_mem_pwrst - get previous memory bank power state + * @pwrdm: struct powerdomain * to get previous memory bank power state + * @bank: memory bank number (0-3) + * + * Return the powerdomain pwrdm's previous memory power state for bank + * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if + * the target memory bank does not exist or is not controllable, or + * returns the previous memory power state upon success. + */ +int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_LASTMEM1STATEENTERED_MASK; + break; + case 1: + m = OMAP3430_LASTMEM2STATEENTERED_MASK; + break; + case 2: + m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; + break; + case 3: + m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, m); +} + +/** + * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm + * @pwrdm: struct powerdomain * to clear + * + * Clear the powerdomain's previous power state register. Clears the + * entire register, including logic and memory bank previous power states. + * Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon + * success. + */ +int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + /* + * XXX should get the powerdomain's current state here; + * warn & fail if it is not ON. + */ + + pr_debug("powerdomain: clearing previous power state reg for %s\n", + pwrdm->name); + + prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); + + return 0; +} + +/** + * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm + * @pwrdm: struct powerdomain * + * + * Enable automatic context save-and-restore upon power state change + * for some devices in a powerdomain. Warning: this only affects a + * subset of devices in a powerdomain; check the TRM closely. Returns + * -EINVAL if the powerdomain pointer is null or if the powerdomain + * does not support automatic save-and-restore, or returns 0 upon + * success. + */ +int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) + return -EINVAL; + + pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", + pwrdm->name); + + prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm + * @pwrdm: struct powerdomain * + * + * Disable automatic context save-and-restore upon power state change + * for some devices in a powerdomain. Warning: this only affects a + * subset of devices in a powerdomain; check the TRM closely. Returns + * -EINVAL if the powerdomain pointer is null or if the powerdomain + * does not support automatic save-and-restore, or returns 0 upon + * success. + */ +int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) + return -EINVAL; + + pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", + pwrdm->name); + + prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0, + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR + * @pwrdm: struct powerdomain * + * + * Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore + * for some devices, or 0 if it does not. + */ +bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm) +{ + return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0; +} + +/** + * pwrdm_wait_transition - wait for powerdomain power transition to finish + * @pwrdm: struct powerdomain * to wait for + * + * If the powerdomain pwrdm is in the process of a state transition, + * spin until it completes the power transition, or until an iteration + * bailout value is reached. Returns -EINVAL if the powerdomain + * pointer is null, -EAGAIN if the bailout value was reached, or + * returns 0 upon success. + */ +int pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + if (!pwrdm) + return -EINVAL; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((prm_read_mod_reg(pwrdm->prcm_offs, PM_PWSTST) & + OMAP_INTRANSITION) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c >= PWRDM_TRANSITION_BAILOUT) { + printk(KERN_ERR "powerdomain: waited too long for " + "powerdomain %s to complete transition\n", pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + + diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h new file mode 100644 index 00000000000..1e151faebbd --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains.h @@ -0,0 +1,187 @@ +/* + * OMAP2/3 common powerdomain definitions + * + * Copyright (C) 2007-8 Texas Instruments, Inc. + * Copyright (C) 2007-8 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS + +/* + * This file contains all of the powerdomains that have some element + * of software control for the OMAP24xx and OMAP34XX chips. + * + * A few notes: + * + * This is not an exhaustive listing of powerdomains on the chips; only + * powerdomains that can be controlled in software. + * + * A useful validation rule for struct powerdomain: + * Any powerdomain referenced by a wkdep_srcs or sleepdep_srcs array + * must have a dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really + * just software-controllable dependencies. Non-software-controllable + * dependencies do exist, but they are not encoded below (yet). + * + * 24xx does not support programmable sleep dependencies (SLEEPDEP) + * + */ + +/* + * The names for the DSP/IVA2 powerdomains are confusing. + * + * Most OMAP chips have an on-board DSP. + * + * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its + * powerdomain is called the "DSP power domain." On the 2430, the + * on-board DSP is a 'C64 DSP, now called the IVA2 or IVA2.1. Its + * powerdomain is still called the "DSP power domain." On the 3430, + * the DSP is a 'C64 DSP like the 2430, also known as the IVA2; but + * its powerdomain is now called the "IVA2 power domain." + * + * The 2420 also has something called the IVA, which is a separate ARM + * core, and has nothing to do with the DSP/IVA2. + * + * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM + * address offset is different between the C55 and C64 DSPs. + * + * The overly-specific dep_bit names are due to a bit name collision + * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift + * value are the same for all powerdomains: 2 + */ + +/* + * XXX should dep_bit be a mask, so we can test to see if it is 0 as a + * sanity check? + * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "cm.h" + +/* OMAP2/3-common powerdomains and wakeup dependencies */ + +/* + * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP + * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE + * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE + */ +static struct pwrdm_dep gfx_sgx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430: CM_SLEEPDEP_CAM: MPU + * 3430ES1: CM_SLEEPDEP_GFX: MPU + * 3430ES2: CM_SLEEPDEP_SGX: MPU + */ +static struct pwrdm_dep cam_gfx_sleepdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +#include "powerdomains24xx.h" +#include "powerdomains34xx.h" + + +/* + * OMAP2/3 common powerdomains + */ + +/* + * The GFX powerdomain is not present on 3430ES2, but currently we do not + * have a macro to filter it out at compile-time. + */ +static struct powerdomain gfx_pwrdm = { + .name = "gfx_pwrdm", + .prcm_offs = GFX_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430ES1), + .wkdep_srcs = gfx_sgx_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain wkup_pwrdm = { + .name = "wkup_pwrdm", + .prcm_offs = WKUP_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), + .dep_bit = OMAP_EN_WKUP_SHIFT, +}; + + + +/* As powerdomains are added or removed above, this list must also be changed */ +static struct powerdomain *powerdomains_omap[] __initdata = { + + &gfx_pwrdm, + &wkup_pwrdm, + +#ifdef CONFIG_ARCH_OMAP24XX + &dsp_pwrdm, + &mpu_24xx_pwrdm, + &core_24xx_pwrdm, +#endif + +#ifdef CONFIG_ARCH_OMAP2430 + &mdm_pwrdm, +#endif + +#ifdef CONFIG_ARCH_OMAP34XX + &iva2_pwrdm, + &mpu_34xx_pwrdm, + &neon_pwrdm, + &core_34xx_pwrdm, + &cam_pwrdm, + &dss_pwrdm, + &per_pwrdm, + &emu_pwrdm, + &sgx_pwrdm, + &usbhost_pwrdm, +#endif + + NULL +}; + + +#endif diff --git a/arch/arm/mach-omap2/powerdomains24xx.h b/arch/arm/mach-omap2/powerdomains24xx.h new file mode 100644 index 00000000000..9f08dc3f7fd --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains24xx.h @@ -0,0 +1,200 @@ +/* + * OMAP24XX powerdomain definitions + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX + +/* + * N.B. If powerdomains are added or removed from this file, update + * the array in mach-omap2/powerdomains.h. + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "prm-regbits-24xx.h" +#include "cm.h" +#include "cm-regbits-24xx.h" + +/* 24XX powerdomains and dependencies */ + +#ifdef CONFIG_ARCH_OMAP24XX + + +/* Wakeup dependency source arrays */ + +/* + * 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP + * 2430 PM_WKDEP_MDM: same as above + */ +static struct pwrdm_dep dsp_mdm_24xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { NULL }, +}; + +/* + * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP + * 2430 adds MDM + */ +static struct pwrdm_dep mpu_24xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "dsp_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mdm_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + }, + { NULL }, +}; + +/* + * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP + * 2430 adds MDM + */ +static struct pwrdm_dep core_24xx_wkdeps[] = { + { + .pwrdm_name = "dsp_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "gfx_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mdm_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + }, + { NULL }, +}; + + +/* Powerdomains */ + +static struct powerdomain dsp_pwrdm = { + .name = "dsp_pwrdm", + .prcm_offs = OMAP24XX_DSP_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, + .wkdep_srcs = dsp_mdm_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain mpu_24xx_pwrdm = { + .name = "mpu_pwrdm", + .prcm_offs = MPU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .dep_bit = OMAP24XX_EN_MPU_SHIFT, + .wkdep_srcs = mpu_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain core_24xx_pwrdm = { + .name = "core_pwrdm", + .prcm_offs = CORE_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .wkdep_srcs = core_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .dep_bit = OMAP24XX_EN_CORE_SHIFT, + .banks = 3, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ + [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ + [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ + [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ + [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP24XX */ + + + +/* + * 2430-specific powerdomains + */ + +#ifdef CONFIG_ARCH_OMAP2430 + +/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ + +/* Another case of bit name collisions between several registers: EN_MDM */ +static struct powerdomain mdm_pwrdm = { + .name = "mdm_pwrdm", + .prcm_offs = OMAP2430_MDM_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), + .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT, + .wkdep_srcs = dsp_mdm_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP2430 */ + + +#endif diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h new file mode 100644 index 00000000000..f573f710839 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -0,0 +1,327 @@ +/* + * OMAP34XX powerdomain definitions + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX + +/* + * N.B. If powerdomains are added or removed from this file, update + * the array in mach-omap2/powerdomains.h. + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "prm-regbits-34xx.h" +#include "cm.h" +#include "cm-regbits-34xx.h" + +/* + * 34XX-specific powerdomains, dependencies + */ + +#ifdef CONFIG_ARCH_OMAP34XX + +/* + * 3430: PM_WKDEP_{PER,USBHOST}: CORE, IVA2, MPU, WKUP + * (USBHOST is ES2 only) + */ +static struct pwrdm_dep per_usbhost_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER + */ +static struct pwrdm_dep mpu_34xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "per_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER + */ +static struct pwrdm_dep iva2_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "per_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* 3430 PM_WKDEP_{CAM,DSS}: IVA2, MPU, WKUP */ +static struct pwrdm_dep cam_dss_wkdeps[] = { + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* 3430: PM_WKDEP_NEON: MPU */ +static struct pwrdm_dep neon_wkdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* Sleep dependency source arrays for 34xx-specific pwrdms - 34XX only */ + +/* + * 3430: CM_SLEEPDEP_{DSS,PER}: MPU, IVA + * 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA + */ +static struct pwrdm_dep dss_per_usbhost_sleepdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* + * Powerdomains + */ + +static struct powerdomain iva2_pwrdm = { + .name = "iva2_pwrdm", + .prcm_offs = OMAP3430_IVA2_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, + .wkdep_srcs = iva2_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 4, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, + [1] = PWRSTS_OFF_RET, + [2] = PWRSTS_OFF_RET, + [3] = PWRSTS_OFF_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + [1] = PWRDM_POWER_ON, + [2] = PWRSTS_OFF_ON, + [3] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain mpu_34xx_pwrdm = { + .name = "mpu_pwrdm", + .prcm_offs = MPU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_EN_MPU_SHIFT, + .wkdep_srcs = mpu_34xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_ON, + }, +}; + +/* No wkdeps or sleepdeps for 34xx core apparently */ +static struct powerdomain core_34xx_pwrdm = { + .name = "core_pwrdm", + .prcm_offs = CORE_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .pwrsts = PWRSTS_OFF_RET_ON, + .dep_bit = OMAP3430_EN_CORE_SHIFT, + .banks = 2, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ + [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ + [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ + }, +}; + +/* Another case of bit name collisions between several registers: EN_DSS */ +static struct powerdomain dss_pwrdm = { + .name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .prcm_offs = OMAP3430_DSS_MOD, + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT, + .wkdep_srcs = cam_dss_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain sgx_pwrdm = { + .name = "sgx_pwrdm", + .prcm_offs = OMAP3430ES2_SGX_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .wkdep_srcs = gfx_sgx_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + /* XXX This is accurate for 3430 SGX, but what about GFX? */ + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain cam_pwrdm = { + .name = "cam_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .prcm_offs = OMAP3430_CAM_MOD, + .wkdep_srcs = cam_dss_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain per_pwrdm = { + .name = "per_pwrdm", + .prcm_offs = OMAP3430_PER_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_EN_PER_SHIFT, + .wkdep_srcs = per_usbhost_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain emu_pwrdm = { + .name = "emu_pwrdm", + .prcm_offs = OMAP3430_EMU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct powerdomain neon_pwrdm = { + .name = "neon_pwrdm", + .prcm_offs = OMAP3430_NEON_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .wkdep_srcs = neon_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, +}; + +static struct powerdomain usbhost_pwrdm = { + .name = "usbhost_pwrdm", + .prcm_offs = OMAP3430ES2_USBHOST_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .wkdep_srcs = per_usbhost_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP34XX */ + + +#endif diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 54c32f48213..4a32822ff3f 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -312,7 +312,8 @@ #define OMAP3430_ST_GPT2 (1 << 3) /* CM_SLEEPDEP_PER, PM_WKDEP_IVA2, PM_WKDEP_MPU, PM_WKDEP_PER shared bits */ -#define OMAP3430_EN_CORE (1 << 0) +#define OMAP3430_EN_CORE_SHIFT 0 +#define OMAP3430_EN_CORE_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index c6d17a3378e..4002051c20b 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -29,8 +29,10 @@ #define OMAP24XX_WKUP1_EN (1 << 0) /* PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_DSP, PM_WKDEP_MDM shared bits */ -#define OMAP24XX_EN_MPU (1 << 1) -#define OMAP24XX_EN_CORE (1 << 0) +#define OMAP24XX_EN_MPU_SHIFT 1 +#define OMAP24XX_EN_MPU_MASK (1 << 1) +#define OMAP24XX_EN_CORE_SHIFT 0 +#define OMAP24XX_EN_CORE_MASK (1 << 0) /* * PM_PWSTCTRL_MPU, PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM @@ -140,8 +142,10 @@ /* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" instead */ /* PM_WKDEP_MPU specific bits */ -#define OMAP2430_PM_WKDEP_MPU_EN_MDM (1 << 5) -#define OMAP24XX_PM_WKDEP_MPU_EN_DSP (1 << 2) +#define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT 5 +#define OMAP2430_PM_WKDEP_MPU_EN_MDM_MASK (1 << 5) +#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT 2 +#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_MASK (1 << 2) /* PM_EVGENCTRL_MPU specific bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index b4686bc345c..5b5ecfe6c99 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -68,7 +68,8 @@ #define OMAP3430_VPINIDLE (1 << 0) /* PM_WKDEP_IVA2, PM_WKDEP_MPU shared bits */ -#define OMAP3430_EN_PER (1 << 7) +#define OMAP3430_EN_PER_SHIFT 7 +#define OMAP3430_EN_PER_MASK (1 << 7) /* PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE shared bits */ #define OMAP3430_MEMORYCHANGE (1 << 3) @@ -77,7 +78,7 @@ #define OMAP3430_LOGICSTATEST (1 << 2) /* PM_PREPWSTST_IVA2, PM_PREPWSTST_CORE shared bits */ -#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2) +#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2) /* * PM_PREPWSTST_IVA2, PM_PREPWSTST_MPU, PM_PREPWSTST_CORE, @@ -278,8 +279,10 @@ #define OMAP3430_EMULATION_MPU_RST (1 << 11) /* PM_WKDEP_MPU specific bits */ -#define OMAP3430_PM_WKDEP_MPU_EN_DSS (1 << 5) -#define OMAP3430_PM_WKDEP_MPU_EN_IVA2 (1 << 2) +#define OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT 5 +#define OMAP3430_PM_WKDEP_MPU_EN_DSS_MASK (1 << 5) +#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT 2 +#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_MASK (1 << 2) /* PM_EVGENCTRL_MPU */ #define OMAP3430_OFFLOADMODE_SHIFT 3 diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index bbf41fc8e9a..e4dc4b17881 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_PRM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) #else #define OMAP2420_PRM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) @@ -305,7 +305,8 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, * PM_WKDEP_PER */ -#define OMAP_EN_WKUP (1 << 4) +#define OMAP_EN_WKUP_SHIFT 4 +#define OMAP_EN_WKUP_MASK (1 << 4) /* * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index adc8a26a8fb..4dcf39c285b 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -3,7 +3,7 @@ * * OMAP2 serial support. * - * Copyright (C) 2005 Nokia Corporation + * Copyright (C) 2005-2008 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * * Based off of arch/arm/mach-omap/omap1/serial.c @@ -17,44 +17,39 @@ #include <linux/serial_8250.h> #include <linux/serial_reg.h> #include <linux/clk.h> - -#include <asm/io.h> +#include <linux/io.h> #include <mach/common.h> #include <mach/board.h> -static struct clk * uart1_ick = NULL; -static struct clk * uart1_fck = NULL; -static struct clk * uart2_ick = NULL; -static struct clk * uart2_fck = NULL; -static struct clk * uart3_ick = NULL; -static struct clk * uart3_fck = NULL; +static struct clk *uart_ick[OMAP_MAX_NR_PORTS]; +static struct clk *uart_fck[OMAP_MAX_NR_PORTS]; static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = 72, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = 73, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = 74, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { .flags = 0 } @@ -71,7 +66,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, int value) { offset <<= p->regshift; - __raw_writeb(value, (unsigned long)(p->membase + offset)); + __raw_writeb(value, p->membase + offset); } /* @@ -87,10 +82,27 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p) serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); } -void __init omap_serial_init() +void omap_serial_enable_clocks(int enable) +{ + int i; + for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { + if (uart_ick[i] && uart_fck[i]) { + if (enable) { + clk_enable(uart_ick[i]); + clk_enable(uart_fck[i]); + } else { + clk_disable(uart_ick[i]); + clk_disable(uart_fck[i]); + } + } + } +} + +void __init omap_serial_init(void) { int i; const struct omap_uart_config *info; + char name[16]; /* * Make sure the serial ports are muxed on at this point. @@ -98,8 +110,7 @@ void __init omap_serial_init() * if not needed. */ - info = omap_get_config(OMAP_TAG_UART, - struct omap_uart_config); + info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); if (info == NULL) return; @@ -108,58 +119,26 @@ void __init omap_serial_init() struct plat_serial8250_port *p = serial_platform_data + i; if (!(info->enabled_uarts & (1 << i))) { - p->membase = 0; + p->membase = NULL; p->mapbase = 0; continue; } - switch (i) { - case 0: - uart1_ick = clk_get(NULL, "uart1_ick"); - if (IS_ERR(uart1_ick)) - printk("Could not get uart1_ick\n"); - else { - clk_enable(uart1_ick); - } - - uart1_fck = clk_get(NULL, "uart1_fck"); - if (IS_ERR(uart1_fck)) - printk("Could not get uart1_fck\n"); - else { - clk_enable(uart1_fck); - } - break; - case 1: - uart2_ick = clk_get(NULL, "uart2_ick"); - if (IS_ERR(uart2_ick)) - printk("Could not get uart2_ick\n"); - else { - clk_enable(uart2_ick); - } - - uart2_fck = clk_get(NULL, "uart2_fck"); - if (IS_ERR(uart2_fck)) - printk("Could not get uart2_fck\n"); - else { - clk_enable(uart2_fck); - } - break; - case 2: - uart3_ick = clk_get(NULL, "uart3_ick"); - if (IS_ERR(uart3_ick)) - printk("Could not get uart3_ick\n"); - else { - clk_enable(uart3_ick); - } - - uart3_fck = clk_get(NULL, "uart3_fck"); - if (IS_ERR(uart3_fck)) - printk("Could not get uart3_fck\n"); - else { - clk_enable(uart3_fck); - } - break; - } + sprintf(name, "uart%d_ick", i+1); + uart_ick[i] = clk_get(NULL, name); + if (IS_ERR(uart_ick[i])) { + printk(KERN_ERR "Could not get uart%d_ick\n", i+1); + uart_ick[i] = NULL; + } else + clk_enable(uart_ick[i]); + + sprintf(name, "uart%d_fck", i+1); + uart_fck[i] = clk_get(NULL, name); + if (IS_ERR(uart_fck[i])) { + printk(KERN_ERR "Could not get uart%d_fck\n", i+1); + uart_fck[i] = NULL; + } else + clk_enable(uart_fck[i]); omap_serial_reset(p); } diff --git a/arch/arm/mach-omap2/sleep.S b/arch/arm/mach-omap2/sleep24xx.S index 87a706fd5f8..43336b93b21 100644 --- a/arch/arm/mach-omap2/sleep.S +++ b/arch/arm/mach-omap2/sleep24xx.S @@ -5,6 +5,10 @@ * Texas Instruments, <www.ti.com> * Richard Woodruff <r-woodruff2@ti.com> * + * (C) Copyright 2006 Nokia Corporation + * Fixed idle loop sleep + * Igor Stoppa <igor.stoppa@nokia.com> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of @@ -26,6 +30,8 @@ #include <mach/io.h> #include <mach/pm.h> +#include <mach/omap24xx.h> + #include "sdrc.h" /* First address of reserved address space? apparently valid for OMAP2 & 3 */ @@ -52,15 +58,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz) .word . - omap24xx_idle_loop_suspend /* - * omap242x_cpu_suspend() - Forces OMAP into deep sleep state by completing + * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing * SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore * SDRC. * * Input: * R0 : DLL ctrl value pre-Sleep - * R1 : Processor+Revision - * 2420: 0x21 = 242xES1, 0x26 = 242xES2.2 - * 2430: 0x31 = 2430ES1, 0x32 = 2430ES2 + * R1 : SDRC_DLLA_CTRL + * R2 : SDRC_POWER * * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on * when we get called, but the DLL probably isn't. We will wait a bit more in @@ -80,15 +85,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz) */ ENTRY(omap24xx_cpu_suspend) stmfd sp!, {r0 - r12, lr} @ save registers on stack - mov r3, #0x0 @ clear for mrc call + mov r3, #0x0 @ clear for mcr call mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished nop nop - ldr r3, A_SDRC_POWER @ addr of sdrc power - ldr r4, [r3] @ value of sdrc power + ldr r4, [r2] @ read SDRC_POWER orr r4, r4, #0x40 @ enable self refresh on idle req mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) - str r4, [r3] @ make it so + str r4, [r2] @ make it so mov r2, #0 nop mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt @@ -97,14 +101,13 @@ loop: subs r5, r5, #0x1 @ awake, wait just a bit bne loop - /* The DPLL has on before we take the DDR out of self refresh */ + /* The DPLL has to be on before we take the DDR out of self refresh */ bic r4, r4, #0x40 @ now clear self refresh bit. - str r4, [r3] @ put vlaue back. + str r4, [r2] @ write to SDRC_POWER ldr r4, A_SDRC0 @ make a clock happen - ldr r4, [r4] + ldr r4, [r4] @ read A_SDRC0 nop @ start auto refresh only after clk ok movs r0, r0 @ see if DDR or SDR - ldrne r1, A_SDRC_DLLA_CTRL_S @ get addr of DLL ctrl strne r0, [r1] @ rewrite DLLA to force DLL reload addne r1, r1, #0x8 @ move to DLLB strne r0, [r1] @ rewrite DLLB to force DLL reload @@ -116,13 +119,8 @@ loop2: /* resume*/ ldmfd sp!, {r0 - r12, pc} @ restore regs and return -A_SDRC_POWER: - .word OMAP242X_SDRC_REGADDR(SDRC_POWER) A_SDRC0: .word A_SDRC0_V -A_SDRC_DLLA_CTRL_S: - .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL) ENTRY(omap24xx_cpu_suspend_sz) .word . - omap24xx_cpu_suspend - diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S new file mode 100644 index 00000000000..2c714613634 --- /dev/null +++ b/arch/arm/mach-omap2/sram34xx.S @@ -0,0 +1,179 @@ +/* + * linux/arch/arm/mach-omap3/sram.S + * + * Omap3 specific functions that need to be run in internal SRAM + * + * (C) Copyright 2007 + * Texas Instruments Inc. + * Rajendra Nayak <rnayak@ti.com> + * + * (C) Copyright 2004 + * Texas Instruments, <www.ti.com> + * Richard Woodruff <r-woodruff2@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <mach/hardware.h> + +#include <mach/io.h> + +#include "sdrc.h" +#include "cm.h" + + .text + +/* + * Change frequency of core dpll + * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla r2 = sdrc_actim_ctrlb r3 = M2 + */ +ENTRY(omap3_sram_configure_core_dpll) + stmfd sp!, {r1-r12, lr} @ store regs to stack + cmp r3, #0x2 + blne configure_sdrc + cmp r3, #0x2 + blne lock_dll + cmp r3, #0x1 + blne unlock_dll + bl sdram_in_selfrefresh @ put the SDRAM in self refresh + bl configure_core_dpll + bl enable_sdrc + cmp r3, #0x1 + blne wait_dll_unlock + cmp r3, #0x2 + blne wait_dll_lock + cmp r3, #0x1 + blne configure_sdrc + mov r0, #0 @ return value + ldmfd sp!, {r1-r12, pc} @ restore regs and return +unlock_dll: + ldr r4, omap3_sdrc_dlla_ctrl + ldr r5, [r4] + orr r5, r5, #0x4 + str r5, [r4] + bx lr +lock_dll: + ldr r4, omap3_sdrc_dlla_ctrl + ldr r5, [r4] + bic r5, r5, #0x4 + str r5, [r4] + bx lr +sdram_in_selfrefresh: + mov r5, #0x0 @ Move 0 to R5 + mcr p15, 0, r5, c7, c10, 5 @ memory barrier + ldr r4, omap3_sdrc_power @ read the SDRC_POWER register + ldr r5, [r4] @ read the contents of SDRC_POWER + orr r5, r5, #0x40 @ enable self refresh on idle req + str r5, [r4] @ write back to SDRC_POWER register + ldr r4, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg + ldr r5, [r4] + bic r5, r5, #0x2 @ disable iclk bit for SRDC + str r5, [r4] +wait_sdrc_idle: + ldr r4, omap3_cm_idlest1_core + ldr r5, [r4] + and r5, r5, #0x2 @ check for SDRC idle + cmp r5, #2 + bne wait_sdrc_idle + bx lr +configure_core_dpll: + ldr r4, omap3_cm_clksel1_pll + ldr r5, [r4] + ldr r6, core_m2_mask_val @ modify m2 for core dpll + and r5, r5, r6 + orr r5, r5, r3, lsl #0x1B @ r3 contains the M2 val + str r5, [r4] + mov r5, #0x800 @ wait for the clock to stabilise + cmp r3, #2 + bne wait_clk_stable + bx lr +wait_clk_stable: + subs r5, r5, #1 + bne wait_clk_stable + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + bx lr +enable_sdrc: + ldr r4, omap3_cm_iclken1_core + ldr r5, [r4] + orr r5, r5, #0x2 @ enable iclk bit for SDRC + str r5, [r4] +wait_sdrc_idle1: + ldr r4, omap3_cm_idlest1_core + ldr r5, [r4] + and r5, r5, #0x2 + cmp r5, #0 + bne wait_sdrc_idle1 + ldr r4, omap3_sdrc_power + ldr r5, [r4] + bic r5, r5, #0x40 + str r5, [r4] + bx lr +wait_dll_lock: + ldr r4, omap3_sdrc_dlla_status + ldr r5, [r4] + and r5, r5, #0x4 + cmp r5, #0x4 + bne wait_dll_lock + bx lr +wait_dll_unlock: + ldr r4, omap3_sdrc_dlla_status + ldr r5, [r4] + and r5, r5, #0x4 + cmp r5, #0x0 + bne wait_dll_unlock + bx lr +configure_sdrc: + ldr r4, omap3_sdrc_rfr_ctrl + str r0, [r4] + ldr r4, omap3_sdrc_actim_ctrla + str r1, [r4] + ldr r4, omap3_sdrc_actim_ctrlb + str r2, [r4] + bx lr + +omap3_sdrc_power: + .word OMAP34XX_SDRC_REGADDR(SDRC_POWER) +omap3_cm_clksel1_pll: + .word OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1) +omap3_cm_idlest1_core: + .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST) +omap3_cm_iclken1_core: + .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1) +omap3_sdrc_rfr_ctrl: + .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0) +omap3_sdrc_actim_ctrla: + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) +omap3_sdrc_actim_ctrlb: + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) +omap3_sdrc_dlla_status: + .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) +omap3_sdrc_dlla_ctrl: + .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) +core_m2_mask_val: + .word 0x07FFFFFF + +ENTRY(omap3_sram_configure_core_dpll_sz) + .word . - omap3_sram_configure_core_dpll diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index ddcd41b15d1..f59a8d0e082 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -36,6 +36,12 @@ config MACH_TS209 Say 'Y' here if you want your kernel to support the QNAP TS-109/TS-209 platform. +config MACH_TERASTATION_PRO2 + bool "Buffalo Terastation Pro II/Live" + help + Say 'Y' here if you want your kernel to support the + Buffalo Terastation Pro II/Live platform. + config MACH_LINKSTATION_PRO bool "Buffalo Linkstation Pro/Live" select I2C_BOARDINFO @@ -44,6 +50,13 @@ config MACH_LINKSTATION_PRO Buffalo Linkstation Pro/Live platform. Both v1 and v2 devices are supported. +config MACH_LINKSTATION_MINI + bool "Buffalo Linkstation Mini" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + Buffalo Linkstation Mini platform. + config MACH_TS409 bool "QNAP TS-409" help @@ -68,6 +81,13 @@ config MACH_MV2120 Say 'Y' here if you want your kernel to support the HP Media Vault mv2120 or mv5100. +config MACH_EDMINI_V2 + bool "LaCie Ethernet Disk mini V2" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + LaCie Ethernet Disk mini V2. + config MACH_MSS2 bool "Maxtor Shared Storage II" help @@ -92,6 +112,12 @@ config MACH_RD88F5181L_FXO Say 'Y' here if you want your kernel to support the Marvell Orion-VoIP FXO (88F5181L) RD. +config MACH_RD88F6183AP_GE + bool "Marvell Orion-1-90 AP GE Reference Design" + help + Say 'Y' here if you want your kernel to support the + Marvell Orion-1-90 (88F6183) AP GE RD. + endmenu endif diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile index fcc48a8864f..3d4a1bc1235 100644 --- a/arch/arm/mach-orion5x/Makefile +++ b/arch/arm/mach-orion5x/Makefile @@ -2,14 +2,18 @@ obj-y += common.o addr-map.o pci.o gpio.o irq.o mpp.o obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o +obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o +obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o obj-$(CONFIG_MACH_DNS323) += dns323-setup.o obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o +obj-$(CONFIG_MACH_EDMINI_V2) += edmini_v2-setup.o obj-$(CONFIG_MACH_MSS2) += mss2-setup.o obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o +obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index bea37972120..719957e05d9 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -13,8 +13,8 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/mbus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include "common.h" /* diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 7b11e552bc5..9625ef5975d 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -18,6 +18,7 @@ #include <linux/mv643xx_eth.h> #include <linux/mv643xx_i2c.h> #include <linux/ata_platform.h> +#include <linux/spi/orion_spi.h> #include <asm/page.h> #include <asm/setup.h> #include <asm/timex.h> @@ -146,7 +147,6 @@ void __init orion5x_ehci1_init(void) ****************************************************************************/ struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { .dram = &orion5x_mbus_dram_info, - .t_clk = ORION5X_TCLK, }; static struct resource orion5x_eth_shared_resources[] = { @@ -154,6 +154,10 @@ static struct resource orion5x_eth_shared_resources[] = { .start = ORION5X_ETH_PHYS_BASE + 0x2000, .end = ORION5X_ETH_PHYS_BASE + 0x3fff, .flags = IORESOURCE_MEM, + }, { + .start = IRQ_ORION5X_ETH_ERR, + .end = IRQ_ORION5X_ETH_ERR, + .flags = IORESOURCE_IRQ, }, }; @@ -163,7 +167,7 @@ static struct platform_device orion5x_eth_shared = { .dev = { .platform_data = &orion5x_eth_shared_data, }, - .num_resources = 1, + .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources), .resource = orion5x_eth_shared_resources, }; @@ -268,6 +272,38 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) /***************************************************************************** + * SPI + ****************************************************************************/ +static struct orion_spi_info orion5x_spi_plat_data = { + .tclk = 0, +}; + +static struct resource orion5x_spi_resources[] = { + { + .name = "spi base", + .start = SPI_PHYS_BASE, + .end = SPI_PHYS_BASE + 0x1f, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device orion5x_spi = { + .name = "orion_spi", + .id = 0, + .dev = { + .platform_data = &orion5x_spi_plat_data, + }, + .num_resources = ARRAY_SIZE(orion5x_spi_resources), + .resource = orion5x_spi_resources, +}; + +void __init orion5x_spi_init() +{ + platform_device_register(&orion5x_spi); +} + + +/***************************************************************************** * UART0 ****************************************************************************/ static struct plat_serial8250_port orion5x_uart0_data[] = { @@ -278,7 +314,7 @@ static struct plat_serial8250_port orion5x_uart0_data[] = { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = ORION5X_TCLK, + .uartclk = 0, }, { }, }; @@ -322,7 +358,7 @@ static struct plat_serial8250_port orion5x_uart1_data[] = { .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = ORION5X_TCLK, + .uartclk = 0, }, { }, }; @@ -455,9 +491,24 @@ void __init orion5x_xor_init(void) /***************************************************************************** * Time handling ****************************************************************************/ +int orion5x_tclk; + +int __init orion5x_find_tclk(void) +{ + u32 dev, rev; + + orion5x_pcie_id(&dev, &rev); + if (dev == MV88F6183_DEV_ID && + (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0) + return 133333333; + + return 166666667; +} + static void orion5x_timer_init(void) { - orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK); + orion5x_tclk = orion5x_find_tclk(); + orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk); } struct sys_timer orion5x_timer = { @@ -499,6 +550,12 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) } else { *dev_name = "MV88F5181(L)-Rev-Unsupported"; } + } else if (*dev == MV88F6183_DEV_ID) { + if (*rev == MV88F6183_REV_B0) { + *dev_name = "MV88F6183-Rev-B0"; + } else { + *dev_name = "MV88F6183-Rev-Unsupported"; + } } else { *dev_name = "Device-Unknown"; } @@ -510,7 +567,12 @@ void __init orion5x_init(void) u32 dev, rev; orion5x_id(&dev, &rev, &dev_name); - printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK); + printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk); + + orion5x_eth_shared_data.t_clk = orion5x_tclk; + orion5x_spi_plat_data.tclk = orion5x_tclk; + orion5x_uart0_data[0].uartclk = orion5x_tclk; + orion5x_uart1_data[0].uartclk = orion5x_tclk; /* * Setup Orion address map diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 0bd195551a2..1f8b2da676a 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -10,6 +10,7 @@ struct mv_sata_platform_data; void orion5x_map_io(void); void orion5x_init_irq(void); void orion5x_init(void); +extern int orion5x_tclk; extern struct sys_timer orion5x_timer; /* @@ -30,6 +31,7 @@ void orion5x_ehci1_init(void); void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data); void orion5x_i2c_init(void); void orion5x_sata_init(struct mv_sata_platform_data *sata_data); +void orion5x_spi_init(void); void orion5x_uart0_init(void); void orion5x_uart1_init(void); void orion5x_xor_init(void); diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index ff13e9060b1..d318bea2af9 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -285,7 +285,7 @@ subsys_initcall(db88f5281_pci_init); * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data db88f5281_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index b38c65ccfb1..3e66098340a 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -79,7 +79,7 @@ subsys_initcall(dns323_pci_init); */ static struct mv643xx_eth_platform_data dns323_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /**************************************************************************** diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c new file mode 100644 index 00000000000..b24ee0c2cd6 --- /dev/null +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c @@ -0,0 +1,262 @@ +/* + * arch/arm/mach-orion5x/edmini_v2-setup.c + * + * LaCie Ethernet Disk mini V2 Setup + * + * Copyright (C) 2008 Christopher Moore <moore@free.fr> + * Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/* + * TODO: add Orion USB device port init when kernel.org support is added. + * TODO: add flash write support: see below. + * TODO: add power-off support. + * TODO: add I2C EEPROM support. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/leds.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/i2c.h> +#include <linux/ata_platform.h> +#include <linux/gpio.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <mach/orion5x.h> +#include "common.h" +#include "mpp.h" + +/***************************************************************************** + * EDMINI_V2 Info + ****************************************************************************/ + +/* + * 512KB NOR flash Device bus boot chip select + */ + +#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000 +#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K + +/***************************************************************************** + * 512KB NOR Flash on BOOT Device + ****************************************************************************/ + +/* + * Currently the MTD code does not recognize the MX29LV400CBCT as a bottom + * -type device. This could cause risks of accidentally erasing critical + * flash sectors. We thus define a single, write-protected partition covering + * the whole flash. + * TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD + * code, break this into at least three partitions: 'u-boot code', 'u-boot + * environment' and 'whatever is left'. + */ + +static struct mtd_partition edmini_v2_partitions[] = { + { + .name = "Full512kb", + .size = 0x00080000, + .offset = 0x00000000, + .mask_flags = MTD_WRITEABLE, + }, +}; + +static struct physmap_flash_data edmini_v2_nor_flash_data = { + .width = 1, + .parts = edmini_v2_partitions, + .nr_parts = ARRAY_SIZE(edmini_v2_partitions), +}; + +static struct resource edmini_v2_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = EDMINI_V2_NOR_BOOT_BASE, + .end = EDMINI_V2_NOR_BOOT_BASE + + EDMINI_V2_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device edmini_v2_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &edmini_v2_nor_flash_data, + }, + .num_resources = 1, + .resource = &edmini_v2_nor_flash_resource, +}; + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data edmini_v2_eth_data = { + .phy_addr = 8, +}; + +/***************************************************************************** + * RTC 5C372a on I2C bus + ****************************************************************************/ + +#define EDMINIV2_RTC_GPIO 3 + +static struct i2c_board_info __initdata edmini_v2_i2c_rtc = { + I2C_BOARD_INFO("rs5c372a", 0x32), + .irq = 0, +}; + +/***************************************************************************** + * Sata + ****************************************************************************/ + +static struct mv_sata_platform_data edmini_v2_sata_data = { + .n_ports = 2, +}; + +/***************************************************************************** + * GPIO LED (simple - doesn't use hardware blinking support) + ****************************************************************************/ + +#define EDMINI_V2_GPIO_LED_POWER 16 + +static struct gpio_led edmini_v2_leds[] = { + { + .name = "power:blue", + .gpio = EDMINI_V2_GPIO_LED_POWER, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data edmini_v2_led_data = { + .num_leds = ARRAY_SIZE(edmini_v2_leds), + .leds = edmini_v2_leds, +}; + +static struct platform_device edmini_v2_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &edmini_v2_led_data, + }, +}; + +/**************************************************************************** + * GPIO key + ****************************************************************************/ + +#define EDMINI_V2_GPIO_KEY_POWER 18 + +static struct gpio_keys_button edmini_v2_buttons[] = { + { + .code = KEY_POWER, + .gpio = EDMINI_V2_GPIO_KEY_POWER, + .desc = "Power Button", + .active_low = 0, + }, +}; + +static struct gpio_keys_platform_data edmini_v2_button_data = { + .buttons = edmini_v2_buttons, + .nbuttons = ARRAY_SIZE(edmini_v2_buttons), +}; + +static struct platform_device edmini_v2_gpio_buttons = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &edmini_v2_button_data, + }, +}; + +/***************************************************************************** + * General Setup + ****************************************************************************/ +static struct orion5x_mpp_mode edminiv2_mpp_modes[] __initdata = { + { 0, MPP_UNUSED }, + { 1, MPP_UNUSED }, + { 2, MPP_UNUSED }, + { 3, MPP_GPIO }, /* RTC interrupt */ + { 4, MPP_UNUSED }, + { 5, MPP_UNUSED }, + { 6, MPP_UNUSED }, + { 7, MPP_UNUSED }, + { 8, MPP_UNUSED }, + { 9, MPP_UNUSED }, + { 10, MPP_UNUSED }, + { 11, MPP_UNUSED }, + { 12, MPP_SATA_LED }, /* SATA 0 presence */ + { 13, MPP_SATA_LED }, /* SATA 1 presence */ + { 14, MPP_SATA_LED }, /* SATA 0 active */ + { 15, MPP_SATA_LED }, /* SATA 1 active */ + /* 16: Power LED control (0 = On, 1 = Off) */ + { 16, MPP_GPIO }, + /* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */ + { 17, MPP_GPIO }, + /* 18: Power button status (0 = Released, 1 = Pressed) */ + { 18, MPP_GPIO }, + { 19, MPP_UNUSED }, + { -1 } +}; + +static void __init edmini_v2_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion5x_init(); + + orion5x_mpp_conf(edminiv2_mpp_modes); + + /* + * Configure peripherals. + */ + orion5x_ehci0_init(); + orion5x_eth_init(&edmini_v2_eth_data); + orion5x_i2c_init(); + orion5x_sata_init(&edmini_v2_sata_data); + orion5x_uart0_init(); + + orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE, + EDMINI_V2_NOR_BOOT_SIZE); + platform_device_register(&edmini_v2_nor_flash); + platform_device_register(&edmini_v2_gpio_leds); + platform_device_register(&edmini_v2_gpio_buttons); + + pr_notice("edmini_v2: USB device port, flash write and power-off " + "are not yet supported.\n"); + + /* Get RTC IRQ and register the chip */ + if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) { + if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0) + edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO); + else + gpio_free(EDMINIV2_RTC_GPIO); + } + + if (edmini_v2_i2c_rtc.irq == 0) + pr_warning("edmini_v2: failed to get RTC IRQ\n"); + + i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1); +} + +/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ +MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") + /* Maintainer: Christopher Moore <moore@free.fr> */ + .phys_io = ORION5X_REGS_PHYS_BASE, + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = edmini_v2_init, + .map_io = orion5x_map_io, + .init_irq = orion5x_init_irq, + .timer = &orion5x_timer, + .fixup = tag_fixup_mem32, +MACHINE_END diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c index cd8a16f67d2..fc419868e39 100644 --- a/arch/arm/mach-orion5x/gpio.c +++ b/arch/arm/mach-orion5x/gpio.c @@ -15,8 +15,8 @@ #include <linux/module.h> #include <linux/spinlock.h> #include <linux/bitops.h> +#include <linux/io.h> #include <asm/gpio.h> -#include <asm/io.h> #include <mach/orion5x.h> #include "common.h" diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 61eb74a8886..9f5ce1ce584 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -2,7 +2,7 @@ * arch/arm/mach-orion5x/include/mach/orion5x.h * * Generic definitions of Orion SoC flavors: - * Orion-1, Orion-VoIP, Orion-NAS, and Orion-2. + * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. * * Maintainer: Tzachi Perelstein <tzachi@marvell.com> * @@ -76,6 +76,9 @@ #define MV88F5281_REV_D0 4 #define MV88F5281_REV_D1 5 #define MV88F5281_REV_D2 6 +/* Orion-1-90 (88F6183) */ +#define MV88F6183_DEV_ID 0x6183 +#define MV88F6183_REV_B0 3 /******************************************************************************* * Orion Registers Map @@ -86,6 +89,7 @@ #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) +#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) @@ -153,9 +157,11 @@ #define CPU_CONF ORION5X_BRIDGE_REG(0x100) #define CPU_CTRL ORION5X_BRIDGE_REG(0x104) #define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108) +#define WDT_RESET 0x0002 #define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c) #define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C) #define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110) +#define WDT_INT_REQ 0x0008 #define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114) #define BRIDGE_INT_TIMER0 0x0002 #define BRIDGE_INT_TIMER1 0x0004 diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h index e82e44db762..4c69820e081 100644 --- a/arch/arm/mach-orion5x/include/mach/timex.h +++ b/arch/arm/mach-orion5x/include/mach/timex.h @@ -9,5 +9,3 @@ */ #define CLOCK_TICK_RATE (100 * HZ) - -#define ORION5X_TCLK 166666667 diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index 2545ff9e583..632a36f5cf1 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -13,8 +13,8 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/irq.h> +#include <linux/io.h> #include <asm/gpio.h> -#include <asm/io.h> #include <mach/orion5x.h> #include <plat/irq.h> #include "common.h" @@ -162,7 +162,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) polarity ^= 1 << pin; writel(polarity, GPIO_IN_POL); } - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } } } diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index e321ec33183..dfbb68df7b0 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -161,7 +161,7 @@ subsys_initcall(kurobox_pro_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data kurobox_pro_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** @@ -293,7 +293,7 @@ static void kurobox_pro_power_off(void) const unsigned char shutdownwait[] = {0x00, 0x0c}; const unsigned char poweroff[] = {0x00, 0x06}; /* 38400 baud divisor */ - const unsigned divisor = ((ORION5X_TCLK + (8 * 38400)) / (16 * 38400)); + const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400)); pr_info("%s: triggering power-off...\n", __func__); diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c new file mode 100644 index 00000000000..e0c43b8beb7 --- /dev/null +++ b/arch/arm/mach-orion5x/lsmini-setup.c @@ -0,0 +1,279 @@ +/* + * arch/arm/mach-orion5x/lsmini-setup.c + * + * Maintainer: Alexey Kopytko <alexey@kopytko.ru> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/leds.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/i2c.h> +#include <linux/ata_platform.h> +#include <asm/mach-types.h> +#include <linux/gpio.h> +#include <asm/mach/arch.h> +#include "common.h" +#include "mpp.h" +#include "include/mach/system.h" + +/***************************************************************************** + * Linkstation Mini Info + ****************************************************************************/ + +/* + * 256K NOR flash Device bus boot chip select + */ + +#define LSMINI_NOR_BOOT_BASE 0xf4000000 +#define LSMINI_NOR_BOOT_SIZE SZ_256K + +/***************************************************************************** + * 256KB NOR Flash on BOOT Device + ****************************************************************************/ + +static struct physmap_flash_data lsmini_nor_flash_data = { + .width = 1, +}; + +static struct resource lsmini_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = LSMINI_NOR_BOOT_BASE, + .end = LSMINI_NOR_BOOT_BASE + LSMINI_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device lsmini_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &lsmini_nor_flash_data, + }, + .num_resources = 1, + .resource = &lsmini_nor_flash_resource, +}; + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data lsmini_eth_data = { + .phy_addr = 8, +}; + +/***************************************************************************** + * RTC 5C372a on I2C bus + ****************************************************************************/ + +static struct i2c_board_info __initdata lsmini_i2c_rtc = { + I2C_BOARD_INFO("rs5c372a", 0x32), +}; + +/***************************************************************************** + * LEDs attached to GPIO + ****************************************************************************/ + +#define LSMINI_GPIO_LED_ALARM 2 +#define LSMINI_GPIO_LED_INFO 3 +#define LSMINI_GPIO_LED_FUNC 9 +#define LSMINI_GPIO_LED_PWR 14 + +static struct gpio_led lsmini_led_pins[] = { + { + .name = "alarm:red", + .gpio = LSMINI_GPIO_LED_ALARM, + .active_low = 1, + }, { + .name = "info:amber", + .gpio = LSMINI_GPIO_LED_INFO, + .active_low = 1, + }, { + .name = "func:blue:top", + .gpio = LSMINI_GPIO_LED_FUNC, + .active_low = 1, + }, { + .name = "power:blue:bottom", + .gpio = LSMINI_GPIO_LED_PWR, + }, +}; + +static struct gpio_led_platform_data lsmini_led_data = { + .leds = lsmini_led_pins, + .num_leds = ARRAY_SIZE(lsmini_led_pins), +}; + +static struct platform_device lsmini_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &lsmini_led_data, + }, +}; + +/**************************************************************************** + * GPIO Attached Keys + ****************************************************************************/ + +#define LSMINI_GPIO_KEY_FUNC 15 +#define LSMINI_GPIO_KEY_POWER 18 +#define LSMINI_GPIO_KEY_AUTOPOWER 17 + +#define LSMINI_SW_POWER 0x00 +#define LSMINI_SW_AUTOPOWER 0x01 + +static struct gpio_keys_button lsmini_buttons[] = { + { + .code = KEY_OPTION, + .gpio = LSMINI_GPIO_KEY_FUNC, + .desc = "Function Button", + .active_low = 1, + }, { + .type = EV_SW, + .code = LSMINI_SW_POWER, + .gpio = LSMINI_GPIO_KEY_POWER, + .desc = "Power-on Switch", + .active_low = 1, + }, { + .type = EV_SW, + .code = LSMINI_SW_AUTOPOWER, + .gpio = LSMINI_GPIO_KEY_AUTOPOWER, + .desc = "Power-auto Switch", + .active_low = 1, + }, +}; + +static struct gpio_keys_platform_data lsmini_button_data = { + .buttons = lsmini_buttons, + .nbuttons = ARRAY_SIZE(lsmini_buttons), +}; + +static struct platform_device lsmini_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &lsmini_button_data, + }, +}; + + +/***************************************************************************** + * SATA + ****************************************************************************/ +static struct mv_sata_platform_data lsmini_sata_data = { + .n_ports = 2, +}; + + +/***************************************************************************** + * Linkstation Mini specific power off method: reboot + ****************************************************************************/ +/* + * On the Linkstation Mini, the shutdown process is following: + * - Userland monitors key events until the power switch goes to off position + * - The board reboots + * - U-boot starts and goes into an idle mode waiting for the user + * to move the switch to ON position + */ + +static void lsmini_power_off(void) +{ + arch_reset(0); +} + + +/***************************************************************************** + * General Setup + ****************************************************************************/ + +#define LSMINI_GPIO_USB_POWER 16 +#define LSMINI_GPIO_AUTO_POWER 17 +#define LSMINI_GPIO_POWER 18 + +#define LSMINI_GPIO_HDD_POWER0 1 +#define LSMINI_GPIO_HDD_POWER1 19 + +static struct orion5x_mpp_mode lsmini_mpp_modes[] __initdata = { + { 0, MPP_UNUSED }, /* LED_RESERVE1 (unused) */ + { 1, MPP_GPIO }, /* HDD_PWR */ + { 2, MPP_GPIO }, /* LED_ALARM */ + { 3, MPP_GPIO }, /* LED_INFO */ + { 4, MPP_UNUSED }, + { 5, MPP_UNUSED }, + { 6, MPP_UNUSED }, + { 7, MPP_UNUSED }, + { 8, MPP_UNUSED }, + { 9, MPP_GPIO }, /* LED_FUNC */ + { 10, MPP_UNUSED }, + { 11, MPP_UNUSED }, /* LED_ETH (dummy) */ + { 12, MPP_UNUSED }, + { 13, MPP_UNUSED }, + { 14, MPP_GPIO }, /* LED_PWR */ + { 15, MPP_GPIO }, /* FUNC */ + { 16, MPP_GPIO }, /* USB_PWR */ + { 17, MPP_GPIO }, /* AUTO_POWER */ + { 18, MPP_GPIO }, /* POWER */ + { 19, MPP_GPIO }, /* HDD_PWR1 */ + { -1 }, +}; + +static void __init lsmini_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion5x_init(); + + orion5x_mpp_conf(lsmini_mpp_modes); + + /* + * Configure peripherals. + */ + orion5x_ehci0_init(); + orion5x_ehci1_init(); + orion5x_eth_init(&lsmini_eth_data); + orion5x_i2c_init(); + orion5x_sata_init(&lsmini_sata_data); + orion5x_uart0_init(); + orion5x_xor_init(); + + orion5x_setup_dev_boot_win(LSMINI_NOR_BOOT_BASE, + LSMINI_NOR_BOOT_SIZE); + platform_device_register(&lsmini_nor_flash); + + platform_device_register(&lsmini_button_device); + + platform_device_register(&lsmini_leds); + + i2c_register_board_info(0, &lsmini_i2c_rtc, 1); + + /* enable USB power */ + gpio_set_value(LSMINI_GPIO_USB_POWER, 1); + + /* register power-off method */ + pm_power_off = lsmini_power_off; + + pr_info("%s: finished\n", __func__); +} + +#ifdef CONFIG_MACH_LINKSTATION_MINI +MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") + /* Maintainer: Alexey Kopytko <alexey@kopytko.ru> */ + .phys_io = ORION5X_REGS_PHYS_BASE, + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = lsmini_init, + .map_io = orion5x_map_io, + .init_irq = orion5x_init_irq, + .timer = &orion5x_timer, + .fixup = tag_fixup_mem32, +MACHINE_END +#endif diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index c04ab0e16ea..640ea2a3fc6 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -11,8 +11,8 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/mbus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 53ff1893b88..68acca98e63 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -109,7 +109,7 @@ subsys_initcall(mss2_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data mss2_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 978d4d59939..97c9ccb2ac6 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -39,7 +39,7 @@ * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data mv2120_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static struct mv_sata_platform_data mv2120_sata_data = { diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index e72fe1e065e..500cdadaf09 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -88,7 +88,7 @@ static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = { }; static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index a1fe3257320..ebde8141649 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -89,7 +89,7 @@ static struct orion5x_mpp_mode rd88f5181l_ge_mpp_modes[] __initdata = { }; static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 4c3bcd76ac8..a04f9e4b633 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -221,7 +221,7 @@ subsys_initcall(rd88f5182_pci_init); ****************************************************************************/ static struct mv643xx_eth_platform_data rd88f5182_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c new file mode 100644 index 00000000000..40e04953909 --- /dev/null +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -0,0 +1,117 @@ +/* + * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c + * + * Marvell Orion-1-90 AP GE Reference Design Setup + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/spi/spi.h> +#include <linux/spi/orion_spi.h> +#include <linux/spi/flash.h> +#include <linux/ethtool.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/leds.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <mach/orion5x.h> +#include "common.h" +#include "mpp.h" + +static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { + .phy_addr = -1, + .speed = SPEED_1000, + .duplex = DUPLEX_FULL, +}; + +static struct mtd_partition rd88f6183ap_ge_partitions[] = { + { + .name = "kernel", + .offset = 0x00000000, + .size = 0x00200000, + }, { + .name = "rootfs", + .offset = 0x00200000, + .size = 0x00500000, + }, { + .name = "nvram", + .offset = 0x00700000, + .size = 0x00080000, + }, +}; + +static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = { + .type = "m25p64", + .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions), + .parts = rd88f6183ap_ge_partitions, +}; + +static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = { + { + .modalias = "m25p80", + .platform_data = &rd88f6183ap_ge_spi_slave_data, + .irq = NO_IRQ, + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 0, + }, +}; + +static void __init rd88f6183ap_ge_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion5x_init(); + + /* + * Configure peripherals. + */ + orion5x_ehci0_init(); + orion5x_eth_init(&rd88f6183ap_ge_eth_data); + spi_register_board_info(rd88f6183ap_ge_spi_slave_info, + ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info)); + orion5x_spi_init(); + orion5x_uart0_init(); +} + +static struct hw_pci rd88f6183ap_ge_pci __initdata = { + .nr_controllers = 2, + .swizzle = pci_std_swizzle, + .setup = orion5x_pci_sys_setup, + .scan = orion5x_pci_sys_scan_bus, + .map_irq = orion5x_pci_map_irq, +}; + +static int __init rd88f6183ap_ge_pci_init(void) +{ + if (machine_is_rd88f6183ap_ge()) { + orion5x_pci_disable(); + pci_common_init(&rd88f6183ap_ge_pci); + } + + return 0; +} +subsys_initcall(rd88f6183ap_ge_pci_init); + +MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") + /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ + .phys_io = ORION5X_REGS_PHYS_BASE, + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = rd88f6183ap_ge_init, + .map_io = orion5x_map_io, + .init_irq = orion5x_init_irq, + .timer = &orion5x_timer, + .fixup = tag_fixup_mem32, +MACHINE_END diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c new file mode 100644 index 00000000000..0b101d7d41c --- /dev/null +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -0,0 +1,369 @@ +/* + * Buffalo Terastation Pro II/Live Board Setup + * + * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/delay.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/i2c.h> +#include <linux/serial_reg.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <mach/orion5x.h> +#include "common.h" +#include "mpp.h" + +/***************************************************************************** + * Terastation Pro 2/Live Info + ****************************************************************************/ + +/* + * Terastation Pro 2 hardware : + * - Marvell 88F5281-D0 + * - Marvell 88SX6042 SATA controller (PCI) + * - Marvell 88E1118 Gigabit Ethernet PHY + * - 256KB NOR flash + * - 128MB of DDR RAM + * - PCIe port (not equipped) + */ + +/* + * 256K NOR flash Device bus boot chip select + */ + +#define TSP2_NOR_BOOT_BASE 0xf4000000 +#define TSP2_NOR_BOOT_SIZE SZ_256K + +/***************************************************************************** + * 256KB NOR Flash on BOOT Device + ****************************************************************************/ + +static struct physmap_flash_data tsp2_nor_flash_data = { + .width = 1, +}; + +static struct resource tsp2_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = TSP2_NOR_BOOT_BASE, + .end = TSP2_NOR_BOOT_BASE + TSP2_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device tsp2_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &tsp2_nor_flash_data, + }, + .num_resources = 1, + .resource = &tsp2_nor_flash_resource, +}; + +/***************************************************************************** + * PCI + ****************************************************************************/ +#define TSP2_PCI_SLOT0_OFFS 7 +#define TSP2_PCI_SLOT0_IRQ_PIN 11 + +void __init tsp2_pci_preinit(void) +{ + int pin; + + /* + * Configure PCI GPIO IRQ pins + */ + pin = TSP2_PCI_SLOT0_IRQ_PIN; + if (gpio_request(pin, "PCI Int1") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + } else { + printk(KERN_ERR "tsp2_pci_preinit failed " + "to set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "tsp2_pci_preinit failed to " + "gpio_request %d\n", pin); + } +} + +static int __init tsp2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int irq; + + /* + * Check for devices with hard-wired IRQs. + */ + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; + + /* + * PCI IRQs are connected via GPIOs. + */ + if (slot == TSP2_PCI_SLOT0_OFFS) + return gpio_to_irq(TSP2_PCI_SLOT0_IRQ_PIN); + + return -1; +} + +static struct hw_pci tsp2_pci __initdata = { + .nr_controllers = 2, + .preinit = tsp2_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = orion5x_pci_sys_setup, + .scan = orion5x_pci_sys_scan_bus, + .map_irq = tsp2_pci_map_irq, +}; + +static int __init tsp2_pci_init(void) +{ + if (machine_is_terastation_pro2()) + pci_common_init(&tsp2_pci); + + return 0; +} + +subsys_initcall(tsp2_pci_init); + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data tsp2_eth_data = { + .phy_addr = 0, +}; + +/***************************************************************************** + * RTC 5C372a on I2C bus + ****************************************************************************/ + +#define TSP2_RTC_GPIO 9 + +static struct i2c_board_info __initdata tsp2_i2c_rtc = { + I2C_BOARD_INFO("rs5c372a", 0x32), +}; + +/***************************************************************************** + * Terastation Pro II specific power off method via UART1-attached + * microcontroller + ****************************************************************************/ + +#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) + +static int tsp2_miconread(unsigned char *buf, int count) +{ + int i; + int timeout; + + for (i = 0; i < count; i++) { + timeout = 10; + + while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) { + if (--timeout == 0) + break; + udelay(1000); + } + + if (timeout == 0) + break; + buf[i] = readl(UART1_REG(RX)); + } + + /* return read bytes */ + return i; +} + +static int tsp2_miconwrite(const unsigned char *buf, int count) +{ + int i = 0; + + while (count--) { + while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE)) + barrier(); + writel(buf[i++], UART1_REG(TX)); + } + + return 0; +} + +static int tsp2_miconsend(const unsigned char *data, int count) +{ + int i; + unsigned char checksum = 0; + unsigned char recv_buf[40]; + unsigned char send_buf[40]; + unsigned char correct_ack[3]; + int retry = 2; + + /* Generate checksum */ + for (i = 0; i < count; i++) + checksum -= data[i]; + + do { + /* Send data */ + tsp2_miconwrite(data, count); + + /* send checksum */ + tsp2_miconwrite(&checksum, 1); + + if (tsp2_miconread(recv_buf, sizeof(recv_buf)) <= 3) { + printk(KERN_ERR ">%s: receive failed.\n", __func__); + + /* send preamble to clear the receive buffer */ + memset(&send_buf, 0xff, sizeof(send_buf)); + tsp2_miconwrite(send_buf, sizeof(send_buf)); + + /* make dummy reads */ + mdelay(100); + tsp2_miconread(recv_buf, sizeof(recv_buf)); + } else { + /* Generate expected ack */ + correct_ack[0] = 0x01; + correct_ack[1] = data[1]; + correct_ack[2] = 0x00; + + /* checksum Check */ + if ((recv_buf[0] + recv_buf[1] + recv_buf[2] + + recv_buf[3]) & 0xFF) { + printk(KERN_ERR ">%s: Checksum Error : " + "Received data[%02x, %02x, %02x, %02x]" + "\n", __func__, recv_buf[0], + recv_buf[1], recv_buf[2], recv_buf[3]); + } else { + /* Check Received Data */ + if (correct_ack[0] == recv_buf[0] && + correct_ack[1] == recv_buf[1] && + correct_ack[2] == recv_buf[2]) { + /* Interval for next command */ + mdelay(10); + + /* Receive ACK */ + return 0; + } + } + /* Received NAK or illegal Data */ + printk(KERN_ERR ">%s: Error : NAK or Illegal Data " + "Received\n", __func__); + } + } while (retry--); + + /* Interval for next command */ + mdelay(10); + + return -1; +} + +static void tsp2_power_off(void) +{ + const unsigned char watchdogkill[] = {0x01, 0x35, 0x00}; + const unsigned char shutdownwait[] = {0x00, 0x0c}; + const unsigned char poweroff[] = {0x00, 0x06}; + /* 38400 baud divisor */ + const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400)); + + pr_info("%s: triggering power-off...\n", __func__); + + /* hijack uart1 and reset into sane state (38400,8n1,even parity) */ + writel(0x83, UART1_REG(LCR)); + writel(divisor & 0xff, UART1_REG(DLL)); + writel((divisor >> 8) & 0xff, UART1_REG(DLM)); + writel(0x1b, UART1_REG(LCR)); + writel(0x00, UART1_REG(IER)); + writel(0x07, UART1_REG(FCR)); + writel(0x00, UART1_REG(MCR)); + + /* Send the commands to shutdown the Terastation Pro II */ + tsp2_miconsend(watchdogkill, sizeof(watchdogkill)) ; + tsp2_miconsend(shutdownwait, sizeof(shutdownwait)) ; + tsp2_miconsend(poweroff, sizeof(poweroff)); +} + +/***************************************************************************** + * General Setup + ****************************************************************************/ +static struct orion5x_mpp_mode tsp2_mpp_modes[] __initdata = { + { 0, MPP_PCIE_RST_OUTn }, + { 1, MPP_UNUSED }, + { 2, MPP_UNUSED }, + { 3, MPP_UNUSED }, + { 4, MPP_NAND }, /* BOOT NAND Flash REn */ + { 5, MPP_NAND }, /* BOOT NAND Flash WEn */ + { 6, MPP_NAND }, /* BOOT NAND Flash HREn[0] */ + { 7, MPP_NAND }, /* BOOT NAND Flash WEn[0] */ + { 8, MPP_GPIO }, /* MICON int */ + { 9, MPP_GPIO }, /* RTC int */ + { 10, MPP_UNUSED }, + { 11, MPP_GPIO }, /* PCI Int A */ + { 12, MPP_UNUSED }, + { 13, MPP_GPIO }, /* UPS on UART0 enable */ + { 14, MPP_GPIO }, /* UPS low battery detection */ + { 15, MPP_UNUSED }, + { 16, MPP_UART }, /* UART1 RXD */ + { 17, MPP_UART }, /* UART1 TXD */ + { 18, MPP_UART }, /* UART1 CTSn */ + { 19, MPP_UART }, /* UART1 RTSn */ + { -1 }, +}; + +static void __init tsp2_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion5x_init(); + + orion5x_mpp_conf(tsp2_mpp_modes); + + /* + * Configure peripherals. + */ + orion5x_setup_dev_boot_win(TSP2_NOR_BOOT_BASE, + TSP2_NOR_BOOT_SIZE); + platform_device_register(&tsp2_nor_flash); + + orion5x_ehci0_init(); + orion5x_eth_init(&tsp2_eth_data); + orion5x_i2c_init(); + orion5x_uart0_init(); + orion5x_uart1_init(); + + /* Get RTC IRQ and register the chip */ + if (gpio_request(TSP2_RTC_GPIO, "rtc") == 0) { + if (gpio_direction_input(TSP2_RTC_GPIO) == 0) + tsp2_i2c_rtc.irq = gpio_to_irq(TSP2_RTC_GPIO); + else + gpio_free(TSP2_RTC_GPIO); + } + if (tsp2_i2c_rtc.irq == 0) + pr_warning("tsp2_init: failed to get RTC IRQ\n"); + i2c_register_board_info(0, &tsp2_i2c_rtc, 1); + + /* register Terastation Pro II specific power-off method */ + pm_power_off = tsp2_power_off; +} + +MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") + /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */ + .phys_io = ORION5X_REGS_PHYS_BASE, + .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = tsp2_init, + .map_io = orion5x_map_io, + .init_irq = orion5x_init_irq, + .timer = &orion5x_timer, + .fixup = tag_fixup_mem32, +MACHINE_END diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index ae0a5dccd2a..1368e9fd1a0 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -103,8 +103,7 @@ static struct platform_device ts78xx_nor_boot_flash = { * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data ts78xx_eth_data = { - .phy_addr = 0, - .force_phy_addr = 1, + .phy_addr = MV643XX_ETH_PHY_ADDR(0), }; /***************************************************************************** diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c index 83feac3147a..c9abb8fbfa7 100644 --- a/arch/arm/mach-orion5x/tsx09-common.c +++ b/arch/arm/mach-orion5x/tsx09-common.c @@ -16,6 +16,7 @@ #include <linux/timex.h> #include <linux/serial_reg.h> #include "tsx09-common.h" +#include "common.h" /***************************************************************************** * QNAP TS-x09 specific power off method via UART1-attached PIC @@ -26,7 +27,7 @@ void qnap_tsx09_power_off(void) { /* 19200 baud divisor */ - const unsigned divisor = ((ORION5X_TCLK + (8 * 19200)) / (16 * 19200)); + const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200)); pr_info("%s: triggering power-off...\n", __func__); @@ -48,7 +49,7 @@ void qnap_tsx09_power_off(void) ****************************************************************************/ struct mv643xx_eth_platform_data qnap_tsx09_eth_data = { - .phy_addr = 8, + .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; static int __init qnap_tsx09_parse_hex_nibble(char n) diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index b6bc43e07ee..7ddc22c2bb5 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -92,7 +92,7 @@ static struct platform_device wnr854t_nor_flash = { }; static struct mv643xx_eth_platform_data wnr854t_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index b10da17b3fb..9a4fd525646 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -100,7 +100,7 @@ static struct platform_device wrt350n_v2_nor_flash = { }; static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { - .phy_addr = -1, + .phy_addr = MV643XX_ETH_PHY_NONE, .speed = SPEED_1000, .duplex = DUPLEX_FULL, }; diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c index 24d036a24a7..898c0e88acb 100644 --- a/arch/arm/mach-pnx4008/clock.c +++ b/arch/arm/mach-pnx4008/clock.c @@ -20,9 +20,9 @@ #include <linux/device.h> #include <linux/err.h> #include <linux/delay.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/clock.h> #include "clock.h" diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c index 3ba46ede9bb..45734bb880a 100644 --- a/arch/arm/mach-pnx4008/core.c +++ b/arch/arm/mach-pnx4008/core.c @@ -25,9 +25,9 @@ #include <linux/serial_8250.h> #include <linux/device.h> #include <linux/spi/spi.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/pgtable.h> diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c index 833c56be734..ac2f70eddb9 100644 --- a/arch/arm/mach-pnx4008/dma.c +++ b/arch/arm/mach-pnx4008/dma.c @@ -21,12 +21,12 @@ #include <linux/err.h> #include <linux/dma-mapping.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> #include <asm/dma.h> #include <asm/dma-mapping.h> -#include <asm/io.h> #include <asm/mach/dma.h> #include <mach/clock.h> diff --git a/arch/arm/mach-pnx4008/gpio.c b/arch/arm/mach-pnx4008/gpio.c index fb51f7279e9..015cc21d5f5 100644 --- a/arch/arm/mach-pnx4008/gpio.c +++ b/arch/arm/mach-pnx4008/gpio.c @@ -17,7 +17,7 @@ #include <linux/types.h> #include <linux/kernel.h> #include <linux/module.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/platform.h> #include <mach/gpio.h> diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h index 8985a4622b8..e12e7abfcbc 100644 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ b/arch/arm/mach-pnx4008/include/mach/system.h @@ -21,8 +21,8 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/platform.h> static void arch_idle(void) diff --git a/arch/arm/mach-pnx4008/include/mach/timex.h b/arch/arm/mach-pnx4008/include/mach/timex.h index 956fbd8e977..5ff0196c0f1 100644 --- a/arch/arm/mach-pnx4008/include/mach/timex.h +++ b/arch/arm/mach-pnx4008/include/mach/timex.h @@ -14,8 +14,8 @@ #ifndef __PNX4008_TIMEX_H #define __PNX4008_TIMEX_H +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #define CLOCK_TICK_RATE 1000000 diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c index 5c4f55af5d4..a9ce02b4bf1 100644 --- a/arch/arm/mach-pnx4008/irq.c +++ b/arch/arm/mach-pnx4008/irq.c @@ -23,8 +23,8 @@ #include <linux/ioport.h> #include <linux/device.h> #include <linux/irq.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/pgtable.h> #include <asm/page.h> diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c index f970906d884..b3d8d53e32e 100644 --- a/arch/arm/mach-pnx4008/pm.c +++ b/arch/arm/mach-pnx4008/pm.c @@ -18,8 +18,8 @@ #include <linux/suspend.h> #include <linux/delay.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/cacheflush.h> #include <mach/pm.h> #include <mach/clock.h> diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c index 9be84bbb30e..f40961e5191 100644 --- a/arch/arm/mach-pnx4008/serial.c +++ b/arch/arm/mach-pnx4008/serial.c @@ -12,8 +12,7 @@ #include <linux/kernel.h> #include <linux/types.h> - -#include <asm/io.h> +#include <linux/io.h> #include <mach/platform.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c index 180975244f9..fc0ba183fe1 100644 --- a/arch/arm/mach-pnx4008/time.c +++ b/arch/arm/mach-pnx4008/time.c @@ -22,10 +22,10 @@ #include <linux/time.h> #include <linux/timex.h> #include <linux/irq.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/mach/time.h> #include <asm/errno.h> diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index e8ee7ec9ff6..f27f6b3d6e6 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -38,16 +38,23 @@ config ARCH_LUBBOCK bool "Intel DBPXA250 Development Platform" select PXA25x select SA1111 + select PXA_HAVE_BOARD_IRQS config MACH_LOGICPD_PXA270 bool "LogicPD PXA270 Card Engine Development Platform" select PXA27x select HAVE_PWM + select PXA_HAVE_BOARD_IRQS config MACH_MAINSTONE bool "Intel HCDDBBVA0 Development Platform" select PXA27x select HAVE_PWM + select PXA_HAVE_BOARD_IRQS + +config MACH_MP900C + bool "Nec Mobilepro 900/c" + select PXA25x config ARCH_PXA_IDP bool "Accelent Xscale IDP" @@ -114,10 +121,21 @@ config MACH_TOSA bool "Enable Sharp SL-6000x (Tosa) Support" depends on PXA_SHARPSL select PXA25x + select PXA_HAVE_BOARD_IRQS + +config ARCH_VIPER + bool "Arcom/Eurotech VIPER SBC" + select PXA25x + select ISA + select I2C_GPIO + select HAVE_PWM + select PXA_HAVE_BOARD_IRQS + select PXA_HAVE_ISA_IRQS config ARCH_PXA_ESERIES bool "PXA based Toshiba e-series PDAs" select PXA25x + select PXA_HAVE_BOARD_IRQS config MACH_E330 bool "Toshiba e330" @@ -170,13 +188,41 @@ config MACH_E800 Say Y here if you intend to run this kernel on a Toshiba e800 family PDA. +config TRIZEPS_PXA + bool "PXA based Keith und Koep Trizeps DIMM-Modules" + config MACH_TRIZEPS4 bool "Keith und Koep Trizeps4 DIMM-Module" + depends on TRIZEPS_PXA + select TRIZEPS_PCMCIA select PXA27x -config MACH_TRIZEPS4_CONXS +config MACH_TRIZEPS4WL + bool "Keith und Koep Trizeps4-WL DIMM-Module" + depends on TRIZEPS_PXA + select TRIZEPS_PCMCIA + select PXA27x + select PXA_SSP + +choice + prompt "Select base board for Trizeps module" + depends on TRIZEPS_PXA + +config MACH_TRIZEPS_CONXS bool "ConXS Eval Board" - depends on MACH_TRIZEPS4 + +config MACH_TRIZEPS_UCONXS + bool "uConXS Eval Board" + +config MACH_TRIZEPS_ANY + bool "another Board" + +endchoice + +config TRIZEPS_PCMCIA + bool + help + Enable PCMCIA support for Trizeps modules config MACH_EM_X270 bool "CompuLab EM-x270 platform" @@ -189,6 +235,7 @@ config MACH_COLIBRI config MACH_ZYLONITE bool "PXA3xx Development Platform (aka Zylonite)" select PXA3xx + select PXA_SSP select HAVE_PWM config MACH_LITTLETON @@ -207,20 +254,42 @@ config MACH_SAAR select PXA930 config MACH_ARMCORE - bool "CompuLab CM-X270 modules" + bool "CompuLab CM-X255/CM-X270 modules" select PXA27x select IWMMXT + select ZONE_DMA if PCI + select PXA25x + select PXA_SSP + +config MACH_CM_X300 + bool "CompuLab CM-X300 modules" + select PXA3xx + select CPU_PXA300 config MACH_MAGICIAN bool "Enable HTC Magician Support" select PXA27x select IWMMXT + select PXA_HAVE_BOARD_IRQS + +config MACH_MIOA701 + bool "Mitac Mio A701 Support" + select PXA27x + select IWMMXT + select LEDS_GPIO + select HAVE_PWM + select GPIO_SYSFS + help + Say Y here if you intend to run this kernel on a + MIO A701. Currently there is only basic support + for this PDA. config MACH_PCM027 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" select PXA27x select IWMMXT select PXA_SSP + select PXA_HAVE_BOARD_IRQS config ARCH_PXA_PALM bool "PXA based Palm PDAs" @@ -236,6 +305,16 @@ config MACH_PALMTX Say Y here if you intend to run this kernel on a Palm T|X handheld computer. +config MACH_PALMZ72 + bool "Palm Zire 72" + default y + depends on ARCH_PXA_PALM + select PXA27x + select IWMMXT + help + Say Y here if you intend to run this kernel on Palm Zire 72 + handheld computer. + config MACH_PCM990_BASEBOARD bool "PHYTEC PCM-990 development board" select HAVE_PWM @@ -256,6 +335,9 @@ config PCM990_DISPLAY_NONE endchoice +config MACH_AM200EPD + depends on MACH_GUMSTIX_F + bool "Enable AM200EPD board support" config PXA_EZX bool "Motorola EZX Platform" @@ -343,4 +425,10 @@ config TOSA_BT This is a simple driver that is able to control the state of built in bluetooth chip on tosa. +config PXA_HAVE_BOARD_IRQS + bool + +config PXA_HAVE_ISA_IRQS + bool + endif diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 99ecbe7f850..d31c9979cfa 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -6,7 +6,12 @@ obj-y += clock.o devices.o generic.o irq.o dma.o \ time.o gpio.o reset.o obj-$(CONFIG_PM) += pm.o sleep.o standby.o -obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o + +ifeq ($(CONFIG_CPU_FREQ),y) +obj-$(CONFIG_PXA25x) += cpufreq-pxa2xx.o +obj-$(CONFIG_PXA27x) += cpufreq-pxa2xx.o +obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o +endif # Generic drivers that other drivers may depend upon obj-$(CONFIG_PXA_SSP) += ssp.o @@ -22,27 +27,33 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o # Specific board support obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o +obj-$(CONFIG_MACH_AM200EPD) += am200epd.o obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o +obj-$(CONFIG_MACH_MP900C) += mp900.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o obj-$(CONFIG_MACH_COLIBRI) += colibri.o -obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o -obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o -obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o -obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o +obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o +obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o +obj-$(CONFIG_MACH_POODLE) += poodle.o obj-$(CONFIG_MACH_PCM027) += pcm027.o obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_EM_X270) += em-x270.o obj-$(CONFIG_MACH_MAGICIAN) += magician.o -obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o eseries_udc.o -obj-$(CONFIG_MACH_E740) += e740_lcd.o -obj-$(CONFIG_MACH_E750) += e750_lcd.o -obj-$(CONFIG_MACH_E400) += e400_lcd.o -obj-$(CONFIG_MACH_E800) += e800_lcd.o +obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o +obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o +obj-$(CONFIG_MACH_E330) += e330.o +obj-$(CONFIG_MACH_E350) += e350.o +obj-$(CONFIG_MACH_E740) += e740.o +obj-$(CONFIG_MACH_E750) += e750.o +obj-$(CONFIG_MACH_E400) += e400.o +obj-$(CONFIG_MACH_E800) += e800.o obj-$(CONFIG_MACH_PALMTX) += palmtx.o +obj-$(CONFIG_MACH_PALMZ72) += palmz72.o +obj-$(CONFIG_ARCH_VIPER) += viper.o ifeq ($(CONFIG_MACH_ZYLONITE),y) obj-y += zylonite.o @@ -53,7 +64,8 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o obj-$(CONFIG_MACH_SAAR) += saar.o -obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o +obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o +obj-$(CONFIG_MACH_CM_X300) += cm-x300.o obj-$(CONFIG_PXA_EZX) += ezx.o # Support for blinky lights @@ -61,12 +73,11 @@ led-y := leds.o led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o -led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o obj-$(CONFIG_LEDS) += $(led-y) ifeq ($(CONFIG_PCI),y) -obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o +obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o endif obj-$(CONFIG_TOSA_BT) += tosa-bt.o diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c deleted file mode 100644 index 5c67b188a3b..00000000000 --- a/arch/arm/mach-pxa/akita-ioexp.c +++ /dev/null @@ -1,222 +0,0 @@ -/* - * Support for the Extra GPIOs on the Sharp SL-C1000 (Akita) - * (uses a Maxim MAX7310 8 Port IO Expander) - * - * Copyright 2005 Openedhand Ltd. - * - * Author: Richard Purdie <richard@openedhand.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/i2c.h> -#include <linux/slab.h> -#include <linux/workqueue.h> -#include <mach/akita.h> - -/* MAX7310 Regiser Map */ -#define MAX7310_INPUT 0x00 -#define MAX7310_OUTPUT 0x01 -#define MAX7310_POLINV 0x02 -#define MAX7310_IODIR 0x03 /* 1 = Input, 0 = Output */ -#define MAX7310_TIMEOUT 0x04 - -/* Addresses to scan */ -static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END }; - -/* I2C Magic */ -I2C_CLIENT_INSMOD; - -static int max7310_write(struct i2c_client *client, int address, int data); -static struct i2c_client max7310_template; -static void akita_ioexp_work(struct work_struct *private_); - -static struct device *akita_ioexp_device; -static unsigned char ioexp_output_value = AKITA_IOEXP_IO_OUT; -DECLARE_WORK(akita_ioexp, akita_ioexp_work); - - -/* - * MAX7310 Access - */ -static int max7310_config(struct device *dev, int iomode, int polarity) -{ - int ret; - struct i2c_client *client = to_i2c_client(dev); - - ret = max7310_write(client, MAX7310_POLINV, polarity); - if (ret < 0) - return ret; - ret = max7310_write(client, MAX7310_IODIR, iomode); - return ret; -} - -static int max7310_set_ouputs(struct device *dev, int outputs) -{ - struct i2c_client *client = to_i2c_client(dev); - - return max7310_write(client, MAX7310_OUTPUT, outputs); -} - -/* - * I2C Functions - */ -static int max7310_write(struct i2c_client *client, int address, int value) -{ - u8 data[2]; - - data[0] = address & 0xff; - data[1] = value & 0xff; - - if (i2c_master_send(client, data, 2) == 2) - return 0; - return -1; -} - -static int max7310_detect(struct i2c_adapter *adapter, int address, int kind) -{ - struct i2c_client *new_client; - int err; - - if (!(new_client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL))) - return -ENOMEM; - - max7310_template.adapter = adapter; - max7310_template.addr = address; - - memcpy(new_client, &max7310_template, sizeof(struct i2c_client)); - - if ((err = i2c_attach_client(new_client))) { - kfree(new_client); - return err; - } - - max7310_config(&new_client->dev, AKITA_IOEXP_IO_DIR, 0); - akita_ioexp_device = &new_client->dev; - schedule_work(&akita_ioexp); - - return 0; -} - -static int max7310_attach_adapter(struct i2c_adapter *adapter) -{ - return i2c_probe(adapter, &addr_data, max7310_detect); -} - -static int max7310_detach_client(struct i2c_client *client) -{ - int err; - - akita_ioexp_device = NULL; - - if ((err = i2c_detach_client(client))) - return err; - - kfree(client); - return 0; -} - -static struct i2c_driver max7310_i2c_driver = { - .driver = { - .name = "akita-max7310", - }, - .id = I2C_DRIVERID_AKITAIOEXP, - .attach_adapter = max7310_attach_adapter, - .detach_client = max7310_detach_client, -}; - -static struct i2c_client max7310_template = { - name: "akita-max7310", - driver: &max7310_i2c_driver, -}; - -void akita_set_ioexp(struct device *dev, unsigned char bit) -{ - ioexp_output_value |= bit; - - if (akita_ioexp_device) - schedule_work(&akita_ioexp); - return; -} - -void akita_reset_ioexp(struct device *dev, unsigned char bit) -{ - ioexp_output_value &= ~bit; - - if (akita_ioexp_device) - schedule_work(&akita_ioexp); - return; -} - -EXPORT_SYMBOL(akita_set_ioexp); -EXPORT_SYMBOL(akita_reset_ioexp); - -static void akita_ioexp_work(struct work_struct *private_) -{ - if (akita_ioexp_device) - max7310_set_ouputs(akita_ioexp_device, ioexp_output_value); -} - - -#ifdef CONFIG_PM -static int akita_ioexp_suspend(struct platform_device *pdev, pm_message_t state) -{ - flush_scheduled_work(); - return 0; -} - -static int akita_ioexp_resume(struct platform_device *pdev) -{ - schedule_work(&akita_ioexp); - return 0; -} -#else -#define akita_ioexp_suspend NULL -#define akita_ioexp_resume NULL -#endif - -static int __init akita_ioexp_probe(struct platform_device *pdev) -{ - return i2c_add_driver(&max7310_i2c_driver); -} - -static int akita_ioexp_remove(struct platform_device *pdev) -{ - i2c_del_driver(&max7310_i2c_driver); - return 0; -} - -static struct platform_driver akita_ioexp_driver = { - .probe = akita_ioexp_probe, - .remove = akita_ioexp_remove, - .suspend = akita_ioexp_suspend, - .resume = akita_ioexp_resume, - .driver = { - .name = "akita-ioexp", - }, -}; - -static int __init akita_ioexp_init(void) -{ - return platform_driver_register(&akita_ioexp_driver); -} - -static void __exit akita_ioexp_exit(void) -{ - platform_driver_unregister(&akita_ioexp_driver); -} - -MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>"); -MODULE_DESCRIPTION("Akita IO-Expander driver"); -MODULE_LICENSE("GPL"); - -fs_initcall(akita_ioexp_init); -module_exit(akita_ioexp_exit); - diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c new file mode 100644 index 00000000000..b965085a37b --- /dev/null +++ b/arch/arm/mach-pxa/am200epd.c @@ -0,0 +1,374 @@ +/* + * am200epd.c -- Platform device for AM200 EPD kit + * + * Copyright (C) 2008, Jaya Kumar + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + * + * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven. + * + * This work was made possible by help and equipment support from E-Ink + * Corporation. http://support.eink.com/community + * + * This driver is written to be used with the Metronome display controller. + * on the AM200 EPD prototype kit/development kit with an E-Ink 800x600 + * Vizplex EPD on a Gumstix board using the Lyre interface board. + * + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/fb.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/irq.h> +#include <linux/gpio.h> + +#include <mach/pxafb.h> + +#include <video/metronomefb.h> + +static unsigned int panel_type = 6; +static struct platform_device *am200_device; +static struct metronome_board am200_board; + +static struct pxafb_mode_info am200_fb_mode_9inch7 = { + .pixclock = 40000, + .xres = 1200, + .yres = 842, + .bpp = 16, + .hsync_len = 2, + .left_margin = 2, + .right_margin = 2, + .vsync_len = 1, + .upper_margin = 2, + .lower_margin = 25, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, +}; + +static struct pxafb_mode_info am200_fb_mode_8inch = { + .pixclock = 40000, + .xres = 1088, + .yres = 791, + .bpp = 16, + .hsync_len = 28, + .left_margin = 8, + .right_margin = 30, + .vsync_len = 8, + .upper_margin = 10, + .lower_margin = 8, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, +}; + +static struct pxafb_mode_info am200_fb_mode_6inch = { + .pixclock = 40189, + .xres = 832, + .yres = 622, + .bpp = 16, + .hsync_len = 28, + .left_margin = 34, + .right_margin = 34, + .vsync_len = 25, + .upper_margin = 0, + .lower_margin = 2, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, +}; + +static struct pxafb_mach_info am200_fb_info = { + .modes = &am200_fb_mode_6inch, + .num_modes = 1, + .lcd_conn = LCD_TYPE_COLOR_TFT | LCD_PCLK_EDGE_FALL | + LCD_AC_BIAS_FREQ(24), +}; + +/* register offsets for gpio control */ +#define LED_GPIO_PIN 51 +#define STDBY_GPIO_PIN 48 +#define RST_GPIO_PIN 49 +#define RDY_GPIO_PIN 32 +#define ERR_GPIO_PIN 17 +#define PCBPWR_GPIO_PIN 16 +static int gpios[] = { LED_GPIO_PIN , STDBY_GPIO_PIN , RST_GPIO_PIN, + RDY_GPIO_PIN, ERR_GPIO_PIN, PCBPWR_GPIO_PIN }; +static char *gpio_names[] = { "LED" , "STDBY" , "RST", "RDY", "ERR", "PCBPWR" }; + +static int am200_init_gpio_regs(struct metronomefb_par *par) +{ + int i; + int err; + + for (i = 0; i < ARRAY_SIZE(gpios); i++) { + err = gpio_request(gpios[i], gpio_names[i]); + if (err) { + dev_err(&am200_device->dev, "failed requesting " + "gpio %s, err=%d\n", gpio_names[i], err); + goto err_req_gpio; + } + } + + gpio_direction_output(LED_GPIO_PIN, 0); + gpio_direction_output(STDBY_GPIO_PIN, 0); + gpio_direction_output(RST_GPIO_PIN, 0); + + gpio_direction_input(RDY_GPIO_PIN); + gpio_direction_input(ERR_GPIO_PIN); + + gpio_direction_output(PCBPWR_GPIO_PIN, 0); + + return 0; + +err_req_gpio: + while (i > 0) + gpio_free(gpios[i--]); + + return err; +} + +static void am200_cleanup(struct metronomefb_par *par) +{ + int i; + + free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); + + for (i = 0; i < ARRAY_SIZE(gpios); i++) + gpio_free(gpios[i]); +} + +static int am200_share_video_mem(struct fb_info *info) +{ + /* rough check if this is our desired fb and not something else */ + if ((info->var.xres != am200_fb_info.modes->xres) + || (info->var.yres != am200_fb_info.modes->yres)) + return 0; + + /* we've now been notified that we have our new fb */ + am200_board.metromem = info->screen_base; + am200_board.host_fbinfo = info; + + /* try to refcount host drv since we are the consumer after this */ + if (!try_module_get(info->fbops->owner)) + return -ENODEV; + + return 0; +} + +static int am200_unshare_video_mem(struct fb_info *info) +{ + dev_dbg(&am200_device->dev, "ENTER %s\n", __func__); + + if (info != am200_board.host_fbinfo) + return 0; + + module_put(am200_board.host_fbinfo->fbops->owner); + return 0; +} + +static int am200_fb_notifier_callback(struct notifier_block *self, + unsigned long event, void *data) +{ + struct fb_event *evdata = data; + struct fb_info *info = evdata->info; + + dev_dbg(&am200_device->dev, "ENTER %s\n", __func__); + + if (event == FB_EVENT_FB_REGISTERED) + return am200_share_video_mem(info); + else if (event == FB_EVENT_FB_UNREGISTERED) + return am200_unshare_video_mem(info); + + return 0; +} + +static struct notifier_block am200_fb_notif = { + .notifier_call = am200_fb_notifier_callback, +}; + +/* this gets called as part of our init. these steps must be done now so + * that we can use set_pxa_fb_info */ +static void __init am200_presetup_fb(void) +{ + int fw; + int fh; + int padding_size; + int totalsize; + + switch (panel_type) { + case 6: + am200_fb_info.modes = &am200_fb_mode_6inch; + break; + case 8: + am200_fb_info.modes = &am200_fb_mode_8inch; + break; + case 97: + am200_fb_info.modes = &am200_fb_mode_9inch7; + break; + default: + dev_err(&am200_device->dev, "invalid panel_type selection," + " setting to 6\n"); + am200_fb_info.modes = &am200_fb_mode_6inch; + break; + } + + /* the frame buffer is divided as follows: + command | CRC | padding + 16kb waveform data | CRC | padding + image data | CRC + */ + + fw = am200_fb_info.modes->xres; + fh = am200_fb_info.modes->yres; + + /* waveform must be 16k + 2 for checksum */ + am200_board.wfm_size = roundup(16*1024 + 2, fw); + + padding_size = PAGE_SIZE + (4 * fw); + + /* total is 1 cmd , 1 wfm, padding and image */ + totalsize = fw + am200_board.wfm_size + padding_size + (fw*fh); + + /* save this off because we're manipulating fw after this and + * we'll need it when we're ready to setup the framebuffer */ + am200_board.fw = fw; + am200_board.fh = fh; + + /* the reason we do this adjustment is because we want to acquire + * more framebuffer memory without imposing custom awareness on the + * underlying pxafb driver */ + am200_fb_info.modes->yres = DIV_ROUND_UP(totalsize, fw); + + /* we divide since we told the LCD controller we're 16bpp */ + am200_fb_info.modes->xres /= 2; + + set_pxa_fb_info(&am200_fb_info); + +} + +/* this gets called by metronomefb as part of its init, in our case, we + * have already completed initial framebuffer init in presetup_fb so we + * can just setup the fb access pointers */ +static int am200_setup_fb(struct metronomefb_par *par) +{ + int fw; + int fh; + + fw = am200_board.fw; + fh = am200_board.fh; + + /* metromem was set up by the notifier in share_video_mem so now + * we can use its value to calculate the other entries */ + par->metromem_cmd = (struct metromem_cmd *) am200_board.metromem; + par->metromem_wfm = am200_board.metromem + fw; + par->metromem_img = par->metromem_wfm + am200_board.wfm_size; + par->metromem_img_csum = (u16 *) (par->metromem_img + (fw * fh)); + par->metromem_dma = am200_board.host_fbinfo->fix.smem_start; + + return 0; +} + +static int am200_get_panel_type(void) +{ + return panel_type; +} + +static irqreturn_t am200_handle_irq(int irq, void *dev_id) +{ + struct metronomefb_par *par = dev_id; + + wake_up_interruptible(&par->waitq); + return IRQ_HANDLED; +} + +static int am200_setup_irq(struct fb_info *info) +{ + int ret; + + ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, + IRQF_DISABLED|IRQF_TRIGGER_FALLING, + "AM200", info->par); + if (ret) + dev_err(&am200_device->dev, "request_irq failed: %d\n", ret); + + return ret; +} + +static void am200_set_rst(struct metronomefb_par *par, int state) +{ + gpio_set_value(RST_GPIO_PIN, state); +} + +static void am200_set_stdby(struct metronomefb_par *par, int state) +{ + gpio_set_value(STDBY_GPIO_PIN, state); +} + +static int am200_wait_event(struct metronomefb_par *par) +{ + return wait_event_timeout(par->waitq, gpio_get_value(RDY_GPIO_PIN), HZ); +} + +static int am200_wait_event_intr(struct metronomefb_par *par) +{ + return wait_event_interruptible_timeout(par->waitq, + gpio_get_value(RDY_GPIO_PIN), HZ); +} + +static struct metronome_board am200_board = { + .owner = THIS_MODULE, + .setup_irq = am200_setup_irq, + .setup_io = am200_init_gpio_regs, + .setup_fb = am200_setup_fb, + .set_rst = am200_set_rst, + .set_stdby = am200_set_stdby, + .met_wait_event = am200_wait_event, + .met_wait_event_intr = am200_wait_event_intr, + .get_panel_type = am200_get_panel_type, + .cleanup = am200_cleanup, +}; + +static int __init am200_init(void) +{ + int ret; + + /* before anything else, we request notification for any fb + * creation events */ + fb_register_client(&am200_fb_notif); + + /* request our platform independent driver */ + request_module("metronomefb"); + + am200_device = platform_device_alloc("metronomefb", -1); + if (!am200_device) + return -ENOMEM; + + /* the am200_board that will be seen by metronomefb is a copy */ + platform_device_add_data(am200_device, &am200_board, + sizeof(am200_board)); + + /* this _add binds metronomefb to am200. metronomefb refcounts am200 */ + ret = platform_device_add(am200_device); + + if (ret) { + platform_device_put(am200_device); + fb_unregister_client(&am200_fb_notif); + return ret; + } + + am200_presetup_fb(); + + return 0; +} + +module_param(panel_type, uint, 0); +MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97"); + +module_init(am200_init); + +MODULE_DESCRIPTION("board driver for am200 metronome epd kit"); +MODULE_AUTHOR("Jaya Kumar"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c new file mode 100644 index 00000000000..83a4cdf0817 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x255.c @@ -0,0 +1,258 @@ +/* + * linux/arch/arm/mach-pxa/cm-x255.c + * + * Copyright (C) 2007, 2008 CompuLab, Ltd. + * Mike Rapoport <mike@compulab.co.il> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/nand-gpio.h> + +#include <linux/spi/spi.h> + +#include <asm/mach/arch.h> +#include <asm/mach-types.h> +#include <asm/mach/map.h> + +#include <mach/pxa2xx-regs.h> +#include <mach/mfp-pxa25x.h> +#include <mach/pxa2xx_spi.h> +#include <mach/bitfield.h> + +#include "generic.h" + +#define GPIO_NAND_CS (5) +#define GPIO_NAND_ALE (4) +#define GPIO_NAND_CLE (3) +#define GPIO_NAND_RB (10) + +static unsigned long cmx255_pin_config[] = { + /* AC'97 */ + GPIO28_AC97_BITCLK, + GPIO29_AC97_SDATA_IN_0, + GPIO30_AC97_SDATA_OUT, + GPIO31_AC97_SYNC, + + /* BTUART */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_BTUART_RTS, + + /* STUART */ + GPIO46_STUART_RXD, + GPIO47_STUART_TXD, + + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + + /* SSP1 */ + GPIO23_SSP1_SCLK, + GPIO24_SSP1_SFRM, + GPIO25_SSP1_TXD, + GPIO26_SSP1_RXD, + + /* SSP2 */ + GPIO81_SSP2_CLK_OUT, + GPIO82_SSP2_FRM_OUT, + GPIO83_SSP2_TXD, + GPIO84_SSP2_RXD, + + /* PC Card */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO52_nPCE_1, + GPIO53_nPCE_2, + GPIO54_nPSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + + /* SDRAM and local bus */ + GPIO15_nCS_1, + GPIO78_nCS_2, + GPIO79_nCS_3, + GPIO80_nCS_4, + GPIO33_nCS_5, + GPIO18_RDY, + + /* GPIO */ + GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, + GPIO9_GPIO, /* PC card reset */ + + /* NAND controls */ + GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ + GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */ + GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */ + GPIO10_GPIO, /* NAND Ready/Busy */ + + /* interrupts */ + GPIO22_GPIO, /* DM9000 interrupt */ +}; + +#if defined(CONFIG_SPI_PXA2XX) +static struct pxa2xx_spi_master pxa_ssp_master_info = { + .num_chipselect = 1, +}; + +static struct spi_board_info spi_board_info[] __initdata = { + [0] = { + .modalias = "rtc-max6902", + .max_speed_hz = 1000000, + .bus_num = 1, + .chip_select = 0, + }, +}; + +static void __init cmx255_init_rtc(void) +{ + pxa2xx_set_spi_info(1, &pxa_ssp_master_info); + spi_register_board_info(ARRAY_AND_SIZE(spi_board_info)); +} +#else +static inline void cmx255_init_rtc(void) {} +#endif + +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) +static struct mtd_partition cmx255_nor_partitions[] = { + { + .name = "ARMmon", + .size = 0x00030000, + .offset = 0, + .mask_flags = MTD_WRITEABLE /* force read-only */ + } , { + .name = "ARMmon setup block", + .size = 0x00010000, + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE /* force read-only */ + } , { + .name = "kernel", + .size = 0x00160000, + .offset = MTDPART_OFS_APPEND, + } , { + .name = "ramdisk", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND + } +}; + +static struct physmap_flash_data cmx255_nor_flash_data[] = { + { + .width = 2, /* bankwidth in bytes */ + .parts = cmx255_nor_partitions, + .nr_parts = ARRAY_SIZE(cmx255_nor_partitions) + } +}; + +static struct resource cmx255_nor_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_8M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device cmx255_nor = { + .name = "physmap-flash", + .id = -1, + .dev = { + .platform_data = cmx255_nor_flash_data, + }, + .resource = &cmx255_nor_resource, + .num_resources = 1, +}; + +static void __init cmx255_init_nor(void) +{ + platform_device_register(&cmx255_nor); +} +#else +static inline void cmx255_init_nor(void) {} +#endif + +#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) +static struct resource cmx255_nand_resource[] = { + [0] = { + .start = PXA_CS1_PHYS, + .end = PXA_CS1_PHYS + 11, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PXA_CS5_PHYS, + .end = PXA_CS5_PHYS + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mtd_partition cmx255_nand_parts[] = { + [0] = { + .name = "cmx255-nand", + .size = MTDPART_SIZ_FULL, + .offset = 0, + }, +}; + +static struct gpio_nand_platdata cmx255_nand_platdata = { + .gpio_nce = GPIO_NAND_CS, + .gpio_cle = GPIO_NAND_CLE, + .gpio_ale = GPIO_NAND_ALE, + .gpio_rdy = GPIO_NAND_RB, + .gpio_nwp = -1, + .parts = cmx255_nand_parts, + .num_parts = ARRAY_SIZE(cmx255_nand_parts), + .chip_delay = 25, +}; + +static struct platform_device cmx255_nand = { + .name = "gpio-nand", + .num_resources = ARRAY_SIZE(cmx255_nand_resource), + .resource = cmx255_nand_resource, + .id = -1, + .dev = { + .platform_data = &cmx255_nand_platdata, + } +}; + +static void __init cmx255_init_nand(void) +{ + platform_device_register(&cmx255_nand); +} +#else +static inline void cmx255_init_nand(void) {} +#endif + +void __init cmx255_init(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); + + cmx255_init_rtc(); + cmx255_init_nor(); + cmx255_init_nand(); +} diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h deleted file mode 100644 index 48f532f4cb5..00000000000 --- a/arch/arm/mach-pxa/cm-x270-pci.h +++ /dev/null @@ -1,13 +0,0 @@ -extern void __cmx270_pci_init_irq(int irq_gpio); -extern void __cmx270_pci_suspend(void); -extern void __cmx270_pci_resume(void); - -#ifdef CONFIG_PCI -#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x) -#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x) -#define cmx270_pci_resume(x) __cmx270_pci_resume(x) -#else -#define cmx270_pci_init_irq(x) do {} while (0) -#define cmx270_pci_suspend(x) do {} while (0) -#define cmx270_pci_resume(x) do {} while (0) -#endif diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index af003a26953..df83b97f303 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -14,46 +14,22 @@ #include <linux/irq.h> #include <linux/gpio.h> -#include <linux/dm9000.h> #include <linux/rtc-v3020.h> #include <video/mbxfb.h> -#include <linux/leds.h> -#include <asm/mach/arch.h> -#include <asm/mach-types.h> -#include <asm/mach/map.h> - -#include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa27x.h> -#include <mach/pxa-regs.h> -#include <mach/audio.h> -#include <mach/pxafb.h> #include <mach/ohci.h> #include <mach/mmc.h> -#include <mach/bitfield.h> - -#include <asm/hardware/it8152.h> #include "generic.h" -#include "cm-x270-pci.h" - -/* virtual addresses for statically mapped regions */ -#define CMX270_VIRT_BASE (0xe8000000) -#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE) +/* physical address if local-bus attached devices */ #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) -#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) /* GPIO IRQ usage */ -#define GPIO10_ETHIRQ (10) -#define GPIO22_IT8152_IRQ (22) #define GPIO83_MMC_IRQ (83) -#define GPIO95_GFXIRQ (95) -#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) -#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ) #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) -#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ) /* MMC power enable */ #define GPIO105_MMC_POWER (105) @@ -157,62 +133,6 @@ static unsigned long cmx270_pin_config[] = { GPIO83_GPIO, /* MMC card detect */ }; -#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) -static struct resource cmx270_dm9000_resource[] = { - [0] = { - .start = DM9000_PHYS_BASE, - .end = DM9000_PHYS_BASE + 4, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DM9000_PHYS_BASE + 8, - .end = DM9000_PHYS_BASE + 8 + 500, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = CMX270_ETHIRQ, - .end = CMX270_ETHIRQ, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } -}; - -static struct dm9000_plat_data cmx270_dm9000_platdata = { - .flags = DM9000_PLATF_32BITONLY, -}; - -static struct platform_device cmx270_dm9000_device = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), - .resource = cmx270_dm9000_resource, - .dev = { - .platform_data = &cmx270_dm9000_platdata, - } -}; - -static void __init cmx270_init_dm9000(void) -{ - platform_device_register(&cmx270_dm9000_device); -} -#else -static inline void cmx270_init_dm9000(void) {} -#endif - -/* UCB1400 touchscreen controller */ -#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) -static struct platform_device cmx270_ts_device = { - .name = "ucb1400_ts", - .id = -1, -}; - -static void __init cmx270_init_touchscreen(void) -{ - platform_device_register(&cmx270_ts_device); -} -#else -static inline void cmx270_init_touchscreen(void) {} -#endif - /* V3020 RTC */ #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) static struct resource cmx270_v3020_resource[] = { @@ -245,44 +165,6 @@ static void __init cmx270_init_rtc(void) static inline void cmx270_init_rtc(void) {} #endif -/* CM-X270 LEDs */ -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static struct gpio_led cmx270_leds[] = { - [0] = { - .name = "cm-x270:red", - .default_trigger = "nand-disk", - .gpio = 93, - .active_low = 1, - }, - [1] = { - .name = "cm-x270:green", - .default_trigger = "heartbeat", - .gpio = 94, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data cmx270_gpio_led_pdata = { - .num_leds = ARRAY_SIZE(cmx270_leds), - .leds = cmx270_leds, -}; - -static struct platform_device cmx270_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &cmx270_gpio_led_pdata, - }, -}; - -static void __init cmx270_init_leds(void) -{ - platform_device_register(&cmx270_led_device); -} -#else -static inline void cmx270_init_leds(void) {} -#endif - /* 2700G graphics */ #if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE) static u64 fb_dma_mask = ~(u64)0; @@ -373,238 +255,11 @@ static void __init cmx270_init_2700G(void) static inline void cmx270_init_2700G(void) {} #endif -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -/* - Display definitions - keep these for backwards compatibility, although symbolic names (as - e.g. in lpd270.c) looks better -*/ -#define MTYPE_STN320x240 0 -#define MTYPE_TFT640x480 1 -#define MTYPE_CRT640x480 2 -#define MTYPE_CRT800x600 3 -#define MTYPE_TFT320x240 6 -#define MTYPE_STN640x480 7 - -static struct pxafb_mode_info generic_stn_320x240_mode = { - .pixclock = 76923, - .bpp = 8, - .xres = 320, - .yres = 240, - .hsync_len = 3, - .vsync_len = 2, - .left_margin = 3, - .upper_margin = 0, - .right_margin = 3, - .lower_margin = 0, - .sync = (FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT), - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_stn_320x240 = { - .modes = &generic_stn_320x240_mode, - .num_modes = 1, - .lccr0 = 0, - .lccr3 = (LCCR3_PixClkDiv(0x03) | - LCCR3_Acb(0xff) | - LCCR3_PCP), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mode_info generic_tft_640x480_mode = { - .pixclock = 38461, - .bpp = 8, - .xres = 640, - .yres = 480, - .hsync_len = 60, - .vsync_len = 2, - .left_margin = 70, - .upper_margin = 10, - .right_margin = 70, - .lower_margin = 5, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_tft_640x480 = { - .modes = &generic_tft_640x480_mode, - .num_modes = 1, - .lccr0 = (LCCR0_PAS), - .lccr3 = (LCCR3_PixClkDiv(0x01) | - LCCR3_Acb(0xff) | - LCCR3_PCP), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mode_info generic_crt_640x480_mode = { - .pixclock = 38461, - .bpp = 8, - .xres = 640, - .yres = 480, - .hsync_len = 63, - .vsync_len = 2, - .left_margin = 81, - .upper_margin = 33, - .right_margin = 16, - .lower_margin = 10, - .sync = (FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT), - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_crt_640x480 = { - .modes = &generic_crt_640x480_mode, - .num_modes = 1, - .lccr0 = (LCCR0_PAS), - .lccr3 = (LCCR3_PixClkDiv(0x01) | - LCCR3_Acb(0xff)), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mode_info generic_crt_800x600_mode = { - .pixclock = 28846, - .bpp = 8, - .xres = 800, - .yres = 600, - .hsync_len = 63, - .vsync_len = 2, - .left_margin = 26, - .upper_margin = 21, - .right_margin = 26, - .lower_margin = 11, - .sync = (FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT), - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_crt_800x600 = { - .modes = &generic_crt_800x600_mode, - .num_modes = 1, - .lccr0 = (LCCR0_PAS), - .lccr3 = (LCCR3_PixClkDiv(0x02) | - LCCR3_Acb(0xff)), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mode_info generic_tft_320x240_mode = { - .pixclock = 134615, - .bpp = 16, - .xres = 320, - .yres = 240, - .hsync_len = 63, - .vsync_len = 7, - .left_margin = 75, - .upper_margin = 0, - .right_margin = 15, - .lower_margin = 15, - .sync = 0, - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_tft_320x240 = { - .modes = &generic_tft_320x240_mode, - .num_modes = 1, - .lccr0 = (LCCR0_PAS), - .lccr3 = (LCCR3_PixClkDiv(0x06) | - LCCR3_Acb(0xff) | - LCCR3_PCP), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mode_info generic_stn_640x480_mode = { - .pixclock = 57692, - .bpp = 8, - .xres = 640, - .yres = 480, - .hsync_len = 4, - .vsync_len = 2, - .left_margin = 10, - .upper_margin = 5, - .right_margin = 10, - .lower_margin = 5, - .sync = (FB_SYNC_HOR_HIGH_ACT | - FB_SYNC_VERT_HIGH_ACT), - .cmap_greyscale = 0, -}; - -static struct pxafb_mach_info generic_stn_640x480 = { - .modes = &generic_stn_640x480_mode, - .num_modes = 1, - .lccr0 = 0, - .lccr3 = (LCCR3_PixClkDiv(0x02) | - LCCR3_Acb(0xff)), - .cmap_inverse = 0, - .cmap_static = 0, -}; - -static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480; - -static int __init cmx270_set_display(char *str) -{ - int disp_type = simple_strtol(str, NULL, 0); - switch (disp_type) { - case MTYPE_STN320x240: - cmx270_display = &generic_stn_320x240; - break; - case MTYPE_TFT640x480: - cmx270_display = &generic_tft_640x480; - break; - case MTYPE_CRT640x480: - cmx270_display = &generic_crt_640x480; - break; - case MTYPE_CRT800x600: - cmx270_display = &generic_crt_800x600; - break; - case MTYPE_TFT320x240: - cmx270_display = &generic_tft_320x240; - break; - case MTYPE_STN640x480: - cmx270_display = &generic_stn_640x480; - break; - default: /* fallback to CRT 640x480 */ - cmx270_display = &generic_crt_640x480; - break; - } - return 1; -} - -/* - This should be done really early to get proper configuration for - frame buffer. - Indeed, pxafb parameters can be used istead, but CM-X270 bootloader - has limitied line length for kernel command line, and also it will - break compatibitlty with proprietary releases already in field. -*/ -__setup("monitor=", cmx270_set_display); - -static void __init cmx270_init_display(void) -{ - set_pxa_fb_info(cmx270_display); -} -#else -static inline void cmx270_init_display(void) {} -#endif - /* PXA27x OHCI controller setup */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static int cmx270_ohci_init(struct device *dev) -{ - /* Set the Power Control Polarity Low */ - UHCHR = (UHCHR | UHCHR_PCPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); - - return 0; -} - static struct pxaohci_platform_data cmx270_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = cmx270_ohci_init, + .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, }; static void __init cmx270_init_ohci(void) @@ -676,131 +331,12 @@ static void __init cmx270_init_mmc(void) static inline void cmx270_init_mmc(void) {} #endif -#ifdef CONFIG_PM -static unsigned long sleep_save_msc[10]; - -static int cmx270_suspend(struct sys_device *dev, pm_message_t state) -{ - cmx270_pci_suspend(); - - /* save MSC registers */ - sleep_save_msc[0] = MSC0; - sleep_save_msc[1] = MSC1; - sleep_save_msc[2] = MSC2; - - /* setup power saving mode registers */ - PCFR = 0x0; - PSLR = 0xff400000; - PMCR = 0x00000005; - PWER = 0x80000000; - PFER = 0x00000000; - PRER = 0x00000000; - PGSR0 = 0xC0018800; - PGSR1 = 0x004F0002; - PGSR2 = 0x6021C000; - PGSR3 = 0x00020000; - - return 0; -} - -static int cmx270_resume(struct sys_device *dev) -{ - cmx270_pci_resume(); - - /* restore MSC registers */ - MSC0 = sleep_save_msc[0]; - MSC1 = sleep_save_msc[1]; - MSC2 = sleep_save_msc[2]; - - return 0; -} - -static struct sysdev_class cmx270_pm_sysclass = { - .name = "pm", - .resume = cmx270_resume, - .suspend = cmx270_suspend, -}; - -static struct sys_device cmx270_pm_device = { - .cls = &cmx270_pm_sysclass, -}; - -static int __init cmx270_pm_init(void) -{ - int error; - error = sysdev_class_register(&cmx270_pm_sysclass); - if (error == 0) - error = sysdev_register(&cmx270_pm_device); - return error; -} -#else -static int __init cmx270_pm_init(void) { return 0; } -#endif - -#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) -static void __init cmx270_init_ac97(void) -{ - pxa_set_ac97_info(NULL); -} -#else -static inline void cmx270_init_ac97(void) {} -#endif - -static void __init cmx270_init(void) +void __init cmx270_init(void) { - cmx270_pm_init(); - pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); - cmx270_init_dm9000(); cmx270_init_rtc(); - cmx270_init_display(); cmx270_init_mmc(); cmx270_init_ohci(); - cmx270_init_ac97(); - cmx270_init_touchscreen(); - cmx270_init_leds(); cmx270_init_2700G(); } - -static void __init cmx270_init_irq(void) -{ - pxa27x_init_irq(); - - cmx270_pci_init_irq(GPIO22_IT8152_IRQ); -} - -#ifdef CONFIG_PCI -/* Map PCI companion statically */ -static struct map_desc cmx270_io_desc[] __initdata = { - [0] = { /* PCI bridge */ - .virtual = CMX270_IT8152_VIRT, - .pfn = __phys_to_pfn(PXA_CS4_PHYS), - .length = SZ_64M, - .type = MT_DEVICE - }, -}; - -static void __init cmx270_map_io(void) -{ - pxa_map_io(); - iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc)); - - it8152_base_address = CMX270_IT8152_VIRT; -} -#else -static void __init cmx270_map_io(void) -{ - pxa_map_io(); -} -#endif - -MACHINE_START(ARMCORE, "Compulab CM-x270") - .boot_params = 0xa0000100, - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .map_io = cmx270_map_io, - .init_irq = cmx270_init_irq, - .timer = &pxa_timer, - .init_machine = cmx270_init, -MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 2d5bcea1e52..3156b25f6e9 100644 --- a/arch/arm/mach-pxa/cm-x270-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-pxa/cm-x270-pci.c + * linux/arch/arm/mach-pxa/cm-x2xx-pci.c * * PCI bios-type initialisation for PCI machines * @@ -28,7 +28,7 @@ #include <asm/hardware/it8152.h> unsigned long it8152_base_address; -static int cmx270_it8152_irq_gpio; +static int cmx2xx_it8152_irq_gpio; /* * Only first 64MB of memory can be accessed via PCI. @@ -36,13 +36,13 @@ static int cmx270_it8152_irq_gpio; * This is really ugly and we need a better way of specifying * DMA-capable regions of memory. */ -void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, +void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size) { unsigned int sz = SZ_64M >> PAGE_SHIFT; if (machine_is_armcore()) { - pr_info("Adjusting zones for CM-X270\n"); + pr_info("Adjusting zones for CM-X2XX\n"); /* * Only adjust if > 64M on current system @@ -57,29 +57,29 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, } } -static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) +static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) { /* clear our parent irq */ - GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio); + GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio); it8152_irq_demux(irq, desc); } -void __cmx270_pci_init_irq(int irq_gpio) +void __cmx2xx_pci_init_irq(int irq_gpio) { it8152_init_irq(); - cmx270_it8152_irq_gpio = irq_gpio; + cmx2xx_it8152_irq_gpio = irq_gpio; set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); - set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux); + set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); } #ifdef CONFIG_PM static unsigned long sleep_save_ite[10]; -void __cmx270_pci_suspend(void) +void __cmx2xx_pci_suspend(void) { /* save ITE state */ sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); @@ -91,7 +91,7 @@ void __cmx270_pci_suspend(void) __raw_writel((0), IT8152_INTC_LPCNIRR); } -void __cmx270_pci_resume(void) +void __cmx2xx_pci_resume(void) { /* restore IT8152 state */ __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); @@ -99,12 +99,12 @@ void __cmx270_pci_resume(void) __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); } #else -void cmx270_pci_suspend(void) {} -void cmx270_pci_resume(void) {} +void cmx2xx_pci_suspend(void) {} +void cmx2xx_pci_resume(void) {} #endif /* PCI IRQ mapping*/ -static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; @@ -116,14 +116,14 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) /* Here comes the ugly part. The routing is baseboard specific, - but defining a platform for each possible base of CM-X270 is - unrealistic. Here we keep mapping for ATXBase and SB-X270. + but defining a platform for each possible base of CM-X2XX is + unrealistic. Here we keep mapping for ATXBase and SB-X2XX. */ /* ATXBASE PCI slot */ if (slot == 7) return IT8152_PCI_INTA; - /* ATXBase/SB-x270 CardBus */ + /* ATXBase/SB-X2XX CardBus */ if (slot == 8 || slot == 0) return IT8152_PCI_INTB; @@ -131,7 +131,11 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) if (slot == 9) return IT8152_PCI_INTA; - /* SB-x270 Ethernet */ + /* CM-x255 Onboard Ethernet */ + if (slot == 15) + return IT8152_PCI_INTC; + + /* SB-x2xx Ethernet */ if (slot == 16) return IT8152_PCI_INTA; @@ -144,9 +148,9 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return(0); } -static void cmx270_pci_preinit(void) +static void cmx2xx_pci_preinit(void) { - pr_info("Initializing CM-X270 PCI subsystem\n"); + pr_info("Initializing CM-X2XX PCI subsystem\n"); __raw_writel(0x800, IT8152_PCI_CFG_ADDR); if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { @@ -200,21 +204,21 @@ static void cmx270_pci_preinit(void) } } -static struct hw_pci cmx270_pci __initdata = { +static struct hw_pci cmx2xx_pci __initdata = { .swizzle = pci_std_swizzle, - .map_irq = cmx270_pci_map_irq, + .map_irq = cmx2xx_pci_map_irq, .nr_controllers = 1, .setup = it8152_pci_setup, .scan = it8152_pci_scan_bus, - .preinit = cmx270_pci_preinit, + .preinit = cmx2xx_pci_preinit, }; -static int __init cmx270_init_pci(void) +static int __init cmx2xx_init_pci(void) { if (machine_is_armcore()) - pci_common_init(&cmx270_pci); + pci_common_init(&cmx2xx_pci); return 0; } -subsys_initcall(cmx270_init_pci); +subsys_initcall(cmx2xx_init_pci); diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.h b/arch/arm/mach-pxa/cm-x2xx-pci.h new file mode 100644 index 00000000000..e24aad2e3ad --- /dev/null +++ b/arch/arm/mach-pxa/cm-x2xx-pci.h @@ -0,0 +1,13 @@ +extern void __cmx2xx_pci_init_irq(int irq_gpio); +extern void __cmx2xx_pci_suspend(void); +extern void __cmx2xx_pci_resume(void); + +#ifdef CONFIG_PCI +#define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x) +#define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x) +#define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x) +#else +#define cmx2xx_pci_init_irq(x) do {} while (0) +#define cmx2xx_pci_suspend(x) do {} while (0) +#define cmx2xx_pci_resume(x) do {} while (0) +#endif diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c new file mode 100644 index 00000000000..0b3ce3b6d89 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -0,0 +1,531 @@ +/* + * linux/arch/arm/mach-pxa/cm-x2xx.c + * + * Copyright (C) 2008 CompuLab, Ltd. + * Mike Rapoport <mike@compulab.co.il> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/irq.h> +#include <linux/gpio.h> + +#include <linux/dm9000.h> +#include <linux/leds.h> + +#include <asm/mach/arch.h> +#include <asm/mach-types.h> +#include <asm/mach/map.h> + +#include <mach/pxa2xx-regs.h> +#include <mach/mfp-pxa27x.h> +#include <mach/pxa-regs.h> +#include <mach/audio.h> +#include <mach/pxafb.h> + +#include <asm/hardware/it8152.h> + +#include "generic.h" +#include "cm-x2xx-pci.h" + +extern void cmx255_init(void); +extern void cmx270_init(void); + +/* virtual addresses for statically mapped regions */ +#define CMX2XX_VIRT_BASE (0xe8000000) +#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) + +/* physical address if local-bus attached devices */ +#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22)) +#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) + +/* leds */ +#define CMX255_GPIO_RED (27) +#define CMX255_GPIO_GREEN (32) +#define CMX270_GPIO_RED (93) +#define CMX270_GPIO_GREEN (94) + +/* GPIO IRQ usage */ +#define GPIO22_ETHIRQ (22) +#define GPIO10_ETHIRQ (10) +#define CMX255_GPIO_IT8152_IRQ (0) +#define CMX270_GPIO_IT8152_IRQ (22) + +#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) +#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) + +#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) +static struct resource cmx255_dm9000_resource[] = { + [0] = { + .start = CMX255_DM9000_PHYS_BASE, + .end = CMX255_DM9000_PHYS_BASE + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CMX255_DM9000_PHYS_BASE + 4, + .end = CMX255_DM9000_PHYS_BASE + 4 + 500, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = CMX255_ETHIRQ, + .end = CMX255_ETHIRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + } +}; + +static struct resource cmx270_dm9000_resource[] = { + [0] = { + .start = CMX270_DM9000_PHYS_BASE, + .end = CMX270_DM9000_PHYS_BASE + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CMX270_DM9000_PHYS_BASE + 8, + .end = CMX270_DM9000_PHYS_BASE + 8 + 500, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = CMX270_ETHIRQ, + .end = CMX270_ETHIRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + } +}; + +static struct dm9000_plat_data cmx270_dm9000_platdata = { + .flags = DM9000_PLATF_32BITONLY, +}; + +static struct platform_device cmx2xx_dm9000_device = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), + .dev = { + .platform_data = &cmx270_dm9000_platdata, + } +}; + +static void __init cmx2xx_init_dm9000(void) +{ + if (cpu_is_pxa25x()) + cmx2xx_dm9000_device.resource = cmx255_dm9000_resource; + else + cmx2xx_dm9000_device.resource = cmx270_dm9000_resource; + platform_device_register(&cmx2xx_dm9000_device); +} +#else +static inline void cmx2xx_init_dm9000(void) {} +#endif + +/* UCB1400 touchscreen controller */ +#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) +static struct platform_device cmx2xx_ts_device = { + .name = "ucb1400_ts", + .id = -1, +}; + +static void __init cmx2xx_init_touchscreen(void) +{ + platform_device_register(&cmx2xx_ts_device); +} +#else +static inline void cmx2xx_init_touchscreen(void) {} +#endif + +/* CM-X270 LEDs */ +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +static struct gpio_led cmx2xx_leds[] = { + [0] = { + .name = "cm-x2xx:red", + .default_trigger = "nand-disk", + .active_low = 1, + }, + [1] = { + .name = "cm-x2xx:green", + .default_trigger = "heartbeat", + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = { + .num_leds = ARRAY_SIZE(cmx2xx_leds), + .leds = cmx2xx_leds, +}; + +static struct platform_device cmx2xx_led_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &cmx2xx_gpio_led_pdata, + }, +}; + +static void __init cmx2xx_init_leds(void) +{ + if (cpu_is_pxa25x()) { + cmx2xx_leds[0].gpio = CMX255_GPIO_RED; + cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN; + } else { + cmx2xx_leds[0].gpio = CMX270_GPIO_RED; + cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN; + } + platform_device_register(&cmx2xx_led_device); +} +#else +static inline void cmx2xx_init_leds(void) {} +#endif + +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) +/* + Display definitions + keep these for backwards compatibility, although symbolic names (as + e.g. in lpd270.c) looks better +*/ +#define MTYPE_STN320x240 0 +#define MTYPE_TFT640x480 1 +#define MTYPE_CRT640x480 2 +#define MTYPE_CRT800x600 3 +#define MTYPE_TFT320x240 6 +#define MTYPE_STN640x480 7 + +static struct pxafb_mode_info generic_stn_320x240_mode = { + .pixclock = 76923, + .bpp = 8, + .xres = 320, + .yres = 240, + .hsync_len = 3, + .vsync_len = 2, + .left_margin = 3, + .upper_margin = 0, + .right_margin = 3, + .lower_margin = 0, + .sync = (FB_SYNC_HOR_HIGH_ACT | + FB_SYNC_VERT_HIGH_ACT), + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_stn_320x240 = { + .modes = &generic_stn_320x240_mode, + .num_modes = 1, + .lccr0 = 0, + .lccr3 = (LCCR3_PixClkDiv(0x03) | + LCCR3_Acb(0xff) | + LCCR3_PCP), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mode_info generic_tft_640x480_mode = { + .pixclock = 38461, + .bpp = 8, + .xres = 640, + .yres = 480, + .hsync_len = 60, + .vsync_len = 2, + .left_margin = 70, + .upper_margin = 10, + .right_margin = 70, + .lower_margin = 5, + .sync = 0, + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_tft_640x480 = { + .modes = &generic_tft_640x480_mode, + .num_modes = 1, + .lccr0 = (LCCR0_PAS), + .lccr3 = (LCCR3_PixClkDiv(0x01) | + LCCR3_Acb(0xff) | + LCCR3_PCP), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mode_info generic_crt_640x480_mode = { + .pixclock = 38461, + .bpp = 8, + .xres = 640, + .yres = 480, + .hsync_len = 63, + .vsync_len = 2, + .left_margin = 81, + .upper_margin = 33, + .right_margin = 16, + .lower_margin = 10, + .sync = (FB_SYNC_HOR_HIGH_ACT | + FB_SYNC_VERT_HIGH_ACT), + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_crt_640x480 = { + .modes = &generic_crt_640x480_mode, + .num_modes = 1, + .lccr0 = (LCCR0_PAS), + .lccr3 = (LCCR3_PixClkDiv(0x01) | + LCCR3_Acb(0xff)), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mode_info generic_crt_800x600_mode = { + .pixclock = 28846, + .bpp = 8, + .xres = 800, + .yres = 600, + .hsync_len = 63, + .vsync_len = 2, + .left_margin = 26, + .upper_margin = 21, + .right_margin = 26, + .lower_margin = 11, + .sync = (FB_SYNC_HOR_HIGH_ACT | + FB_SYNC_VERT_HIGH_ACT), + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_crt_800x600 = { + .modes = &generic_crt_800x600_mode, + .num_modes = 1, + .lccr0 = (LCCR0_PAS), + .lccr3 = (LCCR3_PixClkDiv(0x02) | + LCCR3_Acb(0xff)), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mode_info generic_tft_320x240_mode = { + .pixclock = 134615, + .bpp = 16, + .xres = 320, + .yres = 240, + .hsync_len = 63, + .vsync_len = 7, + .left_margin = 75, + .upper_margin = 0, + .right_margin = 15, + .lower_margin = 15, + .sync = 0, + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_tft_320x240 = { + .modes = &generic_tft_320x240_mode, + .num_modes = 1, + .lccr0 = (LCCR0_PAS), + .lccr3 = (LCCR3_PixClkDiv(0x06) | + LCCR3_Acb(0xff) | + LCCR3_PCP), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mode_info generic_stn_640x480_mode = { + .pixclock = 57692, + .bpp = 8, + .xres = 640, + .yres = 480, + .hsync_len = 4, + .vsync_len = 2, + .left_margin = 10, + .upper_margin = 5, + .right_margin = 10, + .lower_margin = 5, + .sync = (FB_SYNC_HOR_HIGH_ACT | + FB_SYNC_VERT_HIGH_ACT), + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info generic_stn_640x480 = { + .modes = &generic_stn_640x480_mode, + .num_modes = 1, + .lccr0 = 0, + .lccr3 = (LCCR3_PixClkDiv(0x02) | + LCCR3_Acb(0xff)), + .cmap_inverse = 0, + .cmap_static = 0, +}; + +static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480; + +static int __init cmx2xx_set_display(char *str) +{ + int disp_type = simple_strtol(str, NULL, 0); + switch (disp_type) { + case MTYPE_STN320x240: + cmx2xx_display = &generic_stn_320x240; + break; + case MTYPE_TFT640x480: + cmx2xx_display = &generic_tft_640x480; + break; + case MTYPE_CRT640x480: + cmx2xx_display = &generic_crt_640x480; + break; + case MTYPE_CRT800x600: + cmx2xx_display = &generic_crt_800x600; + break; + case MTYPE_TFT320x240: + cmx2xx_display = &generic_tft_320x240; + break; + case MTYPE_STN640x480: + cmx2xx_display = &generic_stn_640x480; + break; + default: /* fallback to CRT 640x480 */ + cmx2xx_display = &generic_crt_640x480; + break; + } + return 1; +} + +/* + This should be done really early to get proper configuration for + frame buffer. + Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader + has limitied line length for kernel command line, and also it will + break compatibitlty with proprietary releases already in field. +*/ +__setup("monitor=", cmx2xx_set_display); + +static void __init cmx2xx_init_display(void) +{ + set_pxa_fb_info(cmx2xx_display); +} +#else +static inline void cmx2xx_init_display(void) {} +#endif + +#ifdef CONFIG_PM +static unsigned long sleep_save_msc[10]; + +static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) +{ + cmx2xx_pci_suspend(); + + /* save MSC registers */ + sleep_save_msc[0] = MSC0; + sleep_save_msc[1] = MSC1; + sleep_save_msc[2] = MSC2; + + /* setup power saving mode registers */ + PCFR = 0x0; + PSLR = 0xff400000; + PMCR = 0x00000005; + PWER = 0x80000000; + PFER = 0x00000000; + PRER = 0x00000000; + PGSR0 = 0xC0018800; + PGSR1 = 0x004F0002; + PGSR2 = 0x6021C000; + PGSR3 = 0x00020000; + + return 0; +} + +static int cmx2xx_resume(struct sys_device *dev) +{ + cmx2xx_pci_resume(); + + /* restore MSC registers */ + MSC0 = sleep_save_msc[0]; + MSC1 = sleep_save_msc[1]; + MSC2 = sleep_save_msc[2]; + + return 0; +} + +static struct sysdev_class cmx2xx_pm_sysclass = { + .name = "pm", + .resume = cmx2xx_resume, + .suspend = cmx2xx_suspend, +}; + +static struct sys_device cmx2xx_pm_device = { + .cls = &cmx2xx_pm_sysclass, +}; + +static int __init cmx2xx_pm_init(void) +{ + int error; + error = sysdev_class_register(&cmx2xx_pm_sysclass); + if (error == 0) + error = sysdev_register(&cmx2xx_pm_device); + return error; +} +#else +static int __init cmx2xx_pm_init(void) { return 0; } +#endif + +#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) +static void __init cmx2xx_init_ac97(void) +{ + pxa_set_ac97_info(NULL); +} +#else +static inline void cmx2xx_init_ac97(void) {} +#endif + +static void __init cmx2xx_init(void) +{ + cmx2xx_pm_init(); + + if (cpu_is_pxa25x()) + cmx255_init(); + else + cmx270_init(); + + cmx2xx_init_dm9000(); + cmx2xx_init_display(); + cmx2xx_init_ac97(); + cmx2xx_init_touchscreen(); + cmx2xx_init_leds(); +} + +static void __init cmx2xx_init_irq(void) +{ + pxa27x_init_irq(); + + if (cpu_is_pxa25x()) { + pxa25x_init_irq(); + cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); + } else { + pxa27x_init_irq(); + cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ); + } +} + +#ifdef CONFIG_PCI +/* Map PCI companion statically */ +static struct map_desc cmx2xx_io_desc[] __initdata = { + [0] = { /* PCI bridge */ + .virtual = CMX2XX_IT8152_VIRT, + .pfn = __phys_to_pfn(PXA_CS4_PHYS), + .length = SZ_64M, + .type = MT_DEVICE + }, +}; + +static void __init cmx2xx_map_io(void) +{ + pxa_map_io(); + iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); + + it8152_base_address = CMX2XX_IT8152_VIRT; +} +#else +static void __init cmx2xx_map_io(void) +{ + pxa_map_io(); +} +#endif + +MACHINE_START(ARMCORE, "Compulab CM-X2XX") + .boot_params = 0xa0000100, + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .map_io = cmx2xx_map_io, + .init_irq = cmx2xx_init_irq, + .timer = &pxa_timer, + .init_machine = cmx2xx_init, +MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c new file mode 100644 index 00000000000..deb46cd144b --- /dev/null +++ b/arch/arm/mach-pxa/cm-x300.c @@ -0,0 +1,465 @@ +/* + * linux/arch/arm/mach-pxa/cm-x300.c + * + * Support for the CompuLab CM-X300 modules + * + * Copyright (C) 2008 CompuLab Ltd. + * + * Mike Rapoport <mike@compulab.co.il> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/platform_device.h> + +#include <linux/gpio.h> +#include <linux/dm9000.h> +#include <linux/leds.h> + +#include <linux/i2c.h> +#include <linux/i2c/pca953x.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <mach/mfp-pxa300.h> + +#include <mach/hardware.h> +#include <mach/gpio.h> +#include <mach/pxafb.h> +#include <mach/mmc.h> +#include <mach/ohci.h> +#include <mach/i2c.h> +#include <mach/pxa3xx_nand.h> + +#include <asm/mach/map.h> + +#include "generic.h" + +#define CM_X300_ETH_PHYS 0x08000010 + +#define GPIO82_MMC2_IRQ (82) +#define GPIO85_MMC2_WP (85) + +#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ) + +static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { + /* LCD */ + GPIO54_LCD_LDD_0, + GPIO55_LCD_LDD_1, + GPIO56_LCD_LDD_2, + GPIO57_LCD_LDD_3, + GPIO58_LCD_LDD_4, + GPIO59_LCD_LDD_5, + GPIO60_LCD_LDD_6, + GPIO61_LCD_LDD_7, + GPIO62_LCD_LDD_8, + GPIO63_LCD_LDD_9, + GPIO64_LCD_LDD_10, + GPIO65_LCD_LDD_11, + GPIO66_LCD_LDD_12, + GPIO67_LCD_LDD_13, + GPIO68_LCD_LDD_14, + GPIO69_LCD_LDD_15, + GPIO72_LCD_FCLK, + GPIO73_LCD_LCLK, + GPIO74_LCD_PCLK, + GPIO75_LCD_BIAS, + + /* BTUART */ + GPIO111_UART2_RTS, + GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, + GPIO113_UART2_TXD, + GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, + + /* STUART */ + GPIO109_UART3_TXD, + GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, + + /* AC97 */ + GPIO23_AC97_nACRESET, + GPIO24_AC97_SYSCLK, + GPIO29_AC97_BITCLK, + GPIO25_AC97_SDATA_IN_0, + GPIO27_AC97_SDATA_OUT, + GPIO28_AC97_SYNC, + + /* Keypad */ + GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, + GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, + GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, + GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, + GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, + GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, + GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, + GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, + GPIO121_KP_MKOUT_0, + GPIO122_KP_MKOUT_1, + GPIO123_KP_MKOUT_2, + GPIO124_KP_MKOUT_3, + GPIO125_KP_MKOUT_4, + GPIO4_2_KP_MKOUT_5, + + /* MMC1 */ + GPIO3_MMC1_DAT0, + GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO5_MMC1_DAT2, + GPIO6_MMC1_DAT3, + GPIO7_MMC1_CLK, + GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ + + /* MMC2 */ + GPIO9_MMC2_DAT0, + GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO11_MMC2_DAT2, + GPIO12_MMC2_DAT3, + GPIO13_MMC2_CLK, + GPIO14_MMC2_CMD, + + /* FFUART */ + GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, + GPIO31_UART1_TXD, + GPIO32_UART1_CTS, + GPIO37_UART1_RTS, + GPIO33_UART1_DCD, + GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, + GPIO35_UART1_RI, + GPIO36_UART1_DTR, + + /* GPIOs */ + GPIO79_GPIO, /* LED */ + GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ + GPIO85_GPIO, /* MMC WP */ + GPIO99_GPIO, /* Ethernet IRQ */ +}; + +#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) +static struct resource dm9000_resources[] = { + [0] = { + .start = CM_X300_ETH_PHYS, + .end = CM_X300_ETH_PHYS + 0x3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CM_X300_ETH_PHYS + 0x4, + .end = CM_X300_ETH_PHYS + 0x4 + 500, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), + .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + } +}; + +static struct dm9000_plat_data cm_x300_dm9000_platdata = { + .flags = DM9000_PLATF_16BITONLY, +}; + +static struct platform_device dm9000_device = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(dm9000_resources), + .resource = dm9000_resources, + .dev = { + .platform_data = &cm_x300_dm9000_platdata, + } + +}; + +static void __init cm_x300_init_dm9000(void) +{ + platform_device_register(&dm9000_device); +} +#else +static inline void cm_x300_init_dm9000(void) {} +#endif + +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) +static struct pxafb_mode_info cm_x300_lcd_modes[] = { + [0] = { + .pixclock = 38000, + .bpp = 16, + .xres = 480, + .yres = 640, + .hsync_len = 8, + .vsync_len = 2, + .left_margin = 8, + .upper_margin = 0, + .right_margin = 24, + .lower_margin = 4, + .cmap_greyscale = 0, + }, + [1] = { + .pixclock = 153800, + .bpp = 16, + .xres = 240, + .yres = 320, + .hsync_len = 8, + .vsync_len = 2, + .left_margin = 8, + .upper_margin = 2, + .right_margin = 88, + .lower_margin = 2, + .cmap_greyscale = 0, + }, +}; + +static struct pxafb_mach_info cm_x300_lcd = { + .modes = cm_x300_lcd_modes, + .num_modes = 2, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, +}; + +static void __init cm_x300_init_lcd(void) +{ + set_pxa_fb_info(&cm_x300_lcd); +} +#else +static inline void cm_x300_init_lcd(void) {} +#endif + +#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) +static struct mtd_partition cm_x300_nand_partitions[] = { + [0] = { + .name = "OBM", + .offset = 0, + .size = SZ_256K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [1] = { + .name = "U-Boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [2] = { + .name = "Environment", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K, + }, + [3] = { + .name = "reserved", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K + SZ_1M, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [4] = { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_4M, + }, + [5] = { + .name = "fs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct pxa3xx_nand_platform_data cm_x300_nand_info = { + .enable_arbiter = 1, + .parts = cm_x300_nand_partitions, + .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), +}; + +static void __init cm_x300_init_nand(void) +{ + pxa3xx_set_nand_info(&cm_x300_nand_info); +} +#else +static inline void cm_x300_init_nand(void) {} +#endif + +#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) +/* The first MMC slot of CM-X300 is hardwired to Libertas card and has + no detection/ro pins */ +static int cm_x300_mci_init(struct device *dev, + irq_handler_t cm_x300_detect_int, + void *data) +{ + return 0; +} + +static void cm_x300_mci_exit(struct device *dev, void *data) +{ +} + +static struct pxamci_platform_data cm_x300_mci_platform_data = { + .detect_delay = 20, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .init = cm_x300_mci_init, + .exit = cm_x300_mci_exit, +}; + +static int cm_x300_mci2_ro(struct device *dev) +{ + return gpio_get_value(GPIO85_MMC2_WP); +} + +static int cm_x300_mci2_init(struct device *dev, + irq_handler_t cm_x300_detect_int, + void *data) +{ + int err; + + /* + * setup GPIO for CM-X300 MMC controller + */ + err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect"); + if (err) + goto err_request_cd; + gpio_direction_input(GPIO82_MMC2_IRQ); + + err = gpio_request(GPIO85_MMC2_WP, "mmc write protect"); + if (err) + goto err_request_wp; + gpio_direction_input(GPIO85_MMC2_WP); + + err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + "MMC card detect", data); + if (err) { + printk(KERN_ERR "%s: MMC/SD/SDIO: " + "can't request card detect IRQ\n", __func__); + goto err_request_irq; + } + + return 0; + +err_request_irq: + gpio_free(GPIO85_MMC2_WP); +err_request_wp: + gpio_free(GPIO82_MMC2_IRQ); +err_request_cd: + return err; +} + +static void cm_x300_mci2_exit(struct device *dev, void *data) +{ + free_irq(CM_X300_MMC2_IRQ, data); + gpio_free(GPIO82_MMC2_IRQ); + gpio_free(GPIO85_MMC2_WP); +} + +static struct pxamci_platform_data cm_x300_mci2_platform_data = { + .detect_delay = 20, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .init = cm_x300_mci2_init, + .exit = cm_x300_mci2_exit, + .get_ro = cm_x300_mci2_ro, +}; + +static void __init cm_x300_init_mmc(void) +{ + pxa_set_mci_info(&cm_x300_mci_platform_data); + pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); +} +#else +static inline void cm_x300_init_mmc(void) {} +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static struct pxaohci_platform_data cm_x300_ohci_platform_data = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, +}; + +static void __init cm_x300_init_ohci(void) +{ + pxa_set_ohci_info(&cm_x300_ohci_platform_data); +} +#else +static inline void cm_x300_init_ohci(void) {} +#endif + +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +static struct gpio_led cm_x300_leds[] = { + [0] = { + .name = "cm-x300:green", + .default_trigger = "heartbeat", + .gpio = 79, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { + .num_leds = ARRAY_SIZE(cm_x300_leds), + .leds = cm_x300_leds, +}; + +static struct platform_device cm_x300_led_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &cm_x300_gpio_led_pdata, + }, +}; + +static void __init cm_x300_init_leds(void) +{ + platform_device_register(&cm_x300_led_device); +} +#else +static inline void cm_x300_init_leds(void) {} +#endif + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +/* PCA9555 */ +static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { + .gpio_base = 128, +}; + +static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { + .gpio_base = 144, +}; + +static struct i2c_board_info cm_x300_gpio_ext_info[] = { + [0] = { + I2C_BOARD_INFO("pca9555", 0x24), + .platform_data = &cm_x300_gpio_ext_pdata_0, + }, + [1] = { + I2C_BOARD_INFO("pca9555", 0x25), + .platform_data = &cm_x300_gpio_ext_pdata_1, + }, +}; + +static void __init cm_x300_init_i2c(void) +{ + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, cm_x300_gpio_ext_info, + ARRAY_SIZE(cm_x300_gpio_ext_info)); +} +#else +static inline void cm_x300_init_i2c(void) {} +#endif + +static void __init cm_x300_init(void) +{ + /* board-processor specific GPIO initialization */ + pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg)); + + cm_x300_init_dm9000(); + cm_x300_init_lcd(); + cm_x300_init_ohci(); + cm_x300_init_mmc(); + cm_x300_init_nand(); + cm_x300_init_leds(); + cm_x300_init_i2c(); +} + +MACHINE_START(CM_X300, "CM-X300 module") + .phys_io = 0x40000000, + .boot_params = 0xa0000100, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .map_io = pxa_map_io, + .init_irq = pxa3xx_init_irq, + .timer = &pxa_timer, + .init_machine = cm_x300_init, +MACHINE_END diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c index abce13c846c..e8473624427 100644 --- a/arch/arm/mach-pxa/colibri.c +++ b/arch/arm/mach-pxa/colibri.c @@ -29,12 +29,17 @@ #include <asm/mach/irq.h> #include <asm/mach/flash.h> #include <mach/pxa-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> #include <mach/colibri.h> #include "generic.h" #include "devices.h" +static unsigned long colibri_pin_config[] __initdata = { + GPIO78_nCS_2, /* Ethernet CS */ + GPIO114_GPIO, /* Ethernet IRQ */ +}; + /* * Flash */ @@ -116,9 +121,7 @@ static struct platform_device *colibri_devices[] __initdata = { static void __init colibri_init(void) { - /* DM9000 LAN */ - pxa_gpio_mode(GPIO78_nCS_2_MD); - pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); + pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config)); platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); } diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index e703a8d209e..65558d6aa22 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -20,7 +20,12 @@ #include <linux/interrupt.h> #include <linux/mmc/host.h> #include <linux/pm.h> +#include <linux/gpio.h> #include <linux/backlight.h> +#include <linux/io.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> +#include <linux/spi/corgi_lcd.h> #include <video/w100fb.h> #include <asm/setup.h> @@ -28,7 +33,6 @@ #include <asm/mach-types.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/system.h> #include <asm/mach/arch.h> @@ -37,11 +41,12 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa25x.h> #include <mach/i2c.h> #include <mach/irda.h> #include <mach/mmc.h> #include <mach/udc.h> +#include <mach/pxa2xx_spi.h> #include <mach/corgi.h> #include <mach/sharpsl.h> @@ -52,6 +57,61 @@ #include "devices.h" #include "sharpsl.h" +static unsigned long corgi_pin_config[] __initdata = { + /* Static Memory I/O */ + GPIO78_nCS_2, /* w100fb */ + GPIO80_nCS_4, /* scoop */ + + /* SSP1 */ + GPIO23_SSP1_SCLK, + GPIO25_SSP1_TXD, + GPIO26_SSP1_RXD, + GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */ + + /* I2S */ + GPIO28_I2S_BITCLK_OUT, + GPIO29_I2S_SDATA_IN, + GPIO30_I2S_SDATA_OUT, + GPIO31_I2S_SYNC, + GPIO32_I2S_SYSCLK, + + /* Infra-Red */ + GPIO47_FICP_TXD, + GPIO46_FICP_RXD, + + /* FFUART */ + GPIO40_FFUART_DTR, + GPIO41_FFUART_RTS, + GPIO39_FFUART_TXD, + GPIO37_FFUART_DSR, + GPIO34_FFUART_RXD, + GPIO35_FFUART_CTS, + + /* PC Card */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO52_nPCE_1, + GPIO53_nPCE_2, + GPIO54_nPSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + + /* MMC */ + GPIO6_MMC_CLK, + GPIO8_MMC_CS0, + + /* GPIO */ + GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */ + GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */ + GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */ + GPIO22_GPIO, /* CORGI_GPIO_IR_ON */ + GPIO44_GPIO, /* CORGI_GPIO_HSYNC */ + + GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, +}; /* * Corgi SCOOP Device @@ -67,6 +127,7 @@ static struct resource corgi_scoop_resources[] = { static struct scoop_config corgi_scoop_setup = { .io_dir = CORGI_SCOOP_IO_DIR, .io_out = CORGI_SCOOP_IO_OUT, + .gpio_base = CORGI_SCOOP_GPIO_BASE, }; struct platform_device corgiscoop_device = { @@ -79,27 +140,6 @@ struct platform_device corgiscoop_device = { .resource = corgi_scoop_resources, }; -static void corgi_pcmcia_init(void) -{ - /* Setup default state of GPIO outputs - before we enable them as outputs. */ - GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | - GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | - GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) | - GPIO_bit(GPIO53_nPCE_2); - - pxa_gpio_mode(GPIO48_nPOE_MD); - pxa_gpio_mode(GPIO49_nPWE_MD); - pxa_gpio_mode(GPIO50_nPIOR_MD); - pxa_gpio_mode(GPIO51_nPIOW_MD); - pxa_gpio_mode(GPIO55_nPREG_MD); - pxa_gpio_mode(GPIO56_nPWAIT_MD); - pxa_gpio_mode(GPIO57_nIOIS16_MD); - pxa_gpio_mode(GPIO52_nPCE_1_MD); - pxa_gpio_mode(GPIO53_nPCE_2_MD); - pxa_gpio_mode(GPIO54_pSKTSEL_MD); -} - static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { { .dev = &corgiscoop_device.dev, @@ -112,58 +152,10 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { static struct scoop_pcmcia_config corgi_pcmcia_config = { .devs = &corgi_pcmcia_scoop[0], .num_devs = 1, - .pcmcia_init = corgi_pcmcia_init, }; EXPORT_SYMBOL(corgiscoop_device); - -/* - * Corgi SSP Device - * - * Set the parent as the scoop device because a lot of SSP devices - * also use scoop functions and this makes the power up/down order - * work correctly. - */ -struct platform_device corgissp_device = { - .name = "corgi-ssp", - .dev = { - .parent = &corgiscoop_device.dev, - }, - .id = -1, -}; - -struct corgissp_machinfo corgi_ssp_machinfo = { - .port = 1, - .cs_lcdcon = CORGI_GPIO_LCDCON_CS, - .cs_ads7846 = CORGI_GPIO_ADS7846_CS, - .cs_max1111 = CORGI_GPIO_MAX1111_CS, - .clk_lcdcon = 76, - .clk_ads7846 = 2, - .clk_max1111 = 8, -}; - - -/* - * LCD/Framebuffer - */ -static void w100_lcdtg_suspend(struct w100fb_par *par) -{ - corgi_lcdtg_suspend(); -} - -static void w100_lcdtg_init(struct w100fb_par *par) -{ - corgi_lcdtg_hw_init(par->xres); -} - - -static struct w100_tg_info corgi_lcdtg_info = { - .change = w100_lcdtg_init, - .suspend = w100_lcdtg_suspend, - .resume = w100_lcdtg_init, -}; - static struct w100_mem_info corgi_fb_mem = { .ext_cntl = 0x00040003, .sdram_mode_reg = 0x00650021, @@ -242,7 +234,6 @@ static struct w100_mode corgi_fb_modes[] = { }; static struct w100fb_mach_info corgi_fb_info = { - .tg = &corgi_lcdtg_info, .init_mode = INIT_MODE_ROTATED, .mem = &corgi_fb_mem, .regs = &corgi_fb_regs, @@ -268,60 +259,10 @@ static struct platform_device corgifb_device = { .resource = corgi_fb_resources, .dev = { .platform_data = &corgi_fb_info, - .parent = &corgissp_device.dev, }, }; - -/* - * Corgi Backlight Device - */ -static void corgi_bl_kick_battery(void) -{ - void (*kick_batt)(void); - - kick_batt = symbol_get(sharpsl_battery_kick); - if (kick_batt) { - kick_batt(); - symbol_put(sharpsl_battery_kick); - } -} - -static void corgi_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via SCOOP */ - if (intensity & 0x0020) - set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); - else - reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); -} - -static struct generic_bl_info corgi_bl_machinfo = { - .name = "corgi-bl", - .max_intensity = 0x2f, - .default_intensity = 0x1f, - .limit_mask = 0x0b, - .set_bl_intensity = corgi_bl_set_intensity, - .kick_battery = corgi_bl_kick_battery, -}; - -static struct platform_device corgibl_device = { - .name = "generic-bl", - .dev = { - .parent = &corgifb_device.dev, - .platform_data = &corgi_bl_machinfo, - }, - .id = -1, -}; - - /* * Corgi Keyboard Device */ @@ -330,75 +271,35 @@ static struct platform_device corgikbd_device = { .id = -1, }; - /* * Corgi LEDs */ -static struct platform_device corgiled_device = { - .name = "corgi-led", - .id = -1, -}; - - -/* - * Corgi Touch Screen Device - */ -static unsigned long (*get_hsync_invperiod)(struct device *dev); - -static void inline sharpsl_wait_sync(int gpio) -{ - while((GPLR(gpio) & GPIO_bit(gpio)) == 0); - while((GPLR(gpio) & GPIO_bit(gpio)) != 0); -} - -static unsigned long corgi_get_hsync_invperiod(void) -{ - if (!get_hsync_invperiod) - get_hsync_invperiod = symbol_get(w100fb_get_hsynclen); - if (!get_hsync_invperiod) - return 0; - - return get_hsync_invperiod(&corgifb_device.dev); -} - -static void corgi_put_hsync(void) -{ - if (get_hsync_invperiod) - symbol_put(w100fb_get_hsynclen); - get_hsync_invperiod = NULL; -} - -static void corgi_wait_hsync(void) -{ - sharpsl_wait_sync(CORGI_GPIO_HSYNC); -} - -static struct resource corgits_resources[] = { - [0] = { - .start = CORGI_IRQ_GPIO_TP_INT, - .end = CORGI_IRQ_GPIO_TP_INT, - .flags = IORESOURCE_IRQ, +static struct gpio_led corgi_gpio_leds[] = { + { + .name = "corgi:amber:charge", + .default_trigger = "sharpsl-charge", + .gpio = CORGI_GPIO_LED_ORANGE, + }, + { + .name = "corgi:green:mail", + .default_trigger = "nand-disk", + .gpio = CORGI_GPIO_LED_GREEN, }, }; -static struct corgits_machinfo corgi_ts_machinfo = { - .get_hsync_invperiod = corgi_get_hsync_invperiod, - .put_hsync = corgi_put_hsync, - .wait_hsync = corgi_wait_hsync, +static struct gpio_led_platform_data corgi_gpio_leds_info = { + .leds = corgi_gpio_leds, + .num_leds = ARRAY_SIZE(corgi_gpio_leds), }; -static struct platform_device corgits_device = { - .name = "corgi-ts", +static struct platform_device corgiled_device = { + .name = "leds-gpio", + .id = -1, .dev = { - .parent = &corgissp_device.dev, - .platform_data = &corgi_ts_machinfo, + .platform_data = &corgi_gpio_leds_info, }, - .id = -1, - .num_resources = ARRAY_SIZE(corgits_resources), - .resource = corgits_resources, }; - /* * MMC/SD Device * @@ -411,20 +312,42 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo { int err; - /* setup GPIO for PXA25x MMC controller */ - pxa_gpio_mode(GPIO6_MMCCLK_MD); - pxa_gpio_mode(GPIO8_MMCCS0_MD); - pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN); - pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT); + err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT"); + if (err) + goto err_out; - corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); + err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP"); + if (err) + goto err_free_1; - err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, - IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "MMC card detect", data); + err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR"); if (err) - printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); + goto err_free_2; + gpio_direction_input(CORGI_GPIO_nSD_DETECT); + gpio_direction_input(CORGI_GPIO_nSD_WP); + gpio_direction_output(CORGI_GPIO_SD_PWR, 0); + + corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); + + err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, + "MMC card detect", data); + if (err) { + pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", + __func__); + goto err_free_3; + } + return 0; + +err_free_3: + gpio_free(CORGI_GPIO_SD_PWR); +err_free_2: + gpio_free(CORGI_GPIO_nSD_WP); +err_free_1: + gpio_free(CORGI_GPIO_nSD_DETECT); +err_out: return err; } @@ -432,20 +355,20 @@ static void corgi_mci_setpower(struct device *dev, unsigned int vdd) { struct pxamci_platform_data* p_d = dev->platform_data; - if (( 1 << vdd) & p_d->ocr_mask) - GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR); - else - GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR); + gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask)); } static int corgi_mci_get_ro(struct device *dev) { - return GPLR(CORGI_GPIO_nSD_WP) & GPIO_bit(CORGI_GPIO_nSD_WP); + return gpio_get_value(CORGI_GPIO_nSD_WP); } static void corgi_mci_exit(struct device *dev, void *data) { free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data); + gpio_free(CORGI_GPIO_SD_PWR); + gpio_free(CORGI_GPIO_nSD_WP); + gpio_free(CORGI_GPIO_nSD_DETECT); } static struct pxamci_platform_data corgi_mci_platform_data = { @@ -462,16 +385,32 @@ static struct pxamci_platform_data corgi_mci_platform_data = { */ static void corgi_irda_transceiver_mode(struct device *dev, int mode) { - if (mode & IR_OFF) - GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON); - else - GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON); + gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF); pxa2xx_transceiver_mode(dev, mode); } +static int corgi_irda_startup(struct device *dev) +{ + int err; + + err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON"); + if (err) + return err; + + gpio_direction_output(CORGI_GPIO_IR_ON, 1); + return 0; +} + +static void corgi_irda_shutdown(struct device *dev) +{ + gpio_free(CORGI_GPIO_IR_ON); +} + static struct pxaficp_platform_data corgi_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_OFF, - .transceiver_mode = corgi_irda_transceiver_mode, + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = corgi_irda_transceiver_mode, + .startup = corgi_irda_startup, + .shutdown = corgi_irda_shutdown, }; @@ -483,14 +422,129 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = { .gpio_pullup = CORGI_GPIO_USB_PULLUP, }; +#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER) +static struct pxa2xx_spi_master corgi_spi_info = { + .num_chipselect = 3, +}; + +static struct ads7846_platform_data corgi_ads7846_info = { + .model = 7846, + .vref_delay_usecs = 100, + .x_plate_ohms = 419, + .y_plate_ohms = 486, + .gpio_pendown = CORGI_GPIO_TP_INT, +}; + +static void corgi_ads7846_cs(u32 command) +{ + gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT)); +} + +static struct pxa2xx_spi_chip corgi_ads7846_chip = { + .cs_control = corgi_ads7846_cs, +}; + +static void corgi_bl_kick_battery(void) +{ + void (*kick_batt)(void); + + kick_batt = symbol_get(sharpsl_battery_kick); + if (kick_batt) { + kick_batt(); + symbol_put(sharpsl_battery_kick); + } +} + +static struct corgi_lcd_platform_data corgi_lcdcon_info = { + .init_mode = CORGI_LCD_MODE_VGA, + .max_intensity = 0x2f, + .default_intensity = 0x1f, + .limit_mask = 0x0b, + .gpio_backlight_cont = CORGI_GPIO_BACKLIGHT_CONT, + .gpio_backlight_on = -1, + .kick_battery = corgi_bl_kick_battery, +}; + +static void corgi_lcdcon_cs(u32 command) +{ + gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT)); +} + +static struct pxa2xx_spi_chip corgi_lcdcon_chip = { + .cs_control = corgi_lcdcon_cs, +}; + +static void corgi_max1111_cs(u32 command) +{ + gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT)); +} + +static struct pxa2xx_spi_chip corgi_max1111_chip = { + .cs_control = corgi_max1111_cs, +}; + +static struct spi_board_info corgi_spi_devices[] = { + { + .modalias = "ads7846", + .max_speed_hz = 1200000, + .bus_num = 1, + .chip_select = 0, + .platform_data = &corgi_ads7846_info, + .controller_data= &corgi_ads7846_chip, + .irq = gpio_to_irq(CORGI_GPIO_TP_INT), + }, { + .modalias = "corgi-lcd", + .max_speed_hz = 50000, + .bus_num = 1, + .chip_select = 1, + .platform_data = &corgi_lcdcon_info, + .controller_data= &corgi_lcdcon_chip, + }, { + .modalias = "max1111", + .max_speed_hz = 450000, + .bus_num = 1, + .chip_select = 2, + .controller_data= &corgi_max1111_chip, + }, +}; + +static void __init corgi_init_spi(void) +{ + int err; + + err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS"); + if (err) + return; + + err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS"); + if (err) + goto err_free_1; + + err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS"); + if (err) + goto err_free_2; + + gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1); + gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1); + gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1); + + pxa2xx_set_spi_info(1, &corgi_spi_info); + spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices)); + return; + +err_free_2: + gpio_free(CORGI_GPIO_LCDCON_CS); +err_free_1: + gpio_free(CORGI_GPIO_ADS7846_CS); +} +#else +static inline void corgi_init_spi(void) {} +#endif static struct platform_device *devices[] __initdata = { &corgiscoop_device, - &corgissp_device, &corgifb_device, &corgikbd_device, - &corgibl_device, - &corgits_device, &corgiled_device, }; @@ -498,7 +552,8 @@ static void corgi_poweroff(void) { if (!machine_is_corgi()) /* Green LED off tells the bootloader to halt */ - reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + gpio_set_value(CORGI_GPIO_LED_GREEN, 0); + arm_machine_restart('h'); } @@ -506,7 +561,8 @@ static void corgi_restart(char mode) { if (!machine_is_corgi()) /* Green LED on tells the bootloader to reboot */ - set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); + gpio_set_value(CORGI_GPIO_LED_GREEN, 1); + arm_machine_restart('h'); } @@ -515,20 +571,12 @@ static void __init corgi_init(void) pm_power_off = corgi_poweroff; arm_pm_restart = corgi_restart; - /* setup sleep mode values */ - PWER = 0x00000002; - PFER = 0x00000000; - PRER = 0x00000002; - PGSR0 = 0x0158C000; - PGSR1 = 0x00FF0080; - PGSR2 = 0x0001C004; /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ PCFR |= PCFR_OPDE; - corgi_ssp_set_machinfo(&corgi_ssp_machinfo); + pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); - pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT); - pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN); + corgi_init_spi(); pxa_set_udc_info(&udc_info); pxa_set_mci_info(&corgi_mci_platform_data); diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c deleted file mode 100644 index 311baf149b0..00000000000 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * linux/arch/arm/mach-pxa/corgi_lcd.c - * - * Corgi/Spitz LCD Specific Code - * - * Copyright (C) 2005 Richard Purdie - * - * Connectivity: - * Corgi - LCD to ATI Imageon w100 (Wallaby) - * Spitz - LCD to PXA Framebuffer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/string.h> -#include <mach/akita.h> -#include <mach/corgi.h> -#include <mach/hardware.h> -#include <mach/pxa-regs.h> -#include <mach/sharpsl.h> -#include <mach/spitz.h> -#include <asm/hardware/scoop.h> -#include <asm/mach/sharpsl_param.h> -#include "generic.h" - -/* Register Addresses */ -#define RESCTL_ADRS 0x00 -#define PHACTRL_ADRS 0x01 -#define DUTYCTRL_ADRS 0x02 -#define POWERREG0_ADRS 0x03 -#define POWERREG1_ADRS 0x04 -#define GPOR3_ADRS 0x05 -#define PICTRL_ADRS 0x06 -#define POLCTRL_ADRS 0x07 - -/* Register Bit Definitions */ -#define RESCTL_QVGA 0x01 -#define RESCTL_VGA 0x00 - -#define POWER1_VW_ON 0x01 /* VW Supply FET ON */ -#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */ -#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */ - -#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */ -#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */ -#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */ - -#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ -#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */ -#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */ -#define POWER0_COM_ON 0x08 /* COM Power Supply ON */ -#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */ - -#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */ -#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */ -#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */ - -#define PICTRL_INIT_STATE 0x01 -#define PICTRL_INIOFF 0x02 -#define PICTRL_POWER_DOWN 0x04 -#define PICTRL_COM_SIGNAL_OFF 0x08 -#define PICTRL_DAC_SIGNAL_OFF 0x10 - -#define POLCTRL_SYNC_POL_FALL 0x01 -#define POLCTRL_EN_POL_FALL 0x02 -#define POLCTRL_DATA_POL_FALL 0x04 -#define POLCTRL_SYNC_ACT_H 0x08 -#define POLCTRL_EN_ACT_L 0x10 - -#define POLCTRL_SYNC_POL_RISE 0x00 -#define POLCTRL_EN_POL_RISE 0x00 -#define POLCTRL_DATA_POL_RISE 0x00 -#define POLCTRL_SYNC_ACT_L 0x00 -#define POLCTRL_EN_ACT_H 0x00 - -#define PHACTRL_PHASE_MANUAL 0x01 -#define DEFAULT_PHAD_QVGA (9) -#define DEFAULT_COMADJ (125) - -/* - * This is only a psuedo I2C interface. We can't use the standard kernel - * routines as the interface is write only. We just assume the data is acked... - */ -static void lcdtg_ssp_i2c_send(u8 data) -{ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, data); - udelay(10); -} - -static void lcdtg_i2c_send_bit(u8 data) -{ - lcdtg_ssp_i2c_send(data); - lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK); - lcdtg_ssp_i2c_send(data); -} - -static void lcdtg_i2c_send_start(u8 base) -{ - lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); - lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); - lcdtg_ssp_i2c_send(base); -} - -static void lcdtg_i2c_send_stop(u8 base) -{ - lcdtg_ssp_i2c_send(base); - lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK); - lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT); -} - -static void lcdtg_i2c_send_byte(u8 base, u8 data) -{ - int i; - for (i = 0; i < 8; i++) { - if (data & 0x80) - lcdtg_i2c_send_bit(base | POWER0_COM_DOUT); - else - lcdtg_i2c_send_bit(base); - data <<= 1; - } -} - -static void lcdtg_i2c_wait_ack(u8 base) -{ - lcdtg_i2c_send_bit(base); -} - -static void lcdtg_set_common_voltage(u8 base_data, u8 data) -{ - /* Set Common Voltage to M62332FP via I2C */ - lcdtg_i2c_send_start(base_data); - lcdtg_i2c_send_byte(base_data, 0x9c); - lcdtg_i2c_wait_ack(base_data); - lcdtg_i2c_send_byte(base_data, 0x00); - lcdtg_i2c_wait_ack(base_data); - lcdtg_i2c_send_byte(base_data, data); - lcdtg_i2c_wait_ack(base_data); - lcdtg_i2c_send_stop(base_data); -} - -/* Set Phase Adjust */ -static void lcdtg_set_phadadj(int mode) -{ - int adj; - switch(mode) { - case 480: - case 640: - /* Setting for VGA */ - adj = sharpsl_param.phadadj; - if (adj < 0) { - adj = PHACTRL_PHASE_MANUAL; - } else { - adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL; - } - break; - case 240: - case 320: - default: - /* Setting for QVGA */ - adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL; - break; - } - - corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj); -} - -static int lcd_inited; - -void corgi_lcdtg_hw_init(int mode) -{ - if (!lcd_inited) { - int comadj; - - /* Initialize Internal Logic & Port */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE - | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF); - - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF - | POWER0_COM_OFF | POWER0_VCC5_OFF); - - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); - - /* VDD(+8V), SVSS(-4V) ON */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); - mdelay(3); - - /* DAC ON */ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON - | POWER0_COM_OFF | POWER0_VCC5_OFF); - - /* INIB = H, INI = L */ - /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF); - - /* Set Common Voltage */ - comadj = sharpsl_param.comadj; - if (comadj < 0) - comadj = DEFAULT_COMADJ; - lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj); - - /* VCC5 ON, DAC ON */ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON | - POWER0_COM_OFF | POWER0_VCC5_ON); - - /* GVSS(-8V) ON, VDD ON */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); - mdelay(2); - - /* COM SIGNAL ON (PICTL[3] = L) */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE); - - /* COM ON, DAC ON, VCC5_ON */ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON - | POWER0_COM_ON | POWER0_VCC5_ON); - - /* VW ON, GVSS ON, VDD ON */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON); - - /* Signals output enable */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, 0); - - /* Set Phase Adjust */ - lcdtg_set_phadadj(mode); - - /* Initialize for Input Signals from ATI */ - corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE - | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H); - udelay(1000); - - lcd_inited=1; - } else { - lcdtg_set_phadadj(mode); - } - - switch(mode) { - case 480: - case 640: - /* Set Lcd Resolution (VGA) */ - corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA); - break; - case 240: - case 320: - default: - /* Set Lcd Resolution (QVGA) */ - corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA); - break; - } -} - -void corgi_lcdtg_suspend(void) -{ - /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ - mdelay(34); - - /* (1)VW OFF */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON); - - /* (2)COM OFF */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF); - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON); - - /* (3)Set Common Voltage Bias 0V */ - lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0); - - /* (4)GVSS OFF */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON); - - /* (5)VCC5 OFF */ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF); - - /* (6)Set PDWN, INIOFF, DACOFF */ - corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF | - PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF); - - /* (7)DAC OFF */ - corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF); - - /* (8)VDD OFF */ - corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF); - - lcd_inited = 0; -} - diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 35bbfccd2df..eb7d6c94aa4 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -21,7 +21,6 @@ #include <asm/irq.h> #include <asm/mach-types.h> #include <mach/hardware.h> -#include <asm/hardware/scoop.h> #include <mach/sharpsl.h> #include <mach/corgi.h> diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c deleted file mode 100644 index 8e2f2215c4b..00000000000 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ /dev/null @@ -1,276 +0,0 @@ -/* - * SSP control code for Sharp Corgi devices - * - * Copyright (c) 2004-2005 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <mach/hardware.h> -#include <asm/mach-types.h> - -#include <mach/ssp.h> -#include <mach/pxa-regs.h> -#include <mach/pxa2xx-gpio.h> -#include <mach/regs-ssp.h> -#include "sharpsl.h" - -static DEFINE_SPINLOCK(corgi_ssp_lock); -static struct ssp_dev corgi_ssp_dev; -static struct ssp_state corgi_ssp_state; -static struct corgissp_machinfo *ssp_machinfo; - -/* - * There are three devices connected to the SSP interface: - * 1. A touchscreen controller (TI ADS7846 compatible) - * 2. An LCD controller (with some Backlight functionality) - * 3. A battery monitoring IC (Maxim MAX1111) - * - * Each device uses a different speed/mode of communication. - * - * The touchscreen is very sensitive and the most frequently used - * so the port is left configured for this. - * - * Devices are selected using Chip Selects on GPIOs. - */ - -/* - * ADS7846 Routines - */ -unsigned long corgi_ssp_ads7846_putget(ulong data) -{ - unsigned long flag; - u32 ret = 0; - - spin_lock_irqsave(&corgi_ssp_lock, flag); - if (ssp_machinfo->cs_ads7846 >= 0) - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); - - ssp_write_word(&corgi_ssp_dev,data); - ssp_read_word(&corgi_ssp_dev, &ret); - - if (ssp_machinfo->cs_ads7846 >= 0) - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); - spin_unlock_irqrestore(&corgi_ssp_lock, flag); - - return ret; -} - -/* - * NOTE: These functions should always be called in interrupt context - * and use the _lock and _unlock functions. They are very time sensitive. - */ -void corgi_ssp_ads7846_lock(void) -{ - spin_lock(&corgi_ssp_lock); - if (ssp_machinfo->cs_ads7846 >= 0) - GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); -} - -void corgi_ssp_ads7846_unlock(void) -{ - if (ssp_machinfo->cs_ads7846 >= 0) - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); - spin_unlock(&corgi_ssp_lock); -} - -void corgi_ssp_ads7846_put(ulong data) -{ - ssp_write_word(&corgi_ssp_dev,data); -} - -unsigned long corgi_ssp_ads7846_get(void) -{ - u32 ret = 0; - ssp_read_word(&corgi_ssp_dev, &ret); - return ret; -} - -EXPORT_SYMBOL(corgi_ssp_ads7846_putget); -EXPORT_SYMBOL(corgi_ssp_ads7846_lock); -EXPORT_SYMBOL(corgi_ssp_ads7846_unlock); -EXPORT_SYMBOL(corgi_ssp_ads7846_put); -EXPORT_SYMBOL(corgi_ssp_ads7846_get); - - -/* - * LCD/Backlight Routines - */ -unsigned long corgi_ssp_dac_put(ulong data) -{ - unsigned long flag, sscr1 = SSCR1_SPH; - u32 tmp; - - spin_lock_irqsave(&corgi_ssp_lock, flag); - - if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi()) - sscr1 = 0; - - ssp_disable(&corgi_ssp_dev); - ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon)); - ssp_enable(&corgi_ssp_dev); - - if (ssp_machinfo->cs_lcdcon >= 0) - GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); - ssp_write_word(&corgi_ssp_dev,data); - /* Read null data back from device to prevent SSP overflow */ - ssp_read_word(&corgi_ssp_dev, &tmp); - if (ssp_machinfo->cs_lcdcon >= 0) - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); - - ssp_disable(&corgi_ssp_dev); - ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); - ssp_enable(&corgi_ssp_dev); - - spin_unlock_irqrestore(&corgi_ssp_lock, flag); - - return 0; -} - -void corgi_ssp_lcdtg_send(u8 adrs, u8 data) -{ - corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f)); -} - -void corgi_ssp_blduty_set(int duty) -{ - corgi_ssp_lcdtg_send(0x02,duty); -} - -EXPORT_SYMBOL(corgi_ssp_lcdtg_send); -EXPORT_SYMBOL(corgi_ssp_blduty_set); - -/* - * Max1111 Routines - */ -int corgi_ssp_max1111_get(ulong data) -{ - unsigned long flag; - long voltage = 0, voltage1 = 0, voltage2 = 0; - - spin_lock_irqsave(&corgi_ssp_lock, flag); - if (ssp_machinfo->cs_max1111 >= 0) - GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); - ssp_disable(&corgi_ssp_dev); - ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111)); - ssp_enable(&corgi_ssp_dev); - - udelay(1); - - /* TB1/RB1 */ - ssp_write_word(&corgi_ssp_dev,data); - ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ - - /* TB12/RB2 */ - ssp_write_word(&corgi_ssp_dev,0); - ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); - - /* TB13/RB3*/ - ssp_write_word(&corgi_ssp_dev,0); - ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); - - ssp_disable(&corgi_ssp_dev); - ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); - ssp_enable(&corgi_ssp_dev); - if (ssp_machinfo->cs_max1111 >= 0) - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); - spin_unlock_irqrestore(&corgi_ssp_lock, flag); - - if (voltage1 & 0xc0 || voltage2 & 0x3f) - voltage = -1; - else - voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03); - - return voltage; -} - -EXPORT_SYMBOL(corgi_ssp_max1111_get); - -/* - * Support Routines - */ - -void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo) -{ - ssp_machinfo = machinfo; -} - -static int __init corgi_ssp_probe(struct platform_device *dev) -{ - int ret; - - /* Chip Select - Disable All */ - if (ssp_machinfo->cs_lcdcon >= 0) - pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH); - if (ssp_machinfo->cs_max1111 >= 0) - pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH); - if (ssp_machinfo->cs_ads7846 >= 0) - pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH); - - ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0); - - if (ret) - printk(KERN_ERR "Unable to register SSP handler!\n"); - else { - ssp_disable(&corgi_ssp_dev); - ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); - ssp_enable(&corgi_ssp_dev); - } - - return ret; -} - -static int corgi_ssp_remove(struct platform_device *dev) -{ - ssp_exit(&corgi_ssp_dev); - return 0; -} - -static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state) -{ - ssp_flush(&corgi_ssp_dev); - ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state); - - return 0; -} - -static int corgi_ssp_resume(struct platform_device *dev) -{ - if (ssp_machinfo->cs_lcdcon >= 0) - GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */ - if (ssp_machinfo->cs_max1111 >= 0) - GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/ - if (ssp_machinfo->cs_ads7846 >= 0) - GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/ - ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state); - ssp_enable(&corgi_ssp_dev); - - return 0; -} - -static struct platform_driver corgissp_driver = { - .probe = corgi_ssp_probe, - .remove = corgi_ssp_remove, - .suspend = corgi_ssp_suspend, - .resume = corgi_ssp_resume, - .driver = { - .name = "corgi-ssp", - }, -}; - -int __init corgi_ssp_init(void) -{ - return platform_driver_register(&corgissp_driver); -} - -arch_initcall(corgi_ssp_init); diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 6f5569bac13..1f272ea83f3 100644 --- a/arch/arm/mach-pxa/cpu-pxa.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-pxa/cpu-pxa.c + * linux/arch/arm/mach-pxa/cpufreq-pxa2xx.c * * Copyright (C) 2002,2003 Intrinsyc Software * @@ -335,9 +335,6 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) pxa27x_guess_max_freq(); /* set default policy and cpuinfo */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; - if (cpu_is_pxa25x()) - policy->policy = CPUFREQ_POLICY_PERFORMANCE; policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ policy->cur = get_clk_frequency_khz(0); /* current freq */ policy->min = policy->max = policy->cur; diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c new file mode 100644 index 00000000000..968c8309ec3 --- /dev/null +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c @@ -0,0 +1,257 @@ +/* + * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c + * + * Copyright (C) 2008 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/init.h> +#include <linux/cpufreq.h> + +#include <mach/hardware.h> +#include <mach/pxa-regs.h> +#include <mach/pxa3xx-regs.h> + +#include "generic.h" + +#define HSS_104M (0) +#define HSS_156M (1) +#define HSS_208M (2) +#define HSS_312M (3) + +#define SMCFS_78M (0) +#define SMCFS_104M (2) +#define SMCFS_208M (5) + +#define SFLFS_104M (0) +#define SFLFS_156M (1) +#define SFLFS_208M (2) +#define SFLFS_312M (3) + +#define XSPCLK_156M (0) +#define XSPCLK_NONE (3) + +#define DMCFS_26M (0) +#define DMCFS_260M (3) + +struct pxa3xx_freq_info { + unsigned int cpufreq_mhz; + unsigned int core_xl : 5; + unsigned int core_xn : 3; + unsigned int hss : 2; + unsigned int dmcfs : 2; + unsigned int smcfs : 3; + unsigned int sflfs : 2; + unsigned int df_clkdiv : 3; + + int vcc_core; /* in mV */ + int vcc_sram; /* in mV */ +}; + +#define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \ +{ \ + .cpufreq_mhz = cpufreq, \ + .core_xl = _xl, \ + .core_xn = _xn, \ + .hss = HSS_##_hss##M, \ + .dmcfs = DMCFS_##_dmc##M, \ + .smcfs = SMCFS_##_smc##M, \ + .sflfs = SFLFS_##_sfl##M, \ + .df_clkdiv = _dfi, \ + .vcc_core = vcore, \ + .vcc_sram = vsram, \ +} + +static struct pxa3xx_freq_info pxa300_freqs[] = { + /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */ + OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ + OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ + OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ + OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ +}; + +static struct pxa3xx_freq_info pxa320_freqs[] = { + /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */ + OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ + OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ + OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ + OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ + OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */ +}; + +static unsigned int pxa3xx_freqs_num; +static struct pxa3xx_freq_info *pxa3xx_freqs; +static struct cpufreq_frequency_table *pxa3xx_freqs_table; + +static int setup_freqs_table(struct cpufreq_policy *policy, + struct pxa3xx_freq_info *freqs, int num) +{ + struct cpufreq_frequency_table *table; + int i; + + table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL); + if (table == NULL) + return -ENOMEM; + + for (i = 0; i < num; i++) { + table[i].index = i; + table[i].frequency = freqs[i].cpufreq_mhz * 1000; + } + table[num].frequency = i; + table[num].frequency = CPUFREQ_TABLE_END; + + pxa3xx_freqs = freqs; + pxa3xx_freqs_num = num; + pxa3xx_freqs_table = table; + + return cpufreq_frequency_table_cpuinfo(policy, table); +} + +static void __update_core_freq(struct pxa3xx_freq_info *info) +{ + uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK; + uint32_t accr = ACCR; + uint32_t xclkcfg; + + accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK); + accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl); + + /* No clock until core PLL is re-locked */ + accr |= ACCR_XSPCLK(XSPCLK_NONE); + + xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */ + + ACCR = accr; + __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg)); + + while ((ACSR & mask) != (accr & mask)) + cpu_relax(); +} + +static void __update_bus_freq(struct pxa3xx_freq_info *info) +{ + uint32_t mask; + uint32_t accr = ACCR; + + mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK | + ACCR_DMCFS_MASK; + + accr &= ~mask; + accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) | + ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs); + + ACCR = accr; + + while ((ACSR & mask) != (accr & mask)) + cpu_relax(); +} + +static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table); +} + +static unsigned int pxa3xx_cpufreq_get(unsigned int cpu) +{ + return get_clk_frequency_khz(0); +} + +static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + struct pxa3xx_freq_info *next; + struct cpufreq_freqs freqs; + unsigned long flags; + int idx; + + if (policy->cpu != 0) + return -EINVAL; + + /* Lookup the next frequency */ + if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table, + target_freq, relation, &idx)) + return -EINVAL; + + next = &pxa3xx_freqs[idx]; + + freqs.old = policy->cur; + freqs.new = next->cpufreq_mhz * 1000; + freqs.cpu = policy->cpu; + + pr_debug("CPU frequency from %d MHz to %d MHz%s\n", + freqs.old / 1000, freqs.new / 1000, + (freqs.old == freqs.new) ? " (skipped)" : ""); + + if (freqs.old == target_freq) + return 0; + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + local_irq_save(flags); + __update_core_freq(next); + __update_bus_freq(next); + local_irq_restore(flags); + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return 0; +} + +static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy) +{ + int ret = -EINVAL; + + /* set default policy and cpuinfo */ + policy->cpuinfo.min_freq = 104000; + policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000; + policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ + policy->cur = policy->min = policy->max = get_clk_frequency_khz(0); + + if (cpu_is_pxa300() || cpu_is_pxa310()) + ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs)); + + if (cpu_is_pxa320()) + ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs)); + + if (ret) { + pr_err("failed to setup frequency table\n"); + return ret; + } + + pr_info("CPUFREQ support for PXA3xx initialized\n"); + return 0; +} + +static struct cpufreq_driver pxa3xx_cpufreq_driver = { + .verify = pxa3xx_cpufreq_verify, + .target = pxa3xx_cpufreq_set, + .init = pxa3xx_cpufreq_init, + .get = pxa3xx_cpufreq_get, + .name = "pxa3xx-cpufreq", +}; + +static int __init cpufreq_init(void) +{ + if (cpu_is_pxa3xx()) + return cpufreq_register_driver(&pxa3xx_cpufreq_driver); + + return 0; +} +module_init(cpufreq_init); + +static void __exit cpufreq_exit(void) +{ + cpufreq_unregister_driver(&pxa3xx_cpufreq_driver); +} +module_exit(cpufreq_exit); + +MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 887c738f591..bb04af4b0aa 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -32,5 +32,6 @@ extern struct platform_device pxa27x_device_pwm0; extern struct platform_device pxa27x_device_pwm1; extern struct platform_device pxa3xx_device_nand; +extern struct platform_device pxa3xx_device_i2c_power; void __init pxa_register_device(struct platform_device *dev, void *data); diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c new file mode 100644 index 00000000000..d488eded205 --- /dev/null +++ b/arch/arm/mach-pxa/e330.c @@ -0,0 +1,43 @@ +/* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> + +#include <asm/setup.h> +#include <asm/mach/arch.h> +#include <asm/mach-types.h> + +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + +static void __init e330_init(void) +{ + pxa_set_udc_info(&e7xx_udc_mach_info); +} + +MACHINE_START(E330, "Toshiba e330") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e330_init, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c new file mode 100644 index 00000000000..8ecbc547982 --- /dev/null +++ b/arch/arm/mach-pxa/e350.c @@ -0,0 +1,43 @@ +/* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> + +#include <asm/setup.h> +#include <asm/mach/arch.h> +#include <asm/mach-types.h> + +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + +static void __init e350_init(void) +{ + pxa_set_udc_info(&e7xx_udc_mach_info); +} + +MACHINE_START(E350, "Toshiba e350") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e350_init, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c new file mode 100644 index 00000000000..544bbaa2062 --- /dev/null +++ b/arch/arm/mach-pxa/e400.c @@ -0,0 +1,94 @@ +/* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> + +#include <asm/setup.h> +#include <asm/mach/arch.h> +#include <asm/mach-types.h> + +#include <mach/pxa-regs.h> +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> + +#include <mach/pxafb.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + +/* ------------------------ E400 LCD definitions ------------------------ */ + +static struct pxafb_mode_info e400_pxafb_mode_info = { + .pixclock = 140703, + .xres = 240, + .yres = 320, + .bpp = 16, + .hsync_len = 4, + .left_margin = 28, + .right_margin = 8, + .vsync_len = 3, + .upper_margin = 5, + .lower_margin = 6, + .sync = 0, +}; + +static struct pxafb_mach_info e400_pxafb_mach_info = { + .modes = &e400_pxafb_mode_info, + .num_modes = 1, + .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, + .lccr3 = 0, + .pxafb_backlight_power = NULL, +}; + +/* ------------------------ E400 MFP config ----------------------------- */ + +static unsigned long e400_pin_config[] __initdata = { + /* Chip selects */ + GPIO15_nCS_1, /* CS1 - Flash */ + GPIO80_nCS_4, /* CS4 - TMIO */ + + /* Clocks */ + GPIO12_32KHz, + + /* BTUART */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ + + /* wakeup */ + GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, +}; + +/* ---------------------------------------------------------------------- */ + +static void __init e400_init(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); + set_pxa_fb_info(&e400_pxafb_mach_info); + pxa_set_udc_info(&e7xx_udc_mach_info); +} + +MACHINE_START(E400, "Toshiba e400") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e400_init, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c deleted file mode 100644 index 263884165f5..00000000000 --- a/arch/arm/mach-pxa/e400_lcd.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * e400_lcd.c - * - * (c) 2005 Ian Molton <spyro@f2s.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> - -#include <asm/mach-types.h> -#include <mach/pxa-regs.h> -#include <mach/pxafb.h> - -static struct pxafb_mode_info e400_pxafb_mode_info = { - .pixclock = 140703, - .xres = 240, - .yres = 320, - .bpp = 16, - .hsync_len = 4, - .left_margin = 28, - .right_margin = 8, - .vsync_len = 3, - .upper_margin = 5, - .lower_margin = 6, - .sync = 0, -}; - -static struct pxafb_mach_info e400_pxafb_mach_info = { - .modes = &e400_pxafb_mode_info, - .num_modes = 1, - .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, - .lccr3 = 0, - .pxafb_backlight_power = NULL, -}; - -static int __init e400_lcd_init(void) -{ - if (!machine_is_e400()) - return -ENODEV; - - set_pxa_fb_info(&e400_pxafb_mach_info); - return 0; -} - -module_init(e400_lcd_init); - -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_DESCRIPTION("e400 lcd driver"); -MODULE_LICENSE("GPLv2"); - diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c new file mode 100644 index 00000000000..c57a15b37f0 --- /dev/null +++ b/arch/arm/mach-pxa/e740.c @@ -0,0 +1,169 @@ +/* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/fb.h> + +#include <video/w100fb.h> + +#include <asm/setup.h> +#include <asm/mach/arch.h> +#include <asm/mach-types.h> + +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + + +/* ------------------------ e740 video support --------------------------- */ + +static struct w100_gen_regs e740_lcd_regs = { + .lcd_format = 0x00008023, + .lcdd_cntl1 = 0x0f000000, + .lcdd_cntl2 = 0x0003ffff, + .genlcd_cntl1 = 0x00ffff03, + .genlcd_cntl2 = 0x003c0f03, + .genlcd_cntl3 = 0x000143aa, +}; + +static struct w100_mode e740_lcd_mode = { + .xres = 240, + .yres = 320, + .left_margin = 20, + .right_margin = 28, + .upper_margin = 9, + .lower_margin = 8, + .crtc_ss = 0x80140013, + .crtc_ls = 0x81150110, + .crtc_gs = 0x80050005, + .crtc_vpos_gs = 0x000a0009, + .crtc_rev = 0x0040010a, + .crtc_dclk = 0xa906000a, + .crtc_gclk = 0x80050108, + .crtc_goe = 0x80050108, + .pll_freq = 57, + .pixclk_divider = 4, + .pixclk_divider_rotated = 4, + .pixclk_src = CLK_SRC_XTAL, + .sysclk_divider = 1, + .sysclk_src = CLK_SRC_PLL, + .crtc_ps1_active = 0x41060010, +}; + +static struct w100_gpio_regs e740_w100_gpio_info = { + .init_data1 = 0x21002103, + .gpio_dir1 = 0xffffdeff, + .gpio_oe1 = 0x03c00643, + .init_data2 = 0x003f003f, + .gpio_dir2 = 0xffffffff, + .gpio_oe2 = 0x000000ff, +}; + +static struct w100fb_mach_info e740_fb_info = { + .modelist = &e740_lcd_mode, + .num_modes = 1, + .regs = &e740_lcd_regs, + .gpio = &e740_w100_gpio_info, + .xtal_freq = 14318000, + .xtal_dbl = 1, +}; + +static struct resource e740_fb_resources[] = { + [0] = { + .start = 0x0c000000, + .end = 0x0cffffff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device e740_fb_device = { + .name = "w100fb", + .id = -1, + .dev = { + .platform_data = &e740_fb_info, + }, + .num_resources = ARRAY_SIZE(e740_fb_resources), + .resource = e740_fb_resources, +}; + +/* --------------------------- MFP Pin config -------------------------- */ + +static unsigned long e740_pin_config[] __initdata = { + /* Chip selects */ + GPIO15_nCS_1, /* CS1 - Flash */ + GPIO79_nCS_3, /* CS3 - IMAGEON */ + GPIO80_nCS_4, /* CS4 - TMIO */ + + /* Clocks */ + GPIO12_32KHz, + + /* BTUART */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ + + /* PC Card */ + GPIO8_GPIO, /* CD0 */ + GPIO44_GPIO, /* CD1 */ + GPIO11_GPIO, /* IRQ0 */ + GPIO6_GPIO, /* IRQ1 */ + GPIO27_GPIO, /* RST0 */ + GPIO24_GPIO, /* RST1 */ + GPIO20_GPIO, /* PWR0 */ + GPIO23_GPIO, /* PWR1 */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO52_nPCE_1, + GPIO53_nPCE_2, + GPIO54_nPSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + + /* wakeup */ + GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, +}; + +/* ----------------------------------------------------------------------- */ + +static struct platform_device *devices[] __initdata = { + &e740_fb_device, +}; + +static void __init e740_init(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); + platform_add_devices(devices, ARRAY_SIZE(devices)); + pxa_set_udc_info(&e7xx_udc_mach_info); +} + +MACHINE_START(E740, "Toshiba e740") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e740_init, + .timer = &pxa_timer, +MACHINE_END + diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c deleted file mode 100644 index 26bd599af17..00000000000 --- a/arch/arm/mach-pxa/e740_lcd.c +++ /dev/null @@ -1,123 +0,0 @@ -/* e740_lcd.c - * - * This file contains the definitions for the LCD timings and functions - * to control the LCD power / frontlighting via the w100fb driver. - * - * (c) 2005 Ian Molton <spyro@f2s.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/module.h> -#include <linux/device.h> -#include <linux/fb.h> -#include <linux/err.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> - -#include <video/w100fb.h> - -/* -**potential** shutdown routine - to be investigated -devmem2 0x0c010528 w 0xff3fff00 -devmem2 0x0c010190 w 0x7FFF8000 -devmem2 0x0c0101b0 w 0x00FF0000 -devmem2 0x0c01008c w 0x00000000 -devmem2 0x0c010080 w 0x000000bf -devmem2 0x0c010098 w 0x00000015 -devmem2 0x0c010088 w 0x4b000204 -devmem2 0x0c010098 w 0x0000001d -*/ - -static struct w100_gen_regs e740_lcd_regs = { - .lcd_format = 0x00008023, - .lcdd_cntl1 = 0x0f000000, - .lcdd_cntl2 = 0x0003ffff, - .genlcd_cntl1 = 0x00ffff03, - .genlcd_cntl2 = 0x003c0f03, - .genlcd_cntl3 = 0x000143aa, -}; - -static struct w100_mode e740_lcd_mode = { - .xres = 240, - .yres = 320, - .left_margin = 20, - .right_margin = 28, - .upper_margin = 9, - .lower_margin = 8, - .crtc_ss = 0x80140013, - .crtc_ls = 0x81150110, - .crtc_gs = 0x80050005, - .crtc_vpos_gs = 0x000a0009, - .crtc_rev = 0x0040010a, - .crtc_dclk = 0xa906000a, - .crtc_gclk = 0x80050108, - .crtc_goe = 0x80050108, - .pll_freq = 57, - .pixclk_divider = 4, - .pixclk_divider_rotated = 4, - .pixclk_src = CLK_SRC_XTAL, - .sysclk_divider = 1, - .sysclk_src = CLK_SRC_PLL, - .crtc_ps1_active = 0x41060010, -}; - - -static struct w100_gpio_regs e740_w100_gpio_info = { - .init_data1 = 0x21002103, - .gpio_dir1 = 0xffffdeff, - .gpio_oe1 = 0x03c00643, - .init_data2 = 0x003f003f, - .gpio_dir2 = 0xffffffff, - .gpio_oe2 = 0x000000ff, -}; - -static struct w100fb_mach_info e740_fb_info = { - .modelist = &e740_lcd_mode, - .num_modes = 1, - .regs = &e740_lcd_regs, - .gpio = &e740_w100_gpio_info, - .xtal_freq = 14318000, - .xtal_dbl = 1, -}; - -static struct resource e740_fb_resources[] = { - [0] = { - .start = 0x0c000000, - .end = 0x0cffffff, - .flags = IORESOURCE_MEM, - }, -}; - -/* ----------------------- device declarations -------------------------- */ - - -static struct platform_device e740_fb_device = { - .name = "w100fb", - .id = -1, - .dev = { - .platform_data = &e740_fb_info, - }, - .num_resources = ARRAY_SIZE(e740_fb_resources), - .resource = e740_fb_resources, -}; - -static int e740_lcd_init(void) -{ - int ret; - - if (!machine_is_e740()) - return -ENODEV; - - return platform_device_register(&e740_fb_device); -} - -module_init(e740_lcd_init); - -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_DESCRIPTION("e740 lcd driver"); -MODULE_LICENSE("GPLv2"); diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750.c index 75edc3b5390..640e738b85d 100644 --- a/arch/arm/mach-pxa/e750_lcd.c +++ b/arch/arm/mach-pxa/e750.c @@ -1,25 +1,35 @@ -/* e750_lcd.c +/* + * Hardware definitions for the Toshiba eseries PDAs * - * This file contains the definitions for the LCD timings and functions - * to control the LCD power / frontlighting via the w100fb driver. + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> * - * (c) 2005 Ian Molton <spyro@f2s.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. * */ -#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> #include <linux/device.h> -#include <linux/fb.h> -#include <linux/err.h> #include <linux/platform_device.h> +#include <linux/fb.h> + +#include <video/w100fb.h> +#include <asm/setup.h> +#include <asm/mach/arch.h> #include <asm/mach-types.h> -#include <video/w100fb.h> +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + +/* ---------------------- E750 LCD definitions -------------------- */ static struct w100_gen_regs e750_lcd_regs = { .lcd_format = 0x00008003, @@ -54,7 +64,6 @@ static struct w100_mode e750_lcd_mode = { .sysclk_src = CLK_SRC_PLL, }; - static struct w100_gpio_regs e750_w100_gpio_info = { .init_data1 = 0x01192f1b, .gpio_dir1 = 0xd5ffdeff, @@ -81,9 +90,6 @@ static struct resource e750_fb_resources[] = { }, }; -/* ----------------------- device declarations -------------------------- */ - - static struct platform_device e750_fb_device = { .name = "w100fb", .id = -1, @@ -94,16 +100,27 @@ static struct platform_device e750_fb_device = { .resource = e750_fb_resources, }; -static int e750_lcd_init(void) -{ - if (!machine_is_e750()) - return -ENODEV; +/* ----------------------------------------------------------------------- */ - return platform_device_register(&e750_fb_device); +static struct platform_device *devices[] __initdata = { + &e750_fb_device, +}; + +static void __init e750_init(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); + pxa_set_udc_info(&e7xx_udc_mach_info); } -module_init(e750_lcd_init); +MACHINE_START(E750, "Toshiba e750") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e750_init, + .timer = &pxa_timer, +MACHINE_END -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_DESCRIPTION("e750 lcd driver"); -MODULE_LICENSE("GPLv2"); diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800.c index e6aeab0ebc2..a293e09bfe2 100644 --- a/arch/arm/mach-pxa/e800_lcd.c +++ b/arch/arm/mach-pxa/e800.c @@ -1,25 +1,36 @@ -/* e800_lcd.c +/* + * Hardware definitions for the Toshiba eseries PDAs * - * This file contains the definitions for the LCD timings and functions - * to control the LCD power / frontlighting via the w100fb driver. + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> * - * (c) 2005 Ian Molton <spyro@f2s.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. * */ -#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> #include <linux/device.h> -#include <linux/fb.h> -#include <linux/err.h> #include <linux/platform_device.h> +#include <linux/fb.h> + +#include <video/w100fb.h> +#include <asm/setup.h> +#include <asm/mach/arch.h> #include <asm/mach-types.h> -#include <video/w100fb.h> +#include <mach/mfp-pxa25x.h> +#include <mach/hardware.h> +#include <mach/eseries-gpio.h> +#include <mach/udc.h> + +#include "generic.h" +#include "eseries.h" + +/* ------------------------ e800 LCD definitions ------------------------- */ static struct w100_gen_regs e800_lcd_regs = { .lcd_format = 0x00008003, @@ -71,8 +82,8 @@ static struct w100_mode e800_lcd_mode[2] = { .crtc_goe = 0x80cc0015, .crtc_ps1_active = 0x00000000, .pll_freq = 100, - .pixclk_divider = 6, /* Wince uses 14 which gives a 7MHz pclk. */ - .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */ + .pixclk_divider = 6, /* Wince uses 14 which gives a */ + .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */ .pixclk_src = CLK_SRC_PLL, .sysclk_divider = 0, .sysclk_src = CLK_SRC_PLL, @@ -131,9 +142,6 @@ static struct resource e800_fb_resources[] = { }, }; -/* ----------------------- device declarations -------------------------- */ - - static struct platform_device e800_fb_device = { .name = "w100fb", .id = -1, @@ -144,16 +152,35 @@ static struct platform_device e800_fb_device = { .resource = e800_fb_resources, }; -static int e800_lcd_init(void) -{ - if (!machine_is_e800()) - return -ENODEV; +/* --------------------------- UDC definitions --------------------------- */ + +static struct pxa2xx_udc_mach_info e800_udc_mach_info = { + .gpio_vbus = GPIO_E800_USB_DISC, + .gpio_pullup = GPIO_E800_USB_PULLUP, + .gpio_pullup_inverted = 1 +}; - return platform_device_register(&e800_fb_device); +/* ----------------------------------------------------------------------- */ + +static struct platform_device *devices[] __initdata = { + &e800_fb_device, +}; + +static void __init e800_init(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); + pxa_set_udc_info(&e800_udc_mach_info); } -module_init(e800_lcd_init); +MACHINE_START(E800, "Toshiba e800") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .init_machine = e800_init, + .timer = &pxa_timer, +MACHINE_END -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_DESCRIPTION("e800 lcd driver"); -MODULE_LICENSE("GPLv2"); diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 7a0a681a584..f5ed8038ede 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -373,10 +373,6 @@ static inline void em_x270_init_nand(void) {} #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) static int em_x270_ohci_init(struct device *dev) { - /* Set the Power Control Polarity Low */ - UHCHR = (UHCHR | UHCHR_PCPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); - /* enable port 2 transiever */ UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; @@ -385,6 +381,7 @@ static int em_x270_ohci_init(struct device *dev) static struct pxaohci_platform_data em_x270_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, .init = em_x270_ohci_init, }; diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 001a252bd51..d28849b50a1 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -19,68 +19,13 @@ #include <mach/mfp-pxa25x.h> #include <mach/hardware.h> +#include <mach/eseries-gpio.h> +#include <mach/udc.h> #include "generic.h" -static unsigned long e740_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO79_nCS_3, /* CS3 - IMAGEON */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO12_32KHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ - - /* PC Card */ - GPIO8_GPIO, /* CD0 */ - GPIO44_GPIO, /* CD1 */ - GPIO11_GPIO, /* IRQ0 */ - GPIO6_GPIO, /* IRQ1 */ - GPIO27_GPIO, /* RST0 */ - GPIO24_GPIO, /* RST1 */ - GPIO20_GPIO, /* PWR0 */ - GPIO23_GPIO, /* PWR1 */ - GPIO48_nPOE, - GPIO49_nPWE, - GPIO50_nPIOR, - GPIO51_nPIOW, - GPIO52_nPCE_1, - GPIO53_nPCE_2, - GPIO54_nPSKTSEL, - GPIO55_nPREG, - GPIO56_nPWAIT, - GPIO57_nIOIS16, - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - -static unsigned long e400_pin_config[] __initdata = { - /* Chip selects */ - GPIO15_nCS_1, /* CS1 - Flash */ - GPIO80_nCS_4, /* CS4 - TMIO */ - - /* Clocks */ - GPIO12_32KHz, - - /* BTUART */ - GPIO42_BTUART_RXD, - GPIO43_BTUART_TXD, - GPIO44_BTUART_CTS, - GPIO45_GPIO, /* Used by TMIO for #SUSPEND */ - - /* wakeup */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, -}; - /* Only e800 has 128MB RAM */ -static void __init eseries_fixup(struct machine_desc *desc, +void __init eseries_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) { mi->nr_banks=1; @@ -92,95 +37,9 @@ static void __init eseries_fixup(struct machine_desc *desc, mi->bank[0].size = (64*1024*1024); } -static void __init e740_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); -} - -static void __init e400_init(void) -{ - pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); -} - -/* e-series machine definitions */ - -#ifdef CONFIG_MACH_E330 -MACHINE_START(E330, "Toshiba e330") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .timer = &pxa_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E350 -MACHINE_START(E350, "Toshiba e350") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .timer = &pxa_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E740 -MACHINE_START(E740, "Toshiba e740") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .init_machine = e740_init, - .timer = &pxa_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E750 -MACHINE_START(E750, "Toshiba e750") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .timer = &pxa_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E400 -MACHINE_START(E400, "Toshiba e400") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .init_machine = e400_init, - .timer = &pxa_timer, -MACHINE_END -#endif - -#ifdef CONFIG_MACH_E800 -MACHINE_START(E800, "Toshiba e800") - /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, - .boot_params = 0xa0000100, - .map_io = pxa_map_io, - .init_irq = pxa25x_init_irq, - .fixup = eseries_fixup, - .timer = &pxa_timer, -MACHINE_END -#endif +struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { + .gpio_vbus = GPIO_E7XX_USB_DISC, + .gpio_pullup = GPIO_E7XX_USB_PULLUP, + .gpio_pullup_inverted = 1 +}; diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h new file mode 100644 index 00000000000..a83f88d4b6a --- /dev/null +++ b/arch/arm/mach-pxa/eseries.h @@ -0,0 +1,4 @@ +void __init eseries_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, struct meminfo *mi); + +extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info; diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c deleted file mode 100644 index d622c04c0d4..00000000000 --- a/arch/arm/mach-pxa/eseries_udc.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * UDC functions for the Toshiba e-series PDAs - * - * Copyright (c) Ian Molton 2003 - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> - -#include <mach/udc.h> -#include <mach/eseries-gpio.h> -#include <mach/hardware.h> -#include <mach/pxa-regs.h> -#include <asm/mach/arch.h> -#include <asm/mach-types.h> -#include <asm/mach/map.h> -#include <asm/domain.h> - -/* local PXA generic code */ -#include "generic.h" - -static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { - .gpio_vbus = GPIO_E7XX_USB_DISC, - .gpio_pullup = GPIO_E7XX_USB_PULLUP, - .gpio_pullup_inverted = 1 -}; - -static struct pxa2xx_udc_mach_info e800_udc_mach_info = { - .gpio_vbus = GPIO_E800_USB_DISC, - .gpio_pullup = GPIO_E800_USB_PULLUP, - .gpio_pullup_inverted = 1 -}; - -static int __init eseries_udc_init(void) -{ - if (machine_is_e330() || machine_is_e350() || - machine_is_e740() || machine_is_e750() || - machine_is_e400()) - pxa_set_udc_info(&e7xx_udc_mach_info); - else if (machine_is_e800()) - pxa_set_udc_info(&e800_udc_mach_info); - - return 0; -} - -module_init(eseries_udc_init); - -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_DESCRIPTION("eseries UDC support"); -MODULE_LICENSE("GPLv2"); diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index ceaed007636..85ed0b33331 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -46,7 +46,7 @@ void clear_reset_status(unsigned int mask) */ unsigned int get_clk_frequency_khz(int info) { - if (cpu_is_pxa21x() || cpu_is_pxa25x()) + if (cpu_is_pxa25x()) return pxa25x_get_clk_frequency_khz(info); else if (cpu_is_pxa27x()) return pxa27x_get_clk_frequency_khz(info); @@ -60,7 +60,7 @@ EXPORT_SYMBOL(get_clk_frequency_khz); */ unsigned int get_memclk_frequency_10khz(void) { - if (cpu_is_pxa21x() || cpu_is_pxa25x()) + if (cpu_is_pxa25x()) return pxa25x_get_memclk_frequency_10khz(); else if (cpu_is_pxa27x()) return pxa27x_get_memclk_frequency_10khz(); @@ -88,11 +88,6 @@ static struct map_desc standard_io_desc[] __initdata = { .pfn = __phys_to_pfn(0x48000000), .length = 0x00200000, .type = MT_DEVICE - }, { /* USB host */ - .virtual = 0xf8000000, - .pfn = __phys_to_pfn(0x4c000000), - .length = 0x00100000, - .type = MT_DEVICE }, { /* Camera */ .virtual = 0xfa000000, .pfn = __phys_to_pfn(0x50000000), diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 041c048320e..dc876a8e666 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -65,4 +65,5 @@ static inline void pxa3xx_clear_reset_status(unsigned int mask) {} extern struct sysdev_class pxa_irq_sysclass; extern struct sysdev_class pxa_gpio_sysclass; +extern struct sysdev_class pxa2xx_mfp_sysclass; extern struct sysdev_class pxa3xx_mfp_sysclass; diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c index 07acc1b2385..14930cf8be7 100644 --- a/arch/arm/mach-pxa/gpio.c +++ b/arch/arm/mach-pxa/gpio.c @@ -16,10 +16,10 @@ #include <linux/module.h> #include <linux/irq.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <asm/gpio.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/pxa-regs.h> #include <mach/pxa2xx-gpio.h> @@ -275,7 +275,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) loop = 1; n = PXA_GPIO_IRQ_BASE + bit; - desc_handle_irq(n, irq_desc + n); + generic_handle_irq(n); bit = find_next_bit(gedr, GEDR_BITS, bit + 1); } diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index c0092472fa5..d8962a0fb98 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c @@ -20,8 +20,12 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/interrupt.h> +#include <linux/delay.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/gpio.h> +#include <linux/err.h> +#include <linux/clk.h> #include <asm/setup.h> #include <asm/memory.h> @@ -40,7 +44,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa25x.h> #include "generic.h" @@ -85,21 +89,8 @@ static struct platform_device *devices[] __initdata = { }; #ifdef CONFIG_MMC_PXA -static struct pxamci_platform_data gumstix_mci_platform_data; - -static int gumstix_mci_init(struct device *dev, irq_handler_t detect_int, - void *data) -{ - pxa_gpio_mode(GPIO6_MMCCLK_MD); - pxa_gpio_mode(GPIO53_MMCCLK_MD); - pxa_gpio_mode(GPIO8_MMCCS0_MD); - - return 0; -} - static struct pxamci_platform_data gumstix_mci_platform_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = gumstix_mci_init, }; static void __init gumstix_mmc_init(void) @@ -109,11 +100,11 @@ static void __init gumstix_mmc_init(void) #else static void __init gumstix_mmc_init(void) { - printk(KERN_INFO "Gumstix mmc disabled\n"); + pr_debug("Gumstix mmc disabled\n"); } #endif -#ifdef CONFIG_USB_GADGET_PXA2XX +#ifdef CONFIG_USB_GADGET_PXA25X static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, @@ -126,12 +117,87 @@ static void __init gumstix_udc_init(void) #else static void gumstix_udc_init(void) { - printk(KERN_INFO "Gumstix udc is disabled\n"); + pr_debug("Gumstix udc is disabled\n"); } #endif +#ifdef CONFIG_BT +/* Normally, the bootloader would have enabled this 32kHz clock but many +** boards still have u-boot 1.1.4 so we check if it has been turned on and +** if not, we turn it on with a warning message. */ +static void gumstix_setup_bt_clock(void) +{ + int timeout = 500; + + if (!(OSCC & OSCC_OOK)) + pr_warning("32kHz clock was not on. Bootloader may need to " + "be updated\n"); + else + return; + + OSCC |= OSCC_OON; + do { + if (OSCC & OSCC_OOK) + break; + udelay(1); + } while (--timeout); + if (!timeout) + pr_err("Failed to start 32kHz clock\n"); +} + +static void __init gumstix_bluetooth_init(void) +{ + int err; + + gumstix_setup_bt_clock(); + + err = gpio_request(GPIO_GUMSTIX_BTRESET, "BTRST"); + if (err) { + pr_err("gumstix: failed request gpio for bluetooth reset\n"); + return; + } + + err = gpio_direction_output(GPIO_GUMSTIX_BTRESET, 1); + if (err) { + pr_err("gumstix: can't reset bluetooth\n"); + return; + } + gpio_set_value(GPIO_GUMSTIX_BTRESET, 0); + udelay(100); + gpio_set_value(GPIO_GUMSTIX_BTRESET, 1); +} +#else +static void gumstix_bluetooth_init(void) +{ + pr_debug("Gumstix Bluetooth is disabled\n"); +} +#endif + +static unsigned long gumstix_pin_config[] __initdata = { + GPIO12_32KHz, + /* BTUART */ + GPIO42_HWUART_RXD, + GPIO43_HWUART_TXD, + GPIO44_HWUART_CTS, + GPIO45_HWUART_RTS, + /* MMC */ + GPIO6_MMC_CLK, + GPIO53_MMC_CLK, + GPIO8_MMC_CS0, + /* these are used by AM200EPD */ + GPIO51_GPIO, + GPIO49_GPIO, + GPIO48_GPIO, + GPIO32_GPIO, + GPIO17_GPIO, + GPIO16_GPIO, +}; + static void __init gumstix_init(void) { + pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config)); + + gumstix_bluetooth_init(); gumstix_udc_init(); gumstix_mmc_init(); (void) platform_add_devices(devices, ARRAY_SIZE(devices)); diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 5aa0270d560..013b15baa03 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -32,7 +32,7 @@ #include <asm/mach/map.h> #include <mach/pxa-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa25x.h> #include <mach/idp.h> #include <mach/pxafb.h> #include <mach/bitfield.h> @@ -46,6 +46,47 @@ * - Ethernet interrupt */ +static unsigned long idp_pin_config[] __initdata = { + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + + /* BTUART */ + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_BTUART_RTS, + + /* STUART */ + GPIO46_STUART_RXD, + GPIO47_STUART_TXD, + + /* MMC */ + GPIO6_MMC_CLK, + GPIO8_MMC_CS0, + + /* Ethernet */ + GPIO33_nCS_5, /* Ethernet CS */ + GPIO4_GPIO, /* Ethernet IRQ */ +}; + static struct resource smc91x_resources[] = { [0] = { .start = (IDP_ETH_PHYS + 0x300), @@ -121,44 +162,28 @@ static struct pxafb_mach_info sharp_lm8v31 = { .num_modes = 1, .cmap_inverse = 0, .cmap_static = 0, - .lccr0 = LCCR0_SDS, - .lccr3 = LCCR3_PCP | LCCR3_Acb(255), + .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | + LCD_AC_BIAS_FREQ(255), .pxafb_backlight_power = &idp_backlight_power, .pxafb_lcd_power = &idp_lcd_power }; -static int idp_mci_init(struct device *dev, irq_handler_t idp_detect_int, void *data) -{ - /* setup GPIO for PXA25x MMC controller */ - pxa_gpio_mode(GPIO6_MMCCLK_MD); - pxa_gpio_mode(GPIO8_MMCCS0_MD); - - return 0; -} - static struct pxamci_platform_data idp_mci_platform_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .init = idp_mci_init, }; static void __init idp_init(void) { printk("idp_init()\n"); + pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config)); + platform_device_register(&smc91x_device); //platform_device_register(&mst_audio_device); set_pxa_fb_info(&sharp_lm8v31); pxa_set_mci_info(&idp_mci_platform_data); } -static void __init idp_init_irq(void) -{ - - pxa25x_init_irq(); - - set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE); -} - static struct map_desc idp_io_desc[] __initdata = { { .virtual = IDP_COREVOLT_VIRT, @@ -177,15 +202,6 @@ static void __init idp_map_io(void) { pxa_map_io(); iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); - - // serial ports 2 & 3 - pxa_gpio_mode(GPIO42_BTRXD_MD); - pxa_gpio_mode(GPIO43_BTTXD_MD); - pxa_gpio_mode(GPIO44_BTCTS_MD); - pxa_gpio_mode(GPIO45_BTRTS_MD); - pxa_gpio_mode(GPIO46_STRXD_MD); - pxa_gpio_mode(GPIO47_STTXD_MD); - } @@ -194,7 +210,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") .phys_io = 0x40000000, .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = idp_map_io, - .init_irq = idp_init_irq, + .init_irq = pxa25x_init_irq, .timer = &pxa_timer, .init_machine = idp_init, MACHINE_END diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h deleted file mode 100644 index 5d8cc1d9cb1..00000000000 --- a/arch/arm/mach-pxa/include/mach/akita.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Hardware specific definitions for SL-C1000 (Akita) - * - * Copyright (c) 2005 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -/* Akita IO Expander GPIOs */ - -#define AKITA_IOEXP_RESERVED_7 (1 << 7) -#define AKITA_IOEXP_IR_ON (1 << 6) -#define AKITA_IOEXP_AKIN_PULLUP (1 << 5) -#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) -#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) -#define AKITA_IOEXP_MIC_BIAS (1 << 2) -#define AKITA_IOEXP_RESERVED_1 (1 << 1) -#define AKITA_IOEXP_RESERVED_0 (1 << 0) - -/* Direction Bitfield 0=output 1=input */ -#define AKITA_IOEXP_IO_DIR 0 -/* Default Values */ -#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) - -extern struct platform_device akitaioexp_device; - -void akita_set_ioexp(struct device *dev, unsigned char bitmask); -void akita_reset_ioexp(struct device *dev, unsigned char bitmask); - diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h index 39516ced8b1..31abe6d514b 100644 --- a/arch/arm/mach-pxa/include/mach/camera.h +++ b/arch/arm/mach-pxa/include/mach/camera.h @@ -36,8 +36,6 @@ struct pxacamera_platform_data { int (*init)(struct device *); - int (*power)(struct device *, int); - int (*reset)(struct device *, int); unsigned long flags; unsigned long mclk_10khz; diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index bf856503baf..585970ef08c 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h @@ -98,12 +98,21 @@ CORGI_SCP_MIC_BIAS ) #define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) +#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) +#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) +#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ +#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ +#define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3) +#define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4) +#define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5) +#define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6) +#define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7) +#define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8) /* * Shared data structures */ extern struct platform_device corgiscoop_device; -extern struct platform_device corgissp_device; #endif /* __ASM_ARCH_CORGI_H */ diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S index de16c12d523..f6b4bf3e73d 100644 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S @@ -41,7 +41,7 @@ and \irqstat, \irqstat, \irqnr clz \irqnr, \irqstat rsb \irqnr, \irqnr, #31 - add \irqnr, \irqnr, #32 + add \irqnr, \irqnr, #(32 + PXA_IRQ(0)) b 1001f 1003: mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP @@ -52,6 +52,6 @@ rsb \irqstat, \irqnr, #0 and \irqstat, \irqstat, \irqnr clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 + rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0)) 1001: .endm diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index e89df4d0d23..a582a6d9b92 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -62,26 +62,74 @@ #ifndef __ASSEMBLY__ +#include <asm/cputype.h> + +/* + * CPU Stepping CPU_ID JTAG_ID + * + * PXA210 B0 0x69052922 0x2926C013 + * PXA210 B1 0x69052923 0x3926C013 + * PXA210 B2 0x69052924 0x4926C013 + * PXA210 C0 0x69052D25 0x5926C013 + * + * PXA250 A0 0x69052100 0x09264013 + * PXA250 A1 0x69052101 0x19264013 + * PXA250 B0 0x69052902 0x29264013 + * PXA250 B1 0x69052903 0x39264013 + * PXA250 B2 0x69052904 0x49264013 + * PXA250 C0 0x69052D05 0x59264013 + * + * PXA255 A0 0x69052D06 0x69264013 + * + * PXA26x A0 0x69052903 0x39264013 + * PXA26x B0 0x69052D05 0x59264013 + * + * PXA27x A0 0x69054110 0x09265013 + * PXA27x A1 0x69054111 0x19265013 + * PXA27x B0 0x69054112 0x29265013 + * PXA27x B1 0x69054113 0x39265013 + * PXA27x C0 0x69054114 0x49265013 + * PXA27x C5 0x69054117 0x79265013 + * + * PXA30x A0 0x69056880 0x0E648013 + * PXA30x A1 0x69056881 0x1E648013 + * PXA31x A0 0x69056890 0x0E649013 + * PXA31x A1 0x69056891 0x1E649013 + * PXA31x A2 0x69056892 0x2E649013 + * PXA32x B1 0x69056825 0x5E642013 + * PXA32x B2 0x69056826 0x6E642013 + * + * PXA930 B0 0x69056835 0x5E643013 + * PXA930 B1 0x69056837 0x7E643013 + * PXA930 B2 0x69056838 0x8E643013 + */ #ifdef CONFIG_PXA25x -#define __cpu_is_pxa21x(id) \ +#define __cpu_is_pxa210(id) \ ({ \ - unsigned int _id = (id) >> 4 & 0xf3f; \ - _id == 0x212; \ + unsigned int _id = (id) & 0xf3f0; \ + _id == 0x2120; \ }) -#define __cpu_is_pxa255(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x2d0; \ - }) +#define __cpu_is_pxa250(id) \ + ({ \ + unsigned int _id = (id) & 0xf3ff; \ + _id <= 0x2105; \ + }) + +#define __cpu_is_pxa255(id) \ + ({ \ + unsigned int _id = (id) & 0xffff; \ + _id == 0x2d06; \ + }) #define __cpu_is_pxa25x(id) \ ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x2d0 || _id == 0x290; \ + unsigned int _id = (id) & 0xf300; \ + _id == 0x2100; \ }) #else -#define __cpu_is_pxa21x(id) (0) +#define __cpu_is_pxa210(id) (0) +#define __cpu_is_pxa250(id) (0) #define __cpu_is_pxa255(id) (0) #define __cpu_is_pxa25x(id) (0) #endif @@ -136,9 +184,14 @@ #define __cpu_is_pxa930(id) (0) #endif -#define cpu_is_pxa21x() \ +#define cpu_is_pxa210() \ ({ \ - __cpu_is_pxa21x(read_cpuid_id()); \ + __cpu_is_pxa210(read_cpuid_id()); \ + }) + +#define cpu_is_pxa250() \ + ({ \ + __cpu_is_pxa250(read_cpuid_id()); \ }) #define cpu_is_pxa255() \ @@ -151,6 +204,8 @@ __cpu_is_pxa25x(read_cpuid_id()); \ }) +extern int cpu_is_pxa26x(void); + #define cpu_is_pxa27x() \ ({ \ __cpu_is_pxa27x(read_cpuid_id()); \ diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h index 80596b01344..1a9f65e6ec0 100644 --- a/arch/arm/mach-pxa/include/mach/i2c.h +++ b/arch/arm/mach-pxa/include/mach/i2c.h @@ -65,13 +65,18 @@ struct i2c_pxa_platform_data { unsigned int slave_addr; struct i2c_slave_client *slave; unsigned int class; - int use_pio; + unsigned int use_pio :1; + unsigned int fast_mode :1; }; extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); #ifdef CONFIG_PXA27x -extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info); +extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); +#endif + +#ifdef CONFIG_PXA3xx +extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); #endif #endif diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 108b5db9b2a..9c163e19ada 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -11,7 +11,14 @@ */ -#define PXA_IRQ(x) (x) +#ifdef CONFIG_PXA_HAVE_ISA_IRQS +#define PXA_ISA_IRQ(x) (x) +#define PXA_ISA_IRQ_NUM (16) +#else +#define PXA_ISA_IRQ_NUM (0) +#endif + +#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ @@ -73,7 +80,7 @@ #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ #endif -#define PXA_GPIO_IRQ_BASE (64) +#define PXA_GPIO_IRQ_BASE PXA_IRQ(64) #define PXA_GPIO_IRQ_NUM (128) #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) @@ -178,13 +185,7 @@ #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) #elif defined(CONFIG_SHARP_LOCOMO) #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) -#elif defined(CONFIG_ARCH_LUBBOCK) || \ - defined(CONFIG_MACH_LOGICPD_PXA270) || \ - defined(CONFIG_MACH_TOSA) || \ - defined(CONFIG_MACH_MAINSTONE) || \ - defined(CONFIG_MACH_PCM027) || \ - defined(CONFIG_ARCH_PXA_ESERIES) || \ - defined(CONFIG_MACH_MAGICIAN) +#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) #define NR_IRQS (IRQ_BOARD_END) #elif defined(CONFIG_MACH_ZYLONITE) #define NR_IRQS (IRQ_BOARD_START + 32) diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h index 79d209b826f..5c4e320c143 100644 --- a/arch/arm/mach-pxa/include/mach/littleton.h +++ b/arch/arm/mach-pxa/include/mach/littleton.h @@ -3,4 +3,6 @@ #define LITTLETON_ETH_PHYS 0x30000000 +#define LITTLETON_GPIO_LCD_CS (17) + #endif /* __ASM_ARCH_ZYLONITE_H */ diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h index 552eb7fa657..59aef89808d 100644 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ b/arch/arm/mach-pxa/include/mach/memory.h @@ -40,11 +40,11 @@ #define NODE_MEM_SIZE_BITS 26 #if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) -void cmx270_pci_adjust_zones(int node, unsigned long *size, +void cmx2xx_pci_adjust_zones(int node, unsigned long *size, unsigned long *holes); #define arch_adjust_zones(node, size, holes) \ - cmx270_pci_adjust_zones(node, size, holes) + cmx2xx_pci_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) #endif diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h index 6c8e72238bf..617cab2cc8d 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h @@ -17,7 +17,7 @@ /* Crystal and Clock Signals */ #define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) -#define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) +#define GPIO70_RTCCLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) #define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) #define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) #define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) @@ -156,6 +156,6 @@ #define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) #define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) #define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) -#define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) +#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) #endif /* __ASM_ARCH_MFP_PXA25X_H */ diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h index 74990510cf3..67f8385ea54 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h @@ -257,10 +257,10 @@ #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) -#define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) -#define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) -#define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) -#define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) +#define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT) +#define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW) +#define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT) +#define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW) #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h index 8769567b389..482185053a9 100644 --- a/arch/arm/mach-pxa/include/mach/mfp.h +++ b/arch/arm/mach-pxa/include/mach/mfp.h @@ -274,12 +274,13 @@ typedef unsigned long mfp_cfg_t; #define MFP_DS_MASK (0x7 << 13) #define MFP_DS(x) (((x) >> 13) & 0x7) -#define MFP_LPM_INPUT (0x0 << 16) +#define MFP_LPM_DEFAULT (0x0 << 16) #define MFP_LPM_DRIVE_LOW (0x1 << 16) #define MFP_LPM_DRIVE_HIGH (0x2 << 16) #define MFP_LPM_PULL_LOW (0x3 << 16) #define MFP_LPM_PULL_HIGH (0x4 << 16) #define MFP_LPM_FLOAT (0x5 << 16) +#define MFP_LPM_INPUT (0x6 << 16) #define MFP_LPM_STATE_MASK (0x7 << 16) #define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) @@ -297,7 +298,7 @@ typedef unsigned long mfp_cfg_t; #define MFP_PULL_MASK (0x3 << 21) #define MFP_PULL(x) (((x) >> 21) & 0x3) -#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\ +#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\ MFP_LPM_EDGE_NONE | MFP_PULL_NONE) #define MFP_CFG(pin, af) \ diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h new file mode 100644 index 00000000000..8483cb51183 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/mioa701.h @@ -0,0 +1,67 @@ +#ifndef _MIOA701_H_ +#define _MIOA701_H_ + +#define MIO_CFG_IN(pin, af) \ + ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\ + (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN)) + +#define MIO_CFG_OUT(pin, af, state) \ + ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\ + (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) + +/* Global GPIOs */ +#define GPIO9_CHARGE_nEN 9 +#define GPIO18_POWEROFF 18 +#define GPIO87_LCD_POWER 87 + +/* USB */ +#define GPIO13_USB_DETECT 13 +#define GPIO22_USB_ENABLE 22 + +/* SDIO bits */ +#define GPIO78_SDIO_RO 78 +#define GPIO15_SDIO_INSERT 15 +#define GPIO91_SDIO_EN 91 + +/* Bluetooth */ +#define GPIO83_BT_ON 83 + +/* GPS */ +#define GPIO23_GPS_UNKNOWN1 23 +#define GPIO26_GPS_ON 26 +#define GPIO27_GPS_RESET 27 +#define GPIO106_GPS_UNKNOWN2 106 +#define GPIO107_GPS_UNKNOWN3 107 + +/* GSM */ +#define GPIO24_GSM_MOD_RESET_CMD 24 +#define GPIO88_GSM_nMOD_ON_CMD 88 +#define GPIO90_GSM_nMOD_OFF_CMD 90 +#define GPIO114_GSM_nMOD_DTE_UART_STATE 114 +#define GPIO25_GSM_MOD_ON_STATE 25 +#define GPIO113_GSM_EVENT 113 + +/* SOUND */ +#define GPIO12_HPJACK_INSERT 12 + +/* LEDS */ +#define GPIO10_LED_nCharging 10 +#define GPIO97_LED_nBlue 97 +#define GPIO98_LED_nOrange 98 +#define GPIO82_LED_nVibra 82 +#define GPIO115_LED_nKeyboard 115 + +/* Keyboard */ +#define GPIO0_KEY_POWER 0 +#define GPIO93_KEY_VOLUME_UP 93 +#define GPIO94_KEY_VOLUME_DOWN 94 + +extern struct input_dev *mioa701_evdev; +extern void mioa701_gpio_lpm_set(unsigned long mfp_pin); + +/* Assembler externals mioa701_bootresume.S */ +extern u32 mioa701_bootstrap; +extern u32 mioa701_jumpaddr; +extern u32 mioa701_bootstrap_lg; + +#endif /* _MIOA701_H */ diff --git a/arch/arm/mach-pxa/include/mach/ohci.h b/arch/arm/mach-pxa/include/mach/ohci.h index e848a47128c..95b6e2a6e51 100644 --- a/arch/arm/mach-pxa/include/mach/ohci.h +++ b/arch/arm/mach-pxa/include/mach/ohci.h @@ -7,6 +7,22 @@ struct pxaohci_platform_data { int (*init)(struct device *); void (*exit)(struct device *); + unsigned long flags; +#define ENABLE_PORT1 (1 << 0) +#define ENABLE_PORT2 (1 << 1) +#define ENABLE_PORT3 (1 << 2) +#define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3) + +#define POWER_SENSE_LOW (1 << 3) +#define POWER_CONTROL_LOW (1 << 4) +#define NO_OC_PROTECTION (1 << 5) +#define OC_MODE_GLOBAL (0 << 6) +#define OC_MODE_PERPORT (1 << 6) + + int power_on_delay; /* Power On to Power Good time - in ms + * HCD must wait for this duration before + * accessing a powered on port + */ int port_mode; #define PMM_NPS_MODE 1 #define PMM_GLOBAL_MODE 2 diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h new file mode 100644 index 00000000000..5032307ebf7 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palmz72.h @@ -0,0 +1,80 @@ +/* + * GPIOs and interrupts for Palm Zire72 Handheld Computer + * + * Authors: Alex Osborne <bobofdoom@gmail.com> + * Jan Herman <2hp@seznam.cz> + * Sergey Lapin <slapin@ossfans.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _INCLUDE_PALMZ72_H_ +#define _INCLUDE_PALMZ72_H_ + +/* Power and control */ +#define GPIO_NR_PALMZ72_GPIO_RESET 1 +#define GPIO_NR_PALMZ72_POWER_DETECT 0 + +/* SD/MMC */ +#define GPIO_NR_PALMZ72_SD_DETECT_N 14 +#define GPIO_NR_PALMZ72_SD_POWER_N 98 +#define GPIO_NR_PALMZ72_SD_RO 115 + +/* Touchscreen */ +#define GPIO_NR_PALMZ72_WM9712_IRQ 27 + +/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ +#define GPIO_NR_PALMZ72_IR_DISABLE 49 + +/* USB */ +#define GPIO_NR_PALMZ72_USB_DETECT_N 15 +#define GPIO_NR_PALMZ72_USB_POWER 95 +#define GPIO_NR_PALMZ72_USB_PULLUP 12 + +/* LCD/Backlight */ +#define GPIO_NR_PALMZ72_BL_POWER 20 +#define GPIO_NR_PALMZ72_LCD_POWER 96 + +/* LED */ +#define GPIO_NR_PALMZ72_LED_GREEN 88 + +/* Bluetooth */ +#define GPIO_NR_PALMZ72_BT_POWER 17 +#define GPIO_NR_PALMZ72_BT_RESET 83 + +/** Initial values **/ + +/* Battery */ +#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ +#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ +#define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */ +#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */ + +/* Backlight */ +#define PALMZ72_MAX_INTENSITY 0xFE +#define PALMZ72_DEFAULT_INTENSITY 0x7E +#define PALMZ72_LIMIT_MASK 0x7F +#define PALMZ72_PRESCALER 0x3F +#define PALMZ72_PERIOD_NS 3500 + +#ifdef CONFIG_PM +struct palmz72_resume_info { + u32 magic0; /* 0x0 */ + u32 magic1; /* 0x4 */ + u32 resume_addr; /* 0x8 */ + u32 pad[11]; /* 0xc..0x37 */ + u32 arm_control; /* 0x38 */ + u32 aux_control; /* 0x3c */ + u32 ttb; /* 0x40 */ + u32 domain_access; /* 0x44 */ + u32 process_id; /* 0x48 */ +}; +#endif +#endif + diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h index 261e5bc958d..83342469aca 100644 --- a/arch/arm/mach-pxa/include/mach/pm.h +++ b/arch/arm/mach-pxa/include/mach/pm.h @@ -15,6 +15,8 @@ struct pxa_cpu_pm_fns { void (*restore)(unsigned long *); int (*valid)(suspend_state_t state); void (*enter)(suspend_state_t state); + int (*prepare)(void); + void (*finish)(void); }; extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h index 67debc47e8c..0b3e6d051c6 100644 --- a/arch/arm/mach-pxa/include/mach/poodle.h +++ b/arch/arm/mach-pxa/include/mach/poodle.h @@ -23,6 +23,7 @@ #define POODLE_GPIO_AC_IN (1) #define POODLE_GPIO_CO 16 #define POODLE_GPIO_TP_INT (5) +#define POODLE_GPIO_TP_CS (24) #define POODLE_GPIO_WAKEUP (11) /* change battery */ #define POODLE_GPIO_GA_INT (10) #define POODLE_GPIO_IR_ON (22) @@ -70,6 +71,14 @@ #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) #define POODLE_SCOOP_IO_OUT ( 0 ) +#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) +#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) +#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) +#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) +#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9) +#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10) +#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11) + #define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) #define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) #define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h index 12288ca3cbb..15295d96000 100644 --- a/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h @@ -69,30 +69,18 @@ /* * DMA Controller */ - -#define DCSR0 __REG(0x40000000) /* DMA Control / Status Register for Channel 0 */ -#define DCSR1 __REG(0x40000004) /* DMA Control / Status Register for Channel 1 */ -#define DCSR2 __REG(0x40000008) /* DMA Control / Status Register for Channel 2 */ -#define DCSR3 __REG(0x4000000c) /* DMA Control / Status Register for Channel 3 */ -#define DCSR4 __REG(0x40000010) /* DMA Control / Status Register for Channel 4 */ -#define DCSR5 __REG(0x40000014) /* DMA Control / Status Register for Channel 5 */ -#define DCSR6 __REG(0x40000018) /* DMA Control / Status Register for Channel 6 */ -#define DCSR7 __REG(0x4000001c) /* DMA Control / Status Register for Channel 7 */ -#define DCSR8 __REG(0x40000020) /* DMA Control / Status Register for Channel 8 */ -#define DCSR9 __REG(0x40000024) /* DMA Control / Status Register for Channel 9 */ -#define DCSR10 __REG(0x40000028) /* DMA Control / Status Register for Channel 10 */ -#define DCSR11 __REG(0x4000002c) /* DMA Control / Status Register for Channel 11 */ -#define DCSR12 __REG(0x40000030) /* DMA Control / Status Register for Channel 12 */ -#define DCSR13 __REG(0x40000034) /* DMA Control / Status Register for Channel 13 */ -#define DCSR14 __REG(0x40000038) /* DMA Control / Status Register for Channel 14 */ -#define DCSR15 __REG(0x4000003c) /* DMA Control / Status Register for Channel 15 */ - #define DCSR(x) __REG2(0x40000000, (x) << 2) #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ -#ifdef CONFIG_PXA27x +#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ +#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ +#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ +#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ +#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ + +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) #define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ #define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ #define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ @@ -101,11 +89,6 @@ #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ #define DCSR_EORINTR (1 << 9) /* The end of Receive */ #endif -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ @@ -114,145 +97,9 @@ &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ &__REG2(0x40001100, ((n) & 0x3f) << 2))) -#define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ -#define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ -#define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ -#define DRCMR3 __REG(0x4000010c) /* Request to Channel Map Register for I2S transmit Request */ -#define DRCMR4 __REG(0x40000110) /* Request to Channel Map Register for BTUART receive Request */ -#define DRCMR5 __REG(0x40000114) /* Request to Channel Map Register for BTUART transmit Request. */ -#define DRCMR6 __REG(0x40000118) /* Request to Channel Map Register for FFUART receive Request */ -#define DRCMR7 __REG(0x4000011c) /* Request to Channel Map Register for FFUART transmit Request */ -#define DRCMR8 __REG(0x40000120) /* Request to Channel Map Register for AC97 microphone Request */ -#define DRCMR9 __REG(0x40000124) /* Request to Channel Map Register for AC97 modem receive Request */ -#define DRCMR10 __REG(0x40000128) /* Request to Channel Map Register for AC97 modem transmit Request */ -#define DRCMR11 __REG(0x4000012c) /* Request to Channel Map Register for AC97 audio receive Request */ -#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ -#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ -#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */ -#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */ -#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ -#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ -#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ -#define DRCMR20 __REG(0x40000150) /* Request to Channel Map Register for STUART transmit Request */ -#define DRCMR21 __REG(0x40000154) /* Request to Channel Map Register for MMC receive Request */ -#define DRCMR22 __REG(0x40000158) /* Request to Channel Map Register for MMC transmit Request */ -#define DRCMR23 __REG(0x4000015c) /* Reserved */ -#define DRCMR24 __REG(0x40000160) /* Reserved */ -#define DRCMR25 __REG(0x40000164) /* Request to Channel Map Register for USB endpoint 1 Request */ -#define DRCMR26 __REG(0x40000168) /* Request to Channel Map Register for USB endpoint 2 Request */ -#define DRCMR27 __REG(0x4000016C) /* Request to Channel Map Register for USB endpoint 3 Request */ -#define DRCMR28 __REG(0x40000170) /* Request to Channel Map Register for USB endpoint 4 Request */ -#define DRCMR29 __REG(0x40000174) /* Reserved */ -#define DRCMR30 __REG(0x40000178) /* Request to Channel Map Register for USB endpoint 6 Request */ -#define DRCMR31 __REG(0x4000017C) /* Request to Channel Map Register for USB endpoint 7 Request */ -#define DRCMR32 __REG(0x40000180) /* Request to Channel Map Register for USB endpoint 8 Request */ -#define DRCMR33 __REG(0x40000184) /* Request to Channel Map Register for USB endpoint 9 Request */ -#define DRCMR34 __REG(0x40000188) /* Reserved */ -#define DRCMR35 __REG(0x4000018C) /* Request to Channel Map Register for USB endpoint 11 Request */ -#define DRCMR36 __REG(0x40000190) /* Request to Channel Map Register for USB endpoint 12 Request */ -#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ -#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ -#define DRCMR39 __REG(0x4000019C) /* Reserved */ -#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */ -#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */ -#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ -#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ -#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ - -#define DRCMRRXSADR DRCMR2 -#define DRCMRTXSADR DRCMR3 -#define DRCMRRXBTRBR DRCMR4 -#define DRCMRTXBTTHR DRCMR5 -#define DRCMRRXFFRBR DRCMR6 -#define DRCMRTXFFTHR DRCMR7 -#define DRCMRRXMCDR DRCMR8 -#define DRCMRRXMODR DRCMR9 -#define DRCMRTXMODR DRCMR10 -#define DRCMRRXPCDR DRCMR11 -#define DRCMRTXPCDR DRCMR12 -#define DRCMRRXSSDR DRCMR13 -#define DRCMRTXSSDR DRCMR14 -#define DRCMRRXSS2DR DRCMR15 -#define DRCMRTXSS2DR DRCMR16 -#define DRCMRRXICDR DRCMR17 -#define DRCMRTXICDR DRCMR18 -#define DRCMRRXSTRBR DRCMR19 -#define DRCMRTXSTTHR DRCMR20 -#define DRCMRRXMMC DRCMR21 -#define DRCMRTXMMC DRCMR22 -#define DRCMRRXSS3DR DRCMR66 -#define DRCMRTXSS3DR DRCMR67 -#define DRCMRUDC(x) DRCMR((x) + 24) - #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ -#define DDADR0 __REG(0x40000200) /* DMA Descriptor Address Register Channel 0 */ -#define DSADR0 __REG(0x40000204) /* DMA Source Address Register Channel 0 */ -#define DTADR0 __REG(0x40000208) /* DMA Target Address Register Channel 0 */ -#define DCMD0 __REG(0x4000020c) /* DMA Command Address Register Channel 0 */ -#define DDADR1 __REG(0x40000210) /* DMA Descriptor Address Register Channel 1 */ -#define DSADR1 __REG(0x40000214) /* DMA Source Address Register Channel 1 */ -#define DTADR1 __REG(0x40000218) /* DMA Target Address Register Channel 1 */ -#define DCMD1 __REG(0x4000021c) /* DMA Command Address Register Channel 1 */ -#define DDADR2 __REG(0x40000220) /* DMA Descriptor Address Register Channel 2 */ -#define DSADR2 __REG(0x40000224) /* DMA Source Address Register Channel 2 */ -#define DTADR2 __REG(0x40000228) /* DMA Target Address Register Channel 2 */ -#define DCMD2 __REG(0x4000022c) /* DMA Command Address Register Channel 2 */ -#define DDADR3 __REG(0x40000230) /* DMA Descriptor Address Register Channel 3 */ -#define DSADR3 __REG(0x40000234) /* DMA Source Address Register Channel 3 */ -#define DTADR3 __REG(0x40000238) /* DMA Target Address Register Channel 3 */ -#define DCMD3 __REG(0x4000023c) /* DMA Command Address Register Channel 3 */ -#define DDADR4 __REG(0x40000240) /* DMA Descriptor Address Register Channel 4 */ -#define DSADR4 __REG(0x40000244) /* DMA Source Address Register Channel 4 */ -#define DTADR4 __REG(0x40000248) /* DMA Target Address Register Channel 4 */ -#define DCMD4 __REG(0x4000024c) /* DMA Command Address Register Channel 4 */ -#define DDADR5 __REG(0x40000250) /* DMA Descriptor Address Register Channel 5 */ -#define DSADR5 __REG(0x40000254) /* DMA Source Address Register Channel 5 */ -#define DTADR5 __REG(0x40000258) /* DMA Target Address Register Channel 5 */ -#define DCMD5 __REG(0x4000025c) /* DMA Command Address Register Channel 5 */ -#define DDADR6 __REG(0x40000260) /* DMA Descriptor Address Register Channel 6 */ -#define DSADR6 __REG(0x40000264) /* DMA Source Address Register Channel 6 */ -#define DTADR6 __REG(0x40000268) /* DMA Target Address Register Channel 6 */ -#define DCMD6 __REG(0x4000026c) /* DMA Command Address Register Channel 6 */ -#define DDADR7 __REG(0x40000270) /* DMA Descriptor Address Register Channel 7 */ -#define DSADR7 __REG(0x40000274) /* DMA Source Address Register Channel 7 */ -#define DTADR7 __REG(0x40000278) /* DMA Target Address Register Channel 7 */ -#define DCMD7 __REG(0x4000027c) /* DMA Command Address Register Channel 7 */ -#define DDADR8 __REG(0x40000280) /* DMA Descriptor Address Register Channel 8 */ -#define DSADR8 __REG(0x40000284) /* DMA Source Address Register Channel 8 */ -#define DTADR8 __REG(0x40000288) /* DMA Target Address Register Channel 8 */ -#define DCMD8 __REG(0x4000028c) /* DMA Command Address Register Channel 8 */ -#define DDADR9 __REG(0x40000290) /* DMA Descriptor Address Register Channel 9 */ -#define DSADR9 __REG(0x40000294) /* DMA Source Address Register Channel 9 */ -#define DTADR9 __REG(0x40000298) /* DMA Target Address Register Channel 9 */ -#define DCMD9 __REG(0x4000029c) /* DMA Command Address Register Channel 9 */ -#define DDADR10 __REG(0x400002a0) /* DMA Descriptor Address Register Channel 10 */ -#define DSADR10 __REG(0x400002a4) /* DMA Source Address Register Channel 10 */ -#define DTADR10 __REG(0x400002a8) /* DMA Target Address Register Channel 10 */ -#define DCMD10 __REG(0x400002ac) /* DMA Command Address Register Channel 10 */ -#define DDADR11 __REG(0x400002b0) /* DMA Descriptor Address Register Channel 11 */ -#define DSADR11 __REG(0x400002b4) /* DMA Source Address Register Channel 11 */ -#define DTADR11 __REG(0x400002b8) /* DMA Target Address Register Channel 11 */ -#define DCMD11 __REG(0x400002bc) /* DMA Command Address Register Channel 11 */ -#define DDADR12 __REG(0x400002c0) /* DMA Descriptor Address Register Channel 12 */ -#define DSADR12 __REG(0x400002c4) /* DMA Source Address Register Channel 12 */ -#define DTADR12 __REG(0x400002c8) /* DMA Target Address Register Channel 12 */ -#define DCMD12 __REG(0x400002cc) /* DMA Command Address Register Channel 12 */ -#define DDADR13 __REG(0x400002d0) /* DMA Descriptor Address Register Channel 13 */ -#define DSADR13 __REG(0x400002d4) /* DMA Source Address Register Channel 13 */ -#define DTADR13 __REG(0x400002d8) /* DMA Target Address Register Channel 13 */ -#define DCMD13 __REG(0x400002dc) /* DMA Command Address Register Channel 13 */ -#define DDADR14 __REG(0x400002e0) /* DMA Descriptor Address Register Channel 14 */ -#define DSADR14 __REG(0x400002e4) /* DMA Source Address Register Channel 14 */ -#define DTADR14 __REG(0x400002e8) /* DMA Target Address Register Channel 14 */ -#define DCMD14 __REG(0x400002ec) /* DMA Command Address Register Channel 14 */ -#define DDADR15 __REG(0x400002f0) /* DMA Descriptor Address Register Channel 15 */ -#define DSADR15 __REG(0x400002f4) /* DMA Source Address Register Channel 15 */ -#define DTADR15 __REG(0x400002f8) /* DMA Target Address Register Channel 15 */ -#define DCMD15 __REG(0x400002fc) /* DMA Command Address Register Channel 15 */ - #define DDADR(x) __REG2(0x40000200, (x) << 4) #define DSADR(x) __REG2(0x40000204, (x) << 4) #define DTADR(x) __REG2(0x40000208, (x) << 4) @@ -418,91 +265,13 @@ /* - * I2C registers + * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c */ -#define IBMR __REG(0x40301680) /* I2C Bus Monitor Register - IBMR */ -#define IDBR __REG(0x40301688) /* I2C Data Buffer Register - IDBR */ -#define ICR __REG(0x40301690) /* I2C Control Register - ICR */ -#define ISR __REG(0x40301698) /* I2C Status Register - ISR */ -#define ISAR __REG(0x403016A0) /* I2C Slave Address Register - ISAR */ - -#define PWRIBMR __REG(0x40f00180) /* Power I2C Bus Monitor Register-IBMR */ -#define PWRIDBR __REG(0x40f00188) /* Power I2C Data Buffer Register-IDBR */ -#define PWRICR __REG(0x40f00190) /* Power I2C Control Register - ICR */ -#define PWRISR __REG(0x40f00198) /* Power I2C Status Register - ISR */ -#define PWRISAR __REG(0x40f001A0) /*Power I2C Slave Address Register-ISAR */ - -#define ICR_START (1 << 0) /* start bit */ -#define ICR_STOP (1 << 1) /* stop bit */ -#define ICR_ACKNAK (1 << 2) /* send ACK(0) or NAK(1) */ -#define ICR_TB (1 << 3) /* transfer byte bit */ -#define ICR_MA (1 << 4) /* master abort */ -#define ICR_SCLE (1 << 5) /* master clock enable */ -#define ICR_IUE (1 << 6) /* unit enable */ -#define ICR_GCD (1 << 7) /* general call disable */ -#define ICR_ITEIE (1 << 8) /* enable tx interrupts */ -#define ICR_IRFIE (1 << 9) /* enable rx interrupts */ -#define ICR_BEIE (1 << 10) /* enable bus error ints */ -#define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */ -#define ICR_ALDIE (1 << 12) /* enable arbitration interrupt */ -#define ICR_SADIE (1 << 13) /* slave address detected int enable */ -#define ICR_UR (1 << 14) /* unit reset */ - -#define ISR_RWM (1 << 0) /* read/write mode */ -#define ISR_ACKNAK (1 << 1) /* ack/nak status */ -#define ISR_UB (1 << 2) /* unit busy */ -#define ISR_IBB (1 << 3) /* bus busy */ -#define ISR_SSD (1 << 4) /* slave stop detected */ -#define ISR_ALD (1 << 5) /* arbitration loss detected */ -#define ISR_ITE (1 << 6) /* tx buffer empty */ -#define ISR_IRF (1 << 7) /* rx buffer full */ -#define ISR_GCAD (1 << 8) /* general call address detected */ -#define ISR_SAD (1 << 9) /* slave address detected */ -#define ISR_BED (1 << 10) /* bus error no ACK/NAK */ - - /* - * Serial Audio Controller + * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c */ -#define SACR0 __REG(0x40400000) /* Global Control Register */ -#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */ -#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */ -#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ -#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ - -#define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ -#define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ -#define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ -#define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ -#define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ -#define SACR0_BCKD (1 << 2) /* Bit Clock Direction */ -#define SACR0_ENB (1 << 0) /* Enable I2S Link */ -#define SACR1_ENLBF (1 << 5) /* Enable Loopback */ -#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ -#define SACR1_DREC (1 << 3) /* Disable Recording Function */ -#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ - -#define SASR0_I2SOFF (1 << 7) /* Controller Status */ -#define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ -#define SASR0_TUR (1 << 5) /* Tx FIFO Underrun */ -#define SASR0_RFS (1 << 4) /* Rx FIFO Service Request */ -#define SASR0_TFS (1 << 3) /* Tx FIFO Service Request */ -#define SASR0_BSY (1 << 2) /* I2S Busy */ -#define SASR0_RNE (1 << 1) /* Rx FIFO Not Empty */ -#define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */ - -#define SAICR_ROR (1 << 6) /* Clear Rx FIFO Overrun Interrupt */ -#define SAICR_TUR (1 << 5) /* Clear Tx FIFO Underrun Interrupt */ - -#define SAIMR_ROR (1 << 6) /* Enable Rx FIFO Overrun Condition Interrupt */ -#define SAIMR_TUR (1 << 5) /* Enable Tx FIFO Underrun Condition Interrupt */ -#define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */ -#define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */ - /* * AC97 Controller registers */ @@ -989,77 +758,6 @@ #endif -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -/* - * UHC: USB Host Controller (OHCI-like) register definitions - */ -#define UHC_BASE_PHYS (0x4C000000) -#define UHCREV __REG(0x4C000000) /* UHC HCI Spec Revision */ -#define UHCHCON __REG(0x4C000004) /* UHC Host Control Register */ -#define UHCCOMS __REG(0x4C000008) /* UHC Command Status Register */ -#define UHCINTS __REG(0x4C00000C) /* UHC Interrupt Status Register */ -#define UHCINTE __REG(0x4C000010) /* UHC Interrupt Enable */ -#define UHCINTD __REG(0x4C000014) /* UHC Interrupt Disable */ -#define UHCHCCA __REG(0x4C000018) /* UHC Host Controller Comm. Area */ -#define UHCPCED __REG(0x4C00001C) /* UHC Period Current Endpt Descr */ -#define UHCCHED __REG(0x4C000020) /* UHC Control Head Endpt Descr */ -#define UHCCCED __REG(0x4C000024) /* UHC Control Current Endpt Descr */ -#define UHCBHED __REG(0x4C000028) /* UHC Bulk Head Endpt Descr */ -#define UHCBCED __REG(0x4C00002C) /* UHC Bulk Current Endpt Descr */ -#define UHCDHEAD __REG(0x4C000030) /* UHC Done Head */ -#define UHCFMI __REG(0x4C000034) /* UHC Frame Interval */ -#define UHCFMR __REG(0x4C000038) /* UHC Frame Remaining */ -#define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ -#define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ -#define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ - -#define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ -#define UHCRHDA_NOCP (1 << 12) /* No over current protection */ - -#define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ -#define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ -#define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ -#define UHCRHPS2 __REG(0x4C000058) /* UHC Root Hub Port 2 Status */ -#define UHCRHPS3 __REG(0x4C00005C) /* UHC Root Hub Port 3 Status */ - -#define UHCSTAT __REG(0x4C000060) /* UHC Status Register */ -#define UHCSTAT_UPS3 (1 << 16) /* USB Power Sense Port3 */ -#define UHCSTAT_SBMAI (1 << 15) /* System Bus Master Abort Interrupt*/ -#define UHCSTAT_SBTAI (1 << 14) /* System Bus Target Abort Interrupt*/ -#define UHCSTAT_UPRI (1 << 13) /* USB Port Resume Interrupt */ -#define UHCSTAT_UPS2 (1 << 12) /* USB Power Sense Port 2 */ -#define UHCSTAT_UPS1 (1 << 11) /* USB Power Sense Port 1 */ -#define UHCSTAT_HTA (1 << 10) /* HCI Target Abort */ -#define UHCSTAT_HBA (1 << 8) /* HCI Buffer Active */ -#define UHCSTAT_RWUE (1 << 7) /* HCI Remote Wake Up Event */ - -#define UHCHR __REG(0x4C000064) /* UHC Reset Register */ -#define UHCHR_SSEP3 (1 << 11) /* Sleep Standby Enable for Port3 */ -#define UHCHR_SSEP2 (1 << 10) /* Sleep Standby Enable for Port2 */ -#define UHCHR_SSEP1 (1 << 9) /* Sleep Standby Enable for Port1 */ -#define UHCHR_PCPL (1 << 7) /* Power control polarity low */ -#define UHCHR_PSPL (1 << 6) /* Power sense polarity low */ -#define UHCHR_SSE (1 << 5) /* Sleep Standby Enable */ -#define UHCHR_UIT (1 << 4) /* USB Interrupt Test */ -#define UHCHR_SSDC (1 << 3) /* Simulation Scale Down Clock */ -#define UHCHR_CGR (1 << 2) /* Clock Generation Reset */ -#define UHCHR_FHR (1 << 1) /* Force Host Controller Reset */ -#define UHCHR_FSBIR (1 << 0) /* Force System Bus Iface Reset */ - -#define UHCHIE __REG(0x4C000068) /* UHC Interrupt Enable Register*/ -#define UHCHIE_UPS3IE (1 << 14) /* Power Sense Port3 IntEn */ -#define UHCHIE_UPRIE (1 << 13) /* Port Resume IntEn */ -#define UHCHIE_UPS2IE (1 << 12) /* Power Sense Port2 IntEn */ -#define UHCHIE_UPS1IE (1 << 11) /* Power Sense Port1 IntEn */ -#define UHCHIE_TAIE (1 << 10) /* HCI Interface Transfer Abort - Interrupt Enable*/ -#define UHCHIE_HBAIE (1 << 8) /* HCI Buffer Active IntEn */ -#define UHCHIE_RWIE (1 << 7) /* Remote Wake-up IntEn */ - -#define UHCHIT __REG(0x4C00006C) /* UHC Interrupt Test register */ - -#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ - /* PWRMODE register M field values */ #define PWRMODE_IDLE 0x1 diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h index 39eb68319e2..b1fcd10ab6c 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h @@ -131,6 +131,28 @@ #define CKENB __REG(0x41340010) /* B Clock Enable Register */ #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ +#define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */ +#define ACCR_SPDIS (1 << 30) /* System PLL Output Disable */ +#define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */ +#define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */ +#define ACCR_DDR_D0CS (1 << 7) /* DDR SDRAM clock frequency in D0CS (PXA31x only) */ + +#define ACCR_SMCFS_MASK (0x7 << 23) /* Static Memory Controller Frequency Select */ +#define ACCR_SFLFS_MASK (0x3 << 18) /* Frequency Select for Internal Memory Controller */ +#define ACCR_XSPCLK_MASK (0x3 << 16) /* Core Frequency during Frequency Change */ +#define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */ +#define ACCR_DMCFS_MASK (0x3 << 12) /* Dynamic Memory Controller Clock Frequency Select */ +#define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */ +#define ACCR_XL_MASK (0x1f) /* Core PLL Run-Mode-to-Oscillator Ratio */ + +#define ACCR_SMCFS(x) (((x) & 0x7) << 23) +#define ACCR_SFLFS(x) (((x) & 0x3) << 18) +#define ACCR_XSPCLK(x) (((x) & 0x3) << 16) +#define ACCR_HSS(x) (((x) & 0x3) << 14) +#define ACCR_DMCFS(x) (((x) & 0x3) << 12) +#define ACCR_XN(x) (((x) & 0x7) << 8) +#define ACCR_XL(x) ((x) & 0x1f) + /* * Clock Enable Bit */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h index eb4b190b665..eb35fca9aea 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h @@ -4,6 +4,43 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +struct pxa3xx_nand_timing { + unsigned int tCH; /* Enable signal hold time */ + unsigned int tCS; /* Enable signal setup time */ + unsigned int tWH; /* ND_nWE high duration */ + unsigned int tWP; /* ND_nWE pulse time */ + unsigned int tRH; /* ND_nRE high duration */ + unsigned int tRP; /* ND_nRE pulse width */ + unsigned int tR; /* ND_nWE high to ND_nRE low for read */ + unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ + unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ +}; + +struct pxa3xx_nand_cmdset { + uint16_t read1; + uint16_t read2; + uint16_t program; + uint16_t read_status; + uint16_t read_id; + uint16_t erase; + uint16_t reset; + uint16_t lock; + uint16_t unlock; + uint16_t lock_status; +}; + +struct pxa3xx_nand_flash { + const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ + const struct pxa3xx_nand_cmdset *cmdset; + + uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */ + uint32_t page_size; /* Page size in bytes (PAGE_SZ) */ + uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */ + uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */ + uint32_t num_blocks; /* Number of physical blocks in Flash */ + uint32_t chip_id; +}; + struct pxa3xx_nand_platform_data { /* the data flash bus is shared between the Static Memory @@ -12,8 +49,11 @@ struct pxa3xx_nand_platform_data { */ int enable_arbiter; - struct mtd_partition *parts; - unsigned int nr_parts; + const struct mtd_partition *parts; + unsigned int nr_parts; + + const struct pxa3xx_nand_flash * flash; + size_t num_flash; }; extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h index 9489a48871a..7b8842cfa5f 100644 --- a/arch/arm/mach-pxa/include/mach/reset.h +++ b/arch/arm/mach-pxa/include/mach/reset.h @@ -10,9 +10,12 @@ extern unsigned int reset_status; extern void clear_reset_status(unsigned int mask); -/* - * register GPIO as reset generator +/** + * init_gpio_reset() - register GPIO as reset generator + * + * @gpio - gpio nr + * @output - set gpio as out/low instead of input during normal work */ -extern int init_gpio_reset(int gpio); +extern int init_gpio_reset(int gpio, int output); #endif /* __ASM_ARCH_RESET_H */ diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h index bd14365f7ed..31ac26b55bc 100644 --- a/arch/arm/mach-pxa/include/mach/spitz.h +++ b/arch/arm/mach-pxa/include/mach/spitz.h @@ -16,6 +16,7 @@ #endif #include <linux/fb.h> +#include <linux/gpio.h> /* Spitz/Akita GPIOs */ @@ -100,13 +101,24 @@ #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ -#define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ - SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ +#define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ + SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \ SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) #define SPITZ_SCP_SUS_SET 0 +#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) +#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) +#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) +#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) +#define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3) +#define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4) +#define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5) +#define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6) +#define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7) +#define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8) + /* Spitz Scoop Device (No. 2) GPIOs */ /* Suspend States in comments */ #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ @@ -119,15 +131,36 @@ #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ -#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ +#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) -#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) +#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) +#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) +#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) +#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1 +#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) +#define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3) +#define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4) +#define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5) +#define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6) +#define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7) +#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) + +/* Akita IO Expander GPIOs */ +#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) +#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) +#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) +#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) +#define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3) +#define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4) +#define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5) +#define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6) +#define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7) /* Spitz IRQ Definitions */ @@ -154,5 +187,4 @@ */ extern struct platform_device spitzscoop_device; extern struct platform_device spitzscoop2_device; -extern struct platform_device spitzssp_device; extern struct sharpsl_charger_machinfo spitz_pm_machinfo; diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h index a012882c9ee..cb5cb766f0f 100644 --- a/arch/arm/mach-pxa/include/mach/ssp.h +++ b/arch/arm/mach-pxa/include/mach/ssp.h @@ -20,6 +20,7 @@ #define __ASM_ARCH_SSP_H #include <linux/list.h> +#include <linux/io.h> enum pxa_ssp_type { SSP_UNDEFINED = 0, @@ -78,6 +79,29 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); void ssp_exit(struct ssp_dev *dev); +/** + * ssp_write_reg - Write to a SSP register + * + * @dev: SSP device to access + * @reg: Register to write to + * @val: Value to be written. + */ +static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val) +{ + __raw_writel(val, dev->mmio_base + reg); +} + +/** + * ssp_read_reg - Read from a SSP register + * + * @dev: SSP device to access + * @reg: Register to read from + */ +static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg) +{ + return __raw_readl(dev->mmio_base + reg); +} + struct ssp_device *ssp_request(int port, const char *label); void ssp_free(struct ssp_device *); #endif /* __ASM_ARCH_SSP_H */ diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h index a72803f0461..8bce6d8615b 100644 --- a/arch/arm/mach-pxa/include/mach/tosa.h +++ b/arch/arm/mach-pxa/include/mach/tosa.h @@ -59,8 +59,6 @@ * TC6393XB GPIOs */ #define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) -#define TOSA_TC6393XB_GPIO(i) (TOSA_TC6393XB_GPIO_BASE + (i)) -#define TOSA_TC6393XB_GPIO_BIT(gpio) (1 << (gpio - TOSA_TC6393XB_GPIO_BASE)) #define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) #define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h index 641d0ec110b..903e1a2e664 100644 --- a/arch/arm/mach-pxa/include/mach/trizeps4.h +++ b/arch/arm/mach-pxa/include/mach/trizeps4.h @@ -17,11 +17,16 @@ #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ #define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ -#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ -#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ -#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ -#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ -#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ + /* Logic on ConXS-board CSFR register*/ +#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) + /* Logic on ConXS-board BOCR register*/ +#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) + /* Logic on ConXS-board IRCR register*/ +#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) + /* Logic on ConXS-board UPSR register*/ +#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) + /* Logic on ConXS-board DICR register*/ +#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* virtual memory regions */ #define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ @@ -54,6 +59,15 @@ #define GPIO_MMC_DET 12 #define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) +/* DOC NAND chip */ +#define GPIO_DOC_LOCK 94 +#define GPIO_DOC_IRQ 93 +#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) + +/* SPI interface */ +#define GPIO_SPI 53 +#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) + /* LEDS using tx2 / rx2 */ #define GPIO_SYS_BUSY_LED 46 #define GPIO_HEARTBEAT_LED 47 @@ -62,24 +76,66 @@ #define GPIO_PIC 0 #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) +#ifdef CONFIG_MACH_TRIZEPS_CONXS +/* for CONXS base board define these registers */ +#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) +#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) +#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) +#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) +#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) +#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) + +#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) +#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) #ifndef __ASSEMBLY__ -#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) -#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) -#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) +static inline unsigned short CFSR_readw(void) +{ + /* [Compact Flash Status Register] is read only */ + return *((unsigned short *)CFSR_P2V(0x0C000000)); +} +static inline void BCR_writew(unsigned short value) +{ + /* [Board Control Regsiter] is write only */ + *((unsigned short *)BCR_P2V(0x0E000000)) = value; +} +static inline void DCR_writew(unsigned short value) +{ + /* [Display Control Register] is write only */ + *((unsigned short *)DCR_P2V(0x0E000000)) = value; +} +static inline void IRCR_writew(unsigned short value) +{ + /* [InfraRed data Control Register] is write only */ + *((unsigned short *)IRCR_P2V(0x0E000000)) = value; +} #else #define ConXS_CFSR CFSR_P2V(0x0C000000) #define ConXS_BCR BCR_P2V(0x0E000000) #define ConXS_DCR DCR_P2V(0x0F800000) +#define ConXS_IRCR IRCR_P2V(0x0F800000) #endif +#else +/* for whatever baseboard define function registers */ +static inline unsigned short CFSR_readw(void) +{ + return 0; +} +static inline void BCR_writew(unsigned short value) +{ + ; +} +static inline void DCR_writew(unsigned short value) +{ + ; +} +static inline void IRCR_writew(unsigned short value) +{ + ; +} +#endif /* CONFIG_MACH_TRIZEPS_CONXS */ #define ConXS_CFSR_BVD_MASK 0x0003 #define ConXS_CFSR_BVD1 (1 << 0) diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h new file mode 100644 index 00000000000..10988c270ca --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/viper.h @@ -0,0 +1,96 @@ +/* + * arch/arm/mach-pxa/include/mach/viper.h + * + * Author: Ian Campbell + * Created: Feb 03, 2003 + * Copyright: Arcom Control Systems. + * + * Maintained by Marc Zyngier <maz@misterjones.org> + * <marc.zyngier@altran.com> + * + * Created based on lubbock.h: + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_VIPER_H +#define ARCH_VIPER_H + +#define VIPER_BOOT_PHYS PXA_CS0_PHYS +#define VIPER_FLASH_PHYS PXA_CS1_PHYS +#define VIPER_ETH_PHYS PXA_CS2_PHYS +#define VIPER_USB_PHYS PXA_CS3_PHYS +#define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS +#define VIPER_CPLD_PHYS PXA_CS5_PHYS + +#define VIPER_CPLD_BASE (0xf0000000) +#define VIPER_PC104IO_BASE (0xf1000000) +#define VIPER_USB_BASE (0xf1800000) + +#define VIPER_ETH_GPIO (0) +#define VIPER_CPLD_GPIO (1) +#define VIPER_USB_GPIO (2) +#define VIPER_UARTA_GPIO (4) +#define VIPER_UARTB_GPIO (3) +#define VIPER_CF_CD_GPIO (32) +#define VIPER_CF_RDY_GPIO (8) +#define VIPER_BCKLIGHT_EN_GPIO (9) +#define VIPER_LCD_EN_GPIO (10) +#define VIPER_PSU_DATA_GPIO (6) +#define VIPER_PSU_CLK_GPIO (11) +#define VIPER_UART_SHDN_GPIO (12) +#define VIPER_BRIGHTNESS_GPIO (16) +#define VIPER_PSU_nCS_LD_GPIO (19) +#define VIPER_UPS_GPIO (20) +#define VIPER_CF_POWER_GPIO (82) +#define VIPER_TPM_I2C_SDA_GPIO (26) +#define VIPER_TPM_I2C_SCL_GPIO (27) +#define VIPER_RTC_I2C_SDA_GPIO (83) +#define VIPER_RTC_I2C_SCL_GPIO (84) + +#define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE) +#define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS) + +#ifndef __ASSEMBLY__ +# define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x))) +#endif + +/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */ + +/* ... Physical addresses */ +#define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000) +#define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002) +#define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004) +#define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006) +#define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010) +#define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000) +#define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000) + +/* ... Virtual addresses */ +#define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS) +#define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS) +#define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS) +#define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS) + +/* Decode VIPER_VERSION register */ +#define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7) +#define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3) +#define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7) + +/* Interrupt and Configuration Register (VIPER_ICR) */ +/* This is a write only register. Only CF_RST is used under Linux */ + +extern void viper_cf_rst(int state); + +#define VIPER_ICR_RETRIG (1 << 0) +#define VIPER_ICR_AUTO_CLR (1 << 1) +#define VIPER_ICR_R_DIS (1 << 2) +#define VIPER_ICR_CF_RST (1 << 3) + +#endif + diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h index 0d35ca04731..bf6785adccf 100644 --- a/arch/arm/mach-pxa/include/mach/zylonite.h +++ b/arch/arm/mach-pxa/include/mach/zylonite.h @@ -30,7 +30,7 @@ extern void zylonite_pxa300_init(void); static inline void zylonite_pxa300_init(void) { if (cpu_is_pxa300() || cpu_is_pxa310()) - panic("%s: PXA300/PXA310 not supported\n", __FUNCTION__); + panic("%s: PXA300/PXA310 not supported\n", __func__); } #endif @@ -40,7 +40,7 @@ extern void zylonite_pxa320_init(void); static inline void zylonite_pxa320_init(void) { if (cpu_is_pxa320()) - panic("%s: PXA320 not supported\n", __FUNCTION__); + panic("%s: PXA320 not supported\n", __func__); } #endif diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 5e95c5372fe..fa69c3a6a38 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -57,7 +57,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) pxa_internal_irq_nr = irq_nr; - for (irq = 0; irq < irq_nr; irq += 32) { + for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { _ICMR(irq) = 0; /* disable all IRQs */ _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ } diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c deleted file mode 100644 index 3bc29007df3..00000000000 --- a/arch/arm/mach-pxa/leds-trizeps4.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * linux/arch/arm/mach-pxa/leds-trizeps4.c - * - * Author: Jürgen Schindele - * Created: 20 02, 2006 - * Copyright: Jürgen Schindele - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/init.h> - -#include <mach/hardware.h> -#include <asm/system.h> -#include <asm/types.h> -#include <asm/leds.h> - -#include <mach/pxa-regs.h> -#include <mach/pxa2xx-gpio.h> -#include <mach/trizeps4.h> - -#include "leds.h" - -#define LED_STATE_ENABLED 1 -#define LED_STATE_CLAIMED 2 - -#define SYS_BUSY 0x01 -#define HEARTBEAT 0x02 -#define BLINK 0x04 - -static unsigned int led_state; -static unsigned int hw_led_state; - -void trizeps4_leds_event(led_event_t evt) -{ - unsigned long flags; - - local_irq_save(flags); - - switch (evt) { - case led_start: - hw_led_state = 0; - pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ - pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ - led_state = LED_STATE_ENABLED; - break; - - case led_stop: - led_state &= ~LED_STATE_ENABLED; - break; - - case led_claim: - led_state |= LED_STATE_CLAIMED; - hw_led_state = 0; - break; - - case led_release: - led_state &= ~LED_STATE_CLAIMED; - hw_led_state = 0; - break; - -#ifdef CONFIG_LEDS_TIMER - case led_timer: - hw_led_state ^= HEARTBEAT; - break; -#endif - -#ifdef CONFIG_LEDS_CPU - case led_idle_start: - hw_led_state &= ~SYS_BUSY; - break; - - case led_idle_end: - hw_led_state |= SYS_BUSY; - break; -#endif - - case led_halted: - break; - - case led_green_on: - hw_led_state |= BLINK; - break; - - case led_green_off: - hw_led_state &= ~BLINK; - break; - - case led_amber_on: - break; - - case led_amber_off: - break; - - case led_red_on: - break; - - case led_red_off: - break; - - default: - break; - } - - if (led_state & LED_STATE_ENABLED) { - switch (hw_led_state) { - case 0: - GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); - GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); - break; - case 1: - GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); - GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); - break; - case 2: - GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); - GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); - break; - case 3: - GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); - GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); - break; - } - } - else { - /* turn all off */ - GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED); - GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED); - } - - local_irq_restore(flags); -} diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c index e13eb841e48..bbe4d5f6afa 100644 --- a/arch/arm/mach-pxa/leds.c +++ b/arch/arm/mach-pxa/leds.c @@ -24,8 +24,6 @@ pxa_leds_init(void) leds_event = mainstone_leds_event; if (machine_is_pxa_idp()) leds_event = idp_leds_event; - if (machine_is_trizeps4()) - leds_event = trizeps4_leds_event; leds_event(led_start); return 0; diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 58f3402a037..b4d00aba0e3 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -20,6 +20,7 @@ #include <linux/delay.h> #include <linux/platform_device.h> #include <linux/clk.h> +#include <linux/spi/spi.h> #include <linux/smc91x.h> #include <asm/types.h> @@ -38,6 +39,7 @@ #include <mach/gpio.h> #include <mach/pxafb.h> #include <mach/ssp.h> +#include <mach/pxa2xx_spi.h> #include <mach/pxa27x_keypad.h> #include <mach/pxa3xx_nand.h> #include <mach/littleton.h> @@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = { /* SSP2 */ GPIO25_SSP2_SCLK, - GPIO17_SSP2_FRM, GPIO27_SSP2_TXD, + GPIO17_GPIO, /* SFRM as chip-select */ /* Debug Ethernet */ GPIO90_GPIO, @@ -123,160 +125,6 @@ static struct platform_device smc91x_device = { }; #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) -/* use bit 30, 31 as the indicator of command parameter number */ -#define CMD0(x) ((0x00000000) | ((x) << 9)) -#define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1)) -#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\ - ((x1) << 9) | 0x100 | (x2)) - -static uint32_t lcd_panel_reset[] = { - CMD0(0x1), /* reset */ - CMD0(0x0), /* nop */ - CMD0(0x0), /* nop */ - CMD0(0x0), /* nop */ -}; - -static uint32_t lcd_panel_on[] = { - CMD0(0x29), /* Display ON */ - CMD2(0xB8, 0xFF, 0xF9), /* Output Control */ - CMD0(0x11), /* Sleep out */ - CMD1(0xB0, 0x16), /* Wake */ -}; - -static uint32_t lcd_panel_off[] = { - CMD0(0x28), /* Display OFF */ - CMD2(0xB8, 0x80, 0x02), /* Output Control */ - CMD0(0x10), /* Sleep in */ - CMD1(0xB0, 0x00), /* Deep stand by in */ -}; - -static uint32_t lcd_vga_pass_through[] = { - CMD1(0xB0, 0x16), - CMD1(0xBC, 0x80), - CMD1(0xE1, 0x00), - CMD1(0x36, 0x50), - CMD1(0x3B, 0x00), -}; - -static uint32_t lcd_qvga_pass_through[] = { - CMD1(0xB0, 0x16), - CMD1(0xBC, 0x81), - CMD1(0xE1, 0x00), - CMD1(0x36, 0x50), - CMD1(0x3B, 0x22), -}; - -static uint32_t lcd_vga_transfer[] = { - CMD1(0xcf, 0x02), /* Blanking period control (1) */ - CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ - CMD1(0xd1, 0x01), /* CKV timing control on/off */ - CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */ - CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */ - CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */ - CMD1(0xd5, 0x14), /* ASW timing control (2) */ - CMD0(0x21), /* Invert for normally black display */ - CMD0(0x29), /* Display on */ -}; - -static uint32_t lcd_qvga_transfer[] = { - CMD1(0xd6, 0x02), /* Blanking period control (1) */ - CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */ - CMD1(0xd8, 0x01), /* CKV timing control on/off */ - CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */ - CMD2(0xde, 0x05, 0x0a), /* OEV timing control */ - CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */ - CMD1(0xe0, 0x0a), /* ASW timing control (2) */ - CMD0(0x21), /* Invert for normally black display */ - CMD0(0x29), /* Display on */ -}; - -static uint32_t lcd_panel_config[] = { - CMD2(0xb8, 0xff, 0xf9), /* Output control */ - CMD0(0x11), /* sleep out */ - CMD1(0xba, 0x01), /* Display mode (1) */ - CMD1(0xbb, 0x00), /* Display mode (2) */ - CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */ - CMD1(0xbf, 0x10), /* Drive system change control */ - CMD1(0xb1, 0x56), /* Booster operation setup */ - CMD1(0xb2, 0x33), /* Booster mode setup */ - CMD1(0xb3, 0x11), /* Booster frequency setup */ - CMD1(0xb4, 0x02), /* Op amp/system clock */ - CMD1(0xb5, 0x35), /* VCS voltage */ - CMD1(0xb6, 0x40), /* VCOM voltage */ - CMD1(0xb7, 0x03), /* External display signal */ - CMD1(0xbd, 0x00), /* ASW slew rate */ - CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */ - CMD1(0xc0, 0x11), /* Sleep out FR count (A) */ - CMD1(0xc1, 0x11), /* Sleep out FR count (B) */ - CMD1(0xc2, 0x11), /* Sleep out FR count (C) */ - CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */ - CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */ - CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */ - CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */ - CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */ - CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */ - CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */ - CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */ - CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */ -}; - -static void ssp_reconfig(struct ssp_dev *dev, int nparam) -{ - static int last_nparam = -1; - - /* check if it is necessary to re-config SSP */ - if (nparam == last_nparam) - return; - - ssp_disable(dev); - ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0); - - last_nparam = nparam; -} - -static void ssp_send_cmd(uint32_t *cmd, int num) -{ - static int ssp_initialized; - static struct ssp_dev ssp2; - - int i; - - if (!ssp_initialized) { - ssp_init(&ssp2, 2, SSP_NO_IRQ); - ssp_initialized = 1; - } - - clk_enable(ssp2.ssp->clk); - for (i = 0; i < num; i++, cmd++) { - ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3); - ssp_write_word(&ssp2, *cmd & 0x3fffffff); - - /* FIXME: ssp_flush() is mandatory here to work */ - ssp_flush(&ssp2); - } - clk_disable(ssp2.ssp->clk); -} - -static void littleton_lcd_power(int on, struct fb_var_screeninfo *var) -{ - if (on) { - ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on)); - ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset)); - if (var->xres > 240) { - /* VGA */ - ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through)); - ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); - ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer)); - } else { - /* QVGA */ - ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through)); - ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); - ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer)); - } - } else - ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off)); -} - static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { [0] = { /* VGA */ @@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = { .modes = tpo_tdo24mtea1_modes, .num_modes = 2, .lcd_conn = LCD_COLOR_TFT_16BPP, - .pxafb_lcd_power = littleton_lcd_power, }; static void littleton_init_lcd(void) @@ -323,6 +170,51 @@ static void littleton_init_lcd(void) static inline void littleton_init_lcd(void) {}; #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ +#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) +static struct pxa2xx_spi_master littleton_spi_info = { + .num_chipselect = 1, +}; + +static void littleton_tdo24m_cs(u32 cmd) +{ + gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT)); +} + +static struct pxa2xx_spi_chip littleton_tdo24m_chip = { + .rx_threshold = 1, + .tx_threshold = 1, + .cs_control = littleton_tdo24m_cs, +}; + +static struct spi_board_info littleton_spi_devices[] __initdata = { + { + .modalias = "tdo24m", + .max_speed_hz = 1000000, + .bus_num = 2, + .chip_select = 0, + .controller_data= &littleton_tdo24m_chip, + }, +}; + +static void __init littleton_init_spi(void) +{ + int err; + + err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS"); + if (err) { + pr_warning("failed to request GPIO for LCS CS\n"); + return; + } + + gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1); + + pxa2xx_set_spi_info(2, &littleton_spi_info); + spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices)); +} +#else +static inline void littleton_init_spi(void) {} +#endif + #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) static unsigned int littleton_matrix_key_map[] = { /* KEY(row, col, key_code) */ @@ -433,6 +325,7 @@ static void __init littleton_init(void) */ platform_device_register(&smc91x_device); + littleton_init_spi(); littleton_init_lcd(); littleton_init_keypad(); littleton_init_nand(); diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index b7038948d1d..de3f67daaac 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -40,7 +40,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> #include <mach/lpd270.h> #include <mach/audio.h> #include <mach/pxafb.h> @@ -51,6 +51,43 @@ #include "generic.h" #include "devices.h" +static unsigned long lpd270_pin_config[] __initdata = { + /* Chip Selects */ + GPIO15_nCS_1, /* Mainboard Flash */ + GPIO78_nCS_2, /* CPLD + Ethernet */ + + /* LCD - 16bpp Active TFT */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + GPIO16_PWM0_OUT, /* Backlight */ + + /* USB Host */ + GPIO88_USBH1_PWR, + GPIO89_USBH1_PEN, + + /* AC97 */ + GPIO45_AC97_SYSCLK, + + GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, +}; static unsigned int lpd270_irq_enabled; @@ -88,8 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ if (likely(pending)) { irq = LPD270_IRQ(0) + __ffs(pending); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; @@ -265,8 +301,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = { static struct pxafb_mach_info sharp_lq057q3dc02 = { .modes = &sharp_lq057q3dc02_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 12.1" TFT SVGA (LoLo display number 2) */ @@ -287,8 +323,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = { static struct pxafb_mach_info sharp_lq121s1dg31 = { .modes = &sharp_lq121s1dg31_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 3.6" TFT QVGA (LoLo display number 3) */ @@ -309,8 +345,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = { static struct pxafb_mach_info sharp_lq036q1da01 = { .modes = &sharp_lq036q1da01_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 6.4" TFT VGA (LoLo display number 5) */ @@ -331,8 +367,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = { static struct pxafb_mach_info sharp_lq64d343 = { .modes = &sharp_lq64d343_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 10.4" TFT VGA (LoLo display number 7) */ @@ -353,8 +389,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = { static struct pxafb_mach_info sharp_lq10d368 = { .modes = &sharp_lq10d368_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; /* 3.5" TFT QVGA (LoLo display number 8) */ @@ -375,8 +411,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = { static struct pxafb_mach_info sharp_lq035q7db02_20 = { .modes = &sharp_lq035q7db02_20_mode, .num_modes = 1, - .lccr0 = 0x07800080, - .lccr3 = 0x00400000, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL | + LCD_ALTERNATE_MAPPING, }; static struct pxafb_mach_info *lpd270_lcd_to_use; @@ -411,27 +447,15 @@ static struct platform_device *platform_devices[] __initdata = { &lpd270_flash_device[1], }; -static int lpd270_ohci_init(struct device *dev) -{ - /* setup Port1 GPIO pin. */ - pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ - pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ - - /* Set the Power Control Polarity Low and Power Sense - Polarity Low to active low. */ - UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); - - return 0; -} - static struct pxaohci_platform_data lpd270_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = lpd270_ohci_init, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, }; static void __init lpd270_init(void) { + pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); + lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; lpd270_flash_data[1].width = 4; @@ -442,12 +466,6 @@ static void __init lpd270_init(void) */ ARB_CNTRL = ARB_CORE_PARK | 0x234; - /* - * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45. - */ - pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); - pxa_gpio_mode(GPIO16_PWM0_MD); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); pxa_set_ac97_info(NULL); @@ -473,15 +491,6 @@ static void __init lpd270_map_io(void) pxa_map_io(); iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); - /* initialize sleep mode regs (wake-up sources, etc) */ - PGSR0 = 0x00008800; - PGSR1 = 0x00000002; - PGSR2 = 0x0001FC00; - PGSR3 = 0x00001F81; - PWER = 0xC0000002; - PRER = 0x00000002; - PFER = 0x00000002; - /* for use I SRAM as framebuffer. */ PSLR |= 0x00000F04; PCFR = 0x00000066; diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 4ffdff2d9ff..bff704354c1 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -57,13 +57,36 @@ static unsigned long lubbock_pin_config[] __initdata = { GPIO15_nCS_1, /* CS1 - Flash */ + GPIO78_nCS_2, /* CS2 - Baseboard FGPA */ GPIO79_nCS_3, /* CS3 - SMC ethernet */ + GPIO80_nCS_4, /* CS4 - SA1111 */ /* SSP data pins */ GPIO23_SSP1_SCLK, GPIO25_SSP1_TXD, GPIO26_SSP1_RXD, + /* LCD - 16bpp DSTN */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + /* BTUART */ GPIO42_BTUART_RXD, GPIO43_BTUART_TXD, @@ -132,8 +155,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) GEDR(0) = GPIO_bit(0); /* clear our parent irq */ if (likely(pending)) { irq = LUBBOCK_IRQ(0) + __ffs(pending); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; } while (pending); diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 143f28adaf9..519138bc5f8 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -409,7 +409,7 @@ static struct platform_device backlight = { * LEDs */ -struct gpio_led gpio_leds[] = { +static struct gpio_led gpio_leds[] = { { .name = "magician::vibra", .default_trigger = "none", @@ -669,18 +669,10 @@ static struct pxamci_platform_data magician_mci_info = { * USB OHCI */ -static int magician_ohci_init(struct device *dev) -{ - UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) & - ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE); - - return 0; -} - static struct pxaohci_platform_data magician_ohci_info = { - .port_mode = PMM_PERPORT_MODE, - .init = magician_ohci_init, - .power_budget = 0, + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | ENABLE_PORT3 | POWER_CONTROL_LOW, + .power_budget = 0, }; diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index d44af761564..f2c7ad8f2b6 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -162,8 +162,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ if (likely(pending)) { irq = MAINSTONE_IRQ(0) + __ffs(pending); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } pending = MST_INTSETCLR & mainstone_irq_enabled; } while (pending); @@ -508,19 +507,9 @@ static struct platform_device *platform_devices[] __initdata = { &mst_gpio_keys_device, }; -static int mainstone_ohci_init(struct device *dev) -{ - /* Set the Power Control Polarity Low and Power Sense - Polarity Low to active low. */ - UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); - - return 0; -} - static struct pxaohci_platform_data mainstone_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = mainstone_ohci_init, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, }; #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 925575f10ac..2061c00c8ea 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -25,7 +25,12 @@ #include "generic.h" -#define PGSR(x) __REG2(0x40F00020, ((x) & 0x60) >> 3) +#define gpio_to_bank(gpio) ((gpio) >> 5) + +#define PGSR(x) __REG2(0x40F00020, (x) << 2) +#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3) +#define GAFR_L(x) __GAFR(0, x) +#define GAFR_U(x) __GAFR(1, x) #define PWER_WE35 (1 << 24) @@ -38,49 +43,59 @@ struct gpio_desc { }; static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; +static int gpio_nr; -static int __mfp_config_lpm(unsigned gpio, unsigned long lpm) -{ - unsigned mask = GPIO_bit(gpio); - - /* low power state */ - switch (lpm) { - case MFP_LPM_DRIVE_HIGH: - PGSR(gpio) |= mask; - break; - case MFP_LPM_DRIVE_LOW: - PGSR(gpio) &= ~mask; - break; - case MFP_LPM_INPUT: - break; - default: - pr_warning("%s: invalid low power state for GPIO%d\n", - __func__, gpio); - return -EINVAL; - } - return 0; -} +static unsigned long gpdr_lpm[4]; static int __mfp_config_gpio(unsigned gpio, unsigned long c) { unsigned long gafr, mask = GPIO_bit(gpio); - int fn; + int bank = gpio_to_bank(gpio); + int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */ + int shft = (gpio & 0xf) << 1; + int fn = MFP_AF(c); + int dir = c & MFP_DIR_OUT; - fn = MFP_AF(c); if (fn > 3) return -EINVAL; - /* alternate function and direction */ - gafr = GAFR(gpio) & ~(0x3 << ((gpio & 0xf) * 2)); - GAFR(gpio) = gafr | (fn << ((gpio & 0xf) * 2)); + /* alternate function and direction at run-time */ + gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank); + gafr = (gafr & ~(0x3 << shft)) | (fn << shft); - if (c & MFP_DIR_OUT) + if (uorl == 0) + GAFR_L(bank) = gafr; + else + GAFR_U(bank) = gafr; + + if (dir == MFP_DIR_OUT) GPDR(gpio) |= mask; else GPDR(gpio) &= ~mask; - if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK)) - return -EINVAL; + /* alternate function and direction at low power mode */ + switch (c & MFP_LPM_STATE_MASK) { + case MFP_LPM_DRIVE_HIGH: + PGSR(bank) |= mask; + dir = MFP_DIR_OUT; + break; + case MFP_LPM_DRIVE_LOW: + PGSR(bank) &= ~mask; + dir = MFP_DIR_OUT; + break; + case MFP_LPM_DEFAULT: + break; + default: + /* warning and fall through, treat as MFP_LPM_DEFAULT */ + pr_warning("%s: GPIO%d: unsupported low power mode\n", + __func__, gpio); + break; + } + + if (dir == MFP_DIR_OUT) + gpdr_lpm[bank] |= mask; + else + gpdr_lpm[bank] &= ~mask; /* give early warning if MFP_LPM_CAN_WAKEUP is set on the * configurations of those pins not able to wakeup @@ -91,7 +106,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c) return -EINVAL; } - if ((c & MFP_LPM_CAN_WAKEUP) && (c & MFP_DIR_OUT)) { + if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) { pr_warning("%s: output GPIO%d unable to wakeup\n", __func__, gpio); return -EINVAL; @@ -135,7 +150,7 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) { - unsigned long flags; + unsigned long flags, c; int gpio; gpio = __mfp_validate(mfp); @@ -143,7 +158,11 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) return; local_irq_save(flags); - __mfp_config_lpm(gpio, lpm); + + c = gpio_desc[gpio].config; + c = (c & ~MFP_LPM_STATE_MASK) | lpm; + __mfp_config_gpio(gpio, c); + local_irq_restore(flags); } @@ -187,23 +206,22 @@ int gpio_set_wake(unsigned int gpio, unsigned int on) } #ifdef CONFIG_PXA25x -static int __init pxa25x_mfp_init(void) +static void __init pxa25x_mfp_init(void) { int i; - if (cpu_is_pxa25x()) { - for (i = 0; i <= 84; i++) - gpio_desc[i].valid = 1; + for (i = 0; i <= 84; i++) + gpio_desc[i].valid = 1; - for (i = 0; i <= 15; i++) { - gpio_desc[i].can_wakeup = 1; - gpio_desc[i].mask = GPIO_bit(i); - } + for (i = 0; i <= 15; i++) { + gpio_desc[i].can_wakeup = 1; + gpio_desc[i].mask = GPIO_bit(i); } - return 0; + gpio_nr = 85; } -postcore_initcall(pxa25x_mfp_init); +#else +static inline void pxa25x_mfp_init(void) {} #endif /* CONFIG_PXA25x */ #ifdef CONFIG_PXA27x @@ -233,45 +251,106 @@ int keypad_set_wake(unsigned int on) return 0; } -static int __init pxa27x_mfp_init(void) +static void __init pxa27x_mfp_init(void) { int i, gpio; - if (cpu_is_pxa27x()) { - for (i = 0; i <= 120; i++) { - /* skip GPIO2, 5, 6, 7, 8, they are not - * valid pins allow configuration - */ - if (i == 2 || i == 5 || i == 6 || - i == 7 || i == 8) - continue; + for (i = 0; i <= 120; i++) { + /* skip GPIO2, 5, 6, 7, 8, they are not + * valid pins allow configuration + */ + if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8) + continue; - gpio_desc[i].valid = 1; - } + gpio_desc[i].valid = 1; + } - /* Keypad GPIOs */ - for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { - gpio = pxa27x_pkwr_gpio[i]; - gpio_desc[gpio].can_wakeup = 1; - gpio_desc[gpio].keypad_gpio = 1; - gpio_desc[gpio].mask = 1 << i; - } + /* Keypad GPIOs */ + for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { + gpio = pxa27x_pkwr_gpio[i]; + gpio_desc[gpio].can_wakeup = 1; + gpio_desc[gpio].keypad_gpio = 1; + gpio_desc[gpio].mask = 1 << i; + } - /* Overwrite GPIO13 as a PWER wakeup source */ - for (i = 0; i <= 15; i++) { - /* skip GPIO2, 5, 6, 7, 8 */ - if (GPIO_bit(i) & 0x1e4) - continue; + /* Overwrite GPIO13 as a PWER wakeup source */ + for (i = 0; i <= 15; i++) { + /* skip GPIO2, 5, 6, 7, 8 */ + if (GPIO_bit(i) & 0x1e4) + continue; - gpio_desc[i].can_wakeup = 1; - gpio_desc[i].mask = GPIO_bit(i); - } + gpio_desc[i].can_wakeup = 1; + gpio_desc[i].mask = GPIO_bit(i); + } + + gpio_desc[35].can_wakeup = 1; + gpio_desc[35].mask = PWER_WE35; + + gpio_nr = 121; +} +#else +static inline void pxa27x_mfp_init(void) {} +#endif /* CONFIG_PXA27x */ + +#ifdef CONFIG_PM +static unsigned long saved_gafr[2][4]; +static unsigned long saved_gpdr[4]; - gpio_desc[35].can_wakeup = 1; - gpio_desc[35].mask = PWER_WE35; +static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state) +{ + int i; + + for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { + + saved_gafr[0][i] = GAFR_L(i); + saved_gafr[1][i] = GAFR_U(i); + saved_gpdr[i] = GPDR(i * 32); + + GPDR(i * 32) = gpdr_lpm[i]; } + return 0; +} +static int pxa2xx_mfp_resume(struct sys_device *d) +{ + int i; + + for (i = 0; i <= gpio_to_bank(gpio_nr); i++) { + GAFR_L(i) = saved_gafr[0][i]; + GAFR_U(i) = saved_gafr[1][i]; + GPDR(i * 32) = saved_gpdr[i]; + } + PSSR = PSSR_RDH | PSSR_PH; return 0; } -postcore_initcall(pxa27x_mfp_init); -#endif /* CONFIG_PXA27x */ +#else +#define pxa2xx_mfp_suspend NULL +#define pxa2xx_mfp_resume NULL +#endif + +struct sysdev_class pxa2xx_mfp_sysclass = { + .name = "mfp", + .suspend = pxa2xx_mfp_suspend, + .resume = pxa2xx_mfp_resume, +}; + +static int __init pxa2xx_mfp_init(void) +{ + int i; + + if (!cpu_is_pxa2xx()) + return 0; + + if (cpu_is_pxa25x()) + pxa25x_mfp_init(); + + if (cpu_is_pxa27x()) + pxa27x_mfp_init(); + + /* initialize gafr_run[], pgsr_lpm[] from existing values */ + for (i = 0; i <= gpio_to_bank(gpio_nr); i++) + gpdr_lpm[i] = GPDR(i * 32); + + return sysdev_class_register(&pxa2xx_mfp_sysclass); +} +postcore_initcall(pxa2xx_mfp_init); diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c new file mode 100644 index 00000000000..0842c531ee4 --- /dev/null +++ b/arch/arm/mach-pxa/mioa701.c @@ -0,0 +1,905 @@ +/* + * Handles the Mitac Mio A701 Board + * + * Copyright (C) 2008 Robert Jarzmik + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/input.h> +#include <linux/delay.h> +#include <linux/gpio_keys.h> +#include <linux/pwm_backlight.h> +#include <linux/rtc.h> +#include <linux/leds.h> +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/pda_power.h> +#include <linux/power_supply.h> +#include <linux/wm97xx.h> +#include <linux/mtd/physmap.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <mach/mfp-pxa27x.h> +#include <mach/pxa27x_keypad.h> +#include <mach/pxafb.h> +#include <mach/pxa2xx-regs.h> +#include <mach/mmc.h> +#include <mach/udc.h> +#include <mach/pxa27x-udc.h> + +#include <mach/mioa701.h> + +#include "generic.h" +#include "devices.h" + +static unsigned long mioa701_pin_config[] = { + /* Mio global */ + MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW), + MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH), + MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH), + + /* Backlight PWM 0 */ + GPIO16_PWM0_OUT, + + /* MMC */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + MIO_CFG_IN(GPIO78_SDIO_RO, AF0), + MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0), + MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW), + + /* USB */ + MIO_CFG_IN(GPIO13_USB_DETECT, AF0), + MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW), + + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + + /* Bluetooth */ + GPIO44_BTUART_CTS, + GPIO42_BTUART_RXD, + GPIO45_BTUART_RTS, + GPIO43_BTUART_TXD, + MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW), + + /* GPS */ + MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW), + GPIO46_STUART_RXD, + GPIO47_STUART_TXD, + + /* GSM */ + MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW), + MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH), + MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0), + MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH, + GPIO34_FFUART_RXD, + GPIO35_FFUART_CTS, + GPIO36_FFUART_DCD, + GPIO37_FFUART_DSR, + GPIO39_FFUART_TXD, + GPIO40_FFUART_DTR, + GPIO41_FFUART_RTS, + + /* Sound */ + GPIO89_AC97_SYSCLK, + MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0), + + /* Leds */ + MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH), + MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH), + + /* Keyboard */ + MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH, + MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0), + MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0), + GPIO100_KP_MKIN_0, + GPIO101_KP_MKIN_1, + GPIO102_KP_MKIN_2, + GPIO103_KP_MKOUT_0, + GPIO104_KP_MKOUT_1, + GPIO105_KP_MKOUT_2, + + /* Unknown */ + MFP_CFG_IN(GPIO14, AF0), + MFP_CFG_IN(GPIO20, AF0), + MFP_CFG_IN(GPIO21, AF0), + MFP_CFG_IN(GPIO33, AF0), + MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH), + MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH), + MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH), + MFP_CFG_IN(GPIO80, AF0), + MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH), + MFP_CFG_IN(GPIO96, AF0), + MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH), +}; + +#define MIO_GPIO_IN(num, _desc) \ + { .gpio = (num), .dir = 0, .desc = (_desc) } +#define MIO_GPIO_OUT(num, _init, _desc) \ + { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) } +struct gpio_ress { + unsigned gpio : 8; + unsigned dir : 1; + unsigned init : 1; + char *desc; +}; + +static int mio_gpio_request(struct gpio_ress *gpios, int size) +{ + int i, rc = 0; + int gpio; + int dir; + + for (i = 0; (!rc) && (i < size); i++) { + gpio = gpios[i].gpio; + dir = gpios[i].dir; + rc = gpio_request(gpio, gpios[i].desc); + if (rc) { + printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n", + gpio, gpios[i].desc, rc); + continue; + } + if (dir) + gpio_direction_output(gpio, gpios[i].init); + else + gpio_direction_input(gpio); + } + while ((rc) && (--i >= 0)) + gpio_free(gpios[i].gpio); + return rc; +} + +static void mio_gpio_free(struct gpio_ress *gpios, int size) +{ + int i; + + for (i = 0; i < size; i++) + gpio_free(gpios[i].gpio); +} + +/* LCD Screen and Backlight */ +static struct platform_pwm_backlight_data mioa701_backlight_data = { + .pwm_id = 0, + .max_brightness = 100, + .dft_brightness = 50, + .pwm_period_ns = 4000 * 1024, /* Fl = 250kHz */ +}; + +/* + * LTM0305A776C LCD panel timings + * + * see: + * - the LTM0305A776C datasheet, + * - and the PXA27x Programmers' manual + */ +static struct pxafb_mode_info mioa701_ltm0305a776c = { + .pixclock = 220000, /* CLK=4.545 MHz */ + .xres = 240, + .yres = 320, + .bpp = 16, + .hsync_len = 4, + .vsync_len = 2, + .left_margin = 6, + .right_margin = 4, + .upper_margin = 5, + .lower_margin = 3, +}; + +static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si) +{ + gpio_set_value(GPIO87_LCD_POWER, on); +} + +static struct pxafb_mach_info mioa701_pxafb_info = { + .modes = &mioa701_ltm0305a776c, + .num_modes = 1, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, + .pxafb_lcd_power = mioa701_lcd_power, +}; + +/* + * Keyboard configuration + */ +static unsigned int mioa701_matrix_keys[] = { + KEY(0, 0, KEY_UP), + KEY(0, 1, KEY_RIGHT), + KEY(0, 2, KEY_MEDIA), + KEY(1, 0, KEY_DOWN), + KEY(1, 1, KEY_ENTER), + KEY(1, 2, KEY_CONNECT), /* GPS key */ + KEY(2, 0, KEY_LEFT), + KEY(2, 1, KEY_PHONE), /* Phone Green key */ + KEY(2, 2, KEY_CAMERA) /* Camera key */ +}; +static struct pxa27x_keypad_platform_data mioa701_keypad_info = { + .matrix_key_rows = 3, + .matrix_key_cols = 3, + .matrix_key_map = mioa701_matrix_keys, + .matrix_key_map_size = ARRAY_SIZE(mioa701_matrix_keys), +}; + +/* + * GPIO Key Configuration + */ +#define MIO_KEY(key, _gpio, _desc, _wakeup) \ + { .code = (key), .gpio = (_gpio), .active_low = 0, \ + .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) } +static struct gpio_keys_button mioa701_button_table[] = { + MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1), + MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0), + MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0), + MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0) +}; + +static struct gpio_keys_platform_data mioa701_gpio_keys_data = { + .buttons = mioa701_button_table, + .nbuttons = ARRAY_SIZE(mioa701_button_table), +}; + +/* + * Leds and vibrator + */ +#define ONE_LED(_gpio, _name) \ +{ .gpio = (_gpio), .name = (_name), .active_low = true } +static struct gpio_led gpio_leds[] = { + ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"), + ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"), + ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"), + ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"), + ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard") +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +/* + * GSM Sagem XS200 chip + * + * GSM handling was purged from kernel. For history, this is the way to go : + * - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1 + * GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1 + * - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100), + * GPIO24_GSM_MOD_RESET_CMD = 0 + * - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000), + * GPIO88_GSM_nMOD_ON_CMD = 1 + * - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000), + * GPIO90_GSM_nMOD_OFF_CMD = 1 + */ +static int is_gsm_on(void) +{ + int is_on; + + is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE); + return is_on; +} + +irqreturn_t gsm_on_irq(int irq, void *p) +{ + printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n", + is_gsm_on() ? "on" : "off"); + return IRQ_HANDLED; +} + +struct gpio_ress gsm_gpios[] = { + MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"), + MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"), +}; + +static int __init gsm_init(void) +{ + int rc; + + rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios)); + if (rc) + goto err_gpio; + rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + "GSM XS200 Power Irq", NULL); + if (rc) + goto err_irq; + + gpio_set_wake(GPIO113_GSM_EVENT, 1); + return 0; + +err_irq: + printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n"); + mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); +err_gpio: + printk(KERN_ERR "Mioa701: gsm not available\n"); + return rc; +} + +static void gsm_exit(void) +{ + free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL); + mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios)); +} + +/* + * Bluetooth BRF6150 chip + * + * BT handling was purged from kernel. For history, this is the way to go : + * - turn on : GPIO83_BT_ON = 1 + * - turn off : GPIO83_BT_ON = 0 + */ + +/* + * GPS Sirf Star III chip + * + * GPS handling was purged from kernel. For history, this is the way to go : + * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 + * GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0 + * - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1 + * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0 + */ + +/* + * USB UDC + */ +static void udc_power_command(int cmd) +{ + switch (cmd) { + case PXA2XX_UDC_CMD_DISCONNECT: + gpio_set_value(GPIO22_USB_ENABLE, 0); + break; + case PXA2XX_UDC_CMD_CONNECT: + gpio_set_value(GPIO22_USB_ENABLE, 1); + break; + default: + printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd); + break; + } +} + +static int is_usb_connected(void) +{ + return !!gpio_get_value(GPIO13_USB_DETECT); +} + +static struct pxa2xx_udc_mach_info mioa701_udc_info = { + .udc_is_connected = is_usb_connected, + .udc_command = udc_power_command, +}; + +struct gpio_ress udc_gpios[] = { + MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable") +}; + +static int __init udc_init(void) +{ + pxa_set_udc_info(&mioa701_udc_info); + return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios)); +} + +static void udc_exit(void) +{ + mio_gpio_free(ARRAY_AND_SIZE(udc_gpios)); +} + +/* + * SDIO/MMC Card controller + */ +static void mci_setpower(struct device *dev, unsigned int vdd) +{ + struct pxamci_platform_data *p_d = dev->platform_data; + + if ((1 << vdd) & p_d->ocr_mask) + gpio_set_value(GPIO91_SDIO_EN, 1); /* enable SDIO power */ + else + gpio_set_value(GPIO91_SDIO_EN, 0); /* disable SDIO power */ +} + +static int mci_get_ro(struct device *dev) +{ + return gpio_get_value(GPIO78_SDIO_RO); +} + +struct gpio_ress mci_gpios[] = { + MIO_GPIO_IN(GPIO78_SDIO_RO, "SDIO readonly detect"), + MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"), + MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable") +}; + +static void mci_exit(struct device *dev, void *data) +{ + mio_gpio_free(ARRAY_AND_SIZE(mci_gpios)); + free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data); +} + +static struct pxamci_platform_data mioa701_mci_info; + +/** + * The card detect interrupt isn't debounced so we delay it by 250ms + * to give the card a chance to fully insert/eject. + */ +static int mci_init(struct device *dev, irq_handler_t detect_int, void *data) +{ + int rc; + int irq = gpio_to_irq(GPIO15_SDIO_INSERT); + + rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios)); + if (rc) + goto err_gpio; + /* enable RE/FE interrupt on card insertion and removal */ + rc = request_irq(irq, detect_int, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, + "MMC card detect", data); + if (rc) + goto err_irq; + + mioa701_mci_info.detect_delay = msecs_to_jiffies(250); + return 0; + +err_irq: + dev_err(dev, "mioa701_mci_init: MMC/SD:" + " can't request MMC card detect IRQ\n"); + mio_gpio_free(ARRAY_AND_SIZE(mci_gpios)); +err_gpio: + return rc; +} + +static struct pxamci_platform_data mioa701_mci_info = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .init = mci_init, + .get_ro = mci_get_ro, + .setpower = mci_setpower, + .exit = mci_exit, +}; + +/* FlashRAM */ +static struct resource strataflash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct physmap_flash_data strataflash_data = { + .width = 2, + /* .set_vpp = mioa701_set_vpp, */ +}; + +static struct platform_device strataflash = { + .name = "physmap-flash", + .id = -1, + .resource = &strataflash_resource, + .num_resources = 1, + .dev = { + .platform_data = &strataflash_data, + }, +}; + +/* + * Suspend/Resume bootstrap management + * + * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, + * this sequence is as follows : + * - disables interrupts + * - initialize SDRAM (self refresh RAM into active RAM) + * - initialize GPIOs (depends on value at 0xa020b020) + * - initialize coprossessors + * - if edge detect on PWR_SCL(GPIO3), then proceed to cold start + * - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start + * - else do a resume, ie. jump to addr 0xa0100000 + */ +#define RESUME_ENABLE_ADDR 0xa020b000 +#define RESUME_ENABLE_VAL 0x0f0f0f0f +#define RESUME_BT_ADDR 0xa020b020 +#define RESUME_UNKNOWN_ADDR 0xa020b024 +#define RESUME_VECTOR_ADDR 0xa0100000 +#define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4 + +static u32 *save_buffer; + +static void install_bootstrap(void) +{ + int i; + u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR); + u32 *src = &mioa701_bootstrap; + + for (i = 0; i < BOOTSTRAP_WORDS; i++) + rom_bootstrap[i] = src[i]; +} + + +static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state) +{ + int i = 0, is_bt_on; + u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); + u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); + u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); + u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); + + /* Devices prepare suspend */ + is_bt_on = gpio_get_value(GPIO83_BT_ON); + pxa2xx_mfp_set_lpm(GPIO83_BT_ON, + is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); + + for (i = 0; i < BOOTSTRAP_WORDS; i++) + save_buffer[i] = mem_resume_vector[i]; + save_buffer[i++] = *mem_resume_enabler; + save_buffer[i++] = *mem_resume_bt; + save_buffer[i++] = *mem_resume_unknown; + + *mem_resume_enabler = RESUME_ENABLE_VAL; + *mem_resume_bt = is_bt_on; + + install_bootstrap(); + return 0; +} + +static int mioa701_sys_resume(struct sys_device *sysdev) +{ + int i = 0; + u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR); + u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR); + u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR); + u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); + + for (i = 0; i < BOOTSTRAP_WORDS; i++) + mem_resume_vector[i] = save_buffer[i]; + *mem_resume_enabler = save_buffer[i++]; + *mem_resume_bt = save_buffer[i++]; + *mem_resume_unknown = save_buffer[i++]; + + return 0; +} + +static struct sysdev_class mioa701_sysclass = { + .name = "mioa701", +}; + +static struct sys_device sysdev_bootstrap = { + .cls = &mioa701_sysclass, +}; + +static struct sysdev_driver driver_bootstrap = { + .suspend = &mioa701_sys_suspend, + .resume = &mioa701_sys_resume, +}; + +static int __init bootstrap_init(void) +{ + int rc; + int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3); + + rc = sysdev_class_register(&mioa701_sysclass); + if (rc) { + printk(KERN_ERR "Failed registering mioa701 sys class\n"); + return -ENODEV; + } + rc = sysdev_register(&sysdev_bootstrap); + if (rc) { + printk(KERN_ERR "Failed registering mioa701 sys device\n"); + return -ENODEV; + } + rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap); + if (rc) { + printk(KERN_ERR "Failed registering PMU sys driver\n"); + return -ENODEV; + } + + save_buffer = kmalloc(save_size, GFP_KERNEL); + if (!save_buffer) + return -ENOMEM; + printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n", + save_size); + return 0; +} + +static void bootstrap_exit(void) +{ + kfree(save_buffer); + sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap); + sysdev_unregister(&sysdev_bootstrap); + sysdev_class_unregister(&mioa701_sysclass); + + printk(KERN_CRIT "Unregistering mioa701 suspend will hang next" + "resume !!!\n"); +} + +/* + * Power Supply + */ +static char *supplicants[] = { + "mioa701_battery" +}; + +static void mioa701_set_charge(int flags) +{ + gpio_set_value(GPIO9_CHARGE_nEN, !flags); +} + +static struct pda_power_pdata power_pdata = { + .is_ac_online = is_usb_connected, + .set_charge = mioa701_set_charge, + .supplied_to = supplicants, + .num_supplicants = ARRAY_SIZE(supplicants), +}; + +static struct resource power_resources[] = { + [0] = { + .name = "ac", + .start = gpio_to_irq(GPIO13_USB_DETECT), + .end = gpio_to_irq(GPIO13_USB_DETECT), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | + IORESOURCE_IRQ_LOWEDGE, + }, +}; + +static struct platform_device power_dev = { + .name = "pda-power", + .id = -1, + .resource = power_resources, + .num_resources = ARRAY_SIZE(power_resources), + .dev = { + .platform_data = &power_pdata, + }, +}; + +#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX) +static struct wm97xx *battery_wm; + +static enum power_supply_property battery_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, /* Necessary for apm */ +}; + +static int get_battery_voltage(void) +{ + int adc = -1; + + if (battery_wm) + adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1); + return adc; +} + +static int get_battery_status(struct power_supply *b) +{ + int status; + + if (is_usb_connected()) + status = POWER_SUPPLY_STATUS_CHARGING; + else + status = POWER_SUPPLY_STATUS_DISCHARGING; + + return status; +} + +static int get_property(struct power_supply *b, + enum power_supply_property psp, + union power_supply_propval *val) +{ + int rc = 0; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + val->intval = get_battery_status(b); + break; + case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: + val->intval = 0xfd0; + break; + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: + val->intval = 0xc00; + break; + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + val->intval = get_battery_voltage(); + break; + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: + val->intval = 100; + break; + default: + val->intval = -1; + rc = -1; + } + + return rc; +}; + +static struct power_supply battery_ps = { + .name = "mioa701_battery", + .type = POWER_SUPPLY_TYPE_BATTERY, + .get_property = get_property, + .properties = battery_props, + .num_properties = ARRAY_SIZE(battery_props), +}; + +static int battery_probe(struct platform_device *pdev) +{ + struct wm97xx *wm = platform_get_drvdata(pdev); + int rc; + + battery_wm = wm; + + rc = power_supply_register(NULL, &battery_ps); + if (rc) + dev_err(&pdev->dev, + "Could not register mioa701 battery -> %d\n", rc); + return rc; +} + +static int battery_remove(struct platform_device *pdev) +{ + battery_wm = NULL; + return 0; +} + +static struct platform_driver mioa701_battery_driver = { + .driver = { + .name = "wm97xx-battery", + }, + .probe = battery_probe, + .remove = battery_remove +}; + +static int __init mioa701_battery_init(void) +{ + int rc; + + rc = platform_driver_register(&mioa701_battery_driver); + if (rc) + printk(KERN_ERR "Could not register mioa701 battery driver\n"); + return rc; +} + +#else +static int __init mioa701_battery_init(void) +{ + return 0; +} +#endif + +/* + * Mio global + */ + +/* Devices */ +#define MIO_PARENT_DEV(var, strname, tparent, pdata) \ +static struct platform_device var = { \ + .name = strname, \ + .id = -1, \ + .dev = { \ + .platform_data = pdata, \ + .parent = tparent, \ + }, \ +}; +#define MIO_SIMPLE_DEV(var, strname, pdata) \ + MIO_PARENT_DEV(var, strname, NULL, pdata) + +MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data) +MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev, + &mioa701_backlight_data); +MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info) +MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL) +MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL) +MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL) +MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) +MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) + +static struct platform_device *devices[] __initdata = { + &mioa701_gpio_keys, + &mioa701_backlight, + &mioa701_led, + &pxa2xx_pcm, + &pxa2xx_ac97, + &mio_wm9713_codec, + &mioa701_sound, + &power_dev, + &strataflash, + &mioa701_board +}; + +static void mioa701_machine_exit(void); + +static void mioa701_poweroff(void) +{ + mioa701_machine_exit(); + gpio_set_value(GPIO18_POWEROFF, 1); +} + +static void mioa701_restart(char c) +{ + mioa701_machine_exit(); + arm_machine_restart(c); +} + +struct gpio_ress global_gpios[] = { + MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"), + MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"), + MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power") +}; + +static void __init mioa701_machine_init(void) +{ + PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */ + PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE; + RTTR = 32768 - 1; /* Reset crazy WinCE value */ + UP2OCR = UP2OCR_HXOE; + + pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); + mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); + bootstrap_init(); + set_pxa_fb_info(&mioa701_pxafb_info); + pxa_set_mci_info(&mioa701_mci_info); + pxa_set_keypad_info(&mioa701_keypad_info); + udc_init(); + pm_power_off = mioa701_poweroff; + arm_pm_restart = mioa701_restart; + platform_add_devices(devices, ARRAY_SIZE(devices)); + gsm_init(); + mioa701_battery_init(); +} + +static void mioa701_machine_exit(void) +{ + udc_exit(); + bootstrap_exit(); + gsm_exit(); +} + +MACHINE_START(MIOA701, "MIO A701") + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = &pxa_map_io, + .init_irq = &pxa27x_init_irq, + .init_machine = mioa701_machine_init, + .timer = &pxa_timer, +MACHINE_END diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S new file mode 100644 index 00000000000..a647693d985 --- /dev/null +++ b/arch/arm/mach-pxa/mioa701_bootresume.S @@ -0,0 +1,36 @@ +/* Bootloader to resume MIO A701 + * + * 2007-1-12 Robert Jarzmik + * + * This code is licenced under the GPLv2. +*/ + +#include <linux/linkage.h> +#include <asm/assembler.h> + +/* + * Note: Yes, part of the following code is located into the .data section. + * This is to allow jumpaddr to be accessed with a relative load + * while we can't rely on any MMU translation. We could have put + * sleep_save_sp in the .text section as well, but some setups might + * insist on it to be truly read-only. + */ + .data +ENTRY(mioa701_bootstrap) +0: + b 1f +ENTRY(mioa701_jumpaddr) + .word 0x40f00008 @ PSPR in no-MMU mode +1: + mov r0, #0xa0000000 @ Don't suppose memory access works + orr r0, r0, #0x00200000 @ even if it's supposed to + mov r1, #0 + str r1, [r0] @ Early disable resume for next boot + ldr r0, mioa701_jumpaddr @ (Murphy's Law) + ldr r0, [r0] + mov pc, r0 +2: + +ENTRY(mioa701_bootstrap_lg) + .data + .word 2b-0b diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c new file mode 100644 index 00000000000..8a73814126b --- /dev/null +++ b/arch/arm/mach-pxa/mp900.c @@ -0,0 +1,100 @@ +/* + * linux/arch/arm/mach-pxa/mp900.c + * + * Support for the NEC MobilePro900/C platform + * + * Based on mach-pxa/gumstix.c + * + * 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com> + * 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/types.h> +#include <linux/usb/isp116x.h> + +#include <mach/hardware.h> +#include <mach/pxa-regs.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include "generic.h" + +static void isp116x_pfm_delay(struct device *dev, int delay) +{ + + /* 400Mhz PXA2 = 2.5ns / instruction */ + + int cyc = delay / 10; + + /* 4 Instructions = 4 x 2.5ns = 10ns */ + __asm__ volatile ("0:\n" + "subs %0, %1, #1\n" + "bge 0b\n" + :"=r" (cyc) + :"0"(cyc) + ); +} + +static struct isp116x_platform_data isp116x_pfm_data = { + .remote_wakeup_enable = 1, + .delay = isp116x_pfm_delay, +}; + +static struct resource isp116x_pfm_resources[] = { + [0] = { + .start = 0x0d000000, + .end = 0x0d000000 + 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 0x0d000000 + 4, + .end = 0x0d000000 + 5, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = 61, + .end = 61, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mp900c_dummy_device = { + .name = "mp900c_dummy", + .id = -1, +}; + +static struct platform_device mp900c_usb = { + .name = "isp116x-hcd", + .num_resources = ARRAY_SIZE(isp116x_pfm_resources), + .resource = isp116x_pfm_resources, + .dev.platform_data = &isp116x_pfm_data, +}; + +static struct platform_device *devices[] __initdata = { + &mp900c_dummy_device, + &mp900c_usb, +}; + +static void __init mp900c_init(void) +{ + printk(KERN_INFO "MobilePro 900/C machine init\n"); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ +MACHINE_START(NEC_MP900, "MobilePro900/C") + .phys_io = 0x40000000, + .boot_params = 0xa0220100, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .timer = &pxa_timer, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .init_machine = mp900c_init, +MACHINE_END + diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index fe924a23deb..4447711c9fc 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -25,6 +25,8 @@ #include <linux/pda_power.h> #include <linux/pwm_backlight.h> #include <linux/gpio.h> +#include <linux/wm97xx_batt.h> +#include <linux/power_supply.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -340,6 +342,23 @@ static struct platform_device power_supply = { }; /****************************************************************************** + * WM97xx battery + ******************************************************************************/ +static struct wm97xx_batt_info wm97xx_batt_pdata = { + .batt_aux = WM97XX_AUX_ID3, + .temp_aux = WM97XX_AUX_ID2, + .charge_gpio = -1, + .max_voltage = PALMTX_BAT_MAX_VOLTAGE, + .min_voltage = PALMTX_BAT_MIN_VOLTAGE, + .batt_mult = 1000, + .batt_div = 414, + .temp_mult = 1, + .temp_div = 1, + .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, + .batt_name = "main-batt", +}; + +/****************************************************************************** * Framebuffer ******************************************************************************/ static struct pxafb_mode_info palmtx_lcd_modes[] = { @@ -401,6 +420,7 @@ static void __init palmtx_init(void) pxa_set_ac97_info(NULL); pxa_set_ficp_info(&palmtx_ficp_platform_data); pxa_set_keypad_info(&palmtx_keypad_platform_data); + wm97xx_bat_set_pdata(&wm97xx_batt_pdata); platform_add_devices(devices, ARRAY_SIZE(devices)); } diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c new file mode 100644 index 00000000000..2f730da3bba --- /dev/null +++ b/arch/arm/mach-pxa/palmz72.c @@ -0,0 +1,554 @@ +/* + * Hardware definitions for Palm Zire72 + * + * Authors: + * Vladimir "Farcaller" Pouzanov <farcaller@gmail.com> + * Sergey Lapin <slapin@ossfans.org> + * Alex Osborne <bobofdoom@gmail.com> + * Jan Herman <2hp@seznam.cz> + * + * Rewrite for mainline: + * Marek Vasut <marek.vasut@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * (find more info at www.hackndev.com) + * + */ + +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/delay.h> +#include <linux/irq.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/pda_power.h> +#include <linux/pwm_backlight.h> +#include <linux/gpio.h> +#include <linux/power_supply.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/audio.h> +#include <mach/palmz72.h> +#include <mach/mmc.h> +#include <mach/pxafb.h> +#include <mach/pxa-regs.h> +#include <mach/pxa2xx-regs.h> +#include <mach/mfp-pxa27x.h> +#include <mach/irda.h> +#include <mach/pxa27x_keypad.h> +#include <mach/udc.h> +#include <mach/pm.h> + +#include "generic.h" +#include "devices.h" + +/****************************************************************************** + * Pin configuration + ******************************************************************************/ +static unsigned long palmz72_pin_config[] __initdata = { + /* MMC */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + GPIO14_GPIO, /* SD detect */ + GPIO115_GPIO, /* SD RO */ + GPIO98_GPIO, /* SD power */ + + /* AC97 */ + GPIO28_AC97_BITCLK, + GPIO29_AC97_SDATA_IN_0, + GPIO30_AC97_SDATA_OUT, + GPIO31_AC97_SYNC, + + /* IrDA */ + GPIO49_GPIO, /* ir disable */ + GPIO46_FICP_RXD, + GPIO47_FICP_TXD, + + /* PWM */ + GPIO16_PWM0_OUT, + + /* USB */ + GPIO15_GPIO, /* usb detect */ + GPIO12_GPIO, /* usb pullup */ + GPIO95_GPIO, /* usb power */ + + /* Matrix keypad */ + GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, + GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, + GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, + GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, + GPIO103_KP_MKOUT_0, + GPIO104_KP_MKOUT_1, + GPIO105_KP_MKOUT_2, + + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + GPIO20_GPIO, /* bl power */ + GPIO21_GPIO, /* LCD border switch */ + GPIO22_GPIO, /* LCD border color */ + GPIO96_GPIO, /* lcd power */ + + /* Misc. */ + GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ + GPIO88_GPIO, /* green led */ + GPIO27_GPIO, /* WM9712 IRQ */ +}; + +/****************************************************************************** + * SD/MMC card controller + ******************************************************************************/ +static int palmz72_mci_init(struct device *dev, + irq_handler_t palmz72_detect_int, void *data) +{ + int err = 0; + + /* Setup an interrupt for detecting card insert/remove events */ + err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ"); + if (err) + goto err; + err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N); + if (err) + goto err2; + err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), + palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM | + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, + "SD/MMC card detect", data); + if (err) { + printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", + __func__); + goto err2; + } + + /* SD_POWER is not actually power, but it is more like chip + * select, i.e. it is inverted */ + + err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER"); + if (err) + goto err3; + err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0); + if (err) + goto err4; + err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO"); + if (err) + goto err4; + err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO); + if (err) + goto err5; + + printk(KERN_DEBUG "%s: irq registered\n", __func__); + + return 0; + +err5: + gpio_free(GPIO_NR_PALMZ72_SD_RO); +err4: + gpio_free(GPIO_NR_PALMZ72_SD_POWER_N); +err3: + free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data); +err2: + gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N); +err: + return err; +} + +static void palmz72_mci_exit(struct device *dev, void *data) +{ + gpio_free(GPIO_NR_PALMZ72_SD_POWER_N); + free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data); + gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N); + gpio_free(GPIO_NR_PALMZ72_SD_RO); +} + +static void palmz72_mci_power(struct device *dev, unsigned int vdd) +{ + struct pxamci_platform_data *p_d = dev->platform_data; + if (p_d->ocr_mask & (1 << vdd)) + gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0); + else + gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1); +} + +static int palmz72_mci_ro(struct device *dev) +{ + return gpio_get_value(GPIO_NR_PALMZ72_SD_RO); +} + +static struct pxamci_platform_data palmz72_mci_platform_data = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .setpower = palmz72_mci_power, + .get_ro = palmz72_mci_ro, + .init = palmz72_mci_init, + .exit = palmz72_mci_exit, +}; + +/****************************************************************************** + * GPIO keyboard + ******************************************************************************/ +static unsigned int palmz72_matrix_keys[] = { + KEY(0, 0, KEY_POWER), + KEY(0, 1, KEY_F1), + KEY(0, 2, KEY_ENTER), + + KEY(1, 0, KEY_F2), + KEY(1, 1, KEY_F3), + KEY(1, 2, KEY_F4), + + KEY(2, 0, KEY_UP), + KEY(2, 2, KEY_DOWN), + + KEY(3, 0, KEY_RIGHT), + KEY(3, 2, KEY_LEFT), +}; + +static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = { + .matrix_key_rows = 4, + .matrix_key_cols = 3, + .matrix_key_map = palmz72_matrix_keys, + .matrix_key_map_size = ARRAY_SIZE(palmz72_matrix_keys), + + .debounce_interval = 30, +}; + +/****************************************************************************** + * Backlight + ******************************************************************************/ +static int palmz72_backlight_init(struct device *dev) +{ + int ret; + + ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER"); + if (ret) + goto err; + ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0); + if (ret) + goto err2; + ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER"); + if (ret) + goto err2; + ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0); + if (ret) + goto err3; + + return 0; +err3: + gpio_free(GPIO_NR_PALMZ72_LCD_POWER); +err2: + gpio_free(GPIO_NR_PALMZ72_BL_POWER); +err: + return ret; +} + +static int palmz72_backlight_notify(int brightness) +{ + gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness); + gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness); + return brightness; +} + +static void palmz72_backlight_exit(struct device *dev) +{ + gpio_free(GPIO_NR_PALMZ72_BL_POWER); + gpio_free(GPIO_NR_PALMZ72_LCD_POWER); +} + +static struct platform_pwm_backlight_data palmz72_backlight_data = { + .pwm_id = 0, + .max_brightness = PALMZ72_MAX_INTENSITY, + .dft_brightness = PALMZ72_MAX_INTENSITY, + .pwm_period_ns = PALMZ72_PERIOD_NS, + .init = palmz72_backlight_init, + .notify = palmz72_backlight_notify, + .exit = palmz72_backlight_exit, +}; + +static struct platform_device palmz72_backlight = { + .name = "pwm-backlight", + .dev = { + .parent = &pxa27x_device_pwm0.dev, + .platform_data = &palmz72_backlight_data, + }, +}; + +/****************************************************************************** + * IrDA + ******************************************************************************/ +static int palmz72_irda_startup(struct device *dev) +{ + int err; + err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE"); + if (err) + goto err; + err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1); + if (err) + gpio_free(GPIO_NR_PALMZ72_IR_DISABLE); +err: + return err; +} + +static void palmz72_irda_shutdown(struct device *dev) +{ + gpio_free(GPIO_NR_PALMZ72_IR_DISABLE); +} + +static void palmz72_irda_transceiver_mode(struct device *dev, int mode) +{ + gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF); + pxa2xx_transceiver_mode(dev, mode); +} + +static struct pxaficp_platform_data palmz72_ficp_platform_data = { + .startup = palmz72_irda_startup, + .shutdown = palmz72_irda_shutdown, + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = palmz72_irda_transceiver_mode, +}; + +/****************************************************************************** + * LEDs + ******************************************************************************/ +static struct gpio_led gpio_leds[] = { + { + .name = "palmz72:green:led", + .default_trigger = "none", + .gpio = GPIO_NR_PALMZ72_LED_GREEN, + }, +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device palmz72_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_led_info, + } +}; + +/****************************************************************************** + * Power supply + ******************************************************************************/ +static int power_supply_init(struct device *dev) +{ + int ret; + + ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC"); + if (ret) + goto err1; + ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT); + if (ret) + goto err2; + + ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB"); + if (ret) + goto err2; + ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N); + if (ret) + goto err3; + + return 0; +err3: + gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); +err2: + gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); +err1: + return ret; +} + +static int palmz72_is_ac_online(void) +{ + return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT); +} + +static int palmz72_is_usb_online(void) +{ + return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N); +} + +static void power_supply_exit(struct device *dev) +{ + gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N); + gpio_free(GPIO_NR_PALMZ72_POWER_DETECT); +} + +static char *palmz72_supplicants[] = { + "main-battery", +}; + +static struct pda_power_pdata power_supply_info = { + .init = power_supply_init, + .is_ac_online = palmz72_is_ac_online, + .is_usb_online = palmz72_is_usb_online, + .exit = power_supply_exit, + .supplied_to = palmz72_supplicants, + .num_supplicants = ARRAY_SIZE(palmz72_supplicants), +}; + +static struct platform_device power_supply = { + .name = "pda-power", + .id = -1, + .dev = { + .platform_data = &power_supply_info, + }, +}; + +/****************************************************************************** + * Framebuffer + ******************************************************************************/ +static struct pxafb_mode_info palmz72_lcd_modes[] = { +{ + .pixclock = 115384, + .xres = 320, + .yres = 320, + .bpp = 16, + + .left_margin = 27, + .right_margin = 7, + .upper_margin = 7, + .lower_margin = 8, + + .hsync_len = 6, + .vsync_len = 1, +}, +}; + +static struct pxafb_mach_info palmz72_lcd_screen = { + .modes = palmz72_lcd_modes, + .num_modes = ARRAY_SIZE(palmz72_lcd_modes), + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, +}; + +#ifdef CONFIG_PM + +/* We have some black magic here + * PalmOS ROM on recover expects special struct physical address + * to be transferred via PSPR. Using this struct PalmOS restores + * its state after sleep. As for Linux, we need to setup it the + * same way. More than that, PalmOS ROM changes some values in memory. + * For now only one location is found, which needs special treatment. + * Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people + * for reading backtraces for me :) + */ + +#define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050) + +static struct palmz72_resume_info palmz72_resume_info = { + .magic0 = 0xb4e6, + .magic1 = 1, + + /* reset state, MMU off etc */ + .arm_control = 0, + .aux_control = 0, + .ttb = 0, + .domain_access = 0, + .process_id = 0, +}; + +static unsigned long store_ptr; + +/* sys_device for Palm Zire 72 PM */ + +static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg) +{ + /* setup the resume_info struct for the original bootloader */ + palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume; + + /* Storing memory touched by ROM */ + store_ptr = *PALMZ72_SAVE_DWORD; + + /* Setting PSPR to a proper value */ + PSPR = virt_to_phys(&palmz72_resume_info); + + return 0; +} + +static int palmz72_pm_resume(struct sys_device *dev) +{ + *PALMZ72_SAVE_DWORD = store_ptr; + return 0; +} + +static struct sysdev_class palmz72_pm_sysclass = { + .name = "palmz72_pm", + .suspend = palmz72_pm_suspend, + .resume = palmz72_pm_resume, +}; + +static struct sys_device palmz72_pm_device = { + .cls = &palmz72_pm_sysclass, +}; + +static int __init palmz72_pm_init(void) +{ + int ret = -ENODEV; + if (machine_is_palmz72()) { + ret = sysdev_class_register(&palmz72_pm_sysclass); + if (ret == 0) + ret = sysdev_register(&palmz72_pm_device); + } + return ret; +} + +device_initcall(palmz72_pm_init); +#endif + +/****************************************************************************** + * Machine init + ******************************************************************************/ +static struct platform_device *devices[] __initdata = { + &palmz72_backlight, + &palmz72_leds, + &power_supply, +}; + +static void __init palmz72_init(void) +{ + pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); + set_pxa_fb_info(&palmz72_lcd_screen); + pxa_set_mci_info(&palmz72_mci_platform_data); + pxa_set_ac97_info(NULL); + pxa_set_ficp_info(&palmz72_ficp_platform_data); + pxa_set_keypad_info(&palmz72_keypad_platform_data); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +MACHINE_START(PALMZ72, "Palm Zire72") + .phys_io = 0x40000000, + .io_pg_offst = io_p2v(0x40000000), + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa27x_init_irq, + .timer = &pxa_timer, + .init_machine = palmz72_init +MACHINE_END diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 730b9f6ede1..36135a02fdc 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -31,7 +31,7 @@ #include <asm/mach/arch.h> #include <mach/hardware.h> #include <mach/pxa-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> #include <mach/pxa2xx-regs.h> #include <mach/pxa2xx_spi.h> #include <mach/pcm027.h> @@ -86,6 +86,28 @@ * *) CPU internal use only */ +static unsigned long pcm027_pin_config[] __initdata = { + /* Chip Selects */ + GPIO20_nSDCS_2, + GPIO21_nSDCS_3, + GPIO15_nCS_1, + GPIO78_nCS_2, + GPIO80_nCS_4, + GPIO33_nCS_5, /* Ethernet */ + + /* I2C */ + GPIO117_I2C_SCL, + GPIO118_I2C_SDA, + + /* GPIO */ + GPIO52_GPIO, /* IRQ from network controller */ +#ifdef CONFIG_LEDS_GPIO + GPIO90_GPIO, /* PCM027_LED_CPU */ + GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */ +#endif + GPIO114_GPIO, /* IRQ from CAN controller */ +}; + /* * SMC91x network controller specific stuff */ @@ -206,13 +228,9 @@ static void __init pcm027_init(void) */ ARB_CNTRL = ARB_CORE_PARK | 0x234; - platform_add_devices(devices, ARRAY_SIZE(devices)); + pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config)); - /* LEDs (on demand only) */ -#ifdef CONFIG_LEDS_GPIO - pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT); - pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT); -#endif /* CONFIG_LEDS_GPIO */ + platform_add_devices(devices, ARRAY_SIZE(devices)); /* at last call the baseboard to initialize itself */ #ifdef CONFIG_MACH_PCM990_BASEBOARD diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 420c9b3813f..f601425f1b1 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -262,8 +262,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); if (likely(pending)) { irq = PCM027_IRQ(0) + __ffs(pending); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; } while (pending); @@ -328,36 +327,10 @@ static struct pxamci_platform_data pcm990_mci_platform_data = { .exit = pcm990_mci_exit, }; -/* - * init OHCI hardware to work with - * - * Note: Only USB port 1 (host only) is connected - * - * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low - * GPIO89 (USBHPEN#1): power-on out, on when low - */ -static int pcm990_ohci_init(struct device *dev) -{ - /* - * disable USB port 2 and 3 - * power sense is active low - */ - UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 | - UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE); - /* - * wait 10ms after Power on - * overcurrent per port - * power switch per port - */ - UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */ - - return 0; -} - static struct pxaohci_platform_data pcm990_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = pcm990_ohci_init, - .exit = NULL, + .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, + .power_on_delay = 10, }; /* diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 1b539e67557..164eb0bb632 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -86,9 +86,27 @@ static int pxa_pm_valid(suspend_state_t state) return -EINVAL; } +static int pxa_pm_prepare(void) +{ + int ret = 0; + + if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->prepare) + ret = pxa_cpu_pm_fns->prepare(); + + return ret; +} + +static void pxa_pm_finish(void) +{ + if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish) + pxa_cpu_pm_fns->finish(); +} + static struct platform_suspend_ops pxa_pm_ops = { .valid = pxa_pm_valid, .enter = pxa_pm_enter, + .prepare = pxa_pm_prepare, + .finish = pxa_pm_finish, }; static int __init pxa_pm_init(void) diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 3f5f484549b..2e3bd8b1523 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -20,6 +20,9 @@ #include <linux/fb.h> #include <linux/pm.h> #include <linux/delay.h> +#include <linux/gpio.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -33,7 +36,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa25x.h> #include <mach/mmc.h> #include <mach/udc.h> #include <mach/i2c.h> @@ -42,6 +45,7 @@ #include <mach/pxafb.h> #include <mach/sharpsl.h> #include <mach/ssp.h> +#include <mach/pxa2xx_spi.h> #include <asm/hardware/scoop.h> #include <asm/hardware/locomo.h> @@ -51,6 +55,88 @@ #include "devices.h" #include "sharpsl.h" +static unsigned long poodle_pin_config[] __initdata = { + /* I/O */ + GPIO79_nCS_3, + GPIO80_nCS_4, + GPIO18_RDY, + + /* Clock */ + GPIO12_32KHz, + + /* SSP1 */ + GPIO23_SSP1_SCLK, + GPIO25_SSP1_TXD, + GPIO26_SSP1_RXD, + GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */ + + /* I2S */ + GPIO28_I2S_BITCLK_OUT, + GPIO29_I2S_SDATA_IN, + GPIO30_I2S_SDATA_OUT, + GPIO31_I2S_SYNC, + GPIO32_I2S_SYSCLK, + + /* Infra-Red */ + GPIO47_FICP_TXD, + GPIO46_FICP_RXD, + + /* FFUART */ + GPIO40_FFUART_DTR, + GPIO41_FFUART_RTS, + GPIO39_FFUART_TXD, + GPIO37_FFUART_DSR, + GPIO34_FFUART_RXD, + GPIO35_FFUART_CTS, + + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + + /* PC Card */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO52_nPCE_1, + GPIO53_nPCE_2, + GPIO54_nPSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + + /* MMC */ + GPIO6_MMC_CLK, + GPIO8_MMC_CS0, + + /* GPIO */ + GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */ + GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */ + GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */ + GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */ + + GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */ + GPIO22_GPIO, /* POODLE_GPIO_IR_ON */ +}; + static struct resource poodle_scoop_resources[] = { [0] = { .start = 0x10800000, @@ -62,6 +148,7 @@ static struct resource poodle_scoop_resources[] = { static struct scoop_config poodle_scoop_setup = { .io_dir = POODLE_SCOOP_IO_DIR, .io_out = POODLE_SCOOP_IO_OUT, + .gpio_base = POODLE_SCOOP_GPIO_BASE, }; struct platform_device poodle_scoop_device = { @@ -74,27 +161,6 @@ struct platform_device poodle_scoop_device = { .resource = poodle_scoop_resources, }; -static void poodle_pcmcia_init(void) -{ - /* Setup default state of GPIO outputs - before we enable them as outputs. */ - GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | - GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | - GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) | - GPIO_bit(GPIO53_nPCE_2); - - pxa_gpio_mode(GPIO48_nPOE_MD); - pxa_gpio_mode(GPIO49_nPWE_MD); - pxa_gpio_mode(GPIO50_nPIOR_MD); - pxa_gpio_mode(GPIO51_nPIOW_MD); - pxa_gpio_mode(GPIO55_nPREG_MD); - pxa_gpio_mode(GPIO56_nPWAIT_MD); - pxa_gpio_mode(GPIO57_nIOIS16_MD); - pxa_gpio_mode(GPIO52_nPCE_1_MD); - pxa_gpio_mode(GPIO53_nPCE_2_MD); - pxa_gpio_mode(GPIO54_pSKTSEL_MD); -} - static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { { .dev = &poodle_scoop_device.dev, @@ -107,7 +173,6 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { static struct scoop_pcmcia_config poodle_pcmcia_config = { .devs = &poodle_pcmcia_scoop[0], .num_devs = 1, - .pcmcia_init = poodle_pcmcia_init, }; EXPORT_SYMBOL(poodle_scoop_device); @@ -136,62 +201,55 @@ struct platform_device poodle_locomo_device = { EXPORT_SYMBOL(poodle_locomo_device); -/* - * Poodle SSP Device - */ - -struct platform_device poodle_ssp_device = { - .name = "corgi-ssp", - .id = -1, -}; - -struct corgissp_machinfo poodle_ssp_machinfo = { - .port = 1, - .cs_lcdcon = -1, - .cs_ads7846 = -1, - .cs_max1111 = -1, - .clk_lcdcon = 2, - .clk_ads7846 = 36, - .clk_max1111 = 2, +#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) +static struct pxa2xx_spi_master poodle_spi_info = { + .num_chipselect = 1, }; - -/* - * Poodle Touch Screen Device - */ -static struct resource poodlets_resources[] = { - [0] = { - .start = POODLE_IRQ_GPIO_TP_INT, - .end = POODLE_IRQ_GPIO_TP_INT, - .flags = IORESOURCE_IRQ, - }, +static struct ads7846_platform_data poodle_ads7846_info = { + .model = 7846, + .vref_delay_usecs = 100, + .x_plate_ohms = 419, + .y_plate_ohms = 486, + .gpio_pendown = POODLE_GPIO_TP_INT, }; -static unsigned long poodle_get_hsync_invperiod(void) +static void ads7846_cs(u32 command) { - return 0; + gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT)); } -static void poodle_null_hsync(void) -{ -} - -static struct corgits_machinfo poodle_ts_machinfo = { - .get_hsync_invperiod = poodle_get_hsync_invperiod, - .put_hsync = poodle_null_hsync, - .wait_hsync = poodle_null_hsync, +static struct pxa2xx_spi_chip poodle_ads7846_chip = { + .cs_control = ads7846_cs, }; -static struct platform_device poodle_ts_device = { - .name = "corgi-ts", - .dev = { - .platform_data = &poodle_ts_machinfo, +static struct spi_board_info poodle_spi_devices[] = { + { + .modalias = "ads7846", + .max_speed_hz = 10000, + .bus_num = 1, + .platform_data = &poodle_ads7846_info, + .controller_data= &poodle_ads7846_chip, + .irq = gpio_to_irq(POODLE_GPIO_TP_INT), }, - .id = -1, - .num_resources = ARRAY_SIZE(poodlets_resources), - .resource = poodlets_resources, }; +static void __init poodle_init_spi(void) +{ + int err; + + err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS"); + if (err) + return; + + gpio_direction_output(POODLE_GPIO_TP_CS, 1); + + pxa2xx_set_spi_info(1, &poodle_spi_info); + spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices)); +} +#else +static inline void poodle_init_spi(void) {} +#endif /* * MMC/SD Device @@ -205,22 +263,50 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, { int err; - /* setup GPIO for PXA25x MMC controller */ - pxa_gpio_mode(GPIO6_MMCCLK_MD); - pxa_gpio_mode(GPIO8_MMCCS0_MD); - pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); - pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); - pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); - pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); + err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT"); + if (err) + goto err_out; + + err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP"); + if (err) + goto err_free_1; + + err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR"); + if (err) + goto err_free_2; + + err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1"); + if (err) + goto err_free_3; + + gpio_direction_input(POODLE_GPIO_nSD_DETECT); + gpio_direction_input(POODLE_GPIO_nSD_WP); + + gpio_direction_output(POODLE_GPIO_SD_PWR, 0); + gpio_direction_output(POODLE_GPIO_SD_PWR1, 0); poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) - printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); + if (err) { + pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", + __func__); + goto err_free_4; + } + + return 0; +err_free_4: + gpio_free(POODLE_GPIO_SD_PWR1); +err_free_3: + gpio_free(POODLE_GPIO_SD_PWR); +err_free_2: + gpio_free(POODLE_GPIO_nSD_WP); +err_free_1: + gpio_free(POODLE_GPIO_nSD_DETECT); +err_out: return err; } @@ -228,18 +314,19 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd) { struct pxamci_platform_data* p_d = dev->platform_data; - if (( 1 << vdd) & p_d->ocr_mask) { - GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + if ((1 << vdd) & p_d->ocr_mask) { + gpio_set_value(POODLE_GPIO_SD_PWR, 1); mdelay(2); - GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); + gpio_set_value(POODLE_GPIO_SD_PWR1, 1); } else { - GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); - GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); + gpio_set_value(POODLE_GPIO_SD_PWR1, 0); + gpio_set_value(POODLE_GPIO_SD_PWR, 0); } } static int poodle_mci_get_ro(struct device *dev) { + return !!gpio_get_value(POODLE_GPIO_nSD_WP); return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); } @@ -247,6 +334,10 @@ static int poodle_mci_get_ro(struct device *dev) static void poodle_mci_exit(struct device *dev, void *data) { free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); + gpio_free(POODLE_GPIO_SD_PWR1); + gpio_free(POODLE_GPIO_SD_PWR); + gpio_free(POODLE_GPIO_nSD_WP); + gpio_free(POODLE_GPIO_nSD_DETECT); } static struct pxamci_platform_data poodle_mci_platform_data = { @@ -263,38 +354,41 @@ static struct pxamci_platform_data poodle_mci_platform_data = { */ static void poodle_irda_transceiver_mode(struct device *dev, int mode) { - if (mode & IR_OFF) { - GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON); - } else { - GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON); - } + gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF); pxa2xx_transceiver_mode(dev, mode); } +static int poodle_irda_startup(struct device *dev) +{ + int err; + + err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON"); + if (err) + return err; + + gpio_direction_output(POODLE_GPIO_IR_ON, 1); + return 0; +} + +static void poodle_irda_shutdown(struct device *dev) +{ + gpio_free(POODLE_GPIO_IR_ON); +} + static struct pxaficp_platform_data poodle_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_OFF, - .transceiver_mode = poodle_irda_transceiver_mode, + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = poodle_irda_transceiver_mode, + .startup = poodle_irda_startup, + .shutdown = poodle_irda_shutdown, }; /* * USB Device Controller */ -static void poodle_udc_command(int cmd) -{ - switch(cmd) { - case PXA2XX_UDC_CMD_CONNECT: - GPSR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP); - break; - case PXA2XX_UDC_CMD_DISCONNECT: - GPCR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP); - break; - } -} - static struct pxa2xx_udc_mach_info udc_info __initdata = { /* no connect GPIO; poodle can't tell connection status */ - .udc_command = poodle_udc_command, + .gpio_pullup = POODLE_GPIO_USB_PULLUP, }; @@ -316,15 +410,12 @@ static struct pxafb_mode_info poodle_fb_mode = { static struct pxafb_mach_info poodle_fb_info = { .modes = &poodle_fb_mode, .num_modes = 1, - .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color, - .lccr3 = 0, + .lcd_conn = LCD_COLOR_TFT_16BPP, }; static struct platform_device *devices[] __initdata = { &poodle_locomo_device, &poodle_scoop_device, - &poodle_ssp_device, - &poodle_ts_device, }; static void poodle_poweroff(void) @@ -344,59 +435,23 @@ static void __init poodle_init(void) pm_power_off = poodle_poweroff; arm_pm_restart = poodle_restart; - /* setup sleep mode values */ - PWER = 0x00000002; - PFER = 0x00000000; - PRER = 0x00000002; - PGSR0 = 0x00008000; - PGSR1 = 0x003F0202; - PGSR2 = 0x0001C000; PCFR |= PCFR_OPDE; - /* cpu initialize */ - /* Pgsr Register */ - PGSR0 = 0x0146dd80; - PGSR1 = 0x03bf0890; - PGSR2 = 0x0001c000; - - /* Alternate Register */ - GAFR0_L = 0x01001000; - GAFR0_U = 0x591a8010; - GAFR1_L = 0x900a8451; - GAFR1_U = 0xaaa5aaaa; - GAFR2_L = 0x8aaaaaaa; - GAFR2_U = 0x00000002; - - /* Direction Register */ - GPDR0 = 0xd3f0904c; - GPDR1 = 0xfcffb7d3; - GPDR2 = 0x0001ffff; - - /* Output Register */ - GPCR0 = 0x00000000; - GPCR1 = 0x00000000; - GPCR2 = 0x00000000; - - GPSR0 = 0x00400000; - GPSR1 = 0x00000000; - GPSR2 = 0x00000000; + pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config)); + + platform_scoop_config = &poodle_pcmcia_config; + + ret = platform_add_devices(devices, ARRAY_SIZE(devices)); + if (ret) + pr_warning("poodle: Unable to register LoCoMo device\n"); set_pxa_fb_parent(&poodle_locomo_device.dev); set_pxa_fb_info(&poodle_fb_info); - pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT); - pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT); pxa_set_udc_info(&udc_info); pxa_set_mci_info(&poodle_mci_platform_data); pxa_set_ficp_info(&poodle_ficp_platform_data); pxa_set_i2c_info(NULL); - - platform_scoop_config = &poodle_pcmcia_config; - - ret = platform_add_devices(devices, ARRAY_SIZE(devices)); - if (ret) { - printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n"); - } - corgi_ssp_set_machinfo(&poodle_ssp_machinfo); + poodle_init_spi(); } static void __init fixup_poodle(struct machine_desc *desc, diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 305452b56e9..25d17a1dab7 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -36,6 +36,12 @@ #include "devices.h" #include "clock.h" +int cpu_is_pxa26x(void) +{ + return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0); +} +EXPORT_SYMBOL_GPL(cpu_is_pxa26x); + /* * Various clock factors driven by the CCCR register. */ @@ -203,48 +209,21 @@ static struct clk pxa25x_clks[] = { * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ -enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, - - SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, - SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, - SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, - +enum { SLEEP_SAVE_PSTR, - SLEEP_SAVE_CKEN, - SLEEP_SAVE_COUNT }; static void pxa25x_cpu_pm_save(unsigned long *sleep_save) { - SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); - - SAVE(GAFR0_L); SAVE(GAFR0_U); - SAVE(GAFR1_L); SAVE(GAFR1_U); - SAVE(GAFR2_L); SAVE(GAFR2_U); - SAVE(CKEN); SAVE(PSTR); - - /* Clear GPIO transition detect bits */ - GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; } static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) { - /* ensure not to come back here if it wasn't intended */ - PSPR = 0; - - /* restore registers */ - RESTORE(GAFR0_L); RESTORE(GAFR0_U); - RESTORE(GAFR1_L); RESTORE(GAFR1_U); - RESTORE(GAFR2_L); RESTORE(GAFR2_U); - RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); - - PSSR = PSSR_RDH | PSSR_PH; - RESTORE(CKEN); RESTORE(PSTR); } @@ -256,19 +235,32 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_MEM: - /* set resume return address */ - PSPR = virt_to_phys(pxa_cpu_resume); pxa25x_cpu_suspend(PWRMODE_SLEEP); break; } } +static int pxa25x_cpu_pm_prepare(void) +{ + /* set resume return address */ + PSPR = virt_to_phys(pxa_cpu_resume); + return 0; +} + +static void pxa25x_cpu_pm_finish(void) +{ + /* ensure not to come back here if it wasn't intended */ + PSPR = 0; +} + static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { .save_count = SLEEP_SAVE_COUNT, .valid = suspend_valid_only_mem, .save = pxa25x_cpu_pm_save, .restore = pxa25x_cpu_pm_restore, .enter = pxa25x_cpu_pm_enter, + .prepare = pxa25x_cpu_pm_prepare, + .finish = pxa25x_cpu_pm_finish, }; static void __init pxa25x_init_pm(void) @@ -330,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = { { .cls = &pxa_irq_sysclass, }, { + .cls = &pxa2xx_mfp_sysclass, + }, { .cls = &pxa_gpio_sysclass, }, }; @@ -338,11 +332,7 @@ static int __init pxa25x_init(void) { int i, ret = 0; - /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ - if (cpu_is_pxa255()) - clks_register(&pxa25x_hwuart_clk, 1); - - if (cpu_is_pxa21x() || cpu_is_pxa25x()) { + if (cpu_is_pxa25x()) { reset_status = RCSR; @@ -365,9 +355,11 @@ static int __init pxa25x_init(void) return ret; } - /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ - if (cpu_is_pxa255()) + /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ + if (cpu_is_pxa255() || cpu_is_pxa26x()) { + clks_register(&pxa25x_hwuart_clk, 1); ret = platform_device_register(&pxa_device_hwuart); + } return ret; } diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index f9f6a9c31f4..3e4ab2279c9 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -34,6 +34,13 @@ #include "devices.h" #include "clock.h" +void pxa27x_clear_otgph(void) +{ + if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) + PSSR |= PSSR_OTGPH; +} +EXPORT_SYMBOL(pxa27x_clear_otgph); + /* Crystal clock: 13MHz */ #define BASE_CLK 13000000 @@ -183,36 +190,18 @@ static struct clk pxa27x_clks[] = { * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ -enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, - - SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, - SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, - SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, - SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U, - +enum { SLEEP_SAVE_PSTR, - SLEEP_SAVE_CKEN, - SLEEP_SAVE_MDREFR, - SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, - SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, - + SLEEP_SAVE_PCFR, SLEEP_SAVE_COUNT }; void pxa27x_cpu_pm_save(unsigned long *sleep_save) { - SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3); - - SAVE(GAFR0_L); SAVE(GAFR0_U); - SAVE(GAFR1_L); SAVE(GAFR1_U); - SAVE(GAFR2_L); SAVE(GAFR2_U); - SAVE(GAFR3_L); SAVE(GAFR3_U); - SAVE(MDREFR); - SAVE(PWER); SAVE(PCFR); SAVE(PRER); - SAVE(PFER); SAVE(PKWR); + SAVE(PCFR); SAVE(CKEN); SAVE(PSTR); @@ -220,24 +209,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save) void pxa27x_cpu_pm_restore(unsigned long *sleep_save) { - /* ensure not to come back here if it wasn't intended */ - PSPR = 0; - - /* restore registers */ - RESTORE(GAFR0_L); RESTORE(GAFR0_U); - RESTORE(GAFR1_L); RESTORE(GAFR1_U); - RESTORE(GAFR2_L); RESTORE(GAFR2_U); - RESTORE(GAFR3_L); RESTORE(GAFR3_U); - RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3); - RESTORE(MDREFR); - RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); - RESTORE(PFER); RESTORE(PKWR); + RESTORE(PCFR); PSSR = PSSR_RDH | PSSR_PH; RESTORE(CKEN); - RESTORE(PSTR); } @@ -259,8 +236,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) pxa_cpu_standby(); break; case PM_SUSPEND_MEM: - /* set resume return address */ - PSPR = virt_to_phys(pxa_cpu_resume); pxa27x_cpu_suspend(PWRMODE_SLEEP); break; } @@ -271,12 +246,27 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state) return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; } +static int pxa27x_cpu_pm_prepare(void) +{ + /* set resume return address */ + PSPR = virt_to_phys(pxa_cpu_resume); + return 0; +} + +static void pxa27x_cpu_pm_finish(void) +{ + /* ensure not to come back here if it wasn't intended */ + PSPR = 0; +} + static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { .save_count = SLEEP_SAVE_COUNT, .save = pxa27x_cpu_pm_save, .restore = pxa27x_cpu_pm_restore, .valid = pxa27x_cpu_pm_valid, .enter = pxa27x_cpu_pm_enter, + .prepare = pxa27x_cpu_pm_prepare, + .finish = pxa27x_cpu_pm_finish, }; static void __init pxa27x_init_pm(void) @@ -349,7 +339,7 @@ struct platform_device pxa27x_device_i2c_power = { .num_resources = ARRAY_SIZE(i2c_power_resources), }; -void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) +void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) { local_irq_disable(); PCFR |= PCFR_PI2CEN; @@ -376,6 +366,8 @@ static struct sys_device pxa27x_sysdev[] = { { .cls = &pxa_irq_sysclass, }, { + .cls = &pxa2xx_mfp_sysclass, + }, { .cls = &pxa_gpio_sysclass, }, }; diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 03cbc38103e..b3cd5d0b0f3 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -203,6 +203,19 @@ static const struct clkops clk_pout_ops = { .disable = clk_pout_disable, }; +static void clk_dummy_enable(struct clk *clk) +{ +} + +static void clk_dummy_disable(struct clk *clk) +{ +} + +static const struct clkops clk_dummy_ops = { + .enable = clk_dummy_enable, + .disable = clk_dummy_disable, +}; + static struct clk pxa3xx_clks[] = { { .name = "CLK_POUT", @@ -211,6 +224,13 @@ static struct clk pxa3xx_clks[] = { .delay = 70, }, + /* Power I2C clock is always on */ + { + .name = "I2CCLK", + .ops = &clk_dummy_ops, + .dev = &pxa3xx_device_i2c_power.dev, + }, + PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL), @@ -509,6 +529,30 @@ void __init pxa3xx_init_irq(void) * device registration specific to PXA3xx. */ +static struct resource i2c_power_resources[] = { + { + .start = 0x40f500c0, + .end = 0x40f500d3, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_PWRI2C, + .end = IRQ_PWRI2C, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa3xx_device_i2c_power = { + .name = "pxa2xx-i2c", + .id = 1, + .resource = i2c_power_resources, + .num_resources = ARRAY_SIZE(i2c_power_resources), +}; + +void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) +{ + pxa3xx_device_i2c_power.dev.platform_data = info; +} + static struct platform_device *devices[] __initdata = { /* &pxa_device_udc, The UDC driver is PXA25x only */ &pxa_device_ffuart, @@ -522,6 +566,7 @@ static struct platform_device *devices[] __initdata = { &pxa3xx_device_ssp4, &pxa27x_device_pwm0, &pxa27x_device_pwm1, + &pxa3xx_device_i2c_power, }; static struct sys_device pxa3xx_sysdev[] = { diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 9996c612c3d..1b2af575c40 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -7,7 +7,7 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/gpio.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/proc-fns.h> #include <mach/pxa-regs.h> @@ -20,7 +20,7 @@ static void do_hw_reset(void); static int reset_gpio = -1; -int init_gpio_reset(int gpio) +int init_gpio_reset(int gpio, int output) { int rc; @@ -30,9 +30,12 @@ int init_gpio_reset(int gpio) goto out; } - rc = gpio_direction_input(gpio); + if (output) + rc = gpio_direction_output(gpio, 0); + else + rc = gpio_direction_input(gpio); if (rc) { - printk(KERN_ERR "Can't configure reset_gpio for input\n"); + printk(KERN_ERR "Can't configure reset_gpio\n"); gpio_free(gpio); goto out; } diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index e804ae09370..15c2f1a8623 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -116,24 +116,20 @@ struct battery_thresh spitz_battery_levels_noac[] = { { 0, 0}, }; -/* MAX1111 Commands */ -#define MAXCTRL_PD0 1u << 0 -#define MAXCTRL_PD1 1u << 1 -#define MAXCTRL_SGL 1u << 2 -#define MAXCTRL_UNI 1u << 3 -#define MAXCTRL_SEL_SH 4 -#define MAXCTRL_STR 1u << 7 - /* * Read MAX1111 ADC */ +extern int max1111_read_channel(int); + int sharpsl_pm_pxa_read_max1111(int channel) { if (machine_is_tosa()) // Ugly, better move this function into another module return 0; - return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 - | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); + /* max1111 accepts channels from 0-3, however, + * it is encoded from 0-7 here in the code. + */ + return max1111_read_channel(channel >> 1); } void sharpsl_pm_pxa_init(void) diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index b569f3b4cf3..524f656dc56 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -19,16 +19,23 @@ #include <linux/major.h> #include <linux/fs.h> #include <linux/interrupt.h> +#include <linux/gpio.h> +#include <linux/leds.h> #include <linux/mmc/host.h> #include <linux/pm.h> #include <linux/backlight.h> +#include <linux/io.h> +#include <linux/i2c.h> +#include <linux/i2c/pca953x.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> +#include <linux/spi/corgi_lcd.h> #include <asm/setup.h> #include <asm/memory.h> #include <asm/mach-types.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/system.h> #include <asm/mach/arch.h> @@ -37,7 +44,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> #include <mach/pxa27x-udc.h> #include <mach/reset.h> #include <mach/i2c.h> @@ -46,7 +53,7 @@ #include <mach/ohci.h> #include <mach/udc.h> #include <mach/pxafb.h> -#include <mach/akita.h> +#include <mach/pxa2xx_spi.h> #include <mach/spitz.h> #include <mach/sharpsl.h> @@ -57,6 +64,66 @@ #include "devices.h" #include "sharpsl.h" +static unsigned long spitz_pin_config[] __initdata = { + /* Chip Selects */ + GPIO78_nCS_2, /* SCOOP #2 */ + GPIO80_nCS_4, /* SCOOP #1 */ + + /* LCD - 16bpp Active TFT */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + + /* PC Card */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO85_nPCE_1, + GPIO54_nPCE_2, + GPIO79_PSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + + /* MMC */ + GPIO32_MMC_CLK, + GPIO112_MMC_CMD, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + + /* GPIOs */ + GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */ + GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */ + GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */ + GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */ + GPIO35_GPIO, /* SPITZ_GPIO_USB_DEVICE */ + GPIO22_GPIO, /* SPITZ_GPIO_HSYNC */ + GPIO94_GPIO, /* SPITZ_GPIO_CF_CD */ + GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */ + GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */ + + GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, +}; + /* * Spitz SCOOP Device #1 */ @@ -69,10 +136,11 @@ static struct resource spitz_scoop_resources[] = { }; static struct scoop_config spitz_scoop_setup = { - .io_dir = SPITZ_SCP_IO_DIR, + .io_dir = SPITZ_SCP_IO_DIR, .io_out = SPITZ_SCP_IO_OUT, - .suspend_clr = SPITZ_SCP_SUS_CLR, - .suspend_set = SPITZ_SCP_SUS_SET, + .suspend_clr = SPITZ_SCP_SUS_CLR, + .suspend_set = SPITZ_SCP_SUS_SET, + .gpio_base = SPITZ_SCP_GPIO_BASE, }; struct platform_device spitzscoop_device = { @@ -97,10 +165,11 @@ static struct resource spitz_scoop2_resources[] = { }; static struct scoop_config spitz_scoop2_setup = { - .io_dir = SPITZ_SCP2_IO_DIR, + .io_dir = SPITZ_SCP2_IO_DIR, .io_out = SPITZ_SCP2_IO_OUT, - .suspend_clr = SPITZ_SCP2_SUS_CLR, - .suspend_set = SPITZ_SCP2_SUS_SET, + .suspend_clr = SPITZ_SCP2_SUS_CLR, + .suspend_set = SPITZ_SCP2_SUS_SET, + .gpio_base = SPITZ_SCP2_GPIO_BASE, }; struct platform_device spitzscoop2_device = { @@ -122,7 +191,7 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); if (new_cpr & 0x0007) { - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); + gpio_set_value(SPITZ_GPIO_CF_POWER, 1); if (!(cpr & 0x0002) && !(cpr & 0x0004)) mdelay(5); if (device == SPITZ_PWR_CF) @@ -138,34 +207,13 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) if (!(cpr & 0x0002) && !(cpr & 0x0004)) { write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); mdelay(1); - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); + gpio_set_value(SPITZ_GPIO_CF_POWER, 0); } else { write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); } } } -static void spitz_pcmcia_init(void) -{ - /* Setup default state of GPIO outputs - before we enable them as outputs. */ - GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | - GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) | - GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2); - GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1); - - pxa_gpio_mode(GPIO48_nPOE_MD); - pxa_gpio_mode(GPIO49_nPWE_MD); - pxa_gpio_mode(GPIO50_nPIOR_MD); - pxa_gpio_mode(GPIO51_nPIOW_MD); - pxa_gpio_mode(GPIO55_nPREG_MD); - pxa_gpio_mode(GPIO56_nPWAIT_MD); - pxa_gpio_mode(GPIO57_nIOIS16_MD); - pxa_gpio_mode(GPIO85_nPCE_1_MD); - pxa_gpio_mode(GPIO54_nPCE_2_MD); - pxa_gpio_mode(GPIO104_pSKTSEL_MD); -} - static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) { /* Only need to override behaviour for slot 0 */ @@ -191,165 +239,169 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = { static struct scoop_pcmcia_config spitz_pcmcia_config = { .devs = &spitz_pcmcia_scoop[0], .num_devs = 2, - .pcmcia_init = spitz_pcmcia_init, .power_ctrl = spitz_pcmcia_pwr, }; EXPORT_SYMBOL(spitzscoop_device); EXPORT_SYMBOL(spitzscoop2_device); - /* - * Spitz SSP Device - * - * Set the parent as the scoop device because a lot of SSP devices - * also use scoop functions and this makes the power up/down order - * work correctly. + * Spitz Keyboard Device */ -struct platform_device spitzssp_device = { - .name = "corgi-ssp", - .dev = { - .parent = &spitzscoop_device.dev, - }, +static struct platform_device spitzkbd_device = { + .name = "spitz-keyboard", .id = -1, }; -struct corgissp_machinfo spitz_ssp_machinfo = { - .port = 2, - .cs_lcdcon = SPITZ_GPIO_LCDCON_CS, - .cs_ads7846 = SPITZ_GPIO_ADS7846_CS, - .cs_max1111 = SPITZ_GPIO_MAX1111_CS, - .clk_lcdcon = 520, - .clk_ads7846 = 14, - .clk_max1111 = 56, -}; - /* - * Spitz Backlight Device + * Spitz LEDs */ -static void spitz_bl_kick_battery(void) -{ - void (*kick_batt)(void); - - kick_batt = symbol_get(sharpsl_battery_kick); - if (kick_batt) { - kick_batt(); - symbol_put(sharpsl_battery_kick); - } -} - -static struct generic_bl_info spitz_bl_machinfo = { - .name = "corgi-bl", - .default_intensity = 0x1f, - .limit_mask = 0x0b, - .max_intensity = 0x2f, - .kick_battery = spitz_bl_kick_battery, -}; - -static struct platform_device spitzbl_device = { - .name = "generic-bl", - .dev = { - .platform_data = &spitz_bl_machinfo, +static struct gpio_led spitz_gpio_leds[] = { + { + .name = "spitz:amber:charge", + .default_trigger = "sharpsl-charge", + .gpio = SPITZ_GPIO_LED_ORANGE, + }, + { + .name = "spitz:green:hddactivity", + .default_trigger = "ide-disk", + .gpio = SPITZ_GPIO_LED_GREEN, }, - .id = -1, }; - -/* - * Spitz Keyboard Device - */ -static struct platform_device spitzkbd_device = { - .name = "spitz-keyboard", - .id = -1, +static struct gpio_led_platform_data spitz_gpio_leds_info = { + .leds = spitz_gpio_leds, + .num_leds = ARRAY_SIZE(spitz_gpio_leds), }; - -/* - * Spitz LEDs - */ static struct platform_device spitzled_device = { - .name = "spitz-led", + .name = "leds-gpio", .id = -1, + .dev = { + .platform_data = &spitz_gpio_leds_info, + }, }; -/* - * Spitz Touch Screen Device - */ +#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) +static struct pxa2xx_spi_master spitz_spi_info = { + .num_chipselect = 3, +}; -static unsigned long (*get_hsync_invperiod)(struct device *dev); +static struct ads7846_platform_data spitz_ads7846_info = { + .model = 7846, + .vref_delay_usecs = 100, + .x_plate_ohms = 419, + .y_plate_ohms = 486, + .gpio_pendown = SPITZ_GPIO_TP_INT, +}; -static void inline sharpsl_wait_sync(int gpio) +static void spitz_ads7846_cs(u32 command) { - while((GPLR(gpio) & GPIO_bit(gpio)) == 0); - while((GPLR(gpio) & GPIO_bit(gpio)) != 0); + gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT)); } -static struct device *spitz_pxafb_dev; +static struct pxa2xx_spi_chip spitz_ads7846_chip = { + .cs_control = spitz_ads7846_cs, +}; -static int is_pxafb_device(struct device * dev, void * data) +static void spitz_bl_kick_battery(void) { - struct platform_device *pdev = container_of(dev, struct platform_device, dev); - - return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); -} + void (*kick_batt)(void); -static unsigned long spitz_get_hsync_invperiod(void) -{ -#ifdef CONFIG_FB_PXA - if (!spitz_pxafb_dev) { - spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); - if (!spitz_pxafb_dev) - return 0; + kick_batt = symbol_get(sharpsl_battery_kick); + if (kick_batt) { + kick_batt(); + symbol_put(sharpsl_battery_kick); } - if (!get_hsync_invperiod) - get_hsync_invperiod = symbol_get(pxafb_get_hsync_time); - if (!get_hsync_invperiod) -#endif - return 0; - - return get_hsync_invperiod(spitz_pxafb_dev); } -static void spitz_put_hsync(void) -{ - put_device(spitz_pxafb_dev); - if (get_hsync_invperiod) - symbol_put(pxafb_get_hsync_time); - spitz_pxafb_dev = NULL; - get_hsync_invperiod = NULL; -} +static struct corgi_lcd_platform_data spitz_lcdcon_info = { + .init_mode = CORGI_LCD_MODE_VGA, + .max_intensity = 0x2f, + .default_intensity = 0x1f, + .limit_mask = 0x0b, + .gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT, + .gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON, + .kick_battery = spitz_bl_kick_battery, +}; -static void spitz_wait_hsync(void) +static void spitz_lcdcon_cs(u32 command) { - sharpsl_wait_sync(SPITZ_GPIO_HSYNC); + gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT)); } -static struct resource spitzts_resources[] = { - [0] = { - .start = SPITZ_IRQ_GPIO_TP_INT, - .end = SPITZ_IRQ_GPIO_TP_INT, - .flags = IORESOURCE_IRQ, - }, +static struct pxa2xx_spi_chip spitz_lcdcon_chip = { + .cs_control = spitz_lcdcon_cs, }; -static struct corgits_machinfo spitz_ts_machinfo = { - .get_hsync_invperiod = spitz_get_hsync_invperiod, - .put_hsync = spitz_put_hsync, - .wait_hsync = spitz_wait_hsync, +static void spitz_max1111_cs(u32 command) +{ + gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT)); +} + +static struct pxa2xx_spi_chip spitz_max1111_chip = { + .cs_control = spitz_max1111_cs, }; -static struct platform_device spitzts_device = { - .name = "corgi-ts", - .dev = { - .parent = &spitzssp_device.dev, - .platform_data = &spitz_ts_machinfo, +static struct spi_board_info spitz_spi_devices[] = { + { + .modalias = "ads7846", + .max_speed_hz = 1200000, + .bus_num = 2, + .chip_select = 0, + .platform_data = &spitz_ads7846_info, + .controller_data= &spitz_ads7846_chip, + .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), + }, { + .modalias = "corgi-lcd", + .max_speed_hz = 50000, + .bus_num = 2, + .chip_select = 1, + .platform_data = &spitz_lcdcon_info, + .controller_data= &spitz_lcdcon_chip, + }, { + .modalias = "max1111", + .max_speed_hz = 450000, + .bus_num = 2, + .chip_select = 2, + .controller_data= &spitz_max1111_chip, }, - .id = -1, - .num_resources = ARRAY_SIZE(spitzts_resources), - .resource = spitzts_resources, }; +static void __init spitz_init_spi(void) +{ + int err; + + err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS"); + if (err) + return; + + err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS"); + if (err) + goto err_free_1; + + err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS"); + if (err) + goto err_free_2; + + if (machine_is_akita()) { + spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; + spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; + } + + pxa2xx_set_spi_info(2, &spitz_spi_info); + spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); + return; + +err_free_2: + gpio_free(SPITZ_GPIO_LCDCON_CS); +err_free_1: + gpio_free(SPITZ_GPIO_ADS7846_CS); +} +#else +static inline void spitz_init_spi(void) {} +#endif /* * MMC/SD Device @@ -364,24 +416,35 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo { int err; - /* setup GPIO for PXA27x MMC controller */ - pxa_gpio_mode(GPIO32_MMCCLK_MD); - pxa_gpio_mode(GPIO112_MMCCMD_MD); - pxa_gpio_mode(GPIO92_MMCDAT0_MD); - pxa_gpio_mode(GPIO109_MMCDAT1_MD); - pxa_gpio_mode(GPIO110_MMCDAT2_MD); - pxa_gpio_mode(GPIO111_MMCDAT3_MD); - pxa_gpio_mode(SPITZ_GPIO_nSD_DETECT | GPIO_IN); - pxa_gpio_mode(SPITZ_GPIO_nSD_WP | GPIO_IN); + err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT"); + if (err) + goto err_out; + + err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP"); + if (err) + goto err_free_1; + + gpio_direction_input(SPITZ_GPIO_nSD_DETECT); + gpio_direction_input(SPITZ_GPIO_nSD_WP); spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, - IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) - printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); + if (err) { + pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", + __func__); + goto err_free_2; + } + return 0; +err_free_2: + gpio_free(SPITZ_GPIO_nSD_WP); +err_free_1: + gpio_free(SPITZ_GPIO_nSD_DETECT); +err_out: return err; } @@ -397,12 +460,14 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd) static int spitz_mci_get_ro(struct device *dev) { - return GPLR(SPITZ_GPIO_nSD_WP) & GPIO_bit(SPITZ_GPIO_nSD_WP); + return gpio_get_value(SPITZ_GPIO_nSD_WP); } static void spitz_mci_exit(struct device *dev, void *data) { free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); + gpio_free(SPITZ_GPIO_nSD_WP); + gpio_free(SPITZ_GPIO_nSD_DETECT); } static struct pxamci_platform_data spitz_mci_platform_data = { @@ -419,27 +484,24 @@ static struct pxamci_platform_data spitz_mci_platform_data = { */ static int spitz_ohci_init(struct device *dev) { - /* Only Port 2 is connected */ - pxa_gpio_mode(SPITZ_GPIO_USB_CONNECT | GPIO_IN); - pxa_gpio_mode(SPITZ_GPIO_USB_HOST | GPIO_OUT); - pxa_gpio_mode(SPITZ_GPIO_USB_DEVICE | GPIO_IN); - - /* Setup USB Port 2 Output Control Register */ - UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; - - GPSR(SPITZ_GPIO_USB_HOST) = GPIO_bit(SPITZ_GPIO_USB_HOST); + int err; - UHCHR = (UHCHR) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); + err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST"); + if (err) + return err; - UHCRHDA |= UHCRHDA_NOCP; + /* Only Port 2 is connected + * Setup USB Port 2 Output Control Register + */ + UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; - return 0; + return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); } static struct pxaohci_platform_data spitz_ohci_platform_data = { .port_mode = PMM_NPS_MODE, .init = spitz_ohci_init, + .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION, .power_budget = 150, }; @@ -447,29 +509,50 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = { /* * Irda */ +static int spitz_irda_startup(struct device *dev) +{ + int rc; + + rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on"); + if (rc) + goto err; + + rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1); + if (rc) + goto err_dir; + + return 0; + +err_dir: + gpio_free(SPITZ_GPIO_IR_ON); +err: + return rc; +} + +static void spitz_irda_shutdown(struct device *dev) +{ + gpio_free(SPITZ_GPIO_IR_ON); +} + static void spitz_irda_transceiver_mode(struct device *dev, int mode) { - if (mode & IR_OFF) - set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON); - else - reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON); + gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF); pxa2xx_transceiver_mode(dev, mode); } #ifdef CONFIG_MACH_AKITA static void akita_irda_transceiver_mode(struct device *dev, int mode) { - if (mode & IR_OFF) - akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON); - else - akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON); + gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF); pxa2xx_transceiver_mode(dev, mode); } #endif static struct pxaficp_platform_data spitz_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_OFF, - .transceiver_mode = spitz_irda_transceiver_mode, + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = spitz_irda_transceiver_mode, + .startup = spitz_irda_startup, + .shutdown = spitz_irda_shutdown, }; @@ -477,14 +560,6 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = { * Spitz PXA Framebuffer */ -static void spitz_lcd_power(int on, struct fb_var_screeninfo *var) -{ - if (on) - corgi_lcdtg_hw_init(var->xres); - else - corgi_lcdtg_suspend(); -} - static struct pxafb_mode_info spitz_pxafb_modes[] = { { .pixclock = 19231, @@ -517,18 +592,13 @@ static struct pxafb_mach_info spitz_pxafb_info = { .modes = &spitz_pxafb_modes[0], .num_modes = 2, .fixed_modes = 1, - .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM, - .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH, - .pxafb_lcd_power = spitz_lcd_power, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING, }; static struct platform_device *devices[] __initdata = { &spitzscoop_device, - &spitzssp_device, &spitzkbd_device, - &spitzts_device, - &spitzbl_device, &spitzled_device, }; @@ -548,63 +618,32 @@ static void spitz_restart(char mode) static void __init common_init(void) { - init_gpio_reset(SPITZ_GPIO_ON_RESET); + init_gpio_reset(SPITZ_GPIO_ON_RESET, 1); pm_power_off = spitz_poweroff; arm_pm_restart = spitz_restart; PMCR = 0x00; - /* setup sleep mode values */ - PWER = 0x00000002; - PFER = 0x00000000; - PRER = 0x00000002; - PGSR0 = 0x0158C000; - PGSR1 = 0x00FF0080; - PGSR2 = 0x0001C004; - /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ PCFR |= PCFR_OPDE; - corgi_ssp_set_machinfo(&spitz_ssp_machinfo); + pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config)); - pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN); + spitz_init_spi(); platform_add_devices(devices, ARRAY_SIZE(devices)); pxa_set_mci_info(&spitz_mci_platform_data); pxa_set_ohci_info(&spitz_ohci_platform_data); pxa_set_ficp_info(&spitz_ficp_platform_data); - set_pxa_fb_parent(&spitzssp_device.dev); set_pxa_fb_info(&spitz_pxafb_info); pxa_set_i2c_info(NULL); } #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) -static void spitz_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via SCOOP */ - if (intensity & 0x0020) - reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); - else - set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); - - if (intensity) - set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); - else - reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); -} - static void __init spitz_init(void) { platform_scoop_config = &spitz_pcmcia_config; - spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity; - common_init(); platform_device_register(&spitzscoop2_device); @@ -615,32 +654,17 @@ static void __init spitz_init(void) /* * Akita IO Expander */ -struct platform_device akitaioexp_device = { - .name = "akita-ioexp", - .id = -1, +static struct pca953x_platform_data akita_ioexp = { + .gpio_base = AKITA_IOEXP_GPIO_BASE, }; -EXPORT_SYMBOL_GPL(akitaioexp_device); - -static void akita_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via IO-Expander */ - if (intensity & 0x0020) - akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); - else - akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); - - if (intensity) - akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); - else - akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); -} +static struct i2c_board_info akita_i2c_board_info[] = { + { + .type = "max7310", + .addr = 0x18, + .platform_data = &akita_ioexp, + }, +}; static void __init akita_init(void) { @@ -649,11 +673,10 @@ static void __init akita_init(void) /* We just pretend the second element of the array doesn't exist */ spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; - spitz_bl_machinfo.set_bl_intensity = akita_bl_set_intensity; - platform_device_register(&akitaioexp_device); + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); - spitzscoop_device.dev.parent = &akitaioexp_device.dev; common_init(); } #endif diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 8a40505dfd2..53018db106a 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -21,7 +21,6 @@ #include <asm/irq.h> #include <asm/mach-types.h> #include <mach/hardware.h> -#include <asm/hardware/scoop.h> #include <mach/sharpsl.h> #include <mach/spitz.h> @@ -48,44 +47,35 @@ static void spitz_charger_init(void) static void spitz_measure_temp(int on) { - if (on) - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON); - else - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON); + gpio_set_value(SPITZ_GPIO_ADC_TEMP_ON, on); } static void spitz_charge(int on) { if (on) { if (sharpsl_pm.flags & SHARPSL_SUSPENDED) { - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); + gpio_set_value(SPITZ_GPIO_JK_B, 1); + gpio_set_value(SPITZ_GPIO_CHRG_ON, 0); } else { - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); + gpio_set_value(SPITZ_GPIO_JK_B, 0); + gpio_set_value(SPITZ_GPIO_CHRG_ON, 0); } } else { - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); + gpio_set_value(SPITZ_GPIO_JK_B, 0); + gpio_set_value(SPITZ_GPIO_CHRG_ON, 1); } } static void spitz_discharge(int on) { - if (on) - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A); - else - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A); + gpio_set_value(SPITZ_GPIO_JK_A, on); } /* HACK - For unknown reasons, accurate voltage readings are only made with a load on the power bus which the green led on spitz provides */ static void spitz_discharge1(int on) { - if (on) - set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN); - else - reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN); + gpio_set_value(SPITZ_GPIO_LED_GREEN, on); } static void spitz_presuspend(void) diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 9bd93c5f28b..2c31ec72568 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -28,8 +28,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/platform_device.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> #include <mach/ssp.h> diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index b0d6b32654c..f8a9a62959e 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -155,7 +155,7 @@ static void __init pxa_timer_init(void) OIER = 0; OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; - if (cpu_is_pxa21x() || cpu_is_pxa25x()) + if (cpu_is_pxa25x()) clock_tick_rate = 3686400; else if (machine_is_mainstone()) clock_tick_rate = 3249600; diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 9f3ef9eb32e..a6c4694359c 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -706,16 +706,39 @@ static struct tmio_nand_data tosa_tc6393xb_nand_config = { .badblock_pattern = &tosa_tc6393xb_nand_bbt, }; -static struct tc6393xb_platform_data tosa_tc6393xb_setup = { +static int tosa_tc6393xb_setup(struct platform_device *dev) +{ + int rc; + + rc = gpio_request(TOSA_GPIO_CARD_VCC_ON, "CARD_VCC_ON"); + if (rc) + goto err_req; + + rc = gpio_direction_output(TOSA_GPIO_CARD_VCC_ON, 1); + if (rc) + goto err_dir; + + return rc; + +err_dir: + gpio_free(TOSA_GPIO_CARD_VCC_ON); +err_req: + return rc; +} + +static void tosa_tc6393xb_teardown(struct platform_device *dev) +{ + gpio_free(TOSA_GPIO_CARD_VCC_ON); +} + +static struct tc6393xb_platform_data tosa_tc6393xb_data = { .scr_pll2cr = 0x0cc1, .scr_gper = 0x3300, - .scr_gpo_dsr = - TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON), - .scr_gpo_doecr = - TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON), .irq_base = IRQ_BOARD_START, .gpio_base = TOSA_TC6393XB_GPIO_BASE, + .setup = tosa_tc6393xb_setup, + .teardown = tosa_tc6393xb_teardown, .enable = tosa_tc6393xb_enable, .disable = tosa_tc6393xb_disable, @@ -723,6 +746,8 @@ static struct tc6393xb_platform_data tosa_tc6393xb_setup = { .resume = tosa_tc6393xb_resume, .nand_data = &tosa_tc6393xb_nand_config, + + .resume_restore = 1, }; @@ -730,7 +755,7 @@ static struct platform_device tc6393xb_device = { .name = "tc6393xb", .id = -1, .dev = { - .platform_data = &tosa_tc6393xb_setup, + .platform_data = &tosa_tc6393xb_data, }, .num_resources = ARRAY_SIZE(tc6393xb_resources), .resource = tc6393xb_resources, @@ -781,7 +806,7 @@ static void __init tosa_init(void) gpio_set_wake(MFP_PIN_GPIO1, 1); /* We can't pass to gpio-keys since it will drop the Reset altfunc */ - init_gpio_reset(TOSA_GPIO_ON_RESET); + init_gpio_reset(TOSA_GPIO_ON_RESET, 0); pm_power_off = tosa_poweroff; arm_pm_restart = tosa_restart; diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 3ed757e6bcc..a13dbf3c2c0 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -22,8 +22,8 @@ #include <linux/fb.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/serial_8250.h> -#include <linux/mtd/mtd.h> +#include <linux/gpio.h> +#include <linux/dm9000.h> #include <linux/mtd/physmap.h> #include <linux/mtd/partitions.h> @@ -31,7 +31,6 @@ #include <asm/setup.h> #include <asm/memory.h> #include <asm/mach-types.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/sizes.h> @@ -40,41 +39,148 @@ #include <asm/mach/irq.h> #include <asm/mach/flash.h> +#include <mach/hardware.h> #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> -#include <mach/pxa2xx-gpio.h> +#include <mach/mfp-pxa27x.h> +#include <mach/pxa2xx_spi.h> #include <mach/trizeps4.h> #include <mach/audio.h> #include <mach/pxafb.h> #include <mach/mmc.h> #include <mach/irda.h> #include <mach/ohci.h> +#include <mach/i2c.h> #include "generic.h" #include "devices.h" -/******************************************************************************************** +/* comment out the following line if you want to use the + * Standard UART from PXA for serial / irda transmission + * and acivate it if you have status leds connected */ +#define STATUS_LEDS_ON_STUART_PINS 1 + +/***************************************************************************** + * MultiFunctionPins of CPU + *****************************************************************************/ +static unsigned long trizeps4_pin_config[] __initdata = { + /* Chip Selects */ + GPIO15_nCS_1, /* DiskOnChip CS */ + GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */ + GPIO94_GPIO, /* DOC lock */ + + GPIO78_nCS_2, /* DM9000 CS */ + GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */ + + GPIO79_nCS_3, /* Logic CS */ + GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ + + /* LCD - 16bpp Active TFT */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + + /* UART */ + GPIO9_FFUART_CTS, + GPIO10_FFUART_DCD, + GPIO16_FFUART_TXD, + GPIO33_FFUART_DSR, + GPIO38_FFUART_RI, + GPIO82_FFUART_DTR, + GPIO83_FFUART_RTS, + GPIO96_FFUART_RXD, + + GPIO42_BTUART_RXD, + GPIO43_BTUART_TXD, + GPIO44_BTUART_CTS, + GPIO45_BTUART_RTS, +#ifdef STATUS_LEDS_ON_STUART_PINS + GPIO46_GPIO, + GPIO47_GPIO, +#else + GPIO46_STUART_RXD, + GPIO47_STUART_TXD, +#endif + /* PCMCIA */ + GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */ + GPIO13_GPIO, /* TRIZEPS4_READY_NINT */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO54_nPCE_2, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + GPIO102_nPCE_1, + GPIO104_PSKTSEL, + + /* MultiMediaCard */ + GPIO32_MMC_CLK, + GPIO92_MMC_DAT_0, + GPIO109_MMC_DAT_1, + GPIO110_MMC_DAT_2, + GPIO111_MMC_DAT_3, + GPIO112_MMC_CMD, + GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */ + + /* USB OHCI */ + GPIO88_USBH1_PWR, /* USBHPWR1 */ + GPIO89_USBH1_PEN, /* USBHPEN1 */ + + /* I2C */ + GPIO117_I2C_SCL, + GPIO118_I2C_SDA, +}; + +static unsigned long trizeps4wl_pin_config[] __initdata = { + /* SSP 2 */ + GPIO14_SSP2_SFRM, + GPIO19_SSP2_SCLK, + GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */ + GPIO86_SSP2_RXD, + GPIO87_SSP2_TXD, +}; + +/**************************************************************************** * ONBOARD FLASH - ********************************************************************************************/ + ****************************************************************************/ static struct mtd_partition trizeps4_partitions[] = { { .name = "Bootloader", .offset = 0x00000000, .size = 0x00040000, .mask_flags = MTD_WRITEABLE /* force read-only */ - },{ + }, { .name = "Backup", .offset = 0x00040000, .size = 0x00040000, - },{ + }, { .name = "Image", .offset = 0x00080000, .size = 0x01080000, - },{ + }, { .name = "IPSM", .offset = 0x01100000, .size = 0x00e00000, - },{ + }, { .name = "Registry", .offset = 0x01f00000, .size = MTDPART_SIZ_FULL, @@ -105,9 +211,9 @@ static struct platform_device flash_device = { .num_resources = 1, }; -/******************************************************************************************** +/**************************************************************************** * DAVICOM DM9000 Ethernet - ********************************************************************************************/ + ****************************************************************************/ static struct resource dm9000_resources[] = { [0] = { .start = TRIZEPS4_ETH_PHYS+0x300, @@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = { [2] = { .start = TRIZEPS4_ETH_IRQ, .end = TRIZEPS4_ETH_IRQ, - .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; +static struct dm9000_plat_data tri_dm9000_platdata = { + .flags = DM9000_PLATF_32BITONLY, +}; + static struct platform_device dm9000_device = { .name = "dm9000", .id = -1, .num_resources = ARRAY_SIZE(dm9000_resources), .resource = dm9000_resources, + .dev = { + .platform_data = &tri_dm9000_platdata, + } }; -/******************************************************************************************** - * PXA270 serial ports - ********************************************************************************************/ -static struct plat_serial8250_port tri_serial_ports[] = { -#ifdef CONFIG_SERIAL_PXA - /* this uses the own PXA driver */ +/**************************************************************************** + * LED's on GPIO pins of PXA + ****************************************************************************/ +static struct gpio_led trizeps4_led[] = { +#ifdef STATUS_LEDS_ON_STUART_PINS { - 0, - }, -#else - /* this uses the generic 8520 driver */ - [0] = { - .membase = (void *)&FFUART, - .irq = IRQ_FFUART, - .flags = UPF_BOOT_AUTOCONF, - .iotype = UPIO_MEM32, - .regshift = 2, - .uartclk = (921600*16), - }, - [1] = { - .membase = (void *)&BTUART, - .irq = IRQ_BTUART, - .flags = UPF_BOOT_AUTOCONF, - .iotype = UPIO_MEM32, - .regshift = 2, - .uartclk = (921600*16), + .name = "led0:orange:heartbeat", /* */ + .default_trigger = "heartbeat", + .gpio = GPIO_HEARTBEAT_LED, + .active_low = 1, }, { - 0, + .name = "led1:yellow:cpubusy", /* */ + .default_trigger = "cpu-busy", + .gpio = GPIO_SYS_BUSY_LED, + .active_low = 1, }, #endif }; -static struct platform_device uart_devices = { - .name = "serial8250", - .id = 0, +static struct gpio_led_platform_data trizeps4_led_data = { + .leds = trizeps4_led, + .num_leds = ARRAY_SIZE(trizeps4_led), +}; + +static struct platform_device leds_devices = { + .name = "leds-gpio", + .id = -1, .dev = { - .platform_data = tri_serial_ports, + .platform_data = &trizeps4_led_data, }, - .num_resources = 0, - .resource = NULL, }; -static struct platform_device * trizeps4_devices[] __initdata = { +static struct platform_device *trizeps4_devices[] __initdata = { &flash_device, - &uart_devices, &dm9000_device, + &leds_devices, +}; + +static struct platform_device *trizeps4wl_devices[] __initdata = { + &flash_device, + &leds_devices, }; -#ifdef CONFIG_MACH_TRIZEPS4_CONXS static short trizeps_conxs_bcr; /* PCCARD power switching supports only 3,3V */ @@ -192,108 +299,63 @@ void board_pcmcia_power(int power) /* switch power on, put in reset and enable buffers */ trizeps_conxs_bcr |= power; trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); - ConXS_BCR = trizeps_conxs_bcr; + trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN; + BCR_writew(trizeps_conxs_bcr); /* wait a little */ udelay(2000); /* take reset away */ - trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); - ConXS_BCR = trizeps_conxs_bcr; + trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET; + BCR_writew(trizeps_conxs_bcr); udelay(2000); } else { /* put in reset */ trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - ConXS_BCR = trizeps_conxs_bcr; + BCR_writew(trizeps_conxs_bcr); udelay(1000); /* switch power off */ - trizeps_conxs_bcr &= ~(0xf); - ConXS_BCR = trizeps_conxs_bcr; - + trizeps_conxs_bcr &= ~0xf; + BCR_writew(trizeps_conxs_bcr); } - pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); + pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff", + trizeps_conxs_bcr); } +EXPORT_SYMBOL(board_pcmcia_power); /* backlight power switching for LCD panel */ static void board_backlight_power(int on) { - if (on) { + if (on) trizeps_conxs_bcr |= ConXS_BCR_L_DISP; - } else { + else trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; - } - pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr); - ConXS_BCR = trizeps_conxs_bcr; -} -/* Powersupply for MMC/SD cardslot */ -static void board_mci_power(struct device *dev, unsigned int vdd) -{ - struct pxamci_platform_data* p_d = dev->platform_data; - - if (( 1 << vdd) & p_d->ocr_mask) { - pr_debug("%s: on\n", __func__); - /* FIXME fill in values here */ - } else { - pr_debug("%s: off\n", __func__); - /* FIXME fill in values here */ - } -} - -static short trizeps_conxs_ircr; - -/* Switch modes and Power for IRDA receiver */ -static void board_irda_mode(struct device *dev, int mode) -{ - unsigned long flags; - - local_irq_save(flags); - if (mode & IR_SIRMODE) { - /* Slow mode */ - trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; - } else if (mode & IR_FIRMODE) { - /* Fast mode */ - trizeps_conxs_ircr |= ConXS_IRCR_MODE; - } - pxa2xx_transceiver_mode(dev, mode); - if (mode & IR_OFF) { - trizeps_conxs_ircr |= ConXS_IRCR_SD; - } else { - trizeps_conxs_ircr &= ~ConXS_IRCR_SD; - } - /* FIXME write values to register */ - local_irq_restore(flags); + pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", + trizeps_conxs_bcr); + BCR_writew(trizeps_conxs_bcr); } -#else -/* for other baseboards define dummies */ -void board_pcmcia_power(int power) {;} -#define board_backlight_power NULL -#define board_mci_power NULL -#define board_irda_mode NULL - -#endif /* CONFIG_MACH_TRIZEPS4_CONXS */ -EXPORT_SYMBOL(board_pcmcia_power); +/* a I2C based RTC is known on CONXS board */ +static struct i2c_board_info trizeps4_i2c_devices[] __initdata = { + { I2C_BOARD_INFO("rtc-pcf8593", 0x51) } +}; -static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data) +/**************************************************************************** + * MMC card slot external to module + ****************************************************************************/ +static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, + void *data) { int err; - /* setup GPIO for PXA27x MMC controller */ - pxa_gpio_mode(GPIO32_MMCCLK_MD); - pxa_gpio_mode(GPIO112_MMCCMD_MD); - pxa_gpio_mode(GPIO92_MMCDAT0_MD); - pxa_gpio_mode(GPIO109_MMCDAT1_MD); - pxa_gpio_mode(GPIO110_MMCDAT2_MD); - pxa_gpio_mode(GPIO111_MMCDAT3_MD); - - pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, - IRQF_DISABLED | IRQF_TRIGGER_RISING, - "MMC card detect", data); - if (err) - printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - - return err; + IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM, + "MMC card detect", data); + if (err) { + printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request" + "MMC card detect IRQ\n"); + return -1; + } + return 0; } static void trizeps4_mci_exit(struct device *dev, void *data) @@ -303,39 +365,69 @@ static void trizeps4_mci_exit(struct device *dev, void *data) static struct pxamci_platform_data trizeps4_mci_platform_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .detect_delay = 1, .init = trizeps4_mci_init, .exit = trizeps4_mci_exit, - .setpower = board_mci_power, + .get_ro = NULL, /* write-protection not supported */ + .setpower = NULL, /* power-switching not supported */ }; -static struct pxaficp_platform_data trizeps4_ficp_platform_data = { - .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, - .transceiver_mode = board_irda_mode, -}; +/**************************************************************************** + * IRDA mode switching on stuart + ****************************************************************************/ +#ifndef STATUS_LEDS_ON_STUART_PINS +static short trizeps_conxs_ircr; -static int trizeps4_ohci_init(struct device *dev) +static int trizeps4_irda_startup(struct device *dev) { - /* setup Port1 GPIO pin. */ - pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ - pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ - - /* Set the Power Control Polarity Low and Power Sense - Polarity Low to active low. */ - UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); - + trizeps_conxs_ircr &= ~ConXS_IRCR_SD; + IRCR_writew(trizeps_conxs_ircr); return 0; } -static void trizeps4_ohci_exit(struct device *dev) +static void trizeps4_irda_shutdown(struct device *dev) +{ + trizeps_conxs_ircr |= ConXS_IRCR_SD; + IRCR_writew(trizeps_conxs_ircr); +} + +static void trizeps4_irda_transceiver_mode(struct device *dev, int mode) { - ; + unsigned long flags; + + local_irq_save(flags); + /* Switch mode */ + if (mode & IR_SIRMODE) + trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */ + else if (mode & IR_FIRMODE) { + trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */ + + /* Switch power */ + if (mode & IR_OFF) + trizeps_conxs_ircr |= ConXS_IRCR_SD; + else + trizeps_conxs_ircr &= ~ConXS_IRCR_SD; + + IRCR_writew(trizeps_conxs_ircr); + local_irq_restore(flags); + + pxa2xx_transceiver_mode(dev, mode); } +static struct pxaficp_platform_data trizeps4_ficp_platform_data = { + .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, + .transceiver_mode = trizeps4_irda_transceiver_mode, + .startup = trizeps4_irda_startup, + .shutdown = trizeps4_irda_shutdown, +}; +#endif + +/**************************************************************************** + * OHCI USB port + ****************************************************************************/ static struct pxaohci_platform_data trizeps4_ohci_platform_data = { .port_mode = PMM_PERPORT_MODE, - .init = trizeps4_ohci_init, - .exit = trizeps4_ohci_exit, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, }; static struct map_desc trizeps4_io_desc[] __initdata = { @@ -372,105 +464,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = { }; static struct pxafb_mode_info sharp_lcd_mode = { - .pixclock = 78000, - .xres = 640, - .yres = 480, - .bpp = 8, - .hsync_len = 4, - .left_margin = 4, - .right_margin = 4, - .vsync_len = 2, - .upper_margin = 0, - .lower_margin = 0, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .cmap_greyscale = 0, + .pixclock = 78000, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 4, + .left_margin = 4, + .right_margin = 4, + .vsync_len = 2, + .upper_margin = 0, + .lower_margin = 0, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .cmap_greyscale = 0, }; static struct pxafb_mach_info sharp_lcd = { - .modes = &sharp_lcd_mode, - .num_modes = 1, - .cmap_inverse = 0, - .cmap_static = 0, - .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, - .lccr3 = 0x0340ff02, - .pxafb_backlight_power = board_backlight_power, + .modes = &sharp_lcd_mode, + .num_modes = 1, + .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL, + .cmap_inverse = 0, + .cmap_static = 0, + .pxafb_backlight_power = board_backlight_power, }; static struct pxafb_mode_info toshiba_lcd_mode = { - .pixclock = 39720, - .xres = 640, - .yres = 480, - .bpp = 8, - .hsync_len = 63, - .left_margin = 12, - .right_margin = 12, - .vsync_len = 4, - .upper_margin = 32, - .lower_margin = 10, - .sync = 0, - .cmap_greyscale = 0, + .pixclock = 39720, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 63, + .left_margin = 12, + .right_margin = 12, + .vsync_len = 4, + .upper_margin = 32, + .lower_margin = 10, + .sync = 0, + .cmap_greyscale = 0, }; static struct pxafb_mach_info toshiba_lcd = { - .modes = &toshiba_lcd_mode, - .num_modes = 1, - .cmap_inverse = 0, - .cmap_static = 0, - .lccr0 = LCCR0_Color | LCCR0_Act, - .lccr3 = 0x03400002, - .pxafb_backlight_power = board_backlight_power, + .modes = &toshiba_lcd_mode, + .num_modes = 1, + .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL), + .cmap_inverse = 0, + .cmap_static = 0, + .pxafb_backlight_power = board_backlight_power, }; static void __init trizeps4_init(void) { - platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); + pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config)); + if (machine_is_trizeps4wl()) { + pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config)); + platform_add_devices(trizeps4wl_devices, + ARRAY_SIZE(trizeps4wl_devices)); + } else { + platform_add_devices(trizeps4_devices, + ARRAY_SIZE(trizeps4_devices)); + } -/* set_pxa_fb_info(&sharp_lcd); */ - set_pxa_fb_info(&toshiba_lcd); + if (0) /* dont know how to determine LCD */ + set_pxa_fb_info(&sharp_lcd); + else + set_pxa_fb_info(&toshiba_lcd); pxa_set_mci_info(&trizeps4_mci_platform_data); +#ifndef STATUS_LEDS_ON_STUART_PINS pxa_set_ficp_info(&trizeps4_ficp_platform_data); +#endif pxa_set_ohci_info(&trizeps4_ohci_platform_data); pxa_set_ac97_info(NULL); -} - -static void __init trizeps4_map_io(void) -{ - pxa_map_io(); - iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); - - /* for DiskOnChip */ - pxa_gpio_mode(GPIO15_nCS_1_MD); - - /* for off-module PIC on ConXS board */ - pxa_gpio_mode(GPIO_PIC | GPIO_IN); - - /* UCB1400 irq */ - pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN); - - /* for DM9000 LAN */ - pxa_gpio_mode(GPIO78_nCS_2_MD); - pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); - - /* for PCMCIA device */ - pxa_gpio_mode(GPIO_PCD | GPIO_IN); - pxa_gpio_mode(GPIO_PRDY | GPIO_IN); - - /* for I2C adapter */ - pxa_gpio_mode(GPIO117_I2CSCL_MD); - pxa_gpio_mode(GPIO118_I2CSDA_MD); + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, trizeps4_i2c_devices, + ARRAY_SIZE(trizeps4_i2c_devices)); - /* MMC_DET s.o. */ - pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN); - - /* whats that for ??? */ - pxa_gpio_mode(GPIO79_nCS_3_MD); - -#ifdef CONFIG_LEDS - pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ - pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ -#endif -#ifdef CONFIG_MACH_TRIZEPS4_CONXS #ifdef CONFIG_IDE_PXA_CF /* if boot direct from compact flash dont disable power */ trizeps_conxs_bcr = 0x0009; @@ -478,18 +545,24 @@ static void __init trizeps4_map_io(void) /* this is the reset value */ trizeps_conxs_bcr = 0x00A0; #endif - ConXS_BCR = trizeps_conxs_bcr; -#endif + BCR_writew(trizeps_conxs_bcr); + board_backlight_power(1); +} + +static void __init trizeps4_map_io(void) +{ + pxa_map_io(); + iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); -#warning FIXME - accessing PM registers directly is deprecated - PWER = 0x00000002; - PFER = 0x00000000; - PRER = 0x00000002; - PGSR0 = 0x0158C000; - PGSR1 = 0x00FF0080; - PGSR2 = 0x0001C004; - /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ - PCFR |= PCFR_OPDE; + if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) { + /* if flash is 16 bit wide its a Trizeps4 WL */ + __machine_arch_type = MACH_TYPE_TRIZEPS4WL; + trizeps4_flash_data[0].width = 2; + } else { + /* if flash is 32 bit wide its a Trizeps4 */ + __machine_arch_type = MACH_TYPE_TRIZEPS4; + trizeps4_flash_data[0].width = 4; + } } MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") @@ -503,3 +576,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") .timer = &pxa_timer, MACHINE_END +MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") + /* MAINTAINER("Jürgen Schindele") */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, + .init_machine = trizeps4_init, + .map_io = trizeps4_map_io, + .init_irq = pxa27x_init_irq, + .timer = &pxa_timer, +MACHINE_END diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c new file mode 100644 index 00000000000..4b3120dbc04 --- /dev/null +++ b/arch/arm/mach-pxa/viper.c @@ -0,0 +1,983 @@ +/* + * linux/arch/arm/mach-pxa/viper.c + * + * Support for the Arcom VIPER SBC. + * + * Author: Ian Campbell + * Created: Feb 03, 2003 + * Copyright: Arcom Control Systems + * + * Maintained by Marc Zyngier <maz@misterjones.org> + * <marc.zyngier@altran.com> + * + * Based on lubbock.c: + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/types.h> +#include <linux/memory.h> +#include <linux/cpu.h> +#include <linux/cpufreq.h> +#include <linux/delay.h> +#include <linux/fs.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/major.h> +#include <linux/module.h> +#include <linux/pm.h> +#include <linux/sched.h> +#include <linux/gpio.h> +#include <linux/i2c-gpio.h> +#include <linux/serial_8250.h> +#include <linux/smc91x.h> +#include <linux/pwm_backlight.h> +#include <linux/usb/isp116x.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> + +#include <mach/pxa-regs.h> +#include <mach/pxa2xx-regs.h> +#include <mach/bitfield.h> +#include <mach/audio.h> +#include <mach/pxafb.h> +#include <mach/mfp-pxa25x.h> +#include <mach/i2c.h> +#include <mach/viper.h> + +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> +#include <asm/sizes.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include "generic.h" +#include "devices.h" + +static unsigned int icr; + +static void viper_icr_set_bit(unsigned int bit) +{ + icr |= bit; + VIPER_ICR = icr; +} + +static void viper_icr_clear_bit(unsigned int bit) +{ + icr &= ~bit; + VIPER_ICR = icr; +} + +/* This function is used from the pcmcia module to reset the CF */ +void viper_cf_rst(int state) +{ + if (state) + viper_icr_set_bit(VIPER_ICR_CF_RST); + else + viper_icr_clear_bit(VIPER_ICR_CF_RST); +} +EXPORT_SYMBOL(viper_cf_rst); + +/* + * The CPLD version register was not present on VIPER boards prior to + * v2i1. On v1 boards where the version register is not present we + * will just read back the previous value from the databus. + * + * Therefore we do two reads. The first time we write 0 to the + * (read-only) register before reading and the second time we write + * 0xff first. If the two reads do not match or they read back as 0xff + * or 0x00 then we have version 1 hardware. + */ +static u8 viper_hw_version(void) +{ + u8 v1, v2; + unsigned long flags; + + local_irq_save(flags); + + VIPER_VERSION = 0; + v1 = VIPER_VERSION; + VIPER_VERSION = 0xff; + v2 = VIPER_VERSION; + + v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; + + local_irq_restore(flags); + return v1; +} + +/* CPU sysdev */ +static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state) +{ + viper_icr_set_bit(VIPER_ICR_R_DIS); + return 0; +} + +static int viper_cpu_resume(struct sys_device *sysdev) +{ + viper_icr_clear_bit(VIPER_ICR_R_DIS); + return 0; +} + +static struct sysdev_driver viper_cpu_sysdev_driver = { + .suspend = viper_cpu_suspend, + .resume = viper_cpu_resume, +}; + +static unsigned int current_voltage_divisor; + +/* + * If force is not true then step from existing to new divisor. If + * force is true then jump straight to the new divisor. Stepping is + * used because if the jump in voltage is too large, the VCC can dip + * too low and the regulator cuts out. + * + * force can be used to initialize the divisor to a know state by + * setting the value for the current clock speed, since we are already + * running at that speed we know the voltage should be pretty close so + * the jump won't be too large + */ +static void viper_set_core_cpu_voltage(unsigned long khz, int force) +{ + int i = 0; + unsigned int divisor = 0; + const char *v; + + if (khz < 200000) { + v = "1.0"; divisor = 0xfff; + } else if (khz < 300000) { + v = "1.1"; divisor = 0xde5; + } else { + v = "1.3"; divisor = 0x325; + } + + pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", + v, (int)khz / 1000, (int)khz % 1000); + +#define STEP 0x100 + do { + int step; + + if (force) + step = divisor; + else if (current_voltage_divisor < divisor - STEP) + step = current_voltage_divisor + STEP; + else if (current_voltage_divisor > divisor + STEP) + step = current_voltage_divisor - STEP; + else + step = divisor; + force = 0; + + gpio_set_value(VIPER_PSU_CLK_GPIO, 0); + gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); + + for (i = 1 << 11 ; i > 0 ; i >>= 1) { + udelay(1); + + gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); + udelay(1); + + gpio_set_value(VIPER_PSU_CLK_GPIO, 1); + udelay(1); + + gpio_set_value(VIPER_PSU_CLK_GPIO, 0); + } + udelay(1); + + gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); + udelay(1); + + gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); + + current_voltage_divisor = step; + } while (current_voltage_divisor != divisor); +} + +/* Interrupt handling */ +static unsigned long viper_irq_enabled_mask; +static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; +static const int viper_isa_irq_map[] = { + 0, /* ISA irq #0, invalid */ + 0, /* ISA irq #1, invalid */ + 0, /* ISA irq #2, invalid */ + 1 << 0, /* ISA irq #3 */ + 1 << 1, /* ISA irq #4 */ + 1 << 2, /* ISA irq #5 */ + 1 << 3, /* ISA irq #6 */ + 1 << 4, /* ISA irq #7 */ + 0, /* ISA irq #8, invalid */ + 1 << 8, /* ISA irq #9 */ + 1 << 5, /* ISA irq #10 */ + 1 << 6, /* ISA irq #11 */ + 1 << 7, /* ISA irq #12 */ + 0, /* ISA irq #13, invalid */ + 1 << 9, /* ISA irq #14 */ + 1 << 10, /* ISA irq #15 */ +}; + +static inline int viper_irq_to_bitmask(unsigned int irq) +{ + return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; +} + +static inline int viper_bit_to_irq(int bit) +{ + return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); +} + +static void viper_ack_irq(unsigned int irq) +{ + int viper_irq = viper_irq_to_bitmask(irq); + + if (viper_irq & 0xff) + VIPER_LO_IRQ_STATUS = viper_irq; + else + VIPER_HI_IRQ_STATUS = (viper_irq >> 8); +} + +static void viper_mask_irq(unsigned int irq) +{ + viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); +} + +static void viper_unmask_irq(unsigned int irq) +{ + viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); +} + +static inline unsigned long viper_irq_pending(void) +{ + return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & + viper_irq_enabled_mask; +} + +static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + unsigned long pending; + + pending = viper_irq_pending(); + do { + /* we're in a chained irq handler, + * so ack the interrupt by hand */ + GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO); + + if (likely(pending)) { + irq = viper_bit_to_irq(__ffs(pending)); + generic_handle_irq(irq); + } + pending = viper_irq_pending(); + } while (pending); +} + +static struct irq_chip viper_irq_chip = { + .name = "ISA", + .ack = viper_ack_irq, + .mask = viper_mask_irq, + .unmask = viper_unmask_irq +}; + +static void __init viper_init_irq(void) +{ + int level; + int isa_irq; + + pxa25x_init_irq(); + + /* setup ISA IRQs */ + for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { + isa_irq = viper_bit_to_irq(level); + set_irq_chip(isa_irq, &viper_irq_chip); + set_irq_handler(isa_irq, handle_edge_irq); + set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); + } + + set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), + viper_irq_handler); + set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); + +#ifndef CONFIG_SERIAL_PXA + /* + * 8250 doesn't support IRQ_TYPE being passed as part + * of the plat_serial8250_port structure... + */ + set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING); +#endif +} + +/* Flat Panel */ +static struct pxafb_mode_info fb_mode_info[] = { + { + .pixclock = 157500, + + .xres = 320, + .yres = 240, + + .bpp = 16, + + .hsync_len = 63, + .left_margin = 7, + .right_margin = 13, + + .vsync_len = 20, + .upper_margin = 0, + .lower_margin = 0, + + .sync = 0, + }, +}; + +static struct pxafb_mach_info fb_info = { + .modes = fb_mode_info, + .num_modes = 1, + .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, +}; + +static int viper_backlight_init(struct device *dev) +{ + int ret; + + /* GPIO9 and 10 control FB backlight. Initialise to off */ + ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); + if (ret) + goto err_request_bckl; + + ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); + if (ret) + goto err_request_lcd; + + ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); + if (ret) + goto err_dir; + + ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); + if (ret) + goto err_dir; + + return 0; + +err_dir: + gpio_free(VIPER_LCD_EN_GPIO); +err_request_lcd: + gpio_free(VIPER_BCKLIGHT_EN_GPIO); +err_request_bckl: + dev_err(dev, "Failed to setup LCD GPIOs\n"); + + return ret; +} + +static int viper_backlight_notify(int brightness) +{ + gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); + gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); + + return brightness; +} + +static void viper_backlight_exit(struct device *dev) +{ + gpio_free(VIPER_LCD_EN_GPIO); + gpio_free(VIPER_BCKLIGHT_EN_GPIO); +} + +static struct platform_pwm_backlight_data viper_backlight_data = { + .pwm_id = 0, + .max_brightness = 100, + .dft_brightness = 100, + .pwm_period_ns = 1000000, + .init = viper_backlight_init, + .notify = viper_backlight_notify, + .exit = viper_backlight_exit, +}; + +static struct platform_device viper_backlight_device = { + .name = "pwm-backlight", + .dev = { + .parent = &pxa25x_device_pwm0.dev, + .platform_data = &viper_backlight_data, + }, +}; + +/* Ethernet */ +static struct resource smc91x_resources[] = { + [0] = { + .name = "smc91x-regs", + .start = VIPER_ETH_PHYS + 0x300, + .end = VIPER_ETH_PHYS + 0x30f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gpio_to_irq(VIPER_ETH_GPIO), + .end = gpio_to_irq(VIPER_ETH_GPIO), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + }, + [2] = { + .name = "smc91x-data32", + .start = VIPER_ETH_DATA_PHYS, + .end = VIPER_ETH_DATA_PHYS + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct smc91x_platdata viper_smc91x_info = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, + .leda = RPC_LED_100_10, + .ledb = RPC_LED_TX_RX, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = -1, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, + .dev = { + .platform_data = &viper_smc91x_info, + }, +}; + +/* i2c */ +static struct i2c_gpio_platform_data i2c_bus_data = { + .sda_pin = VIPER_RTC_I2C_SDA_GPIO, + .scl_pin = VIPER_RTC_I2C_SCL_GPIO, + .udelay = 10, + .timeout = 100, +}; + +static struct platform_device i2c_bus_device = { + .name = "i2c-gpio", + .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ + .dev = { + .platform_data = &i2c_bus_data, + } +}; + +static struct i2c_board_info __initdata viper_i2c_devices[] = { + { + I2C_BOARD_INFO("ds1338", 0x68), + }, +}; + +/* + * Serial configuration: + * You can either have the standard PXA ports driven by the PXA driver, + * or all the ports (PXA + 16850) driven by the 8250 driver. + * Choose your poison. + */ + +static struct resource viper_serial_resources[] = { +#ifndef CONFIG_SERIAL_PXA + { + .start = 0x40100000, + .end = 0x4010001f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x40200000, + .end = 0x4020001f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x40700000, + .end = 0x4070001f, + .flags = IORESOURCE_MEM, + }, + { + .start = VIPER_UARTA_PHYS, + .end = VIPER_UARTA_PHYS + 0xf, + .flags = IORESOURCE_MEM, + }, + { + .start = VIPER_UARTB_PHYS, + .end = VIPER_UARTB_PHYS + 0xf, + .flags = IORESOURCE_MEM, + }, +#else + { + 0, + }, +#endif +}; + +static struct plat_serial8250_port serial_platform_data[] = { +#ifndef CONFIG_SERIAL_PXA + /* Internal UARTs */ + { + .membase = (void *)&FFUART, + .mapbase = __PREG(FFUART), + .irq = IRQ_FFUART, + .uartclk = 921600 * 16, + .regshift = 2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + }, + { + .membase = (void *)&BTUART, + .mapbase = __PREG(BTUART), + .irq = IRQ_BTUART, + .uartclk = 921600 * 16, + .regshift = 2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + }, + { + .membase = (void *)&STUART, + .mapbase = __PREG(STUART), + .irq = IRQ_STUART, + .uartclk = 921600 * 16, + .regshift = 2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + }, + /* External UARTs */ + { + .mapbase = VIPER_UARTA_PHYS, + .irq = gpio_to_irq(VIPER_UARTA_GPIO), + .uartclk = 1843200, + .regshift = 1, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | + UPF_SKIP_TEST, + }, + { + .mapbase = VIPER_UARTB_PHYS, + .irq = gpio_to_irq(VIPER_UARTB_GPIO), + .uartclk = 1843200, + .regshift = 1, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | + UPF_SKIP_TEST, + }, +#endif + { }, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = 0, + .dev = { + .platform_data = serial_platform_data, + }, + .num_resources = ARRAY_SIZE(viper_serial_resources), + .resource = viper_serial_resources, +}; + +/* USB */ +static void isp116x_delay(struct device *dev, int delay) +{ + ndelay(delay); +} + +static struct resource isp116x_resources[] = { + [0] = { /* DATA */ + .start = VIPER_USB_PHYS + 0, + .end = VIPER_USB_PHYS + 1, + .flags = IORESOURCE_MEM, + }, + [1] = { /* ADDR */ + .start = VIPER_USB_PHYS + 2, + .end = VIPER_USB_PHYS + 3, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = gpio_to_irq(VIPER_USB_GPIO), + .end = gpio_to_irq(VIPER_USB_GPIO), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + }, +}; + +/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ +static struct isp116x_platform_data isp116x_platform_data = { + /* Enable internal resistors on downstream ports */ + .sel15Kres = 1, + /* On-chip overcurrent protection */ + .oc_enable = 1, + /* INT output polarity */ + .int_act_high = 1, + /* INT edge or level triggered */ + .int_edge_triggered = 0, + + /* WAKEUP pin connected - NOT SUPPORTED */ + /* .remote_wakeup_connected = 0, */ + /* Wakeup by devices on usb bus enabled */ + .remote_wakeup_enable = 0, + .delay = isp116x_delay, +}; + +static struct platform_device isp116x_device = { + .name = "isp116x-hcd", + .id = -1, + .num_resources = ARRAY_SIZE(isp116x_resources), + .resource = isp116x_resources, + .dev = { + .platform_data = &isp116x_platform_data, + }, + +}; + +/* MTD */ +static struct resource mtd_resources[] = { + [0] = { /* RedBoot config + filesystem flash */ + .start = VIPER_FLASH_PHYS, + .end = VIPER_FLASH_PHYS + SZ_32M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { /* Boot flash */ + .start = VIPER_BOOT_PHYS, + .end = VIPER_BOOT_PHYS + SZ_1M - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { /* + * SRAM size is actually 256KB, 8bits, with a sparse mapping + * (each byte is on a 16bit boundary). + */ + .start = _VIPER_SRAM_BASE, + .end = _VIPER_SRAM_BASE + SZ_512K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mtd_partition viper_boot_flash_partition = { + .name = "RedBoot", + .size = SZ_1M, + .offset = 0, + .mask_flags = MTD_WRITEABLE, /* force R/O */ +}; + +static struct physmap_flash_data viper_flash_data[] = { + [0] = { + .width = 2, + .parts = NULL, + .nr_parts = 0, + }, + [1] = { + .width = 2, + .parts = &viper_boot_flash_partition, + .nr_parts = 1, + }, +}; + +static struct platform_device viper_mtd_devices[] = { + [0] = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &viper_flash_data[0], + }, + .resource = &mtd_resources[0], + .num_resources = 1, + }, + [1] = { + .name = "physmap-flash", + .id = 1, + .dev = { + .platform_data = &viper_flash_data[1], + }, + .resource = &mtd_resources[1], + .num_resources = 1, + }, +}; + +static struct platform_device *viper_devs[] __initdata = { + &smc91x_device, + &i2c_bus_device, + &serial_device, + &isp116x_device, + &viper_mtd_devices[0], + &viper_mtd_devices[1], + &viper_backlight_device, +}; + +static mfp_cfg_t viper_pin_config[] __initdata = { + /* Chip selects */ + GPIO15_nCS_1, + GPIO78_nCS_2, + GPIO79_nCS_3, + GPIO80_nCS_4, + GPIO33_nCS_5, + + /* FP Backlight */ + GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ + GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ + GPIO16_PWM0_OUT, + + /* Ethernet PHY Ready */ + GPIO18_RDY, + + /* Serial shutdown */ + GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ + + /* Compact-Flash / PC104 */ + GPIO48_nPOE, + GPIO49_nPWE, + GPIO50_nPIOR, + GPIO51_nPIOW, + GPIO52_nPCE_1, + GPIO53_nPCE_2, + GPIO54_nPSKTSEL, + GPIO55_nPREG, + GPIO56_nPWAIT, + GPIO57_nIOIS16, + GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ + GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ + GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ + + /* Integrated UPS control */ + GPIO20_GPIO, /* VIPER_UPS_GPIO */ + + /* Vcc regulator control */ + GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ + GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ + GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ + + /* i2c busses */ + GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ + GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ + GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ + GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ + + /* PC/104 Interrupt */ + GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ +}; + +static unsigned long viper_tpm; + +static int __init viper_tpm_setup(char *str) +{ + strict_strtoul(str, 10, &viper_tpm); + return 1; +} + +__setup("tpm=", viper_tpm_setup); + +static void __init viper_tpm_init(void) +{ + struct platform_device *tpm_device; + struct i2c_gpio_platform_data i2c_tpm_data = { + .sda_pin = VIPER_TPM_I2C_SDA_GPIO, + .scl_pin = VIPER_TPM_I2C_SCL_GPIO, + .udelay = 10, + .timeout = 100, + }; + char *errstr; + + /* Allocate TPM i2c bus if requested */ + if (!viper_tpm) + return; + + tpm_device = platform_device_alloc("i2c-gpio", 2); + if (tpm_device) { + if (!platform_device_add_data(tpm_device, + &i2c_tpm_data, + sizeof(i2c_tpm_data))) { + if (platform_device_add(tpm_device)) { + errstr = "register TPM i2c bus"; + goto error_free_tpm; + } + } else { + errstr = "allocate TPM i2c bus data"; + goto error_free_tpm; + } + } else { + errstr = "allocate TPM i2c device"; + goto error_tpm; + } + + return; + +error_free_tpm: + kfree(tpm_device); +error_tpm: + pr_err("viper: Couldn't %s, giving up\n", errstr); +} + +static void __init viper_init_vcore_gpios(void) +{ + if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) + goto err_request_data; + + if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) + goto err_request_clk; + + if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) + goto err_request_cs; + + if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || + gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || + gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) + goto err_dir; + + /* c/should assume redboot set the correct level ??? */ + viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1); + + return; + +err_dir: + gpio_free(VIPER_PSU_nCS_LD_GPIO); +err_request_cs: + gpio_free(VIPER_PSU_CLK_GPIO); +err_request_clk: + gpio_free(VIPER_PSU_DATA_GPIO); +err_request_data: + pr_err("viper: Failed to setup vcore control GPIOs\n"); +} + +static void __init viper_init_serial_gpio(void) +{ + if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) + goto err_request; + + if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) + goto err_dir; + + return; + +err_dir: + gpio_free(VIPER_UART_SHDN_GPIO); +err_request: + pr_err("viper: Failed to setup UART shutdown GPIO\n"); +} + +#ifdef CONFIG_CPU_FREQ +static int viper_cpufreq_notifier(struct notifier_block *nb, + unsigned long val, void *data) +{ + struct cpufreq_freqs *freq = data; + + /* TODO: Adjust timings??? */ + + switch (val) { + case CPUFREQ_PRECHANGE: + if (freq->old < freq->new) { + /* we are getting faster so raise the voltage + * before we change freq */ + viper_set_core_cpu_voltage(freq->new, 0); + } + break; + case CPUFREQ_POSTCHANGE: + if (freq->old > freq->new) { + /* we are slowing down so drop the power + * after we change freq */ + viper_set_core_cpu_voltage(freq->new, 0); + } + break; + case CPUFREQ_RESUMECHANGE: + viper_set_core_cpu_voltage(freq->new, 0); + break; + default: + /* ignore */ + break; + } + + return 0; +} + +static struct notifier_block viper_cpufreq_notifier_block = { + .notifier_call = viper_cpufreq_notifier +}; + +static void __init viper_init_cpufreq(void) +{ + if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, + CPUFREQ_TRANSITION_NOTIFIER)) + pr_err("viper: Failed to setup cpufreq notifier\n"); +} +#else +static inline void viper_init_cpufreq(void) {} +#endif + +static void viper_power_off(void) +{ + pr_notice("Shutting off UPS\n"); + gpio_set_value(VIPER_UPS_GPIO, 1); + /* Spin to death... */ + while (1); +} + +static void __init viper_init(void) +{ + u8 version; + + pm_power_off = viper_power_off; + + pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); + + /* Wake-up serial console */ + viper_init_serial_gpio(); + + set_pxa_fb_info(&fb_info); + + /* v1 hardware cannot use the datacs line */ + version = viper_hw_version(); + if (version == 0) + smc91x_device.num_resources--; + + pxa_set_i2c_info(NULL); + platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); + + viper_init_vcore_gpios(); + viper_init_cpufreq(); + + sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver); + + if (version) { + pr_info("viper: hardware v%di%d detected. " + "CPLD revision %d.\n", + VIPER_BOARD_VERSION(version), + VIPER_BOARD_ISSUE(version), + VIPER_CPLD_REVISION(version)); + system_rev = (VIPER_BOARD_VERSION(version) << 8) | + (VIPER_BOARD_ISSUE(version) << 4) | + VIPER_CPLD_REVISION(version); + } else { + pr_info("viper: No version register.\n"); + } + + i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); + + viper_tpm_init(); + pxa_set_ac97_info(NULL); +} + +static struct map_desc viper_io_desc[] __initdata = { + { + .virtual = VIPER_CPLD_BASE, + .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), + .length = 0x00300000, + .type = MT_DEVICE, + }, + { + .virtual = VIPER_PC104IO_BASE, + .pfn = __phys_to_pfn(_PCMCIA1IO), + .length = 0x00800000, + .type = MT_DEVICE, + }, +}; + +static void __init viper_map_io(void) +{ + pxa_map_io(); + + iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); + + PCFR |= PCFR_OPDE; +} + +MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") + /* Maintainer: Marc Zyngier <maz@misterjones.org> */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = viper_map_io, + .init_irq = viper_init_irq, + .timer = &pxa_timer, + .init_machine = viper_init, +MACHINE_END diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 0cb65b5772f..81380443346 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -29,6 +29,7 @@ #include <mach/pxafb.h> #include <mach/zylonite.h> #include <mach/mmc.h> +#include <mach/ohci.h> #include <mach/pxa27x_keypad.h> #include <mach/pxa3xx_nand.h> @@ -423,6 +424,21 @@ static void __init zylonite_init_nand(void) static inline void zylonite_init_nand(void) {} #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static struct pxaohci_platform_data zylonite_ohci_info = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT1 | ENABLE_PORT2 | + POWER_CONTROL_LOW | POWER_SENSE_LOW, +}; + +static void __init zylonite_init_ohci(void) +{ + pxa_set_ohci_info(&zylonite_ohci_info); +} +#else +static inline void zylonite_init_ohci(void) {} +#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */ + static void __init zylonite_init(void) { /* board-processor specific initialization */ @@ -443,6 +459,7 @@ static void __init zylonite_init(void) zylonite_init_keypad(); zylonite_init_nand(); zylonite_init_leds(); + zylonite_init_ohci(); } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 095f5c64823..46538885a58 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -73,6 +73,12 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { GPIO27_AC97_SDATA_OUT, GPIO28_AC97_SYNC, + /* SSP3 */ + GPIO91_SSP3_SCLK, + GPIO92_SSP3_FRM, + GPIO93_SSP3_TXD, + GPIO94_SSP3_RXD, + /* WM9713 IRQ */ GPIO26_GPIO, @@ -113,6 +119,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { GPIO13_MMC2_CLK, GPIO14_MMC2_CMD, + /* USB Host */ + GPIO0_2_USBH_PEN, + GPIO1_2_USBH_PWR, + /* Standard I2C */ GPIO21_I2C_SCL, GPIO22_I2C_SDA, @@ -209,7 +219,7 @@ static struct pca953x_platform_data gpio_exp[] = { }, }; -struct i2c_board_info zylonite_i2c_board_info[] = { +static struct i2c_board_info zylonite_i2c_board_info[] = { { .type = "pca9539", .addr = 0x74, diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 9879d7da2df..0f244744daa 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c @@ -69,6 +69,12 @@ static mfp_cfg_t mfp_cfg[] __initdata = { GPIO39_AC97_BITCLK, GPIO40_AC97_nACRESET, + /* SSP3 */ + GPIO89_SSP3_SCLK, + GPIO90_SSP3_FRM, + GPIO91_SSP3_TXD, + GPIO92_SSP3_RXD, + /* WM9713 IRQ */ GPIO15_GPIO, @@ -117,6 +123,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = { GPIO28_MMC2_CLK, GPIO29_MMC2_CMD, + /* USB Host */ + GPIO2_2_USBH_PEN, + GPIO3_2_USBH_PWR, + /* Debug LEDs */ GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 4f9c84ab781..2f04d54711e 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -27,10 +27,10 @@ #include <linux/amba/clcd.h> #include <linux/clocksource.h> #include <linux/clockchips.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> #include <asm/hardware/arm_timer.h> diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 33dbbb41a66..3cea92c70d8 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h @@ -23,9 +23,9 @@ #define __ASM_ARCH_REALVIEW_H #include <linux/amba/bus.h> +#include <linux/io.h> #include <asm/leds.h> -#include <asm/io.h> #define AMBA_DEVICE(name,busid,base,plat) \ static struct amba_device name##_device = { \ diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h index 4d3c8f3f805..a2f61c78adb 100644 --- a/arch/arm/mach-realview/include/mach/system.h +++ b/arch/arm/mach-realview/include/mach/system.h @@ -21,8 +21,8 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/platform.h> static inline void arch_idle(void) diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c index 82fa1f26e02..44d178cd573 100644 --- a/arch/arm/mach-realview/localtimer.c +++ b/arch/arm/mach-realview/localtimer.c @@ -17,11 +17,11 @@ #include <linux/percpu.h> #include <linux/clockchips.h> #include <linux/irq.h> +#include <linux/io.h> #include <asm/hardware/arm_twd.h> #include <asm/hardware/gic.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> static DEFINE_PER_CPU(struct clock_event_device, local_clockevent); diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 1907d22f4fe..e102aeb0f76 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -13,10 +13,10 @@ #include <linux/delay.h> #include <linux/device.h> #include <linux/smp.h> +#include <linux/io.h> #include <asm/cacheflush.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/board-eb.h> diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 19a9968fc5b..eb829eb1ebe 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -23,9 +23,9 @@ #include <linux/platform_device.h> #include <linux/sysdev.h> #include <linux/amba/bus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 0986cbd1594..cccdb3eb90f 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -23,9 +23,9 @@ #include <linux/platform_device.h> #include <linux/sysdev.h> #include <linux/amba/bus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index f4e7135e3eb..8b863148ec1 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -23,9 +23,9 @@ #include <linux/platform_device.h> #include <linux/sysdev.h> #include <linux/amba/bus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index 4b19fe48419..7958a30f893 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c @@ -14,11 +14,11 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/dma-mapping.h> +#include <linux/io.h> #include <asm/page.h> #include <asm/dma.h> #include <asm/fiq.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> #include <asm/uaccess.h> diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h index 05425d558ee..9bf7e43e286 100644 --- a/arch/arm/mach-rpc/include/mach/memory.h +++ b/arch/arm/mach-rpc/include/mach/memory.h @@ -36,4 +36,12 @@ #define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE 0xdf000000 +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + #endif diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h index 54d6e3f2d31..bd7268ba17e 100644 --- a/arch/arm/mach-rpc/include/mach/system.h +++ b/arch/arm/mach-rpc/include/mach/system.h @@ -7,9 +7,9 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include <linux/io.h> #include <mach/hardware.h> #include <asm/hardware/iomd.h> -#include <asm/io.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h index baa9c866d7b..d5862368c4f 100644 --- a/arch/arm/mach-rpc/include/mach/uncompress.h +++ b/arch/arm/mach-rpc/include/mach/uncompress.h @@ -9,8 +9,8 @@ */ #define VIDMEM ((char *)SCREEN_START) +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/page.h> diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 7a029621db4..9dd15d679c5 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -1,10 +1,10 @@ #include <linux/init.h> #include <linux/list.h> +#include <linux/io.h> #include <asm/mach/irq.h> #include <asm/hardware/iomd.h> #include <asm/irq.h> -#include <asm/io.h> static void iomd_ack_irq_a(unsigned int irq) { diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index ce8470fea88..e88d417736a 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -18,9 +18,9 @@ #include <linux/device.h> #include <linux/serial_8250.h> #include <linux/ata_platform.h> +#include <linux/io.h> #include <asm/elf.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/hardware.h> #include <asm/page.h> diff --git a/arch/arm/mach-s3c2400/gpio.c b/arch/arm/mach-s3c2400/gpio.c index 148d0ddef3e..7a7ed4174c8 100644 --- a/arch/arm/mach-s3c2400/gpio.c +++ b/arch/arm/mach-s3c2400/gpio.c @@ -24,10 +24,10 @@ #include <linux/module.h> #include <linux/interrupt.h> #include <linux/ioport.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-gpio.h> diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index c66021b5fa4..9a37c87152b 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -25,12 +25,12 @@ #include <linux/module.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <asm/mach-types.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> @@ -38,7 +38,7 @@ #include <mach/bast-map.h> #include <mach/bast-irq.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/irq.h> #if 0 #include <asm/debug-ll.h> @@ -130,8 +130,7 @@ bast_irq_pc104_demux(unsigned int irq, for (i = 0; stat != 0; i++, stat >>= 1) { if (stat & 1) { irqno = bast_pc104_irqs[i]; - desc = irq_desc + irqno; - desc_handle_irq(irqno, desc); + generic_handle_irq(irqno); } } } diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index 1322851d1ac..4e07943c1e2 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -31,19 +31,19 @@ #include <linux/mutex.h> #include <linux/delay.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/map.h> #include <mach/hardware.h> -#include <asm/io.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/clock.h> +#include <plat/cpu.h> int s3c2410_clkcon_enable(struct clk *clk, int enable) { diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 8730797749e..7d914a470b6 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -20,10 +20,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/dma.h> +#include <plat/cpu.h> +#include <plat/dma.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index c6eefb1d590..36a3132f39e 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c @@ -25,10 +25,10 @@ #include <linux/module.h> #include <linux/interrupt.h> #include <linux/ioport.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-gpio.h> diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S index 682df23087a..4c29a89ad07 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include <mach/map.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #define S3C2410_UART1_OFF (0x4000) #define SHIFT_2440TXF (14-9) @@ -99,4 +99,4 @@ /* include the reset of the code which will do the work */ -#include <asm/plat-s3c/debug-macro.S> +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 64bf7e94a5b..23c470c2e5b 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MAP_H #define __ASM_ARCH_MAP_H -#include <asm/plat-s3c/map.h> +#include <plat/map.h> #define S3C2410_ADDR(x) S3C_ADDR(x) diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h index 921b13b4f0a..46d46f5b99f 100644 --- a/arch/arm/mach-s3c2410/include/mach/spi.h +++ b/arch/arm/mach-s3c2410/include/mach/spi.h @@ -18,6 +18,7 @@ struct s3c2410_spi_info { unsigned int num_cs; /* total chipselects */ int bus_num; /* bus number to use. */ + void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); }; diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h index ec2defebf0d..43535a0e718 100644 --- a/arch/arm/mach-s3c2410/include/mach/system-reset.h +++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h @@ -11,7 +11,7 @@ */ #include <mach/hardware.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/plat-s3c/regs-watchdog.h> #include <mach/regs-clock.h> diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h index e9f676bc011..a8cbca6701e 100644 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ b/arch/arm/mach-s3c2410/include/mach/system.h @@ -10,8 +10,8 @@ * published by the Free Software Foundation. */ +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/map.h> #include <mach/idle.h> diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h index 708e47459ff..ab39491beee 100644 --- a/arch/arm/mach-s3c2410/include/mach/uncompress.h +++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h @@ -21,7 +21,7 @@ #undef S3C2410_GPIOREG #define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) -#include <asm/plat-s3c/uncompress.h> +#include <plat/uncompress.h> static inline int is_arm926(void) { diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index f5c5c53e1cc..92150399563 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/sysdev.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> static int s3c2410_irq_add(struct sys_device *sysdev) { diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index f0de3c23ce7..d061fea0190 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -36,6 +36,7 @@ #include <linux/platform_device.h> #include <linux/proc_fs.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -43,17 +44,16 @@ #include <asm/mach/flash.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <mach/fb.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-lcd.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 24c6334fac8..8db9c700e3c 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -22,6 +22,7 @@ #include <linux/dm9000.h> #include <linux/ata_platform.h> #include <linux/i2c.h> +#include <linux/io.h> #include <net/ax88796.h> @@ -34,12 +35,11 @@ #include <mach/bast-cpld.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -55,9 +55,9 @@ #include <linux/serial_8250.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include "usb-simtec.h" #include "nor-simtec.h" diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index e35933a46d1..98716d0108e 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -20,17 +20,17 @@ #include <linux/sysdev.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-lcd.h> #include <mach/regs-gpio.h> #include <mach/regs-clock.h> @@ -40,10 +40,10 @@ #include <mach/fb.h> #include <asm/plat-s3c24xx/udc.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc h1940_iodesc[] __initdata = { [0] = { diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 80fe2ed0775..82505517846 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -25,9 +25,9 @@ #include <linux/platform_device.h> #include <linux/serial_core.h> #include <linux/timer.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> @@ -41,12 +41,12 @@ #include <asm/mach/map.h> #include <asm/plat-s3c/iic.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/s3c2410.h> +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/s3c2410.h> #include <asm/plat-s3c24xx/udc.h> static struct map_desc n30_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index 606ee15911b..d8255cf87e4 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -17,6 +17,7 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -25,17 +26,16 @@ #include <mach/otom-map.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc otom11_iodesc[] __initdata = { /* Device area */ diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 7d34844debd..661807e14e8 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -32,7 +32,7 @@ #include <linux/serial_core.h> #include <linux/spi/spi.h> #include <linux/spi/spi_bitbang.h> - +#include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/nand_ecc.h> @@ -43,23 +43,22 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <mach/regs-gpio.h> #include <mach/leds-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/fb.h> #include <asm/plat-s3c/nand.h> #include <asm/plat-s3c24xx/udc.h> #include <mach/spi.h> #include <mach/spi-gpio.h> -#include <asm/plat-s3c24xx/common-smdk.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/common-smdk.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc qt2410_iodesc[] __initdata = { { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index b88939d7228..152527bb287 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -36,22 +36,22 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2410_iodesc[] __initdata = { /* nothing here yet */ diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index ec87306a8c2..309dcf4c870 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c @@ -33,6 +33,7 @@ #include <linux/device.h> #include <linux/platform_device.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -40,13 +41,12 @@ #include <asm/mach/flash.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/regs-serial.h> +#include <plat/devs.h> +#include <plat/cpu.h> #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index fbc0213d548..941353af16d 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -25,6 +25,7 @@ #include <linux/tty.h> #include <linux/serial_8250.h> #include <linux/serial_reg.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -36,17 +37,16 @@ #include <mach/vr1000-cpld.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/leds-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include "usb-simtec.h" #include "nor-simtec.h" diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index ba43ff9e816..a6970f61319 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c @@ -25,17 +25,17 @@ #include <linux/errno.h> #include <linux/time.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <mach/regs-gpio.h> #include <mach/h1940.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> #ifdef CONFIG_S3C2410_PM_DEBUG extern void pm_dbg(const char *fmt, ...); diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 5d977f9c88a..ac79b536c4c 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -19,22 +19,22 @@ #include <linux/sysdev.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> +#include <plat/s3c2410.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> /* Initial IO mappings */ diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index be37f221a17..dd5b6388a5a 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -32,7 +32,7 @@ #include <mach/regs-gpio.h> #include <mach/regs-clock.h> #include <mach/regs-mem.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> /* s3c2410_cpu_suspend * diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index 4dacf8a1750..6078f09b7df 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c @@ -21,6 +21,7 @@ #include <linux/timer.h> #include <linux/init.h> #include <linux/device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -32,10 +33,9 @@ #include <mach/regs-gpio.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> -#include <asm/plat-s3c24xx/devs.h> +#include <plat/devs.h> #include "usb-simtec.h" /* control power and monitor over-current events on various Simtec diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index af4b2ce516f..96d9eb15424 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c @@ -31,19 +31,19 @@ #include <linux/mutex.h> #include <linux/delay.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/map.h> #include <mach/hardware.h> -#include <asm/io.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* We currently have to assume that the system is running * from the XTPll input, and that all ***REFCLKs are being diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 22fc04a3b53..ba0591e71f3 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -16,15 +16,15 @@ #include <linux/init.h> #include <linux/sysdev.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/dma.h> #include <mach/dma.h> -#include <asm/io.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index ac62b79044f..6000ca9d181 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -24,10 +24,10 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> @@ -35,9 +35,9 @@ #include <mach/regs-gpio.h> #include <mach/regs-power.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/irq.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/irq.h> +#include <plat/pm.h> #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) #define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0)))) @@ -123,10 +123,10 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc) subsrc &= ~submsk; if (subsrc & INTBIT(IRQ_S3C2412_SDI)) - desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI); + generic_handle_irq(IRQ_S3C2412_SDI); if (subsrc & INTBIT(IRQ_S3C2412_CF)) - desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF); + generic_handle_irq(IRQ_S3C2412_CF); } #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index ad980a1690c..b08f18c8c47 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c @@ -30,7 +30,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <asm/plat-s3c/nand.h> #include <asm/plat-s3c/iic.h> @@ -48,10 +48,10 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> #include <asm/plat-s3c24xx/udc.h> static struct map_desc jive_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index 80affb1ee4c..c719b5a740a 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -19,6 +19,7 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -27,12 +28,11 @@ #include <mach/hardware.h> #include <asm/hardware/iomd.h> #include <asm/setup.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -40,13 +40,13 @@ #include <asm/plat-s3c24xx/udc.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2413_iodesc[] __initdata = { }; diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 7a08b378991..4cfa19ad9be 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -17,7 +17,7 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> - +#include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/nand_ecc.h> @@ -29,11 +29,10 @@ #include <mach/hardware.h> #include <asm/setup.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -42,11 +41,11 @@ #include <asm/plat-s3c/nand.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc vstms_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c index 737523a4e03..217e9e4ed45 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c2412/pm.c @@ -18,9 +18,9 @@ #include <linux/init.h> #include <linux/sysdev.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-power.h> @@ -28,10 +28,10 @@ #include <mach/regs-gpio.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> -#include <asm/plat-s3c24xx/s3c2412.h> +#include <plat/s3c2412.h> extern void s3c2412_sleep_enter(void); diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index d278010b9f6..313759c3da6 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -20,6 +20,7 @@ #include <linux/sysdev.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -27,14 +28,13 @@ #include <mach/hardware.h> #include <asm/proc-fns.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/reset.h> #include <mach/idle.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-power.h> #include <mach/regs-gpio.h> #include <mach/regs-gpioj.h> @@ -42,11 +42,11 @@ #include <asm/plat-s3c24xx/regs-spi.h> #include <mach/regs-s3c2412.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/s3c2412.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/pm.h> #ifndef CONFIG_CPU_S3C2412_ONLY void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index 95567e6daea..d1c29b2537c 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c @@ -33,16 +33,16 @@ #include <linux/ioport.h> #include <linux/mutex.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/atomic.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* S3C2440 extended clock support */ diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index cdd4e6e79ac..32303f6a832 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -20,10 +20,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c index c0c67438d0a..55404427277 100644 --- a/arch/arm/mach-s3c2440/dsc.c +++ b/arch/arm/mach-s3c2440/dsc.c @@ -15,20 +15,20 @@ #include <linux/interrupt.h> #include <linux/init.h> #include <linux/module.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-gpio.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/s3c2440.h> +#include <plat/cpu.h> +#include <plat/s3c2440.h> int s3c2440_set_dsc(unsigned int pin, unsigned int value) { diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 276b823f4e2..63c5ab65727 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c @@ -24,19 +24,19 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* WDT/AC97 */ @@ -44,7 +44,6 @@ static void s3c_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc) { unsigned int subsrc, submsk; - struct irq_desc *mydesc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -58,12 +57,10 @@ static void s3c_irq_demux_wdtac97(unsigned int irq, if (subsrc != 0) { if (subsrc & 1) { - mydesc = irq_desc + IRQ_S3C2440_WDT; - desc_handle_irq(IRQ_S3C2440_WDT, mydesc); + generic_handle_irq(IRQ_S3C2440_WDT); } if (subsrc & 2) { - mydesc = irq_desc + IRQ_S3C2440_AC97; - desc_handle_irq(IRQ_S3C2440_AC97, mydesc); + generic_handle_irq(IRQ_S3C2440_AC97); } } } diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 441f4bc0947..e2beca47048 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -19,7 +19,7 @@ #include <linux/platform_device.h> #include <linux/ata_platform.h> #include <linux/i2c.h> - +#include <linux/io.h> #include <linux/sm501.h> #include <linux/sm501-regs.h> @@ -32,11 +32,10 @@ #include <mach/anubis-cpld.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -49,9 +48,9 @@ #include <net/ax88796.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #define COPYRIGHT ", (c) 2005 Simtec Electronics" diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index f0f0cc6afcf..66876c6f2f1 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -31,7 +31,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -42,9 +42,9 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc at2440evb_iodesc[] __initdata = { /* Nothing here */ diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 1a5e7027b41..a546307fd53 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -21,6 +21,7 @@ #include <linux/string.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <linux/mtd/map.h> @@ -30,19 +31,18 @@ #include <asm/setup.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> //#include <asm/debug-ll.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc nexcoder_iodesc[] __initdata = { /* nothing here yet */ diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 8b83f93b610..2361d606abc 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -20,6 +20,7 @@ #include <linux/serial_core.h> #include <linux/clk.h> #include <linux/i2c.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -29,11 +30,10 @@ #include <mach/osiris-cpld.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -44,9 +44,9 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> /* onboard perihperal map */ diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index e0b07e6a0a1..4d14c7cff89 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -23,7 +23,7 @@ #include <linux/platform_device.h> #include <linux/serial_core.h> #include <linux/serial.h> - +#include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/mtd/nand_ecc.h> @@ -34,11 +34,10 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -46,10 +45,10 @@ #include <asm/plat-s3c/nand.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc rx3715_iodesc[] __initdata = { /* dump ISA space somewhere unused */ diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 327c8f37198..fefeaaa4155 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -21,30 +21,30 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> #include <mach/idle.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2440_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index d6b9a92d284..ac1f7ea5f40 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c @@ -20,18 +20,18 @@ #include <linux/serial_core.h> #include <linux/sysdev.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2440.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c index 569b5c3d334..ea1aa1f5157 100644 --- a/arch/arm/mach-s3c2442/clock.c +++ b/arch/arm/mach-s3c2442/clock.c @@ -33,16 +33,16 @@ #include <linux/ioport.h> #include <linux/mutex.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/atomic.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* S3C2442 extended clock support */ diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c index fbf8264249d..4663bdc7fff 100644 --- a/arch/arm/mach-s3c2442/s3c2442.c +++ b/arch/arm/mach-s3c2442/s3c2442.c @@ -19,8 +19,8 @@ #include <linux/serial_core.h> #include <linux/sysdev.h> -#include <asm/plat-s3c24xx/s3c2442.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2442.h> +#include <plat/cpu.h> static struct sys_device s3c2442_sysdev = { .cls = &s3c2442_sysclass, diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 6a8d7cced4a..2f60bf6b8d4 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -31,17 +31,17 @@ #include <linux/mutex.h> #include <linux/delay.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/map.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/regs-s3c2443-clock.h> -#include <asm/plat-s3c24xx/s3c2443.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2443.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* We currently have to assume that the system is running * from the XTPll input, and that all ***REFCLKs are being diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index c1ff03aebfd..f73ccb25ff9 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -16,15 +16,15 @@ #include <linux/init.h> #include <linux/sysdev.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/dma.h> #include <mach/dma.h> -#include <asm/io.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 9674de7223f..0e0d693f397 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c @@ -24,19 +24,19 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) @@ -44,7 +44,6 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len) { unsigned int subsrc, submsk; unsigned int end; - struct irq_desc *mydesc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -57,13 +56,11 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len) subsrc &= (1 << len)-1; end = len + irq; - mydesc = irq_desc + irq; for (; irq < end && subsrc; irq++) { if (subsrc & 1) - desc_handle_irq(irq, mydesc); + generic_handle_irq(irq); - mydesc++; subsrc >>= 1; } } diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index e3c0d587bd1..a7fe65f3dcc 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -21,30 +21,30 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> #include <mach/idle.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2443_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index 37793f924b5..bbeddf9ddcb 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c @@ -20,21 +20,21 @@ #include <linux/serial_core.h> #include <linux/sysdev.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-s3c2443-clock.h> #include <mach/reset.h> -#include <asm/plat-s3c24xx/s3c2443.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2443.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc s3c2443_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index 3efefbdd252..ab5883b39dd 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c @@ -95,19 +95,19 @@ static int __init badge4_sa1111_init(void) * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) */ static struct mtd_partition badge4_partitions[] = { - { - .name = "BLOB boot loader", - .offset = 0, - .size = 0x0000A000 - }, { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 0x00006000 - }, { - .name = "root", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - } + { + .name = "BLOB boot loader", + .offset = 0, + .size = 0x0000A000 + }, { + .name = "params", + .offset = MTDPART_OFS_APPEND, + .size = 0x00006000 + }, { + .name = "root", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL + } }; static struct flash_platform_data badge4_flash_data = { @@ -126,7 +126,7 @@ static int five_v_on __initdata = 0; static int __init five_v_on_setup(char *ignore) { - five_v_on = 1; + five_v_on = 1; return 1; } __setup("five_v_on", five_v_on_setup); @@ -171,15 +171,15 @@ static int __init badge4_init(void) GPCR = BADGE4_GPIO_TESTPT_J7; GPDR |= BADGE4_GPIO_TESTPT_J7; - /* 5V supply rail. */ - GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ - GPDR |= BADGE4_GPIO_PCMEN5V; + /* 5V supply rail. */ + GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ + GPDR |= BADGE4_GPIO_PCMEN5V; /* CPLD sdram type inputs; set up by blob */ //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n", - !!(GPLR & BADGE4_GPIO_SDTYP1), - !!(GPLR & BADGE4_GPIO_SDTYP0)); + !!(GPLR & BADGE4_GPIO_SDTYP1), + !!(GPLR & BADGE4_GPIO_SDTYP0)); /* SA1111 reset pin; set up by blob */ //GPSR = BADGE4_GPIO_SA1111_NRST; @@ -205,8 +205,8 @@ static int __init badge4_init(void) ret = badge4_sa1111_init(); if (ret < 0) printk(KERN_ERR - "%s: SA-1111 initialization failed (%d)\n", - __func__, ret); + "%s: SA-1111 initialization failed (%d)\n", + __func__, ret); /* maybe turn on 5v0 from the start */ @@ -254,7 +254,7 @@ EXPORT_SYMBOL(badge4_set_5V); static struct map_desc badge4_io_desc[] __initdata = { - { /* SRAM bank 1 */ + { /* SRAM bank 1 */ .virtual = 0xf1000000, .pfn = __phys_to_pfn(0x08000000), .length = 0x00100000, diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index da3a898a6d6..244d5956312 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c @@ -88,6 +88,8 @@ #include <linux/init.h> #include <linux/cpufreq.h> +#include <asm/cputype.h> + #include <mach/hardware.h> #include "generic.h" @@ -222,7 +224,6 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy) if (policy->cpu != 0) return -EINVAL; policy->cur = policy->min = policy->max = sa11x0_getspeed(0); - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.min_freq = 59000; policy->cpuinfo.max_freq = 287000; policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; @@ -240,7 +241,7 @@ static struct cpufreq_driver sa1100_driver = { static int __init sa1100_dram_init(void) { - if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID) + if (cpu_is_sa1100()) return cpufreq_register_driver(&sa1100_driver); else return -ENODEV; diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 029dbfbbafc..3e4fb214ead 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c @@ -23,10 +23,11 @@ #include <linux/cpufreq.h> #include <linux/delay.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> +#include <asm/cputype.h> #include <asm/mach-types.h> -#include <asm/io.h> #include <asm/system.h> #include "generic.h" diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index b422526f6d8..c1fbd5b5f9c 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -42,7 +42,7 @@ EXPORT_SYMBOL(reset_status); static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 590, /* 59.0 MHz */ 737, /* 73.7 MHz */ - 885, /* 88.5 MHz */ + 885, /* 88.5 MHz */ 1032, /* 103.2 MHz */ 1180, /* 118.0 MHz */ 1327, /* 132.7 MHz */ @@ -52,10 +52,10 @@ static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 1917, /* 191.7 MHz */ 2064, /* 206.4 MHz */ 2212, /* 221.2 MHz */ - 2359, /* 235.9 MHz */ - 2507, /* 250.7 MHz */ - 2654, /* 265.4 MHz */ - 2802 /* 280.2 MHz */ + 2359, /* 235.9 MHz */ + 2507, /* 250.7 MHz */ + 2654, /* 265.4 MHz */ + 2802 /* 280.2 MHz */ }; #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110) @@ -113,7 +113,7 @@ unsigned int sa11x0_getspeed(unsigned int cpu) #else /* * We still need to provide this so building without cpufreq works. - */ + */ unsigned int cpufreq_get(unsigned int cpu) { return cclk_frequency_100khz[PPCR & 0xf] * 100; @@ -389,7 +389,7 @@ EXPORT_SYMBOL(sa1100fb_lcd_power); */ static struct map_desc standard_io_desc[] __initdata = { - { /* PCM */ + { /* PCM */ .virtual = 0xf8000000, .pfn = __phys_to_pfn(0x80000000), .length = 0x00100000, diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 62aaf04a390..4f7ea012e1e 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h @@ -2054,19 +2054,3 @@ /* active display mode) */ #define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ #define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#ifndef __ASSEMBLY__ -extern unsigned int processor_id; -#endif - -#define CPU_REVISION (processor_id & 15) -#define CPU_SA1110_A0 (0) -#define CPU_SA1110_B0 (4) -#define CPU_SA1110_B1 (5) -#define CPU_SA1110_B2 (6) -#define CPU_SA1110_B4 (8) - -#define CPU_SA1100_ID (0x4401a110) -#define CPU_SA1100_MASK (0xfffffff0) -#define CPU_SA1110_ID (0x6901b110) -#define CPU_SA1110_MASK (0xfffffff0) diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index 5976435f42c..b70846c096a 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h @@ -36,8 +36,26 @@ #define io_v2p( x ) \ ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) +#define CPU_SA1110_A0 (0) +#define CPU_SA1110_B0 (4) +#define CPU_SA1110_B1 (5) +#define CPU_SA1110_B2 (6) +#define CPU_SA1110_B4 (8) + +#define CPU_SA1100_ID (0x4401a110) +#define CPU_SA1100_MASK (0xfffffff0) +#define CPU_SA1110_ID (0x6901b110) +#define CPU_SA1110_MASK (0xfffffff0) + #ifndef __ASSEMBLY__ +#include <asm/cputype.h> + +#define CPU_REVISION (read_cpuid_id() & 15) + +#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) +#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) + # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) diff --git a/arch/arm/mach-sa1100/include/mach/ide.h b/arch/arm/mach-sa1100/include/mach/ide.h deleted file mode 100644 index 4c99c8f5e61..00000000000 --- a/arch/arm/mach-sa1100/include/mach/ide.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/ide.h - * - * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre - * - * 18-aug-2000: Cleanup by Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * Get rid of the special ide_init_hwif_ports() functions - * and make a generalised function that can be used by all - * architectures. - */ - -#include <asm/irq.h> -#include <mach/hardware.h> -#include <asm/mach-types.h> - -#error "This code is broken and needs update to match with current ide support" - - -/* - * Set up a hw structure for a specified data port, control port and IRQ. - * This should follow whatever the default interface uses. - */ -static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, - unsigned long ctrl_port, int *irq) -{ - unsigned long reg = data_port; - int i; - int regincr = 1; - - /* The Empeg board has the first two address lines unused */ - if (machine_is_empeg()) - regincr = 1 << 2; - - /* The LART doesn't use A0 for IDE */ - if (machine_is_lart()) - regincr = 1 << 1; - - memset(hw, 0, sizeof(*hw)); - - for (i = 0; i <= 7; i++) { - hw->io_ports_array[i] = reg; - reg += regincr; - } - - hw->io_ports.ctl_addr = ctrl_port; - - if (irq) - *irq = 0; -} - -/* - * This registers the standard ports for this architecture with the IDE - * driver. - */ -static __inline__ void -ide_init_default_hwifs(void) -{ - if (machine_is_lart()) { -#ifdef CONFIG_SA1100_LART - hw_regs_t hw; - - /* Enable GPIO as interrupt line */ - GPDR &= ~LART_GPIO_IDE; - set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING); - - /* set PCMCIA interface timing */ - MECR = 0x00060006; - - /* init the interface */ - ide_init_hwif_ports(&hw, PCMCIA_IO_0_BASE + 0x0000, PCMCIA_IO_0_BASE + 0x1000, NULL); - hw.irq = LART_IRQ_IDE; - ide_register_hw(&hw); -#endif - } -} diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h index 29f639e2afc..1c127b68581 100644 --- a/arch/arm/mach-sa1100/include/mach/memory.h +++ b/arch/arm/mach-sa1100/include/mach/memory.h @@ -40,23 +40,21 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); #define __bus_to_virt(x) __phys_to_virt(x) /* - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much convenient to use Linux's NUMA support to implement our - * memory map representation. Assuming all memory nodes have equal access + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much convenient to use Linux's SparseMEM support to implement + * our memory map representation. Assuming all memory nodes have equal access * characteristics, we then have generic discontiguous memory support. * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. + * The sparsemem banks are matched with the physical memory bank addresses + * which are incidentally the same as virtual addresses. * * node 0: 0xc0000000 - 0xc7ffffff * node 1: 0xc8000000 - 0xcfffffff * node 2: 0xd0000000 - 0xd7ffffff * node 3: 0xd8000000 - 0xdfffffff */ -#define NODE_MEM_SIZE_BITS 27 +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 27 /* * Cache flushing area - SA1100 zero bank diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 86369a8f0ce..3093d46a9c6 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) GEDR = mask; irq = IRQ_GPIO11; - desc = irq_desc + irq; mask >>= 11; do { if (mask & 1) - desc_handle_irq(irq, desc); + generic_handle_irq(irq); mask >>= 1; irq++; - desc++; } while (mask); mask = GEDR & 0xfffff800; diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 4856a6bd248..6ccd175bc4c 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) unsigned int irr; while (1) { - struct irq_desc *d; - /* * Acknowledge the parent IRQ. */ @@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) desc->chip->ack(irq); if (irr & IRR_ETHERNET) { - d = irq_desc + IRQ_NEPONSET_SMC9196; - desc_handle_irq(IRQ_NEPONSET_SMC9196, d); + generic_handle_irq(IRQ_NEPONSET_SMC9196); } if (irr & IRR_USAR) { - d = irq_desc + IRQ_NEPONSET_USAR; - desc_handle_irq(IRQ_NEPONSET_USAR, d); + generic_handle_irq(IRQ_NEPONSET_USAR); } desc->chip->unmask(irq); } if (irr & IRR_SA1111) { - d = irq_desc + IRQ_NEPONSET_SA1111; - desc_handle_irq(IRQ_NEPONSET_SA1111, d); + generic_handle_irq(IRQ_NEPONSET_SA1111); } } } diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 83be1c6c5f8..e45d3a1890b 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -8,11 +8,10 @@ #include <linux/ioport.h> #include <linux/platform_device.h> #include <linux/irq.h> - +#include <linux/io.h> #include <linux/mtd/partitions.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -39,8 +38,8 @@ static struct resource smc91x_resources[] = { [0] = { - .start = PLEB_ETH0_P, - .end = PLEB_ETH0_P | 0x03ffffff, + .start = PLEB_ETH0_P, + .end = PLEB_ETH0_P | 0x03ffffff, .flags = IORESOURCE_MEM, }, #if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */ @@ -87,15 +86,15 @@ static struct resource pleb_flash_resources[] = { static struct mtd_partition pleb_partitions[] = { { .name = "blob", - .offset = 0, + .offset = 0, .size = 0x00020000, }, { .name = "kernel", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = 0x000e0000, }, { .name = "rootfs", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = 0x00300000, } }; diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 8dd63531795..3c74534f7fe 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -12,6 +12,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/io.h> #include <asm/irq.h> #include <mach/hardware.h> @@ -27,7 +28,6 @@ #include <linux/serial_core.h> #include <linux/ioport.h> -#include <asm/io.h> #include "generic.h" diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 641f361c56f..b20ff93b84a 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c @@ -17,8 +17,8 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> #include <asm/hardware/ssp.h> diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 09d9f33d407..a9400d98445 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -9,10 +9,10 @@ #include <linux/irq.h> #include <linux/sched.h> #include <linux/serial_8250.h> +#include <linux/io.h> #include <asm/setup.h> #include <asm/mach-types.h> -#include <asm/io.h> #include <asm/leds.h> #include <asm/param.h> diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h index 85aceef6f87..e45bd734a03 100644 --- a/arch/arm/mach-shark/include/mach/system.h +++ b/arch/arm/mach-shark/include/mach/system.h @@ -6,7 +6,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <asm/io.h> +#include <linux/io.h> static void arch_reset(char mode) { diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 44b0811b400..c04eb6a1e2b 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c @@ -11,9 +11,9 @@ #include <linux/init.h> #include <linux/fs.h> #include <linux/interrupt.h> +#include <linux/io.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> /* diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c index b1896471aa3..8bd8d6bb4d9 100644 --- a/arch/arm/mach-shark/leds.c +++ b/arch/arm/mach-shark/leds.c @@ -20,10 +20,10 @@ #include <linux/init.h> #include <linux/spinlock.h> #include <linux/ioport.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/leds.h> -#include <asm/io.h> #include <asm/system.h> #define LED_STATE_ENABLED 1 diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index b638f10411e..565e0ba0d67 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -29,10 +29,10 @@ #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/cnt32_to_63.h> +#include <linux/io.h> #include <asm/system.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/leds.h> #include <asm/hardware/arm_timer.h> @@ -95,8 +95,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc) irq += IRQ_SIC_START; - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } while (status); } diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h index 91fa559c7cc..c59e6100c7e 100644 --- a/arch/arm/mach-versatile/include/mach/system.h +++ b/arch/arm/mach-versatile/include/mach/system.h @@ -21,8 +21,8 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/platform.h> static inline void arch_idle(void) diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index 36f23f89650..7161ba23b58 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -21,9 +21,9 @@ #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> #include <asm/mach/pci.h> diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index 76375c64413..bb8ec7724f7 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c @@ -23,9 +23,9 @@ #include <linux/device.h> #include <linux/sysdev.h> #include <linux/amba/bus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 1725f019fc8..aa051c0884f 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -23,9 +23,9 @@ #include <linux/device.h> #include <linux/sysdev.h> #include <linux/amba/bus.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index ed15f876c72..d1193884d76 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -428,7 +428,7 @@ config CPU_32v6K # ARMv7 config CPU_V7 bool "Support ARM V7 processor" - depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3 select CPU_32v6K select CPU_32v7 select CPU_ABRT_EV7 @@ -735,6 +735,14 @@ config CACHE_FEROCEON_L2 help This option enables the Feroceon L2 cache controller. +config CACHE_FEROCEON_L2_WRITETHROUGH + bool "Force Feroceon L2 cache write through" + depends on CACHE_FEROCEON_L2 + default n + help + Say Y here to use the Feroceon L2 cache in writethrough mode. + Unless you specifically require this, say N for writeback mode. + config CACHE_L2X0 bool "Enable the L2x0 outer cache controller" depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 2e27a8c8372..480f78a3611 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux arm-specific parts of the memory manager. # -obj-y := consistent.o extable.o fault.o init.o \ +obj-y := dma-mapping.o extable.o fault.o init.o \ iomap.o obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S index eb90bce38e1..2e6dc040c65 100644 --- a/arch/arm/mm/abort-ev7.S +++ b/arch/arm/mm/abort-ev7.S @@ -30,3 +30,4 @@ ENTRY(v7_early_abort) * New designs should not need to patch up faults. */ mov pc, lr +ENDPROC(v7_early_abort) diff --git a/arch/arm/mm/abort-nommu.S b/arch/arm/mm/abort-nommu.S index a7cc7f9ee45..625e580945b 100644 --- a/arch/arm/mm/abort-nommu.S +++ b/arch/arm/mm/abort-nommu.S @@ -17,3 +17,4 @@ ENTRY(nommu_early_abort) mov r0, #0 @ clear r0, r1 (no FSR/FAR) mov r1, #0 mov pc, lr +ENDPROC(nommu_early_abort) diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index e162cca5917..133e65d166b 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -17,8 +17,8 @@ #include <linux/string.h> #include <linux/proc_fs.h> #include <linux/init.h> +#include <linux/uaccess.h> -#include <asm/uaccess.h> #include <asm/unaligned.h> #include "fault.h" diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 7b5a25d8157..13cdae8b0d4 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -48,11 +48,12 @@ static inline void l2_clean_mva_range(unsigned long start, unsigned long end) * L2 is PIPT and range operations only do a TLB lookup on * the start address. */ - BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); + BUG_ON((start ^ end) >> PAGE_SHIFT); raw_local_irq_save(flags); - __asm__("mcr p15, 1, %0, c15, c9, 4" : : "r" (start)); - __asm__("mcr p15, 1, %0, c15, c9, 5" : : "r" (end)); + __asm__("mcr p15, 1, %0, c15, c9, 4\n\t" + "mcr p15, 1, %1, c15, c9, 5" + : : "r" (start), "r" (end)); raw_local_irq_restore(flags); } @@ -80,11 +81,12 @@ static inline void l2_inv_mva_range(unsigned long start, unsigned long end) * L2 is PIPT and range operations only do a TLB lookup on * the start address. */ - BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); + BUG_ON((start ^ end) >> PAGE_SHIFT); raw_local_irq_save(flags); - __asm__("mcr p15, 1, %0, c15, c11, 4" : : "r" (start)); - __asm__("mcr p15, 1, %0, c15, c11, 5" : : "r" (end)); + __asm__("mcr p15, 1, %0, c15, c11, 4\n\t" + "mcr p15, 1, %1, c15, c11, 5" + : : "r" (start), "r" (end)); raw_local_irq_restore(flags); } @@ -205,7 +207,7 @@ static void feroceon_l2_flush_range(unsigned long start, unsigned long end) * time. These are necessary because the L2 cache can only be enabled * or disabled while the L1 Dcache and Icache are both disabled. */ -static void __init invalidate_and_disable_dcache(void) +static int __init flush_and_disable_dcache(void) { u32 cr; @@ -217,7 +219,9 @@ static void __init invalidate_and_disable_dcache(void) flush_cache_all(); set_cr(cr & ~CR_C); raw_local_irq_restore(flags); + return 1; } + return 0; } static void __init enable_dcache(void) @@ -225,18 +229,17 @@ static void __init enable_dcache(void) u32 cr; cr = get_cr(); - if (!(cr & CR_C)) - set_cr(cr | CR_C); + set_cr(cr | CR_C); } static void __init __invalidate_icache(void) { int dummy; - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0\n" : "=r" (dummy)); + __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy)); } -static void __init invalidate_and_disable_icache(void) +static int __init invalidate_and_disable_icache(void) { u32 cr; @@ -244,7 +247,9 @@ static void __init invalidate_and_disable_icache(void) if (cr & CR_I) { set_cr(cr & ~CR_I); __invalidate_icache(); + return 1; } + return 0; } static void __init enable_icache(void) @@ -252,8 +257,7 @@ static void __init enable_icache(void) u32 cr; cr = get_cr(); - if (!(cr & CR_I)) - set_cr(cr | CR_I); + set_cr(cr | CR_I); } static inline u32 read_extra_features(void) @@ -291,13 +295,17 @@ static void __init enable_l2(void) u = read_extra_features(); if (!(u & 0x00400000)) { + int i, d; + printk(KERN_INFO "Feroceon L2: Enabling L2\n"); - invalidate_and_disable_dcache(); - invalidate_and_disable_icache(); + d = flush_and_disable_dcache(); + i = invalidate_and_disable_icache(); write_extra_features(u | 0x00400000); - enable_icache(); - enable_dcache(); + if (i) + enable_icache(); + if (d) + enable_dcache(); } } diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 76b800a9519..b480f1d3591 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -18,9 +18,9 @@ */ #include <linux/init.h> #include <linux/spinlock.h> +#include <linux/io.h> #include <asm/cacheflush.h> -#include <asm/io.h> #include <asm/hardware/cache-l2x0.h> #define CACHE_LINE_SIZE 32 diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 35ffc4d9599..d19c2bec2b1 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -66,6 +66,7 @@ finished: mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr isb mov pc, lr +ENDPROC(v7_flush_dcache_all) /* * v7_flush_cache_all() @@ -85,6 +86,7 @@ ENTRY(v7_flush_kern_cache_all) mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate ldmfd sp!, {r4-r5, r7, r9-r11, lr} mov pc, lr +ENDPROC(v7_flush_kern_cache_all) /* * v7_flush_cache_all() @@ -110,6 +112,8 @@ ENTRY(v7_flush_user_cache_all) */ ENTRY(v7_flush_user_cache_range) mov pc, lr +ENDPROC(v7_flush_user_cache_all) +ENDPROC(v7_flush_user_cache_range) /* * v7_coherent_kern_range(start,end) @@ -155,6 +159,8 @@ ENTRY(v7_coherent_user_range) dsb isb mov pc, lr +ENDPROC(v7_coherent_kern_range) +ENDPROC(v7_coherent_user_range) /* * v7_flush_kern_dcache_page(kaddr) @@ -174,6 +180,7 @@ ENTRY(v7_flush_kern_dcache_page) blo 1b dsb mov pc, lr +ENDPROC(v7_flush_kern_dcache_page) /* * v7_dma_inv_range(start,end) @@ -202,6 +209,7 @@ ENTRY(v7_dma_inv_range) blo 1b dsb mov pc, lr +ENDPROC(v7_dma_inv_range) /* * v7_dma_clean_range(start,end) @@ -219,6 +227,7 @@ ENTRY(v7_dma_clean_range) blo 1b dsb mov pc, lr +ENDPROC(v7_dma_clean_range) /* * v7_dma_flush_range(start,end) @@ -236,6 +245,7 @@ ENTRY(v7_dma_flush_range) blo 1b dsb mov pc, lr +ENDPROC(v7_dma_flush_range) __INITDATA diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 158bd96763d..10b1bae1a25 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c @@ -18,10 +18,11 @@ */ #include <linux/init.h> #include <linux/spinlock.h> +#include <linux/io.h> #include <asm/system.h> +#include <asm/cputype.h> #include <asm/cacheflush.h> -#include <asm/io.h> #define CR_L2 (1 << 26) diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index ded0e96d069..8d33e254934 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c @@ -28,7 +28,7 @@ * specific hacks for copying pages efficiently. */ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ - L_PTE_CACHEABLE) + L_PTE_MT_MINICACHE) static DEFINE_SPINLOCK(minicache_lock); diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 3adb79257f4..0e21c076758 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c @@ -16,6 +16,7 @@ #include <asm/shmparam.h> #include <asm/tlbflush.h> #include <asm/cacheflush.h> +#include <asm/cachetype.h> #include "mm.h" diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index 2e455f82a4d..bad49331bbf 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c @@ -30,7 +30,7 @@ #define COPYPAGE_MINICACHE 0xffff8000 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ - L_PTE_CACHEABLE) + L_PTE_MT_MINICACHE) static DEFINE_SPINLOCK(minicache_lock); diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/dma-mapping.c index db7b3e38ef1..67960017dc8 100644 --- a/arch/arm/mm/consistent.c +++ b/arch/arm/mm/dma-mapping.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mm/consistent.c + * linux/arch/arm/mm/dma-mapping.c * * Copyright (C) 2000-2004 Russell King * @@ -512,3 +512,105 @@ void dma_cache_maint(const void *start, size_t size, int direction) } } EXPORT_SYMBOL(dma_cache_maint); + +/** + * dma_map_sg - map a set of SG buffers for streaming mode DMA + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices + * @sg: list of buffers + * @nents: number of buffers to map + * @dir: DMA transfer direction + * + * Map a set of buffers described by scatterlist in streaming mode for DMA. + * This is the scatter-gather version of the dma_map_single interface. + * Here the scatter gather list elements are each tagged with the + * appropriate dma address and length. They are obtained via + * sg_dma_{address,length}. + * + * Device ownership issues as mentioned for dma_map_single are the same + * here. + */ +int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction dir) +{ + struct scatterlist *s; + int i, j; + + for_each_sg(sg, s, nents, i) { + s->dma_address = dma_map_page(dev, sg_page(s), s->offset, + s->length, dir); + if (dma_mapping_error(dev, s->dma_address)) + goto bad_mapping; + } + return nents; + + bad_mapping: + for_each_sg(sg, s, i, j) + dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); + return 0; +} +EXPORT_SYMBOL(dma_map_sg); + +/** + * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices + * @sg: list of buffers + * @nents: number of buffers to unmap (returned from dma_map_sg) + * @dir: DMA transfer direction (same as was passed to dma_map_sg) + * + * Unmap a set of streaming mode DMA translations. Again, CPU access + * rules concerning calls here are the same as for dma_unmap_single(). + */ +void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction dir) +{ + struct scatterlist *s; + int i; + + for_each_sg(sg, s, nents, i) + dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); +} +EXPORT_SYMBOL(dma_unmap_sg); + +/** + * dma_sync_sg_for_cpu + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices + * @sg: list of buffers + * @nents: number of buffers to map (returned from dma_map_sg) + * @dir: DMA transfer direction (same as was passed to dma_map_sg) + */ +void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction dir) +{ + struct scatterlist *s; + int i; + + for_each_sg(sg, s, nents, i) { + dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0, + sg_dma_len(s), dir); + } +} +EXPORT_SYMBOL(dma_sync_sg_for_cpu); + +/** + * dma_sync_sg_for_device + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices + * @sg: list of buffers + * @nents: number of buffers to map (returned from dma_map_sg) + * @dir: DMA transfer direction (same as was passed to dma_map_sg) + */ +void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction dir) +{ + struct scatterlist *s; + int i; + + for_each_sg(sg, s, nents, i) { + if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0, + sg_dma_len(s), dir)) + continue; + + if (!arch_is_coherent()) + dma_cache_maint(sg_virt(s), s->length, dir); + } +} +EXPORT_SYMBOL(dma_sync_sg_for_device); diff --git a/arch/arm/mm/extable.c b/arch/arm/mm/extable.c index 9592c3ee4cb..9d285626bc7 100644 --- a/arch/arm/mm/extable.c +++ b/arch/arm/mm/extable.c @@ -2,7 +2,7 @@ * linux/arch/arm/mm/extable.c */ #include <linux/module.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> int fixup_exception(struct pt_regs *regs) { diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index a8ec97b4752..81d0b8772de 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c @@ -17,11 +17,13 @@ #include <linux/init.h> #include <linux/pagemap.h> +#include <asm/bugs.h> #include <asm/cacheflush.h> +#include <asm/cachetype.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> -static unsigned long shared_pte_mask = L_PTE_CACHEABLE; +static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; /* * We take the easy way out of this problem - we make the @@ -63,9 +65,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address) * If this page isn't present, or is already setup to * fault (ie, is old), we can safely ignore any issues. */ - if (ret && pte_val(entry) & shared_pte_mask) { + if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) { flush_cache_page(vma, address, pte_pfn(entry)); - pte_val(entry) &= ~shared_pte_mask; + pte_val(entry) &= ~L_PTE_MT_MASK; + pte_val(entry) |= shared_pte_mask; set_pte_at(vma->vm_mm, address, pte, entry); flush_tlb_page(vma, address); } @@ -197,7 +200,7 @@ void __init check_writebuffer_bugs(void) unsigned long *p1, *p2; pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG| L_PTE_DIRTY|L_PTE_WRITE| - L_PTE_BUFFERABLE); + L_PTE_MT_BUFFERABLE); p1 = vmap(&page, 1, VM_IOREMAP, prot); p2 = vmap(&page, 1, VM_IOREMAP, prot); @@ -218,7 +221,7 @@ void __init check_writebuffer_bugs(void) if (v) { printk("failed, %s\n", reason); - shared_pte_mask |= L_PTE_BUFFERABLE; + shared_pte_mask = L_PTE_MT_UNCACHED; } else { printk("ok\n"); } diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 28ad7ab1c0c..2df8d9facf5 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -13,11 +13,11 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/kprobes.h> +#include <linux/uaccess.h> #include <asm/system.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> -#include <asm/uaccess.h> #include "fault.h" @@ -72,9 +72,8 @@ void show_pte(struct mm_struct *mm, unsigned long addr) } pmd = pmd_offset(pgd, addr); -#if PTRS_PER_PMD != 1 - printk(", *pmd=%08lx", pmd_val(*pmd)); -#endif + if (PTRS_PER_PMD != 1) + printk(", *pmd=%08lx", pmd_val(*pmd)); if (pmd_none(*pmd)) break; diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 029ee65fda2..0fa9bf388f0 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -12,6 +12,7 @@ #include <linux/pagemap.h> #include <asm/cacheflush.h> +#include <asm/cachetype.h> #include <asm/system.h> #include <asm/tlbflush.h> diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 30a69d67d67..82c4b421798 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -26,9 +26,42 @@ #include "mm.h" -extern void _text, _etext, __data_start, _end, __init_begin, __init_end; -extern unsigned long phys_initrd_start; -extern unsigned long phys_initrd_size; +static unsigned long phys_initrd_start __initdata = 0; +static unsigned long phys_initrd_size __initdata = 0; + +static void __init early_initrd(char **p) +{ + unsigned long start, size; + + start = memparse(*p, p); + if (**p == ',') { + size = memparse((*p) + 1, p); + + phys_initrd_start = start; + phys_initrd_size = size; + } +} +__early_param("initrd=", early_initrd); + +static int __init parse_tag_initrd(const struct tag *tag) +{ + printk(KERN_WARNING "ATAG_INITRD is deprecated; " + "please update your bootloader.\n"); + phys_initrd_start = __virt_to_phys(tag->u.initrd.start); + phys_initrd_size = tag->u.initrd.size; + return 0; +} + +__tagtable(ATAG_INITRD, parse_tag_initrd); + +static int __init parse_tag_initrd2(const struct tag *tag) +{ + phys_initrd_start = tag->u.initrd.start; + phys_initrd_size = tag->u.initrd.size; + return 0; +} + +__tagtable(ATAG_INITRD2, parse_tag_initrd2); /* * This is used to pass memory configuration data from paging_init @@ -36,10 +69,6 @@ extern unsigned long phys_initrd_size; */ static struct meminfo meminfo = { 0, }; -#define for_each_nodebank(iter,mi,no) \ - for (iter = 0; iter < mi->nr_banks; iter++) \ - if (mi->bank[iter].node == no) - void show_mem(void) { int free = 0, total = 0, reserved = 0; @@ -50,14 +79,15 @@ void show_mem(void) show_free_areas(); for_each_online_node(node) { pg_data_t *n = NODE_DATA(node); - struct page *map = n->node_mem_map - n->node_start_pfn; + struct page *map = pgdat_page_nr(n, 0) - n->node_start_pfn; for_each_nodebank (i,mi,node) { + struct membank *bank = &mi->bank[i]; unsigned int pfn1, pfn2; struct page *page, *end; - pfn1 = __phys_to_pfn(mi->bank[i].start); - pfn2 = __phys_to_pfn(mi->bank[i].size + mi->bank[i].start); + pfn1 = bank_pfn_start(bank); + pfn2 = bank_pfn_end(bank); page = map + pfn1; end = map + pfn2; @@ -96,17 +126,17 @@ void show_mem(void) static unsigned int __init find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages) { - unsigned int start_pfn, bank, bootmap_pfn; + unsigned int start_pfn, i, bootmap_pfn; start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT; bootmap_pfn = 0; - for_each_nodebank(bank, mi, node) { + for_each_nodebank(i, mi, node) { + struct membank *bank = &mi->bank[i]; unsigned int start, end; - start = mi->bank[bank].start >> PAGE_SHIFT; - end = (mi->bank[bank].size + - mi->bank[bank].start) >> PAGE_SHIFT; + start = bank_pfn_start(bank); + end = bank_pfn_end(bank); if (end < start_pfn) continue; @@ -145,13 +175,10 @@ static int __init check_initrd(struct meminfo *mi) initrd_node = -1; for (i = 0; i < mi->nr_banks; i++) { - unsigned long bank_end; - - bank_end = mi->bank[i].start + mi->bank[i].size; - - if (mi->bank[i].start <= phys_initrd_start && - end <= bank_end) - initrd_node = mi->bank[i].node; + struct membank *bank = &mi->bank[i]; + if (bank_phys_start(bank) <= phys_initrd_start && + end <= bank_phys_end(bank)) + initrd_node = bank->node; } } @@ -171,19 +198,17 @@ static inline void map_memory_bank(struct membank *bank) #ifdef CONFIG_MMU struct map_desc map; - map.pfn = __phys_to_pfn(bank->start); - map.virtual = __phys_to_virt(bank->start); - map.length = bank->size; + map.pfn = bank_pfn_start(bank); + map.virtual = __phys_to_virt(bank_phys_start(bank)); + map.length = bank_phys_size(bank); map.type = MT_MEMORY; create_mapping(&map); #endif } -static unsigned long __init -bootmem_init_node(int node, int initrd_node, struct meminfo *mi) +static unsigned long __init bootmem_init_node(int node, struct meminfo *mi) { - unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; unsigned long start_pfn, end_pfn, boot_pfn; unsigned int boot_pages; pg_data_t *pgdat; @@ -199,8 +224,8 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi) struct membank *bank = &mi->bank[i]; unsigned long start, end; - start = bank->start >> PAGE_SHIFT; - end = (bank->start + bank->size) >> PAGE_SHIFT; + start = bank_pfn_start(bank); + end = bank_pfn_end(bank); if (start_pfn > start) start_pfn = start; @@ -230,8 +255,11 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi) pgdat = NODE_DATA(node); init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn); - for_each_nodebank(i, mi, node) - free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size); + for_each_nodebank(i, mi, node) { + struct membank *bank = &mi->bank[i]; + free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); + memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank)); + } /* * Reserve the bootmem bitmap for this node. @@ -239,31 +267,39 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi) reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); - /* - * Reserve any special node zero regions. - */ - if (node == 0) - reserve_node_zero(pgdat); + return end_pfn; +} +static void __init bootmem_reserve_initrd(int node) +{ #ifdef CONFIG_BLK_DEV_INITRD - /* - * If the initrd is in this node, reserve its memory. - */ - if (node == initrd_node) { - int res = reserve_bootmem_node(pgdat, phys_initrd_start, - phys_initrd_size, BOOTMEM_EXCLUSIVE); - - if (res == 0) { - initrd_start = __phys_to_virt(phys_initrd_start); - initrd_end = initrd_start + phys_initrd_size; - } else { - printk(KERN_ERR - "INITRD: 0x%08lx+0x%08lx overlaps in-use " - "memory region - disabling initrd\n", - phys_initrd_start, phys_initrd_size); - } + pg_data_t *pgdat = NODE_DATA(node); + int res; + + res = reserve_bootmem_node(pgdat, phys_initrd_start, + phys_initrd_size, BOOTMEM_EXCLUSIVE); + + if (res == 0) { + initrd_start = __phys_to_virt(phys_initrd_start); + initrd_end = initrd_start + phys_initrd_size; + } else { + printk(KERN_ERR + "INITRD: 0x%08lx+0x%08lx overlaps in-use " + "memory region - disabling initrd\n", + phys_initrd_start, phys_initrd_size); } #endif +} + +static void __init bootmem_free_node(int node, struct meminfo *mi) +{ + unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; + unsigned long start_pfn, end_pfn; + pg_data_t *pgdat = NODE_DATA(node); + int i; + + start_pfn = pgdat->bdata->node_min_pfn; + end_pfn = pgdat->bdata->node_low_pfn; /* * initialise the zones within this node. @@ -284,7 +320,7 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi) */ zhole_size[0] = zone_size[0]; for_each_nodebank(i, mi, node) - zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; + zhole_size[0] -= bank_pfn_size(&mi->bank[i]); /* * Adjust the sizes according to any special requirements for @@ -293,21 +329,12 @@ bootmem_init_node(int node, int initrd_node, struct meminfo *mi) arch_adjust_zones(node, zone_size, zhole_size); free_area_init_node(node, zone_size, start_pfn, zhole_size); - - return end_pfn; } void __init bootmem_init(struct meminfo *mi) { unsigned long memend_pfn = 0; - int node, initrd_node, i; - - /* - * Invalidate the node number for empty or invalid memory banks - */ - for (i = 0; i < mi->nr_banks; i++) - if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES) - mi->bank[i].node = -1; + int node, initrd_node; memcpy(&meminfo, mi, sizeof(meminfo)); @@ -320,9 +347,19 @@ void __init bootmem_init(struct meminfo *mi) * Run through each node initialising the bootmem allocator. */ for_each_node(node) { - unsigned long end_pfn; + unsigned long end_pfn = bootmem_init_node(node, mi); - end_pfn = bootmem_init_node(node, initrd_node, mi); + /* + * Reserve any special node zero regions. + */ + if (node == 0) + reserve_node_zero(NODE_DATA(node)); + + /* + * If the initrd is in this node, reserve its memory. + */ + if (node == initrd_node) + bootmem_reserve_initrd(node); /* * Remember the highest memory PFN. @@ -331,6 +368,19 @@ void __init bootmem_init(struct meminfo *mi) memend_pfn = end_pfn; } + /* + * sparse_init() needs the bootmem allocator up and running. + */ + sparse_init(); + + /* + * Now free memory in each node - free_area_init_node needs + * the sparse mem_map arrays initialized by sparse_init() + * for memmap_init_zone(), otherwise all PFNs are invalid. + */ + for_each_node(node) + bootmem_free_node(node, mi); + high_memory = __va(memend_pfn << PAGE_SHIFT); /* @@ -401,7 +451,9 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi) * information on the command line. */ for_each_nodebank(i, mi, node) { - bank_start = mi->bank[i].start >> PAGE_SHIFT; + struct membank *bank = &mi->bank[i]; + + bank_start = bank_pfn_start(bank); if (bank_start < prev_bank_end) { printk(KERN_ERR "MEM: unordered memory banks. " "Not freeing memmap.\n"); @@ -415,8 +467,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi) if (prev_bank_end && prev_bank_end != bank_start) free_memmap(node, prev_bank_end, bank_start); - prev_bank_end = (mi->bank[i].start + - mi->bank[i].size) >> PAGE_SHIFT; + prev_bank_end = bank_pfn_end(bank); } } @@ -461,8 +512,8 @@ void __init mem_init(void) num_physpages = 0; for (i = 0; i < meminfo.nr_banks; i++) { - num_physpages += meminfo.bank[i].size >> PAGE_SHIFT; - printk(" %ldMB", meminfo.bank[i].size >> 20); + num_physpages += bank_pfn_size(&meminfo.bank[i]); + printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20); } printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c index 7429f8c0101..ffad039cbb7 100644 --- a/arch/arm/mm/iomap.c +++ b/arch/arm/mm/iomap.c @@ -7,8 +7,7 @@ #include <linux/module.h> #include <linux/pci.h> #include <linux/ioport.h> - -#include <asm/io.h> +#include <linux/io.h> #ifdef __io void __iomem *ioport_map(unsigned long port, unsigned int nr) diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index b81dbf9ffb7..18373f73f2f 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -24,9 +24,10 @@ #include <linux/errno.h> #include <linux/mm.h> #include <linux/vmalloc.h> +#include <linux/io.h> +#include <asm/cputype.h> #include <asm/cacheflush.h> -#include <asm/io.h> #include <asm/mmu_context.h> #include <asm/pgalloc.h> #include <asm/tlbflush.h> @@ -55,8 +56,7 @@ static int remap_area_pte(pmd_t *pmd, unsigned long addr, unsigned long end, if (!pte_none(*pte)) goto bad; - set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), - type->prot_pte_ext); + set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 0); phys_addr += PAGE_SIZE; } while (pte++, addr += PAGE_SIZE, addr != end); return 0; @@ -332,15 +332,14 @@ __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) } EXPORT_SYMBOL(__arm_ioremap); -void __iounmap(volatile void __iomem *addr) +void __iounmap(volatile void __iomem *io_addr) { + void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); #ifndef CONFIG_SMP struct vm_struct **p, *tmp; #endif unsigned int section_mapping = 0; - addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long)addr); - #ifndef CONFIG_SMP /* * If this is a section based mapping we need to handle it @@ -351,7 +350,7 @@ void __iounmap(volatile void __iomem *addr) */ write_lock(&vmlist_lock); for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { - if((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { + if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { if (tmp->flags & VM_ARM_SECTION_MAPPING) { *p = tmp->next; unmap_area_sections((unsigned long)tmp->addr, @@ -366,6 +365,6 @@ void __iounmap(volatile void __iomem *addr) #endif if (!section_mapping) - vunmap((void __force *)addr); + vunmap(addr); } EXPORT_SYMBOL(__iounmap); diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 7647c597fc5..5d9f53907b4 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h @@ -18,7 +18,6 @@ static inline pmd_t *pmd_off_k(unsigned long virt) struct mem_type { unsigned int prot_pte; - unsigned int prot_pte_ext; unsigned int prot_l1; unsigned int prot_sect; unsigned int domain; @@ -35,3 +34,5 @@ struct pglist_data; void __init create_mapping(struct map_desc *md); void __init bootmem_init(struct meminfo *mi); void reserve_node_zero(struct pglist_data *pgdat); + +extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end; diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 3f6dc40b835..5358fcc7f61 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c @@ -6,6 +6,8 @@ #include <linux/mman.h> #include <linux/shm.h> #include <linux/sched.h> +#include <linux/io.h> +#include <asm/cputype.h> #include <asm/system.h> #define COLOUR_ALIGN(addr,pgoff) \ @@ -37,8 +39,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, * caches alias. This is indicated by bits 9 and 21 of the * cache type register. */ - cache_type = read_cpuid(CPUID_CACHETYPE); - if (cache_type != read_cpuid(CPUID_ID)) { + cache_type = read_cpuid_cachetype(); + if (cache_type != read_cpuid_id()) { aliasing = (cache_type | cache_type >> 12) & (1 << 11); if (aliasing) do_align = filp || flags & MAP_SHARED; diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index a713e40e1f1..8ba75406455 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -15,6 +15,7 @@ #include <linux/mman.h> #include <linux/nodemask.h> +#include <asm/cputype.h> #include <asm/mach-types.h> #include <asm/setup.h> #include <asm/sizes.h> @@ -27,9 +28,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); -extern void _stext, _etext, __data_start, _end; -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; - /* * empty_zero_page is a special page that is used for * zero-initialized data and COW. @@ -68,27 +66,27 @@ static struct cachepolicy cache_policies[] __initdata = { .policy = "uncached", .cr_mask = CR_W|CR_C, .pmd = PMD_SECT_UNCACHED, - .pte = 0, + .pte = L_PTE_MT_UNCACHED, }, { .policy = "buffered", .cr_mask = CR_C, .pmd = PMD_SECT_BUFFERED, - .pte = PTE_BUFFERABLE, + .pte = L_PTE_MT_BUFFERABLE, }, { .policy = "writethrough", .cr_mask = 0, .pmd = PMD_SECT_WT, - .pte = PTE_CACHEABLE, + .pte = L_PTE_MT_WRITETHROUGH, }, { .policy = "writeback", .cr_mask = 0, .pmd = PMD_SECT_WB, - .pte = PTE_BUFFERABLE|PTE_CACHEABLE, + .pte = L_PTE_MT_WRITEBACK, }, { .policy = "writealloc", .cr_mask = 0, .pmd = PMD_SECT_WBWA, - .pte = PTE_BUFFERABLE|PTE_CACHEABLE, + .pte = L_PTE_MT_WRITEALLOC, } }; @@ -186,35 +184,28 @@ void adjust_cr(unsigned long mask, unsigned long set) static struct mem_type mem_types[] = { [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ - .prot_pte = PROT_PTE_DEVICE, + .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | + L_PTE_SHARED, .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, .domain = DOMAIN_IO, }, [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ - .prot_pte = PROT_PTE_DEVICE, - .prot_pte_ext = PTE_EXT_TEX(2), + .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), .domain = DOMAIN_IO, }, [MT_DEVICE_CACHED] = { /* ioremap_cached */ - .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE, + .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_CACHED, .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, .domain = DOMAIN_IO, }, - [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */ - .prot_pte = PROT_PTE_DEVICE, - .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE | - PMD_SECT_TEX(1), - .domain = DOMAIN_IO, - }, [MT_DEVICE_WC] = { /* ioremap_wc */ - .prot_pte = PROT_PTE_DEVICE, + .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PROT_SECT_DEVICE, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE, .domain = DOMAIN_IO, }, [MT_CACHECLEAN] = { @@ -259,7 +250,7 @@ static void __init build_mem_type_table(void) { struct cachepolicy *cp; unsigned int cr = get_cr(); - unsigned int user_pgprot, kern_pgprot; + unsigned int user_pgprot, kern_pgprot, vecs_pgprot; int cpu_arch = cpu_architecture(); int i; @@ -277,6 +268,9 @@ static void __init build_mem_type_table(void) cachepolicy = CPOLICY_WRITEBACK; ecc_mask = 0; } +#ifdef CONFIG_SMP + cachepolicy = CPOLICY_WRITEALLOC; +#endif /* * On non-Xscale3 ARMv5-and-older systems, use CB=01 @@ -285,11 +279,8 @@ static void __init build_mem_type_table(void) * in xsc3 parlance, Uncached Normal in ARMv6 parlance). */ if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { - mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1); mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); - } else { - mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE; - mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; + mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE; } /* @@ -312,7 +303,15 @@ static void __init build_mem_type_table(void) } cp = &cache_policies[cachepolicy]; - kern_pgprot = user_pgprot = cp->pte; + vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; + +#ifndef CONFIG_SMP + /* + * Only use write-through for non-SMP systems + */ + if (cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH) + vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte; +#endif /* * Enable CPU-specific coherency if supported. @@ -340,7 +339,6 @@ static void __init build_mem_type_table(void) /* * Mark the device area as "shared device" */ - mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE; mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; #ifdef CONFIG_SMP @@ -349,30 +347,21 @@ static void __init build_mem_type_table(void) */ user_pgprot |= L_PTE_SHARED; kern_pgprot |= L_PTE_SHARED; + vecs_pgprot |= L_PTE_SHARED; mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; #endif } for (i = 0; i < 16; i++) { unsigned long v = pgprot_val(protection_map[i]); - v = (v & ~(L_PTE_BUFFERABLE|L_PTE_CACHEABLE)) | user_pgprot; - protection_map[i] = __pgprot(v); + protection_map[i] = __pgprot(v | user_pgprot); } - mem_types[MT_LOW_VECTORS].prot_pte |= kern_pgprot; - mem_types[MT_HIGH_VECTORS].prot_pte |= kern_pgprot; + mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; + mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; - if (cpu_arch >= CPU_ARCH_ARMv5) { -#ifndef CONFIG_SMP - /* - * Only use write-through for non-SMP systems - */ - mem_types[MT_LOW_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE; - mem_types[MT_HIGH_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE; -#endif - } else { + if (cpu_arch < CPU_ARCH_ARMv5) mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1); - } pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | @@ -420,8 +409,7 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, pte = pte_offset_kernel(pmd, addr); do { - set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), - type->prot_pte_ext); + set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), 0); pfn++; } while (pte++, addr += PAGE_SIZE, addr != end); } @@ -588,12 +576,35 @@ void __init iotable_init(struct map_desc *io_desc, int nr) create_mapping(io_desc + i); } +static unsigned long __initdata vmalloc_reserve = SZ_128M; + +/* + * vmalloc=size forces the vmalloc area to be exactly 'size' + * bytes. This can be used to increase (or decrease) the vmalloc + * area - the default is 128m. + */ +static void __init early_vmalloc(char **arg) +{ + vmalloc_reserve = memparse(*arg, arg); + + if (vmalloc_reserve < SZ_16M) { + vmalloc_reserve = SZ_16M; + printk(KERN_WARNING + "vmalloc area too small, limiting to %luMB\n", + vmalloc_reserve >> 20); + } +} +__early_param("vmalloc=", early_vmalloc); + +#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve) + static int __init check_membank_valid(struct membank *mb) { /* - * Check whether this memory region has non-zero size. + * Check whether this memory region has non-zero size or + * invalid node number. */ - if (mb->size == 0) + if (mb->size == 0 || mb->node >= MAX_NUMNODES) return 0; /* @@ -627,8 +638,7 @@ static int __init check_membank_valid(struct membank *mb) static void __init sanity_check_meminfo(struct meminfo *mi) { - int i; - int j; + int i, j; for (i = 0, j = 0; i < mi->nr_banks; i++) { if (check_membank_valid(&mi->bank[i])) diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 63c62fdea52..07b62b23897 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -7,16 +7,14 @@ #include <linux/mm.h> #include <linux/pagemap.h> #include <linux/bootmem.h> +#include <linux/io.h> #include <asm/cacheflush.h> -#include <asm/io.h> #include <asm/page.h> #include <asm/mach/arch.h> #include "mm.h" -extern void _stext, __data_start, _end; - /* * Reserve the various regions of node 0 */ @@ -43,12 +41,26 @@ void __init reserve_node_zero(pg_data_t *pgdat) BOOTMEM_DEFAULT); } +static void __init sanity_check_meminfo(struct meminfo *mi) +{ + int i, j; + + for (i = 0, j = 0; i < mi->nr_banks; i++) { + struct membank *mb = &mi->bank[i]; + + if (mb->size != 0 && mb->node < MAX_NUMNODES) + mi->bank[j++] = mi->bank[i]; + } + mi->nr_banks = j; +} + /* * paging_init() sets up the page tables, initialises the zone memory * maps, and sets up the zero page, bad page and bad page tables. */ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) { + sanity_check_meminfo(mi); bootmem_init(mi); } diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 5673f4d6113..b5551bf010a 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -29,7 +29,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> @@ -399,29 +399,7 @@ ENTRY(cpu_arm1020_switch_mm) .align 5 ENTRY(cpu_arm1020_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r1, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 4 diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 4343fdb0e9e..8bc6740c29e 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -29,7 +29,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> @@ -383,29 +383,7 @@ ENTRY(cpu_arm1020e_switch_mm) .align 5 ENTRY(cpu_arm1020e_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r1, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 2a4ea1659e9..2cd03e66c0a 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S @@ -18,7 +18,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> @@ -365,29 +365,7 @@ ENTRY(cpu_arm1022_switch_mm) .align 5 ENTRY(cpu_arm1022_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r1, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 77a1babd421..ad961a897f6 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -18,7 +18,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> @@ -354,29 +354,7 @@ ENTRY(cpu_arm1026_switch_mm) .align 5 ENTRY(cpu_arm1026_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r1, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_DISABLE mcr p15, 0, r0, c7, c10, 1 @ clean D entry diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index c371fc87776..80d6e1de069 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S @@ -15,11 +15,13 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> +#include "proc-macros.S" + ENTRY(cpu_arm6_dcache_clean_area) ENTRY(cpu_arm7_dcache_clean_area) mov pc, lr @@ -214,30 +216,13 @@ ENTRY(cpu_arm7_switch_mm) * : r1 = value to set * Purpose : Set a PTE and flush it out of any WB cache */ - .align 5 + .align 5 ENTRY(cpu_arm6_set_pte_ext) ENTRY(cpu_arm7_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young - movne r2, #0 - - str r2, [r0] @ hardware version + armv3_set_pte_ext wc_disable=0 #endif /* CONFIG_MMU */ - mov pc, lr + mov pc, lr /* * Function: _arm6_7_reset diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index eda733d3045..85ae18695f1 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S @@ -36,7 +36,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> @@ -93,29 +93,12 @@ ENTRY(cpu_arm720_switch_mm) * : r1 = value to set * Purpose : Set a PTE and flush it out of any WB cache */ - .align 5 + .align 5 ENTRY(cpu_arm720_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young - movne r2, #0 - - str r2, [r0] @ hardware version + armv3_set_pte_ext wc_disable=0 #endif - mov pc, lr + mov pc, lr /* * Function: arm720_reset diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index 3a57376c8bc..4f95bee63e9 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S @@ -12,7 +12,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S index 7b3ecdeb537..93e05fa7bed 100644 --- a/arch/arm/mm/proc-arm7tdmi.S +++ b/arch/arm/mm/proc-arm7tdmi.S @@ -12,7 +12,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 28cdb060df4..914d688394f 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S @@ -28,7 +28,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -351,33 +351,11 @@ ENTRY(cpu_arm920_switch_mm) .align 5 ENTRY(cpu_arm920_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r2, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB -#endif /* CONFIG_MMU */ +#endif mov pc, lr __INIT diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 94ddcb4a4b7..51c9c9859e5 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S @@ -29,7 +29,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -355,29 +355,7 @@ ENTRY(cpu_arm922_switch_mm) .align 5 ENTRY(cpu_arm922_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r2, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index d045812f339..2724526d89c 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -52,7 +52,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -398,29 +398,7 @@ ENTRY(cpu_arm925_switch_mm) .align 5 ENTRY(cpu_arm925_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r2, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c10, 1 @ clean D entry diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 4cd33169a7c..54466937bff 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -28,7 +28,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -359,29 +359,7 @@ ENTRY(cpu_arm926_switch_mm) .align 5 ENTRY(cpu_arm926_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - -#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH - eor r3, r2, #0x0a @ C & small page? - tst r3, #0x0b - biceq r2, r2, #4 -#endif - str r2, [r0] @ hardware version + armv3_set_pte_ext mov r0, r0 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c10, 1 @ clean D entry diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 551244d5ca1..f595117caf5 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -11,7 +11,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 6168c6160de..e03f6ff1fb2 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -13,7 +13,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S index c85c1f50e39..be6c11d2b3f 100644 --- a/arch/arm/mm/proc-arm9tdmi.S +++ b/arch/arm/mm/proc-arm9tdmi.S @@ -12,7 +12,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/ptrace.h> diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index f2e5884c513..0fe1f8fc348 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -22,7 +22,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -80,7 +80,8 @@ ENTRY(cpu_feroceon_proc_fin) msr cpsr_c, ip bl feroceon_flush_kern_cache_all -#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) +#if defined(CONFIG_CACHE_FEROCEON_L2) && \ + !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) mov r0, #0 mcr p15, 1, r0, c15, c9, 0 @ clean L2 mcr p15, 0, r0, c7, c10, 4 @ drain WB @@ -389,7 +390,8 @@ ENTRY(feroceon_range_cache_fns) .align 5 ENTRY(cpu_feroceon_dcache_clean_area) -#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) +#if defined(CONFIG_CACHE_FEROCEON_L2) && \ + !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) mov r2, r0 mov r3, r1 #endif @@ -397,7 +399,8 @@ ENTRY(cpu_feroceon_dcache_clean_area) add r0, r0, #CACHE_DLINESIZE subs r1, r1, #CACHE_DLINESIZE bhi 1b -#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) +#if defined(CONFIG_CACHE_FEROCEON_L2) && \ + !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry add r2, r2, #CACHE_DLINESIZE subs r3, r3, #CACHE_DLINESIZE @@ -446,27 +449,11 @@ ENTRY(cpu_feroceon_switch_mm) .align 5 ENTRY(cpu_feroceon_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - - str r2, [r0] @ hardware version + armv3_set_pte_ext wc_disable=0 mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry -#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) +#if defined(CONFIG_CACHE_FEROCEON_L2) && \ + !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry #endif mcr p15, 0, r0, c7, c10, 4 @ drain WB diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index b13150052a7..54b1f721dec 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -71,3 +71,173 @@ mov \reg, #16 @ size offset mov \reg, \reg, lsl \tmp @ actual cache line size .endm + + +/* + * Sanity check the PTE configuration for the code below - which makes + * certain assumptions about how these bits are layed out. + */ +#if L_PTE_SHARED != PTE_EXT_SHARED +#error PTE shared bit mismatch +#endif +#if L_PTE_BUFFERABLE != PTE_BUFFERABLE +#error PTE bufferable bit mismatch +#endif +#if L_PTE_CACHEABLE != PTE_CACHEABLE +#error PTE cacheable bit mismatch +#endif +#if (L_PTE_EXEC+L_PTE_USER+L_PTE_WRITE+L_PTE_DIRTY+L_PTE_YOUNG+\ + L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED +#error Invalid Linux PTE bit settings +#endif + +/* + * The ARMv6 and ARMv7 set_pte_ext translation function. + * + * Permission translation: + * YUWD APX AP1 AP0 SVC User + * 0xxx 0 0 0 no acc no acc + * 100x 1 0 1 r/o no acc + * 10x0 1 0 1 r/o no acc + * 1011 0 0 1 r/w no acc + * 110x 0 1 0 r/w r/o + * 11x0 0 1 0 r/w r/o + * 1111 0 1 1 r/w r/w + */ + .macro armv6_mt_table pfx +\pfx\()_mt_table: + .long 0x00 @ L_PTE_MT_UNCACHED + .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE + .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK + .long PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED + .long 0x00 @ unused + .long 0x00 @ L_PTE_MT_MINICACHE (not present) + .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC + .long 0x00 @ unused + .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC + .long 0x00 @ unused + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED + .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED + .long 0x00 @ unused + .long 0x00 @ unused + .long 0x00 @ unused + .endm + + .macro armv6_set_pte_ext pfx + str r1, [r0], #-2048 @ linux version + + bic r3, r1, #0x000003fc + bic r3, r3, #PTE_TYPE_MASK + orr r3, r3, r2 + orr r3, r3, #PTE_EXT_AP0 | 2 + + adr ip, \pfx\()_mt_table + and r2, r1, #L_PTE_MT_MASK + ldr r2, [ip, r2] + + tst r1, #L_PTE_WRITE + tstne r1, #L_PTE_DIRTY + orreq r3, r3, #PTE_EXT_APX + + tst r1, #L_PTE_USER + orrne r3, r3, #PTE_EXT_AP1 + tstne r3, #PTE_EXT_APX + bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 + + tst r1, #L_PTE_EXEC + orreq r3, r3, #PTE_EXT_XN + + orr r3, r3, r2 + + tst r1, #L_PTE_YOUNG + tstne r1, #L_PTE_PRESENT + moveq r3, #0 + + str r3, [r0] + mcr p15, 0, r0, c7, c10, 1 @ flush_pte + .endm + + +/* + * The ARMv3, ARMv4 and ARMv5 set_pte_ext translation function, + * covering most CPUs except Xscale and Xscale 3. + * + * Permission translation: + * YUWD AP SVC User + * 0xxx 0x00 no acc no acc + * 100x 0x00 r/o no acc + * 10x0 0x00 r/o no acc + * 1011 0x55 r/w no acc + * 110x 0xaa r/w r/o + * 11x0 0xaa r/w r/o + * 1111 0xff r/w r/w + */ + .macro armv3_set_pte_ext wc_disable=1 + str r1, [r0], #-2048 @ linux version + + eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY + + bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits + bic r2, r2, #PTE_TYPE_MASK + orr r2, r2, #PTE_TYPE_SMALL + + tst r3, #L_PTE_USER @ user? + orrne r2, r2, #PTE_SMALL_AP_URO_SRW + + tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? + orreq r2, r2, #PTE_SMALL_AP_UNO_SRW + + tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young? + movne r2, #0 + + .if \wc_disable +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + tst r2, #PTE_CACHEABLE + bicne r2, r2, #PTE_BUFFERABLE +#endif + .endif + str r2, [r0] @ hardware version + .endm + + +/* + * Xscale set_pte_ext translation, split into two halves to cope + * with work-arounds. r3 must be preserved by code between these + * two macros. + * + * Permission translation: + * YUWD AP SVC User + * 0xxx 00 no acc no acc + * 100x 00 r/o no acc + * 10x0 00 r/o no acc + * 1011 01 r/w no acc + * 110x 10 r/w r/o + * 11x0 10 r/w r/o + * 1111 11 r/w r/w + */ + .macro xscale_set_pte_ext_prologue + str r1, [r0], #-2048 @ linux version + + eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY + + bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits + orr r2, r2, #PTE_TYPE_EXT @ extended page + + tst r3, #L_PTE_USER @ user? + orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w + + tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? + orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w + @ combined with user -> user r/w + .endm + + .macro xscale_set_pte_ext_epilogue + tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young? + movne r2, #0 @ no -> fault + + str r2, [r0] @ hardware version + mov ip, #0 + mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line + mcr p15, 0, ip, c7, c10, 4 @ data write barrier + .endm diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index bbe10576c86..90a7e5279f2 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S @@ -17,7 +17,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <mach/hardware.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> @@ -153,24 +153,7 @@ ENTRY(cpu_sa110_switch_mm) .align 5 ENTRY(cpu_sa110_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - - str r2, [r0] @ hardware version + armv3_set_pte_ext wc_disable=0 mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 871ba018252..451e2d953e2 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S @@ -22,7 +22,7 @@ #include <linux/init.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <mach/hardware.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> @@ -166,24 +166,7 @@ ENTRY(cpu_sa1100_switch_mm) .align 5 ENTRY(cpu_sa1100_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - bic r2, r1, #PTE_SMALL_AP_MASK - bic r2, r2, #PTE_TYPE_MASK - orr r2, r2, #PTE_TYPE_SMALL - - tst r1, #L_PTE_USER @ User? - orrne r2, r2, #PTE_SMALL_AP_URO_SRW - - tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_SMALL_AP_UNO_SRW - - tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 - - str r2, [r0] @ hardware version + armv3_set_pte_ext wc_disable=0 mov r0, r0 mcr p15, 0, r0, c7, c10, 1 @ clean D entry mcr p15, 0, r0, c7, c10, 4 @ drain WB diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 5702ec58b2a..294943b8597 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -13,7 +13,7 @@ #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> @@ -114,46 +114,12 @@ ENTRY(cpu_v6_switch_mm) * (hardware version is stored at -1024 bytes) * - pte - PTE value to store * - ext - value for extended PTE bits - * - * Permissions: - * YUWD APX AP1 AP0 SVC User - * 0xxx 0 0 0 no acc no acc - * 100x 1 0 1 r/o no acc - * 10x0 1 0 1 r/o no acc - * 1011 0 0 1 r/w no acc - * 110x 0 1 0 r/w r/o - * 11x0 0 1 0 r/w r/o - * 1111 0 1 1 r/w r/w */ + armv6_mt_table cpu_v6 + ENTRY(cpu_v6_set_pte_ext) #ifdef CONFIG_MMU - str r1, [r0], #-2048 @ linux version - - bic r3, r1, #0x000003f0 - bic r3, r3, #0x00000003 - orr r3, r3, r2 - orr r3, r3, #PTE_EXT_AP0 | 2 - - tst r1, #L_PTE_WRITE - tstne r1, #L_PTE_DIRTY - orreq r3, r3, #PTE_EXT_APX - - tst r1, #L_PTE_USER - orrne r3, r3, #PTE_EXT_AP1 - tstne r3, #PTE_EXT_APX - bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 - - tst r1, #L_PTE_YOUNG - biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK - - tst r1, #L_PTE_EXEC - orreq r3, r3, #PTE_EXT_XN - - tst r1, #L_PTE_PRESENT - moveq r3, #0 - - str r3, [r0] - mcr p15, 0, r0, c7, c10, 1 @ flush_pte + armv6_set_pte_ext cpu_v6 #endif mov pc, lr diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index b49f9a4c82c..34e42404192 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -12,7 +12,7 @@ #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> @@ -25,9 +25,11 @@ ENTRY(cpu_v7_proc_init) mov pc, lr +ENDPROC(cpu_v7_proc_init) ENTRY(cpu_v7_proc_fin) mov pc, lr +ENDPROC(cpu_v7_proc_fin) /* * cpu_v7_reset(loc) @@ -43,6 +45,7 @@ ENTRY(cpu_v7_proc_fin) .align 5 ENTRY(cpu_v7_reset) mov pc, r0 +ENDPROC(cpu_v7_reset) /* * cpu_v7_do_idle() @@ -52,8 +55,9 @@ ENTRY(cpu_v7_reset) * IRQs are already disabled. */ ENTRY(cpu_v7_do_idle) - .long 0xe320f003 @ ARM V7 WFI instruction + wfi mov pc, lr +ENDPROC(cpu_v7_do_idle) ENTRY(cpu_v7_dcache_clean_area) #ifndef TLB_CAN_READ_FROM_L1_CACHE @@ -65,6 +69,7 @@ ENTRY(cpu_v7_dcache_clean_area) dsb #endif mov pc, lr +ENDPROC(cpu_v7_dcache_clean_area) /* * cpu_v7_switch_mm(pgd_phys, tsk) @@ -89,6 +94,7 @@ ENTRY(cpu_v7_switch_mm) isb #endif mov pc, lr +ENDPROC(cpu_v7_switch_mm) /* * cpu_v7_set_pte_ext(ptep, pte) @@ -99,26 +105,19 @@ ENTRY(cpu_v7_switch_mm) * (hardware version is stored at -1024 bytes) * - pte - PTE value to store * - ext - value for extended PTE bits - * - * Permissions: - * YUWD APX AP1 AP0 SVC User - * 0xxx 0 0 0 no acc no acc - * 100x 1 0 1 r/o no acc - * 10x0 1 0 1 r/o no acc - * 1011 0 0 1 r/w no acc - * 110x 0 1 0 r/w r/o - * 11x0 0 1 0 r/w r/o - * 1111 0 1 1 r/w r/w */ ENTRY(cpu_v7_set_pte_ext) #ifdef CONFIG_MMU str r1, [r0], #-2048 @ linux version bic r3, r1, #0x000003f0 - bic r3, r3, #0x00000003 + bic r3, r3, #PTE_TYPE_MASK orr r3, r3, r2 orr r3, r3, #PTE_EXT_AP0 | 2 + tst r2, #1 << 4 + orrne r3, r3, #PTE_EXT_TEX(1) + tst r1, #L_PTE_WRITE tstne r1, #L_PTE_DIRTY orreq r3, r3, #PTE_EXT_APX @@ -128,19 +127,18 @@ ENTRY(cpu_v7_set_pte_ext) tstne r3, #PTE_EXT_APX bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 - tst r1, #L_PTE_YOUNG - biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK - tst r1, #L_PTE_EXEC orreq r3, r3, #PTE_EXT_XN - tst r1, #L_PTE_PRESENT + tst r1, #L_PTE_YOUNG + tstne r1, #L_PTE_PRESENT moveq r3, #0 str r3, [r0] mcr p15, 0, r0, c7, c10, 1 @ flush_pte #endif mov pc, lr +ENDPROC(cpu_v7_set_pte_ext) cpu_v7_name: .ascii "ARMv7 Processor" @@ -182,12 +180,17 @@ __v7_setup: mov r10, #0x1f @ domains 0, 1 = manager mcr p15, 0, r10, c3, c0, 0 @ load domain access register #endif + ldr r5, =0x40e040e0 + ldr r6, =0xff0aa1a8 + mcr p15, 0, r5, c10, c2, 0 @ write PRRR + mcr p15, 0, r6, c10, c2, 1 @ write NMRR adr r5, v7_crval ldmia r5, {r5, r6} mrc p15, 0, r0, c1, c0, 0 @ read control register bic r0, r0, r5 @ clear bits them orr r0, r0, r6 @ set them mov pc, lr @ return to head.S:__ret +ENDPROC(__v7_setup) /* * V X F I D LR @@ -197,7 +200,7 @@ __v7_setup: */ .type v7_crval, #object v7_crval: - crval clear=0x0120c302, mmuset=0x00c0387d, ucset=0x00c0187c + crval clear=0x0120c302, mmuset=0x10c0387d, ucset=0x00c0187c __v7_setup_stack: .space 4 * 11 @ 11 registers diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 7bd9e7197f6..04dc8b65401 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -27,7 +27,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <mach/hardware.h> #include <asm/pgtable.h> #include <asm/pgtable-hwdef.h> @@ -345,38 +345,38 @@ ENTRY(cpu_xsc3_switch_mm) * cpu_xsc3_set_pte_ext(ptep, pte, ext) * * Set a PTE and flush it out - * */ +cpu_xsc3_mt_table: + .long 0x00 @ L_PTE_MT_UNCACHED + .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE + .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK + .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED + .long 0x00 @ unused + .long 0x00 @ L_PTE_MT_MINICACHE (not present) + .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?) + .long 0x00 @ unused + .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC + .long 0x00 @ unused + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED + .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED + .long 0x00 @ unused + .long 0x00 @ unused + .long 0x00 @ unused + .align 5 ENTRY(cpu_xsc3_set_pte_ext) - str r1, [r0], #-2048 @ linux version + xscale_set_pte_ext_prologue - bic r2, r1, #0xff0 @ keep C, B bits - orr r2, r2, #PTE_TYPE_EXT @ extended page tst r1, #L_PTE_SHARED @ shared? - orrne r2, r2, #0x200 - - eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - tst r3, #L_PTE_USER @ user? - orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w - - tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty? - orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w - @ combined with user -> user r/w - - @ If it's cacheable, it needs to be in L2 also. - eor ip, r1, #L_PTE_CACHEABLE - tst ip, #L_PTE_CACHEABLE - orreq r2, r2, #PTE_EXT_TEX(0x5) - - tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young? - movne r2, #0 @ no -> fault - - str r2, [r0] @ hardware version - mov ip, #0 - mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line - mcr p15, 0, ip, c7, c10, 4 @ data write barrier + and r1, r1, #L_PTE_MT_MASK + adr ip, cpu_xsc3_mt_table + ldr ip, [ip, r1] + orrne r2, r2, #PTE_EXT_COHERENT @ interlock: mask in coherent bit + bic r2, r2, #0x0c @ clear old C,B bits + orr r2, r2, ip + + xscale_set_pte_ext_epilogue mov pc, lr .ltorg diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 2dd85273976..0cce37b9393 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -23,7 +23,7 @@ #include <linux/linkage.h> #include <linux/init.h> #include <asm/assembler.h> -#include <asm/elf.h> +#include <asm/hwcap.h> #include <asm/pgtable.h> #include <asm/pgtable-hwdef.h> #include <asm/page.h> @@ -406,8 +406,6 @@ ENTRY(cpu_xscale_dcache_clean_area) /* =============================== PageTable ============================== */ -#define PTE_CACHE_WRITE_ALLOCATE 0 - /* * cpu_xscale_switch_mm(pgd) * @@ -431,56 +429,42 @@ ENTRY(cpu_xscale_switch_mm) * * Errata 40: must set memory to write-through for user read-only pages. */ +cpu_xscale_mt_table: + .long 0x00 @ L_PTE_MT_UNCACHED + .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE + .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK + .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED + .long 0x00 @ unused + .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE + .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC + .long 0x00 @ unused + .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC + .long 0x00 @ unused + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED + .long 0x00 @ L_PTE_MT_DEV_NONSHARED + .long 0x00 @ unused + .long 0x00 @ unused + .long 0x00 @ unused + .align 5 ENTRY(cpu_xscale_set_pte_ext) - str r1, [r0], #-2048 @ linux version - - bic r2, r1, #0xff0 - orr r2, r2, #PTE_TYPE_EXT @ extended page - - eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - tst r3, #L_PTE_USER @ User? - orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w - - tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w - @ combined with user -> user r/w - - @ - @ Handle the X bit. We want to set this bit for the minicache - @ (U = E = B = W = 0, C = 1) or when write allocate is enabled, - @ and we have a writeable, cacheable region. If we ignore the - @ U and E bits, we can allow user space to use the minicache as - @ well. - @ - @ X = (C & ~W & ~B) | (C & W & B & write_allocate) - @ - eor ip, r1, #L_PTE_CACHEABLE - tst ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE -#if PTE_CACHE_WRITE_ALLOCATE - eorne ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE - tstne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE -#endif - orreq r2, r2, #PTE_EXT_TEX(1) + xscale_set_pte_ext_prologue @ - @ Erratum 40: The B bit must be cleared for a user read-only - @ cacheable page. - @ - @ B = B & ~(U & C & ~W) + @ Erratum 40: must set memory to write-through for user read-only pages @ - and ip, r1, #L_PTE_USER | L_PTE_WRITE | L_PTE_CACHEABLE - teq ip, #L_PTE_USER | L_PTE_CACHEABLE - biceq r2, r2, #PTE_BUFFERABLE + and ip, r1, #(L_PTE_MT_MASK | L_PTE_USER | L_PTE_WRITE) & ~(4 << 2) + teq ip, #L_PTE_MT_WRITEBACK | L_PTE_USER - tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 @ no -> fault + moveq r1, #L_PTE_MT_WRITETHROUGH + and r1, r1, #L_PTE_MT_MASK + adr ip, cpu_xscale_mt_table + ldr ip, [ip, r1] + bic r2, r2, #0x0c + orr r2, r2, ip - str r2, [r0] @ hardware version - mov ip, #0 - mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line - mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer + xscale_set_pte_ext_epilogue mov pc, lr diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index b56dda8052f..24ba5109f2e 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S @@ -51,6 +51,7 @@ ENTRY(v7wbi_flush_user_tlb_range) mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB dsb mov pc, lr +ENDPROC(v7wbi_flush_user_tlb_range) /* * v7wbi_flush_kern_tlb_range(start,end) @@ -77,6 +78,7 @@ ENTRY(v7wbi_flush_kern_tlb_range) dsb isb mov pc, lr +ENDPROC(v7wbi_flush_kern_tlb_range) .section ".text.init", #alloc, #execinstr diff --git a/arch/arm/nwfpe/fpa11_cpdt.c b/arch/arm/nwfpe/fpa11_cpdt.c index 79f8e67cc6c..d31c49f953b 100644 --- a/arch/arm/nwfpe/fpa11_cpdt.c +++ b/arch/arm/nwfpe/fpa11_cpdt.c @@ -26,7 +26,7 @@ #include "fpmodule.h" #include "fpmodule.inl" -#include <asm/uaccess.h> +#include <linux/uaccess.h> static inline void loadSingle(const unsigned int Fn, const unsigned int __user *pMem) { diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile index e61d0cc520b..88e31f549f5 100644 --- a/arch/arm/oprofile/Makefile +++ b/arch/arm/oprofile/Makefile @@ -11,3 +11,4 @@ oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o +oprofile-$(CONFIG_OPROFILE_ARMV7) += op_model_v7.o diff --git a/arch/arm/oprofile/backtrace.c b/arch/arm/oprofile/backtrace.c index f5ebf30151f..cefc21c2eee 100644 --- a/arch/arm/oprofile/backtrace.c +++ b/arch/arm/oprofile/backtrace.c @@ -16,8 +16,8 @@ #include <linux/oprofile.h> #include <linux/sched.h> #include <linux/mm.h> +#include <linux/uaccess.h> #include <asm/ptrace.h> -#include <asm/uaccess.h> #include "../kernel/stacktrace.h" diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c index 0a5cf3a6438..3fcd752d614 100644 --- a/arch/arm/oprofile/common.c +++ b/arch/arm/oprofile/common.c @@ -145,6 +145,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) spec = &op_mpcore_spec; #endif +#ifdef CONFIG_OPROFILE_ARMV7 + spec = &op_armv7_spec; +#endif + if (spec) { ret = spec->init(); if (ret < 0) diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h index 4899c629aa0..8c4e4f6a1de 100644 --- a/arch/arm/oprofile/op_arm_model.h +++ b/arch/arm/oprofile/op_arm_model.h @@ -26,6 +26,7 @@ extern struct op_arm_model_spec op_xscale_spec; extern struct op_arm_model_spec op_armv6_spec; extern struct op_arm_model_spec op_mpcore_spec; +extern struct op_arm_model_spec op_armv7_spec; extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth); diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c index 92db6e035c6..4de366e8b4c 100644 --- a/arch/arm/oprofile/op_model_mpcore.c +++ b/arch/arm/oprofile/op_model_mpcore.c @@ -36,8 +36,8 @@ #include <linux/oprofile.h> #include <linux/interrupt.h> #include <linux/smp.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <mach/hardware.h> diff --git a/arch/arm/oprofile/op_model_v7.c b/arch/arm/oprofile/op_model_v7.c new file mode 100644 index 00000000000..f20295f14ad --- /dev/null +++ b/arch/arm/oprofile/op_model_v7.c @@ -0,0 +1,411 @@ +/** + * op_model_v7.c + * ARM V7 (Cortex A8) Event Monitor Driver + * + * Copyright 2008 Jean Pihet <jpihet@mvista.com> + * Copyright 2004 ARM SMP Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/oprofile.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/smp.h> + +#include "op_counter.h" +#include "op_arm_model.h" +#include "op_model_v7.h" + +/* #define DEBUG */ + + +/* + * ARM V7 PMNC support + */ + +static u32 cnt_en[CNTMAX]; + +static inline void armv7_pmnc_write(u32 val) +{ + val &= PMNC_MASK; + asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val)); +} + +static inline u32 armv7_pmnc_read(void) +{ + u32 val; + + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val)); + return val; +} + +static inline u32 armv7_pmnc_enable_counter(unsigned int cnt) +{ + u32 val; + + if (cnt >= CNTMAX) { + printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter" + " %d\n", smp_processor_id(), cnt); + return -1; + } + + if (cnt == CCNT) + val = CNTENS_C; + else + val = (1 << (cnt - CNT0)); + + val &= CNTENS_MASK; + asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val)); + + return cnt; +} + +static inline u32 armv7_pmnc_disable_counter(unsigned int cnt) +{ + u32 val; + + if (cnt >= CNTMAX) { + printk(KERN_ERR "oprofile: CPU%u disabling wrong PMNC counter" + " %d\n", smp_processor_id(), cnt); + return -1; + } + + if (cnt == CCNT) + val = CNTENC_C; + else + val = (1 << (cnt - CNT0)); + + val &= CNTENC_MASK; + asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val)); + + return cnt; +} + +static inline u32 armv7_pmnc_enable_intens(unsigned int cnt) +{ + u32 val; + + if (cnt >= CNTMAX) { + printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter" + " interrupt enable %d\n", smp_processor_id(), cnt); + return -1; + } + + if (cnt == CCNT) + val = INTENS_C; + else + val = (1 << (cnt - CNT0)); + + val &= INTENS_MASK; + asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val)); + + return cnt; +} + +static inline u32 armv7_pmnc_getreset_flags(void) +{ + u32 val; + + /* Read */ + asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); + + /* Write to clear flags */ + val &= FLAG_MASK; + asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val)); + + return val; +} + +static inline int armv7_pmnc_select_counter(unsigned int cnt) +{ + u32 val; + + if ((cnt == CCNT) || (cnt >= CNTMAX)) { + printk(KERN_ERR "oprofile: CPU%u selecting wrong PMNC counteri" + " %d\n", smp_processor_id(), cnt); + return -1; + } + + val = (cnt - CNT0) & SELECT_MASK; + asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); + + return cnt; +} + +static inline void armv7_pmnc_write_evtsel(unsigned int cnt, u32 val) +{ + if (armv7_pmnc_select_counter(cnt) == cnt) { + val &= EVTSEL_MASK; + asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val)); + } +} + +static void armv7_pmnc_reset_counter(unsigned int cnt) +{ + u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt); + u32 val = -(u32)counter_config[cpu_cnt].count; + + switch (cnt) { + case CCNT: + armv7_pmnc_disable_counter(cnt); + + asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val)); + + if (cnt_en[cnt] != 0) + armv7_pmnc_enable_counter(cnt); + + break; + + case CNT0: + case CNT1: + case CNT2: + case CNT3: + armv7_pmnc_disable_counter(cnt); + + if (armv7_pmnc_select_counter(cnt) == cnt) + asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val)); + + if (cnt_en[cnt] != 0) + armv7_pmnc_enable_counter(cnt); + + break; + + default: + printk(KERN_ERR "oprofile: CPU%u resetting wrong PMNC counter" + " %d\n", smp_processor_id(), cnt); + break; + } +} + +int armv7_setup_pmnc(void) +{ + unsigned int cnt; + + if (armv7_pmnc_read() & PMNC_E) { + printk(KERN_ERR "oprofile: CPU%u PMNC still enabled when setup" + " new event counter.\n", smp_processor_id()); + return -EBUSY; + } + + /* + * Initialize & Reset PMNC: C bit, D bit and P bit. + * Note: Using a slower count for CCNT (D bit: divide by 64) results + * in a more stable system + */ + armv7_pmnc_write(PMNC_P | PMNC_C | PMNC_D); + + + for (cnt = CCNT; cnt < CNTMAX; cnt++) { + unsigned long event; + u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt); + + /* + * Disable counter + */ + armv7_pmnc_disable_counter(cnt); + cnt_en[cnt] = 0; + + if (!counter_config[cpu_cnt].enabled) + continue; + + event = counter_config[cpu_cnt].event & 255; + + /* + * Set event (if destined for PMNx counters) + * We don't need to set the event if it's a cycle count + */ + if (cnt != CCNT) + armv7_pmnc_write_evtsel(cnt, event); + + /* + * Enable interrupt for this counter + */ + armv7_pmnc_enable_intens(cnt); + + /* + * Reset counter + */ + armv7_pmnc_reset_counter(cnt); + + /* + * Enable counter + */ + armv7_pmnc_enable_counter(cnt); + cnt_en[cnt] = 1; + } + + return 0; +} + +static inline void armv7_start_pmnc(void) +{ + armv7_pmnc_write(armv7_pmnc_read() | PMNC_E); +} + +static inline void armv7_stop_pmnc(void) +{ + armv7_pmnc_write(armv7_pmnc_read() & ~PMNC_E); +} + +/* + * CPU counters' IRQ handler (one IRQ per CPU) + */ +static irqreturn_t armv7_pmnc_interrupt(int irq, void *arg) +{ + struct pt_regs *regs = get_irq_regs(); + unsigned int cnt; + u32 flags; + + + /* + * Stop IRQ generation + */ + armv7_stop_pmnc(); + + /* + * Get and reset overflow status flags + */ + flags = armv7_pmnc_getreset_flags(); + + /* + * Cycle counter + */ + if (flags & FLAG_C) { + u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), CCNT); + armv7_pmnc_reset_counter(CCNT); + oprofile_add_sample(regs, cpu_cnt); + } + + /* + * PMNC counters 0:3 + */ + for (cnt = CNT0; cnt < CNTMAX; cnt++) { + if (flags & (1 << (cnt - CNT0))) { + u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt); + armv7_pmnc_reset_counter(cnt); + oprofile_add_sample(regs, cpu_cnt); + } + } + + /* + * Allow IRQ generation + */ + armv7_start_pmnc(); + + return IRQ_HANDLED; +} + +int armv7_request_interrupts(int *irqs, int nr) +{ + unsigned int i; + int ret = 0; + + for (i = 0; i < nr; i++) { + ret = request_irq(irqs[i], armv7_pmnc_interrupt, + IRQF_DISABLED, "CP15 PMNC", NULL); + if (ret != 0) { + printk(KERN_ERR "oprofile: unable to request IRQ%u" + " for ARMv7\n", + irqs[i]); + break; + } + } + + if (i != nr) + while (i-- != 0) + free_irq(irqs[i], NULL); + + return ret; +} + +void armv7_release_interrupts(int *irqs, int nr) +{ + unsigned int i; + + for (i = 0; i < nr; i++) + free_irq(irqs[i], NULL); +} + +#ifdef DEBUG +static void armv7_pmnc_dump_regs(void) +{ + u32 val; + unsigned int cnt; + + printk(KERN_INFO "PMNC registers dump:\n"); + + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val)); + printk(KERN_INFO "PMNC =0x%08x\n", val); + + asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val)); + printk(KERN_INFO "CNTENS=0x%08x\n", val); + + asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val)); + printk(KERN_INFO "INTENS=0x%08x\n", val); + + asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); + printk(KERN_INFO "FLAGS =0x%08x\n", val); + + asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val)); + printk(KERN_INFO "SELECT=0x%08x\n", val); + + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val)); + printk(KERN_INFO "CCNT =0x%08x\n", val); + + for (cnt = CNT0; cnt < CNTMAX; cnt++) { + armv7_pmnc_select_counter(cnt); + asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val)); + printk(KERN_INFO "CNT[%d] count =0x%08x\n", cnt-CNT0, val); + asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val)); + printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", cnt-CNT0, val); + } +} +#endif + + +static int irqs[] = { +#ifdef CONFIG_ARCH_OMAP3 + INT_34XX_BENCH_MPU_EMUL, +#endif +}; + +static void armv7_pmnc_stop(void) +{ +#ifdef DEBUG + armv7_pmnc_dump_regs(); +#endif + armv7_stop_pmnc(); + armv7_release_interrupts(irqs, ARRAY_SIZE(irqs)); +} + +static int armv7_pmnc_start(void) +{ + int ret; + +#ifdef DEBUG + armv7_pmnc_dump_regs(); +#endif + ret = armv7_request_interrupts(irqs, ARRAY_SIZE(irqs)); + if (ret >= 0) + armv7_start_pmnc(); + + return ret; +} + +static int armv7_detect_pmnc(void) +{ + return 0; +} + +struct op_arm_model_spec op_armv7_spec = { + .init = armv7_detect_pmnc, + .num_counters = 5, + .setup_ctrs = armv7_setup_pmnc, + .start = armv7_pmnc_start, + .stop = armv7_pmnc_stop, + .name = "arm/armv7", +}; diff --git a/arch/arm/oprofile/op_model_v7.h b/arch/arm/oprofile/op_model_v7.h new file mode 100644 index 00000000000..0e19bcc2e10 --- /dev/null +++ b/arch/arm/oprofile/op_model_v7.h @@ -0,0 +1,103 @@ +/** + * op_model_v7.h + * ARM v7 (Cortex A8) Event Monitor Driver + * + * Copyright 2008 Jean Pihet <jpihet@mvista.com> + * Copyright 2004 ARM SMP Development Team + * Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com> + * Copyright 2000-2004 MontaVista Software Inc + * Copyright 2004 Dave Jiang <dave.jiang@intel.com> + * Copyright 2004 Intel Corporation + * Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk> + * Copyright 2004 Oprofile Authors + * + * Read the file COPYING + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef OP_MODEL_V7_H +#define OP_MODEL_V7_H + +/* + * Per-CPU PMNC: config reg + */ +#define PMNC_E (1 << 0) /* Enable all counters */ +#define PMNC_P (1 << 1) /* Reset all counters */ +#define PMNC_C (1 << 2) /* Cycle counter reset */ +#define PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */ +#define PMNC_X (1 << 4) /* Export to ETM */ +#define PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/ +#define PMNC_MASK 0x3f /* Mask for writable bits */ + +/* + * Available counters + */ +#define CCNT 0 +#define CNT0 1 +#define CNT1 2 +#define CNT2 3 +#define CNT3 4 +#define CNTMAX 5 + +#define CPU_COUNTER(cpu, counter) ((cpu) * CNTMAX + (counter)) + +/* + * CNTENS: counters enable reg + */ +#define CNTENS_P0 (1 << 0) +#define CNTENS_P1 (1 << 1) +#define CNTENS_P2 (1 << 2) +#define CNTENS_P3 (1 << 3) +#define CNTENS_C (1 << 31) +#define CNTENS_MASK 0x8000000f /* Mask for writable bits */ + +/* + * CNTENC: counters disable reg + */ +#define CNTENC_P0 (1 << 0) +#define CNTENC_P1 (1 << 1) +#define CNTENC_P2 (1 << 2) +#define CNTENC_P3 (1 << 3) +#define CNTENC_C (1 << 31) +#define CNTENC_MASK 0x8000000f /* Mask for writable bits */ + +/* + * INTENS: counters overflow interrupt enable reg + */ +#define INTENS_P0 (1 << 0) +#define INTENS_P1 (1 << 1) +#define INTENS_P2 (1 << 2) +#define INTENS_P3 (1 << 3) +#define INTENS_C (1 << 31) +#define INTENS_MASK 0x8000000f /* Mask for writable bits */ + +/* + * EVTSEL: Event selection reg + */ +#define EVTSEL_MASK 0x7f /* Mask for writable bits */ + +/* + * SELECT: Counter selection reg + */ +#define SELECT_MASK 0x1f /* Mask for writable bits */ + +/* + * FLAG: counters overflow flag status reg + */ +#define FLAG_P0 (1 << 0) +#define FLAG_P1 (1 << 1) +#define FLAG_P2 (1 << 2) +#define FLAG_P3 (1 << 3) +#define FLAG_C (1 << 31) +#define FLAG_MASK 0x8000000f /* Mask for writable bits */ + + +int armv7_setup_pmu(void); +int armv7_start_pmu(void); +int armv7_stop_pmu(void); +int armv7_request_interrupts(int *, int); +void armv7_release_interrupts(int *, int); + +#endif diff --git a/arch/arm/oprofile/op_model_xscale.c b/arch/arm/oprofile/op_model_xscale.c index 7c3289c2acd..724ab9ce252 100644 --- a/arch/arm/oprofile/op_model_xscale.c +++ b/arch/arm/oprofile/op_model_xscale.c @@ -22,7 +22,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> -#include <asm/system.h> +#include <asm/cputype.h> #include "op_counter.h" #include "op_arm_model.h" diff --git a/arch/arm/plat-iop/i2c.c b/arch/arm/plat-iop/i2c.c index 6dcbcc4ad41..4efe392859e 100644 --- a/arch/arm/plat-iop/i2c.c +++ b/arch/arm/plat-iop/i2c.c @@ -18,7 +18,7 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/serial_core.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/pgtable.h> #include <asm/page.h> #include <asm/mach/map.h> diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c index 39dcfb4bdc7..ed0bbece0d6 100644 --- a/arch/arm/plat-iop/io.c +++ b/arch/arm/plat-iop/io.c @@ -18,8 +18,8 @@ */ #include <linux/kernel.h> #include <linux/module.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, unsigned int mtype) diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index 54708bf9cb1..77fa7cc7d16 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c @@ -17,7 +17,7 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/ioport.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/irq.h> #include <asm/signal.h> #include <asm/system.h> diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index c53fefb6aac..3695bbe3ee2 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -18,8 +18,8 @@ #include <linux/time.h> #include <linux/init.h> #include <linux/timex.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/uaccess.h> #include <asm/mach/irq.h> diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index e14eaad11dd..b2a7e3fad11 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -23,4 +23,15 @@ source "arch/arm/mach-mx3/Kconfig" endmenu +config MXC_IRQ_PRIOR + bool "Use IRQ priority" + depends on ARCH_MXC + help + Select this if you want to use prioritized IRQ handling. + This feature prevents higher priority ISR to be interrupted + by lower priority IRQ even IRQF_DISABLED flag is not set. + This may be useful in embedded applications, where are strong + requirements for timing. + Say N here, unless you have a specialized requirement. + endif diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index db66e9ae841..067556f7c91 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -3,6 +3,6 @@ # # Common support -obj-y := irq.o clock.o gpio.o time.o +obj-y := irq.o clock.o gpio.o time.o devices.o -obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o +obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c new file mode 100644 index 00000000000..c66748267c4 --- /dev/null +++ b/arch/arm/plat-mxc/devices.c @@ -0,0 +1,36 @@ +/* + * Copyright 2008 Sascha Hauer, kernel@pengutronix.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> + +int __init mxc_register_device(struct platform_device *pdev, void *data) +{ + int ret; + + pdev->dev.platform_data = data; + + ret = platform_device_register(pdev); + if (ret) + pr_debug("Unable to register platform device '%s': %d\n", + pdev->name, ret); + + return ret; +} + diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c new file mode 100644 index 00000000000..b296f19fd89 --- /dev/null +++ b/arch/arm/plat-mxc/dma-mx1-mx2.c @@ -0,0 +1,840 @@ +/* + * linux/arch/arm/plat-mxc/dma-mx1-mx2.c + * + * i.MX DMA registration and IRQ dispatching + * + * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz> + * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de> + * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/errno.h> +#include <linux/clk.h> +#include <linux/scatterlist.h> +#include <linux/io.h> + +#include <asm/system.h> +#include <asm/irq.h> +#include <mach/hardware.h> +#include <asm/dma.h> +#include <mach/dma-mx1-mx2.h> + +#define DMA_DCR 0x00 /* Control Register */ +#define DMA_DISR 0x04 /* Interrupt status Register */ +#define DMA_DIMR 0x08 /* Interrupt mask Register */ +#define DMA_DBTOSR 0x0c /* Burst timeout status Register */ +#define DMA_DRTOSR 0x10 /* Request timeout Register */ +#define DMA_DSESR 0x14 /* Transfer Error Status Register */ +#define DMA_DBOSR 0x18 /* Buffer overflow status Register */ +#define DMA_DBTOCR 0x1c /* Burst timeout control Register */ +#define DMA_WSRA 0x40 /* W-Size Register A */ +#define DMA_XSRA 0x44 /* X-Size Register A */ +#define DMA_YSRA 0x48 /* Y-Size Register A */ +#define DMA_WSRB 0x4c /* W-Size Register B */ +#define DMA_XSRB 0x50 /* X-Size Register B */ +#define DMA_YSRB 0x54 /* Y-Size Register B */ +#define DMA_SAR(x) (0x80 + ((x) << 6)) /* Source Address Registers */ +#define DMA_DAR(x) (0x84 + ((x) << 6)) /* Destination Address Registers */ +#define DMA_CNTR(x) (0x88 + ((x) << 6)) /* Count Registers */ +#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */ +#define DMA_RSSR(x) (0x90 + ((x) << 6)) /* Request source select Registers */ +#define DMA_BLR(x) (0x94 + ((x) << 6)) /* Burst length Registers */ +#define DMA_RTOR(x) (0x98 + ((x) << 6)) /* Request timeout Registers */ +#define DMA_BUCR(x) (0x98 + ((x) << 6)) /* Bus Utilization Registers */ +#define DMA_CCNR(x) (0x9C + ((x) << 6)) /* Channel counter Registers */ + +#define DCR_DRST (1<<1) +#define DCR_DEN (1<<0) +#define DBTOCR_EN (1<<15) +#define DBTOCR_CNT(x) ((x) & 0x7fff) +#define CNTR_CNT(x) ((x) & 0xffffff) +#define CCR_ACRPT (1<<14) +#define CCR_DMOD_LINEAR (0x0 << 12) +#define CCR_DMOD_2D (0x1 << 12) +#define CCR_DMOD_FIFO (0x2 << 12) +#define CCR_DMOD_EOBFIFO (0x3 << 12) +#define CCR_SMOD_LINEAR (0x0 << 10) +#define CCR_SMOD_2D (0x1 << 10) +#define CCR_SMOD_FIFO (0x2 << 10) +#define CCR_SMOD_EOBFIFO (0x3 << 10) +#define CCR_MDIR_DEC (1<<9) +#define CCR_MSEL_B (1<<8) +#define CCR_DSIZ_32 (0x0 << 6) +#define CCR_DSIZ_8 (0x1 << 6) +#define CCR_DSIZ_16 (0x2 << 6) +#define CCR_SSIZ_32 (0x0 << 4) +#define CCR_SSIZ_8 (0x1 << 4) +#define CCR_SSIZ_16 (0x2 << 4) +#define CCR_REN (1<<3) +#define CCR_RPT (1<<2) +#define CCR_FRC (1<<1) +#define CCR_CEN (1<<0) +#define RTOR_EN (1<<15) +#define RTOR_CLK (1<<14) +#define RTOR_PSC (1<<13) + +/* + * struct imx_dma_channel - i.MX specific DMA extension + * @name: name specified by DMA client + * @irq_handler: client callback for end of transfer + * @err_handler: client callback for error condition + * @data: clients context data for callbacks + * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE + * @sg: pointer to the actual read/written chunk for scatter-gather emulation + * @resbytes: total residual number of bytes to transfer + * (it can be lower or same as sum of SG mapped chunk sizes) + * @sgcount: number of chunks to be read/written + * + * Structure is used for IMX DMA processing. It would be probably good + * @struct dma_struct in the future for external interfacing and use + * @struct imx_dma_channel only as extension to it. + */ + +struct imx_dma_channel { + const char *name; + void (*irq_handler) (int, void *); + void (*err_handler) (int, void *, int errcode); + void (*prog_handler) (int, void *, struct scatterlist *); + void *data; + dmamode_t dma_mode; + struct scatterlist *sg; + unsigned int resbytes; + int dma_num; + + int in_use; + + u32 ccr_from_device; + u32 ccr_to_device; + + struct timer_list watchdog; + + int hw_chaining; +}; + +static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; + +static struct clk *dma_clk; + +static int imx_dma_hw_chain(struct imx_dma_channel *imxdma) +{ + if (cpu_is_mx27()) + return imxdma->hw_chaining; + else + return 0; +} + + +/* + * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation + */ +static inline int imx_dma_sg_next(int channel, struct scatterlist *sg) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long now; + + if (!imxdma->name) { + printk(KERN_CRIT "%s: called for not allocated channel %d\n", + __func__, channel); + return 0; + } + + now = min(imxdma->resbytes, sg->length); + imxdma->resbytes -= now; + + if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ) + __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel)); + else + __raw_writel(sg->dma_address, DMA_BASE + DMA_SAR(channel)); + + __raw_writel(now, DMA_BASE + DMA_CNTR(channel)); + + pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, " + "size 0x%08x\n", channel, + __raw_readl(DMA_BASE + DMA_DAR(channel)), + __raw_readl(DMA_BASE + DMA_SAR(channel)), + __raw_readl(DMA_BASE + DMA_CNTR(channel))); + + return now; +} + +/** + * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from + * device transfer + * + * @channel: i.MX DMA channel number + * @dma_address: the DMA/physical memory address of the linear data block + * to transfer + * @dma_length: length of the data block in bytes + * @dev_addr: physical device port address + * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory + * or %DMA_MODE_WRITE from memory to the device + * + * Return value: if incorrect parameters are provided -%EINVAL. + * Zero indicates success. + */ +int +imx_dma_setup_single(int channel, dma_addr_t dma_address, + unsigned int dma_length, unsigned int dev_addr, + dmamode_t dmamode) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + + imxdma->sg = NULL; + imxdma->dma_mode = dmamode; + + if (!dma_address) { + printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n", + channel); + return -EINVAL; + } + + if (!dma_length) { + printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n", + channel); + return -EINVAL; + } + + if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) { + pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d " + "dev_addr=0x%08x for read\n", + channel, __func__, (unsigned int)dma_address, + dma_length, dev_addr); + + __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel)); + __raw_writel(dma_address, DMA_BASE + DMA_DAR(channel)); + __raw_writel(imxdma->ccr_from_device, + DMA_BASE + DMA_CCR(channel)); + } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { + pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d " + "dev_addr=0x%08x for write\n", + channel, __func__, (unsigned int)dma_address, + dma_length, dev_addr); + + __raw_writel(dma_address, DMA_BASE + DMA_SAR(channel)); + __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel)); + __raw_writel(imxdma->ccr_to_device, + DMA_BASE + DMA_CCR(channel)); + } else { + printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n", + channel); + return -EINVAL; + } + + __raw_writel(dma_length, DMA_BASE + DMA_CNTR(channel)); + + return 0; +} +EXPORT_SYMBOL(imx_dma_setup_single); + +/** + * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer + * @channel: i.MX DMA channel number + * @sg: pointer to the scatter-gather list/vector + * @sgcount: scatter-gather list hungs count + * @dma_length: total length of the transfer request in bytes + * @dev_addr: physical device port address + * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory + * or %DMA_MODE_WRITE from memory to the device + * + * The function sets up DMA channel state and registers to be ready for + * transfer specified by provided parameters. The scatter-gather emulation + * is set up according to the parameters. + * + * The full preparation of the transfer requires setup of more register + * by the caller before imx_dma_enable() can be called. + * + * %BLR(channel) holds transfer burst length in bytes, 0 means 64 bytes + * + * %RSSR(channel) has to be set to the DMA request line source %DMA_REQ_xxx + * + * %CCR(channel) has to specify transfer parameters, the next settings is + * typical for linear or simple scatter-gather transfers if %DMA_MODE_READ is + * specified + * + * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x + * + * The typical setup for %DMA_MODE_WRITE is specified by next options + * combination + * + * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x + * + * Be careful here and do not mistakenly mix source and target device + * port sizes constants, they are really different: + * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32, + * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32 + * + * Return value: if incorrect parameters are provided -%EINVAL. + * Zero indicates success. + */ +int +imx_dma_setup_sg(int channel, + struct scatterlist *sg, unsigned int sgcount, + unsigned int dma_length, unsigned int dev_addr, + dmamode_t dmamode) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + + if (imxdma->in_use) + return -EBUSY; + + imxdma->sg = sg; + imxdma->dma_mode = dmamode; + imxdma->resbytes = dma_length; + + if (!sg || !sgcount) { + printk(KERN_ERR "imxdma%d: imx_dma_setup_sg epty sg list\n", + channel); + return -EINVAL; + } + + if (!sg->length) { + printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n", + channel); + return -EINVAL; + } + + if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) { + pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d " + "dev_addr=0x%08x for read\n", + channel, __func__, sg, sgcount, dma_length, dev_addr); + + __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel)); + __raw_writel(imxdma->ccr_from_device, + DMA_BASE + DMA_CCR(channel)); + } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { + pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d " + "dev_addr=0x%08x for write\n", + channel, __func__, sg, sgcount, dma_length, dev_addr); + + __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel)); + __raw_writel(imxdma->ccr_to_device, + DMA_BASE + DMA_CCR(channel)); + } else { + printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n", + channel); + return -EINVAL; + } + + imx_dma_sg_next(channel, sg); + + return 0; +} +EXPORT_SYMBOL(imx_dma_setup_sg); + +int +imx_dma_config_channel(int channel, unsigned int config_port, + unsigned int config_mem, unsigned int dmareq, int hw_chaining) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + u32 dreq = 0; + + imxdma->hw_chaining = 0; + + if (hw_chaining) { + imxdma->hw_chaining = 1; + if (!imx_dma_hw_chain(imxdma)) + return -EINVAL; + } + + if (dmareq) + dreq = CCR_REN; + + imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq; + imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq; + + __raw_writel(dmareq, DMA_BASE + DMA_RSSR(channel)); + + return 0; +} +EXPORT_SYMBOL(imx_dma_config_channel); + +void imx_dma_config_burstlen(int channel, unsigned int burstlen) +{ + __raw_writel(burstlen, DMA_BASE + DMA_BLR(channel)); +} +EXPORT_SYMBOL(imx_dma_config_burstlen); + +/** + * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification + * handlers + * @channel: i.MX DMA channel number + * @irq_handler: the pointer to the function called if the transfer + * ends successfully + * @err_handler: the pointer to the function called if the premature + * end caused by error occurs + * @data: user specified value to be passed to the handlers + */ +int +imx_dma_setup_handlers(int channel, + void (*irq_handler) (int, void *), + void (*err_handler) (int, void *, int), + void *data) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long flags; + + if (!imxdma->name) { + printk(KERN_CRIT "%s: called for not allocated channel %d\n", + __func__, channel); + return -ENODEV; + } + + local_irq_save(flags); + __raw_writel(1 << channel, DMA_BASE + DMA_DISR); + imxdma->irq_handler = irq_handler; + imxdma->err_handler = err_handler; + imxdma->data = data; + local_irq_restore(flags); + return 0; +} +EXPORT_SYMBOL(imx_dma_setup_handlers); + +/** + * imx_dma_setup_progression_handler - setup i.MX DMA channel progression + * handlers + * @channel: i.MX DMA channel number + * @prog_handler: the pointer to the function called if the transfer progresses + */ +int +imx_dma_setup_progression_handler(int channel, + void (*prog_handler) (int, void*, struct scatterlist*)) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long flags; + + if (!imxdma->name) { + printk(KERN_CRIT "%s: called for not allocated channel %d\n", + __func__, channel); + return -ENODEV; + } + + local_irq_save(flags); + imxdma->prog_handler = prog_handler; + local_irq_restore(flags); + return 0; +} +EXPORT_SYMBOL(imx_dma_setup_progression_handler); + +/** + * imx_dma_enable - function to start i.MX DMA channel operation + * @channel: i.MX DMA channel number + * + * The channel has to be allocated by driver through imx_dma_request() + * or imx_dma_request_by_prio() function. + * The transfer parameters has to be set to the channel registers through + * call of the imx_dma_setup_single() or imx_dma_setup_sg() function + * and registers %BLR(channel), %RSSR(channel) and %CCR(channel) has to + * be set prior this function call by the channel user. + */ +void imx_dma_enable(int channel) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long flags; + + pr_debug("imxdma%d: imx_dma_enable\n", channel); + + if (!imxdma->name) { + printk(KERN_CRIT "%s: called for not allocated channel %d\n", + __func__, channel); + return; + } + + if (imxdma->in_use) + return; + + local_irq_save(flags); + + __raw_writel(1 << channel, DMA_BASE + DMA_DISR); + __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) & ~(1 << channel), + DMA_BASE + DMA_DIMR); + __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN | + CCR_ACRPT, + DMA_BASE + DMA_CCR(channel)); + +#ifdef CONFIG_ARCH_MX2 + if (imxdma->sg && imx_dma_hw_chain(imxdma)) { + imxdma->sg = sg_next(imxdma->sg); + if (imxdma->sg) { + u32 tmp; + imx_dma_sg_next(channel, imxdma->sg); + tmp = __raw_readl(DMA_BASE + DMA_CCR(channel)); + __raw_writel(tmp | CCR_RPT | CCR_ACRPT, + DMA_BASE + DMA_CCR(channel)); + } + } +#endif + imxdma->in_use = 1; + + local_irq_restore(flags); +} +EXPORT_SYMBOL(imx_dma_enable); + +/** + * imx_dma_disable - stop, finish i.MX DMA channel operatin + * @channel: i.MX DMA channel number + */ +void imx_dma_disable(int channel) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long flags; + + pr_debug("imxdma%d: imx_dma_disable\n", channel); + + if (imx_dma_hw_chain(imxdma)) + del_timer(&imxdma->watchdog); + + local_irq_save(flags); + __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel), + DMA_BASE + DMA_DIMR); + __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, + DMA_BASE + DMA_CCR(channel)); + __raw_writel(1 << channel, DMA_BASE + DMA_DISR); + imxdma->in_use = 0; + local_irq_restore(flags); +} +EXPORT_SYMBOL(imx_dma_disable); + +static void imx_dma_watchdog(unsigned long chno) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; + + __raw_writel(0, DMA_BASE + DMA_CCR(chno)); + imxdma->in_use = 0; + imxdma->sg = NULL; + + if (imxdma->err_handler) + imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); +} + +static irqreturn_t dma_err_handler(int irq, void *dev_id) +{ + int i, disr; + struct imx_dma_channel *imxdma; + unsigned int err_mask; + int errcode; + + disr = __raw_readl(DMA_BASE + DMA_DISR); + + err_mask = __raw_readl(DMA_BASE + DMA_DBTOSR) | + __raw_readl(DMA_BASE + DMA_DRTOSR) | + __raw_readl(DMA_BASE + DMA_DSESR) | + __raw_readl(DMA_BASE + DMA_DBOSR); + + if (!err_mask) + return IRQ_HANDLED; + + __raw_writel(disr & err_mask, DMA_BASE + DMA_DISR); + + for (i = 0; i < IMX_DMA_CHANNELS; i++) { + if (!(err_mask & (1 << i))) + continue; + imxdma = &imx_dma_channels[i]; + errcode = 0; + + if (__raw_readl(DMA_BASE + DMA_DBTOSR) & (1 << i)) { + __raw_writel(1 << i, DMA_BASE + DMA_DBTOSR); + errcode |= IMX_DMA_ERR_BURST; + } + if (__raw_readl(DMA_BASE + DMA_DRTOSR) & (1 << i)) { + __raw_writel(1 << i, DMA_BASE + DMA_DRTOSR); + errcode |= IMX_DMA_ERR_REQUEST; + } + if (__raw_readl(DMA_BASE + DMA_DSESR) & (1 << i)) { + __raw_writel(1 << i, DMA_BASE + DMA_DSESR); + errcode |= IMX_DMA_ERR_TRANSFER; + } + if (__raw_readl(DMA_BASE + DMA_DBOSR) & (1 << i)) { + __raw_writel(1 << i, DMA_BASE + DMA_DBOSR); + errcode |= IMX_DMA_ERR_BUFFER; + } + if (imxdma->name && imxdma->err_handler) { + imxdma->err_handler(i, imxdma->data, errcode); + continue; + } + + imx_dma_channels[i].sg = NULL; + + printk(KERN_WARNING + "DMA timeout on channel %d (%s) -%s%s%s%s\n", + i, imxdma->name, + errcode & IMX_DMA_ERR_BURST ? " burst" : "", + errcode & IMX_DMA_ERR_REQUEST ? " request" : "", + errcode & IMX_DMA_ERR_TRANSFER ? " transfer" : "", + errcode & IMX_DMA_ERR_BUFFER ? " buffer" : ""); + } + return IRQ_HANDLED; +} + +static void dma_irq_handle_channel(int chno) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; + + if (!imxdma->name) { + /* + * IRQ for an unregistered DMA channel: + * let's clear the interrupts and disable it. + */ + printk(KERN_WARNING + "spurious IRQ for DMA channel %d\n", chno); + return; + } + + if (imxdma->sg) { + u32 tmp; + struct scatterlist *current_sg = imxdma->sg; + imxdma->sg = sg_next(imxdma->sg); + + if (imxdma->sg) { + imx_dma_sg_next(chno, imxdma->sg); + + tmp = __raw_readl(DMA_BASE + DMA_CCR(chno)); + + if (imx_dma_hw_chain(imxdma)) { + /* FIXME: The timeout should probably be + * configurable + */ + mod_timer(&imxdma->watchdog, + jiffies + msecs_to_jiffies(500)); + + tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT; + __raw_writel(tmp, DMA_BASE + + DMA_CCR(chno)); + } else { + __raw_writel(tmp & ~CCR_CEN, DMA_BASE + + DMA_CCR(chno)); + tmp |= CCR_CEN; + } + + __raw_writel(tmp, DMA_BASE + DMA_CCR(chno)); + + if (imxdma->prog_handler) + imxdma->prog_handler(chno, imxdma->data, + current_sg); + + return; + } + + if (imx_dma_hw_chain(imxdma)) { + del_timer(&imxdma->watchdog); + return; + } + } + + __raw_writel(0, DMA_BASE + DMA_CCR(chno)); + imxdma->in_use = 0; + if (imxdma->irq_handler) + imxdma->irq_handler(chno, imxdma->data); +} + +static irqreturn_t dma_irq_handler(int irq, void *dev_id) +{ + int i, disr; + +#ifdef CONFIG_ARCH_MX2 + dma_err_handler(irq, dev_id); +#endif + + disr = __raw_readl(DMA_BASE + DMA_DISR); + + pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n", + disr); + + __raw_writel(disr, DMA_BASE + DMA_DISR); + for (i = 0; i < IMX_DMA_CHANNELS; i++) { + if (disr & (1 << i)) + dma_irq_handle_channel(i); + } + + return IRQ_HANDLED; +} + +/** + * imx_dma_request - request/allocate specified channel number + * @channel: i.MX DMA channel number + * @name: the driver/caller own non-%NULL identification + */ +int imx_dma_request(int channel, const char *name) +{ + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + unsigned long flags; + int ret; + + /* basic sanity checks */ + if (!name) + return -EINVAL; + + if (channel >= IMX_DMA_CHANNELS) { + printk(KERN_CRIT "%s: called for non-existed channel %d\n", + __func__, channel); + return -EINVAL; + } + + local_irq_save(flags); + if (imxdma->name) { + local_irq_restore(flags); + return -EBUSY; + } + +#ifdef CONFIG_ARCH_MX2 + ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", + NULL); + if (ret) { + printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n", + MXC_INT_DMACH0 + channel, channel); + return ret; + } + init_timer(&imxdma->watchdog); + imxdma->watchdog.function = &imx_dma_watchdog; + imxdma->watchdog.data = channel; +#endif + + imxdma->name = name; + imxdma->irq_handler = NULL; + imxdma->err_handler = NULL; + imxdma->data = NULL; + imxdma->sg = NULL; + + local_irq_restore(flags); + return 0; +} +EXPORT_SYMBOL(imx_dma_request); + +/** + * imx_dma_free - release previously acquired channel + * @channel: i.MX DMA channel number + */ +void imx_dma_free(int channel) +{ + unsigned long flags; + struct imx_dma_channel *imxdma = &imx_dma_channels[channel]; + + if (!imxdma->name) { + printk(KERN_CRIT + "%s: trying to free free channel %d\n", + __func__, channel); + return; + } + + local_irq_save(flags); + /* Disable interrupts */ + __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel), + DMA_BASE + DMA_DIMR); + __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, + DMA_BASE + DMA_CCR(channel)); + imxdma->name = NULL; + +#ifdef CONFIG_ARCH_MX2 + free_irq(MXC_INT_DMACH0 + channel, NULL); +#endif + + local_irq_restore(flags); +} +EXPORT_SYMBOL(imx_dma_free); + +/** + * imx_dma_request_by_prio - find and request some of free channels best + * suiting requested priority + * @channel: i.MX DMA channel number + * @name: the driver/caller own non-%NULL identification + * + * This function tries to find a free channel in the specified priority group + * This function tries to find a free channel in the specified priority group + * if the priority cannot be achieved it tries to look for free channel + * in the higher and then even lower priority groups. + * + * Return value: If there is no free channel to allocate, -%ENODEV is returned. + * On successful allocation channel is returned. + */ +int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio) +{ + int i; + int best; + + switch (prio) { + case (DMA_PRIO_HIGH): + best = 8; + break; + case (DMA_PRIO_MEDIUM): + best = 4; + break; + case (DMA_PRIO_LOW): + default: + best = 0; + break; + } + + for (i = best; i < IMX_DMA_CHANNELS; i++) + if (!imx_dma_request(i, name)) + return i; + + for (i = best - 1; i >= 0; i--) + if (!imx_dma_request(i, name)) + return i; + + printk(KERN_ERR "%s: no free DMA channel found\n", __func__); + + return -ENODEV; +} +EXPORT_SYMBOL(imx_dma_request_by_prio); + +static int __init imx_dma_init(void) +{ + int ret = 0; + int i; + + dma_clk = clk_get(NULL, "dma_clk"); + clk_enable(dma_clk); + + /* reset DMA module */ + __raw_writel(DCR_DRST, DMA_BASE + DMA_DCR); + +#ifdef CONFIG_ARCH_MX1 + ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL); + if (ret) { + printk(KERN_CRIT "Wow! Can't register IRQ for DMA\n"); + return ret; + } + + ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL); + if (ret) { + printk(KERN_CRIT "Wow! Can't register ERRIRQ for DMA\n"); + free_irq(DMA_INT, NULL); + return ret; + } +#endif + /* enable DMA module */ + __raw_writel(DCR_DEN, DMA_BASE + DMA_DCR); + + /* clear all interrupts */ + __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DISR); + + /* disable interrupts */ + __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DIMR); + + for (i = 0; i < IMX_DMA_CHANNELS; i++) { + imx_dma_channels[i].sg = NULL; + imx_dma_channels[i].dma_num = i; + } + + return ret; +} + +arch_initcall(imx_dma_init); diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h index 1bc6fb0f9a8..745b48864f9 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h @@ -90,6 +90,9 @@ #define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) +#define MXC_EXP_IO_BASE (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES) +#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) + #define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) #define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1) #define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2) diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h index 24caa2b7c91..d21f78e7881 100644 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ b/arch/arm/plat-mxc/include/mach/clock.h @@ -39,7 +39,7 @@ struct clk { /* Register bit position for clock's enable/disable control. */ u8 enable_shift; /* Register address for clock's enable/disable control. */ - u32 enable_reg; + void __iomem *enable_reg; u32 flags; /* get the current clock rate (always a fresh value) */ unsigned long (*get_rate) (struct clk *); diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index a6d2e24aab1..6350287a59b 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -11,10 +11,13 @@ #ifndef __ASM_ARCH_MXC_COMMON_H__ #define __ASM_ARCH_MXC_COMMON_H__ +struct platform_device; + extern void mxc_map_io(void); extern void mxc_init_irq(void); extern void mxc_timer_init(const char *clk_timer); extern int mxc_clocks_init(unsigned long fref); extern int mxc_register_gpios(void); +extern int mxc_register_device(struct platform_device *pdev, void *data); #endif diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h new file mode 100644 index 00000000000..e85fd946116 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h @@ -0,0 +1,89 @@ +/* + * linux/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h + * + * i.MX DMA registration and IRQ dispatching + * + * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz> + * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de> + * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include <asm/dma.h> + +#ifndef __ASM_ARCH_MXC_DMA_H +#define __ASM_ARCH_MXC_DMA_H + +#define IMX_DMA_CHANNELS 16 + +#define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR) + +#define IMX_DMA_MEMSIZE_32 (0 << 4) +#define IMX_DMA_MEMSIZE_8 (1 << 4) +#define IMX_DMA_MEMSIZE_16 (2 << 4) +#define IMX_DMA_TYPE_LINEAR (0 << 10) +#define IMX_DMA_TYPE_2D (1 << 10) +#define IMX_DMA_TYPE_FIFO (2 << 10) + +#define IMX_DMA_ERR_BURST (1 << 0) +#define IMX_DMA_ERR_REQUEST (1 << 1) +#define IMX_DMA_ERR_TRANSFER (1 << 2) +#define IMX_DMA_ERR_BUFFER (1 << 3) +#define IMX_DMA_ERR_TIMEOUT (1 << 4) + +int +imx_dma_config_channel(int channel, unsigned int config_port, + unsigned int config_mem, unsigned int dmareq, int hw_chaining); + +void +imx_dma_config_burstlen(int channel, unsigned int burstlen); + +int +imx_dma_setup_single(int channel, dma_addr_t dma_address, + unsigned int dma_length, unsigned int dev_addr, + dmamode_t dmamode); + +int +imx_dma_setup_sg(int channel, struct scatterlist *sg, + unsigned int sgcount, unsigned int dma_length, + unsigned int dev_addr, dmamode_t dmamode); + +int +imx_dma_setup_handlers(int channel, + void (*irq_handler) (int, void *), + void (*err_handler) (int, void *, int), void *data); + +int +imx_dma_setup_progression_handler(int channel, + void (*prog_handler) (int, void*, struct scatterlist*)); + +void imx_dma_enable(int channel); + +void imx_dma_disable(int channel); + +int imx_dma_request(int channel, const char *name); + +void imx_dma_free(int channel); + +enum imx_dma_prio { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +}; + +int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); + +#endif /* _ASM_ARCH_MXC_DMA_H */ diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index b542433afb1..11632028f7d 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -9,11 +9,17 @@ * published by the Free Software Foundation. */ +#define AVIC_NIMASK 0x04 + @ this macro disables fast irq (not implemented) .macro disable_fiq .endm .macro get_irqnr_preamble, base, tmp + ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR) +#ifdef CONFIG_MXC_IRQ_PRIOR + ldr r4, [\base, #AVIC_NIMASK] +#endif .endm .macro arch_ret_to_user, tmp1, tmp2 @@ -23,7 +29,6 @@ @ and returns its number in irqnr @ and returns if an interrupt occured in irqstat .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR) @ Load offset & priority of the highest priority @ interrupt pending from AVIC_NIVECSR ldr \irqstat, [\base, #0x40] @@ -32,6 +37,11 @@ mov \irqnr, \irqstat, asr #16 @ set zero flag if IRQ + 1 == 0 adds \tmp, \irqnr, #1 +#ifdef CONFIG_MXC_IRQ_PRIOR + bicne \tmp, \irqstat, #0xFFFFFFE0 + strne \tmp, [\base, #AVIC_NIMASK] + streq r4, [\base, #AVIC_NIMASK] +#endif .endm @ irq priority table (not used) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h index 076d37b38eb..3d09bfd6c53 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h @@ -247,6 +247,11 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, #endif #ifdef CONFIG_ARCH_MX2 +#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0) +#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1) +#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) +#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) +#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) #define PA5_PF_LSCLK (GPIO_PORTA | GPIO_OUT | GPIO_PF | 5) #define PA6_PF_LD0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 6) #define PA7_PF_LD1 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 7) @@ -294,6 +299,16 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, #define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 20) #define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 21) #define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 21) +#define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) +#define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23) +#define PB24_PF_USB_OC_B (GPIO_PORTB | GPIO_PF | 24) +#define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) +#define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26) +#define PB27_PF_USBH1_OE_B (GPIO_PORTB | GPIO_PF | 27) +#define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28) +#define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29) +#define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30) +#define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31) #define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 26) #define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 28) #define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 29) @@ -335,8 +350,15 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, #define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16) #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) +#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19) +#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20) +#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21) +#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22) +#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23) +#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24) #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) +#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26) #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) #define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) #define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) @@ -355,6 +377,8 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) +#define PE16_AF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_AF | 16) +#define PE16_PF_RTCK (GPIO_PORTE | GPIO_OUT | GPIO_PF | 16) #define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_IN | GPIO_AF | 18) #define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21) #define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 7509e7692f0..c9f39c2fb8c 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h @@ -491,6 +491,26 @@ enum iomux_pins { #define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) #define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) #define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI1_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI2_SCLK, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI2_SPI_RDY, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_SS0__SS0 IOMUX_MODE(MX31_PIN_CSPI2_SS0, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_SS1__SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI2_SS2__SS2 IOMUX_MODE(MX31_PIN_CSPI2_SS2, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI3_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI3_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI3_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI3_SCLK, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CSPI3_SPI_RDY__SPI_RDY IOMUX_MODE(MX31_PIN_CSPI3_SPI_RDY, IOMUX_CONFIG_FUNC) +/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 + * cspi1_ss1*/ /* * This function configures the pad value for a IOMUX pin. diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 228c4f68ccd..b55bba35e18 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -12,5 +12,6 @@ #define __ASM_ARCH_MXC_IRQS_H__ #include <mach/hardware.h> +extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); #endif /* __ASM_ARCH_MXC_IRQS_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 212ecc24662..a86db64744a 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -128,6 +128,7 @@ * it returns 0xDEADBEEF */ #define IO_ADDRESS(x) \ + (void __iomem *) \ (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ AIPI_IO_ADDRESS(x) : \ ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index a7373e4a56c..0536f8917bc 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -198,6 +198,7 @@ * it returns 0xDEADBEEF */ #define IO_ADDRESS(x) \ + (void __iomem *) \ (((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\ ((x >= L2CC_BASE_ADDR) && (x < (L2CC_BASE_ADDR + L2CC_SIZE))) ? L2CC_IO_ADDRESS(x):\ ((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 332eda4dbd3..f6caab06213 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -33,4 +33,10 @@ # define cpu_is_mx27() (0) #endif +#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) +#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) +#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) +#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) +#endif + #endif /* __ASM_ARCH_MXC_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h new file mode 100644 index 00000000000..2b972df22d1 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h @@ -0,0 +1,27 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Sascha Hauer, kernel@pengutronix.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __ASM_ARCH_NAND_H +#define __ASM_ARCH_NAND_H + +struct mxc_nand_platform_data { + int width; /* data bus width in bytes */ + int hw_ecc; /* 0 if supress hardware ECC */ +}; +#endif /* __ASM_ARCH_NAND_H */ diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index 1053b666c67..d862c9e5f8d 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c @@ -18,7 +18,7 @@ */ #include <linux/irq.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/common.h> #define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) @@ -30,14 +30,7 @@ #define AVIC_INTENABLEL (AVIC_BASE + 0x14) /* int enable reg low */ #define AVIC_INTTYPEH (AVIC_BASE + 0x18) /* int type reg high */ #define AVIC_INTTYPEL (AVIC_BASE + 0x1C) /* int type reg low */ -#define AVIC_NIPRIORITY7 (AVIC_BASE + 0x20) /* norm int priority lvl7 */ -#define AVIC_NIPRIORITY6 (AVIC_BASE + 0x24) /* norm int priority lvl6 */ -#define AVIC_NIPRIORITY5 (AVIC_BASE + 0x28) /* norm int priority lvl5 */ -#define AVIC_NIPRIORITY4 (AVIC_BASE + 0x2C) /* norm int priority lvl4 */ -#define AVIC_NIPRIORITY3 (AVIC_BASE + 0x30) /* norm int priority lvl3 */ -#define AVIC_NIPRIORITY2 (AVIC_BASE + 0x34) /* norm int priority lvl2 */ -#define AVIC_NIPRIORITY1 (AVIC_BASE + 0x38) /* norm int priority lvl1 */ -#define AVIC_NIPRIORITY0 (AVIC_BASE + 0x3C) /* norm int priority lvl0 */ +#define AVIC_NIPRIORITY(x) (AVIC_BASE + (0x20 + 4 * (7 - (x)))) /* int priority */ #define AVIC_NIVECSR (AVIC_BASE + 0x40) /* norm int vector/status */ #define AVIC_FIVECSR (AVIC_BASE + 0x44) /* fast int vector/status */ #define AVIC_INTSRCH (AVIC_BASE + 0x48) /* int source reg high */ @@ -54,6 +47,24 @@ #define IIM_PROD_REV_SH 3 #define IIM_PROD_REV_LEN 5 +#ifdef CONFIG_MXC_IRQ_PRIOR +void imx_irq_set_priority(unsigned char irq, unsigned char prio) +{ + unsigned int temp; + unsigned int mask = 0x0F << irq % 8 * 4; + + if (irq > 63) + return; + + temp = __raw_readl(AVIC_NIPRIORITY(irq / 8)); + temp &= ~mask; + temp |= prio & mask; + + __raw_writel(temp, AVIC_NIPRIORITY(irq / 8)); +} +EXPORT_SYMBOL(imx_irq_set_priority); +#endif + /* Disable interrupt number "irq" in the AVIC */ static void mxc_mask_irq(unsigned int irq) { @@ -101,10 +112,9 @@ void __init mxc_init_irq(void) set_irq_flags(i, IRQF_VALID); } - /* Set WDOG2's interrupt the highest priority level (bit 28-31) */ - reg = __raw_readl(AVIC_NIPRIORITY6); - reg |= (0xF << 28); - __raw_writel(reg, AVIC_NIPRIORITY6); + /* Set default priority value (0) for all IRQ's */ + for (i = 0; i < 8; i++) + __raw_writel(0, AVIC_NIPRIORITY(i)); /* init architectures chained interrupt handler */ mxc_register_gpios(); diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index b917206ee90..a94f0c44ebc 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -15,6 +15,9 @@ config ARCH_OMAP1 config ARCH_OMAP2 bool "TI OMAP2" +config ARCH_OMAP3 + bool "TI OMAP3" + endchoice comment "OMAP Feature Selections" @@ -29,6 +32,30 @@ config OMAP_DEBUG_LEDS depends on OMAP_DEBUG_DEVICES default y if LEDS || LEDS_OMAP_DEBUG +config OMAP_DEBUG_POWERDOMAIN + bool "Emit debug messages from powerdomain layer" + depends on ARCH_OMAP2 || ARCH_OMAP3 + default n + help + Say Y here if you want to compile in powerdomain layer + debugging messages for OMAP2/3. These messages can + provide more detail as to why some powerdomain calls + may be failing, and will also emit a descriptive message + for every powerdomain register write. However, the + extra detail costs some memory. + +config OMAP_DEBUG_CLOCKDOMAIN + bool "Emit debug messages from clockdomain layer" + depends on ARCH_OMAP2 || ARCH_OMAP3 + default n + help + Say Y here if you want to compile in clockdomain layer + debugging messages for OMAP2/3. These messages can + provide more detail as to why some clockdomain calls + may be failing, and will also emit a descriptive message + for every clockdomain register write. However, the + extra detail costs some memory. + config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot" depends on ARCH_OMAP @@ -88,13 +115,13 @@ config OMAP_MPU_TIMER config OMAP_32K_TIMER bool "Use 32KHz timer" - depends on ARCH_OMAP16XX || ARCH_OMAP24XX + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX help Select this option if you want to enable the OMAP 32KHz timer. This timer saves power compared to the OMAP_MPU_TIMER, and has support for no tick during idle. The 32KHz timer provides less intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is - currently only available for OMAP16XX and 24XX. + currently only available for OMAP16XX, 24XX and 34XX. endchoice @@ -109,7 +136,7 @@ config OMAP_32K_TIMER_HZ config OMAP_DM_TIMER bool "Use dual-mode timer" - depends on ARCH_OMAP16XX || ARCH_OMAP24XX + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX help Select this option if you want to use OMAP Dual-Mode timers. diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 2c4051cc79a..deaff58878a 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \ - usb.o fb.o + usb.o fb.o io.o obj-m := obj-n := obj- := diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 197974defbe..bf6a10c5fc4 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -22,8 +22,7 @@ #include <linux/platform_device.h> #include <linux/cpufreq.h> #include <linux/debugfs.h> - -#include <asm/io.h> +#include <linux/io.h> #include <mach/clock.h> diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index f4dff423ae7..0843b8882f9 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -18,12 +18,12 @@ #include <linux/serial_8250.h> #include <linux/serial_reg.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/system.h> #include <asm/pgtable.h> #include <asm/mach/map.h> -#include <asm/io.h> #include <asm/setup.h> #include <mach/common.h> @@ -248,6 +248,7 @@ static struct omap_globals *omap2_globals; static void __init __omap2_set_globals(void) { + omap2_set_globals_tap(omap2_globals); omap2_set_globals_memory(omap2_globals); omap2_set_globals_control(omap2_globals); omap2_set_globals_prcm(omap2_globals); @@ -258,12 +259,13 @@ static void __init __omap2_set_globals(void) #if defined(CONFIG_ARCH_OMAP2420) static struct omap_globals omap242x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), + .class = OMAP242X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x48014000), + .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), }; void __init omap2_set_globals_242x(void) @@ -276,12 +278,13 @@ void __init omap2_set_globals_242x(void) #if defined(CONFIG_ARCH_OMAP2430) static struct omap_globals omap243x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), + .class = OMAP243X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x4900a000), + .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), }; void __init omap2_set_globals_243x(void) @@ -294,12 +297,13 @@ void __init omap2_set_globals_243x(void) #if defined(CONFIG_ARCH_OMAP3430) static struct omap_globals omap343x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), + .class = OMAP343X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x4830A000), + .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), }; void __init omap2_set_globals_343x(void) diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index ae1de308aaa..b2690242a39 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c @@ -20,9 +20,9 @@ #include <linux/init.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/system.h> #define VERY_HI_RATE 900000000 diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index 5b73bb27445..e31154b15d9 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c @@ -12,9 +12,9 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/board.h> #include <mach/gpio.h> diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c index 9422dee7de8..2f4c0cabfd3 100644 --- a/arch/arm/plat-omap/debug-leds.c +++ b/arch/arm/plat-omap/debug-leds.c @@ -11,8 +11,8 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/leds.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #include <asm/leds.h> #include <asm/system.h> diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 01da719a745..0cb2b22388e 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -13,24 +13,24 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach-types.h> #include <asm/mach/map.h> #include <mach/tc.h> +#include <mach/control.h> #include <mach/board.h> #include <mach/mmc.h> #include <mach/mux.h> #include <mach/gpio.h> #include <mach/menelaus.h> #include <mach/mcbsp.h> +#include <mach/dsp_common.h> #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) -#include "../plat-omap/dsp/dsp_common.h" - static struct dsp_platform_data dsp_pdata = { .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list), }; @@ -76,7 +76,7 @@ int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev) { static DEFINE_MUTEX(dsp_pdata_lock); - mutex_init(&kdev->lock); + spin_lock_init(&kdev->lock); mutex_lock(&dsp_pdata_lock); list_add_tail(&kdev->entry, &dsp_pdata.kdev_list); @@ -95,6 +95,10 @@ static inline void omap_init_dsp(void) { } static void omap_init_kp(void) { + /* 2430 and 34xx keypad is on TWL4030 */ + if (cpu_is_omap2430() || cpu_is_omap34xx()) + return; + if (machine_is_omap_h2() || machine_is_omap_h3()) { omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); @@ -156,13 +160,6 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, { int i; - if (size > OMAP_MAX_MCBSP_COUNT) { - printk(KERN_WARNING "Registered too many McBSPs platform_data." - " Using maximum (%d) available.\n", - OMAP_MAX_MCBSP_COUNT); - size = OMAP_MAX_MCBSP_COUNT; - } - omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), GFP_KERNEL); if (!omap_mcbsp_devices) { @@ -441,16 +438,8 @@ static inline void omap_init_uwire(void) {} #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) -#ifdef CONFIG_ARCH_OMAP24XX -#define OMAP_WDT_BASE 0x48022000 -#else -#define OMAP_WDT_BASE 0xfffeb000 -#endif - static struct resource wdt_resources[] = { { - .start = OMAP_WDT_BASE, - .end = OMAP_WDT_BASE + 0x4f, .flags = IORESOURCE_MEM, }, }; @@ -464,6 +453,19 @@ static struct platform_device omap_wdt_device = { static void omap_init_wdt(void) { + if (cpu_is_omap16xx()) + wdt_resources[0].start = 0xfffeb000; + else if (cpu_is_omap2420()) + wdt_resources[0].start = 0x48022000; /* WDT2 */ + else if (cpu_is_omap2430()) + wdt_resources[0].start = 0x49016000; /* WDT2 */ + else if (cpu_is_omap343x()) + wdt_resources[0].start = 0x48314000; /* WDT2 */ + else + return; + + wdt_resources[0].end = wdt_resources[0].start + 0x4f; + (void) platform_device_register(&omap_wdt_device); } #else @@ -525,10 +527,6 @@ static inline void omap_init_rng(void) {} */ static int __init omap_init_devices(void) { -/* - * Need to enable relevant once for 2430 SDP - */ -#ifndef CONFIG_MACH_OMAP_2430SDP /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ @@ -538,7 +536,6 @@ static int __init omap_init_devices(void) omap_init_uwire(); omap_init_wdt(); omap_init_rng(); -#endif return 0; } arch_initcall(omap_init_devices); diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index a63b644ad30..50f8b4ad9a0 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -1233,7 +1233,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, /* request and reserve DMA channels for the chain */ for (i = 0; i < no_of_chans; i++) { err = omap_request_dma(dev_id, dev_name, - callback, 0, &channels[i]); + callback, NULL, &channels[i]); if (err < 0) { int j; for (j = 0; j < i; j++) @@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void) int ch, r; if (cpu_class_is_omap1()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); + omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap24xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap34xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else { pr_err("DMA init failed for unsupported omap\n"); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 743a4abcd85..963c31cd154 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -32,9 +32,9 @@ #include <linux/list.h> #include <linux/clk.h> #include <linux/delay.h> +#include <linux/io.h> #include <mach/hardware.h> #include <mach/dmtimer.h> -#include <asm/io.h> #include <mach/irqs.h> /* register offsets */ @@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void) for (i = 0; i < dm_timer_count; i++) { timer = &dm_timers[i]; - timer->io_base = (void __iomem *)io_p2v(timer->phys_base); + timer->io_base = IO_ADDRESS(timer->phys_base); #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) if (cpu_class_is_omap2()) { char clk_name[16]; diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index 17a92a31e74..ce6b4baeede 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c @@ -27,9 +27,9 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/bootmem.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/mach/map.h> #include <mach/board.h> diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 9e1341ebc14..8679fbca6bb 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -17,6 +17,7 @@ #include <linux/sysdev.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> @@ -24,12 +25,10 @@ #include <mach/gpio.h> #include <asm/mach/irq.h> -#include <asm/io.h> - /* * OMAP1510 GPIO registers */ -#define OMAP1510_GPIO_BASE (void __iomem *)0xfffce000 +#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) #define OMAP1510_GPIO_DATA_INPUT 0x00 #define OMAP1510_GPIO_DATA_OUTPUT 0x04 #define OMAP1510_GPIO_DIR_CONTROL 0x08 @@ -43,10 +42,10 @@ /* * OMAP1610 specific GPIO registers */ -#define OMAP1610_GPIO1_BASE (void __iomem *)0xfffbe400 -#define OMAP1610_GPIO2_BASE (void __iomem *)0xfffbec00 -#define OMAP1610_GPIO3_BASE (void __iomem *)0xfffbb400 -#define OMAP1610_GPIO4_BASE (void __iomem *)0xfffbbc00 +#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) +#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) +#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) +#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) #define OMAP1610_GPIO_REVISION 0x0000 #define OMAP1610_GPIO_SYSCONFIG 0x0010 #define OMAP1610_GPIO_SYSSTATUS 0x0014 @@ -68,12 +67,12 @@ /* * OMAP730 specific GPIO registers */ -#define OMAP730_GPIO1_BASE (void __iomem *)0xfffbc000 -#define OMAP730_GPIO2_BASE (void __iomem *)0xfffbc800 -#define OMAP730_GPIO3_BASE (void __iomem *)0xfffbd000 -#define OMAP730_GPIO4_BASE (void __iomem *)0xfffbd800 -#define OMAP730_GPIO5_BASE (void __iomem *)0xfffbe000 -#define OMAP730_GPIO6_BASE (void __iomem *)0xfffbe800 +#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) +#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) +#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) +#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) +#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) +#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) #define OMAP730_GPIO_DATA_INPUT 0x00 #define OMAP730_GPIO_DATA_OUTPUT 0x04 #define OMAP730_GPIO_DIR_CONTROL 0x08 @@ -84,16 +83,16 @@ /* * omap24xx specific GPIO registers */ -#define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 -#define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 -#define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 -#define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 +#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) +#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) +#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) +#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) -#define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 -#define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 -#define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 -#define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 -#define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 +#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) +#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) +#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) +#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) +#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) #define OMAP24XX_GPIO_REVISION 0x0000 #define OMAP24XX_GPIO_SYSCONFIG 0x0010 @@ -123,13 +122,14 @@ * omap34xx specific GPIO registers */ -#define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 -#define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 -#define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 -#define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 -#define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 -#define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 +#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) +#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) +#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) +#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) +#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) +#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) +#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) struct gpio_bank { void __iomem *base; @@ -161,7 +161,7 @@ struct gpio_bank { #ifdef CONFIG_ARCH_OMAP16XX static struct gpio_bank gpio_bank_1610[5] = { - { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, + { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, @@ -171,14 +171,14 @@ static struct gpio_bank gpio_bank_1610[5] = { #ifdef CONFIG_ARCH_OMAP15XX static struct gpio_bank gpio_bank_1510[2] = { - { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } }; #endif #ifdef CONFIG_ARCH_OMAP730 static struct gpio_bank gpio_bank_730[7] = { - { OMAP_MPUIO_BASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, @@ -1051,13 +1051,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) gpio_irq = bank->virtual_irq_start; for (; isr != 0; isr >>= 1, gpio_irq++) { - struct irq_desc *d; - if (!(isr & 1)) continue; - d = irq_desc + gpio_irq; - desc_handle_irq(gpio_irq, d); + generic_handle_irq(gpio_irq); } } /* if bank has any level sensitive GPIO pin interrupt @@ -1393,7 +1390,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 5; gpio_bank = gpio_bank_1610; - rev = omap_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); + rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1412,7 +1409,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 4; gpio_bank = gpio_bank_242x; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1421,7 +1418,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 5; gpio_bank = gpio_bank_243x; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1432,7 +1429,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = OMAP34XX_NR_GPIOS; gpio_bank = gpio_bank_34xx; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1441,10 +1438,9 @@ static int __init _omap_gpio_init(void) int j, gpio_count = 16; bank = &gpio_bank[i]; - bank->base = IO_ADDRESS(bank->base); spin_lock_init(&bank->lock); if (bank_is_mpuio(bank)) - omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); + __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT); if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS); diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h index cf1dc022394..10d449ea7ed 100644 --- a/arch/arm/plat-omap/include/mach/board-2430sdp.h +++ b/arch/arm/plat-omap/include/mach/board-2430sdp.h @@ -30,10 +30,12 @@ #define __ASM_ARCH_OMAP_2430SDP_H /* Placeholder for 2430SDP specific defines */ -#define OMAP24XX_ETHR_START 0x08000300 +#define OMAP24XX_ETHR_START 0x08000300 #define OMAP24XX_ETHR_GPIO_IRQ 149 #define SDP2430_CS0_BASE 0x04000000 -#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ +/* Function prototypes */ +extern void sdp2430_flash_init(void); +extern void sdp2430_usb_init(void); #endif /* __ASM_ARCH_OMAP_2430SDP_H */ diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h index d6f2a8e963d..731c858cf3f 100644 --- a/arch/arm/plat-omap/include/mach/board-apollon.h +++ b/arch/arm/plat-omap/include/mach/board-apollon.h @@ -31,6 +31,12 @@ extern void apollon_mmc_init(void); +static inline int apollon_plus(void) +{ + /* The apollon plus has IDCODE revision 5 */ + return system_rev & 0xc0; +} + /* Placeholder for APOLLON specific defines */ #define APOLLON_ETHR_GPIO_IRQ 74 diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h index 1470cd3e519..7c3fa0f0a65 100644 --- a/arch/arm/plat-omap/include/mach/board-h4.h +++ b/arch/arm/plat-omap/include/mach/board-h4.h @@ -1,7 +1,7 @@ /* * arch/arm/plat-omap/include/mach/board-h4.h * - * Hardware definitions for TI OMAP1610 H4 board. + * Hardware definitions for TI OMAP2420 H4 board. * * Initial creation by Dirk Behme <dirk.behme@de.bosch.com> * @@ -29,6 +29,9 @@ #ifndef __ASM_ARCH_OMAP_H4_H #define __ASM_ARCH_OMAP_H4_H +/* MMC Prototypes */ +extern void h4_mmc_init(void); + /* Placeholder for H4 specific defines */ #define OMAP24XX_ETHR_GPIO_IRQ 92 #endif /* __ASM_ARCH_OMAP_H4_H */ diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h new file mode 100644 index 00000000000..66e2746c04c --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-ldp.h @@ -0,0 +1,36 @@ +/* + * arch/arm/plat-omap/include/mach/board-ldp.h + * + * Hardware definitions for TI OMAP3 LDP. + * + * Copyright (C) 2008 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP_LDP_H +#define __ASM_ARCH_OMAP_LDP_H + +extern void twl4030_bci_battery_init(void); + +#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ + +#endif /* __ASM_ARCH_OMAP_LDP_H */ diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h new file mode 100644 index 00000000000..3080d52d877 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-omap3beagle.h @@ -0,0 +1,33 @@ +/* + * arch/arm/plat-omap/include/mach/board-omap3beagle.h + * + * Hardware definitions for TI OMAP3 BEAGLE. + * + * Initial creation by Syed Mohammed Khasim <khasim@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP3_BEAGLE_H +#define __ASM_ARCH_OMAP3_BEAGLE_H + +#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */ + diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h new file mode 100644 index 00000000000..7ecae66966d --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-overo.h @@ -0,0 +1,26 @@ +/* + * board-overo.h (Gumstix Overo) + * + * Initial code: Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OVERO_H +#define __ASM_ARCH_OVERO_H + +#define OVERO_GPIO_BT_XGATE 15 +#define OVERO_GPIO_W2W_NRESET 16 +#define OVERO_GPIO_BT_NRESET 164 +#define OVERO_GPIO_USBH_CPEN 168 +#define OVERO_GPIO_USBH_NRESET 183 + +#endif /* ____ASM_ARCH_OVERO_H */ + diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index 54445642f35..c23c12ccb35 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h @@ -45,6 +45,8 @@ struct omap_mmc_conf { unsigned cover:1; /* 4 wire signaling is optional, and is only used for SD/SDIO */ unsigned wire4:1; + /* use the internal clock */ + unsigned internal_clock:1; s16 power_pin; s16 switch_pin; s16 wp_pin; diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h index 92f7c7238fc..719298554ed 100644 --- a/arch/arm/plat-omap/include/mach/clock.h +++ b/arch/arm/plat-omap/include/mach/clock.h @@ -15,6 +15,7 @@ struct module; struct clk; +struct clockdomain; #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) @@ -79,6 +80,8 @@ struct clk { u32 clksel_mask; const struct clksel *clksel; struct dpll_data *dpll_data; + const char *clkdm_name; + struct clockdomain *clkdm; #else __u8 rate_offset; __u8 src_offset; diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h new file mode 100644 index 00000000000..1f51f017378 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/clockdomain.h @@ -0,0 +1,106 @@ +/* + * linux/include/asm-arm/arch-omap/clockdomain.h + * + * OMAP2/3 clockdomain framework functions + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H +#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H + +#include <mach/powerdomain.h> +#include <mach/clock.h> +#include <mach/cpu.h> + +/* Clockdomain capability flags */ +#define CLKDM_CAN_FORCE_SLEEP (1 << 0) +#define CLKDM_CAN_FORCE_WAKEUP (1 << 1) +#define CLKDM_CAN_ENABLE_AUTO (1 << 2) +#define CLKDM_CAN_DISABLE_AUTO (1 << 3) + +#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) +#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) +#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP) + +/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */ +#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0 +#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1 + +/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */ +#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0 +#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1 +#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2 +#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3 + +/* + * struct clkdm_pwrdm_autodep - a powerdomain that should have wkdeps + * and sleepdeps added when a powerdomain should stay active in hwsup mode; + * and conversely, removed when the powerdomain should be allowed to go + * inactive in hwsup mode. + */ +struct clkdm_pwrdm_autodep { + + /* Name of the powerdomain to add a wkdep/sleepdep on */ + const char *pwrdm_name; + + /* Powerdomain pointer (looked up at clkdm_init() time) */ + struct powerdomain *pwrdm; + + /* OMAP chip types that this clockdomain dep is valid on */ + const struct omap_chip_id omap_chip; + +}; + +struct clockdomain { + + /* Clockdomain name */ + const char *name; + + /* Powerdomain enclosing this clockdomain */ + const char *pwrdm_name; + + /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */ + const u16 clktrctrl_mask; + + /* Clockdomain capability flags */ + const u8 flags; + + /* OMAP chip types that this clockdomain is valid on */ + const struct omap_chip_id omap_chip; + + /* Usecount tracking */ + atomic_t usecount; + + /* Powerdomain pointer assigned at clkdm_register() */ + struct powerdomain *pwrdm; + + struct list_head node; + +}; + +void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *autodeps); +int clkdm_register(struct clockdomain *clkdm); +int clkdm_unregister(struct clockdomain *clkdm); +struct clockdomain *clkdm_lookup(const char *name); + +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)); +struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); + +void omap2_clkdm_allow_idle(struct clockdomain *clkdm); +void omap2_clkdm_deny_idle(struct clockdomain *clkdm); + +int omap2_clkdm_wakeup(struct clockdomain *clkdm); +int omap2_clkdm_sleep(struct clockdomain *clkdm); + +int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); +int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); + +#endif diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h index 06093112b66..ef70e2b0f05 100644 --- a/arch/arm/plat-omap/include/mach/common.h +++ b/arch/arm/plat-omap/include/mach/common.h @@ -34,6 +34,7 @@ struct sys_timer; extern void omap_map_common_io(void); extern struct sys_timer omap_timer; extern void omap_serial_init(void); +extern void omap_serial_enable_clocks(int enable); #ifdef CONFIG_I2C_OMAP extern int omap_register_i2c_bus(int bus_id, u32 clkrate, struct i2c_board_info const *info, @@ -49,6 +50,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, /* IO bases for various OMAP processors */ struct omap_globals { + u32 class; /* OMAP class to detect */ void __iomem *tap; /* Control module ID code */ void __iomem *sdrc; /* SDRAM Controller */ void __iomem *sms; /* SDRAM Memory Scheduler */ @@ -62,6 +64,7 @@ void omap2_set_globals_243x(void); void omap2_set_globals_343x(void); /* These get called from omap2_set_globals_xxxx(), do not call these */ +void omap2_set_globals_tap(struct omap_globals *); void omap2_set_globals_memory(struct omap_globals *); void omap2_set_globals_control(struct omap_globals *); void omap2_set_globals_prcm(struct omap_globals *); diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index e3fd62d9a99..dc988676057 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -1,13 +1,10 @@ -#ifndef __ASM_ARCH_CONTROL_H -#define __ASM_ARCH_CONTROL_H - /* * arch/arm/plat-omap/include/mach/control.h * * OMAP2/3 System Control Module definitions * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation * * Written by Paul Walmsley * @@ -16,14 +13,23 @@ * the Free Software Foundation. */ +#ifndef __ASM_ARCH_CONTROL_H +#define __ASM_ARCH_CONTROL_H + #include <mach/io.h> +#ifndef __ASSEMBLY__ #define OMAP242X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) #define OMAP243X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#else +#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#endif /* __ASSEMBLY__ */ /* * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for @@ -134,6 +140,7 @@ #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) /* * REVISIT: This list of registers is not comprehensive - there are more diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 05aee0eda34..e0464187209 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h @@ -346,9 +346,14 @@ IS_OMAP_TYPE(3430, 0x3430) get_sil_revision(system_rev) /* Various silicon macros defined here */ +#define OMAP242X_CLASS 0x24200000 #define OMAP2420_REV_ES1_0 0x24200000 #define OMAP2420_REV_ES2_0 0x24201000 + +#define OMAP243X_CLASS 0x24300000 #define OMAP2430_REV_ES1_0 0x24300000 + +#define OMAP343X_CLASS 0x34300000 #define OMAP3430_REV_ES1_0 0x34300000 #define OMAP3430_REV_ES2_0 0x34301000 #define OMAP3430_REV_ES2_1 0x34302000 diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S index 1b0039bdeb4..1b11f5c6a2d 100644 --- a/arch/arm/plat-omap/include/mach/debug-macro.S +++ b/arch/arm/plat-omap/include/mach/debug-macro.S @@ -35,6 +35,18 @@ #ifdef CONFIG_OMAP_LL_DEBUG_UART3 add \rx, \rx, #0x00004000 @ UART 3 #endif + +#elif CONFIG_ARCH_OMAP3 + moveq \rx, #0x48000000 @ physical base address + movne \rx, #0xd8000000 @ virtual base + orr \rx, \rx, #0x0006a000 +#ifdef CONFIG_OMAP_LL_DEBUG_UART2 + add \rx, \rx, #0x00002000 @ UART 2 +#endif +#ifdef CONFIG_OMAP_LL_DEBUG_UART3 + add \rx, \rx, #0x00fb0000 @ UART 3 + add \rx, \rx, #0x00006000 +#endif #endif .endm diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index d4e9043bf20..030118ee204 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -55,9 +55,17 @@ 1510: .endm -#elif defined(CONFIG_ARCH_OMAP24XX) +#endif +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) +#if defined(CONFIG_ARCH_OMAP24XX) #include <mach/omap24xx.h> +#endif +#if defined(CONFIG_ARCH_OMAP34XX) +#include <mach/omap34xx.h> +#endif + +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ .macro disable_fiq .endm @@ -79,7 +87,7 @@ ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 2222: - ldrne \irqnr, [\base, #IRQ_SIR_IRQ] + ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] .endm diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h index c92e4b42b28..f1864a652f7 100644 --- a/arch/arm/plat-omap/include/mach/fpga.h +++ b/arch/arm/plat-omap/include/mach/fpga.h @@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void); * --------------------------------------------------------------------------- */ /* maps in the FPGA registers and the ETHR registers */ -#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ -#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ -#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ +#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */ +#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ +#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) #define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ @@ -85,9 +85,9 @@ struct h2p2_dbg_fpga { * OMAP-1510 FPGA * --------------------------------------------------------------------------- */ -#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ -#define OMAP1510_FPGA_SIZE SZ_4K -#define OMAP1510_FPGA_START 0x08000000 /* Physical */ +#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */ +#define OMAP1510_FPGA_SIZE SZ_4K +#define OMAP1510_FPGA_START 0x08000000 /* PA */ /* Revision */ #define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h index 94ce2780e8e..98e9008b7e9 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/mach/gpio.h @@ -26,10 +26,10 @@ #ifndef __ASM_ARCH_OMAP_GPIO_H #define __ASM_ARCH_OMAP_GPIO_H +#include <linux/io.h> #include <mach/irqs.h> -#include <asm/io.h> -#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 +#define OMAP_MPUIO_BASE 0xfffb5000 #ifdef CONFIG_ARCH_OMAP730 #define OMAP_MPUIO_INPUT_LATCH 0x00 @@ -76,6 +76,8 @@ extern void omap_free_gpio(int gpio); extern void omap_set_gpio_direction(int gpio, int is_input); extern void omap_set_gpio_dataout(int gpio, int enable); extern int omap_get_gpio_datain(int gpio); +extern void omap2_gpio_prepare_for_retention(void); +extern void omap2_gpio_resume_after_retention(void); extern void omap_set_gpio_debounce(int gpio, int enable); extern void omap_set_gpio_debounce_time(int gpio, int enable); diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h index 6a8e07ffc2d..45b678439bb 100644 --- a/arch/arm/plat-omap/include/mach/gpmc.h +++ b/arch/arm/plat-omap/include/mach/gpmc.h @@ -11,6 +11,9 @@ #ifndef __OMAP2_GPMC_H #define __OMAP2_GPMC_H +/* Maximum Number of Chip Selects */ +#define GPMC_CS_NUM 8 + #define GPMC_CS_CONFIG1 0x00 #define GPMC_CS_CONFIG2 0x04 #define GPMC_CS_CONFIG3 0x08 @@ -22,6 +25,9 @@ #define GPMC_CS_NAND_ADDRESS 0x20 #define GPMC_CS_NAND_DATA 0x24 +#define GPMC_CONFIG 0x50 +#define GPMC_STATUS 0x54 + #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -78,9 +84,14 @@ struct gpmc_timings { u16 access; /* Start-cycle to first data valid delay */ u16 rd_cycle; /* Total read cycle time */ u16 wr_cycle; /* Total write cycle time */ + + /* The following are only on OMAP3430 */ + u16 wr_access; /* WRACCESSTIME */ + u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ }; extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); +extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); extern unsigned long gpmc_get_fclk_period(void); @@ -92,5 +103,6 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); extern void gpmc_cs_free(int cs); extern int gpmc_cs_set_reserved(int cs, int reserved); extern int gpmc_cs_reserved(int cs); +extern void gpmc_init(void); #endif diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h index 07f5d7f2152..6589ddbb63b 100644 --- a/arch/arm/plat-omap/include/mach/hardware.h +++ b/arch/arm/plat-omap/include/mach/hardware.h @@ -89,7 +89,7 @@ #define DPLL_CTL (0xfffecf00) /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE (0xe1008000) +#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) @@ -282,8 +282,8 @@ #include "omap730.h" #include "omap1510.h" -#include "omap24xx.h" #include "omap16xx.h" +#include "omap24xx.h" #include "omap34xx.h" #ifndef __ASSEMBLER__ @@ -322,6 +322,14 @@ #include "board-2430sdp.h" #endif +#ifdef CONFIG_MACH_OMAP3_BEAGLE +#include "board-omap3beagle.h" +#endif + +#ifdef CONFIG_MACH_OMAP_LDP +#include "board-ldp.h" +#endif + #ifdef CONFIG_MACH_OMAP_APOLLON #include "board-apollon.h" #endif diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index 2a30b7d88cd..adc83b7b820 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -55,14 +55,13 @@ #if defined(CONFIG_ARCH_OMAP1) -#define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define IO_SIZE 0x40000 -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define io_p2v(pa) ((pa) - IO_OFFSET) -#define io_v2p(va) ((va) + IO_OFFSET) +#define IO_PHYS 0xFFFB0000 +#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define IO_SIZE 0x40000 +#define IO_VIRT (IO_PHYS - IO_OFFSET) +#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define io_v2p(va) ((va) + IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) @@ -74,7 +73,6 @@ #define L4_24XX_VIRT 0xd8000000 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ -#ifdef CONFIG_ARCH_OMAP2430 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ #define L4_WK_243X_VIRT 0xd9000000 #define L4_WK_243X_SIZE SZ_1M @@ -88,13 +86,10 @@ #define OMAP243X_SMS_VIRT 0xFC000000 #define OMAP243X_SMS_SIZE SZ_1M -#endif - -#define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ +#define IO_OFFSET 0x90000000 +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ /* DSP */ #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ @@ -149,9 +144,8 @@ #define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ /* DSP */ @@ -167,7 +161,14 @@ #endif -#ifndef __ASSEMBLER__ +#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) +#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa)) +#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa)) + +#ifdef __ASSEMBLER__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __force __iomem *)(x)) /* * Functions to access the OMAP IO region @@ -178,13 +179,13 @@ * - DO NOT use hardcoded virtual addresses to allow changing the * IO address space again if needed */ -#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) +#define omap_readb(a) __raw_readb(IO_ADDRESS(a)) +#define omap_readw(a) __raw_readw(IO_ADDRESS(a)) +#define omap_readl(a) __raw_readl(IO_ADDRESS(a)) -#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) +#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) +#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) +#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) extern void omap1_map_common_io(void); extern void omap1_init_common_hw(void); @@ -192,6 +193,12 @@ extern void omap1_init_common_hw(void); extern void omap2_map_common_io(void); extern void omap2_init_common_hw(void); +#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) +#define __arch_iounmap(v) omap_iounmap(v) + +void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); +void omap_iounmap(volatile void __iomem *addr); + #endif #endif diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 17248bbf3f2..a2929ac8c68 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h @@ -125,6 +125,7 @@ #define INT_UART2 (15 + IH2_BASE) #define INT_BT_MCSI1TX (16 + IH2_BASE) #define INT_BT_MCSI1RX (17 + IH2_BASE) +#define INT_SOSSI_MATCH (19 + IH2_BASE) #define INT_USB_W2FC (20 + IH2_BASE) #define INT_1WIRE (21 + IH2_BASE) #define INT_OS_TIMER (22 + IH2_BASE) @@ -176,6 +177,7 @@ #define INT_1610_DMA_CH14 (61 + IH2_BASE) #define INT_1610_DMA_CH15 (62 + IH2_BASE) #define INT_1610_NAND (63 + IH2_BASE) +#define INT_1610_SHA1MD5 (91 + IH2_BASE) /* * OMAP-730 specific IRQ numbers for interrupt handler 2 @@ -263,12 +265,18 @@ #define INT_24XX_GPTIMER10 46 #define INT_24XX_GPTIMER11 47 #define INT_24XX_GPTIMER12 48 +#define INT_24XX_SHA1MD5 51 +#define INT_24XX_MCBSP4_IRQ_TX 54 +#define INT_24XX_MCBSP4_IRQ_RX 55 #define INT_24XX_I2C1_IRQ 56 #define INT_24XX_I2C2_IRQ 57 +#define INT_24XX_HDQ_IRQ 58 #define INT_24XX_MCBSP1_IRQ_TX 59 #define INT_24XX_MCBSP1_IRQ_RX 60 #define INT_24XX_MCBSP2_IRQ_TX 62 #define INT_24XX_MCBSP2_IRQ_RX 63 +#define INT_24XX_SPI1_IRQ 65 +#define INT_24XX_SPI2_IRQ 66 #define INT_24XX_UART1_IRQ 72 #define INT_24XX_UART2_IRQ 73 #define INT_24XX_UART3_IRQ 74 @@ -278,7 +286,60 @@ #define INT_24XX_USB_IRQ_HGEN 78 #define INT_24XX_USB_IRQ_HSOF 79 #define INT_24XX_USB_IRQ_OTG 80 +#define INT_24XX_MCBSP5_IRQ_TX 81 +#define INT_24XX_MCBSP5_IRQ_RX 82 #define INT_24XX_MMC_IRQ 83 +#define INT_24XX_MMC2_IRQ 86 +#define INT_24XX_MCBSP3_IRQ_TX 89 +#define INT_24XX_MCBSP3_IRQ_RX 90 +#define INT_24XX_SPI3_IRQ 91 + +#define INT_243X_MCBSP2_IRQ 16 +#define INT_243X_MCBSP3_IRQ 17 +#define INT_243X_MCBSP4_IRQ 18 +#define INT_243X_MCBSP5_IRQ 19 +#define INT_243X_MCBSP1_IRQ 64 +#define INT_243X_HS_USB_MC 92 +#define INT_243X_HS_USB_DMA 93 +#define INT_243X_CARKIT_IRQ 94 + +#define INT_34XX_BENCH_MPU_EMUL 3 +#define INT_34XX_ST_MCBSP2_IRQ 4 +#define INT_34XX_ST_MCBSP3_IRQ 5 +#define INT_34XX_SSM_ABORT_IRQ 6 +#define INT_34XX_SYS_NIRQ 7 +#define INT_34XX_D2D_FW_IRQ 8 +#define INT_34XX_PRCM_MPU_IRQ 11 +#define INT_34XX_MCBSP1_IRQ 16 +#define INT_34XX_MCBSP2_IRQ 17 +#define INT_34XX_MCBSP3_IRQ 22 +#define INT_34XX_MCBSP4_IRQ 23 +#define INT_34XX_CAM_IRQ 24 +#define INT_34XX_MCBSP5_IRQ 27 +#define INT_34XX_GPIO_BANK1 29 +#define INT_34XX_GPIO_BANK2 30 +#define INT_34XX_GPIO_BANK3 31 +#define INT_34XX_GPIO_BANK4 32 +#define INT_34XX_GPIO_BANK5 33 +#define INT_34XX_GPIO_BANK6 34 +#define INT_34XX_USIM_IRQ 35 +#define INT_34XX_WDT3_IRQ 36 +#define INT_34XX_SPI4_IRQ 48 +#define INT_34XX_SHA1MD52_IRQ 49 +#define INT_34XX_FPKA_READY_IRQ 50 +#define INT_34XX_SHA1MD51_IRQ 51 +#define INT_34XX_RNG_IRQ 52 +#define INT_34XX_I2C3_IRQ 61 +#define INT_34XX_FPKA_ERROR_IRQ 64 +#define INT_34XX_PBIAS_IRQ 75 +#define INT_34XX_OHCI_IRQ 76 +#define INT_34XX_EHCI_IRQ 77 +#define INT_34XX_TLL_IRQ 78 +#define INT_34XX_PARTHASH_IRQ 79 +#define INT_34XX_MMC3_IRQ 94 +#define INT_34XX_GPT12_IRQ 95 + +#define INT_34XX_BENCH_MPU_EMUL 3 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and * 16 MPUIO lines */ diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index 8fdb95e26fc..6a0d1a0a24a 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h @@ -43,9 +43,15 @@ #define OMAP24XX_MCBSP1_BASE 0x48074000 #define OMAP24XX_MCBSP2_BASE 0x48076000 +#define OMAP2430_MCBSP3_BASE 0x4808c000 +#define OMAP2430_MCBSP4_BASE 0x4808e000 +#define OMAP2430_MCBSP5_BASE 0x48096000 #define OMAP34XX_MCBSP1_BASE 0x48074000 #define OMAP34XX_MCBSP2_BASE 0x49022000 +#define OMAP34XX_MCBSP3_BASE 0x49024000 +#define OMAP34XX_MCBSP4_BASE 0x49026000 +#define OMAP34XX_MCBSP5_BASE 0x48096000 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) @@ -81,9 +87,6 @@ #define OMAP_MCBSP_REG_XCERG 0x3A #define OMAP_MCBSP_REG_XCERH 0x3C -#define OMAP_MAX_MCBSP_COUNT 3 -#define MAX_MCBSP_CLOCKS 3 - #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) @@ -91,12 +94,14 @@ #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX -#elif defined(CONFIG_ARCH_OMAP24XX) +#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) #define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR1 0x04 #define OMAP_MCBSP_REG_DXR2 0x08 #define OMAP_MCBSP_REG_DXR1 0x0C +#define OMAP_MCBSP_REG_DRR 0x00 +#define OMAP_MCBSP_REG_DXR 0x08 #define OMAP_MCBSP_REG_SPCR2 0x10 #define OMAP_MCBSP_REG_SPCR1 0x14 #define OMAP_MCBSP_REG_RCR2 0x18 @@ -124,9 +129,9 @@ #define OMAP_MCBSP_REG_RCERH 0x70 #define OMAP_MCBSP_REG_XCERG 0x74 #define OMAP_MCBSP_REG_XCERH 0x78 - -#define OMAP_MAX_MCBSP_COUNT 2 -#define MAX_MCBSP_CLOCKS 2 +#define OMAP_MCBSP_REG_SYSCON 0x8C +#define OMAP_MCBSP_REG_XCCR 0xAC +#define OMAP_MCBSP_REG_RCCR 0xB0 #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) @@ -137,10 +142,6 @@ #endif -#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) -#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) - - /************************** McBSP SPCR1 bit definitions ***********************/ #define RRST 0x0001 #define RRDY 0x0002 @@ -151,6 +152,7 @@ #define DXENA 0x0080 #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ #define RJUST(value) ((value)<<13) /* bits 13:14 */ +#define ALB 0x8000 #define DLB 0x8000 /************************** McBSP SPCR2 bit definitions ***********************/ @@ -228,6 +230,17 @@ #define XPABLK(value) ((value)<<5) /* Bits 5:6 */ #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ +/*********************** McBSP XCCR bit definitions *************************/ +#define DILB 0x0020 +#define XDMAEN 0x0008 +#define XDISABLE 0x0001 + +/********************** McBSP RCCR bit definitions *************************/ +#define RDMAEN 0x0008 +#define RDISABLE 0x0001 + +/********************** McBSP SYSCONFIG bit definitions ********************/ +#define SOFTRST 0x0002 /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { @@ -260,6 +273,8 @@ typedef enum { OMAP_MCBSP1 = 0, OMAP_MCBSP2, OMAP_MCBSP3, + OMAP_MCBSP4, + OMAP_MCBSP5 } omap_mcbsp_id; typedef int __bitwise omap_mcbsp_io_type_t; @@ -311,12 +326,10 @@ struct omap_mcbsp_spi_cfg { struct omap_mcbsp_ops { void (*request)(unsigned int); void (*free)(unsigned int); - int (*check)(unsigned int); }; struct omap_mcbsp_platform_data { unsigned long phys_base; - u32 virt_base; u8 dma_rx_sync, dma_tx_sync; u16 rx_irq, tx_irq; struct omap_mcbsp_ops *ops; @@ -326,7 +339,7 @@ struct omap_mcbsp_platform_data { struct omap_mcbsp { struct device *dev; unsigned long phys_base; - u32 io_base; + void __iomem *io_base; u8 id; u8 free; omap_mcbsp_word_length rx_word_length; @@ -354,6 +367,8 @@ struct omap_mcbsp { struct omap_mcbsp_platform_data *pdata; struct clk *clk; }; +extern struct omap_mcbsp **mcbsp_ptr; +extern int omap_mcbsp_count; int omap_mcbsp_init(void); void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, @@ -378,5 +393,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * /* Polled read/write functions */ int omap_mcbsp_pollread(unsigned int id, u16 * buf); int omap_mcbsp_pollwrite(unsigned int id, u16 buf); +int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); #endif diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h index a325caf80d0..d40cac60b95 100644 --- a/arch/arm/plat-omap/include/mach/memory.h +++ b/arch/arm/plat-omap/include/mach/memory.h @@ -38,7 +38,7 @@ */ #if defined(CONFIG_ARCH_OMAP1) #define PHYS_OFFSET UL(0x10000000) -#elif defined(CONFIG_ARCH_OMAP2) +#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) #define PHYS_OFFSET UL(0x80000000) #endif diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h index 5cee7e16a1b..39b591ff54b 100644 --- a/arch/arm/plat-omap/include/mach/mtd-xip.h +++ b/arch/arm/plat-omap/include/mach/mtd-xip.h @@ -3,7 +3,7 @@ * * Do not include this file directly. It's included from linux/mtd/xip.h * - * Author: Vladimir Barinov <vbarinov@ru.mvista.com> + * Author: Vladimir Barinov <vbarinov@embeddedalley.com> * * (c) 2005 MontaVista Software, Inc. This file is licensed under the * terms of the GNU General Public License version 2. This program is diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 614b2c1327c..6bbf1789bed 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h @@ -125,20 +125,64 @@ .pu_pd_val = pull_mode, \ }, - -#define PULL_DISABLED 0 -#define PULL_ENABLED 1 - -#define PULL_DOWN 0 -#define PULL_UP 1 +/* 24xx/34xx mux bit defines */ +#define OMAP2_PULL_ENA (1 << 3) +#define OMAP2_PULL_UP (1 << 4) +#define OMAP2_ALTELECTRICALSEL (1 << 5) + +/* 34xx specific mux bit defines */ +#define OMAP3_INPUT_EN (1 << 8) +#define OMAP3_OFF_EN (1 << 9) +#define OMAP3_OFFOUT_EN (1 << 10) +#define OMAP3_OFFOUT_VAL (1 << 11) +#define OMAP3_OFF_PULL_EN (1 << 12) +#define OMAP3_OFF_PULL_UP (1 << 13) +#define OMAP3_WAKEUP_EN (1 << 14) + +/* 34xx mux mode options for each pin. See TRM for options */ +#define OMAP34XX_MUX_MODE0 0 +#define OMAP34XX_MUX_MODE1 1 +#define OMAP34XX_MUX_MODE2 2 +#define OMAP34XX_MUX_MODE3 3 +#define OMAP34XX_MUX_MODE4 4 +#define OMAP34XX_MUX_MODE5 5 +#define OMAP34XX_MUX_MODE6 6 +#define OMAP34XX_MUX_MODE7 7 + +/* 34xx active pin states */ +#define OMAP34XX_PIN_OUTPUT 0 +#define OMAP34XX_PIN_INPUT OMAP3_INPUT_EN +#define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \ + | OMAP2_PULL_UP) +#define OMAP34XX_PIN_INPUT_PULLDOWN (OMAP2_PULL_ENA | OMAP3_INPUT_EN) + +/* 34xx off mode states */ +#define OMAP34XX_PIN_OFF_NONE 0 +#define OMAP34XX_PIN_OFF_OUTPUT_HIGH (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \ + | OMAP3_OFFOUT_VAL) +#define OMAP34XX_PIN_OFF_OUTPUT_LOW (OMAP3_OFF_EN | OMAP3_OFFOUT_EN) +#define OMAP34XX_PIN_OFF_INPUT_PULLUP (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \ + | OMAP3_OFF_PULL_UP) +#define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN) +#define OMAP34XX_PIN_OFF_WAKEUPENABLE OMAP3_WAKEUP_EN + +#define MUX_CFG_34XX(desc, reg_offset, mux_value) { \ + .name = desc, \ + .debug = 0, \ + .mux_reg = reg_offset, \ + .mux_val = mux_value \ +}, struct pin_config { - char *name; - unsigned char busy; - unsigned char debug; + char *name; + const unsigned int mux_reg; + unsigned char debug; - const char *mux_reg_name; - const unsigned int mux_reg; +#if defined(CONFIG_ARCH_OMAP34XX) + u16 mux_val; /* Wake-up, off mode, pull, mux mode */ +#endif + +#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX) const unsigned char mask_offset; const unsigned char mask; @@ -150,6 +194,12 @@ struct pin_config { const char *pu_pd_name; const unsigned int pu_pd_reg; const unsigned char pu_pd_val; +#endif + +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) + const char *mux_reg_name; +#endif + }; enum omap730_index { @@ -593,6 +643,114 @@ enum omap24xx_index { }; +enum omap34xx_index { + /* 34xx I2C */ + K21_34XX_I2C1_SCL, + J21_34XX_I2C1_SDA, + AF15_34XX_I2C2_SCL, + AE15_34XX_I2C2_SDA, + AF14_34XX_I2C3_SCL, + AG14_34XX_I2C3_SDA, + AD26_34XX_I2C4_SCL, + AE26_34XX_I2C4_SDA, + + /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ + Y8_3430_USB1HS_PHY_CLK, + Y9_3430_USB1HS_PHY_STP, + AA14_3430_USB1HS_PHY_DIR, + AA11_3430_USB1HS_PHY_NXT, + W13_3430_USB1HS_PHY_DATA0, + W12_3430_USB1HS_PHY_DATA1, + W11_3430_USB1HS_PHY_DATA2, + Y11_3430_USB1HS_PHY_DATA3, + W9_3430_USB1HS_PHY_DATA4, + Y12_3430_USB1HS_PHY_DATA5, + W8_3430_USB1HS_PHY_DATA6, + Y13_3430_USB1HS_PHY_DATA7, + + /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/ + AA8_3430_USB2HS_PHY_CLK, + AA10_3430_USB2HS_PHY_STP, + AA9_3430_USB2HS_PHY_DIR, + AB11_3430_USB2HS_PHY_NXT, + AB10_3430_USB2HS_PHY_DATA0, + AB9_3430_USB2HS_PHY_DATA1, + W3_3430_USB2HS_PHY_DATA2, + T4_3430_USB2HS_PHY_DATA3, + T3_3430_USB2HS_PHY_DATA4, + R3_3430_USB2HS_PHY_DATA5, + R4_3430_USB2HS_PHY_DATA6, + T2_3430_USB2HS_PHY_DATA7, + + + /* TLL - HSUSB: 12-pin TLL Port 1*/ + Y8_3430_USB1HS_TLL_CLK, + Y9_3430_USB1HS_TLL_STP, + AA14_3430_USB1HS_TLL_DIR, + AA11_3430_USB1HS_TLL_NXT, + W13_3430_USB1HS_TLL_DATA0, + W12_3430_USB1HS_TLL_DATA1, + W11_3430_USB1HS_TLL_DATA2, + Y11_3430_USB1HS_TLL_DATA3, + W9_3430_USB1HS_TLL_DATA4, + Y12_3430_USB1HS_TLL_DATA5, + W8_3430_USB1HS_TLL_DATA6, + Y13_3430_USB1HS_TLL_DATA7, + + /* TLL - HSUSB: 12-pin TLL Port 2*/ + AA8_3430_USB2HS_TLL_CLK, + AA10_3430_USB2HS_TLL_STP, + AA9_3430_USB2HS_TLL_DIR, + AB11_3430_USB2HS_TLL_NXT, + AB10_3430_USB2HS_TLL_DATA0, + AB9_3430_USB2HS_TLL_DATA1, + W3_3430_USB2HS_TLL_DATA2, + T4_3430_USB2HS_TLL_DATA3, + T3_3430_USB2HS_TLL_DATA4, + R3_3430_USB2HS_TLL_DATA5, + R4_3430_USB2HS_TLL_DATA6, + T2_3430_USB2HS_TLL_DATA7, + + /* TLL - HSUSB: 12-pin TLL Port 3*/ + AA6_3430_USB3HS_TLL_CLK, + AB3_3430_USB3HS_TLL_STP, + AA3_3430_USB3HS_TLL_DIR, + Y3_3430_USB3HS_TLL_NXT, + AA5_3430_USB3HS_TLL_DATA0, + Y4_3430_USB3HS_TLL_DATA1, + Y5_3430_USB3HS_TLL_DATA2, + W5_3430_USB3HS_TLL_DATA3, + AB12_3430_USB3HS_TLL_DATA4, + AB13_3430_USB3HS_TLL_DATA5, + AA13_3430_USB3HS_TLL_DATA6, + AA12_3430_USB3HS_TLL_DATA7, + + /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */ + AF10_3430_USB1FS_PHY_MM1_RXDP, + AG9_3430_USB1FS_PHY_MM1_RXDM, + W13_3430_USB1FS_PHY_MM1_RXRCV, + W12_3430_USB1FS_PHY_MM1_TXSE0, + W11_3430_USB1FS_PHY_MM1_TXDAT, + Y11_3430_USB1FS_PHY_MM1_TXEN_N, + + /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */ + AF7_3430_USB2FS_PHY_MM2_RXDP, + AH7_3430_USB2FS_PHY_MM2_RXDM, + AB10_3430_USB2FS_PHY_MM2_RXRCV, + AB9_3430_USB2FS_PHY_MM2_TXSE0, + W3_3430_USB2FS_PHY_MM2_TXDAT, + T4_3430_USB2FS_PHY_MM2_TXEN_N, + + /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */ + AH3_3430_USB3FS_PHY_MM3_RXDP, + AE3_3430_USB3FS_PHY_MM3_RXDM, + AD1_3430_USB3FS_PHY_MM3_RXRCV, + AE1_3430_USB3FS_PHY_MM3_TXSE0, + AD2_3430_USB3FS_PHY_MM3_TXDAT, + AC1_3430_USB3FS_PHY_MM3_TXEN_N, + +}; + struct omap_mux_cfg { struct pin_config *pins; unsigned long size; diff --git a/arch/arm/plat-omap/include/mach/omap1510.h b/arch/arm/plat-omap/include/mach/omap1510.h index 505a38af8b2..d2400466813 100644 --- a/arch/arm/plat-omap/include/mach/omap1510.h +++ b/arch/arm/plat-omap/include/mach/omap1510.h @@ -44,5 +44,7 @@ #define OMAP1510_DSPREG_SIZE SZ_128K #define OMAP1510_DSPREG_START 0xE1000000 +#define OMAP1510_DSP_MMU_BASE (0xfffed200) + #endif /* __ASM_ARCH_OMAP15XX_H */ diff --git a/arch/arm/plat-omap/include/mach/omap16xx.h b/arch/arm/plat-omap/include/mach/omap16xx.h index c6c93afb278..0e69b504c25 100644 --- a/arch/arm/plat-omap/include/mach/omap16xx.h +++ b/arch/arm/plat-omap/include/mach/omap16xx.h @@ -44,6 +44,11 @@ #define OMAP16XX_DSPREG_SIZE SZ_128K #define OMAP16XX_DSPREG_START 0xE1000000 +#define OMAP16XX_SEC_BASE 0xFFFE4000 +#define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000) +#define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800) +#define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000) + /* * --------------------------------------------------------------------------- * Interrupts @@ -190,7 +195,7 @@ #define WSPR_DISABLE_0 (0x0000aaaa) #define WSPR_DISABLE_1 (0x00005555) -/* Mailbox */ +#define OMAP16XX_DSP_MMU_BASE (0xfffed200) #define OMAP16XX_MAILBOX_BASE (0xfffcf000) #endif /* __ASM_ARCH_OMAP16XX_H */ diff --git a/arch/arm/plat-omap/include/mach/omap24xx.h b/arch/arm/plat-omap/include/mach/omap24xx.h index bb8319d66e9..24335d4932f 100644 --- a/arch/arm/plat-omap/include/mach/omap24xx.h +++ b/arch/arm/plat-omap/include/mach/omap24xx.h @@ -39,7 +39,6 @@ /* interrupt controller */ #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) #define OMAP24XX_IVA_INTC_BASE 0x40000000 -#define IRQ_SIR_IRQ 0x0040 #define OMAP2420_CTRL_BASE L4_24XX_BASE #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) @@ -48,6 +47,7 @@ #define OMAP2420_PRM_BASE OMAP2420_CM_BASE #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) #define OMAP2420_SMS_BASE 0x68008000 +#define OMAP2420_GPMC_BASE 0x6800a000 #define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) #define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h index cae037d1307..ec67fb42860 100644 --- a/arch/arm/plat-omap/include/mach/omapfb.h +++ b/arch/arm/plat-omap/include/mach/omapfb.h @@ -62,6 +62,7 @@ #define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 #define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 #define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 +#define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000 #define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 /* Values from DSP must map to lower 16-bits */ @@ -305,6 +306,7 @@ struct lcd_ctrl { int screen_width, int pos_x, int pos_y, int width, int height, int color_mode); + int (*set_rotate) (int angle); int (*setup_mem) (int plane, size_t size, int mem_type, unsigned long *paddr); int (*mmap) (struct fb_info *info, @@ -374,6 +376,7 @@ extern struct lcd_ctrl omap1_lcd_ctrl; extern struct lcd_ctrl omap2_disp_ctrl; #endif +extern void omapfb_reserve_sdram(void); extern void omapfb_register_panel(struct lcd_panel *panel); extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); extern void omapfb_notify_clients(struct omapfb_device *fbdev, diff --git a/arch/arm/plat-omap/include/mach/onenand.h b/arch/arm/plat-omap/include/mach/onenand.h index d57f20226b2..4649d302c26 100644 --- a/arch/arm/plat-omap/include/mach/onenand.h +++ b/arch/arm/plat-omap/include/mach/onenand.h @@ -16,6 +16,10 @@ struct omap_onenand_platform_data { int gpio_irq; struct mtd_partition *parts; int nr_parts; - int (*onenand_setup)(void __iomem *); + int (*onenand_setup)(void __iomem *, int freq); int dma_channel; }; + +int omap2_onenand_rephase(void); + +#define ONENAND_MAX_PARTITIONS 8 diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h index bfa09325a5f..768eb6e7abc 100644 --- a/arch/arm/plat-omap/include/mach/pm.h +++ b/arch/arm/plat-omap/include/mach/pm.h @@ -39,11 +39,11 @@ * Register and offset definitions to be used in PM assembler code * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) +#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) #define ARM_IDLECT1_ASM_OFFSET 0x04 #define ARM_IDLECT2_ASM_OFFSET 0x08 -#define TCMIF_ASM_BASE io_p2v(0xfffecc00) +#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) #define EMIFS_CONFIG_ASM_OFFSET 0x0c #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 @@ -135,7 +135,8 @@ extern void omap_pm_suspend(void); extern void omap730_cpu_suspend(unsigned short, unsigned short); extern void omap1510_cpu_suspend(unsigned short, unsigned short); extern void omap1610_cpu_suspend(unsigned short, unsigned short); -extern void omap24xx_cpu_suspend(u32 dll_ctrl, u32 cpu_revision); +extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, + void __iomem *sdrc_power); extern void omap730_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void); diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h new file mode 100644 index 00000000000..2806a9c8e4d --- /dev/null +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -0,0 +1,166 @@ +/* + * OMAP2/3 powerdomain control + * + * Copyright (C) 2007-8 Texas Instruments, Inc. + * Copyright (C) 2007-8 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN +#define ASM_ARM_ARCH_OMAP_POWERDOMAIN + +#include <linux/types.h> +#include <linux/list.h> + +#include <asm/atomic.h> + +#include <mach/cpu.h> + + +/* Powerdomain basic power states */ +#define PWRDM_POWER_OFF 0x0 +#define PWRDM_POWER_RET 0x1 +#define PWRDM_POWER_INACTIVE 0x2 +#define PWRDM_POWER_ON 0x3 + +/* Powerdomain allowable state bitfields */ +#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_ON)) + +#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_RET)) + +#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) + + +/* Powerdomain flags */ +#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ + + +/* + * Number of memory banks that are power-controllable. On OMAP3430, the + * maximum is 4. + */ +#define PWRDM_MAX_MEM_BANKS 4 + +/* + * Maximum number of clockdomains that can be associated with a powerdomain. + * CORE powerdomain is probably the worst case. + */ +#define PWRDM_MAX_CLKDMS 3 + +/* XXX A completely arbitrary number. What is reasonable here? */ +#define PWRDM_TRANSITION_BAILOUT 100000 + +struct clockdomain; +struct powerdomain; + +/* Encodes dependencies between powerdomains - statically defined */ +struct pwrdm_dep { + + /* Powerdomain name */ + const char *pwrdm_name; + + /* Powerdomain pointer - resolved by the powerdomain code */ + struct powerdomain *pwrdm; + + /* Flags to mark OMAP chip restrictions, etc. */ + const struct omap_chip_id omap_chip; + +}; + +struct powerdomain { + + /* Powerdomain name */ + const char *name; + + /* the address offset from CM_BASE/PRM_BASE */ + const s16 prcm_offs; + + /* Used to represent the OMAP chip types containing this pwrdm */ + const struct omap_chip_id omap_chip; + + /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ + const u8 dep_bit; + + /* Powerdomains that can be told to wake this powerdomain up */ + struct pwrdm_dep *wkdep_srcs; + + /* Powerdomains that can be told to keep this pwrdm from inactivity */ + struct pwrdm_dep *sleepdep_srcs; + + /* Possible powerdomain power states */ + const u8 pwrsts; + + /* Possible logic power states when pwrdm in RETENTION */ + const u8 pwrsts_logic_ret; + + /* Powerdomain flags */ + const u8 flags; + + /* Number of software-controllable memory banks in this powerdomain */ + const u8 banks; + + /* Possible memory bank pwrstates when pwrdm in RETENTION */ + const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; + + /* Possible memory bank pwrstates when pwrdm is ON */ + const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; + + /* Clockdomains in this powerdomain */ + struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; + + struct list_head node; + +}; + + +void pwrdm_init(struct powerdomain **pwrdm_list); + +int pwrdm_register(struct powerdomain *pwrdm); +int pwrdm_unregister(struct powerdomain *pwrdm); +struct powerdomain *pwrdm_lookup(const char *name); + +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); + +int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, + int (*fn)(struct powerdomain *pwrdm, + struct clockdomain *clkdm)); + +int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); + +int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); + +int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); +int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); + +int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); +int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); + +int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); + +int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm); +int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm); +bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); + +int pwrdm_wait_transition(struct powerdomain *pwrdm); + +#endif diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 787b7acec54..a98c6c3beb2 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -25,6 +25,8 @@ #define SDRC_DLLB_STATUS 0x06C #define SDRC_POWER 0x070 #define SDRC_MR_0 0x084 +#define SDRC_ACTIM_CTRL_A_0 0x09c +#define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 /* @@ -63,9 +65,9 @@ */ -#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) -#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) -#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) +#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg) +#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg) +#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg) /* SMS register offsets - read/write with sms_{read,write}_reg() */ diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index cc6bfa51ccb..8a676a04be4 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h @@ -20,18 +20,24 @@ #define OMAP_UART1_BASE 0x4806a000 #define OMAP_UART2_BASE 0x4806c000 #define OMAP_UART3_BASE 0x4806e000 +#elif defined(CONFIG_ARCH_OMAP3) +/* OMAP3 serial ports */ +#define OMAP_UART1_BASE 0x4806a000 +#define OMAP_UART2_BASE 0x4806c000 +#define OMAP_UART3_BASE 0x49020000 #endif #define OMAP_MAX_NR_PORTS 3 #define OMAP1510_BASE_BAUD (12000000/16) #define OMAP16XX_BASE_BAUD (48000000/16) +#define OMAP24XX_BASE_BAUD (48000000/16) -#define is_omap_port(p) ({int __ret = 0; \ - if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ - p == IO_ADDRESS(OMAP_UART2_BASE) || \ - p == IO_ADDRESS(OMAP_UART3_BASE)) \ - __ret = 1; \ - __ret; \ +#define is_omap_port(pt) ({int __ret = 0; \ + if ((pt)->port.mapbase == OMAP_UART1_BASE || \ + (pt)->port.mapbase == OMAP_UART2_BASE || \ + (pt)->port.mapbase == OMAP_UART3_BASE) \ + __ret = 1; \ + __ret; \ }) #endif diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index e0932344998..ab35d622dcf 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h @@ -21,6 +21,10 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); +extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2); + /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap1_sram_reprogram_clock_sz; @@ -53,4 +57,10 @@ extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); extern unsigned long omap243x_sram_reprogram_sdrc_sz; + +extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2); +extern unsigned long omap3_sram_configure_core_dpll_sz; + #endif diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h index 06a28c7b98d..06923f26154 100644 --- a/arch/arm/plat-omap/include/mach/system.h +++ b/arch/arm/plat-omap/include/mach/system.h @@ -40,7 +40,7 @@ static inline void omap1_arch_reset(char mode) static inline void arch_reset(char mode) { - if (!cpu_is_omap24xx()) + if (!cpu_class_is_omap2()) omap1_arch_reset(mode); else omap_prcm_arch_reset(mode); diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c new file mode 100644 index 00000000000..af326efc1ad --- /dev/null +++ b/arch/arm/plat-omap/io.c @@ -0,0 +1,107 @@ +#include <linux/module.h> +#include <linux/io.h> +#include <linux/mm.h> + +#include <mach/omap730.h> +#include <mach/omap1510.h> +#include <mach/omap16xx.h> +#include <mach/omap24xx.h> +#include <mach/omap34xx.h> + +#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) +#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) + +/* + * Intercept ioremap() requests for addresses in our fixed mapping regions. + */ +void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) +{ +#ifdef CONFIG_ARCH_OMAP1 + if (cpu_class_is_omap1()) { + if (BETWEEN(p, IO_PHYS, IO_SIZE)) + return XLATE(p, IO_PHYS, IO_VIRT); + } + if (cpu_is_omap730()) { + if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) + return XLATE(p, OMAP730_DSP_BASE, OMAP730_DSP_START); + + if (BETWEEN(p, OMAP730_DSPREG_BASE, OMAP730_DSPREG_SIZE)) + return XLATE(p, OMAP730_DSPREG_BASE, + OMAP730_DSPREG_START); + } + if (cpu_is_omap15xx()) { + if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) + return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START); + + if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE)) + return XLATE(p, OMAP1510_DSPREG_BASE, + OMAP1510_DSPREG_START); + } + if (cpu_is_omap16xx()) { + if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE)) + return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START); + + if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE)) + return XLATE(p, OMAP16XX_DSPREG_BASE, + OMAP16XX_DSPREG_START); + } +#endif +#ifdef CONFIG_ARCH_OMAP2 + if (cpu_is_omap24xx()) { + if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) + return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); + if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) + return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); + } + if (cpu_is_omap2420()) { + if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) + return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); + if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) + return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); + if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) + return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); + } + if (cpu_is_omap2430()) { + if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) + return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT); + if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) + return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); + if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE)) + return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT); + if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE)) + return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT); + } +#endif +#ifdef CONFIG_ARCH_OMAP3 + if (cpu_is_omap34xx()) { + if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) + return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); + if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) + return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); + if (BETWEEN(p, L4_WK_34XX_PHYS, L4_WK_34XX_SIZE)) + return XLATE(p, L4_WK_34XX_PHYS, L4_WK_34XX_VIRT); + if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE)) + return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT); + if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE)) + return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT); + if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE)) + return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT); + if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE)) + return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT); + if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE)) + return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); + } +#endif + + return __arm_ioremap(p, size, type); +} +EXPORT_SYMBOL(omap_ioremap); + +void omap_iounmap(volatile void __iomem *addr) +{ + unsigned long virt = (unsigned long)addr; + + if (virt >= VMALLOC_START && virt < VMALLOC_END) + __iounmap(addr); +} +EXPORT_SYMBOL(omap_iounmap); diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 1d7aec1a691..b52ce053e6f 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c @@ -30,7 +30,7 @@ #include <linux/blkdev.h> #include <linux/err.h> #include <linux/delay.h> -#include <asm/io.h> +#include <linux/io.h> #include <mach/mailbox.h> #include "mailbox.h" diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 014d26574bb..af33fc713e1 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -27,43 +27,65 @@ #include <mach/dma.h> #include <mach/mcbsp.h> -static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; +struct omap_mcbsp **mcbsp_ptr; +int omap_mcbsp_count; -#define omap_mcbsp_check_valid_id(id) (mcbsp[id].pdata && \ - mcbsp[id].pdata->ops && \ - mcbsp[id].pdata->ops->check && \ - (mcbsp[id].pdata->ops->check(id) == 0)) +void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + __raw_writew((u16)val, io_base + reg); + else + __raw_writel(val, io_base + reg); +} + +int omap_mcbsp_read(void __iomem *io_base, u16 reg) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + return __raw_readw(io_base + reg); + else + return __raw_readl(io_base + reg); +} + +#define OMAP_MCBSP_READ(base, reg) \ + omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg) +#define OMAP_MCBSP_WRITE(base, reg, val) \ + omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val) + +#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; static void omap_mcbsp_dump_reg(u8 id) { - dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id); - dev_dbg(mcbsp[id].dev, "DRR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2)); - dev_dbg(mcbsp[id].dev, "DRR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1)); - dev_dbg(mcbsp[id].dev, "DXR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2)); - dev_dbg(mcbsp[id].dev, "DXR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1)); - dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2)); - dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1)); - dev_dbg(mcbsp[id].dev, "RCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2)); - dev_dbg(mcbsp[id].dev, "RCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1)); - dev_dbg(mcbsp[id].dev, "XCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2)); - dev_dbg(mcbsp[id].dev, "XCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1)); - dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2)); - dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1)); - dev_dbg(mcbsp[id].dev, "PCR0: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0)); - dev_dbg(mcbsp[id].dev, "***********************\n"); + struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); + + dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); + dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DRR2)); + dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DRR1)); + dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DXR2)); + dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DXR1)); + dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SPCR2)); + dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SPCR1)); + dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, RCR2)); + dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, RCR1)); + dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, XCR2)); + dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, XCR1)); + dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SRGR2)); + dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SRGR1)); + dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, PCR0)); + dev_dbg(mcbsp->dev, "***********************\n"); } static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) @@ -126,16 +148,18 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) */ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); - io_base = mcbsp[id].io_base; - dev_dbg(mcbsp[id].dev, "Configuring McBSP%d io_base: 0x%8x\n", - mcbsp[id].id, io_base); + io_base = mcbsp->io_base; + dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", + mcbsp->id, mcbsp->phys_base); /* We write the given config */ OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2); @@ -158,23 +182,26 @@ EXPORT_SYMBOL(omap_mcbsp_config); */ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) { + struct omap_mcbsp *mcbsp; + if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - spin_lock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); - if (!mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + if (!mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d is currently in use\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return -EINVAL; } - mcbsp[id].io_type = io_type; + mcbsp->io_type = io_type; - spin_unlock(&mcbsp[id].lock); + spin_unlock(&mcbsp->lock); return 0; } @@ -182,53 +209,60 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type); int omap_mcbsp_request(unsigned int id) { + struct omap_mcbsp *mcbsp; int err; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp[id].pdata->ops->request) - mcbsp[id].pdata->ops->request(id); + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) + mcbsp->pdata->ops->request(id); - clk_enable(mcbsp[id].clk); + clk_enable(mcbsp->clk); - spin_lock(&mcbsp[id].lock); - if (!mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); + if (!mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d is currently in use\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return -1; } - mcbsp[id].free = 0; - spin_unlock(&mcbsp[id].lock); + mcbsp->free = 0; + spin_unlock(&mcbsp->lock); + + /* + * Make sure that transmitter, receiver and sample-rate generator are + * not running before activating IRQs. + */ + OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0); + OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0); - if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { + if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* We need to get IRQs here */ - err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, - 0, "McBSP", (void *) (&mcbsp[id])); + init_completion(&mcbsp->tx_irq_completion); + err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, + 0, "McBSP", (void *)mcbsp); if (err != 0) { - dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d " - "for McBSP%d\n", mcbsp[id].tx_irq, - mcbsp[id].id); + dev_err(mcbsp->dev, "Unable to request TX IRQ %d " + "for McBSP%d\n", mcbsp->tx_irq, + mcbsp->id); return err; } - init_completion(&(mcbsp[id].tx_irq_completion)); - - err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, - 0, "McBSP", (void *) (&mcbsp[id])); + init_completion(&mcbsp->rx_irq_completion); + err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler, + 0, "McBSP", (void *)mcbsp); if (err != 0) { - dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d " - "for McBSP%d\n", mcbsp[id].rx_irq, - mcbsp[id].id); - free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); + dev_err(mcbsp->dev, "Unable to request RX IRQ %d " + "for McBSP%d\n", mcbsp->rx_irq, + mcbsp->id); + free_irq(mcbsp->tx_irq, (void *)mcbsp); return err; } - - init_completion(&(mcbsp[id].rx_irq_completion)); } return 0; @@ -237,31 +271,34 @@ EXPORT_SYMBOL(omap_mcbsp_request); void omap_mcbsp_free(unsigned int id) { + struct omap_mcbsp *mcbsp; + if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp[id].pdata->ops->free) - mcbsp[id].pdata->ops->free(id); + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) + mcbsp->pdata->ops->free(id); - clk_disable(mcbsp[id].clk); + clk_disable(mcbsp->clk); - spin_lock(&mcbsp[id].lock); - if (mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); + if (mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d was not reserved\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return; } - mcbsp[id].free = 1; - spin_unlock(&mcbsp[id].lock); + mcbsp->free = 1; + spin_unlock(&mcbsp->lock); - if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { + if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* Free IRQs */ - free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); - free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); + free_irq(mcbsp->rx_irq, (void *)mcbsp); + free_irq(mcbsp->tx_irq, (void *)mcbsp); } } EXPORT_SYMBOL(omap_mcbsp_free); @@ -273,18 +310,19 @@ EXPORT_SYMBOL(omap_mcbsp_free); */ void omap_mcbsp_start(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 w; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; - io_base = mcbsp[id].io_base; - - mcbsp[id].rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7; - mcbsp[id].tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7; + mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7; + mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7; /* Start the sample generator */ w = OMAP_MCBSP_READ(io_base, SPCR2); @@ -310,7 +348,8 @@ EXPORT_SYMBOL(omap_mcbsp_start); void omap_mcbsp_stop(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 w; if (!omap_mcbsp_check_valid_id(id)) { @@ -318,7 +357,8 @@ void omap_mcbsp_stop(unsigned int id) return; } - io_base = mcbsp[id].io_base; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; /* Reset transmitter */ w = OMAP_MCBSP_READ(io_base, SPCR2); @@ -337,14 +377,17 @@ EXPORT_SYMBOL(omap_mcbsp_stop); /* polled mcbsp i/o operations */ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) { - u32 base; + struct omap_mcbsp *mcbsp; + void __iomem *base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } - base = mcbsp[id].io_base; + mcbsp = id_to_mcbsp_ptr(id); + base = mcbsp->io_base; + writew(buf, base + OMAP_MCBSP_REG_DXR1); /* if frame sync error - clear the error */ if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { @@ -366,8 +409,8 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) (XRST), base + OMAP_MCBSP_REG_SPCR2); udelay(10); - dev_err(mcbsp[id].dev, "Could not write to" - " McBSP%d Register\n", mcbsp[id].id); + dev_err(mcbsp->dev, "Could not write to" + " McBSP%d Register\n", mcbsp->id); return -2; } } @@ -379,14 +422,16 @@ EXPORT_SYMBOL(omap_mcbsp_pollwrite); int omap_mcbsp_pollread(unsigned int id, u16 *buf) { - u32 base; + struct omap_mcbsp *mcbsp; + void __iomem *base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - base = mcbsp[id].io_base; + base = mcbsp->io_base; /* if frame sync error - clear the error */ if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { /* clear error */ @@ -407,8 +452,8 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) (RRST), base + OMAP_MCBSP_REG_SPCR1); udelay(10); - dev_err(mcbsp[id].dev, "Could not read from" - " McBSP%d Register\n", mcbsp[id].id); + dev_err(mcbsp->dev, "Could not read from" + " McBSP%d Register\n", mcbsp->id); return -2; } } @@ -424,7 +469,8 @@ EXPORT_SYMBOL(omap_mcbsp_pollread); */ void omap_mcbsp_xmit_word(unsigned int id, u32 word) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; omap_mcbsp_word_length word_length; if (!omap_mcbsp_check_valid_id(id)) { @@ -432,10 +478,11 @@ void omap_mcbsp_xmit_word(unsigned int id, u32 word) return; } - io_base = mcbsp[id].io_base; - word_length = mcbsp[id].tx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + word_length = mcbsp->tx_word_length; - wait_for_completion(&(mcbsp[id].tx_irq_completion)); + wait_for_completion(&mcbsp->tx_irq_completion); if (word_length > OMAP_MCBSP_WORD_16) OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16); @@ -445,7 +492,8 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word); u32 omap_mcbsp_recv_word(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 word_lsb, word_msb = 0; omap_mcbsp_word_length word_length; @@ -453,11 +501,12 @@ u32 omap_mcbsp_recv_word(unsigned int id) printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - word_length = mcbsp[id].rx_word_length; - io_base = mcbsp[id].io_base; + word_length = mcbsp->rx_word_length; + io_base = mcbsp->io_base; - wait_for_completion(&(mcbsp[id].rx_irq_completion)); + wait_for_completion(&mcbsp->rx_irq_completion); if (word_length > OMAP_MCBSP_WORD_16) word_msb = OMAP_MCBSP_READ(io_base, DRR2); @@ -469,7 +518,8 @@ EXPORT_SYMBOL(omap_mcbsp_recv_word); int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; omap_mcbsp_word_length tx_word_length; omap_mcbsp_word_length rx_word_length; u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; @@ -478,10 +528,10 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } - - io_base = mcbsp[id].io_base; - tx_word_length = mcbsp[id].tx_word_length; - rx_word_length = mcbsp[id].rx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + tx_word_length = mcbsp->tx_word_length; + rx_word_length = mcbsp->rx_word_length; if (tx_word_length != rx_word_length) return -EINVAL; @@ -496,8 +546,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d transmitter not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d transmitter not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -517,8 +567,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d receiver not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d receiver not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -534,7 +584,9 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) { - u32 io_base, clock_word = 0; + struct omap_mcbsp *mcbsp; + u32 clock_word = 0; + void __iomem *io_base; omap_mcbsp_word_length tx_word_length; omap_mcbsp_word_length rx_word_length; u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; @@ -544,9 +596,11 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) return -ENODEV; } - io_base = mcbsp[id].io_base; - tx_word_length = mcbsp[id].tx_word_length; - rx_word_length = mcbsp[id].rx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + + tx_word_length = mcbsp->tx_word_length; + rx_word_length = mcbsp->rx_word_length; if (tx_word_length != rx_word_length) return -EINVAL; @@ -561,8 +615,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d transmitter not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d transmitter not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -582,8 +636,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d receiver not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d receiver not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -609,6 +663,7 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) { + struct omap_mcbsp *mcbsp; int dma_tx_ch; int src_port = 0; int dest_port = 0; @@ -618,50 +673,51 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX", + if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX", omap_mcbsp_tx_dma_callback, - &mcbsp[id], + mcbsp, &dma_tx_ch)) { - dev_err(mcbsp[id].dev, " Unable to request DMA channel for " + dev_err(mcbsp->dev, " Unable to request DMA channel for " "McBSP%d TX. Trying IRQ based TX\n", - mcbsp[id].id); + mcbsp->id); return -EAGAIN; } - mcbsp[id].dma_tx_lch = dma_tx_ch; + mcbsp->dma_tx_lch = dma_tx_ch; - dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id, + dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id, dma_tx_ch); - init_completion(&(mcbsp[id].tx_dma_completion)); + init_completion(&mcbsp->tx_dma_completion); if (cpu_class_is_omap1()) { src_port = OMAP_DMA_PORT_TIPB; dest_port = OMAP_DMA_PORT_EMIFF; } if (cpu_class_is_omap2()) - sync_dev = mcbsp[id].dma_tx_sync; + sync_dev = mcbsp->dma_tx_sync; - omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, + omap_set_dma_transfer_params(mcbsp->dma_tx_lch, OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT, sync_dev, 0); - omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, + omap_set_dma_dest_params(mcbsp->dma_tx_lch, src_port, OMAP_DMA_AMODE_CONSTANT, - mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1, + mcbsp->phys_base + OMAP_MCBSP_REG_DXR1, 0, 0); - omap_set_dma_src_params(mcbsp[id].dma_tx_lch, + omap_set_dma_src_params(mcbsp->dma_tx_lch, dest_port, OMAP_DMA_AMODE_POST_INC, buffer, 0, 0); - omap_start_dma(mcbsp[id].dma_tx_lch); - wait_for_completion(&(mcbsp[id].tx_dma_completion)); + omap_start_dma(mcbsp->dma_tx_lch); + wait_for_completion(&mcbsp->tx_dma_completion); return 0; } @@ -670,6 +726,7 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) { + struct omap_mcbsp *mcbsp; int dma_rx_ch; int src_port = 0; int dest_port = 0; @@ -679,50 +736,51 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX", + if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX", omap_mcbsp_rx_dma_callback, - &mcbsp[id], + mcbsp, &dma_rx_ch)) { - dev_err(mcbsp[id].dev, "Unable to request DMA channel for " + dev_err(mcbsp->dev, "Unable to request DMA channel for " "McBSP%d RX. Trying IRQ based RX\n", - mcbsp[id].id); + mcbsp->id); return -EAGAIN; } - mcbsp[id].dma_rx_lch = dma_rx_ch; + mcbsp->dma_rx_lch = dma_rx_ch; - dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id, + dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id, dma_rx_ch); - init_completion(&(mcbsp[id].rx_dma_completion)); + init_completion(&mcbsp->rx_dma_completion); if (cpu_class_is_omap1()) { src_port = OMAP_DMA_PORT_TIPB; dest_port = OMAP_DMA_PORT_EMIFF; } if (cpu_class_is_omap2()) - sync_dev = mcbsp[id].dma_rx_sync; + sync_dev = mcbsp->dma_rx_sync; - omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, + omap_set_dma_transfer_params(mcbsp->dma_rx_lch, OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT, sync_dev, 0); - omap_set_dma_src_params(mcbsp[id].dma_rx_lch, + omap_set_dma_src_params(mcbsp->dma_rx_lch, src_port, OMAP_DMA_AMODE_CONSTANT, - mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1, + mcbsp->phys_base + OMAP_MCBSP_REG_DRR1, 0, 0); - omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, + omap_set_dma_dest_params(mcbsp->dma_rx_lch, dest_port, OMAP_DMA_AMODE_POST_INC, buffer, 0, 0); - omap_start_dma(mcbsp[id].dma_rx_lch); - wait_for_completion(&(mcbsp[id].rx_dma_completion)); + omap_start_dma(mcbsp->dma_rx_lch); + wait_for_completion(&mcbsp->rx_dma_completion); return 0; } @@ -737,12 +795,14 @@ EXPORT_SYMBOL(omap_mcbsp_recv_buffer); void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg *spi_cfg) { + struct omap_mcbsp *mcbsp; struct omap_mcbsp_reg_cfg mcbsp_cfg; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); @@ -803,9 +863,10 @@ EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. * 730 has only 2 McBSP, and both of them are MPU peripherals. */ -static int __init omap_mcbsp_probe(struct platform_device *pdev) +static int __devinit omap_mcbsp_probe(struct platform_device *pdev) { struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; + struct omap_mcbsp *mcbsp; int id = pdev->id - 1; int ret = 0; @@ -818,47 +879,63 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); - if (id >= OMAP_MAX_MCBSP_COUNT) { + if (id >= omap_mcbsp_count) { dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); ret = -EINVAL; goto exit; } - spin_lock_init(&mcbsp[id].lock); - mcbsp[id].id = id + 1; - mcbsp[id].free = 1; - mcbsp[id].dma_tx_lch = -1; - mcbsp[id].dma_rx_lch = -1; + mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); + if (!mcbsp) { + ret = -ENOMEM; + goto exit; + } + mcbsp_ptr[id] = mcbsp; + + spin_lock_init(&mcbsp->lock); + mcbsp->id = id + 1; + mcbsp->free = 1; + mcbsp->dma_tx_lch = -1; + mcbsp->dma_rx_lch = -1; + + mcbsp->phys_base = pdata->phys_base; + mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K); + if (!mcbsp->io_base) { + ret = -ENOMEM; + goto err_ioremap; + } - mcbsp[id].phys_base = pdata->phys_base; - mcbsp[id].io_base = pdata->virt_base; /* Default I/O is IRQ based */ - mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; - mcbsp[id].tx_irq = pdata->tx_irq; - mcbsp[id].rx_irq = pdata->rx_irq; - mcbsp[id].dma_rx_sync = pdata->dma_rx_sync; - mcbsp[id].dma_tx_sync = pdata->dma_tx_sync; + mcbsp->io_type = OMAP_MCBSP_IRQ_IO; + mcbsp->tx_irq = pdata->tx_irq; + mcbsp->rx_irq = pdata->rx_irq; + mcbsp->dma_rx_sync = pdata->dma_rx_sync; + mcbsp->dma_tx_sync = pdata->dma_tx_sync; if (pdata->clk_name) - mcbsp[id].clk = clk_get(&pdev->dev, pdata->clk_name); - if (IS_ERR(mcbsp[id].clk)) { - mcbsp[id].free = 0; + mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name); + if (IS_ERR(mcbsp->clk)) { dev_err(&pdev->dev, "Invalid clock configuration for McBSP%d.\n", - mcbsp[id].id); - ret = -EINVAL; - goto exit; + mcbsp->id); + ret = PTR_ERR(mcbsp->clk); + goto err_clk; } - mcbsp[id].pdata = pdata; - mcbsp[id].dev = &pdev->dev; - platform_set_drvdata(pdev, &mcbsp[id]); + mcbsp->pdata = pdata; + mcbsp->dev = &pdev->dev; + platform_set_drvdata(pdev, mcbsp); + return 0; +err_clk: + iounmap(mcbsp->io_base); +err_ioremap: + mcbsp->free = 0; exit: return ret; } -static int omap_mcbsp_remove(struct platform_device *pdev) +static int __devexit omap_mcbsp_remove(struct platform_device *pdev) { struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); @@ -872,6 +949,8 @@ static int omap_mcbsp_remove(struct platform_device *pdev) clk_disable(mcbsp->clk); clk_put(mcbsp->clk); + iounmap(mcbsp->io_base); + mcbsp->clk = NULL; mcbsp->free = 0; mcbsp->dev = NULL; @@ -882,7 +961,7 @@ static int omap_mcbsp_remove(struct platform_device *pdev) static struct platform_driver omap_mcbsp_driver = { .probe = omap_mcbsp_probe, - .remove = omap_mcbsp_remove, + .remove = __devexit_p(omap_mcbsp_remove), .driver = { .name = "omap-mcbsp", }, diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 847df208c46..80b040fd5ca 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -25,8 +25,8 @@ #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/io.h> #include <asm/system.h> -#include <asm/io.h> #include <linux/spinlock.h> #include <mach/mux.h> diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c index 8bdbf979a25..ebe0c73c890 100644 --- a/arch/arm/plat-omap/ocpi.c +++ b/arch/arm/plat-omap/ocpi.c @@ -31,8 +31,8 @@ #include <linux/spinlock.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> -#include <asm/io.h> #include <mach/hardware.h> #define OCPI_BASE 0xfffec320 diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index ac67eeb6ca6..9f9a921829c 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -15,9 +15,9 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/io.h> #include <asm/tlb.h> -#include <asm/io.h> #include <asm/cacheflush.h> #include <asm/mach/map.h> @@ -271,7 +271,7 @@ int __init omap1_sram_init(void) #define omap1_sram_init() do {} while (0) #endif -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +#if defined(CONFIG_ARCH_OMAP2) static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, u32 base_cs, u32 force_unlock); @@ -352,23 +352,19 @@ static inline int omap243x_sram_init(void) #ifdef CONFIG_ARCH_OMAP3 -static u32 (*_omap2_sram_reprogram_gpmc)(u32 perf_level); -u32 omap2_sram_reprogram_gpmc(u32 perf_level) -{ - if (!_omap2_sram_reprogram_gpmc) - omap_sram_error(); - - return _omap2_sram_reprogram_gpmc(perf_level); -} - -static u32 (*_omap2_sram_configure_core_dpll)(u32 m, u32 n, - u32 freqsel, u32 m2); -u32 omap2_sram_configure_core_dpll(u32 m, u32 n, u32 freqsel, u32 m2) +static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, + u32 m2); +u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2) { - if (!_omap2_sram_configure_core_dpll) + if (!_omap3_sram_configure_core_dpll) omap_sram_error(); - return _omap2_sram_configure_core_dpll(m, n, freqsel, m2); + return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, + sdrc_actim_ctrla, + sdrc_actim_ctrlb, m2); } /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ @@ -376,31 +372,16 @@ void restore_sram_functions(void) { omap_sram_ceil = omap_sram_base + omap_sram_size; - _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, - omap34xx_sram_reprogram_gpmc_sz); - - _omap2_sram_configure_core_dpll = - omap_sram_push(omap34xx_sram_configure_core_dpll, - omap34xx_sram_configure_core_dpll_sz); + _omap3_sram_configure_core_dpll = + omap_sram_push(omap3_sram_configure_core_dpll, + omap3_sram_configure_core_dpll_sz); } int __init omap34xx_sram_init(void) { - _omap2_sram_ddr_init = omap_sram_push(omap34xx_sram_ddr_init, - omap34xx_sram_ddr_init_sz); - - _omap2_sram_reprogram_sdrc = omap_sram_push(omap34xx_sram_reprogram_sdrc, - omap34xx_sram_reprogram_sdrc_sz); - - _omap2_set_prcm = omap_sram_push(omap34xx_sram_set_prcm, - omap34xx_sram_set_prcm_sz); - - _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, - omap34xx_sram_reprogram_gpmc_sz); - - _omap2_sram_configure_core_dpll = - omap_sram_push(omap34xx_sram_configure_core_dpll, - omap34xx_sram_configure_core_dpll_sz); + _omap3_sram_configure_core_dpll = + omap_sram_push(omap3_sram_configure_core_dpll, + omap3_sram_configure_core_dpll_sz); return 0; } diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index 777485e0636..67ca1e216df 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c @@ -27,8 +27,8 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/usb/otg.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> #include <mach/hardware.h> diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile new file mode 100644 index 00000000000..f03d7b35ba3 --- /dev/null +++ b/arch/arm/plat-s3c/Makefile @@ -0,0 +1,3 @@ +# dummy makefile, currently just including asm/arm/plat-s3c/include/plat + +obj-n := dummy.o diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-s3c/include/plat/debug-macro.S new file mode 100644 index 00000000000..4aa7e2e6c00 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/debug-macro.S @@ -0,0 +1,75 @@ +/* linux/include/asm-arm/plat-s3c/debug-macro.S + * + * Copyright 2005, 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <plat/regs-serial.h> + +/* The S3C2440 implementations are used by default as they are the + * most widely re-used */ + + .macro fifo_level_s3c2440 rd, rx + ldr \rd, [ \rx, # S3C2410_UFSTAT ] + and \rd, \rd, #S3C2440_UFSTAT_TXMASK + .endm + +#ifndef fifo_level +#define fifo_level fifo_level_s3c2410 +#endif + + .macro fifo_full_s3c2440 rd, rx + ldr \rd, [ \rx, # S3C2410_UFSTAT ] + tst \rd, #S3C2440_UFSTAT_TXFULL + .endm + +#ifndef fifo_full +#define fifo_full fifo_full_s3c2440 +#endif + + .macro senduart,rd,rx + strb \rd, [\rx, # S3C2410_UTXH ] + .endm + + .macro busyuart, rd, rx + ldr \rd, [ \rx, # S3C2410_UFCON ] + tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? + beq 1001f @ + @ FIFO enabled... +1003: + fifo_full \rd, \rx + bne 1003b + b 1002f + +1001: + @ busy waiting for non fifo + ldr \rd, [ \rx, # S3C2410_UTRSTAT ] + tst \rd, #S3C2410_UTRSTAT_TXFE + beq 1001b + +1002: @ exit busyuart + .endm + + .macro waituart,rd,rx + ldr \rd, [ \rx, # S3C2410_UFCON ] + tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? + beq 1001f @ + @ FIFO enabled... +1003: + fifo_level \rd, \rx + teq \rd, #0 + bne 1003b + b 1002f +1001: + @ idle waiting for non fifo + ldr \rd, [ \rx, # S3C2410_UTRSTAT ] + tst \rd, #S3C2410_UTRSTAT_TXFE + beq 1001b + +1002: @ exit busyuart + .endm diff --git a/arch/arm/plat-s3c/include/plat/map.h b/arch/arm/plat-s3c/include/plat/map.h new file mode 100644 index 00000000000..b84289d32a5 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/map.h @@ -0,0 +1,40 @@ +/* linux/include/asm-arm/plat-s3c/map.h + * + * Copyright 2003, 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C - Memory map definitions (virtual addresses) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_MAP_H +#define __ASM_PLAT_MAP_H __FILE__ + +/* Fit all our registers in at 0xF4000000 upwards, trying to use as + * little of the VA space as possible so vmalloc and friends have a + * better chance of getting memory. + * + * we try to ensure stuff like the IRQ registers are available for + * an single MOVS instruction (ie, only 8 bits of set data) + */ + +#define S3C_ADDR_BASE (0xF4000000) + +#ifndef __ASSEMBLY__ +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) +#else +#define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) +#endif + +#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ +#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ +#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */ +#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ +#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ +#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ + +#endif /* __ASM_PLAT_MAP_H */ diff --git a/arch/arm/plat-s3c/include/plat/regs-adc.h b/arch/arm/plat-s3c/include/plat/regs-adc.h new file mode 100644 index 00000000000..4323cccc86c --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-adc.h @@ -0,0 +1,60 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-adc.h + * + * Copyright (c) 2004 Shannon Holland <holland@loser.net> + * + * This program is free software; yosu can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 ADC registers +*/ + +#ifndef __ASM_ARCH_REGS_ADC_H +#define __ASM_ARCH_REGS_ADC_H "regs-adc.h" + +#define S3C2410_ADCREG(x) (x) + +#define S3C2410_ADCCON S3C2410_ADCREG(0x00) +#define S3C2410_ADCTSC S3C2410_ADCREG(0x04) +#define S3C2410_ADCDLY S3C2410_ADCREG(0x08) +#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) +#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) + + +/* ADCCON Register Bits */ +#define S3C2410_ADCCON_ECFLG (1<<15) +#define S3C2410_ADCCON_PRSCEN (1<<14) +#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) +#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) +#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) +#define S3C2410_ADCCON_MUXMASK (0x7<<3) +#define S3C2410_ADCCON_STDBM (1<<2) +#define S3C2410_ADCCON_READ_START (1<<1) +#define S3C2410_ADCCON_ENABLE_START (1<<0) +#define S3C2410_ADCCON_STARTMASK (0x3<<0) + + +/* ADCTSC Register Bits */ +#define S3C2410_ADCTSC_YM_SEN (1<<7) +#define S3C2410_ADCTSC_YP_SEN (1<<6) +#define S3C2410_ADCTSC_XM_SEN (1<<5) +#define S3C2410_ADCTSC_XP_SEN (1<<4) +#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3) +#define S3C2410_ADCTSC_AUTO_PST (1<<2) +#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0) + +/* ADCDAT0 Bits */ +#define S3C2410_ADCDAT0_UPDOWN (1<<15) +#define S3C2410_ADCDAT0_AUTO_PST (1<<14) +#define S3C2410_ADCDAT0_XY_PST (0x3<<12) +#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF) + +/* ADCDAT1 Bits */ +#define S3C2410_ADCDAT1_UPDOWN (1<<15) +#define S3C2410_ADCDAT1_AUTO_PST (1<<14) +#define S3C2410_ADCDAT1_XY_PST (0x3<<12) +#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) + +#endif /* __ASM_ARCH_REGS_ADC_H */ + + diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h new file mode 100644 index 00000000000..a0daa647b92 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-serial.h @@ -0,0 +1,232 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-serial.h + * + * From linux/include/asm-arm/hardware/serial_s3c2410.h + * + * Internal header file for Samsung S3C2410 serial ports (UART0-2) + * + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * + * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk) + * + * Adapted from: + * + * Internal header file for MX1ADS serial ports (UART1 & 2) + * + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#ifndef __ASM_ARM_REGS_SERIAL_H +#define __ASM_ARM_REGS_SERIAL_H + +#define S3C24XX_VA_UART0 (S3C_VA_UART) +#define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 ) +#define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 ) +#define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 ) + +#define S3C2410_PA_UART0 (S3C24XX_PA_UART) +#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) +#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) +#define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 ) + +#define S3C2410_URXH (0x24) +#define S3C2410_UTXH (0x20) +#define S3C2410_ULCON (0x00) +#define S3C2410_UCON (0x04) +#define S3C2410_UFCON (0x08) +#define S3C2410_UMCON (0x0C) +#define S3C2410_UBRDIV (0x28) +#define S3C2410_UTRSTAT (0x10) +#define S3C2410_UERSTAT (0x14) +#define S3C2410_UFSTAT (0x18) +#define S3C2410_UMSTAT (0x1C) + +#define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) + +#define S3C2410_LCON_CS5 (0x0) +#define S3C2410_LCON_CS6 (0x1) +#define S3C2410_LCON_CS7 (0x2) +#define S3C2410_LCON_CS8 (0x3) +#define S3C2410_LCON_CSMASK (0x3) + +#define S3C2410_LCON_PNONE (0x0) +#define S3C2410_LCON_PEVEN (0x5 << 3) +#define S3C2410_LCON_PODD (0x4 << 3) +#define S3C2410_LCON_PMASK (0x7 << 3) + +#define S3C2410_LCON_STOPB (1<<2) +#define S3C2410_LCON_IRM (1<<6) + +#define S3C2440_UCON_CLKMASK (3<<10) +#define S3C2440_UCON_PCLK (0<<10) +#define S3C2440_UCON_UCLK (1<<10) +#define S3C2440_UCON_PCLK2 (2<<10) +#define S3C2440_UCON_FCLK (3<<10) +#define S3C2443_UCON_EPLL (3<<10) + +#define S3C2440_UCON2_FCLK_EN (1<<15) +#define S3C2440_UCON0_DIVMASK (15 << 12) +#define S3C2440_UCON1_DIVMASK (15 << 12) +#define S3C2440_UCON2_DIVMASK (7 << 12) +#define S3C2440_UCON_DIVSHIFT (12) + +#define S3C2412_UCON_CLKMASK (3<<10) +#define S3C2412_UCON_UCLK (1<<10) +#define S3C2412_UCON_USYSCLK (3<<10) +#define S3C2412_UCON_PCLK (0<<10) +#define S3C2412_UCON_PCLK2 (2<<10) + +#define S3C2410_UCON_UCLK (1<<10) +#define S3C2410_UCON_SBREAK (1<<4) + +#define S3C2410_UCON_TXILEVEL (1<<9) +#define S3C2410_UCON_RXILEVEL (1<<8) +#define S3C2410_UCON_TXIRQMODE (1<<2) +#define S3C2410_UCON_RXIRQMODE (1<<0) +#define S3C2410_UCON_RXFIFO_TOI (1<<7) +#define S3C2443_UCON_RXERR_IRQEN (1<<6) +#define S3C2443_UCON_LOOPBACK (1<<5) + +#define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI) + +#define S3C2410_UFCON_FIFOMODE (1<<0) +#define S3C2410_UFCON_TXTRIG0 (0<<6) +#define S3C2410_UFCON_RXTRIG8 (1<<4) +#define S3C2410_UFCON_RXTRIG12 (2<<4) + +/* S3C2440 FIFO trigger levels */ +#define S3C2440_UFCON_RXTRIG1 (0<<4) +#define S3C2440_UFCON_RXTRIG8 (1<<4) +#define S3C2440_UFCON_RXTRIG16 (2<<4) +#define S3C2440_UFCON_RXTRIG32 (3<<4) + +#define S3C2440_UFCON_TXTRIG0 (0<<6) +#define S3C2440_UFCON_TXTRIG16 (1<<6) +#define S3C2440_UFCON_TXTRIG32 (2<<6) +#define S3C2440_UFCON_TXTRIG48 (3<<6) + +#define S3C2410_UFCON_RESETBOTH (3<<1) +#define S3C2410_UFCON_RESETTX (1<<2) +#define S3C2410_UFCON_RESETRX (1<<1) + +#define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S3C2410_UFCON_TXTRIG0 | \ + S3C2410_UFCON_RXTRIG8 ) + +#define S3C2410_UMCOM_AFC (1<<4) +#define S3C2410_UMCOM_RTS_LOW (1<<0) + +#define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */ +#define S3C2412_UMCON_AFC_56 (1<<5) +#define S3C2412_UMCON_AFC_48 (2<<5) +#define S3C2412_UMCON_AFC_40 (3<<5) +#define S3C2412_UMCON_AFC_32 (4<<5) +#define S3C2412_UMCON_AFC_24 (5<<5) +#define S3C2412_UMCON_AFC_16 (6<<5) +#define S3C2412_UMCON_AFC_8 (7<<5) + +#define S3C2410_UFSTAT_TXFULL (1<<9) +#define S3C2410_UFSTAT_RXFULL (1<<8) +#define S3C2410_UFSTAT_TXMASK (15<<4) +#define S3C2410_UFSTAT_TXSHIFT (4) +#define S3C2410_UFSTAT_RXMASK (15<<0) +#define S3C2410_UFSTAT_RXSHIFT (0) + +/* UFSTAT S3C2443 same as S3C2440 */ +#define S3C2440_UFSTAT_TXFULL (1<<14) +#define S3C2440_UFSTAT_RXFULL (1<<6) +#define S3C2440_UFSTAT_TXSHIFT (8) +#define S3C2440_UFSTAT_RXSHIFT (0) +#define S3C2440_UFSTAT_TXMASK (63<<8) +#define S3C2440_UFSTAT_RXMASK (63) + +#define S3C2410_UTRSTAT_TXE (1<<2) +#define S3C2410_UTRSTAT_TXFE (1<<1) +#define S3C2410_UTRSTAT_RXDR (1<<0) + +#define S3C2410_UERSTAT_OVERRUN (1<<0) +#define S3C2410_UERSTAT_FRAME (1<<2) +#define S3C2410_UERSTAT_BREAK (1<<3) +#define S3C2443_UERSTAT_PARITY (1<<1) + +#define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \ + S3C2410_UERSTAT_FRAME | \ + S3C2410_UERSTAT_BREAK) + +#define S3C2410_UMSTAT_CTS (1<<0) +#define S3C2410_UMSTAT_DeltaCTS (1<<2) + +#define S3C2443_DIVSLOT (0x2C) + +#ifndef __ASSEMBLY__ + +/* struct s3c24xx_uart_clksrc + * + * this structure defines a named clock source that can be used for the + * uart, so that the best clock can be selected for the requested baud + * rate. + * + * min_baud and max_baud define the range of baud-rates this clock is + * acceptable for, if they are both zero, it is assumed any baud rate that + * can be generated from this clock will be used. + * + * divisor gives the divisor from the clock to the one seen by the uart +*/ + +struct s3c24xx_uart_clksrc { + const char *name; + unsigned int divisor; + unsigned int min_baud; + unsigned int max_baud; +}; + +/* configuration structure for per-machine configurations for the + * serial port + * + * the pointer is setup by the machine specific initialisation from the + * arch/arm/mach-s3c2410/ directory. +*/ + +struct s3c2410_uartcfg { + unsigned char hwport; /* hardware port number */ + unsigned char unused; + unsigned short flags; + upf_t uart_flags; /* default uart flags */ + + unsigned long ucon; /* value of ucon for port */ + unsigned long ulcon; /* value of ulcon for port */ + unsigned long ufcon; /* value of ufcon for port */ + + struct s3c24xx_uart_clksrc *clocks; + unsigned int clocks_size; +}; + +/* s3c24xx_uart_devs + * + * this is exported from the core as we cannot use driver_register(), + * or platform_add_device() before the console_initcall() +*/ + +extern struct platform_device *s3c24xx_uart_devs[3]; + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ARM_REGS_SERIAL_H */ + diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h new file mode 100644 index 00000000000..cc0eedd53e3 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-timer.h @@ -0,0 +1,115 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-timer.h + * + * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 Timer configuration +*/ + + +#ifndef __ASM_ARCH_REGS_TIMER_H +#define __ASM_ARCH_REGS_TIMER_H + +#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x)) +#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c)) + +#define S3C2410_TCFG0 S3C_TIMERREG(0x00) +#define S3C2410_TCFG1 S3C_TIMERREG(0x04) +#define S3C2410_TCON S3C_TIMERREG(0x08) + +#define S3C2410_TCFG_PRESCALER0_MASK (255<<0) +#define S3C2410_TCFG_PRESCALER1_MASK (255<<8) +#define S3C2410_TCFG_PRESCALER1_SHIFT (8) +#define S3C2410_TCFG_DEADZONE_MASK (255<<16) +#define S3C2410_TCFG_DEADZONE_SHIFT (16) + +#define S3C2410_TCFG1_MUX4_DIV2 (0<<16) +#define S3C2410_TCFG1_MUX4_DIV4 (1<<16) +#define S3C2410_TCFG1_MUX4_DIV8 (2<<16) +#define S3C2410_TCFG1_MUX4_DIV16 (3<<16) +#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16) +#define S3C2410_TCFG1_MUX4_MASK (15<<16) +#define S3C2410_TCFG1_MUX4_SHIFT (16) + +#define S3C2410_TCFG1_MUX3_DIV2 (0<<12) +#define S3C2410_TCFG1_MUX3_DIV4 (1<<12) +#define S3C2410_TCFG1_MUX3_DIV8 (2<<12) +#define S3C2410_TCFG1_MUX3_DIV16 (3<<12) +#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12) +#define S3C2410_TCFG1_MUX3_MASK (15<<12) + + +#define S3C2410_TCFG1_MUX2_DIV2 (0<<8) +#define S3C2410_TCFG1_MUX2_DIV4 (1<<8) +#define S3C2410_TCFG1_MUX2_DIV8 (2<<8) +#define S3C2410_TCFG1_MUX2_DIV16 (3<<8) +#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8) +#define S3C2410_TCFG1_MUX2_MASK (15<<8) + + +#define S3C2410_TCFG1_MUX1_DIV2 (0<<4) +#define S3C2410_TCFG1_MUX1_DIV4 (1<<4) +#define S3C2410_TCFG1_MUX1_DIV8 (2<<4) +#define S3C2410_TCFG1_MUX1_DIV16 (3<<4) +#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4) +#define S3C2410_TCFG1_MUX1_MASK (15<<4) + +#define S3C2410_TCFG1_MUX0_DIV2 (0<<0) +#define S3C2410_TCFG1_MUX0_DIV4 (1<<0) +#define S3C2410_TCFG1_MUX0_DIV8 (2<<0) +#define S3C2410_TCFG1_MUX0_DIV16 (3<<0) +#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0) +#define S3C2410_TCFG1_MUX0_MASK (15<<0) + +#define S3C2410_TCFG1_MUX_DIV2 (0<<0) +#define S3C2410_TCFG1_MUX_DIV4 (1<<0) +#define S3C2410_TCFG1_MUX_DIV8 (2<<0) +#define S3C2410_TCFG1_MUX_DIV16 (3<<0) +#define S3C2410_TCFG1_MUX_TCLK (4<<0) +#define S3C2410_TCFG1_MUX_MASK (15<<0) + +#define S3C2410_TCFG1_SHIFT(x) ((x) * 4) + +/* for each timer, we have an count buffer, an compare buffer and + * an observation buffer +*/ + +/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */ + +#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00) +#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04) +#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08)) + +#define S3C2410_TCON_T4RELOAD (1<<22) +#define S3C2410_TCON_T4MANUALUPD (1<<21) +#define S3C2410_TCON_T4START (1<<20) + +#define S3C2410_TCON_T3RELOAD (1<<19) +#define S3C2410_TCON_T3INVERT (1<<18) +#define S3C2410_TCON_T3MANUALUPD (1<<17) +#define S3C2410_TCON_T3START (1<<16) + +#define S3C2410_TCON_T2RELOAD (1<<15) +#define S3C2410_TCON_T2INVERT (1<<14) +#define S3C2410_TCON_T2MANUALUPD (1<<13) +#define S3C2410_TCON_T2START (1<<12) + +#define S3C2410_TCON_T1RELOAD (1<<11) +#define S3C2410_TCON_T1INVERT (1<<10) +#define S3C2410_TCON_T1MANUALUPD (1<<9) +#define S3C2410_TCON_T1START (1<<8) + +#define S3C2410_TCON_T0DEADZONE (1<<4) +#define S3C2410_TCON_T0RELOAD (1<<3) +#define S3C2410_TCON_T0INVERT (1<<2) +#define S3C2410_TCON_T0MANUALUPD (1<<1) +#define S3C2410_TCON_T0START (1<<0) + +#endif /* __ASM_ARCH_REGS_TIMER_H */ + + + diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h new file mode 100644 index 00000000000..4df006b9cc1 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -0,0 +1,155 @@ +/* linux/include/asm-arm/plat-s3c/uncompress.h + * + * Copyright 2003, 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_UNCOMPRESS_H +#define __ASM_PLAT_UNCOMPRESS_H + +typedef unsigned int upf_t; /* cannot include linux/serial_core.h */ + +/* uart setup */ + +static unsigned int fifo_mask; +static unsigned int fifo_max; + +/* forward declerations */ + +static void arch_detect_cpu(void); + +/* defines for UART registers */ + +#include <plat/regs-serial.h> +#include <asm/plat-s3c/regs-watchdog.h> + +/* working in physical space... */ +#undef S3C2410_WDOGREG +#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x))) + +/* how many bytes we allow into the FIFO at a time in FIFO mode */ +#define FIFO_MAX (14) + +#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT) + +static __inline__ void +uart_wr(unsigned int reg, unsigned int val) +{ + volatile unsigned int *ptr; + + ptr = (volatile unsigned int *)(reg + uart_base); + *ptr = val; +} + +static __inline__ unsigned int +uart_rd(unsigned int reg) +{ + volatile unsigned int *ptr; + + ptr = (volatile unsigned int *)(reg + uart_base); + return *ptr; +} + +/* we can deal with the case the UARTs are being run + * in FIFO mode, so that we don't hold up our execution + * waiting for tx to happen... +*/ + +static void putc(int ch) +{ + if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { + int level; + + while (1) { + level = uart_rd(S3C2410_UFSTAT); + level &= fifo_mask; + + if (level < fifo_max) + break; + } + + } else { + /* not using fifos */ + + while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE) + barrier(); + } + + /* write byte to transmission register */ + uart_wr(S3C2410_UTXH, ch); +} + +static inline void flush(void) +{ +} + +#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) + +/* CONFIG_S3C_BOOT_WATCHDOG + * + * Simple boot-time watchdog setup, to reboot the system if there is + * any problem with the boot process +*/ + +#ifdef CONFIG_S3C_BOOT_WATCHDOG + +#define WDOG_COUNT (0xff00) + +static inline void arch_decomp_wdog(void) +{ + __raw_writel(WDOG_COUNT, S3C2410_WTCNT); +} + +static void arch_decomp_wdog_start(void) +{ + __raw_writel(WDOG_COUNT, S3C2410_WTDAT); + __raw_writel(WDOG_COUNT, S3C2410_WTCNT); + __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); +} + +#else +#define arch_decomp_wdog_start() +#define arch_decomp_wdog() +#endif + +#ifdef CONFIG_S3C_BOOT_ERROR_RESET + +static void arch_decomp_error(const char *x) +{ + putstr("\n\n"); + putstr(x); + putstr("\n\n -- System resetting\n"); + + __raw_writel(0x4000, S3C2410_WTDAT); + __raw_writel(0x4000, S3C2410_WTCNT); + __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); + + while(1); +} + +#define arch_error arch_decomp_error +#endif + +static void error(char *err); + +static void +arch_decomp_setup(void) +{ + /* we may need to setup the uart(s) here if we are not running + * on an BAST... the BAST will have left the uarts configured + * after calling linux. + */ + + arch_detect_cpu(); + arch_decomp_wdog_start(); +} + + +#endif /* __ASM_PLAT_UNCOMPRESS_H */ diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 54d4b8e2263..a005ddbd9ef 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -39,16 +39,16 @@ #include <linux/clk.h> #include <linux/mutex.h> #include <linux/delay.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* clock information */ diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index 1863a1b1bc4..3098736c65d 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -25,6 +25,7 @@ #include <linux/mtd/nand.h> #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -32,7 +33,6 @@ #include <asm/mach-types.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-gpio.h> @@ -40,9 +40,9 @@ #include <asm/plat-s3c/nand.h> -#include <asm/plat-s3c24xx/common-smdk.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/common-smdk.h> +#include <plat/devs.h> +#include <plat/pm.h> /* LED devices */ diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 89ce60eabd5..22a329513c0 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -29,11 +29,11 @@ #include <linux/serial_core.h> #include <linux/platform_device.h> #include <linux/delay.h> +#include <linux/io.h> +#include <linux/delay.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> -#include <asm/delay.h> #include <asm/cacheflush.h> #include <asm/mach/arch.h> @@ -42,18 +42,18 @@ #include <mach/system-reset.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> - -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/s3c2400.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> +#include <plat/regs-serial.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/s3c2400.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> #include "s3c244x.h" -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/s3c2442.h> -#include <asm/plat-s3c24xx/s3c2443.h> +#include <plat/s3c2440.h> +#include <plat/s3c2442.h> +#include <plat/s3c2443.h> struct cpu_table { unsigned long idcode; diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index d6fb76578b1..e93f8bf6d33 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -19,20 +19,20 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/fb.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <asm/plat-s3c24xx/udc.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include <asm/plat-s3c24xx/regs-spi.h> /* Serial port registrations */ diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 08c2aaf14c4..1baf941d193 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -26,17 +26,17 @@ #include <linux/slab.h> #include <linux/errno.h> #include <linux/delay.h> +#include <linux/io.h> #include <asm/system.h> #include <asm/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/dma.h> #include <asm/mach/dma.h> #include <mach/map.h> -#include <asm/plat-s3c24xx/dma.h> +#include <plat/dma.h> /* io map for dma */ static void __iomem *dma_base; diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index dd27334e3d7..4a899c279eb 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c @@ -26,10 +26,10 @@ #include <linux/module.h> #include <linux/interrupt.h> #include <linux/ioport.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-gpio.h> diff --git a/arch/arm/plat-s3c24xx/include/plat/clock.h b/arch/arm/plat-s3c24xx/include/plat/clock.h new file mode 100644 index 00000000000..235b753cd87 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/clock.h @@ -0,0 +1,64 @@ +/* linux/include/asm-arm/plat-s3c24xx/clock.h + * linux/arch/arm/mach-s3c2410/clock.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * http://www.simtec.co.uk/products/SWLINUX/ + * Written by Ben Dooks, <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +struct clk { + struct list_head list; + struct module *owner; + struct clk *parent; + const char *name; + int id; + int usage; + unsigned long rate; + unsigned long ctrlbit; + + int (*enable)(struct clk *, int enable); + int (*set_rate)(struct clk *c, unsigned long rate); + unsigned long (*get_rate)(struct clk *c); + unsigned long (*round_rate)(struct clk *c, unsigned long rate); + int (*set_parent)(struct clk *c, struct clk *parent); +}; + +/* other clocks which may be registered by board support */ + +extern struct clk s3c24xx_dclk0; +extern struct clk s3c24xx_dclk1; +extern struct clk s3c24xx_clkout0; +extern struct clk s3c24xx_clkout1; +extern struct clk s3c24xx_uclk; + +extern struct clk clk_usb_bus; + +/* core clock support */ + +extern struct clk clk_f; +extern struct clk clk_h; +extern struct clk clk_p; +extern struct clk clk_mpll; +extern struct clk clk_upll; +extern struct clk clk_xtal; + +/* exports for arch/arm/mach-s3c2410 + * + * Please DO NOT use these outside of arch/arm/mach-s3c2410 +*/ + +extern struct mutex clocks_mutex; + +extern int s3c2410_clkcon_enable(struct clk *clk, int enable); + +extern int s3c24xx_register_clock(struct clk *clk); +extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); + +extern int s3c24xx_setup_clocks(unsigned long xtal, + unsigned long fclk, + unsigned long hclk, + unsigned long pclk); diff --git a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h new file mode 100644 index 00000000000..58d9094c935 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h @@ -0,0 +1,15 @@ +/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Common code for SMDK2410 and SMDK2440 boards + * + * http://www.fluff.org/ben/smdk2440/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +extern void smdk_machine_init(void); diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu.h b/arch/arm/plat-s3c24xx/include/plat/cpu.h new file mode 100644 index 00000000000..23e420e8bd5 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/cpu.h @@ -0,0 +1,54 @@ +/* linux/include/asm-arm/plat-s3c24xx/cpu.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for S3C24XX CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* todo - fix when rmk changes iodescs to use `void __iomem *` */ + +#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } + +#ifndef MHZ +#define MHZ (1000*1000) +#endif + +#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000) + +/* forward declaration */ +struct s3c24xx_uart_resources; +struct platform_device; +struct s3c2410_uartcfg; +struct map_desc; + +/* core initialisation functions */ + +extern void s3c24xx_init_irq(void); + +extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); + +extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c24xx_init_clocks(int xtal); + +extern void s3c24xx_init_uartdevs(char *name, + struct s3c24xx_uart_resources *res, + struct s3c2410_uartcfg *cfg, int no); + +/* timer for 2410/2440 */ + +struct sys_timer; +extern struct sys_timer s3c24xx_timer; + +/* system device classes */ + +extern struct sysdev_class s3c2410_sysclass; +extern struct sysdev_class s3c2412_sysclass; +extern struct sysdev_class s3c2440_sysclass; +extern struct sysdev_class s3c2442_sysclass; +extern struct sysdev_class s3c2443_sysclass; diff --git a/arch/arm/plat-s3c24xx/include/plat/devs.h b/arch/arm/plat-s3c24xx/include/plat/devs.h new file mode 100644 index 00000000000..badaac9d64a --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/devs.h @@ -0,0 +1,49 @@ +/* linux/include/asm-arm/plat-s3c24xx/devs.h + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2410 standard platform devices + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ +#include <linux/platform_device.h> + +struct s3c24xx_uart_resources { + struct resource *resources; + unsigned long nr_resources; +}; + +extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; + +extern struct platform_device *s3c24xx_uart_devs[]; +extern struct platform_device *s3c24xx_uart_src[]; + +extern struct platform_device s3c_device_timer[]; + +extern struct platform_device s3c_device_usb; +extern struct platform_device s3c_device_lcd; +extern struct platform_device s3c_device_wdt; +extern struct platform_device s3c_device_i2c; +extern struct platform_device s3c_device_iis; +extern struct platform_device s3c_device_rtc; +extern struct platform_device s3c_device_adc; +extern struct platform_device s3c_device_sdi; +extern struct platform_device s3c_device_hsmmc; + +extern struct platform_device s3c_device_spi0; +extern struct platform_device s3c_device_spi1; + +extern struct platform_device s3c_device_nand; + +extern struct platform_device s3c_device_usbgadget; + +/* s3c2440 specific devices */ + +#ifdef CONFIG_CPU_S3C2440 + +extern struct platform_device s3c_device_camif; + +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/dma.h b/arch/arm/plat-s3c24xx/include/plat/dma.h new file mode 100644 index 00000000000..c78efe316fc --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/dma.h @@ -0,0 +1,82 @@ +/* linux/include/asm-arm/plat-s3c24xx/dma.h + * + * Copyright (C) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Samsung S3C24XX DMA support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +extern struct sysdev_class dma_sysclass; +extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; + +#define DMA_CH_VALID (1<<31) +#define DMA_CH_NEVER (1<<30) + +struct s3c24xx_dma_addr { + unsigned long from; + unsigned long to; +}; + +/* struct s3c24xx_dma_map + * + * this holds the mapping information for the channel selected + * to be connected to the specified device +*/ + +struct s3c24xx_dma_map { + const char *name; + struct s3c24xx_dma_addr hw_addr; + + unsigned long channels[S3C2410_DMA_CHANNELS]; + unsigned long channels_rx[S3C2410_DMA_CHANNELS]; +}; + +struct s3c24xx_dma_selection { + struct s3c24xx_dma_map *map; + unsigned long map_size; + unsigned long dcon_mask; + + void (*select)(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map); + + void (*direction)(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map, + enum s3c2410_dmasrc dir); +}; + +extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); + +/* struct s3c24xx_dma_order_ch + * + * channel map for one of the `enum dma_ch` dma channels. the list + * entry contains a set of low-level channel numbers, orred with + * DMA_CH_VALID, which are checked in the order in the array. +*/ + +struct s3c24xx_dma_order_ch { + unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */ + unsigned int flags; /* flags */ +}; + +/* struct s3c24xx_dma_order + * + * information provided by either the core or the board to give the + * dma system a hint on how to allocate channels +*/ + +struct s3c24xx_dma_order { + struct s3c24xx_dma_order_ch channels[DMACH_MAX]; +}; + +extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map); + +/* DMA init code, called from the cpu support code */ + +extern int s3c2410_dma_init(void); + +extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq, + unsigned int stride); diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h new file mode 100644 index 00000000000..45746a99534 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h @@ -0,0 +1,109 @@ +/* linux/include/asm-arm/plat-s3c24xx/irq.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for S3C24XX CPU IRQ support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define irqdbf(x...) +#define irqdbf2(x...) + +#define EXTINT_OFF (IRQ_EINT4 - 4) + +/* these are exported for arch/arm/mach-* usage */ +extern struct irq_chip s3c_irq_level_chip; +extern struct irq_chip s3c_irq_chip; + +static inline void +s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, + int subcheck) +{ + unsigned long mask; + unsigned long submask; + + submask = __raw_readl(S3C2410_INTSUBMSK); + mask = __raw_readl(S3C2410_INTMSK); + + submask |= (1UL << (irqno - IRQ_S3CUART_RX0)); + + /* check to see if we need to mask the parent IRQ */ + + if ((submask & subcheck) == subcheck) { + __raw_writel(mask | parentbit, S3C2410_INTMSK); + } + + /* write back masks */ + __raw_writel(submask, S3C2410_INTSUBMSK); + +} + +static inline void +s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) +{ + unsigned long mask; + unsigned long submask; + + submask = __raw_readl(S3C2410_INTSUBMSK); + mask = __raw_readl(S3C2410_INTMSK); + + submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0)); + mask &= ~parentbit; + + /* write back masks */ + __raw_writel(submask, S3C2410_INTSUBMSK); + __raw_writel(mask, S3C2410_INTMSK); +} + + +static inline void +s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group) +{ + unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); + + s3c_irqsub_mask(irqno, parentmask, group); + + __raw_writel(bit, S3C2410_SUBSRCPND); + + /* only ack parent if we've got all the irqs (seems we must + * ack, all and hope that the irq system retriggers ok when + * the interrupt goes off again) + */ + + if (1) { + __raw_writel(parentmask, S3C2410_SRCPND); + __raw_writel(parentmask, S3C2410_INTPND); + } +} + +static inline void +s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) +{ + unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); + + __raw_writel(bit, S3C2410_SUBSRCPND); + + /* only ack parent if we've got all the irqs (seems we must + * ack, all and hope that the irq system retriggers ok when + * the interrupt goes off again) + */ + + if (1) { + __raw_writel(parentmask, S3C2410_SRCPND); + __raw_writel(parentmask, S3C2410_INTPND); + } +} + +/* exported for use in arch/arm/mach-s3c2410 */ + +#ifdef CONFIG_PM +extern int s3c_irq_wake(unsigned int irqno, unsigned int state); +#else +#define s3c_irq_wake NULL +#endif + +extern int s3c_irqext_type(unsigned int irq, unsigned int type); diff --git a/arch/arm/plat-s3c24xx/include/plat/pm.h b/arch/arm/plat-s3c24xx/include/plat/pm.h new file mode 100644 index 00000000000..cc623667e48 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/pm.h @@ -0,0 +1,73 @@ +/* linux/include/asm-arm/plat-s3c24xx/pm.h + * + * Copyright (c) 2004 Simtec Electronics + * Written by Ben Dooks, <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* s3c2410_pm_init + * + * called from board at initialisation time to setup the power + * management +*/ + +#ifdef CONFIG_PM + +extern __init int s3c2410_pm_init(void); + +#else + +static inline int s3c2410_pm_init(void) +{ + return 0; +} +#endif + +/* configuration for the IRQ mask over sleep */ +extern unsigned long s3c_irqwake_intmask; +extern unsigned long s3c_irqwake_eintmask; + +/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ +extern unsigned long s3c_irqwake_intallow; +extern unsigned long s3c_irqwake_eintallow; + +/* per-cpu sleep functions */ + +extern void (*pm_cpu_prep)(void); +extern void (*pm_cpu_sleep)(void); + +/* Flags for PM Control */ + +extern unsigned long s3c_pm_flags; + +/* from sleep.S */ + +extern int s3c2410_cpu_save(unsigned long *saveblk); +extern void s3c2410_cpu_suspend(void); +extern void s3c2410_cpu_resume(void); + +extern unsigned long s3c2410_sleep_save_phys; + +/* sleep save info */ + +struct sleep_save { + void __iomem *reg; + unsigned long val; +}; + +#define SAVE_ITEM(x) \ + { .reg = (x) } + +extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count); +extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count); + +#ifdef CONFIG_PM +extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); +extern int s3c24xx_irq_resume(struct sys_device *dev); +#else +#define s3c24xx_irq_suspend NULL +#define s3c24xx_irq_resume NULL +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2400.h b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h new file mode 100644 index 00000000000..3a5a16821af --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h @@ -0,0 +1,31 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2400.h + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for S3C2400 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modifications: + * 09-Fev-2006 LCVR First version, based on s3c2410.h +*/ + +#ifdef CONFIG_CPU_S3C2400 + +extern int s3c2400_init(void); + +extern void s3c2400_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2400_init_clocks(int xtal); + +#else +#define s3c2400_init_clocks NULL +#define s3c2400_init_uarts NULL +#define s3c2400_map_io NULL +#define s3c2400_init NULL +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h new file mode 100644 index 00000000000..3cd1ec677b3 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h @@ -0,0 +1,31 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2410 machine directory + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#ifdef CONFIG_CPU_S3C2410 + +extern int s3c2410_init(void); + +extern void s3c2410_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2410_init_clocks(int xtal); + +#else +#define s3c2410_init_clocks NULL +#define s3c2410_init_uarts NULL +#define s3c2410_map_io NULL +#define s3c2410_init NULL +#endif + +extern int s3c2410_baseclk_add(void); diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h new file mode 100644 index 00000000000..3ec97685e78 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h @@ -0,0 +1,29 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2412 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2412 + +extern int s3c2412_init(void); + +extern void s3c2412_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2412_init_clocks(int xtal); + +extern int s3c2412_baseclk_add(void); +#else +#define s3c2412_init_clocks NULL +#define s3c2412_init_uarts NULL +#define s3c2412_map_io NULL +#define s3c2412_init NULL +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h new file mode 100644 index 00000000000..107853bf948 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h @@ -0,0 +1,17 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2440 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2440 +extern int s3c2440_init(void); +#else +#define s3c2440_init NULL +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h new file mode 100644 index 00000000000..451a23a2092 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h @@ -0,0 +1,17 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h + * + * Copyright (c) 2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2442 +extern int s3c2442_init(void); +#else +#define s3c2442_init NULL +#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h new file mode 100644 index 00000000000..11d83b5c84e --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h @@ -0,0 +1,32 @@ +/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2443 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifdef CONFIG_CPU_S3C2443 + +struct s3c2410_uartcfg; + +extern int s3c2443_init(void); + +extern void s3c2443_map_io(struct map_desc *mach_desc, int size); + +extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c2443_init_clocks(int xtal); + +extern int s3c2443_baseclk_add(void); + +#else +#define s3c2443_init_clocks NULL +#define s3c2443_init_uarts NULL +#define s3c2443_map_io NULL +#define s3c2443_init NULL +#endif diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 36cefe17683..963f7a4f26f 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -55,19 +55,19 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* wakeup irq control */ @@ -468,7 +468,6 @@ static void s3c_irq_demux_adc(unsigned int irq, { unsigned int subsrc, submsk; unsigned int offset = 9; - struct irq_desc *mydesc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -482,12 +481,10 @@ static void s3c_irq_demux_adc(unsigned int irq, if (subsrc != 0) { if (subsrc & 1) { - mydesc = irq_desc + IRQ_TC; - desc_handle_irq(IRQ_TC, mydesc); + generic_handle_irq(IRQ_TC); } if (subsrc & 2) { - mydesc = irq_desc + IRQ_ADC; - desc_handle_irq(IRQ_ADC, mydesc); + generic_handle_irq(IRQ_ADC); } } } @@ -496,7 +493,6 @@ static void s3c_irq_demux_uart(unsigned int start) { unsigned int subsrc, submsk; unsigned int offset = start - IRQ_S3CUART_RX0; - struct irq_desc *desc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -512,20 +508,14 @@ static void s3c_irq_demux_uart(unsigned int start) subsrc &= 7; if (subsrc != 0) { - desc = irq_desc + start; - if (subsrc & 1) - desc_handle_irq(start, desc); - - desc++; + generic_handle_irq(start); if (subsrc & 2) - desc_handle_irq(start+1, desc); - - desc++; + generic_handle_irq(start+1); if (subsrc & 4) - desc_handle_irq(start+2, desc); + generic_handle_irq(start+2); } } @@ -572,7 +562,7 @@ s3c_irq_demux_extint8(unsigned int irq, eintpnd &= ~(1<<irq); irq += (IRQ_EINT4 - 4); - desc_handle_irq(irq, irq_desc + irq); + generic_handle_irq(irq); } } @@ -595,7 +585,7 @@ s3c_irq_demux_extint4t7(unsigned int irq, irq += (IRQ_EINT4 - 4); - desc_handle_irq(irq, irq_desc + irq); + generic_handle_irq(irq); } } diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c index e6705014b2a..21dfa74773d 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/plat-s3c24xx/pm-simtec.c @@ -20,12 +20,12 @@ #include <linux/init.h> #include <linux/sysdev.h> #include <linux/device.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/hardware.h> -#include <asm/io.h> #include <mach/map.h> #include <mach/regs-gpio.h> @@ -33,7 +33,7 @@ #include <asm/mach-types.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/pm.h> #define COPYRIGHT ", (c) 2005 Simtec Electronics" diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index fc4b731a949..8efb57ad501 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -35,12 +35,12 @@ #include <linux/ioport.h> #include <linux/delay.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/cacheflush.h> #include <mach/hardware.h> -#include <asm/io.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> @@ -48,7 +48,7 @@ #include <asm/mach/time.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/pm.h> /* for external use */ diff --git a/arch/arm/plat-s3c24xx/pwm-clock.c b/arch/arm/plat-s3c24xx/pwm-clock.c index 306cc9c6f9e..b8e854f1b1d 100644 --- a/arch/arm/plat-s3c24xx/pwm-clock.c +++ b/arch/arm/plat-s3c24xx/pwm-clock.c @@ -24,10 +24,10 @@ #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/regs-timer.h> /* Each of the timers 0 through 5 go through the following * clock tree, with the inputs depending on the timers. diff --git a/arch/arm/plat-s3c24xx/pwm.c b/arch/arm/plat-s3c24xx/pwm.c index 7a92c938542..feb770f2e84 100644 --- a/arch/arm/plat-s3c24xx/pwm.c +++ b/arch/arm/plat-s3c24xx/pwm.c @@ -19,8 +19,8 @@ #include <linux/io.h> #include <linux/pwm.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/devs.h> +#include <plat/regs-timer.h> struct pwm_device { struct list_head list; diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c index 8a5fffde663..7c09773ff9f 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-clock.c +++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c @@ -33,16 +33,16 @@ #include <linux/ioport.h> #include <linux/mutex.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/atomic.h> #include <asm/irq.h> -#include <asm/io.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) { diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c index f3dc38cf1de..0902afd227c 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c @@ -24,19 +24,19 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/sysdev.h> +#include <linux/io.h> #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/io.h> #include <asm/mach/irq.h> #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* camera irq */ @@ -44,7 +44,6 @@ static void s3c_irq_demux_cam(unsigned int irq, struct irq_desc *desc) { unsigned int subsrc, submsk; - struct irq_desc *mydesc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -58,12 +57,10 @@ static void s3c_irq_demux_cam(unsigned int irq, if (subsrc != 0) { if (subsrc & 1) { - mydesc = irq_desc + IRQ_S3C2440_CAM_C; - desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc); + generic_handle_irq(IRQ_S3C2440_CAM_C); } if (subsrc & 2) { - mydesc = irq_desc + IRQ_S3C2440_CAM_P; - desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc); + generic_handle_irq(IRQ_S3C2440_CAM_P); } } } diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 281b4804ed3..c0344fac4a9 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c @@ -20,28 +20,28 @@ #include <linux/platform_device.h> #include <linux/sysdev.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-gpioj.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> #include "s3c244x.h" -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc s3c244x_iodesc[] __initdata = { IODESC_ENT(CLKPWR), diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 4981a08b6eb..76594b21280 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -32,7 +32,7 @@ #include <mach/regs-gpio.h> #include <mach/regs-clock.h> #include <mach/regs-mem.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not * reset the UART configuration, only enable if you really need this! diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c index b471a21ae2e..c51916236ac 100644 --- a/arch/arm/plat-s3c24xx/time.c +++ b/arch/arm/plat-s3c24xx/time.c @@ -25,20 +25,20 @@ #include <linux/irq.h> #include <linux/err.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/system.h> #include <asm/leds.h> #include <asm/mach-types.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/map.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/regs-timer.h> #include <mach/regs-irq.h> #include <asm/mach/time.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> static unsigned long timer_startval; static unsigned long timer_usec_ticks; diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 56281c030a7..43aa2020f85 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Wed Aug 13 21:56:02 2008 +# Last update: Thu Sep 25 10:10:50 2008 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -1810,7 +1810,7 @@ kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819 pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820 jade MACH_JADE JADE 1821 ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 -gprisc3 MACH_GPRISC4 GPRISC4 1823 +gprisc3 MACH_GPRISC3 GPRISC3 1823 stamp9260 MACH_STAMP9260 STAMP9260 1824 smdk6430 MACH_SMDK6430 SMDK6430 1825 smdkc100 MACH_SMDKC100 SMDKC100 1826 @@ -1859,5 +1859,43 @@ kbio9260 MACH_KBIO9260 KBIO9260 1868 ginza MACH_GINZA GINZA 1869 a636n MACH_A636N A636N 1870 imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871 -nenoc MACH_NEMOC NEMOC 1872 +nemoc MACH_NEMOC NEMOC 1872 geneva MACH_GENEVA GENEVA 1873 +htcpharos MACH_HTCPHAROS HTCPHAROS 1874 +neonc MACH_NEONC NEONC 1875 +nas7100 MACH_NAS7100 NAS7100 1876 +teuphone MACH_TEUPHONE TEUPHONE 1877 +annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878 +csb733 MACH_CSB733 CSB733 1879 +bk3 MACH_BK3 BK3 1880 +omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881 +et9261cp MACH_ET9261CP ET9261CP 1882 +jasperc MACH_JASPERC JASPERC 1883 +issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884 +ued MACH_UED UED 1885 +esiblade MACH_ESIBLADE ESIBLADE 1886 +eye02 MACH_EYE02 EYE02 1887 +imx27kbd MACH_IMX27KBD IMX27KBD 1888 +sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889 +kixvp435 MACH_KIXVP435 KIXVP435 1890 +kixnp435 MACH_KIXNP435 KIXNP435 1891 +africa MACH_AFRICA AFRICA 1892 +nh233 MACH_NH233 NH233 1893 +rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894 +bcm4760 MACH_BCM4760 BCM4760 1895 +eddy_v2 MACH_EDDY_V2 EDDY_V2 1896 +realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897 +hid_a7 MACH_HID_A7 HID_A7 1898 +hero MACH_HERO HERO 1899 +omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900 +realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901 +micro9s MACH_MICRO9S MICRO9S 1902 +mako MACH_MAKO MAKO 1903 +xdaflame MACH_XDAFLAME XDAFLAME 1904 +phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905 +limestone MACH_LIMESTONE LIMESTONE 1906 +iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907 +rut100 MACH_RUT100 RUT100 1908 +asusp535 MACH_ASUSP535 ASUSP535 1909 +htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910 +sygdg1 MACH_SYGDG1 SYGDG1 1911 diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 806ce26d524..ba592a9e6fb 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -21,13 +21,13 @@ #include <asm/assembler.h> #include <asm/vfpmacros.h> - .globl do_vfp -do_vfp: +ENTRY(do_vfp) enable_irq ldr r4, .LCvfp ldr r11, [r10, #TI_CPU] @ CPU number add r10, r10, #TI_VFPSTATE @ r10 = workspace ldr pc, [r4] @ call VFP entry point +ENDPROC(do_vfp) ENTRY(vfp_null_entry) mov pc, lr @@ -40,11 +40,11 @@ ENDPROC(vfp_null_entry) @ failure to the VFP initialisation code. __INIT - .globl vfp_testing_entry -vfp_testing_entry: +ENTRY(vfp_testing_entry) ldr r0, VFP_arch_address str r5, [r0] @ known non-zero value mov pc, r9 @ we have handled the fault +ENDPROC(vfp_testing_entry) VFP_arch_address: .word VFP_arch diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 353f9e5c791..a62dcf7098b 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -68,8 +68,7 @@ @ r11 = CPU number @ lr = failure return - .globl vfp_support_entry -vfp_support_entry: +ENTRY(vfp_support_entry) DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 VFPFMRX r1, FPEXC @ Is the VFP enabled? @@ -165,11 +164,10 @@ process_exception: @ code will raise an exception if @ required. If not, the user code will @ retry the faulted instruction +ENDPROC(vfp_support_entry) #ifdef CONFIG_SMP - .globl vfp_save_state - .type vfp_save_state, %function -vfp_save_state: +ENTRY(vfp_save_state) @ Save the current VFP state @ r0 - save location @ r1 - FPEXC @@ -182,13 +180,13 @@ vfp_save_state: VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 mov pc, lr +ENDPROC(vfp_save_state) #endif last_VFP_context_address: .word last_VFP_context - .globl vfp_get_float -vfp_get_float: +ENTRY(vfp_get_float) add pc, pc, r0, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 @@ -197,9 +195,9 @@ vfp_get_float: mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1 mov pc, lr .endr +ENDPROC(vfp_get_float) - .globl vfp_put_float -vfp_put_float: +ENTRY(vfp_put_float) add pc, pc, r1, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 @@ -208,9 +206,9 @@ vfp_put_float: mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 mov pc, lr .endr +ENDPROC(vfp_put_float) - .globl vfp_get_double -vfp_get_double: +ENTRY(vfp_get_double) add pc, pc, r0, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 @@ -229,9 +227,9 @@ vfp_get_double: mov r0, #0 mov r1, #0 mov pc, lr +ENDPROC(vfp_get_double) - .globl vfp_put_double -vfp_put_double: +ENTRY(vfp_put_double) add pc, pc, r2, lsl #3 mov r0, r0 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 @@ -245,3 +243,4 @@ vfp_put_double: mov pc, lr .endr #endif +ENDPROC(vfp_put_double) |