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-rw-r--r--arch/blackfin/Kconfig421
1 files changed, 118 insertions, 303 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index aa9db307331..2a3a7ea5958 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -3,7 +3,7 @@
# see Documentation/kbuild/kconfig-language.txt.
#
-mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
+mainmenu "Blackfin Kernel Configuration"
config MMU
bool
@@ -29,10 +29,6 @@ config ZONE_DMA
bool
default y
-config BFIN
- bool
- default y
-
config SEMAPHORE_SLEEPERS
bool
default y
@@ -50,7 +46,7 @@ config GENERIC_HARDIRQS
default y
config GENERIC_IRQ_PROBE
- bool
+ bool
default y
config GENERIC_TIME
@@ -69,11 +65,6 @@ config GENERIC_CALIBRATE_DELAY
bool
default y
-config IRQCHIP_DEMUX_GPIO
- bool
- depends on (BF53x || BF561 || BF54x)
- default y
-
source "init/Kconfig"
source "kernel/Kconfig.preempt"
@@ -85,6 +76,21 @@ choice
prompt "CPU"
default BF533
+config BF522
+ bool "BF522"
+ help
+ BF522 Processor Support.
+
+config BF525
+ bool "BF525"
+ help
+ BF525 Processor Support.
+
+config BF527
+ bool "BF527"
+ help
+ BF527 Processor Support.
+
config BF531
bool "BF531"
help
@@ -125,6 +131,11 @@ config BF544
help
BF544 Processor Support.
+config BF547
+ bool "BF547"
+ help
+ BF547 Processor Support.
+
config BF548
bool "BF548"
help
@@ -144,13 +155,18 @@ endchoice
choice
prompt "Silicon Rev"
+ default BF_REV_0_1 if BF527
default BF_REV_0_2 if BF537
default BF_REV_0_3 if BF533
default BF_REV_0_0 if BF549
config BF_REV_0_0
bool "0.0"
- depends on (BF549)
+ depends on (BF52x || BF54x)
+
+config BF_REV_0_1
+ bool "0.1"
+ depends on (BF52x || BF54x)
config BF_REV_0_2
bool "0.2"
@@ -176,6 +192,11 @@ config BF_REV_NONE
endchoice
+config BF52x
+ bool
+ depends on (BF522 || BF525 || BF527)
+ default y
+
config BF53x
bool
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
@@ -183,7 +204,7 @@ config BF53x
config BF54x
bool
- depends on (BF542 || BF544 || BF548 || BF549)
+ depends on (BF542 || BF544 || BF547 || BF548 || BF549)
default y
config BFIN_DUAL_CORE
@@ -196,83 +217,6 @@ config BFIN_SINGLE_CORE
depends on !BFIN_DUAL_CORE
default y
-choice
- prompt "System type"
- default BFIN533_STAMP
- help
- Do NOT change the board here. Please use the top level
- configuration to ensure that all the other settings are
- correct.
-
-config BFIN533_EZKIT
- bool "BF533-EZKIT"
- depends on (BF533 || BF532 || BF531)
- help
- BF533-EZKIT-LITE board Support.
-
-config BFIN533_STAMP
- bool "BF533-STAMP"
- depends on (BF533 || BF532 || BF531)
- help
- BF533-STAMP board Support.
-
-config BFIN537_STAMP
- bool "BF537-STAMP"
- depends on (BF537 || BF536 || BF534)
- help
- BF537-STAMP board Support.
-
-config BFIN533_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF533"
- depends on (BF533)
- help
- CM-BF533 support for EVAL- and DEV-Board.
-
-config BFIN537_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF537"
- depends on (BF537)
- help
- CM-BF537 support for EVAL- and DEV-Board.
-
-config BFIN548_EZKIT
- bool "BF548-EZKIT"
- depends on (BF548 || BF549)
- help
- BFIN548-EZKIT board Support.
-
-config BFIN561_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF561"
- depends on (BF561)
- help
- CM-BF561 support for EVAL- and DEV-Board.
-
-config BFIN561_EZKIT
- bool "BF561-EZKIT"
- depends on (BF561)
- help
- BF561-EZKIT-LITE board Support.
-
-config BFIN561_TEPLA
- bool "BF561-TEPLA"
- depends on (BF561)
- help
- BF561-TEPLA board Support.
-
-config PNAV10
- bool "PNAV 1.0 board"
- depends on (BF537)
- help
- PNAV 1.0 board Support.
-
-config GENERIC_BOARD
- bool "Custom"
- depends on (BF537 || BF536 \
- || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
- help
- GENERIC or Custom board Support.
-
-endchoice
-
config MEM_GENERIC_BOARD
bool
depends on GENERIC_BOARD
@@ -286,7 +230,8 @@ config MEM_MT48LC64M4A2FB_7E
config MEM_MT48LC16M16A2TG_75
bool
depends on (BFIN533_EZKIT || BFIN561_EZKIT \
- || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
+ || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \
+ || H8606_HVSISTEMAS)
default y
config MEM_MT48LC32M8A2_75
@@ -299,11 +244,17 @@ config MEM_MT48LC8M32B2B5_7
depends on (BFIN561_BLUETECHNIX_CM)
default y
+config MEM_MT48LC32M16A2TG_75
+ bool
+ depends on (BFIN527_EZKIT)
+ default y
+
config BFIN_SHARED_FLASH_ENET
bool
depends on (BFIN533_STAMP)
default y
+source "arch/blackfin/mach-bf527/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
@@ -329,7 +280,7 @@ config CLKIN_HZ
int "Crystal Frequency in Hz"
default "11059200" if BFIN533_STAMP
default "27000000" if BFIN533_EZKIT
- default "25000000" if BFIN537_STAMP
+ default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
default "30000000" if BFIN561_EZKIT
default "24576000" if PNAV10
help
@@ -345,9 +296,9 @@ config BFIN_KERNEL_CLOCK
configuration.
config PLL_BYPASS
- bool "Bypass PLL"
- depends on BFIN_KERNEL_CLOCK
- default n
+ bool "Bypass PLL"
+ depends on BFIN_KERNEL_CLOCK
+ default n
config CLKIN_HALF
bool "Half Clock In"
@@ -362,11 +313,12 @@ config VCO_MULT
range 1 64
default "22" if BFIN533_EZKIT
default "45" if BFIN533_STAMP
- default "20" if BFIN537_STAMP
+ default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
default "22" if BFIN533_BLUETECHNIX_CM
default "20" if BFIN537_BLUETECHNIX_CM
default "20" if BFIN561_BLUETECHNIX_CM
default "20" if BFIN561_EZKIT
+ default "16" if H8606_HVSISTEMAS
help
This controls the frequency of the on-chip PLL. This can be between 1 and 64.
PLL Frequency = (Crystal Frequency) * (this setting)
@@ -398,11 +350,12 @@ config SCLK_DIV
range 1 15
default 5 if BFIN533_EZKIT
default 5 if BFIN533_STAMP
- default 4 if BFIN537_STAMP
+ default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
default 5 if BFIN533_BLUETECHNIX_CM
default 4 if BFIN537_BLUETECHNIX_CM
default 4 if BFIN561_BLUETECHNIX_CM
default 5 if BFIN561_EZKIT
+ default 3 if H8606_HVSISTEMAS
help
This sets the frequency of the system clock (including SDRAM or DDR).
This can be between 1 and 15
@@ -422,11 +375,11 @@ config MAX_VCO_HZ
default 500000000 if BF534
default 400000000 if BF536
default 600000000 if BF537
- default 533000000 if BF538
- default 533000000 if BF539
+ default 533333333 if BF538
+ default 533333333 if BF539
default 600000000 if BF542
- default 533000000 if BF544
- default 533000000 if BF549
+ default 533333333 if BF544
+ default 533333333 if BF549
default 600000000 if BF561
config MIN_VCO_HZ
@@ -435,7 +388,7 @@ config MIN_VCO_HZ
config MAX_SCLK_HZ
int
- default 133000000
+ default 133333333
config MIN_SCLK_HZ
int
@@ -450,15 +403,19 @@ comment "Memory Setup"
config MEM_SIZE
int "SDRAM Memory Size in MBytes"
default 32 if BFIN533_EZKIT
+ default 64 if BFIN527_EZKIT
default 64 if BFIN537_STAMP
default 64 if BFIN561_EZKIT
default 128 if BFIN533_STAMP
default 64 if PNAV10
+ default 32 if H8606_HVSISTEMAS
config MEM_ADD_WIDTH
int "SDRAM Memory Address Width"
default 9 if BFIN533_EZKIT
default 9 if BFIN561_EZKIT
+ default 9 if H8606_HVSISTEMAS
+ default 10 if BFIN527_EZKIT
default 10 if BFIN537_STAMP
default 11 if BFIN533_STAMP
default 10 if PNAV10
@@ -613,85 +570,86 @@ config I_ENTRY_L1
bool "Locate interrupt entry code in L1 Memory"
default y
help
- If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
- into L1 instruction memory.(less latency)
+ If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
+ into L1 instruction memory. (less latency)
config EXCPT_IRQ_SYSC_L1
- bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
+ bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
default y
help
- If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
- into L1 instruction memory.(less latency)
+ If enabled, the entire ASM lowlevel exception and interrupt entry code
+ (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
+ (less latency)
config DO_IRQ_L1
bool "Locate frequently called do_irq dispatcher function in L1 Memory"
default y
help
- If enabled frequently called do_irq dispatcher function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the frequently called do_irq dispatcher function is linked
+ into L1 instruction memory. (less latency)
config CORE_TIMER_IRQ_L1
bool "Locate frequently called timer_interrupt() function in L1 Memory"
default y
help
- If enabled frequently called timer_interrupt() function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the frequently called timer_interrupt() function is linked
+ into L1 instruction memory. (less latency)
config IDLE_L1
bool "Locate frequently idle function in L1 Memory"
default y
help
- If enabled frequently called idle function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the frequently called idle function is linked
+ into L1 instruction memory. (less latency)
config SCHEDULE_L1
bool "Locate kernel schedule function in L1 Memory"
default y
help
- If enabled frequently called kernel schedule is linked
- into L1 instruction memory.(less latency)
+ If enabled, the frequently called kernel schedule is linked
+ into L1 instruction memory. (less latency)
config ARITHMETIC_OPS_L1
bool "Locate kernel owned arithmetic functions in L1 Memory"
default y
help
- If enabled arithmetic functions are linked
- into L1 instruction memory.(less latency)
+ If enabled, arithmetic functions are linked
+ into L1 instruction memory. (less latency)
config ACCESS_OK_L1
bool "Locate access_ok function in L1 Memory"
default y
help
- If enabled access_ok function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the access_ok function is linked
+ into L1 instruction memory. (less latency)
config MEMSET_L1
bool "Locate memset function in L1 Memory"
default y
help
- If enabled memset function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the memset function is linked
+ into L1 instruction memory. (less latency)
config MEMCPY_L1
bool "Locate memcpy function in L1 Memory"
default y
help
- If enabled memcpy function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the memcpy function is linked
+ into L1 instruction memory. (less latency)
config SYS_BFIN_SPINLOCK_L1
bool "Locate sys_bfin_spinlock function in L1 Memory"
default y
help
- If enabled sys_bfin_spinlock function is linked
- into L1 instruction memory.(less latency)
+ If enabled, sys_bfin_spinlock function is linked
+ into L1 instruction memory. (less latency)
config IP_CHECKSUM_L1
bool "Locate IP Checksum function in L1 Memory"
default n
help
- If enabled IP Checksum function is linked
- into L1 instruction memory.(less latency)
+ If enabled, the IP Checksum function is linked
+ into L1 instruction memory. (less latency)
config CACHELINE_ALIGNED_L1
bool "Locate cacheline_aligned data to L1 Data Memory"
@@ -699,24 +657,24 @@ config CACHELINE_ALIGNED_L1
default n if BF54x
depends on !BF531
help
- If enabled cacheline_anligned data is linked
- into L1 data memory.(less latency)
+ If enabled, cacheline_anligned data is linked
+ into L1 data memory. (less latency)
config SYSCALL_TAB_L1
bool "Locate Syscall Table L1 Data Memory"
default n
depends on !BF531
help
- If enabled the Syscall LUT is linked
- into L1 data memory.(less latency)
+ If enabled, the Syscall LUT is linked
+ into L1 data memory. (less latency)
config CPLB_SWITCH_TAB_L1
bool "Locate CPLB Switch Tables L1 Data Memory"
default n
depends on !BF531
help
- If enabled the CPLB Switch Tables are linked
- into L1 data memory.(less latency)
+ If enabled, the CPLB Switch Tables are linked
+ into L1 data memory. (less latency)
endmenu
@@ -748,9 +706,19 @@ config LARGE_ALLOCS
a lot of RAM, and you need to able to allocate very large
contiguous chunks. If unsure, say N.
+config BFIN_GPTIMERS
+ tristate "Enable Blackfin General Purpose Timers API"
+ default n
+ help
+ Enable support for the General Purpose Timers API. If you
+ are unsure, say N.
+
+ To compile this driver as a module, choose M here: the module
+ will be called gptimers.ko.
+
config BFIN_DMA_5XX
bool "Enable DMA Support"
- depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
+ depends on (BF52x || BF53x || BF561 || BF54x)
default y
help
DMA driver for BF5xx.
@@ -898,6 +866,20 @@ config BANK_3
default 0x99B3
endmenu
+config EBIU_MBSCTLVAL
+ hex "EBIU Bank Select Control Register"
+ depends on BF54x
+ default 0
+
+config EBIU_MODEVAL
+ hex "Flash Memory Mode Control Register"
+ depends on BF54x
+ default 1
+
+config EBIU_FCTLVAL
+ hex "Flash Memory Bank Control Register"
+ depends on BF54x
+ default 6
endmenu
#############################################################################
@@ -1012,176 +994,9 @@ source "drivers/Kconfig"
source "fs/Kconfig"
-source "arch/blackfin/oprofile/Kconfig"
-
-menu "Kernel hacking"
-
-source "lib/Kconfig.debug"
-
-config DEBUG_HWERR
- bool "Hardware error interrupt debugging"
- depends on DEBUG_KERNEL
- help
- When enabled, the hardware error interrupt is never disabled, and
- will happen immediately when an error condition occurs. This comes
- at a slight cost in code size, but is necessary if you are getting
- hardware error interrupts and need to know where they are coming
- from.
-
-config DEBUG_ICACHE_CHECK
- bool "Check Instruction cache coherancy"
- depends on DEBUG_KERNEL
- depends on DEBUG_HWERR
- help
- Say Y here if you are getting wierd unexplained errors. This will
- ensure that icache is what SDRAM says it should be, by doing a
- byte wise comparision between SDRAM and instruction cache. This
- also relocates the irq_panic() function to L1 memory, (which is
- un-cached).
-
-config DEBUG_HUNT_FOR_ZERO
- bool "Catch NULL pointer reads/writes"
- default y
- help
- Say Y here to catch reads/writes to anywhere in the memory range
- from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
- catching common programming errors such as NULL pointer dereferences.
-
- Misbehaving applications will be killed (generate a SEGV) while the
- kernel will trigger a panic.
-
- Enabling this option will take up an extra entry in CPLB table.
- Otherwise, there is no extra overhead.
-
-config DEBUG_BFIN_HWTRACE_ON
- bool "Turn on Blackfin's Hardware Trace"
- default y
- help
- All Blackfins include a Trace Unit which stores a history of the last
- 16 changes in program flow taken by the program sequencer. The history
- allows the user to recreate the program sequencer’s recent path. This
- can be handy when an application dies - we print out the execution
- path of how it got to the offending instruction.
-
- By turning this off, you may save a tiny amount of power.
-
-choice
- prompt "Omit loop Tracing"
- default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- depends on DEBUG_BFIN_HWTRACE_ON
- help
- The trace buffer can be configured to omit recording of changes in
- program flow that match either the last entry or one of the last
- two entries. Omitting one of these entries from the record prevents
- the trace buffer from overflowing because of any sort of loop (for, do
- while, etc) in the program.
-
- Because zero-overhead Hardware loops are not recorded in the trace buffer,
- this feature can be used to prevent trace overflow from loops that
- are nested four deep.
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- bool "Trace all Loops"
- help
- The trace buffer records all changes of flow
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
- bool "Compress single-level loops"
- help
- The trace buffer does not record single loops - helpful if trace
- is spinning on a while or do loop.
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
- bool "Compress two-level loops"
- help
- The trace buffer does not record loops two levels deep. Helpful if
- the trace is spinning in a nested loop
-
-endchoice
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION
- int
- depends on DEBUG_BFIN_HWTRACE_ON
- default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
- default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
-
-
-config DEBUG_BFIN_HWTRACE_EXPAND
- bool "Expand Trace Buffer greater than 16 entries"
- depends on DEBUG_BFIN_HWTRACE_ON
- default n
- help
- By selecting this option, every time the 16 hardware entries in
- the Blackfin's HW Trace buffer are full, the kernel will move them
- into a software buffer, for dumping when there is an issue. This
- has a great impact on performance, (an interrupt every 16 change of
- flows) and should normally be turned off, except in those nasty
- debugging sessions
-
-config DEBUG_BFIN_HWTRACE_EXPAND_LEN
- int "Size of Trace buffer (in power of 2k)"
- range 0 4
- depends on DEBUG_BFIN_HWTRACE_EXPAND
- default 1
- help
- This sets the size of the software buffer that the trace information
- is kept in.
- 0 for (2^0) 1k, or 256 entries,
- 1 for (2^1) 2k, or 512 entries,
- 2 for (2^2) 4k, or 1024 entries,
- 3 for (2^3) 8k, or 2048 entries,
- 4 for (2^4) 16k, or 4096 entries
-
-config DEBUG_BFIN_NO_KERN_HWTRACE
- bool "Trace user apps (turn off hwtrace in kernel)"
- depends on DEBUG_BFIN_HWTRACE_ON
- default n
- help
- Some pieces of the kernel contain a lot of flow changes which can
- quickly fill up the hardware trace buffer. When debugging crashes,
- the hardware trace may indicate that the problem lies in kernel
- space when in reality an application is buggy.
-
- Say Y here to disable hardware tracing in some known "jumpy" pieces
- of code so that the trace buffer will extend further back.
+source "kernel/Kconfig.instrumentation"
-config EARLY_PRINTK
- bool "Early printk"
- default n
- help
- This option enables special console drivers which allow the kernel
- to print messages very early in the bootup process.
-
- This is useful for kernel debugging when your machine crashes very
- early before the console code is initialized. After enabling this
- feature, you must add "earlyprintk=serial,uart0,57600" to the
- command line (bootargs). It is safe to say Y here in all cases, as
- all of this lives in the init section and is thrown away after the
- kernel boots completely.
-
-config DUAL_CORE_TEST_MODULE
- tristate "Dual Core Test Module"
- depends on (BF561)
- default n
- help
- Say Y here to build-in dual core test module for dual core test.
-
-config CPLB_INFO
- bool "Display the CPLB information"
- help
- Display the CPLB information.
-
-config ACCESS_CHECK
- bool "Check the user pointer address"
- default y
- help
- Usually the pointer transfer from user space is checked to see if its
- address is in the kernel space.
-
- Say N here to disable that check to improve the performance.
-
-endmenu
+source "arch/blackfin/Kconfig.debug"
source "security/Kconfig"
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 10:58:34 +0000