diff options
Diffstat (limited to 'arch/blackfin/mach-bf537/include/mach')
| -rw-r--r-- | arch/blackfin/mach-bf537/include/mach/blackfin.h | 90 |
1 files changed, 0 insertions, 90 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/blackfin.h b/arch/blackfin/mach-bf537/include/mach/blackfin.h index f5e5015ad83..9ee8834c8f1 100644 --- a/arch/blackfin/mach-bf537/include/mach/blackfin.h +++ b/arch/blackfin/mach-bf537/include/mach/blackfin.h @@ -45,96 +45,11 @@ #if !defined(__ASSEMBLY__) #include "cdefBF534.h" -/* UART 0*/ -#define bfin_read_UART_THR() bfin_read_UART0_THR() -#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val) -#define bfin_read_UART_RBR() bfin_read_UART0_RBR() -#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val) -#define bfin_read_UART_DLL() bfin_read_UART0_DLL() -#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val) -#define bfin_read_UART_IER() bfin_read_UART0_IER() -#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val) -#define bfin_read_UART_DLH() bfin_read_UART0_DLH() -#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val) -#define bfin_read_UART_IIR() bfin_read_UART0_IIR() -#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val) -#define bfin_read_UART_LCR() bfin_read_UART0_LCR() -#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val) -#define bfin_read_UART_MCR() bfin_read_UART0_MCR() -#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val) -#define bfin_read_UART_LSR() bfin_read_UART0_LSR() -#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val) -#define bfin_read_UART_SCR() bfin_read_UART0_SCR() -#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val) -#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL() -#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val) - #if defined(CONFIG_BF537) || defined(CONFIG_BF536) #include "cdefBF537.h" #endif #endif -/* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */ - -/* UART_IIR Register */ -#define STATUS(x) ((x << 1) & 0x06) -#define STATUS_P1 0x02 -#define STATUS_P0 0x01 - -/* DMA Channel */ -#define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX() -#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val) -#define CH_UART_RX CH_UART0_RX -#define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX() -#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val) -#define CH_UART_TX CH_UART0_TX - -/* System Interrupt Controller */ -#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX() -#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val) -#define IRQ_UART_RX IRQ_UART0_RX -#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX() -#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val) -#define IRQ_UART_TX IRQ_UART0_TX -#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR() -#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val) -#define IRQ_UART_ERROR IRQ_UART0_ERROR - -/* MMR Registers*/ -#define bfin_read_UART_THR() bfin_read_UART0_THR() -#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val) -#define BFIN_UART_THR UART0_THR -#define bfin_read_UART_RBR() bfin_read_UART0_RBR() -#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val) -#define BFIN_UART_RBR UART0_RBR -#define bfin_read_UART_DLL() bfin_read_UART0_DLL() -#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val) -#define BFIN_UART_DLL UART0_DLL -#define bfin_read_UART_IER() bfin_read_UART0_IER() -#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val) -#define BFIN_UART_IER UART0_IER -#define bfin_read_UART_DLH() bfin_read_UART0_DLH() -#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val) -#define BFIN_UART_DLH UART0_DLH -#define bfin_read_UART_IIR() bfin_read_UART0_IIR() -#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val) -#define BFIN_UART_IIR UART0_IIR -#define bfin_read_UART_LCR() bfin_read_UART0_LCR() -#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val) -#define BFIN_UART_LCR UART0_LCR -#define bfin_read_UART_MCR() bfin_read_UART0_MCR() -#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val) -#define BFIN_UART_MCR UART0_MCR -#define bfin_read_UART_LSR() bfin_read_UART0_LSR() -#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val) -#define BFIN_UART_LSR UART0_LSR -#define bfin_read_UART_SCR() bfin_read_UART0_SCR() -#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val) -#define BFIN_UART_SCR UART0_SCR -#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL() -#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val) -#define BFIN_UART_GCTL UART0_GCTL - #define BFIN_UART_NR_PORTS 2 #define OFFSET_THR 0x00 /* Transmit Holding register */ @@ -150,11 +65,6 @@ #define OFFSET_SCR 0x1C /* SCR Scratch Register */ #define OFFSET_GCTL 0x24 /* Global Control Register */ -/* DPMC*/ -#define bfin_read_STOPCK_OFF() bfin_read_STOPCK() -#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) -#define STOPCK_OFF STOPCK - /* PLL_DIV Masks */ #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ |