diff options
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/linux32.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/traps.c | 12 |
3 files changed, 9 insertions, 7 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index a7162a4484c..1bdbcad3bb7 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -149,6 +149,7 @@ void __init check_wait(void) case CPU_R4650: case CPU_R4700: case CPU_R5000: + case CPU_R5500: case CPU_NEVADA: case CPU_4KC: case CPU_4KEC: diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 2f8452b404c..49aac6e17df 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -32,7 +32,6 @@ #include <linux/module.h> #include <linux/binfmts.h> #include <linux/security.h> -#include <linux/syscalls.h> #include <linux/compat.h> #include <linux/vfs.h> #include <linux/ipc.h> @@ -235,7 +234,7 @@ SYSCALL_DEFINE6(32_ipc, u32, call, long, first, long, second, long, third, #else SYSCALL_DEFINE6(32_ipc, u32, call, int, first, int, second, int, third, - u32, ptr, u32 fifth) + u32, ptr, u32, fifth) { return -ENOSYS; } diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b2d7041341b..29fadaccecd 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void) #endif /* CONFIG_MIPS_MT_SMTC */ if (cpu_has_veic || cpu_has_vint) { + unsigned long sr = set_c0_status(ST0_BEV); write_c0_ebase(ebase); + write_c0_status(sr); /* Setting vector spacing enables EI/VI mode */ change_c0_intctl(0x3e0, VECTORSPACING); } @@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr, #ifdef CONFIG_64BIT unsigned long uncached_ebase = TO_UNCAC(ebase); #endif - if (cpu_has_mips_r2) - uncached_ebase += (read_c0_ebase() & 0x3ffff000); if (!addr) panic(panic_null_cerr); @@ -1635,9 +1635,11 @@ void __init trap_init(void) return; /* Already done */ #endif - if (cpu_has_veic || cpu_has_vint) - ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64); - else { + if (cpu_has_veic || cpu_has_vint) { + unsigned long size = 0x200 + VECTORSPACING*64; + ebase = (unsigned long) + __alloc_bootmem(size, 1 << fls(size), 0); + } else { ebase = CAC_BASE; if (cpu_has_mips_r2) ebase += (read_c0_ebase() & 0x3ffff000); |