diff options
Diffstat (limited to 'arch/mips/mips-boards/atlas')
| -rw-r--r-- | arch/mips/mips-boards/atlas/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/atlas/atlas-irq.S | 120 | ||||
| -rw-r--r-- | arch/mips/mips-boards/atlas/atlas_int.c | 92 |
3 files changed, 87 insertions, 127 deletions
diff --git a/arch/mips/mips-boards/atlas/Makefile b/arch/mips/mips-boards/atlas/Makefile index 50fec2a5aee..d8dab75906b 100644 --- a/arch/mips/mips-boards/atlas/Makefile +++ b/arch/mips/mips-boards/atlas/Makefile @@ -16,5 +16,5 @@ # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. # -obj-y := atlas_int.o atlas-irq.o atlas_setup.o +obj-y := atlas_int.o atlas_setup.o obj-$(CONFIG_KGDB) += atlas_gdb.o diff --git a/arch/mips/mips-boards/atlas/atlas-irq.S b/arch/mips/mips-boards/atlas/atlas-irq.S deleted file mode 100644 index 31bc99a5238..00000000000 --- a/arch/mips/mips-boards/atlas/atlas-irq.S +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Interrupt exception dispatch code. - */ -#include <linux/config.h> - -#include <asm/asm.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> -#include <asm/stackframe.h> -#include <asm/mips-boards/atlasint.h> - -/* - * Furthermore, the IRQs on the MIPS board look basically (barring software - * IRQs which we don't use at all and all external interrupt sources are - * combined together on hardware interrupt 0 (MIPS IRQ 2)) like: - * - * MIPS IRQ Source - * -------- ------ - * 0 Software (ignored) - * 1 Software (ignored) - * 2 Combined hardware interrupt (hw0) - * 3 Hardware (ignored) - * 4 Hardware (ignored) - * 5 Hardware (ignored) - * 6 Hardware (ignored) - * 7 R4k timer (what we use) - * - * Note: On the SEAD board thing are a little bit different. - * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired - * wired to UART1. - * - * We handle the IRQ according to _our_ priority which is: - * - * Highest ---- R4k Timer - * Lowest ---- Combined hardware interrupt - * - * then we just return, if multiple IRQs are pending then we will just take - * another exception, big deal. - */ - - .text - .set noreorder - .set noat - .align 5 - NESTED(mipsIRQ, PT_SIZE, sp) - SAVE_ALL - CLI - .set at - - mfc0 s0, CP0_CAUSE # get irq bits - mfc0 s1, CP0_STATUS # get irq mask - andi s0, ST0_IM # CAUSE.CE may be non-zero! - and s0, s1 - -#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - .set mips32 - clz a0, s0 - .set mips0 - negu a0 - addu a0, 31-CAUSEB_IP - bltz a0, spurious -#else - beqz s0, spurious - li a0, 7 - - and t0, s0, 0xf000 - sltiu t0, t0, 1 - sll t0, 2 - subu a0, t0 - sll s0, t0 - - and t0, s0, 0xc000 - sltiu t0, t0, 1 - sll t0, 1 - subu a0, t0 - sll s0, t0 - - and t0, s0, 0x8000 - sltiu t0, t0, 1 - # sll t0, 0 - subu a0, t0 - # sll s0, t0 -#endif - - li a1, MIPSCPU_INT_ATLAS - bne a0, a1, 1f - addu a0, MIPSCPU_INT_BASE - - jal atlas_hw0_irqdispatch - move a0, sp - - j ret_from_irq - nop - -1: jal do_IRQ - move a1, sp - - j ret_from_irq - nop - -spurious: - j spurious_interrupt - nop - END(mipsIRQ) diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index bc0ebc69bfb..db53950b7cf 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -39,8 +39,6 @@ static struct atlas_ictrl_regs *atlas_hw0_icregs; -extern asmlinkage void mipsIRQ(void); - #if 0 #define DEBUG_INT(x...) printk(x) #else @@ -98,7 +96,7 @@ static inline int ls1bit32(unsigned int x) return b; } -void atlas_hw0_irqdispatch(struct pt_regs *regs) +static inline void atlas_hw0_irqdispatch(struct pt_regs *regs) { unsigned long int_status; int irq; @@ -116,6 +114,91 @@ void atlas_hw0_irqdispatch(struct pt_regs *regs) do_IRQ(irq, regs); } +static inline int clz(unsigned long x) +{ + __asm__ ( + " .set push \n" + " .set mips32 \n" + " clz %0, %1 \n" + " .set pop \n" + : "=r" (x) + : "r" (x)); + + return x; +} + +/* + * Version of ffs that only looks at bits 12..15. + */ +static inline unsigned int irq_ffs(unsigned int pending) +{ +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) + return -clz(pending) + 31 - CAUSEB_IP; +#else + unsigned int a0 = 7; + unsigned int t0; + + t0 = s0 & 0xf000; + t0 = t0 < 1; + t0 = t0 << 2; + a0 = a0 - t0; + s0 = s0 << t0; + + t0 = s0 & 0xc000; + t0 = t0 < 1; + t0 = t0 << 1; + a0 = a0 - t0; + s0 = s0 << t0; + + t0 = s0 & 0x8000; + t0 = t0 < 1; + //t0 = t0 << 2; + a0 = a0 - t0; + //s0 = s0 << t0; + + return a0; +#endif +} + +/* + * IRQs on the Atlas board look basically (barring software IRQs which we + * don't use at all and all external interrupt sources are combined together + * on hardware interrupt 0 (MIPS IRQ 2)) like: + * + * MIPS IRQ Source + * -------- ------ + * 0 Software (ignored) + * 1 Software (ignored) + * 2 Combined hardware interrupt (hw0) + * 3 Hardware (ignored) + * 4 Hardware (ignored) + * 5 Hardware (ignored) + * 6 Hardware (ignored) + * 7 R4k timer (what we use) + * + * We handle the IRQ according to _our_ priority which is: + * + * Highest ---- R4k Timer + * Lowest ---- Combined hardware interrupt + * + * then we just return, if multiple IRQs are pending then we will just take + * another exception, big deal. + */ +asmlinkage void plat_irq_dispatch(struct pt_regs *regs) +{ + unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; + int irq; + + irq = irq_ffs(pending); + + if (irq == MIPSCPU_INT_ATLAS) + atlas_hw0_irqdispatch(regs); + else if (irq > 0) + do_IRQ(MIPSCPU_INT_BASE + irq, regs); + else + spurious_interrupt(regs); +} + void __init arch_init_irq(void) { int i; @@ -128,9 +211,6 @@ void __init arch_init_irq(void) */ atlas_hw0_icregs->intrsten = 0xffffffff; - /* Now safe to set the exception vector. */ - set_except_vector(0, mipsIRQ); - for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; |