aboutsummaryrefslogtreecommitdiff
path: root/arch/mips
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm47xx/gpio.c85
-rw-r--r--arch/mips/bcm47xx/setup.c5
-rw-r--r--arch/mips/bcm47xx/wgt634u.c40
-rw-r--r--arch/mips/emma2rh/common/irq.c1
-rw-r--r--arch/mips/emma2rh/common/prom.c1
-rw-r--r--arch/mips/emma2rh/markeins/platform.c1
-rw-r--r--arch/mips/include/asm/cevt-r4k.h46
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h41
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h6
-rw-r--r--arch/mips/include/asm/mach-ip22/ds1286.h18
-rw-r--r--arch/mips/include/asm/mach-ip28/ds1286.h4
-rw-r--r--arch/mips/include/asm/spinlock.h2
-rw-r--r--arch/mips/kernel/proc.c2
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
-rw-r--r--arch/mips/pci/fixup-emma2rh.c1
-rw-r--r--arch/mips/pci/ops-pnx8550.c2
-rw-r--r--arch/mips/pci/pci-emma2rh.c1
-rw-r--r--arch/mips/pci/pci.c80
-rw-r--r--arch/mips/rb532/time.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-platform.c15
-rw-r--r--arch/mips/sgi-ip22/ip22-setup.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c64
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c99
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c16
-rw-r--r--arch/mips/sgi-ip32/ip32-setup.c5
26 files changed, 256 insertions, 284 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cd5fbf6f078..b905744d791 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -52,6 +52,7 @@ config BCM47XX
select SSB
select SSB_DRIVER_MIPS
select SSB_DRIVER_EXTIF
+ select SSB_EMBEDDED
select SSB_PCICORE_HOSTMODE if PCI
select GENERIC_GPIO
select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index f5a53acf995..9b798800258 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -12,68 +12,51 @@
#include <asm/mach-bcm47xx/bcm47xx.h>
#include <asm/mach-bcm47xx/gpio.h>
-int bcm47xx_gpio_to_irq(unsigned gpio)
+#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
+static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
+#else
+static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
+#endif
+
+int gpio_request(unsigned gpio, const char *tag)
{
- if (ssb_bcm47xx.chipco.dev)
- return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
- else if (ssb_bcm47xx.extif.dev)
- return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
- else
+ if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
+ ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
return -EINVAL;
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
-int bcm47xx_gpio_get_value(unsigned gpio)
-{
- if (ssb_bcm47xx.chipco.dev)
- return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
- else if (ssb_bcm47xx.extif.dev)
- return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
- else
- return 0;
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
+ if (ssb_extif_available(&ssb_bcm47xx.extif) &&
+ ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+ return -EINVAL;
-void bcm47xx_gpio_set_value(unsigned gpio, int value)
-{
- if (ssb_bcm47xx.chipco.dev)
- ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
- 1 << gpio,
- value ? 1 << gpio : 0);
- else if (ssb_bcm47xx.extif.dev)
- ssb_extif_gpio_out(&ssb_bcm47xx.extif,
- 1 << gpio,
- value ? 1 << gpio : 0);
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
+ if (test_and_set_bit(gpio, gpio_in_use))
+ return -EBUSY;
-int bcm47xx_gpio_direction_input(unsigned gpio)
-{
- if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
- ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
- 1 << gpio, 0);
- else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
- ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
- 1 << gpio, 0);
- else
- return -EINVAL;
return 0;
}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input);
+EXPORT_SYMBOL(gpio_request);
-int bcm47xx_gpio_direction_output(unsigned gpio, int value)
+void gpio_free(unsigned gpio)
{
- bcm47xx_gpio_set_value(gpio, value);
+ if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
+ ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+ return;
+
+ if (ssb_extif_available(&ssb_bcm47xx.extif) &&
+ ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+ return;
+
+ clear_bit(gpio, gpio_in_use);
+}
+EXPORT_SYMBOL(gpio_free);
- if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
- ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
- 1 << gpio, 1 << gpio);
- else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
- ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
- 1 << gpio, 1 << gpio);
+int gpio_to_irq(unsigned gpio)
+{
+ if (ssb_chipco_available(&ssb_bcm47xx.chipco))
+ return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
+ else if (ssb_extif_available(&ssb_bcm47xx.extif))
+ return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
else
return -EINVAL;
- return 0;
}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output);
+EXPORT_SYMBOL_GPL(gpio_to_irq);
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 8d36f186890..2f580fa160c 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -27,6 +27,7 @@
#include <linux/types.h>
#include <linux/ssb/ssb.h>
+#include <linux/ssb/ssb_embedded.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
printk(KERN_ALERT "Please stand by while rebooting the system...\n");
local_irq_disable();
/* Set the watchdog timer to reset immediately */
- ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
+ ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
while (1)
cpu_relax();
}
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
{
/* Disable interrupts and watchdog and spin forever */
local_irq_disable();
- ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
+ ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
while (1)
cpu_relax();
}
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index d1d90c9ef2f..ef00e7f58c2 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -11,6 +11,9 @@
#include <linux/leds.h>
#include <linux/mtd/physmap.h>
#include <linux/ssb/ssb.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include <linux/gpio.h>
#include <asm/mach-bcm47xx/bcm47xx.h>
/* GPIO definitions for the WGT634U */
@@ -99,6 +102,30 @@ static struct platform_device *wgt634u_devices[] __initdata = {
&wgt634u_gpio_leds,
};
+static irqreturn_t gpio_interrupt(int irq, void *ignored)
+{
+ int state;
+
+ /* Interrupts are shared, check if the current one is
+ a GPIO interrupt. */
+ if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
+ SSB_CHIPCO_IRQ_GPIO))
+ return IRQ_NONE;
+
+ state = gpio_get_value(WGT634U_GPIO_RESET);
+
+ /* Interrupt are level triggered, revert the interrupt polarity
+ to clear the interrupt. */
+ gpio_polarity(WGT634U_GPIO_RESET, state);
+
+ if (!state) {
+ printk(KERN_INFO "Reset button pressed");
+ ctrl_alt_del();
+ }
+
+ return IRQ_HANDLED;
+}
+
static int __init wgt634u_init(void)
{
/* There is no easy way to detect that we are running on a WGT634U
@@ -112,6 +139,19 @@ static int __init wgt634u_init(void)
((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
(et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+
+ printk(KERN_INFO "WGT634U machine detected.\n");
+
+ if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
+ gpio_interrupt, IRQF_SHARED,
+ "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
+ gpio_direction_input(WGT634U_GPIO_RESET);
+ gpio_intmask(WGT634U_GPIO_RESET, 1);
+ ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
+ SSB_CHIPCO_IRQ_GPIO,
+ SSB_CHIPCO_IRQ_GPIO);
+ }
+
wgt634u_flash_data.width = mcore->flash_buswidth;
wgt634u_flash_resource.start = mcore->flash_window;
wgt634u_flash_resource.end = mcore->flash_window
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
index d9560477366..91cbd959ab6 100644
--- a/arch/mips/emma2rh/common/irq.c
+++ b/arch/mips/emma2rh/common/irq.c
@@ -29,7 +29,6 @@
#include <asm/system.h>
#include <asm/mipsregs.h>
-#include <asm/debug.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index 5e92b3a9c5b..e14a2e3d884 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -30,7 +30,6 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/emma2rh/emma2rh.h>
-#include <asm/debug.h>
const char *get_system_type(void)
{
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
index d70627de7cf..fb9cda253ab 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -35,7 +35,6 @@
#include <asm/irq.h>
#include <asm/reboot.h>
#include <asm/traps.h>
-#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
new file mode 100644
index 00000000000..fa4328f9124
--- /dev/null
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Kevin D. Kissell
+ */
+
+/*
+ * Definitions used for common event timer implementation
+ * for MIPS 4K-type processors and their MIPS MT variants.
+ * Avoids unsightly extern declarations in C files.
+ */
+#ifndef __ASM_CEVT_R4K_H
+#define __ASM_CEVT_R4K_H
+
+DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
+
+void mips_event_handler(struct clock_event_device *dev);
+int c0_compare_int_usable(void);
+void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
+irqreturn_t c0_compare_interrupt(int, void *);
+
+extern struct irqaction c0_compare_irqaction;
+extern int cp0_timer_irq_installed;
+
+/*
+ * Possibly handle a performance counter interrupt.
+ * Return true if the timer interrupt should not be checked
+ */
+
+static inline int handle_perf_irq(int r2)
+{
+ /*
+ * The performance counter overflow interrupt may be shared with the
+ * timer interrupt (cp0_perfcount_irq < 0). If it is and a
+ * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
+ * and we can't reliably determine if a counter interrupt has also
+ * happened (!r2) then don't check for a timer interrupt.
+ */
+ return (cp0_perfcount_irq < 0) &&
+ perf_irq() == IRQ_HANDLED &&
+ !r2;
+}
+
+#endif /* __ASM_CEVT_R4K_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index cfc8f4d618c..d8ff4cd89ab 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -9,47 +9,46 @@
#ifndef __BCM47XX_GPIO_H
#define __BCM47XX_GPIO_H
+#include <linux/ssb/ssb_embedded.h>
+#include <asm/mach-bcm47xx/bcm47xx.h>
+
#define BCM47XX_EXTIF_GPIO_LINES 5
#define BCM47XX_CHIPCO_GPIO_LINES 16
-extern int bcm47xx_gpio_to_irq(unsigned gpio);
-extern int bcm47xx_gpio_get_value(unsigned gpio);
-extern void bcm47xx_gpio_set_value(unsigned gpio, int value);
-extern int bcm47xx_gpio_direction_input(unsigned gpio);
-extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
- return 0;
-}
+extern int gpio_request(unsigned gpio, const char *label);
+extern void gpio_free(unsigned gpio);
+extern int gpio_to_irq(unsigned gpio);
-static inline void gpio_free(unsigned gpio)
+static inline int gpio_get_value(unsigned gpio)
{
+ return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
}
-static inline int gpio_to_irq(unsigned gpio)
+static inline void gpio_set_value(unsigned gpio, int value)
{
- return bcm47xx_gpio_to_irq(gpio);
+ ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
}
-static inline int gpio_get_value(unsigned gpio)
+static inline int gpio_direction_input(unsigned gpio)
{
- return bcm47xx_gpio_get_value(gpio);
+ return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
}
-static inline void gpio_set_value(unsigned gpio, int value)
+static inline int gpio_direction_output(unsigned gpio, int value)
{
- bcm47xx_gpio_set_value(gpio, value);
+ return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
}
-static inline int gpio_direction_input(unsigned gpio)
+static int gpio_intmask(unsigned gpio, int value)
{
- return bcm47xx_gpio_direction_input(gpio);
+ return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
+ value ? 1 << gpio : 0);
}
-static inline int gpio_direction_output(unsigned gpio, int value)
+static int gpio_polarity(unsigned gpio, int value)
{
- return bcm47xx_gpio_direction_output(gpio, value);
+ return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
+ value ? 1 << gpio : 0);
}
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
index 4a2b7986b58..87cd4651dda 100644
--- a/arch/mips/include/asm/mach-bcm47xx/war.h
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -5,8 +5,8 @@
*
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
*/
-#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
-#define __ASM_MIPS_MACH_BCM947XX_WAR_H
+#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
+#define __ASM_MIPS_MACH_BCM47XX_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
-#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */
+#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-ip22/ds1286.h b/arch/mips/include/asm/mach-ip22/ds1286.h
deleted file mode 100644
index f19f1eafbc7..00000000000
--- a/arch/mips/include/asm/mach-ip22/ds1286.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 2001, 03 by Ralf Baechle
- *
- * RTC routines for PC style attached Dallas chip.
- */
-#ifndef __ASM_MACH_IP22_DS1286_H
-#define __ASM_MACH_IP22_DS1286_H
-
-#include <asm/sgi/hpc3.h>
-
-#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff)
-#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
-
-#endif /* __ASM_MACH_IP22_DS1286_H */
diff --git a/arch/mips/include/asm/mach-ip28/ds1286.h b/arch/mips/include/asm/mach-ip28/ds1286.h
deleted file mode 100644
index 471bb9a33e0..00000000000
--- a/arch/mips/include/asm/mach-ip28/ds1286.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef __ASM_MACH_IP28_DS1286_H
-#define __ASM_MACH_IP28_DS1286_H
-#include <asm/mach-ip22/ds1286.h>
-#endif /* __ASM_MACH_IP28_DS1286_H */
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 5d98a3cb85b..1a1f320c30d 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -147,7 +147,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
" ori %[ticket], %[ticket], 0x2000 \n"
" xori %[ticket], %[ticket], 0x2000 \n"
" sc %[ticket], %[ticket_ptr] \n"
- " beqzl %[ticket], 2f \n"
+ " beqzl %[ticket], 1b \n"
: [ticket_ptr] "+m" (lock->lock),
[ticket] "=&r" (tmp));
} else {
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 75bb1300dd7..26760cad8b6 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "processor\t\t: %ld\n", n);
sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
- seq_printf(m, fmt, __cpu_name[smp_processor_id()],
+ seq_printf(m, fmt, __cpu_name[n],
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index afb119f3568..58738c8d754 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -104,7 +104,7 @@ SECTIONS
. = ALIGN(_PAGE_SIZE);
__nosave_end = .;
- . = ALIGN(32);
+ . = ALIGN(1 << CONFIG_MIPS_L1_CACHE_SHIFT);
.data.cacheline_aligned : {
*(.data.cacheline_aligned)
}
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
index a2705895561..846eae9cdd0 100644
--- a/arch/mips/pci/fixup-emma2rh.c
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -29,7 +29,6 @@
#include <linux/pci.h>
#include <asm/bootinfo.h>
-#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
diff --git a/arch/mips/pci/ops-pnx8550.c b/arch/mips/pci/ops-pnx8550.c
index 0e160d9f07c..1e6213fa7bd 100644
--- a/arch/mips/pci/ops-pnx8550.c
+++ b/arch/mips/pci/ops-pnx8550.c
@@ -29,8 +29,6 @@
#include <asm/mach-pnx8550/pci.h>
#include <asm/mach-pnx8550/glb.h>
-#include <asm/debug.h>
-
static inline void clear_status(void)
{
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
index d99591a0cdf..772e283daa6 100644
--- a/arch/mips/pci/pci-emma2rh.c
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -29,7 +29,6 @@
#include <linux/pci.h>
#include <asm/bootinfo.h>
-#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index c7fe6ec621e..a377e9d2d02 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -34,6 +34,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
unsigned long PCIBIOS_MIN_IO = 0x0000;
unsigned long PCIBIOS_MIN_MEM = 0;
+static int pci_initialized;
+
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@@ -74,6 +76,42 @@ pcibios_align_resource(void *data, struct resource *res,
res->start = start;
}
+static void __devinit pcibios_scanbus(struct pci_controller *hose)
+{
+ static int next_busno;
+ static int need_domain_info;
+ struct pci_bus *bus;
+
+ if (!hose->iommu)
+ PCI_DMA_BUS_IS_PHYS = 1;
+
+ if (hose->get_busno && pci_probe_only)
+ next_busno = (*hose->get_busno)();
+
+ bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+ hose->bus = bus;
+
+ need_domain_info = need_domain_info || hose->index;
+ hose->need_domain_info = need_domain_info;
+ if (bus) {
+ next_busno = bus->subordinate + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
+ }
+
+ if (!pci_probe_only) {
+ pci_bus_size_bridges(bus);
+ pci_bus_assign_resources(bus);
+ pci_enable_bridges(bus);
+ }
+ }
+}
+
+static DEFINE_MUTEX(pci_scan_mutex);
+
void __devinit register_pci_controller(struct pci_controller *hose)
{
if (request_resource(&iomem_resource, hose->mem_resource) < 0)
@@ -93,6 +131,17 @@ void __devinit register_pci_controller(struct pci_controller *hose)
printk(KERN_WARNING
"registering PCI controller with io_map_base unset\n");
}
+
+ /*
+ * Scan the bus if it is register after the PCI subsystem
+ * initialization.
+ */
+ if (pci_initialized) {
+ mutex_lock(&pci_scan_mutex);
+ pcibios_scanbus(hose);
+ mutex_unlock(&pci_scan_mutex);
+ }
+
return;
out:
@@ -125,38 +174,15 @@ static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
static int __init pcibios_init(void)
{
struct pci_controller *hose;
- struct pci_bus *bus;
- int next_busno;
- int need_domain_info = 0;
/* Scan all of the recorded PCI controllers. */
- for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
-
- if (!hose->iommu)
- PCI_DMA_BUS_IS_PHYS = 1;
-
- if (hose->get_busno && pci_probe_only)
- next_busno = (*hose->get_busno)();
-
- bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
- hose->bus = bus;
- need_domain_info = need_domain_info || hose->index;
- hose->need_domain_info = need_domain_info;
- if (bus) {
- next_busno = bus->subordinate + 1;
- /* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
- if (next_busno > 224) {
- next_busno = 0;
- need_domain_info = 1;
- }
- }
- }
+ for (hose = hose_head; hose; hose = hose->next)
+ pcibios_scanbus(hose);
- if (!pci_probe_only)
- pci_assign_unassigned_resources();
pci_fixup_irqs(common_swizzle, pcibios_map_irq);
+ pci_initialized = 1;
+
return 0;
}
diff --git a/arch/mips/rb532/time.c b/arch/mips/rb532/time.c
index 8e7a46855b5..1377d599f0e 100644
--- a/arch/mips/rb532/time.c
+++ b/arch/mips/rb532/time.c
@@ -28,7 +28,6 @@
#include <linux/timex.h>
#include <asm/mipsregs.h>
-#include <asm/debug.h>
#include <asm/time.h>
#include <asm/mach-rc32434/rc32434.h>
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c
index 52486c4d2b0..deddbf0ebe5 100644
--- a/arch/mips/sgi-ip22/ip22-platform.c
+++ b/arch/mips/sgi-ip22/ip22-platform.c
@@ -192,3 +192,18 @@ static int __init sgi_button_devinit(void)
}
device_initcall(sgi_button_devinit);
+
+static int __init sgi_ds1286_devinit(void)
+{
+ struct resource res;
+
+ memset(&res, 0, sizeof(res));
+ res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs);
+ res.end = res.start + sizeof(hpc3c0->rtcregs) - 1;
+ res.flags = IORESOURCE_MEM;
+
+ return IS_ERR(platform_device_register_simple("rtc-ds1286", -1,
+ &res, 1));
+}
+
+device_initcall(sgi_ds1286_devinit);
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 896a1ef8482..b9a931358e2 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -4,7 +4,6 @@
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
*/
-#include <linux/ds1286.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/kdev_t.h>
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 10e50549165..3dcb27ec0c5 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -10,7 +10,6 @@
* Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/bcd.h>
-#include <linux/ds1286.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel.h>
@@ -29,69 +28,6 @@
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>
-/*
- * Note that mktime uses month from 1 to 12 while rtc_time_to_tm
- * uses 0 to 11.
- */
-unsigned long read_persistent_clock(void)
-{
- unsigned int yrs, mon, day, hrs, min, sec;
- unsigned int save_control;
- unsigned long flags;
-
- spin_lock_irqsave(&rtc_lock, flags);
- save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
- hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
-
- sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
- min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
- hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
- day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
- mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
- yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
-
- hpc3c0->rtcregs[RTC_CMD] = save_control;
- spin_unlock_irqrestore(&rtc_lock, flags);
-
- if (yrs < 45)
- yrs += 30;
- if ((yrs += 40) < 70)
- yrs += 100;
-
- return mktime(yrs + 1900, mon, day, hrs, min, sec);
-}
-
-int rtc_mips_set_time(unsigned long tim)
-{
- struct rtc_time tm;
- unsigned int save_control;
- unsigned long flags;
-
- rtc_time_to_tm(tim, &tm);
-
- tm.tm_mon += 1; /* tm_mon starts at zero */
- tm.tm_year -= 40;
- if (tm.tm_year >= 100)
- tm.tm_year -= 100;
-
- spin_lock_irqsave(&rtc_lock, flags);
- save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
- hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
-
- hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_year);
- hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
- hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
- hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
- hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
- hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
- hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
-
- hpc3c0->rtcregs[RTC_CMD] = save_control;
- spin_unlock_irqrestore(&rtc_lock, flags);
-
- return 0;
-}
-
static unsigned long dosample(void)
{
u32 ct0, ct1;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 8b4e854af92..1327c2746fb 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -13,12 +13,12 @@
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/mm.h>
+#include <linux/platform_device.h>
#include <asm/time.h>
#include <asm/pgtable.h>
#include <asm/sgialib.h>
#include <asm/sn/ioc3.h>
-#include <asm/m48t35.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/arch.h>
#include <asm/sn/addrs.h>
@@ -28,51 +28,6 @@
#define TICK_SIZE (tick_nsec / 1000)
-#if 0
-static int set_rtc_mmss(unsigned long nowtime)
-{
- int retval = 0;
- int real_seconds, real_minutes, cmos_minutes;
- struct m48t35_rtc *rtc;
- nasid_t nid;
-
- nid = get_nasid();
- rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
- IOC3_BYTEBUS_DEV0);
-
- rtc->control |= M48T35_RTC_READ;
- cmos_minutes = BCD2BIN(rtc->min);
- rtc->control &= ~M48T35_RTC_READ;
-
- /*
- * Since we're only adjusting minutes and seconds, don't interfere with
- * hour overflow. This avoids messing with unknown time zones but
- * requires your RTC not to be off by more than 15 minutes
- */
- real_seconds = nowtime % 60;
- real_minutes = nowtime / 60;
- if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
- real_minutes += 30; /* correct for half hour time zone */
- real_minutes %= 60;
-
- if (abs(real_minutes - cmos_minutes) < 30) {
- real_seconds = BIN2BCD(real_seconds);
- real_minutes = BIN2BCD(real_minutes);
- rtc->control |= M48T35_RTC_SET;
- rtc->sec = real_seconds;
- rtc->min = real_minutes;
- rtc->control &= ~M48T35_RTC_SET;
- } else {
- printk(KERN_WARNING
- "set_rtc_mmss: can't update from %d to %d\n",
- cmos_minutes, real_minutes);
- retval = -1;
- }
-
- return retval;
-}
-#endif
-
/* Includes for ioc3_init(). */
#include <asm/sn/types.h>
#include <asm/sn/sn0/addrs.h>
@@ -80,37 +35,6 @@ static int set_rtc_mmss(unsigned long nowtime)
#include <asm/sn/sn0/hubio.h>
#include <asm/pci/bridge.h>
-unsigned long read_persistent_clock(void)
-{
- unsigned int year, month, date, hour, min, sec;
- struct m48t35_rtc *rtc;
- nasid_t nid;
-
- nid = get_nasid();
- rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
- IOC3_BYTEBUS_DEV0);
-
- rtc->control |= M48T35_RTC_READ;
- sec = rtc->sec;
- min = rtc->min;
- hour = rtc->hour;
- date = rtc->date;
- month = rtc->month;
- year = rtc->year;
- rtc->control &= ~M48T35_RTC_READ;
-
- sec = BCD2BIN(sec);
- min = BCD2BIN(min);
- hour = BCD2BIN(hour);
- date = BCD2BIN(date);
- month = BCD2BIN(month);
- year = BCD2BIN(year);
-
- year += 1970;
-
- return mktime(year, month, date, hour, min, sec);
-}
-
static void enable_rt_irq(unsigned int irq)
{
}
@@ -286,6 +210,7 @@ void __cpuinit cpu_time_init(void)
void __cpuinit hub_rtc_init(cnodeid_t cnode)
{
+
/*
* We only need to initialize the current node.
* If this is not the current node then it is a cpuless
@@ -301,3 +226,23 @@ void __cpuinit hub_rtc_init(cnodeid_t cnode)
LOCAL_HUB_S(PI_RT_PEND_B, 0);
}
}
+
+static int __init sgi_ip27_rtc_devinit(void)
+{
+ struct resource res;
+
+ memset(&res, 0, sizeof(res));
+ res.start = XPHYSADDR(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base +
+ IOC3_BYTEBUS_DEV0);
+ res.end = res.start + 32767;
+ res.flags = IORESOURCE_MEM;
+
+ return IS_ERR(platform_device_register_simple("rtc-m48t35", -1,
+ &res, 1));
+}
+
+/*
+ * kludge make this a device_initcall after ioc3 resource conflicts
+ * are resolved
+ */
+late_initcall(sgi_ip27_rtc_devinit);
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 3d63721e0e8..511e9ff2acf 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -90,6 +90,22 @@ static __init int sgio2btns_devinit(void)
device_initcall(sgio2btns_devinit);
+static struct resource sgio2_cmos_rsrc[] = {
+ {
+ .start = 0x70,
+ .end = 0x71,
+ .flags = IORESOURCE_IO
+ }
+};
+
+static __init int sgio2_cmos_devinit(void)
+{
+ return IS_ERR(platform_device_register_simple("rtc_cmos", -1,
+ sgio2_cmos_rsrc, 1));
+}
+
+device_initcall(sgio2_cmos_devinit);
+
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 1024bf40bd9..c5a5d4a31b4 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -62,11 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
}
#endif
-unsigned long read_persistent_clock(void)
-{
- return mc146818_get_cmos_time();
-}
-
/* An arbitrary time; this can be decreased if reliability looks good */
#define WAIT_MS 10