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Diffstat (limited to 'arch/powerpc/platforms/chrp')
-rw-r--r--arch/powerpc/platforms/chrp/nvram.c5
-rw-r--r--arch/powerpc/platforms/chrp/pci.c53
-rw-r--r--arch/powerpc/platforms/chrp/setup.c48
3 files changed, 81 insertions, 25 deletions
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c
index 150f67d6f90..0dd4a64757d 100644
--- a/arch/powerpc/platforms/chrp/nvram.c
+++ b/arch/powerpc/platforms/chrp/nvram.c
@@ -67,13 +67,14 @@ static void chrp_nvram_write(int addr, unsigned char val)
void __init chrp_nvram_init(void)
{
struct device_node *nvram;
- unsigned int *nbytes_p, proplen;
+ const unsigned int *nbytes_p;
+ unsigned int proplen;
nvram = of_find_node_by_type(NULL, "nvram");
if (nvram == NULL)
return;
- nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
+ nbytes_p = get_property(nvram, "#bytes", &proplen);
if (nbytes_p == NULL || proplen != sizeof(unsigned int))
return;
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 6802cdc3168..0f4340506c7 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -214,11 +214,11 @@ void __init
chrp_find_bridges(void)
{
struct device_node *dev;
- int *bus_range;
+ const int *bus_range;
int len, index = -1;
struct pci_controller *hose;
- unsigned int *dma;
- char *model, *machine;
+ const unsigned int *dma;
+ const char *model, *machine;
int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
struct device_node *root = find_path_device("/");
struct resource r;
@@ -246,7 +246,7 @@ chrp_find_bridges(void)
dev->full_name);
continue;
}
- bus_range = (int *) get_property(dev, "bus-range", &len);
+ bus_range = get_property(dev, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
printk(KERN_WARNING "Can't get bus-range for %s\n",
dev->full_name);
@@ -257,7 +257,7 @@ chrp_find_bridges(void)
else
printk(KERN_INFO "PCI buses %d..%d",
bus_range[0], bus_range[1]);
- printk(" controlled by %s", dev->type);
+ printk(" controlled by %s", dev->full_name);
if (!is_longtrail)
printk(" at %llx", (unsigned long long)r.start);
printk("\n");
@@ -289,6 +289,19 @@ chrp_find_bridges(void)
setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
} else if (is_pegasos == 2) {
setup_peg2(hose, dev);
+ } else if (!strncmp(model, "IBM,CPC710", 10)) {
+ setup_indirect_pci(hose,
+ r.start + 0x000f8000,
+ r.start + 0x000f8010);
+ if (index == 0) {
+ dma = get_property(dev, "system-dma-base",&len);
+ if (dma && len >= sizeof(*dma)) {
+ dma = (unsigned int *)
+ (((unsigned long)dma) +
+ len - sizeof(*dma));
+ pci_dram_offset = *dma;
+ }
+ }
} else {
printk("No methods for %s (model %s), using RTAS\n",
dev->full_name, model);
@@ -299,15 +312,35 @@ chrp_find_bridges(void)
/* check the first bridge for a property that we can
use to set pci_dram_offset */
- dma = (unsigned int *)
- get_property(dev, "ibm,dma-ranges", &len);
+ dma = get_property(dev, "ibm,dma-ranges", &len);
if (index == 0 && dma != NULL && len >= 6 * sizeof(*dma)) {
pci_dram_offset = dma[2] - dma[3];
printk("pci_dram_offset = %lx\n", pci_dram_offset);
}
}
+}
+
+/* SL82C105 IDE Control/Status Register */
+#define SL82C105_IDECSR 0x40
+
+/* Fixup for Winbond ATA quirk, required for briq */
+void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
+{
+ u8 progif;
- /* Do not fixup interrupts from OF tree on pegasos */
- if (is_pegasos)
- ppc_md.pcibios_fixup = NULL;
+ /* If non-briq machines need that fixup too, please speak up */
+ if (!machine_is(chrp) || _chrp_type != _CHRP_briq)
+ return;
+
+ if ((sl82c105->class & 5) != 5) {
+ printk("W83C553: Switching SL82C105 IDE to PCI native mode\n");
+ /* Enable SL82C105 PCI native IDE mode */
+ pci_read_config_byte(sl82c105, PCI_CLASS_PROG, &progif);
+ pci_write_config_byte(sl82c105, PCI_CLASS_PROG, progif | 0x05);
+ sl82c105->class |= 0x05;
+ /* Disable SL82C105 second port */
+ pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003);
+ }
}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
+ chrp_pci_fixup_winbond_ata);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 9c08ff32229..488dbd9b51a 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -74,6 +74,9 @@ extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
extern unsigned long loops_per_jiffy;
+/* To be replaced by RTAS when available */
+static unsigned int *briq_SPOR;
+
#ifdef CONFIG_SMP
extern struct smp_ops_t chrp_smp_ops;
#endif
@@ -92,6 +95,15 @@ static const char *gg2_cachemodes[4] = {
"Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
};
+static const char *chrp_names[] = {
+ "Unknown",
+ "","","",
+ "Motorola",
+ "IBM or Longtrail",
+ "Genesi Pegasos",
+ "Total Impact Briq"
+};
+
void chrp_show_cpuinfo(struct seq_file *m)
{
int i, sdramen;
@@ -214,8 +226,7 @@ static void __init pegasos_set_l2cr(void)
/* Enable L2 cache if needed */
np = find_type_devices("cpu");
if (np != NULL) {
- unsigned int *l2cr = (unsigned int *)
- get_property (np, "l2cr", NULL);
+ const unsigned int *l2cr = get_property(np, "l2cr", NULL);
if (l2cr == NULL) {
printk ("Pegasos l2cr : no cpu l2cr property found\n");
return;
@@ -229,10 +240,18 @@ static void __init pegasos_set_l2cr(void)
}
}
+static void briq_restart(char *cmd)
+{
+ local_irq_disable();
+ if (briq_SPOR)
+ out_be32(briq_SPOR, 0);
+ for(;;);
+}
+
void __init chrp_setup_arch(void)
{
struct device_node *root = find_path_device ("/");
- char *machine = NULL;
+ const char *machine = NULL;
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000/HZ;
@@ -245,11 +264,16 @@ void __init chrp_setup_arch(void)
_chrp_type = _CHRP_IBM;
} else if (machine && strncmp(machine, "MOT", 3) == 0) {
_chrp_type = _CHRP_Motorola;
+ } else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) {
+ _chrp_type = _CHRP_briq;
+ /* Map the SPOR register on briq and change the restart hook */
+ briq_SPOR = (unsigned int *)ioremap(0xff0000e8, 4);
+ ppc_md.restart = briq_restart;
} else {
/* Let's assume it is an IBM chrp if all else fails */
_chrp_type = _CHRP_IBM;
}
- printk("chrp type = %x\n", _chrp_type);
+ printk("chrp type = %x [%s]\n", _chrp_type, chrp_names[_chrp_type]);
rtas_initialize();
if (rtas_token("display-character") >= 0)
@@ -328,7 +352,7 @@ static void __init chrp_find_openpic(void)
struct device_node *np, *root;
int len, i, j;
int isu_size, idu_size;
- unsigned int *iranges, *opprop = NULL;
+ const unsigned int *iranges, *opprop = NULL;
int oplen = 0;
unsigned long opaddr;
int na = 1;
@@ -338,8 +362,7 @@ static void __init chrp_find_openpic(void)
return;
root = of_find_node_by_path("/");
if (root) {
- opprop = (unsigned int *) get_property
- (root, "platform-open-pic", &oplen);
+ opprop = get_property(root, "platform-open-pic", &oplen);
na = prom_n_addr_cells(root);
}
if (opprop && oplen >= na * sizeof(unsigned int)) {
@@ -356,7 +379,7 @@ static void __init chrp_find_openpic(void)
printk(KERN_INFO "OpenPIC at %lx\n", opaddr);
- iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
+ iranges = get_property(np, "interrupt-ranges", &len);
if (iranges == NULL)
len = 0; /* non-distributed mpic */
else
@@ -442,8 +465,8 @@ static void __init chrp_find_8259(void)
* from anyway
*/
for (np = find_devices("pci"); np != NULL; np = np->next) {
- unsigned int *addrp = (unsigned int *)
- get_property(np, "8259-interrupt-acknowledge", NULL);
+ const unsigned int *addrp = get_property(np,
+ "8259-interrupt-acknowledge", NULL);
if (addrp == NULL)
continue;
@@ -502,7 +525,7 @@ void __init
chrp_init2(void)
{
struct device_node *device;
- unsigned int *p = NULL;
+ const unsigned int *p = NULL;
#ifdef CONFIG_NVRAM
chrp_nvram_init();
@@ -520,8 +543,7 @@ chrp_init2(void)
*/
device = find_devices("rtas");
if (device)
- p = (unsigned int *) get_property
- (device, "rtas-event-scan-rate", NULL);
+ p = get_property(device, "rtas-event-scan-rate", NULL);
if (p && *p) {
/*
* Arrange to call chrp_event_scan at least *p times
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-09 07:22:58 +0000