diff options
Diffstat (limited to 'arch/ppc/platforms')
| -rw-r--r-- | arch/ppc/platforms/4xx/Kconfig | 10 | ||||
| -rw-r--r-- | arch/ppc/platforms/4xx/Makefile | 1 | ||||
| -rw-r--r-- | arch/ppc/platforms/4xx/taishan.c | 395 | ||||
| -rw-r--r-- | arch/ppc/platforms/4xx/taishan.h | 67 | ||||
| -rw-r--r-- | arch/ppc/platforms/Makefile | 1 | ||||
| -rw-r--r-- | arch/ppc/platforms/gemini.h | 165 | ||||
| -rw-r--r-- | arch/ppc/platforms/gemini_pci.c | 41 | ||||
| -rw-r--r-- | arch/ppc/platforms/gemini_prom.S | 90 | ||||
| -rw-r--r-- | arch/ppc/platforms/gemini_serial.h | 40 | ||||
| -rw-r--r-- | arch/ppc/platforms/gemini_setup.c | 577 | ||||
| -rw-r--r-- | arch/ppc/platforms/lopec.c | 2 | ||||
| -rw-r--r-- | arch/ppc/platforms/mpc866ads_setup.c | 2 | ||||
| -rw-r--r-- | arch/ppc/platforms/pplus.c | 2 | ||||
| -rw-r--r-- | arch/ppc/platforms/prep_setup.c | 4 |
14 files changed, 476 insertions, 921 deletions
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig index 6980de420e9..705ae56016f 100644 --- a/arch/ppc/platforms/4xx/Kconfig +++ b/arch/ppc/platforms/4xx/Kconfig @@ -98,6 +98,12 @@ config OCOTEA help This option enables support for the IBM PPC440GX evaluation board. +config TAISHAN + bool "Taishan" + select WANT_EARLY_SERIAL + help + This option enables support for the AMCC PPC440GX evaluation board. + endchoice config EP405PC @@ -126,7 +132,7 @@ config 440GP config 440GX bool - depends on OCOTEA + depends on OCOTEA || TAISHAN default y config 440SP @@ -173,7 +179,7 @@ config BOOKE config IBM_OCP bool - depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT + depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT default y config IBM_EMAC4 diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile index a04a0d0a0f5..fa6610bccaf 100644 --- a/arch/ppc/platforms/4xx/Makefile +++ b/arch/ppc/platforms/4xx/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_OCOTEA) += ocotea.o obj-$(CONFIG_REDWOOD_5) += redwood5.o obj-$(CONFIG_REDWOOD_6) += redwood6.o obj-$(CONFIG_SYCAMORE) += sycamore.o +obj-$(CONFIG_TAISHAN) += taishan.o obj-$(CONFIG_WALNUT) += walnut.o obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c new file mode 100644 index 00000000000..bb0253eef45 --- /dev/null +++ b/arch/ppc/platforms/4xx/taishan.c @@ -0,0 +1,395 @@ +/* + * arch/ppc/platforms/4xx/taishan.c + * + * AMCC Taishan board specific routines + * + * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/stddef.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/reboot.h> +#include <linux/pci.h> +#include <linux/kdev_t.h> +#include <linux/types.h> +#include <linux/major.h> +#include <linux/blkdev.h> +#include <linux/console.h> +#include <linux/delay.h> +#include <linux/ide.h> +#include <linux/initrd.h> +#include <linux/seq_file.h> +#include <linux/root_dev.h> +#include <linux/tty.h> +#include <linux/serial.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/ndfc.h> +#include <linux/mtd/physmap.h> + +#include <asm/machdep.h> +#include <asm/ocp.h> +#include <asm/bootinfo.h> +#include <asm/ppcboot.h> + +#include <syslib/gen550.h> +#include <syslib/ibm440gx_common.h> + +extern bd_t __res; + +static struct ibm44x_clocks clocks __initdata; + +/* + * NOR FLASH configuration (using mtd physmap driver) + */ + +/* start will be added dynamically, end is always fixed */ +static struct resource taishan_nor_resource = { + .start = TAISHAN_FLASH_ADDR, + .end = 0x1ffffffffULL, + .flags = IORESOURCE_MEM, +}; + +#define RW_PART0_OF 0 +#define RW_PART0_SZ 0x180000 +#define RW_PART1_SZ 0x200000 +/* Partition 2 will be autosized dynamically... */ +#define RW_PART3_SZ 0x80000 +#define RW_PART4_SZ 0x40000 + +static struct mtd_partition taishan_nor_parts[] = { + { + .name = "kernel", + .offset = 0, + .size = RW_PART0_SZ + }, + { + .name = "root", + .offset = MTDPART_OFS_APPEND, + .size = RW_PART1_SZ, + }, + { + .name = "user", + .offset = MTDPART_OFS_APPEND, +/* .size = RW_PART2_SZ */ /* will be adjusted dynamically */ + }, + { + .name = "env", + .offset = MTDPART_OFS_APPEND, + .size = RW_PART3_SZ, + }, + { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = RW_PART4_SZ, + } +}; + +static struct physmap_flash_data taishan_nor_data = { + .width = 4, + .parts = taishan_nor_parts, + .nr_parts = ARRAY_SIZE(taishan_nor_parts), +}; + +static struct platform_device taishan_nor_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &taishan_nor_data, + }, + .num_resources = 1, + .resource = &taishan_nor_resource, +}; + +static int taishan_setup_flash(void) +{ + /* + * Adjust partition 2 to flash size + */ + taishan_nor_parts[2].size = __res.bi_flashsize - + RW_PART0_SZ - RW_PART1_SZ - RW_PART3_SZ - RW_PART4_SZ; + + platform_device_register(&taishan_nor_device); + + return 0; +} +arch_initcall(taishan_setup_flash); + +static void __init +taishan_calibrate_decr(void) +{ + unsigned int freq; + + if (mfspr(SPRN_CCR1) & CCR1_TCS) + freq = TAISHAN_TMR_CLK; + else + freq = clocks.cpu; + + ibm44x_calibrate_decr(freq); +} + +static int +taishan_show_cpuinfo(struct seq_file *m) +{ + seq_printf(m, "vendor\t\t: AMCC\n"); + seq_printf(m, "machine\t\t: PPC440GX EVB (Taishan)\n"); + ibm440gx_show_cpuinfo(m); + return 0; +} + +static inline int +taishan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 23, 24, 25, 26 }, /* IDSEL 1 - PCI Slot 0 */ + { 24, 25, 26, 23 }, /* IDSEL 2 - PCI Slot 1 */ + }; + + const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; +} + +static void __init taishan_set_emacdata(void) +{ + struct ocp_def *def; + struct ocp_func_emac_data *emacdata; + int i; + + /* Set phy_map, phy_mode, and mac_addr for each EMAC */ + for (i=2; i<4; i++) { + def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); + emacdata = def->additions; + if (i < 2) { + emacdata->phy_map = 0x00000001; /* Skip 0x00 */ + emacdata->phy_mode = PHY_MODE_SMII; + } else { + emacdata->phy_map = 0x00000001; /* Skip 0x00 */ + emacdata->phy_mode = PHY_MODE_RGMII; + } + if (i == 0) + memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); + else if (i == 1) + memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); + else if (i == 2) + memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); + else if (i == 3) + memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); + } +} + +#define PCIX_READW(offset) \ + (readw(pcix_reg_base+offset)) + +#define PCIX_WRITEW(value, offset) \ + (writew(value, pcix_reg_base+offset)) + +#define PCIX_WRITEL(value, offset) \ + (writel(value, pcix_reg_base+offset)) + +/* + * FIXME: This is only here to "make it work". This will move + * to a ibm_pcix.c which will contain a generic IBM PCIX bridge + * configuration library. -Matt + */ +static void __init +taishan_setup_pcix(void) +{ + void *pcix_reg_base; + + pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); + + /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ + PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); + + /* Disable all windows */ + PCIX_WRITEL(0, PCIX0_POM0SA); + PCIX_WRITEL(0, PCIX0_POM1SA); + PCIX_WRITEL(0, PCIX0_POM2SA); + PCIX_WRITEL(0, PCIX0_PIM0SA); + PCIX_WRITEL(0, PCIX0_PIM0SAH); + PCIX_WRITEL(0, PCIX0_PIM1SA); + PCIX_WRITEL(0, PCIX0_PIM2SA); + PCIX_WRITEL(0, PCIX0_PIM2SAH); + + /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */ + PCIX_WRITEL(0x00000003, PCIX0_POM0LAH); + PCIX_WRITEL(0x80000000, PCIX0_POM0LAL); + PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); + PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL); + PCIX_WRITEL(0x80000001, PCIX0_POM0SA); + + /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ + PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); + PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); + PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); + PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); + + iounmap(pcix_reg_base); + + eieio(); +} + +static void __init +taishan_setup_hose(void) +{ + struct pci_controller *hose; + + /* Configure windows on the PCI-X host bridge */ + taishan_setup_pcix(); + + hose = pcibios_alloc_controller(); + + if (!hose) + return; + + hose->first_busno = 0; + hose->last_busno = 0xff; + + hose->pci_mem_offset = TAISHAN_PCI_MEM_OFFSET; + + pci_init_resource(&hose->io_resource, + TAISHAN_PCI_LOWER_IO, + TAISHAN_PCI_UPPER_IO, + IORESOURCE_IO, + "PCI host bridge"); + + pci_init_resource(&hose->mem_resources[0], + TAISHAN_PCI_LOWER_MEM, + TAISHAN_PCI_UPPER_MEM, + IORESOURCE_MEM, + "PCI host bridge"); + + hose->io_space.start = TAISHAN_PCI_LOWER_IO; + hose->io_space.end = TAISHAN_PCI_UPPER_IO; + hose->mem_space.start = TAISHAN_PCI_LOWER_MEM; + hose->mem_space.end = TAISHAN_PCI_UPPER_MEM; + hose->io_base_virt = ioremap64(TAISHAN_PCI_IO_BASE, TAISHAN_PCI_IO_SIZE); + isa_io_base = (unsigned long) hose->io_base_virt; + + setup_indirect_pci(hose, + TAISHAN_PCI_CFGA_PLB32, + TAISHAN_PCI_CFGD_PLB32); + hose->set_cfg_type = 1; + + hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); + + ppc_md.pci_swizzle = common_swizzle; + ppc_md.pci_map_irq = taishan_map_irq; +} + + +static void __init +taishan_early_serial_map(void) +{ + struct uart_port port; + + /* Setup ioremapped serial port access */ + memset(&port, 0, sizeof(port)); + port.membase = ioremap64(PPC440GX_UART0_ADDR, 8); + port.irq = UART0_INT; + port.uartclk = clocks.uart0; + port.regshift = 0; + port.iotype = UPIO_MEM; + port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; + port.line = 0; + + if (early_serial_setup(&port) != 0) + printk("Early serial init of port 0 failed\n"); + +#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) + /* Configure debug serial access */ + gen550_init(0, &port); + + /* Purge TLB entry added in head_44x.S for early serial access */ + _tlbie(UART0_IO_BASE); +#endif + + port.membase = ioremap64(PPC440GX_UART1_ADDR, 8); + port.irq = UART1_INT; + port.uartclk = clocks.uart1; + port.line = 1; + + if (early_serial_setup(&port) != 0) + printk("Early serial init of port 1 failed\n"); + +#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) + /* Configure debug serial access */ + gen550_init(1, &port); +#endif +} + +static void __init +taishan_setup_arch(void) +{ + taishan_set_emacdata(); + + ibm440gx_tah_enable(); + + /* + * Determine various clocks. + * To be completely correct we should get SysClk + * from FPGA, because it can be changed by on-board switches + * --ebs + */ + ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); + ocp_sys_info.opb_bus_freq = clocks.opb; + + /* init to some ~sane value until calibrate_delay() runs */ + loops_per_jiffy = 50000000/HZ; + + /* Setup PCI host bridge */ + taishan_setup_hose(); + +#ifdef CONFIG_BLK_DEV_INITRD + if (initrd_start) + ROOT_DEV = Root_RAM0; + else +#endif +#ifdef CONFIG_ROOT_NFS + ROOT_DEV = Root_NFS; +#else + ROOT_DEV = Root_HDA1; +#endif + + taishan_early_serial_map(); + + /* Identify the system */ + printk("AMCC PowerPC 440GX Taishan Platform\n"); +} + +static void __init taishan_init(void) +{ + ibm440gx_l2c_setup(&clocks); +} + +void __init platform_init(unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, unsigned long r7) +{ + ibm44x_platform_init(r3, r4, r5, r6, r7); + + ppc_md.setup_arch = taishan_setup_arch; + ppc_md.show_cpuinfo = taishan_show_cpuinfo; + ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ + + ppc_md.calibrate_decr = taishan_calibrate_decr; + +#ifdef CONFIG_KGDB + ppc_md.early_serial_map = taishan_early_serial_map; +#endif + ppc_md.init = taishan_init; +} + diff --git a/arch/ppc/platforms/4xx/taishan.h b/arch/ppc/platforms/4xx/taishan.h new file mode 100644 index 00000000000..ea7561a8045 --- /dev/null +++ b/arch/ppc/platforms/4xx/taishan.h @@ -0,0 +1,67 @@ +/* + * arch/ppc/platforms/4xx/taishan.h + * + * AMCC Taishan board definitions + * + * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifdef __KERNEL__ +#ifndef __ASM_TAISHAN_H__ +#define __ASM_TAISHAN_H__ + +#include <platforms/4xx/ibm440gx.h> + +/* External timer clock frequency */ +#define TAISHAN_TMR_CLK 25000000 + +/* Flash */ +#define TAISHAN_FPGA_ADDR 0x0000000141000000ULL +#define TAISHAN_LCM_ADDR 0x0000000142000000ULL +#define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL +#define TAISHAN_FLASH_SIZE 0x4000000 + +/* + * Serial port defines + */ +#define RS_TABLE_SIZE 2 + +/* head_44x.S created UART mapping, used before early_serial_setup. + * We cannot use default OpenBIOS UART mappings because they + * don't work for configurations with more than 512M RAM. --ebs + */ +#define UART0_IO_BASE 0xF0000200 +#define UART1_IO_BASE 0xF0000300 + +#define BASE_BAUD 11059200/16 +#define STD_UART_OP(num) \ + { 0, BASE_BAUD, 0, UART##num##_INT, \ + (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ + iomem_base: (void*)UART##num##_IO_BASE, \ + io_type: SERIAL_IO_MEM}, + +#define SERIAL_PORT_DFNS \ + STD_UART_OP(0) \ + STD_UART_OP(1) + +/* PCI support */ +#define TAISHAN_PCI_LOWER_IO 0x00000000 +#define TAISHAN_PCI_UPPER_IO 0x0000ffff +#define TAISHAN_PCI_LOWER_MEM 0x80000000 +#define TAISHAN_PCI_UPPER_MEM 0xffffefff + +#define TAISHAN_PCI_CFGA_PLB32 0x0ec00000 +#define TAISHAN_PCI_CFGD_PLB32 0x0ec00004 + +#define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL +#define TAISHAN_PCI_IO_SIZE 0x00010000 +#define TAISHAN_PCI_MEM_OFFSET 0x00000000 + +#endif /* __ASM_TAISHAN_H__ */ +#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile index 90c62229442..e17fad47062 100644 --- a/arch/ppc/platforms/Makefile +++ b/arch/ppc/platforms/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_TQM8260) += tqm8260_setup.o obj-$(CONFIG_CPCI690) += cpci690.o obj-$(CONFIG_EV64260) += ev64260.o obj-$(CONFIG_CHESTNUT) += chestnut.o -obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o obj-$(CONFIG_LOPEC) += lopec.o obj-$(CONFIG_KATANA) += katana.o obj-$(CONFIG_HDPU) += hdpu.o diff --git a/arch/ppc/platforms/gemini.h b/arch/ppc/platforms/gemini.h deleted file mode 100644 index 5528fd0a121..00000000000 --- a/arch/ppc/platforms/gemini.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Onboard registers and descriptions for Synergy Microsystems' - * "Gemini" boards. - * - */ -#ifdef __KERNEL__ -#ifndef __PPC_GEMINI_H -#define __PPC_GEMINI_H - -/* Registers */ - -#define GEMINI_SERIAL_B (0xffeffb00) -#define GEMINI_SERIAL_A (0xffeffb08) -#define GEMINI_USWITCH (0xffeffd00) -#define GEMINI_BREV (0xffeffe00) -#define GEMINI_BECO (0xffeffe08) -#define GEMINI_FEAT (0xffeffe10) -#define GEMINI_BSTAT (0xffeffe18) -#define GEMINI_CPUSTAT (0xffeffe20) -#define GEMINI_L2CFG (0xffeffe30) -#define GEMINI_MEMCFG (0xffeffe38) -#define GEMINI_FLROM (0xffeffe40) -#define GEMINI_P0PCI (0xffeffe48) -#define GEMINI_FLWIN (0xffeffe50) -#define GEMINI_P0INTMASK (0xffeffe60) -#define GEMINI_P0INTAP (0xffeffe68) -#define GEMINI_PCIERR (0xffeffe70) -#define GEMINI_LEDBASE (0xffeffe80) -#define GEMINI_RTC (0xffe9fff8) -#define GEMINI_LEDS 8 -#define GEMINI_SWITCHES 8 - - -/* Flash ROM bit definitions */ -#define GEMINI_FLS_WEN (1<<0) -#define GEMINI_FLS_JMP (1<<6) -#define GEMINI_FLS_BOOT (1<<7) - -/* Memory bit definitions */ -#define GEMINI_MEM_TYPE_MASK 0xc0 -#define GEMINI_MEM_SIZE_MASK 0x38 -#define GEMINI_MEM_BANK_MASK 0x07 - -/* L2 cache bit definitions */ -#define GEMINI_L2_SIZE_MASK 0xc0 -#define GEMINI_L2_RATIO_MASK 0x03 - -/* Timebase register bit definitons */ -#define GEMINI_TIMEB0_EN (1<<0) -#define GEMINI_TIMEB1_EN (1<<1) -#define GEMINI_TIMEB2_EN (1<<2) -#define GEMINI_TIMEB3_EN (1<<3) - -/* CPU status bit definitions */ -#define GEMINI_CPU_ID_MASK 0x03 -#define GEMINI_CPU_COUNT_MASK 0x0c -#define GEMINI_CPU0_HALTED (1<<4) -#define GEMINI_CPU1_HALTED (1<<5) -#define GEMINI_CPU2_HALTED (1<<6) -#define GEMINI_CPU3_HALTED (1<<7) - -/* Board status bit definitions */ -#define GEMINI_BRD_FAIL (1<<0) /* FAIL led is lit */ -#define GEMINI_BRD_BUS_MASK 0x0c /* PowerPC bus speed */ - -/* Board family/feature bit descriptions */ -#define GEMINI_FEAT_HAS_FLASH (1<<0) -#define GEMINI_FEAT_HAS_ETH (1<<1) -#define GEMINI_FEAT_HAS_SCSI (1<<2) -#define GEMINI_FEAT_HAS_P0 (1<<3) -#define GEMINI_FEAT_FAM_MASK 0xf0 - -/* Mod/ECO bit definitions */ -#define GEMINI_ECO_LEVEL_MASK 0x0f -#define GEMINI_MOD_MASK 0xf0 - -/* Type/revision bit definitions */ -#define GEMINI_REV_MASK 0x0f -#define GEMINI_TYPE_MASK 0xf0 - -/* User switch definitions */ -#define GEMINI_SWITCH_VERBOSE 1 /* adds "debug" to boot cmd line */ -#define GEMINI_SWITCH_SINGLE_USER 7 /* boots into "single-user" mode */ - -#define SGS_RTC_CONTROL 0 -#define SGS_RTC_SECONDS 1 -#define SGS_RTC_MINUTES 2 -#define SGS_RTC_HOURS 3 -#define SGS_RTC_DAY 4 -#define SGS_RTC_DAY_OF_MONTH 5 -#define SGS_RTC_MONTH 6 -#define SGS_RTC_YEAR 7 - -#define SGS_RTC_SET 0x80 -#define SGS_RTC_IS_STOPPED 0x80 - -#define GRACKLE_CONFIG_ADDR_ADDR (0xfec00000) -#define GRACKLE_CONFIG_DATA_ADDR (0xfee00000) - -#define GEMINI_BOOT_INIT (0xfff00100) - -#ifndef __ASSEMBLY__ - -static inline void grackle_write( unsigned long addr, unsigned long data ) -{ - __asm__ __volatile__( - " stwbrx %1, 0, %0\n \ - sync\n \ - stwbrx %3, 0, %2\n \ - sync " - : /* no output */ - : "r" (GRACKLE_CONFIG_ADDR_ADDR), "r" (addr), - "r" (GRACKLE_CONFIG_DATA_ADDR), "r" (data)); -} - -static inline unsigned long grackle_read( unsigned long addr ) -{ - unsigned long val; - - __asm__ __volatile__( - " stwbrx %1, 0, %2\n \ - sync\n \ - lwbrx %0, 0, %3\n \ - sync " - : "=r" (val) - : "r" (addr), "r" (GRACKLE_CONFIG_ADDR_ADDR), - "r" (GRACKLE_CONFIG_DATA_ADDR)); - - return val; -} - -static inline void gemini_led_on( int led ) -{ - if (led >= 0 && led < GEMINI_LEDS) - *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 1; -} - -static inline void gemini_led_off(int led) -{ - if (led >= 0 && led < GEMINI_LEDS) - *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 0; -} - -static inline int gemini_led_val(int led) -{ - int val = 0; - if (led >= 0 && led < GEMINI_LEDS) - val = *(unsigned char *)(GEMINI_LEDBASE + (led<<3)); - return (val & 0x1); -} - -/* returns processor id from the board */ -static inline int gemini_processor(void) -{ - unsigned char cpu = *(unsigned char *)(GEMINI_CPUSTAT); - return (int) ((cpu == 0) ? 4 : (cpu & GEMINI_CPU_ID_MASK)); -} - - -extern void _gemini_reboot(void); -extern void gemini_prom_init(void); -extern void gemini_init_l2(void); -#endif /* __ASSEMBLY__ */ -#endif -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/gemini_pci.c b/arch/ppc/platforms/gemini_pci.c deleted file mode 100644 index 95656091ba2..00000000000 --- a/arch/ppc/platforms/gemini_pci.c +++ /dev/null @@ -1,41 +0,0 @@ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/pci.h> -#include <linux/slab.h> - -#include <asm/machdep.h> -#include <platforms/gemini.h> -#include <asm/byteorder.h> -#include <asm/io.h> -#include <asm/uaccess.h> -#include <asm/pci-bridge.h> - -void __init gemini_pcibios_fixup(void) -{ - int i; - struct pci_dev *dev = NULL; - - for_each_pci_dev(dev) { - for(i = 0; i < 6; i++) { - if (dev->resource[i].flags & IORESOURCE_IO) { - dev->resource[i].start |= (0xfe << 24); - dev->resource[i].end |= (0xfe << 24); - } - } - } -} - - -/* The "bootloader" for Synergy boards does none of this for us, so we need to - lay it all out ourselves... --Dan */ -void __init gemini_find_bridges(void) -{ - struct pci_controller* hose; - - ppc_md.pcibios_fixup = gemini_pcibios_fixup; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - setup_indirect_pci(hose, 0xfec00000, 0xfee00000); -} diff --git a/arch/ppc/platforms/gemini_prom.S b/arch/ppc/platforms/gemini_prom.S deleted file mode 100644 index e8c84d24f01..00000000000 --- a/arch/ppc/platforms/gemini_prom.S +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Not really prom support code (yet), but sort of anti-prom code. The current - * bootloader does a number of things it shouldn't and doesn't do things that it - * should. The stuff in here is mainly a hodge-podge collection of setup code - * to get the board up and running. - * ---Dan - */ - -#include <asm/reg.h> -#include <asm/page.h> -#include <platforms/gemini.h> -#include <asm/ppc_asm.h> - -/* - * On 750's the MMU is on when Linux is booted, so we need to clear out the - * bootloader's BAT settings, make sure we're in supervisor state (gotcha!), - * and turn off the MMU. - * - */ - -_GLOBAL(gemini_prom_init) -#ifdef CONFIG_SMP - /* Since the MMU's on, get stuff in rom space that we'll need */ - lis r4,GEMINI_CPUSTAT@h - ori r4,r4,GEMINI_CPUSTAT@l - lbz r5,0(r4) - andi. r5,r5,3 - mr r24,r5 /* cpu # used later on */ -#endif - mfmsr r4 - li r3,MSR_PR /* ensure supervisor! */ - ori r3,r3,MSR_IR|MSR_DR - andc r4,r4,r3 - mtmsr r4 - isync -#if 0 - /* zero out the bats now that the MMU is off */ -prom_no_mmu: - li r3,0 - mtspr SPRN_IBAT0U,r3 - mtspr SPRN_IBAT0L,r3 - mtspr SPRN_IBAT1U,r3 - mtspr SPRN_IBAT1L,r3 - mtspr SPRN_IBAT2U,r3 - mtspr SPRN_IBAT2L,r3 - mtspr SPRN_IBAT3U,r3 - mtspr SPRN_IBAT3L,r3 - - mtspr SPRN_DBAT0U,r3 - mtspr SPRN_DBAT0L,r3 - mtspr SPRN_DBAT1U,r3 - mtspr SPRN_DBAT1L,r3 - mtspr SPRN_DBAT2U,r3 - mtspr SPRN_DBAT2L,r3 - mtspr SPRN_DBAT3U,r3 - mtspr SPRN_DBAT3L,r3 -#endif - - /* the bootloader (as far as I'm currently aware) doesn't mess with page - tables, but since we're already here, might as well zap these, too */ - li r4,0 - mtspr SPRN_SDR1,r4 - - li r4,16 - mtctr r4 - li r3,0 - li r4,0 -3: mtsrin r3,r4 - addi r3,r3,1 - bdnz 3b - -#ifdef CONFIG_SMP - /* The 750 book (and Mot/IBM support) says that this will "assist" snooping - when in SMP. Not sure yet whether this should stay or leave... */ - mfspr r4,SPRN_HID0 - ori r4,r4,HID0_ABE - mtspr SPRN_HID0,r4 - sync -#endif /* CONFIG_SMP */ - blr - -/* apparently, SMon doesn't pay attention to HID0[SRST]. Disable the MMU and - branch to 0xfff00100 */ -_GLOBAL(_gemini_reboot) - lis r5,GEMINI_BOOT_INIT@h - ori r5,r5,GEMINI_BOOT_INIT@l - li r6,MSR_IP - mtspr SPRN_SRR0,r5 - mtspr SPRN_SRR1,r6 - rfi diff --git a/arch/ppc/platforms/gemini_serial.h b/arch/ppc/platforms/gemini_serial.h deleted file mode 100644 index b915eff79fd..00000000000 --- a/arch/ppc/platforms/gemini_serial.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifdef __KERNEL__ -#ifndef __ASMPPC_GEMINI_SERIAL_H -#define __ASMPPC_GEMINI_SERIAL_H - -#include <platforms/gemini.h> - -#ifdef CONFIG_SERIAL_MANY_PORTS -#define RS_TABLE_SIZE 64 -#else -#define RS_TABLE_SIZE 4 -#endif - -/* Rate for the 24.576 Mhz clock for the onboard serial chip */ -#define BASE_BAUD (24576000 / 16) - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) -#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) -#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF) -#endif - -#define STD_SERIAL_PORT_DEFNS \ - { 0, BASE_BAUD, GEMINI_SERIAL_A, 15, STD_COM_FLAGS }, /* ttyS0 */ \ - { 0, BASE_BAUD, GEMINI_SERIAL_B, 14, STD_COM_FLAGS }, /* ttyS1 */ \ - -#ifdef CONFIG_GEMINI_PU32 -#define PU32_SERIAL_PORT_DEFNS \ - { 0, BASE_BAUD, NULL, 0, STD_COM_FLAGS }, -#else -#define PU32_SERIAL_PORT_DEFNS -#endif - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DEFNS \ - PU32_SERIAL_PORT_DEFNS - -#endif -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c deleted file mode 100644 index f48048f362a..00000000000 --- a/arch/ppc/platforms/gemini_setup.c +++ /dev/null @@ -1,577 +0,0 @@ -/* - * Copyright (C) 1995 Linus Torvalds - * Adapted from 'alpha' version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * Synergy Microsystems board support by Dan Cox (dan@synergymicro.com) - * - */ - -#include <linux/stddef.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/errno.h> -#include <linux/reboot.h> -#include <linux/pci.h> -#include <linux/time.h> -#include <linux/kdev_t.h> -#include <linux/types.h> -#include <linux/major.h> -#include <linux/initrd.h> -#include <linux/console.h> -#include <linux/seq_file.h> -#include <linux/root_dev.h> -#include <linux/bcd.h> - -#include <asm/system.h> -#include <asm/pgtable.h> -#include <asm/page.h> -#include <asm/dma.h> -#include <asm/io.h> -#include <asm/m48t35.h> -#include <platforms/gemini.h> -#include <asm/time.h> -#include <asm/open_pic.h> -#include <asm/bootinfo.h> -#include <asm/machdep.h> - -void gemini_find_bridges(void); -static int gemini_get_clock_speed(void); -extern void gemini_pcibios_fixup(void); - -static char *gemini_board_families[] = { - "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR" -}; -static int gemini_board_count = sizeof(gemini_board_families) / - sizeof(gemini_board_families[0]); - -static unsigned int cpu_7xx[16] = { - 0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0 -}; -static unsigned int cpu_6xx[16] = { - 0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0 -}; - -/* - * prom_init is the Gemini version of prom.c:prom_init. We only need - * the BSS clearing code, so I copied that out of prom.c. This is a - * lot simpler than hacking prom.c so it will build with Gemini. -VAL - */ - -#define PTRRELOC(x) ((typeof(x))((unsigned long)(x) + offset)) - -unsigned long -prom_init(void) -{ - unsigned long offset = reloc_offset(); - unsigned long phys; - extern char __bss_start, _end; - - /* First zero the BSS -- use memset, some arches don't have - * caches on yet */ - memset_io(PTRRELOC(&__bss_start),0 , &_end - &__bss_start); - - /* Default */ - phys = offset + KERNELBASE; - - gemini_prom_init(); - - return phys; -} - -int -gemini_show_cpuinfo(struct seq_file *m) -{ - unsigned char reg, rev; - char *family; - unsigned int type; - - reg = readb(GEMINI_FEAT); - family = gemini_board_families[((reg>>4) & 0xf)]; - if (((reg>>4) & 0xf) > gemini_board_count) - printk(KERN_ERR "cpuinfo(): unable to determine board family\n"); - - reg = readb(GEMINI_BREV); - type = (reg>>4) & 0xf; - rev = reg & 0xf; - - reg = readb(GEMINI_BECO); - - seq_printf(m, "machine\t\t: Gemini %s%d, rev %c, eco %d\n", - family, type, (rev + 'A'), (reg & 0xf)); - - seq_printf(m, "board\t\t: Gemini %s", family); - if (type > 9) - seq_printf(m, "%c", (type - 10) + 'A'); - else - seq_printf(m, "%d", type); - - seq_printf(m, ", rev %c, eco %d\n", (rev + 'A'), (reg & 0xf)); - - seq_printf(m, "clock\t\t: %dMhz\n", gemini_get_clock_speed()); - - return 0; -} - -static u_char gemini_openpic_initsenses[] = { - 1, - 1, - 1, - 1, - 0, - 0, - 1, /* remainder are level-triggered */ -}; - -#define GEMINI_MPIC_ADDR (0xfcfc0000) -#define GEMINI_MPIC_PCI_CFG (0x80005800) - -void __init gemini_openpic_init(void) -{ - - OpenPIC_Addr = (volatile struct OpenPIC *) - grackle_read(GEMINI_MPIC_PCI_CFG + 0x10); - OpenPIC_InitSenses = gemini_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses ); - - ioremap( GEMINI_MPIC_ADDR, OPENPIC_SIZE); -} - - -extern unsigned long loops_per_jiffy; -extern int root_mountflags; -extern char cmd_line[]; - -void -gemini_heartbeat(void) -{ - static unsigned long led = GEMINI_LEDBASE+(4*8); - static char direction = 8; - - - /* We only want to do this on 1 CPU */ - if (smp_processor_id()) - return; - *(char *)led = 0; - if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) || - (led + direction) < (GEMINI_LEDBASE+(4*8)) ) - direction *= -1; - led += direction; - *(char *)led = 0xff; - ppc_md.heartbeat_count = ppc_md.heartbeat_reset; -} - -void __init gemini_setup_arch(void) -{ - extern char cmd_line[]; - - - loops_per_jiffy = 50000000/HZ; - -#ifdef CONFIG_BLK_DEV_INITRD - /* bootable off CDROM */ - if (initrd_start) - ROOT_DEV = Root_SR0; - else -#endif - ROOT_DEV = Root_SDA1; - - /* nothing but serial consoles... */ - sprintf(cmd_line, "%s console=ttyS0", cmd_line); - - printk("Boot arguments: %s\n", cmd_line); - - ppc_md.heartbeat = gemini_heartbeat; - ppc_md.heartbeat_reset = HZ/8; - ppc_md.heartbeat_count = 1; - - /* Lookup PCI hosts */ - gemini_find_bridges(); - /* take special pains to map the MPIC, since it isn't mapped yet */ - gemini_openpic_init(); - /* start the L2 */ - gemini_init_l2(); -} - - -int -gemini_get_clock_speed(void) -{ - unsigned long hid1, pvr; - int clock; - - pvr = mfspr(SPRN_PVR); - hid1 = (mfspr(SPRN_HID1) >> 28) & 0xf; - if (PVR_VER(pvr) == 8 || - PVR_VER(pvr) == 12) - hid1 = cpu_7xx[hid1]; - else - hid1 = cpu_6xx[hid1]; - - switch((readb(GEMINI_BSTAT) & 0xc) >> 2) { - - case 0: - default: - clock = (hid1*100)/3; - break; - - case 1: - clock = (hid1*125)/3; - break; - - case 2: - clock = (hid1*50); - break; - } - - return clock; -} - -void __init gemini_init_l2(void) -{ - unsigned char reg, brev, fam, creg; - unsigned long cache; - unsigned long pvr; - - reg = readb(GEMINI_L2CFG); - brev = readb(GEMINI_BREV); - fam = readb(GEMINI_FEAT); - pvr = mfspr(SPRN_PVR); - - switch(PVR_VER(pvr)) { - - case 8: - if (reg & 0xc0) - cache = (((reg >> 6) & 0x3) << 28); - else - cache = 0x3 << 28; - -#ifdef CONFIG_SMP - /* Pre-3.0 processor revs had snooping errata. Leave - their L2's disabled with SMP. -- Dan */ - if (PVR_CFG(pvr) < 3) { - printk("Pre-3.0 750; L2 left disabled!\n"); - return; - } -#endif /* CONFIG_SMP */ - - /* Special case: VGM5-B's came before L2 ratios were set on - the board. Processor speed shouldn't be too high, so - set L2 ratio to 1:1.5. */ - if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0) - reg |= 1; - - /* determine best cache ratio based upon what the board - tells us (which sometimes _may_ not be true) and - the processor speed. */ - else { - if (gemini_get_clock_speed() > 250) - reg = 2; - } - break; - case 12: - { - static unsigned long l2_size_val = 0; - - if (!l2_size_val) - l2_size_val = _get_L2CR(); - cache = l2_size_val; - break; - } - case 4: - case 9: - creg = readb(GEMINI_CPUSTAT); - if (((creg & 0xc) >> 2) != 1) - printk("Dual-604 boards don't support the use of L2\n"); - else - writeb(1, GEMINI_L2CFG); - return; - default: - printk("Unknown processor; L2 left disabled\n"); - return; - } - - cache |= ((1<<reg) << 25); - cache |= (L2CR_L2RAM_MASK|L2CR_L2CTL|L2CR_L2DO); - _set_L2CR(0); - _set_L2CR(cache | L2CR_L2E); - -} - -void -gemini_restart(char *cmd) -{ - local_irq_disable(); - /* make a clean restart, not via the MPIC */ - _gemini_reboot(); - for(;;); -} - -void -gemini_power_off(void) -{ - for(;;); -} - -void -gemini_halt(void) -{ - gemini_restart(NULL); -} - -void __init gemini_init_IRQ(void) -{ - /* gemini has no 8259 */ - openpic_init(1, 0, 0, -1); -} - -#define gemini_rtc_read(x) (readb(GEMINI_RTC+(x))) -#define gemini_rtc_write(val,x) (writeb((val),(GEMINI_RTC+(x)))) - -/* ensure that the RTC is up and running */ -long __init gemini_time_init(void) -{ - unsigned char reg; - - reg = gemini_rtc_read(M48T35_RTC_CONTROL); - - if ( reg & M48T35_RTC_STOPPED ) { - printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n"); - gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL); - gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL); - } - return 0; -} - -#undef DEBUG_RTC - -unsigned long -gemini_get_rtc_time(void) -{ - unsigned int year, mon, day, hour, min, sec; - unsigned char reg; - - reg = gemini_rtc_read(M48T35_RTC_CONTROL); - gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL); -#ifdef DEBUG_RTC - printk("get rtc: reg = %x\n", reg); -#endif - - do { - sec = gemini_rtc_read(M48T35_RTC_SECONDS); - min = gemini_rtc_read(M48T35_RTC_MINUTES); - hour = gemini_rtc_read(M48T35_RTC_HOURS); - day = gemini_rtc_read(M48T35_RTC_DOM); - mon = gemini_rtc_read(M48T35_RTC_MONTH); - year = gemini_rtc_read(M48T35_RTC_YEAR); - } while( sec != gemini_rtc_read(M48T35_RTC_SECONDS)); -#ifdef DEBUG_RTC - printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", - sec, min, hour, day, mon, year); -#endif - - gemini_rtc_write(reg, M48T35_RTC_CONTROL); - - BCD_TO_BIN(sec); - BCD_TO_BIN(min); - BCD_TO_BIN(hour); - BCD_TO_BIN(day); - BCD_TO_BIN(mon); - BCD_TO_BIN(year); - - if ((year += 1900) < 1970) - year += 100; -#ifdef DEBUG_RTC - printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", - sec, min, hour, day, mon, year); -#endif - - return mktime( year, mon, day, hour, min, sec ); -} - - -int -gemini_set_rtc_time( unsigned long now ) -{ - unsigned char reg; - struct rtc_time tm; - - to_tm( now, &tm ); - - reg = gemini_rtc_read(M48T35_RTC_CONTROL); -#ifdef DEBUG_RTC - printk("set rtc: reg = %x\n", reg); -#endif - - gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL); -#ifdef DEBUG_RTC - printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n", - tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year); -#endif - - tm.tm_year -= 1900; - BIN_TO_BCD(tm.tm_sec); - BIN_TO_BCD(tm.tm_min); - BIN_TO_BCD(tm.tm_hour); - BIN_TO_BCD(tm.tm_mon); - BIN_TO_BCD(tm.tm_mday); - BIN_TO_BCD(tm.tm_year); -#ifdef DEBUG_RTC - printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n", - tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year); -#endif - - gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS); - gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES); - gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS); - gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM); - gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH); - gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR); - - /* done writing */ - gemini_rtc_write(reg, M48T35_RTC_CONTROL); - - return 0; -} - -/* use the RTC to determine the decrementer count */ -void __init gemini_calibrate_decr(void) -{ - int freq, divisor; - unsigned char reg; - - /* determine processor bus speed */ - reg = readb(GEMINI_BSTAT); - - switch(((reg & 0x0c)>>2)&0x3) { - case 0: - default: - freq = 66667; - break; - case 1: - freq = 83000; - break; - case 2: - freq = 100000; - break; - } - - freq *= 1000; - divisor = 4; - tb_ticks_per_jiffy = freq / HZ / divisor; - tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); -} - -unsigned long __init gemini_find_end_of_memory(void) -{ - unsigned long total; - unsigned char reg; - - reg = readb(GEMINI_MEMCFG); - total = ((1<<((reg & 0x7) - 1)) * - (8<<((reg >> 3) & 0x7))); - total *= (1024*1024); - return total; -} - -static void __init -gemini_map_io(void) -{ - io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); - io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO); -} - -#ifdef CONFIG_SMP -static int -smp_gemini_probe(void) -{ - int i, nr; - - nr = (readb(GEMINI_CPUSTAT) & GEMINI_CPU_COUNT_MASK) >> 2; - if (nr == 0) - nr = 4; - - if (nr > 1) { - openpic_request_IPIs(); - for (i = 1; i < nr; ++i) - smp_hw_index[i] = i; - } - - return nr; -} - -static void -smp_gemini_kick_cpu(int nr) -{ - openpic_reset_processor_phys(1 << nr); - openpic_reset_processor_phys(0); -} - -static void -smp_gemini_setup_cpu(int cpu_nr) -{ - if (OpenPIC_Addr) - do_openpic_setup_cpu(); - if (cpu_nr > 0) - gemini_init_l2(); -} - -static struct smp_ops_t gemini_smp_ops = { - smp_openpic_message_pass, - smp_gemini_probe, - smp_gemini_kick_cpu, - smp_gemini_setup_cpu, - .give_timebase = smp_generic_give_timebase, - .take_timebase = smp_generic_take_timebase, -}; -#endif /* CONFIG_SMP */ - -void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - int i; - - /* Restore BATs for now */ - mtspr(SPRN_DBAT3U, 0xf0001fff); - mtspr(SPRN_DBAT3L, 0xf000002a); - - parse_bootinfo(find_bootinfo()); - - for(i = 0; i < GEMINI_LEDS; i++) - gemini_led_off(i); - - ISA_DMA_THRESHOLD = 0; - DMA_MODE_READ = 0; - DMA_MODE_WRITE = 0; - -#ifdef CONFIG_BLK_DEV_INITRD - if ( r4 ) - { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif - - ppc_md.setup_arch = gemini_setup_arch; - ppc_md.show_cpuinfo = gemini_show_cpuinfo; - ppc_md.init_IRQ = gemini_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - ppc_md.init = NULL; - - ppc_md.restart = gemini_restart; - ppc_md.power_off = gemini_power_off; - ppc_md.halt = gemini_halt; - - ppc_md.time_init = gemini_time_init; - ppc_md.set_rtc_time = gemini_set_rtc_time; - ppc_md.get_rtc_time = gemini_get_rtc_time; - ppc_md.calibrate_decr = gemini_calibrate_decr; - - ppc_md.find_end_of_memory = gemini_find_end_of_memory; - ppc_md.setup_io_mappings = gemini_map_io; - - ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup; - -#ifdef CONFIG_SMP - smp_ops = &gemini_smp_ops; -#endif /* CONFIG_SMP */ -} diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c index 18dc6e8dd4f..b947c774f52 100644 --- a/arch/ppc/platforms/lopec.c +++ b/arch/ppc/platforms/lopec.c @@ -344,7 +344,7 @@ lopec_setup_arch(void) if (bootargs != NULL) { strcpy(cmd_line, bootargs); /* again.. */ - strcpy(saved_command_line, cmd_line); + strcpy(boot_command_line, cmd_line); } } #endif diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c index 8a0c07eb444..5b05d4bd0df 100644 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ b/arch/ppc/platforms/mpc866ads_setup.c @@ -369,7 +369,7 @@ int __init mpc866ads_init(void) ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART); #endif -#ifdef CONFIG_SERIAL_CPM_SMC +#ifdef CONFIG_SERIAL_CPM_SMC2 ppc_sys_device_enable(MPC8xx_CPM_SMC2); ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); #endif diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c index 9778105d4df..8a1788c4815 100644 --- a/arch/ppc/platforms/pplus.c +++ b/arch/ppc/platforms/pplus.c @@ -592,7 +592,7 @@ static void __init pplus_setup_arch(void) if (bootargs != NULL) { strcpy(cmd_line, bootargs); /* again.. */ - strcpy(saved_command_line, cmd_line); + strcpy(boot_command_line, cmd_line); } } #endif diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c index 1cb75a1f825..f166299571d 100644 --- a/arch/ppc/platforms/prep_setup.c +++ b/arch/ppc/platforms/prep_setup.c @@ -634,7 +634,7 @@ static void __init prep_init_sound(void) /* * Find a way to push these informations to the cs4232 driver * Give it out with printk, when not in cmd_line? - * Append it to cmd_line and saved_command_line? + * Append it to cmd_line and boot_command_line? * Format is cs4232=io,irq,dma,dma2 */ } @@ -897,7 +897,7 @@ prep_setup_arch(void) if (bootargs != NULL) { strcpy(cmd_line, bootargs); /* again.. */ - strcpy(saved_command_line, cmd_line); + strcpy(boot_command_line, cmd_line); } } |