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-rw-r--r--arch/ppc/syslib/Makefile8
-rw-r--r--arch/ppc/syslib/mpc85xx_devices.c826
-rw-r--r--arch/ppc/syslib/mpc85xx_sys.c233
-rw-r--r--arch/ppc/syslib/ocp.c2
-rw-r--r--arch/ppc/syslib/open_pic.c2
-rw-r--r--arch/ppc/syslib/ppc85xx_common.c38
-rw-r--r--arch/ppc/syslib/ppc85xx_common.h22
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c367
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.h56
9 files changed, 2 insertions, 1552 deletions
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 4d158f3bd47..52ddebe6c6d 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -87,14 +87,6 @@ endif
obj-$(CONFIG_BOOTX_TEXT) += btext.o
obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o
obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
-obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
- ppc_sys.o mpc85xx_sys.o \
- mpc85xx_devices.o
-ifeq ($(CONFIG_85xx),y)
-obj-$(CONFIG_PCI) += pci_auto.o
-endif
-obj-$(CONFIG_MPC8548_CDS) += todc_time.o
-obj-$(CONFIG_MPC8555_CDS) += todc_time.o
obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o
ifeq ($(CONFIG_PPC_MPC52xx),y)
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
deleted file mode 100644
index 325136e5aee..00000000000
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ /dev/null
@@ -1,826 +0,0 @@
-/*
- * MPC85xx Device descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_enet_pd.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/ppc_sys.h>
-#include <asm/cpm2.h>
-
-/* We use offsets for IORESOURCE_MEM since we do not know at compile time
- * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
- */
-struct gianfar_mdio_data mpc85xx_mdio_pdata = {
-};
-
-static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-};
-
-static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-};
-
-static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR |
- FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
- FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-};
-
-static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR |
- FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
- FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-};
-
-static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR |
- FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
- FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-};
-
-static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
- .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR |
- FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
- FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-};
-
-static struct gianfar_platform_data mpc85xx_fec_pdata = {
- .device_flags = 0,
-};
-
-static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
- .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
-};
-
-static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = {
- .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
-};
-
-static struct fs_platform_info mpc85xx_fcc1_pdata = {
- .fs_no = fsid_fcc1,
- .cp_page = CPM_CR_FCC1_PAGE,
- .cp_block = CPM_CR_FCC1_SBLOCK,
-
- .rx_ring = 32,
- .tx_ring = 32,
- .rx_copybreak = 240,
- .use_napi = 0,
- .napi_weight = 17,
-
- .clk_mask = CMX1_CLK_MASK,
- .clk_route = CMX1_CLK_ROUTE,
- .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
-
- .mem_offset = FCC1_MEM_OFFSET,
-};
-
-static struct fs_platform_info mpc85xx_fcc2_pdata = {
- .fs_no = fsid_fcc2,
- .cp_page = CPM_CR_FCC2_PAGE,
- .cp_block = CPM_CR_FCC2_SBLOCK,
-
- .rx_ring = 32,
- .tx_ring = 32,
- .rx_copybreak = 240,
- .use_napi = 0,
- .napi_weight = 17,
-
- .clk_mask = CMX2_CLK_MASK,
- .clk_route = CMX2_CLK_ROUTE,
- .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
-
- .mem_offset = FCC2_MEM_OFFSET,
-};
-
-static struct fs_platform_info mpc85xx_fcc3_pdata = {
- .fs_no = fsid_fcc3,
- .cp_page = CPM_CR_FCC3_PAGE,
- .cp_block = CPM_CR_FCC3_SBLOCK,
-
- .rx_ring = 32,
- .tx_ring = 32,
- .rx_copybreak = 240,
- .use_napi = 0,
- .napi_weight = 17,
-
- .clk_mask = CMX3_CLK_MASK,
- .clk_route = CMX3_CLK_ROUTE,
- .clk_trx = (PC_F3RXCLK | PC_F3TXCLK),
-
- .mem_offset = FCC3_MEM_OFFSET,
-};
-
-static struct plat_serial8250_port serial_platform_data[] = {
- [0] = {
- .mapbase = 0x4500,
- .irq = MPC85xx_IRQ_DUART,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
- },
- [1] = {
- .mapbase = 0x4600,
- .irq = MPC85xx_IRQ_DUART,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
- },
- { },
-};
-
-struct platform_device ppc_sys_platform_devices[] = {
- [MPC85xx_TSEC1] = {
- .name = "fsl-gianfar",
- .id = 1,
- .dev.platform_data = &mpc85xx_tsec1_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET1_OFFSET,
- .end = MPC85xx_ENET1_OFFSET +
- MPC85xx_ENET1_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC1_TX,
- .end = MPC85xx_IRQ_TSEC1_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC1_RX,
- .end = MPC85xx_IRQ_TSEC1_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC1_ERROR,
- .end = MPC85xx_IRQ_TSEC1_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_TSEC2] = {
- .name = "fsl-gianfar",
- .id = 2,
- .dev.platform_data = &mpc85xx_tsec2_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET2_OFFSET,
- .end = MPC85xx_ENET2_OFFSET +
- MPC85xx_ENET2_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC2_TX,
- .end = MPC85xx_IRQ_TSEC2_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC2_RX,
- .end = MPC85xx_IRQ_TSEC2_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC2_ERROR,
- .end = MPC85xx_IRQ_TSEC2_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_FEC] = {
- .name = "fsl-gianfar",
- .id = 3,
- .dev.platform_data = &mpc85xx_fec_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET3_OFFSET,
- .end = MPC85xx_ENET3_OFFSET +
- MPC85xx_ENET3_SIZE - 1,
- .flags = IORESOURCE_MEM,
-
- },
- {
- .start = MPC85xx_IRQ_FEC,
- .end = MPC85xx_IRQ_FEC,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_IIC1] = {
- .name = "fsl-i2c",
- .id = 1,
- .dev.platform_data = &mpc85xx_fsl_i2c_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_IIC1_OFFSET,
- .end = MPC85xx_IIC1_OFFSET +
- MPC85xx_IIC1_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_IIC1,
- .end = MPC85xx_IRQ_IIC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_DMA0] = {
- .name = "fsl-dma",
- .id = 0,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_DMA0_OFFSET,
- .end = MPC85xx_DMA0_OFFSET +
- MPC85xx_DMA0_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_DMA0,
- .end = MPC85xx_IRQ_DMA0,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_DMA1] = {
- .name = "fsl-dma",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_DMA1_OFFSET,
- .end = MPC85xx_DMA1_OFFSET +
- MPC85xx_DMA1_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_DMA1,
- .end = MPC85xx_IRQ_DMA1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_DMA2] = {
- .name = "fsl-dma",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_DMA2_OFFSET,
- .end = MPC85xx_DMA2_OFFSET +
- MPC85xx_DMA2_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_DMA2,
- .end = MPC85xx_IRQ_DMA2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_DMA3] = {
- .name = "fsl-dma",
- .id = 3,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_DMA3_OFFSET,
- .end = MPC85xx_DMA3_OFFSET +
- MPC85xx_DMA3_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_DMA3,
- .end = MPC85xx_IRQ_DMA3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_DUART] = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev.platform_data = serial_platform_data,
- },
- [MPC85xx_PERFMON] = {
- .name = "fsl-perfmon",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_PERFMON_OFFSET,
- .end = MPC85xx_PERFMON_OFFSET +
- MPC85xx_PERFMON_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_PERFMON,
- .end = MPC85xx_IRQ_PERFMON,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_SEC2] = {
- .name = "fsl-sec2",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_SEC2_OFFSET,
- .end = MPC85xx_SEC2_OFFSET +
- MPC85xx_SEC2_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_SEC2,
- .end = MPC85xx_IRQ_SEC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_FCC1] = {
- .name = "fsl-cpm-fcc",
- .id = 1,
- .num_resources = 4,
- .dev.platform_data = &mpc85xx_fcc1_pdata,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x91300,
- .end = 0x9131F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_regs_c",
- .start = 0x91380,
- .end = 0x9139F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x88400,
- .end = 0x884ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC1,
- .end = SIU_INT_FCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_FCC2] = {
- .name = "fsl-cpm-fcc",
- .id = 2,
- .num_resources = 4,
- .dev.platform_data = &mpc85xx_fcc2_pdata,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x91320,
- .end = 0x9133F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_regs_c",
- .start = 0x913A0,
- .end = 0x913CF,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x88500,
- .end = 0x885ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC2,
- .end = SIU_INT_FCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_FCC3] = {
- .name = "fsl-cpm-fcc",
- .id = 3,
- .num_resources = 4,
- .dev.platform_data = &mpc85xx_fcc3_pdata,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x91340,
- .end = 0x9135F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_regs_c",
- .start = 0x913D0,
- .end = 0x913FF,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x88600,
- .end = 0x886ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC3,
- .end = SIU_INT_FCC3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_I2C] = {
- .name = "fsl-cpm-i2c",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91860,
- .end = 0x918BF,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_I2C,
- .end = SIU_INT_I2C,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SCC1] = {
- .name = "fsl-cpm-scc",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A00,
- .end = 0x91A1F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC1,
- .end = SIU_INT_SCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SCC2] = {
- .name = "fsl-cpm-scc",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A20,
- .end = 0x91A3F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC2,
- .end = SIU_INT_SCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SCC3] = {
- .name = "fsl-cpm-scc",
- .id = 3,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A40,
- .end = 0x91A5F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC3,
- .end = SIU_INT_SCC3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SCC4] = {
- .name = "fsl-cpm-scc",
- .id = 4,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A60,
- .end = 0x91A7F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC4,
- .end = SIU_INT_SCC4,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SPI] = {
- .name = "fsl-cpm-spi",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91AA0,
- .end = 0x91AFF,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SPI,
- .end = SIU_INT_SPI,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_MCC1] = {
- .name = "fsl-cpm-mcc",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91B30,
- .end = 0x91B3F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_MCC1,
- .end = SIU_INT_MCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_MCC2] = {
- .name = "fsl-cpm-mcc",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91B50,
- .end = 0x91B5F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_MCC2,
- .end = SIU_INT_MCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SMC1] = {
- .name = "fsl-cpm-smc",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A80,
- .end = 0x91A8F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SMC1,
- .end = SIU_INT_SMC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_SMC2] = {
- .name = "fsl-cpm-smc",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91A90,
- .end = 0x91A9F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SMC2,
- .end = SIU_INT_SMC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_CPM_USB] = {
- .name = "fsl-cpm-usb",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x91B60,
- .end = 0x91B7F,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_USB,
- .end = SIU_INT_USB,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_eTSEC1] = {
- .name = "fsl-gianfar",
- .id = 1,
- .dev.platform_data = &mpc85xx_etsec1_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET1_OFFSET,
- .end = MPC85xx_ENET1_OFFSET +
- MPC85xx_ENET1_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC1_TX,
- .end = MPC85xx_IRQ_TSEC1_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC1_RX,
- .end = MPC85xx_IRQ_TSEC1_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC1_ERROR,
- .end = MPC85xx_IRQ_TSEC1_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_eTSEC2] = {
- .name = "fsl-gianfar",
- .id = 2,
- .dev.platform_data = &mpc85xx_etsec2_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET2_OFFSET,
- .end = MPC85xx_ENET2_OFFSET +
- MPC85xx_ENET2_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC2_TX,
- .end = MPC85xx_IRQ_TSEC2_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC2_RX,
- .end = MPC85xx_IRQ_TSEC2_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC2_ERROR,
- .end = MPC85xx_IRQ_TSEC2_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_eTSEC3] = {
- .name = "fsl-gianfar",
- .id = 3,
- .dev.platform_data = &mpc85xx_etsec3_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = MPC85xx_ENET3_OFFSET,
- .end = MPC85xx_ENET3_OFFSET +
- MPC85xx_ENET3_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC3_TX,
- .end = MPC85xx_IRQ_TSEC3_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC3_RX,
- .end = MPC85xx_IRQ_TSEC3_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC3_ERROR,
- .end = MPC85xx_IRQ_TSEC3_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_eTSEC4] = {
- .name = "fsl-gianfar",
- .id = 4,
- .dev.platform_data = &mpc85xx_etsec4_pdata,
- .num_resources = 4,
- .resource = (struct resource[]) {
- {
- .start = 0x27000,
- .end = 0x27fff,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "tx",
- .start = MPC85xx_IRQ_TSEC4_TX,
- .end = MPC85xx_IRQ_TSEC4_TX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "rx",
- .start = MPC85xx_IRQ_TSEC4_RX,
- .end = MPC85xx_IRQ_TSEC4_RX,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "error",
- .start = MPC85xx_IRQ_TSEC4_ERROR,
- .end = MPC85xx_IRQ_TSEC4_ERROR,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_IIC2] = {
- .name = "fsl-i2c",
- .id = 2,
- .dev.platform_data = &mpc85xx_fsl_i2c2_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x03100,
- .end = 0x031ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC85xx_IRQ_IIC1,
- .end = MPC85xx_IRQ_IIC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC85xx_MDIO] = {
- .name = "fsl-gianfar_mdio",
- .id = 0,
- .dev.platform_data = &mpc85xx_mdio_pdata,
- .num_resources = 1,
- .resource = (struct resource[]) {
- {
- .start = 0x24520,
- .end = 0x2453f,
- .flags = IORESOURCE_MEM,
- },
- },
- },
-};
-
-static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
-{
- ppc_sys_fixup_mem_resource(pdev, CCSRBAR);
- return 0;
-}
-
-static int __init mach_mpc85xx_init(void)
-{
- ppc_sys_device_fixup = mach_mpc85xx_fixup;
- return 0;
-}
-
-postcore_initcall(mach_mpc85xx_init);
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
deleted file mode 100644
index d96a93dbcb5..00000000000
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * MPC85xx System descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <asm/ppc_sys.h>
-
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
- {
- .ppc_sys_name = "8540",
- .mask = 0xFFFF0000,
- .value = 0x80300000,
- .num_devices = 11,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8560",
- .mask = 0xFFFF0000,
- .value = 0x80700000,
- .num_devices = 20,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON,
- MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
- MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4,
- MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3,
- MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8541",
- .mask = 0xFFFF0000,
- .value = 0x80720000,
- .num_devices = 14,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
- MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8541E",
- .mask = 0xFFFF0000,
- .value = 0x807A0000,
- .num_devices = 15,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
- MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8555",
- .mask = 0xFFFF0000,
- .value = 0x80710000,
- .num_devices = 20,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
- MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3,
- MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
- MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
- MPC85xx_CPM_USB,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8555E",
- .mask = 0xFFFF0000,
- .value = 0x80790000,
- .num_devices = 21,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
- MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3,
- MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
- MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
- MPC85xx_CPM_USB,
- MPC85xx_MDIO,
- },
- },
- /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */
- {
- .ppc_sys_name = "8548E",
- .mask = 0xFFFF00F0,
- .value = 0x80390010,
- .num_devices = 14,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
- MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8548",
- .mask = 0xFFFF00F0,
- .value = 0x80310010,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
- MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8547E",
- .mask = 0xFFFF00F0,
- .value = 0x80390010,
- .num_devices = 14,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
- MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8547",
- .mask = 0xFFFF00F0,
- .value = 0x80310010,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
- MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8545E",
- .mask = 0xFFFF00F0,
- .value = 0x80390010,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2,
- MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8545",
- .mask = 0xFFFF00F0,
- .value = 0x80310010,
- .num_devices = 11,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2,
- MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8543E",
- .mask = 0xFFFF00F0,
- .value = 0x803A0010,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2,
- MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
- MPC85xx_MDIO,
- },
- },
- {
- .ppc_sys_name = "8543",
- .mask = 0xFFFF00F0,
- .value = 0x80320010,
- .num_devices = 11,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC85xx_eTSEC1, MPC85xx_eTSEC2,
- MPC85xx_IIC1, MPC85xx_IIC2,
- MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
- MPC85xx_PERFMON, MPC85xx_DUART,
- MPC85xx_MDIO,
- },
- },
- { /* default match */
- .ppc_sys_name = "",
- .mask = 0x00000000,
- .value = 0x00000000,
- },
-};
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index d42d4085dc8..ac80370ed2f 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -20,7 +20,7 @@
* of peripherals are found on embedded SoC (System On a Chip)
* processors or highly integrated system controllers that have
* a host bridge and many peripherals. Common examples where
- * this is already used include the PPC4xx, PPC85xx, MPC52xx,
+ * this is already used include the PPC4xx, MPC52xx,
* and MV64xxx parts.
*
* This subsystem creates a standard OCP bus type within the
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 18ec9473329..780a3b9b4fe 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -24,7 +24,7 @@
#include "open_pic_defs.h"
-#if defined(CONFIG_PRPMC800) || defined(CONFIG_85xx)
+#if defined(CONFIG_PRPMC800)
#define OPENPIC_BIG_ENDIAN
#endif
diff --git a/arch/ppc/syslib/ppc85xx_common.c b/arch/ppc/syslib/ppc85xx_common.c
deleted file mode 100644
index e5ac699e731..00000000000
--- a/arch/ppc/syslib/ppc85xx_common.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * MPC85xx support routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include <asm/mpc85xx.h>
-#include <asm/mmu.h>
-
-/* ************************************************************************ */
-/* Return the value of CCSRBAR for the current board */
-
-phys_addr_t
-get_ccsrbar(void)
-{
- return BOARD_CCSRBAR;
-}
-
-EXPORT_SYMBOL(get_ccsrbar);
-
-/* For now this is a pass through */
-phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
-{
- return addr;
-};
-EXPORT_SYMBOL(fixup_bigphys_addr);
-
diff --git a/arch/ppc/syslib/ppc85xx_common.h b/arch/ppc/syslib/ppc85xx_common.h
deleted file mode 100644
index 4fc40542511..00000000000
--- a/arch/ppc/syslib/ppc85xx_common.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * MPC85xx support routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __PPC_SYSLIB_PPC85XX_COMMON_H
-#define __PPC_SYSLIB_PPC85XX_COMMON_H
-
-#include <linux/init.h>
-
-/* Provide access to ccsrbar for any modules, etc */
-phys_addr_t get_ccsrbar(void);
-
-#endif /* __PPC_SYSLIB_PPC85XX_COMMON_H */
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
deleted file mode 100644
index 2475ec6600f..00000000000
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * MPC85XX common board code
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/serial.h>
-#include <linux/tty.h> /* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/time.h>
-#include <asm/mpc85xx.h>
-#include <asm/immap_85xx.h>
-#include <asm/mmu.h>
-#include <asm/ppc_sys.h>
-#include <asm/kgdb.h>
-#include <asm/machdep.h>
-
-#include <syslib/ppc85xx_setup.h>
-
-extern void abort(void);
-
-/* Return the amount of memory */
-unsigned long __init
-mpc85xx_find_end_of_memory(void)
-{
- bd_t *binfo;
-
- binfo = (bd_t *) __res;
-
- return binfo->bi_memsize;
-}
-
-/* The decrementer counts at the system (internal) clock freq divided by 8 */
-void __init
-mpc85xx_calibrate_decr(void)
-{
- bd_t *binfo = (bd_t *) __res;
- unsigned int freq, divisor;
-
- /* get the core frequency */
- freq = binfo->bi_busfreq;
-
- /* The timebase is updated every 8 bus clocks, HID0[SEL_TBCLK] = 0 */
- divisor = 8;
- tb_ticks_per_jiffy = freq / divisor / HZ;
- tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
-
- /* Set the time base to zero */
- mtspr(SPRN_TBWL, 0);
- mtspr(SPRN_TBWU, 0);
-
- /* Clear any pending timer interrupts */
- mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
-
- /* Enable decrementer interrupt */
- mtspr(SPRN_TCR, TCR_DIE);
-}
-
-#ifdef CONFIG_SERIAL_8250
-void __init
-mpc85xx_early_serial_map(void)
-{
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- struct uart_port serial_req;
-#endif
- struct plat_serial8250_port *pdata;
- bd_t *binfo = (bd_t *) __res;
- pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC85xx_DUART);
-
- /* Setup serial port access */
- pdata[0].uartclk = binfo->bi_busfreq;
- pdata[0].mapbase += binfo->bi_immr_base;
- pdata[0].membase = ioremap(pdata[0].mapbase, MPC85xx_UART0_SIZE);
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- memset(&serial_req, 0, sizeof (serial_req));
- serial_req.iotype = UPIO_MEM;
- serial_req.mapbase = pdata[0].mapbase;
- serial_req.membase = pdata[0].membase;
- serial_req.regshift = 0;
-
- gen550_init(0, &serial_req);
-#endif
-
- pdata[1].uartclk = binfo->bi_busfreq;
- pdata[1].mapbase += binfo->bi_immr_base;
- pdata[1].membase = ioremap(pdata[1].mapbase, MPC85xx_UART0_SIZE);
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Assume gen550_init() doesn't modify serial_req */
- serial_req.mapbase = pdata[1].mapbase;
- serial_req.membase = pdata[1].membase;
-
- gen550_init(1, &serial_req);
-#endif
-}
-#endif
-
-void
-mpc85xx_restart(char *cmd)
-{
- local_irq_disable();
- abort();
-}
-
-void
-mpc85xx_power_off(void)
-{
- local_irq_disable();
- for(;;);
-}
-
-void
-mpc85xx_halt(void)
-{
- local_irq_disable();
- for(;;);
-}
-
-#ifdef CONFIG_PCI
-
-#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
-extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
-extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
-#endif
-
-static void __init
-mpc85xx_setup_pci1(struct pci_controller *hose)
-{
- volatile struct ccsr_pci *pci;
- volatile struct ccsr_guts *guts;
- unsigned short temps;
- bd_t *binfo = (bd_t *) __res;
-
- pci = ioremap(binfo->bi_immr_base + MPC85xx_PCI1_OFFSET,
- MPC85xx_PCI1_SIZE);
-
- guts = ioremap(binfo->bi_immr_base + MPC85xx_GUTS_OFFSET,
- MPC85xx_GUTS_SIZE);
-
- early_read_config_word(hose, 0, 0, PCI_COMMAND, &temps);
- temps |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- early_write_config_word(hose, 0, 0, PCI_COMMAND, temps);
-
-#define PORDEVSR_PCI (0x00800000) /* PCI Mode */
- if (guts->pordevsr & PORDEVSR_PCI) {
- early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
- } else {
- /* PCI-X init */
- temps = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
- | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
- early_write_config_word(hose, 0, 0, PCIX_COMMAND, temps);
- }
-
- /* Disable all windows (except powar0 since its ignored) */
- pci->powar1 = 0;
- pci->powar2 = 0;
- pci->powar3 = 0;
- pci->powar4 = 0;
- pci->piwar1 = 0;
- pci->piwar2 = 0;
- pci->piwar3 = 0;
-
- /* Setup Phys:PCI 1:1 outbound mem window @ MPC85XX_PCI1_LOWER_MEM */
- pci->potar1 = (MPC85XX_PCI1_LOWER_MEM >> 12) & 0x000fffff;
- pci->potear1 = 0x00000000;
- pci->powbar1 = (MPC85XX_PCI1_LOWER_MEM >> 12) & 0x000fffff;
- /* Enable, Mem R/W */
- pci->powar1 = 0x80044000 |
- (__ilog2(MPC85XX_PCI1_UPPER_MEM - MPC85XX_PCI1_LOWER_MEM + 1) - 1);
-
- /* Setup outbound IO windows @ MPC85XX_PCI1_IO_BASE */
- pci->potar2 = (MPC85XX_PCI1_LOWER_IO >> 12) & 0x000fffff;
- pci->potear2 = 0x00000000;
- pci->powbar2 = (MPC85XX_PCI1_IO_BASE >> 12) & 0x000fffff;
- /* Enable, IO R/W */
- pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI1_IO_SIZE) - 1);
-
- /* Setup 2G inbound Memory Window @ 0 */
- pci->pitar1 = 0x00000000;
- pci->piwbar1 = 0x00000000;
- pci->piwar1 = 0xa0f5501e; /* Enable, Prefetch, Local
- Mem, Snoop R/W, 2G */
-}
-
-
-extern int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin);
-extern int mpc85xx_exclude_device(u_char bus, u_char devfn);
-
-#ifdef CONFIG_85xx_PCI2
-static void __init
-mpc85xx_setup_pci2(struct pci_controller *hose)
-{
- volatile struct ccsr_pci *pci;
- unsigned short temps;
- bd_t *binfo = (bd_t *) __res;
-
- pci = ioremap(binfo->bi_immr_base + MPC85xx_PCI2_OFFSET,
- MPC85xx_PCI2_SIZE);
-
- early_read_config_word(hose, hose->bus_offset, 0, PCI_COMMAND, &temps);
- temps |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- early_write_config_word(hose, hose->bus_offset, 0, PCI_COMMAND, temps);
- early_write_config_byte(hose, hose->bus_offset, 0, PCI_LATENCY_TIMER, 0x80);
-
- /* Disable all windows (except powar0 since its ignored) */
- pci->powar1 = 0;
- pci->powar2 = 0;
- pci->powar3 = 0;
- pci->powar4 = 0;
- pci->piwar1 = 0;
- pci->piwar2 = 0;
- pci->piwar3 = 0;
-
- /* Setup Phys:PCI 1:1 outbound mem window @ MPC85XX_PCI2_LOWER_MEM */
- pci->potar1 = (MPC85XX_PCI2_LOWER_MEM >> 12) & 0x000fffff;
- pci->potear1 = 0x00000000;
- pci->powbar1 = (MPC85XX_PCI2_LOWER_MEM >> 12) & 0x000fffff;
- /* Enable, Mem R/W */
- pci->powar1 = 0x80044000 |
- (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1);
-
- /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */
- pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;
- pci->potear2 = 0x00000000;
- pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff;
- /* Enable, IO R/W */
- pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI2_IO_SIZE) - 1);
-
- /* Setup 2G inbound Memory Window @ 0 */
- pci->pitar1 = 0x00000000;
- pci->piwbar1 = 0x00000000;
- pci->piwar1 = 0xa0f5501e; /* Enable, Prefetch, Local
- Mem, Snoop R/W, 2G */
-}
-#endif /* CONFIG_85xx_PCI2 */
-
-int mpc85xx_pci1_last_busno = 0;
-
-void __init
-mpc85xx_setup_hose(void)
-{
- struct pci_controller *hose_a;
-#ifdef CONFIG_85xx_PCI2
- struct pci_controller *hose_b;
-#endif
- bd_t *binfo = (bd_t *) __res;
-
- hose_a = pcibios_alloc_controller();
-
- if (!hose_a)
- return;
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc85xx_map_irq;
-
- hose_a->first_busno = 0;
- hose_a->bus_offset = 0;
- hose_a->last_busno = 0xff;
-
- setup_indirect_pci(hose_a, binfo->bi_immr_base + PCI1_CFG_ADDR_OFFSET,
- binfo->bi_immr_base + PCI1_CFG_DATA_OFFSET);
- hose_a->set_cfg_type = 1;
-
- mpc85xx_setup_pci1(hose_a);
-
- hose_a->pci_mem_offset = MPC85XX_PCI1_MEM_OFFSET;
- hose_a->mem_space.start = MPC85XX_PCI1_LOWER_MEM;
- hose_a->mem_space.end = MPC85XX_PCI1_UPPER_MEM;
-
- hose_a->io_space.start = MPC85XX_PCI1_LOWER_IO;
- hose_a->io_space.end = MPC85XX_PCI1_UPPER_IO;
- hose_a->io_base_phys = MPC85XX_PCI1_IO_BASE;
-#ifdef CONFIG_85xx_PCI2
- hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
- MPC85XX_PCI1_IO_SIZE +
- MPC85XX_PCI2_IO_SIZE);
-#else
- hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
- MPC85XX_PCI1_IO_SIZE);
-#endif
- isa_io_base = (unsigned long)hose_a->io_base_virt;
-
- /* setup resources */
- pci_init_resource(&hose_a->mem_resources[0],
- MPC85XX_PCI1_LOWER_MEM,
- MPC85XX_PCI1_UPPER_MEM,
- IORESOURCE_MEM, "PCI1 host bridge");
-
- pci_init_resource(&hose_a->io_resource,
- MPC85XX_PCI1_LOWER_IO,
- MPC85XX_PCI1_UPPER_IO,
- IORESOURCE_IO, "PCI1 host bridge");
-
- ppc_md.pci_exclude_device = mpc85xx_exclude_device;
-
-#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
- /* Pre pciauto_bus_scan VIA init */
- mpc85xx_cds_enable_via(hose_a);
-#endif
-
- hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
-
-#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
- /* Post pciauto_bus_scan VIA fixup */
- mpc85xx_cds_fixup_via(hose_a);
-#endif
-
-#ifdef CONFIG_85xx_PCI2
- hose_b = pcibios_alloc_controller();
-
- if (!hose_b)
- return;
-
- hose_b->bus_offset = hose_a->last_busno + 1;
- hose_b->first_busno = hose_a->last_busno + 1;
- hose_b->last_busno = 0xff;
-
- setup_indirect_pci(hose_b, binfo->bi_immr_base + PCI2_CFG_ADDR_OFFSET,
- binfo->bi_immr_base + PCI2_CFG_DATA_OFFSET);
- hose_b->set_cfg_type = 1;
-
- mpc85xx_setup_pci2(hose_b);
-
- hose_b->pci_mem_offset = MPC85XX_PCI2_MEM_OFFSET;
- hose_b->mem_space.start = MPC85XX_PCI2_LOWER_MEM;
- hose_b->mem_space.end = MPC85XX_PCI2_UPPER_MEM;
-
- hose_b->io_space.start = MPC85XX_PCI2_LOWER_IO;
- hose_b->io_space.end = MPC85XX_PCI2_UPPER_IO;
- hose_b->io_base_phys = MPC85XX_PCI2_IO_BASE;
- hose_b->io_base_virt = hose_a->io_base_virt + MPC85XX_PCI1_IO_SIZE;
-
- /* setup resources */
- pci_init_resource(&hose_b->mem_resources[0],
- MPC85XX_PCI2_LOWER_MEM,
- MPC85XX_PCI2_UPPER_MEM,
- IORESOURCE_MEM, "PCI2 host bridge");
-
- pci_init_resource(&hose_b->io_resource,
- MPC85XX_PCI2_LOWER_IO,
- MPC85XX_PCI2_UPPER_IO,
- IORESOURCE_IO, "PCI2 host bridge");
-
- hose_b->last_busno = pciauto_bus_scan(hose_b, hose_b->first_busno);
-
- /* let board code know what the last bus number was on PCI1 */
- mpc85xx_pci1_last_busno = hose_a->last_busno;
-#endif
- return;
-}
-#endif /* CONFIG_PCI */
-
-
diff --git a/arch/ppc/syslib/ppc85xx_setup.h b/arch/ppc/syslib/ppc85xx_setup.h
deleted file mode 100644
index 6ff79995210..00000000000
--- a/arch/ppc/syslib/ppc85xx_setup.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * MPC85XX common board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __PPC_SYSLIB_PPC85XX_SETUP_H
-#define __PPC_SYSLIB_PPC85XX_SETUP_H
-
-#include <linux/init.h>
-#include <asm/ppcboot.h>
-
-extern unsigned long mpc85xx_find_end_of_memory(void) __init;
-extern void mpc85xx_calibrate_decr(void) __init;
-extern void mpc85xx_early_serial_map(void) __init;
-extern void mpc85xx_restart(char *cmd);
-extern void mpc85xx_power_off(void);
-extern void mpc85xx_halt(void);
-extern void mpc85xx_setup_hose(void) __init;
-
-/* PCI config */
-#define PCI1_CFG_ADDR_OFFSET (0x8000)
-#define PCI1_CFG_DATA_OFFSET (0x8004)
-
-#define PCI2_CFG_ADDR_OFFSET (0x9000)
-#define PCI2_CFG_DATA_OFFSET (0x9004)
-
-/* Additional register for PCI-X configuration */
-#define PCIX_NEXT_CAP 0x60
-#define PCIX_CAP_ID 0x61
-#define PCIX_COMMAND 0x62
-#define PCIX_STATUS 0x64
-
-/* Serial Config */
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 2
-#endif
-
-#ifndef BASE_BAUD
-#define BASE_BAUD 115200
-#endif
-
-/* Offset of CPM register space */
-#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
-
-#endif /* __PPC_SYSLIB_PPC85XX_SETUP_H */
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