diff options
Diffstat (limited to 'arch/sh/mm')
| -rw-r--r-- | arch/sh/mm/Kconfig | 14 | ||||
| -rw-r--r-- | arch/sh/mm/cache-sh4.c | 14 | ||||
| -rw-r--r-- | arch/sh/mm/pg-sh4.c | 76 |
3 files changed, 38 insertions, 66 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 70da1c8d407..43f3972a5fb 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -27,6 +27,7 @@ config CPU_SH4A config CPU_SH4AL_DSP bool select CPU_SH4A + select CPU_HAS_DSP config CPU_SUBTYPE_ST40 bool @@ -62,15 +63,10 @@ config CPU_SUBTYPE_SH7206 # SH-3 Processor Support -config CPU_SUBTYPE_SH7300 - bool "Support SH7300 processor" - select CPU_SH3 - config CPU_SUBTYPE_SH7705 bool "Support SH7705 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ - select CPU_HAS_PINT_IRQ config CPU_SUBTYPE_SH7706 bool "Support SH7706 processor" @@ -82,7 +78,6 @@ config CPU_SUBTYPE_SH7706 config CPU_SUBTYPE_SH7707 bool "Support SH7707 processor" select CPU_SH3 - select CPU_HAS_PINT_IRQ help Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. @@ -97,7 +92,6 @@ config CPU_SUBTYPE_SH7709 bool "Support SH7709 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ - select CPU_HAS_PINT_IRQ help Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. @@ -105,6 +99,7 @@ config CPU_SUBTYPE_SH7710 bool "Support SH7710 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ + select CPU_HAS_DSP help Select SH7710 if you have a SH3-DSP SH7710 CPU. @@ -112,6 +107,7 @@ config CPU_SUBTYPE_SH7712 bool "Support SH7712 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ + select CPU_HAS_DSP help Select SH7712 if you have a SH3-DSP SH7712 CPU. @@ -205,10 +201,6 @@ config CPU_SUBTYPE_SHX3 # SH4AL-DSP Processor Support -config CPU_SUBTYPE_SH73180 - bool "Support SH73180 processor" - select CPU_SH4AL_DSP - config CPU_SUBTYPE_SH7343 bool "Support SH7343 processor" select CPU_SH4AL_DSP diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 981b0408905..86486326ef1 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -77,16 +77,8 @@ static void __init emit_cache_params(void) /* * SH-4 has virtually indexed and physically tagged cache. */ - -/* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */ -#define MAX_P3_MUTEXES 16 - -struct mutex p3map_mutex[MAX_P3_MUTEXES]; - void __init p3_cache_init(void) { - int i; - compute_alias(¤t_cpu_data.icache); compute_alias(¤t_cpu_data.dcache); @@ -106,12 +98,6 @@ void __init p3_cache_init(void) } emit_cache_params(); - - if (ioremap_page_range(P3SEG, P3SEG + (PAGE_SIZE * 4), 0, PAGE_KERNEL)) - panic("%s failed.", __FUNCTION__); - - for (i = 0; i < current_cpu_data.dcache.n_aliases; i++) - mutex_init(&p3map_mutex[i]); } /* diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c index df69da9ca69..25f5c6f6821 100644 --- a/arch/sh/mm/pg-sh4.c +++ b/arch/sh/mm/pg-sh4.c @@ -2,19 +2,45 @@ * arch/sh/mm/pg-sh4.c * * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2002 - 2005 Paul Mundt + * Copyright (C) 2002 - 2007 Paul Mundt * * Released under the terms of the GNU GPL v2.0. */ #include <linux/mm.h> #include <linux/mutex.h> +#include <linux/fs.h> #include <asm/mmu_context.h> #include <asm/cacheflush.h> -extern struct mutex p3map_mutex[]; - #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask) +static inline void *kmap_coherent(struct page *page, unsigned long addr) +{ + enum fixed_addresses idx; + unsigned long vaddr, flags; + pte_t pte; + + inc_preempt_count(); + + idx = (addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT; + vaddr = __fix_to_virt(FIX_CMAP_END - idx); + pte = mk_pte(page, PAGE_KERNEL); + + local_irq_save(flags); + flush_tlb_one(get_asid(), vaddr); + local_irq_restore(flags); + + update_mmu_cache(NULL, vaddr, pte); + + return (void *)vaddr; +} + +static inline void kunmap_coherent(struct page *page) +{ + dec_preempt_count(); + preempt_check_resched(); +} + /* * clear_user_page * @to: P1 address @@ -27,25 +53,9 @@ void clear_user_page(void *to, unsigned long address, struct page *page) if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) clear_page(to); else { - unsigned long phys_addr = PHYSADDR(to); - unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); - pgd_t *pgd = pgd_offset_k(p3_addr); - pud_t *pud = pud_offset(pgd, p3_addr); - pmd_t *pmd = pmd_offset(pud, p3_addr); - pte_t *pte = pte_offset_kernel(pmd, p3_addr); - pte_t entry; - unsigned long flags; - - entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); - mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); - set_pte(pte, entry); - local_irq_save(flags); - flush_tlb_one(get_asid(), p3_addr); - local_irq_restore(flags); - update_mmu_cache(NULL, p3_addr, entry); - __clear_user_page((void *)p3_addr, to); - pte_clear(&init_mm, p3_addr, pte); - mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + void *vto = kmap_coherent(page, address); + __clear_user_page(vto, to); + kunmap_coherent(vto); } } @@ -63,25 +73,9 @@ void copy_user_page(void *to, void *from, unsigned long address, if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) copy_page(to, from); else { - unsigned long phys_addr = PHYSADDR(to); - unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS); - pgd_t *pgd = pgd_offset_k(p3_addr); - pud_t *pud = pud_offset(pgd, p3_addr); - pmd_t *pmd = pmd_offset(pud, p3_addr); - pte_t *pte = pte_offset_kernel(pmd, p3_addr); - pte_t entry; - unsigned long flags; - - entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); - mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); - set_pte(pte, entry); - local_irq_save(flags); - flush_tlb_one(get_asid(), p3_addr); - local_irq_restore(flags); - update_mmu_cache(NULL, p3_addr, entry); - __copy_user_page((void *)p3_addr, from, to); - pte_clear(&init_mm, p3_addr, pte); - mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + void *vfrom = kmap_coherent(page, address); + __copy_user_page(vfrom, from, to); + kunmap_coherent(vfrom); } } |