diff options
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/mm/Makefile_64 | 2 | ||||
-rw-r--r-- | arch/sh/mm/cache-sh5.c | 48 |
2 files changed, 1 insertions, 49 deletions
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64 index 2863ffb7006..66c39106d0a 100644 --- a/arch/sh/mm/Makefile_64 +++ b/arch/sh/mm/Makefile_64 @@ -9,7 +9,7 @@ mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \ extable_64.o ifndef CONFIG_CACHE_OFF -obj-y += cache-sh5.o +obj-y += cache-sh5.o flush-sh4.o endif obj-y += $(mmu-y) diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c index 3e2d7321b63..698113fce81 100644 --- a/arch/sh/mm/cache-sh5.c +++ b/arch/sh/mm/cache-sh5.c @@ -539,54 +539,6 @@ static void sh64_dcache_purge_user_range(struct mm_struct *mm, sh64_dcache_purge_user_pages(mm, start, end); } } - -/* - * Purge the range of addresses from the D-cache. - * - * The addresses lie in the superpage mapping. There's no harm if we - * overpurge at either end - just a small performance loss. - */ -void __flush_purge_region(void *start, int size) -{ - unsigned long long ullend, addr, aligned_start; - - aligned_start = (unsigned long long)(signed long long)(signed long) start; - addr = L1_CACHE_ALIGN(aligned_start); - ullend = (unsigned long long) (signed long long) (signed long) start + size; - - while (addr <= ullend) { - __asm__ __volatile__ ("ocbp %0, 0" : : "r" (addr)); - addr += L1_CACHE_BYTES; - } -} - -void __flush_wback_region(void *start, int size) -{ - unsigned long long ullend, addr, aligned_start; - - aligned_start = (unsigned long long)(signed long long)(signed long) start; - addr = L1_CACHE_ALIGN(aligned_start); - ullend = (unsigned long long) (signed long long) (signed long) start + size; - - while (addr < ullend) { - __asm__ __volatile__ ("ocbwb %0, 0" : : "r" (addr)); - addr += L1_CACHE_BYTES; - } -} - -void __flush_invalidate_region(void *start, int size) -{ - unsigned long long ullend, addr, aligned_start; - - aligned_start = (unsigned long long)(signed long long)(signed long) start; - addr = L1_CACHE_ALIGN(aligned_start); - ullend = (unsigned long long) (signed long long) (signed long) start + size; - - while (addr < ullend) { - __asm__ __volatile__ ("ocbi %0, 0" : : "r" (addr)); - addr += L1_CACHE_BYTES; - } -} #endif /* !CONFIG_DCACHE_DISABLED */ /* |