diff options
Diffstat (limited to 'arch')
205 files changed, 4912 insertions, 2762 deletions
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig index aa9d34feddc..679a4a3e265 100644 --- a/arch/arm/configs/omap_ldp_defconfig +++ b/arch/arm/configs/omap_ldp_defconfig @@ -474,14 +474,34 @@ CONFIG_NETDEVICES=y # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set -# CONFIG_PHYLIB is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_AX88796 is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ENC28J60 is not set -CONFIG_SMC911X=y +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set diff --git a/arch/arm/configs/pcm037_defconfig b/arch/arm/configs/pcm037_defconfig index 62747458647..6e37c77c476 100644 --- a/arch/arm/configs/pcm037_defconfig +++ b/arch/arm/configs/pcm037_defconfig @@ -465,12 +465,33 @@ CONFIG_NETDEVICES=y # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set -# CONFIG_PHYLIB is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_AX88796 is not set CONFIG_SMC91X=y # CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig index cd29824d791..21db4b3ec8f 100644 --- a/arch/arm/configs/realview-smp_defconfig +++ b/arch/arm/configs/realview-smp_defconfig @@ -496,13 +496,33 @@ CONFIG_NETDEVICES=y # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set -# CONFIG_PHYLIB is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_AX88796 is not set CONFIG_SMC91X=y # CONFIG_DM9000 is not set -CONFIG_SMC911X=y +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig index 7e253f58ed1..9a75c30b910 100644 --- a/arch/arm/configs/realview_defconfig +++ b/arch/arm/configs/realview_defconfig @@ -490,13 +490,33 @@ CONFIG_NETDEVICES=y # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set -# CONFIG_PHYLIB is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_AX88796 is not set CONFIG_SMC91X=y # CONFIG_DM9000 is not set -CONFIG_SMC911X=y +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7ac812dc055..e26c4fe61fa 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -198,17 +198,17 @@ static int at91_pm_verify_clocks(void) /* USB must not be using PLLB */ if (cpu_is_at91rm9200()) { if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { - pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { - pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } } else if (cpu_is_at91cap9()) { if ((scsr & AT91CAP9_PMC_UHP) != 0) { - pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } } @@ -223,7 +223,7 @@ static int at91_pm_verify_clocks(void) css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; if (css != AT91_PMC_CSS_SLOW) { - pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); + pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); return 0; } } diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h index bbbd72767a0..4d9c1f87247 100644 --- a/arch/arm/mach-gemini/include/mach/system.h +++ b/arch/arm/mach-gemini/include/mach/system.h @@ -28,7 +28,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode) +static inline void arch_reset(char mode, const char *cmd) { __raw_writel(RESET_GLOBAL | RESET_CPU1, IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET); diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h index 001edfefec1..4f5b0e0ce6c 100644 --- a/arch/arm/mach-mmp/include/mach/system.h +++ b/arch/arm/mach-mmp/include/mach/system.h @@ -14,7 +14,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode) +static inline void arch_reset(char mode, const char *cmd) { cpu_reset(0); } diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 5fce022114d..c3648eff513 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c @@ -24,7 +24,7 @@ #include <linux/mtd/plat-ram.h> #include <linux/memory.h> #include <linux/gpio.h> -#include <linux/smc911x.h> +#include <linux/smsc911x.h> #include <linux/interrupt.h> #include <linux/i2c.h> #include <linux/i2c/at24.h> @@ -70,7 +70,7 @@ static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; -static struct resource smc911x_resources[] = { +static struct resource smsc911x_resources[] = { [0] = { .start = CS1_BASE_ADDR + 0x300, .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, @@ -79,22 +79,25 @@ static struct resource smc911x_resources[] = { [1] = { .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, }, }; -static struct smc911x_platdata smc911x_info = { - .flags = SMC911X_USE_32BIT, - .irq_flags = IRQF_SHARED | IRQF_TRIGGER_LOW, +static struct smsc911x_platform_config smsc911x_info = { + .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY | + SMSC911X_SAVE_MAC_ADDRESS, + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, + .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device pcm037_eth = { - .name = "smc911x", + .name = "smsc911x", .id = -1, - .num_resources = ARRAY_SIZE(smc911x_resources), - .resource = smc911x_resources, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, .dev = { - .platform_data = &smc911x_info, + .platform_data = &smsc911x_info, }, }; diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h index 08c60ff227b..5a03e7ccb01 100644 --- a/arch/arm/mach-netx/include/mach/netx-regs.h +++ b/arch/arm/mach-netx/include/mach/netx-regs.h @@ -80,7 +80,7 @@ #define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no)) #define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC) -/* virual addresses */ +/* virtual addresses */ #define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM) #define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR) #define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS) diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 3f325d3718a..cd8de89c5fa 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -109,7 +109,7 @@ config MACH_OMAP_PALMZ71 help Support for the Palm Zire71 PDA. To boot the kernel, you'll need a PalmOS compatible bootloader; check out - http://hackndev.com/palm/z71 for more informations. + http://hackndev.com/palm/z71 for more information. Say Y here if you have such a PDA, say N otherwise. config MACH_OMAP_PALMTT diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index a2c3fcc27a2..c49d9bfa3ab 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -47,6 +47,8 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ board-rx51-peripherals.o \ + mmc-twl4030.o + # Platform specific device init code ifeq ($(CONFIG_USB_MUSB_SOC),y) obj-y += usb-musb.o diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index e096f776f99..da57b0fcda1 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -23,6 +23,7 @@ #include <linux/spi/ads7846.h> #include <linux/i2c/twl4030.h> #include <linux/io.h> +#include <linux/smsc911x.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -41,12 +42,12 @@ #include "mmc-twl4030.h" -#define LDP_SMC911X_CS 1 -#define LDP_SMC911X_GPIO 152 +#define LDP_SMSC911X_CS 1 +#define LDP_SMSC911X_GPIO 152 #define DEBUG_BASE 0x08000000 #define LDP_ETHR_START DEBUG_BASE -static struct resource ldp_smc911x_resources[] = { +static struct resource ldp_smsc911x_resources[] = { [0] = { .start = LDP_ETHR_START, .end = LDP_ETHR_START + SZ_4K, @@ -59,40 +60,50 @@ static struct resource ldp_smc911x_resources[] = { }, }; -static struct platform_device ldp_smc911x_device = { - .name = "smc911x", +static struct smsc911x_platform_config ldp_smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, + .flags = SMSC911X_USE_32BIT, + .phy_interface = PHY_INTERFACE_MODE_MII, +}; + +static struct platform_device ldp_smsc911x_device = { + .name = "smsc911x", .id = -1, - .num_resources = ARRAY_SIZE(ldp_smc911x_resources), - .resource = ldp_smc911x_resources, + .num_resources = ARRAY_SIZE(ldp_smsc911x_resources), + .resource = ldp_smsc911x_resources, + .dev = { + .platform_data = &ldp_smsc911x_config, + }, }; static struct platform_device *ldp_devices[] __initdata = { - &ldp_smc911x_device, + &ldp_smsc911x_device, }; -static inline void __init ldp_init_smc911x(void) +static inline void __init ldp_init_smsc911x(void) { int eth_cs; unsigned long cs_mem_base; int eth_gpio = 0; - eth_cs = LDP_SMC911X_CS; + eth_cs = LDP_SMSC911X_CS; if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { - printk(KERN_ERR "Failed to request GPMC mem for smc911x\n"); + printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); return; } - ldp_smc911x_resources[0].start = cs_mem_base + 0x0; - ldp_smc911x_resources[0].end = cs_mem_base + 0xff; + ldp_smsc911x_resources[0].start = cs_mem_base + 0x0; + ldp_smsc911x_resources[0].end = cs_mem_base + 0xff; udelay(100); - eth_gpio = LDP_SMC911X_GPIO; + eth_gpio = LDP_SMSC911X_GPIO; - ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); + ldp_smsc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); - if (gpio_request(eth_gpio, "smc911x irq") < 0) { - printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", + if (gpio_request(eth_gpio, "smsc911x irq") < 0) { + printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", eth_gpio); return; } @@ -104,7 +115,7 @@ static void __init omap_ldp_init_irq(void) omap2_init_common_hw(NULL); omap_init_irq(); omap_gpio_init(); - ldp_init_smc911x(); + ldp_init_smsc911x(); } static struct omap_uart_config ldp_uart_config __initdata = { diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index b3f6e9d8180..b1f23bea863 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -57,6 +57,9 @@ #define GPMC_CS0_BASE 0x60 #define GPMC_CS_SIZE 0x30 +#define OVERO_SMSC911X_CS 5 +#define OVERO_SMSC911X_GPIO 176 + #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) @@ -116,6 +119,67 @@ static void __init overo_ads7846_init(void) static inline void __init overo_ads7846_init(void) { return; } #endif +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) + +#include <linux/smsc911x.h> + +static struct resource overo_smsc911x_resources[] = { + { + .name = "smsc911x-memory", + .flags = IORESOURCE_MEM, + }, + { + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, + }, +}; + +static struct smsc911x_platform_config overo_smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, + .flags = SMSC911X_USE_32BIT , + .phy_interface = PHY_INTERFACE_MODE_MII, +}; + +static struct platform_device overo_smsc911x_device = { + .name = "smsc911x", + .id = -1, + .num_resources = ARRAY_SIZE(overo_smsc911x_resources), + .resource = &overo_smsc911x_resources, + .dev = { + .platform_data = &overo_smsc911x_config, + }, +}; + +static inline void __init overo_init_smsc911x(void) +{ + unsigned long cs_mem_base; + + if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { + printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n"); + return; + } + + overo_smsc911x_resources[0].start = cs_mem_base + 0x0; + overo_smsc911x_resources[0].end = cs_mem_base + 0xff; + + if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && + (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) { + gpio_export(OVERO_SMSC911X_GPIO, 0); + } else { + printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n"); + return; + } + + overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO); + overo_smsc911x_resources[1].end = 0; + + platform_device_register(&overo_smsc911x_device); +} + +#else +static inline void __init overo_init_smsc911x(void) { return; } +#endif + static struct mtd_partition overo_nand_partitions[] = { { .name = "xloader", @@ -290,6 +354,7 @@ static void __init overo_init(void) overo_flash_init(); usb_musb_init(); overo_ads7846_init(); + overo_init_smsc911x(); if ((gpio_request(OVERO_GPIO_W2W_NRESET, "OVERO_GPIO_W2W_NRESET") == 0) && diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index d6766685cfc..9ab947c14f2 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -28,7 +28,7 @@ #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/io.h> -#include <linux/smc911x.h> +#include <linux/smsc911x.h> #include <linux/ata_platform.h> #include <asm/clkdev.h> @@ -128,14 +128,15 @@ int realview_flash_register(struct resource *res, u32 num) return platform_device_register(&realview_flash_device); } -static struct smc911x_platdata realview_smc911x_platdata = { - .flags = SMC911X_USE_32BIT, - .irq_flags = IRQF_SHARED, - .irq_polarity = 1, +static struct smsc911x_platform_config smsc911x_config = { + .flags = SMSC911X_USE_32BIT, + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, + .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device realview_eth_device = { - .name = "smc911x", + .name = "smsc911x", .id = 0, .num_resources = 2, }; @@ -145,8 +146,8 @@ int realview_eth_register(const char *name, struct resource *res) if (name) realview_eth_device.name = name; realview_eth_device.resource = res; - if (strcmp(realview_eth_device.name, "smc911x") == 0) - realview_eth_device.dev.platform_data = &realview_smc911x_platdata; + if (strcmp(realview_eth_device.name, "smsc911x") == 0) + realview_eth_device.dev.platform_data = &smsc911x_config; return platform_device_register(&realview_eth_device); } diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c index 67d6d9cc68b..d0d39adf640 100644 --- a/arch/arm/mach-realview/localtimer.c +++ b/arch/arm/mach-realview/localtimer.c @@ -191,6 +191,7 @@ void __cpuinit local_timer_setup(void) clk->name = "dummy_timer"; clk->features = CLOCK_EVT_FEAT_DUMMY; clk->rating = 200; + clk->mult = 1; clk->set_mode = dummy_timer_set_mode; clk->broadcast = smp_timer_broadcast; clk->cpumask = cpumask_of(cpu); diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S index 94077fbd96b..6f7e70907e4 100644 --- a/arch/arm/mm/abort-ev6.S +++ b/arch/arm/mm/abort-ev6.S @@ -29,10 +29,10 @@ ENTRY(v6_early_abort) mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR /* - * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR. + * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103). * The test below covers all the write situations, including Java bytecodes */ - bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR + bic r1, r1, #1 << 11 @ clear bit 11 of FSR tst r3, #PSR_J_BIT @ Java? movne pc, lr do_thumb_abort diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index d6dd83826f8..6e77c042d8e 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -115,6 +115,10 @@ static inline void l2_inv_pa_range(unsigned long start, unsigned long end) raw_local_irq_restore(flags); } +static inline void l2_inv_all(void) +{ + __asm__("mcr p15, 1, %0, c15, c11, 0" : : "r" (0)); +} /* * Linux primitives. @@ -254,9 +258,7 @@ static void __init enable_dcache(void) static void __init __invalidate_icache(void) { - int dummy; - - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy)); + __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); } static int __init invalidate_and_disable_icache(void) @@ -321,6 +323,7 @@ static void __init enable_l2(void) d = flush_and_disable_dcache(); i = invalidate_and_disable_icache(); + l2_inv_all(); write_extra_features(u | 0x00400000); if (i) enable_icache(); diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index ba592a9e6fb..a2bed62aec2 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -15,13 +15,16 @@ * r10 = thread_info structure * lr = failure return */ -#include <linux/linkage.h> -#include <linux/init.h> -#include <asm/asm-offsets.h> -#include <asm/assembler.h> +#include <asm/thread_info.h> #include <asm/vfpmacros.h> +#include "../kernel/entry-header.S" ENTRY(do_vfp) +#ifdef CONFIG_PREEMPT + ldr r4, [r10, #TI_PREEMPT] @ get preempt count + add r11, r4, #1 @ increment it + str r11, [r10, #TI_PREEMPT] +#endif enable_irq ldr r4, .LCvfp ldr r11, [r10, #TI_CPU] @ CPU number @@ -30,6 +33,12 @@ ENTRY(do_vfp) ENDPROC(do_vfp) ENTRY(vfp_null_entry) +#ifdef CONFIG_PREEMPT + get_thread_info r10 + ldr r4, [r10, #TI_PREEMPT] @ get preempt count + sub r11, r4, #1 @ decrement it + str r11, [r10, #TI_PREEMPT] +#endif mov pc, lr ENDPROC(vfp_null_entry) @@ -41,6 +50,12 @@ ENDPROC(vfp_null_entry) __INIT ENTRY(vfp_testing_entry) +#ifdef CONFIG_PREEMPT + get_thread_info r10 + ldr r4, [r10, #TI_PREEMPT] @ get preempt count + sub r11, r4, #1 @ decrement it + str r11, [r10, #TI_PREEMPT] +#endif ldr r0, VFP_arch_address str r5, [r0] @ known non-zero value mov pc, r9 @ we have handled the fault diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index a5a4e57763c..83c4e384b16 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -137,6 +137,12 @@ check_for_exception: VFPFMXR FPEXC, r1 @ restore FPEXC last sub r2, r2, #4 str r2, [sp, #S_PC] @ retry the instruction +#ifdef CONFIG_PREEMPT + get_thread_info r10 + ldr r4, [r10, #TI_PREEMPT] @ get preempt count + sub r11, r4, #1 @ decrement it + str r11, [r10, #TI_PREEMPT] +#endif mov pc, r9 @ we think we have handled things @@ -155,6 +161,12 @@ look_for_VFP_exceptions: @ not recognised by VFP DBGSTR "not VFP" +#ifdef CONFIG_PREEMPT + get_thread_info r10 + ldr r4, [r10, #TI_PREEMPT] @ get preempt count + sub r11, r4, #1 @ decrement it + str r11, [r10, #TI_PREEMPT] +#endif mov pc, lr process_exception: diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 75457b30d81..01599c4ef72 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -266,7 +266,7 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) * on VFP subarch 1. */ vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); - return; + goto exit; } /* @@ -297,7 +297,7 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. */ if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) - return; + goto exit; /* * The barrier() here prevents fpinst2 being read @@ -310,6 +310,8 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); if (exceptions) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); + exit: + preempt_enable(); } static void vfp_enable(void *unused) diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 05fe3053dca..414a8ad97f5 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -127,13 +127,13 @@ config BOARD_HAMMERHEAD select CPU_AT32AP7000 select USB_ARCH_HAS_HCD help - The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. + The Hammerhead platform is built around an AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. - The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered + The board also incorporates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). - Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is + Additionally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 0c1f86e3e44..3640cdc38aa 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -777,7 +777,7 @@ config CACHELINE_ALIGNED_L1 default n if BF54x depends on !BF531 help - If enabled, cacheline_anligned data is linked + If enabled, cacheline_aligned data is linked into L1 data memory. (less latency) config SYSCALL_TAB_L1 @@ -957,7 +957,7 @@ config MPU memory they do not own. This comes at a performance penalty and is recommended only for debugging. -comment "Asynchonous Memory Configuration" +comment "Asynchronous Memory Configuration" menu "EBIU_AMGCTL Global Control" config C_AMCKEN @@ -989,7 +989,7 @@ config C_B3PEN default n choice - prompt"Enable Asynchonous Memory Banks" + prompt "Enable Asynchronous Memory Banks" default C_AMBEN_ALL config C_AMBEN diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index 3462245fe9f..7adac388a77 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig @@ -438,7 +438,7 @@ config ETRAX_SERIAL_PORT0_DMA1_IN help Enables the DMA1 input channel for ser0 (ttyS0). If you do not enable DMA, an interrupt for each character will be - used when receiveing data. + used when receiving data. Normally you want to use DMA, unless you use the DMA channel for something else. @@ -565,7 +565,7 @@ config ETRAX_SERIAL_PORT2_DMA7_IN help Enables the DMA7 input channel for ser2 (ttyS2). If you do not enable DMA, an interrupt for each character will be - used when receiveing data. + used when receiving data. Normally you want to use DMA, unless you use the DMA channel for something else. @@ -604,7 +604,7 @@ config ETRAX_SERIAL_PORT3_DMA3_IN help Enables the DMA3 input channel for ser3 (ttyS3). If you do not enable DMA, an interrupt for each character will be - used when receiveing data. + used when receiving data. Normally you want to use DMA, unless you use the DMA channel for something else. diff --git a/arch/cris/arch-v32/Kconfig b/arch/cris/arch-v32/Kconfig index 005ed2b3f7f..21bbd93be34 100644 --- a/arch/cris/arch-v32/Kconfig +++ b/arch/cris/arch-v32/Kconfig @@ -28,7 +28,7 @@ config ETRAX_NBR_LED_GRP_ONE help Select this if you want one Ethernet LED group. This LED group can be used for one or more Ethernet interfaces. However, it is - recomended that each Ethernet interface use a dedicated LED group. + recommended that each Ethernet interface use a dedicated LED group. config ETRAX_NBR_LED_GRP_TWO bool "Use two LED groups" diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig index 7a64fcef9d0..b9e328e688b 100644 --- a/arch/cris/arch-v32/drivers/Kconfig +++ b/arch/cris/arch-v32/drivers/Kconfig @@ -342,7 +342,7 @@ config ETRAX_SERIAL_PORT4_DMA9_IN help Enables the DMA9 input channel for ser4 (ttyS4). If you do not enable DMA, an interrupt for each character will be - used when receiveing data. + used when receiving data. Normally you want to use DMA, unless you use the DMA channel for something else. diff --git a/arch/cris/arch-v32/mach-fs/Kconfig b/arch/cris/arch-v32/mach-fs/Kconfig index f6d74475f1c..774de82abef 100644 --- a/arch/cris/arch-v32/mach-fs/Kconfig +++ b/arch/cris/arch-v32/mach-fs/Kconfig @@ -59,7 +59,7 @@ config ETRAX_SDRAM_GRP1_CONFIG depends on ETRAX_ARCH_V32 default "0" help - SDRAM configuration for group 1. The defult value is 0 + SDRAM configuration for group 1. The default value is 0 because group 1 is not used in the default configuration, described in the help for SDRAM_GRP0_CONFIG. diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c index ad383caae19..e7c6e614a75 100644 --- a/arch/h8300/kernel/timer/tpu.c +++ b/arch/h8300/kernel/timer/tpu.c @@ -67,7 +67,7 @@ static struct irqaction tpu_irq = { .flags = IRQF_DISABLED | IRQF_TIMER, }; -const static int __initdata divide_rate[] = { +static const int __initdata divide_rate[] = { #if CONFIG_H8300_TPU_CH == 0 1,4,16,64,0,0,0,0, #elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5) diff --git a/arch/m68k/include/asm/bootinfo.h b/arch/m68k/include/asm/bootinfo.h index fedf3e32612..fb8a06b9ab6 100644 --- a/arch/m68k/include/asm/bootinfo.h +++ b/arch/m68k/include/asm/bootinfo.h @@ -1,5 +1,378 @@ -#ifdef __uClinux__ -#include "bootinfo_no.h" -#else -#include "bootinfo_mm.h" +/* +** asm/bootinfo.h -- Definition of the Linux/m68k boot information structure +** +** Copyright 1992 by Greg Harp +** +** This file is subject to the terms and conditions of the GNU General Public +** License. See the file COPYING in the main directory of this archive +** for more details. +** +** Created 09/29/92 by Greg Harp +** +** 5/2/94 Roman Hodek: +** Added bi_atari part of the machine dependent union bi_un; for now it +** contains just a model field to distinguish between TT and Falcon. +** 26/7/96 Roman Zippel: +** Renamed to setup.h; added some useful macros to allow gcc some +** optimizations if possible. +** 5/10/96 Geert Uytterhoeven: +** Redesign of the boot information structure; renamed to bootinfo.h again +** 27/11/96 Geert Uytterhoeven: +** Backwards compatibility with bootinfo interface version 1.0 +*/ + +#ifndef _M68K_BOOTINFO_H +#define _M68K_BOOTINFO_H + + + /* + * Bootinfo definitions + * + * This is an easily parsable and extendable structure containing all + * information to be passed from the bootstrap to the kernel. + * + * This way I hope to keep all future changes back/forewards compatible. + * Thus, keep your fingers crossed... + * + * This structure is copied right after the kernel bss by the bootstrap + * routine. + */ + +#ifndef __ASSEMBLY__ + +struct bi_record { + unsigned short tag; /* tag ID */ + unsigned short size; /* size of record (in bytes) */ + unsigned long data[0]; /* data */ +}; + +#endif /* __ASSEMBLY__ */ + + + /* + * Tag Definitions + * + * Machine independent tags start counting from 0x0000 + * Machine dependent tags start counting from 0x8000 + */ + +#define BI_LAST 0x0000 /* last record (sentinel) */ +#define BI_MACHTYPE 0x0001 /* machine type (u_long) */ +#define BI_CPUTYPE 0x0002 /* cpu type (u_long) */ +#define BI_FPUTYPE 0x0003 /* fpu type (u_long) */ +#define BI_MMUTYPE 0x0004 /* mmu type (u_long) */ +#define BI_MEMCHUNK 0x0005 /* memory chunk address and size */ + /* (struct mem_info) */ +#define BI_RAMDISK 0x0006 /* ramdisk address and size */ + /* (struct mem_info) */ +#define BI_COMMAND_LINE 0x0007 /* kernel command line parameters */ + /* (string) */ + + /* + * Amiga-specific tags + */ + +#define BI_AMIGA_MODEL 0x8000 /* model (u_long) */ +#define BI_AMIGA_AUTOCON 0x8001 /* AutoConfig device */ + /* (struct ConfigDev) */ +#define BI_AMIGA_CHIP_SIZE 0x8002 /* size of Chip RAM (u_long) */ +#define BI_AMIGA_VBLANK 0x8003 /* VBLANK frequency (u_char) */ +#define BI_AMIGA_PSFREQ 0x8004 /* power supply frequency (u_char) */ +#define BI_AMIGA_ECLOCK 0x8005 /* EClock frequency (u_long) */ +#define BI_AMIGA_CHIPSET 0x8006 /* native chipset present (u_long) */ +#define BI_AMIGA_SERPER 0x8007 /* serial port period (u_short) */ + + /* + * Atari-specific tags + */ + +#define BI_ATARI_MCH_COOKIE 0x8000 /* _MCH cookie from TOS (u_long) */ +#define BI_ATARI_MCH_TYPE 0x8001 /* special machine type (u_long) */ + /* (values are ATARI_MACH_* defines */ + +/* mch_cookie values (upper word) */ +#define ATARI_MCH_ST 0 +#define ATARI_MCH_STE 1 +#define ATARI_MCH_TT 2 +#define ATARI_MCH_FALCON 3 + +/* mch_type values */ +#define ATARI_MACH_NORMAL 0 /* no special machine type */ +#define ATARI_MACH_MEDUSA 1 /* Medusa 040 */ +#define ATARI_MACH_HADES 2 /* Hades 040 or 060 */ +#define ATARI_MACH_AB40 3 /* Afterburner040 on Falcon */ + + /* + * VME-specific tags + */ + +#define BI_VME_TYPE 0x8000 /* VME sub-architecture (u_long) */ +#define BI_VME_BRDINFO 0x8001 /* VME board information (struct) */ + +/* BI_VME_TYPE codes */ +#define VME_TYPE_TP34V 0x0034 /* Tadpole TP34V */ +#define VME_TYPE_MVME147 0x0147 /* Motorola MVME147 */ +#define VME_TYPE_MVME162 0x0162 /* Motorola MVME162 */ +#define VME_TYPE_MVME166 0x0166 /* Motorola MVME166 */ +#define VME_TYPE_MVME167 0x0167 /* Motorola MVME167 */ +#define VME_TYPE_MVME172 0x0172 /* Motorola MVME172 */ +#define VME_TYPE_MVME177 0x0177 /* Motorola MVME177 */ +#define VME_TYPE_BVME4000 0x4000 /* BVM Ltd. BVME4000 */ +#define VME_TYPE_BVME6000 0x6000 /* BVM Ltd. BVME6000 */ + +/* BI_VME_BRDINFO is a 32 byte struct as returned by the Bug code on + * Motorola VME boards. Contains board number, Bug version, board + * configuration options, etc. See include/asm/mvme16xhw.h for details. + */ + + + /* + * Macintosh-specific tags (all u_long) + */ + +#define BI_MAC_MODEL 0x8000 /* Mac Gestalt ID (model type) */ +#define BI_MAC_VADDR 0x8001 /* Mac video base address */ +#define BI_MAC_VDEPTH 0x8002 /* Mac video depth */ +#define BI_MAC_VROW 0x8003 /* Mac video rowbytes */ +#define BI_MAC_VDIM 0x8004 /* Mac video dimensions */ +#define BI_MAC_VLOGICAL 0x8005 /* Mac video logical base */ +#define BI_MAC_SCCBASE 0x8006 /* Mac SCC base address */ +#define BI_MAC_BTIME 0x8007 /* Mac boot time */ +#define BI_MAC_GMTBIAS 0x8008 /* Mac GMT timezone offset */ +#define BI_MAC_MEMSIZE 0x8009 /* Mac RAM size (sanity check) */ +#define BI_MAC_CPUID 0x800a /* Mac CPU type (sanity check) */ +#define BI_MAC_ROMBASE 0x800b /* Mac system ROM base address */ + + /* + * Macintosh hardware profile data - unused, see macintosh.h for + * resonable type values + */ + +#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */ +#define BI_MAC_VIA2BASE 0x8011 /* Mac VIA2 base address (type varies) */ +#define BI_MAC_VIA2TYPE 0x8012 /* Mac VIA2 type (VIA, RBV, OSS) */ +#define BI_MAC_ADBTYPE 0x8013 /* Mac ADB interface type */ +#define BI_MAC_ASCBASE 0x8014 /* Mac Apple Sound Chip base address */ +#define BI_MAC_SCSI5380 0x8015 /* Mac NCR 5380 SCSI (base address, multi) */ +#define BI_MAC_SCSIDMA 0x8016 /* Mac SCSI DMA (base address) */ +#define BI_MAC_SCSI5396 0x8017 /* Mac NCR 53C96 SCSI (base address, multi) */ +#define BI_MAC_IDETYPE 0x8018 /* Mac IDE interface type */ +#define BI_MAC_IDEBASE 0x8019 /* Mac IDE interface base address */ +#define BI_MAC_NUBUS 0x801a /* Mac Nubus type (none, regular, pseudo) */ +#define BI_MAC_SLOTMASK 0x801b /* Mac Nubus slots present */ +#define BI_MAC_SCCTYPE 0x801c /* Mac SCC serial type (normal, IOP) */ +#define BI_MAC_ETHTYPE 0x801d /* Mac builtin ethernet type (Sonic, MACE */ +#define BI_MAC_ETHBASE 0x801e /* Mac builtin ethernet base address */ +#define BI_MAC_PMU 0x801f /* Mac power management / poweroff hardware */ +#define BI_MAC_IOP_SWIM 0x8020 /* Mac SWIM floppy IOP */ +#define BI_MAC_IOP_ADB 0x8021 /* Mac ADB IOP */ + + /* + * Mac: compatibility with old booter data format (temporarily) + * Fields unused with the new bootinfo can be deleted now; instead of + * adding new fields the struct might be splitted into a hardware address + * part and a hardware type part + */ + +#ifndef __ASSEMBLY__ + +struct mac_booter_data +{ + unsigned long videoaddr; + unsigned long videorow; + unsigned long videodepth; + unsigned long dimensions; + unsigned long args; + unsigned long boottime; + unsigned long gmtbias; + unsigned long bootver; + unsigned long videological; + unsigned long sccbase; + unsigned long id; + unsigned long memsize; + unsigned long serialmf; + unsigned long serialhsk; + unsigned long serialgpi; + unsigned long printmf; + unsigned long printhsk; + unsigned long printgpi; + unsigned long cpuid; + unsigned long rombase; + unsigned long adbdelay; + unsigned long timedbra; +}; + +extern struct mac_booter_data + mac_bi_data; + #endif + + /* + * Apollo-specific tags + */ + +#define BI_APOLLO_MODEL 0x8000 /* model (u_long) */ + + /* + * HP300-specific tags + */ + +#define BI_HP300_MODEL 0x8000 /* model (u_long) */ +#define BI_HP300_UART_SCODE 0x8001 /* UART select code (u_long) */ +#define BI_HP300_UART_ADDR 0x8002 /* phys. addr of UART (u_long) */ + + /* + * Stuff for bootinfo interface versioning + * + * At the start of kernel code, a 'struct bootversion' is located. + * bootstrap checks for a matching version of the interface before booting + * a kernel, to avoid user confusion if kernel and bootstrap don't work + * together :-) + * + * If incompatible changes are made to the bootinfo interface, the major + * number below should be stepped (and the minor reset to 0) for the + * appropriate machine. If a change is backward-compatible, the minor + * should be stepped. "Backwards-compatible" means that booting will work, + * but certain features may not. + */ + +#define BOOTINFOV_MAGIC 0x4249561A /* 'BIV^Z' */ +#define MK_BI_VERSION(major,minor) (((major)<<16)+(minor)) +#define BI_VERSION_MAJOR(v) (((v) >> 16) & 0xffff) +#define BI_VERSION_MINOR(v) ((v) & 0xffff) + +#ifndef __ASSEMBLY__ + +struct bootversion { + unsigned short branch; + unsigned long magic; + struct { + unsigned long machtype; + unsigned long version; + } machversions[0]; +}; + +#endif /* __ASSEMBLY__ */ + +#define AMIGA_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define ATARI_BOOTI_VERSION MK_BI_VERSION( 2, 1 ) +#define MAC_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define MVME147_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define MVME16x_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define BVME6000_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define Q40_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) +#define HP300_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) + +#ifdef BOOTINFO_COMPAT_1_0 + + /* + * Backwards compatibility with bootinfo interface version 1.0 + */ + +#define COMPAT_AMIGA_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) +#define COMPAT_ATARI_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) +#define COMPAT_MAC_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) + +#include <linux/zorro.h> + +#define COMPAT_NUM_AUTO 16 + +struct compat_bi_Amiga { + int model; + int num_autocon; + struct ConfigDev autocon[COMPAT_NUM_AUTO]; + unsigned long chip_size; + unsigned char vblank; + unsigned char psfreq; + unsigned long eclock; + unsigned long chipset; + unsigned long hw_present; +}; + +struct compat_bi_Atari { + unsigned long hw_present; + unsigned long mch_cookie; +}; + +#ifndef __ASSEMBLY__ + +struct compat_bi_Macintosh +{ + unsigned long videoaddr; + unsigned long videorow; + unsigned long videodepth; + unsigned long dimensions; + unsigned long args; + unsigned long boottime; + unsigned long gmtbias; + unsigned long bootver; + unsigned long videological; + unsigned long sccbase; + unsigned long id; + unsigned long memsize; + unsigned long serialmf; + unsigned long serialhsk; + unsigned long serialgpi; + unsigned long printmf; + unsigned long printhsk; + unsigned long printgpi; + unsigned long cpuid; + unsigned long rombase; + unsigned long adbdelay; + unsigned long timedbra; +}; + +#endif + +struct compat_mem_info { + unsigned long addr; + unsigned long size; +}; + +#define COMPAT_NUM_MEMINFO 4 + +#define COMPAT_CPUB_68020 0 +#define COMPAT_CPUB_68030 1 +#define COMPAT_CPUB_68040 2 +#define COMPAT_CPUB_68060 3 +#define COMPAT_FPUB_68881 5 +#define COMPAT_FPUB_68882 6 +#define COMPAT_FPUB_68040 7 +#define COMPAT_FPUB_68060 8 + +#define COMPAT_CPU_68020 (1<<COMPAT_CPUB_68020) +#define COMPAT_CPU_68030 (1<<COMPAT_CPUB_68030) +#define COMPAT_CPU_68040 (1<<COMPAT_CPUB_68040) +#define COMPAT_CPU_68060 (1<<COMPAT_CPUB_68060) +#define COMPAT_CPU_MASK (31) +#define COMPAT_FPU_68881 (1<<COMPAT_FPUB_68881) +#define COMPAT_FPU_68882 (1<<COMPAT_FPUB_68882) +#define COMPAT_FPU_68040 (1<<COMPAT_FPUB_68040) +#define COMPAT_FPU_68060 (1<<COMPAT_FPUB_68060) +#define COMPAT_FPU_MASK (0xfe0) + +#define COMPAT_CL_SIZE (256) + +struct compat_bootinfo { + unsigned long machtype; + unsigned long cputype; + struct compat_mem_info memory[COMPAT_NUM_MEMINFO]; + int num_memory; + unsigned long ramdisk_size; + unsigned long ramdisk_addr; + char command_line[COMPAT_CL_SIZE]; + union { + struct compat_bi_Amiga bi_ami; + struct compat_bi_Atari bi_ata; + struct compat_bi_Macintosh bi_mac; + } bi_un; +}; + +#define bi_amiga bi_un.bi_ami +#define bi_atari bi_un.bi_ata +#define bi_mac bi_un.bi_mac + +#endif /* BOOTINFO_COMPAT_1_0 */ + + +#endif /* _M68K_BOOTINFO_H */ diff --git a/arch/m68k/include/asm/bootinfo_mm.h b/arch/m68k/include/asm/bootinfo_mm.h deleted file mode 100644 index fb8a06b9ab6..00000000000 --- a/arch/m68k/include/asm/bootinfo_mm.h +++ /dev/null @@ -1,378 +0,0 @@ -/* -** asm/bootinfo.h -- Definition of the Linux/m68k boot information structure -** -** Copyright 1992 by Greg Harp -** -** This file is subject to the terms and conditions of the GNU General Public -** License. See the file COPYING in the main directory of this archive -** for more details. -** -** Created 09/29/92 by Greg Harp -** -** 5/2/94 Roman Hodek: -** Added bi_atari part of the machine dependent union bi_un; for now it -** contains just a model field to distinguish between TT and Falcon. -** 26/7/96 Roman Zippel: -** Renamed to setup.h; added some useful macros to allow gcc some -** optimizations if possible. -** 5/10/96 Geert Uytterhoeven: -** Redesign of the boot information structure; renamed to bootinfo.h again -** 27/11/96 Geert Uytterhoeven: -** Backwards compatibility with bootinfo interface version 1.0 -*/ - -#ifndef _M68K_BOOTINFO_H -#define _M68K_BOOTINFO_H - - - /* - * Bootinfo definitions - * - * This is an easily parsable and extendable structure containing all - * information to be passed from the bootstrap to the kernel. - * - * This way I hope to keep all future changes back/forewards compatible. - * Thus, keep your fingers crossed... - * - * This structure is copied right after the kernel bss by the bootstrap - * routine. - */ - -#ifndef __ASSEMBLY__ - -struct bi_record { - unsigned short tag; /* tag ID */ - unsigned short size; /* size of record (in bytes) */ - unsigned long data[0]; /* data */ -}; - -#endif /* __ASSEMBLY__ */ - - - /* - * Tag Definitions - * - * Machine independent tags start counting from 0x0000 - * Machine dependent tags start counting from 0x8000 - */ - -#define BI_LAST 0x0000 /* last record (sentinel) */ -#define BI_MACHTYPE 0x0001 /* machine type (u_long) */ -#define BI_CPUTYPE 0x0002 /* cpu type (u_long) */ -#define BI_FPUTYPE 0x0003 /* fpu type (u_long) */ -#define BI_MMUTYPE 0x0004 /* mmu type (u_long) */ -#define BI_MEMCHUNK 0x0005 /* memory chunk address and size */ - /* (struct mem_info) */ -#define BI_RAMDISK 0x0006 /* ramdisk address and size */ - /* (struct mem_info) */ -#define BI_COMMAND_LINE 0x0007 /* kernel command line parameters */ - /* (string) */ - - /* - * Amiga-specific tags - */ - -#define BI_AMIGA_MODEL 0x8000 /* model (u_long) */ -#define BI_AMIGA_AUTOCON 0x8001 /* AutoConfig device */ - /* (struct ConfigDev) */ -#define BI_AMIGA_CHIP_SIZE 0x8002 /* size of Chip RAM (u_long) */ -#define BI_AMIGA_VBLANK 0x8003 /* VBLANK frequency (u_char) */ -#define BI_AMIGA_PSFREQ 0x8004 /* power supply frequency (u_char) */ -#define BI_AMIGA_ECLOCK 0x8005 /* EClock frequency (u_long) */ -#define BI_AMIGA_CHIPSET 0x8006 /* native chipset present (u_long) */ -#define BI_AMIGA_SERPER 0x8007 /* serial port period (u_short) */ - - /* - * Atari-specific tags - */ - -#define BI_ATARI_MCH_COOKIE 0x8000 /* _MCH cookie from TOS (u_long) */ -#define BI_ATARI_MCH_TYPE 0x8001 /* special machine type (u_long) */ - /* (values are ATARI_MACH_* defines */ - -/* mch_cookie values (upper word) */ -#define ATARI_MCH_ST 0 -#define ATARI_MCH_STE 1 -#define ATARI_MCH_TT 2 -#define ATARI_MCH_FALCON 3 - -/* mch_type values */ -#define ATARI_MACH_NORMAL 0 /* no special machine type */ -#define ATARI_MACH_MEDUSA 1 /* Medusa 040 */ -#define ATARI_MACH_HADES 2 /* Hades 040 or 060 */ -#define ATARI_MACH_AB40 3 /* Afterburner040 on Falcon */ - - /* - * VME-specific tags - */ - -#define BI_VME_TYPE 0x8000 /* VME sub-architecture (u_long) */ -#define BI_VME_BRDINFO 0x8001 /* VME board information (struct) */ - -/* BI_VME_TYPE codes */ -#define VME_TYPE_TP34V 0x0034 /* Tadpole TP34V */ -#define VME_TYPE_MVME147 0x0147 /* Motorola MVME147 */ -#define VME_TYPE_MVME162 0x0162 /* Motorola MVME162 */ -#define VME_TYPE_MVME166 0x0166 /* Motorola MVME166 */ -#define VME_TYPE_MVME167 0x0167 /* Motorola MVME167 */ -#define VME_TYPE_MVME172 0x0172 /* Motorola MVME172 */ -#define VME_TYPE_MVME177 0x0177 /* Motorola MVME177 */ -#define VME_TYPE_BVME4000 0x4000 /* BVM Ltd. BVME4000 */ -#define VME_TYPE_BVME6000 0x6000 /* BVM Ltd. BVME6000 */ - -/* BI_VME_BRDINFO is a 32 byte struct as returned by the Bug code on - * Motorola VME boards. Contains board number, Bug version, board - * configuration options, etc. See include/asm/mvme16xhw.h for details. - */ - - - /* - * Macintosh-specific tags (all u_long) - */ - -#define BI_MAC_MODEL 0x8000 /* Mac Gestalt ID (model type) */ -#define BI_MAC_VADDR 0x8001 /* Mac video base address */ -#define BI_MAC_VDEPTH 0x8002 /* Mac video depth */ -#define BI_MAC_VROW 0x8003 /* Mac video rowbytes */ -#define BI_MAC_VDIM 0x8004 /* Mac video dimensions */ -#define BI_MAC_VLOGICAL 0x8005 /* Mac video logical base */ -#define BI_MAC_SCCBASE 0x8006 /* Mac SCC base address */ -#define BI_MAC_BTIME 0x8007 /* Mac boot time */ -#define BI_MAC_GMTBIAS 0x8008 /* Mac GMT timezone offset */ -#define BI_MAC_MEMSIZE 0x8009 /* Mac RAM size (sanity check) */ -#define BI_MAC_CPUID 0x800a /* Mac CPU type (sanity check) */ -#define BI_MAC_ROMBASE 0x800b /* Mac system ROM base address */ - - /* - * Macintosh hardware profile data - unused, see macintosh.h for - * resonable type values - */ - -#define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */ -#define BI_MAC_VIA2BASE 0x8011 /* Mac VIA2 base address (type varies) */ -#define BI_MAC_VIA2TYPE 0x8012 /* Mac VIA2 type (VIA, RBV, OSS) */ -#define BI_MAC_ADBTYPE 0x8013 /* Mac ADB interface type */ -#define BI_MAC_ASCBASE 0x8014 /* Mac Apple Sound Chip base address */ -#define BI_MAC_SCSI5380 0x8015 /* Mac NCR 5380 SCSI (base address, multi) */ -#define BI_MAC_SCSIDMA 0x8016 /* Mac SCSI DMA (base address) */ -#define BI_MAC_SCSI5396 0x8017 /* Mac NCR 53C96 SCSI (base address, multi) */ -#define BI_MAC_IDETYPE 0x8018 /* Mac IDE interface type */ -#define BI_MAC_IDEBASE 0x8019 /* Mac IDE interface base address */ -#define BI_MAC_NUBUS 0x801a /* Mac Nubus type (none, regular, pseudo) */ -#define BI_MAC_SLOTMASK 0x801b /* Mac Nubus slots present */ -#define BI_MAC_SCCTYPE 0x801c /* Mac SCC serial type (normal, IOP) */ -#define BI_MAC_ETHTYPE 0x801d /* Mac builtin ethernet type (Sonic, MACE */ -#define BI_MAC_ETHBASE 0x801e /* Mac builtin ethernet base address */ -#define BI_MAC_PMU 0x801f /* Mac power management / poweroff hardware */ -#define BI_MAC_IOP_SWIM 0x8020 /* Mac SWIM floppy IOP */ -#define BI_MAC_IOP_ADB 0x8021 /* Mac ADB IOP */ - - /* - * Mac: compatibility with old booter data format (temporarily) - * Fields unused with the new bootinfo can be deleted now; instead of - * adding new fields the struct might be splitted into a hardware address - * part and a hardware type part - */ - -#ifndef __ASSEMBLY__ - -struct mac_booter_data -{ - unsigned long videoaddr; - unsigned long videorow; - unsigned long videodepth; - unsigned long dimensions; - unsigned long args; - unsigned long boottime; - unsigned long gmtbias; - unsigned long bootver; - unsigned long videological; - unsigned long sccbase; - unsigned long id; - unsigned long memsize; - unsigned long serialmf; - unsigned long serialhsk; - unsigned long serialgpi; - unsigned long printmf; - unsigned long printhsk; - unsigned long printgpi; - unsigned long cpuid; - unsigned long rombase; - unsigned long adbdelay; - unsigned long timedbra; -}; - -extern struct mac_booter_data - mac_bi_data; - -#endif - - /* - * Apollo-specific tags - */ - -#define BI_APOLLO_MODEL 0x8000 /* model (u_long) */ - - /* - * HP300-specific tags - */ - -#define BI_HP300_MODEL 0x8000 /* model (u_long) */ -#define BI_HP300_UART_SCODE 0x8001 /* UART select code (u_long) */ -#define BI_HP300_UART_ADDR 0x8002 /* phys. addr of UART (u_long) */ - - /* - * Stuff for bootinfo interface versioning - * - * At the start of kernel code, a 'struct bootversion' is located. - * bootstrap checks for a matching version of the interface before booting - * a kernel, to avoid user confusion if kernel and bootstrap don't work - * together :-) - * - * If incompatible changes are made to the bootinfo interface, the major - * number below should be stepped (and the minor reset to 0) for the - * appropriate machine. If a change is backward-compatible, the minor - * should be stepped. "Backwards-compatible" means that booting will work, - * but certain features may not. - */ - -#define BOOTINFOV_MAGIC 0x4249561A /* 'BIV^Z' */ -#define MK_BI_VERSION(major,minor) (((major)<<16)+(minor)) -#define BI_VERSION_MAJOR(v) (((v) >> 16) & 0xffff) -#define BI_VERSION_MINOR(v) ((v) & 0xffff) - -#ifndef __ASSEMBLY__ - -struct bootversion { - unsigned short branch; - unsigned long magic; - struct { - unsigned long machtype; - unsigned long version; - } machversions[0]; -}; - -#endif /* __ASSEMBLY__ */ - -#define AMIGA_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define ATARI_BOOTI_VERSION MK_BI_VERSION( 2, 1 ) -#define MAC_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define MVME147_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define MVME16x_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define BVME6000_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define Q40_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) -#define HP300_BOOTI_VERSION MK_BI_VERSION( 2, 0 ) - -#ifdef BOOTINFO_COMPAT_1_0 - - /* - * Backwards compatibility with bootinfo interface version 1.0 - */ - -#define COMPAT_AMIGA_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) -#define COMPAT_ATARI_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) -#define COMPAT_MAC_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) - -#include <linux/zorro.h> - -#define COMPAT_NUM_AUTO 16 - -struct compat_bi_Amiga { - int model; - int num_autocon; - struct ConfigDev autocon[COMPAT_NUM_AUTO]; - unsigned long chip_size; - unsigned char vblank; - unsigned char psfreq; - unsigned long eclock; - unsigned long chipset; - unsigned long hw_present; -}; - -struct compat_bi_Atari { - unsigned long hw_present; - unsigned long mch_cookie; -}; - -#ifndef __ASSEMBLY__ - -struct compat_bi_Macintosh -{ - unsigned long videoaddr; - unsigned long videorow; - unsigned long videodepth; - unsigned long dimensions; - unsigned long args; - unsigned long boottime; - unsigned long gmtbias; - unsigned long bootver; - unsigned long videological; - unsigned long sccbase; - unsigned long id; - unsigned long memsize; - unsigned long serialmf; - unsigned long serialhsk; - unsigned long serialgpi; - unsigned long printmf; - unsigned long printhsk; - unsigned long printgpi; - unsigned long cpuid; - unsigned long rombase; - unsigned long adbdelay; - unsigned long timedbra; -}; - -#endif - -struct compat_mem_info { - unsigned long addr; - unsigned long size; -}; - -#define COMPAT_NUM_MEMINFO 4 - -#define COMPAT_CPUB_68020 0 -#define COMPAT_CPUB_68030 1 -#define COMPAT_CPUB_68040 2 -#define COMPAT_CPUB_68060 3 -#define COMPAT_FPUB_68881 5 -#define COMPAT_FPUB_68882 6 -#define COMPAT_FPUB_68040 7 -#define COMPAT_FPUB_68060 8 - -#define COMPAT_CPU_68020 (1<<COMPAT_CPUB_68020) -#define COMPAT_CPU_68030 (1<<COMPAT_CPUB_68030) -#define COMPAT_CPU_68040 (1<<COMPAT_CPUB_68040) -#define COMPAT_CPU_68060 (1<<COMPAT_CPUB_68060) -#define COMPAT_CPU_MASK (31) -#define COMPAT_FPU_68881 (1<<COMPAT_FPUB_68881) -#define COMPAT_FPU_68882 (1<<COMPAT_FPUB_68882) -#define COMPAT_FPU_68040 (1<<COMPAT_FPUB_68040) -#define COMPAT_FPU_68060 (1<<COMPAT_FPUB_68060) -#define COMPAT_FPU_MASK (0xfe0) - -#define COMPAT_CL_SIZE (256) - -struct compat_bootinfo { - unsigned long machtype; - unsigned long cputype; - struct compat_mem_info memory[COMPAT_NUM_MEMINFO]; - int num_memory; - unsigned long ramdisk_size; - unsigned long ramdisk_addr; - char command_line[COMPAT_CL_SIZE]; - union { - struct compat_bi_Amiga bi_ami; - struct compat_bi_Atari bi_ata; - struct compat_bi_Macintosh bi_mac; - } bi_un; -}; - -#define bi_amiga bi_un.bi_ami -#define bi_atari bi_un.bi_ata -#define bi_mac bi_un.bi_mac - -#endif /* BOOTINFO_COMPAT_1_0 */ - - -#endif /* _M68K_BOOTINFO_H */ diff --git a/arch/m68k/include/asm/bootinfo_no.h b/arch/m68k/include/asm/bootinfo_no.h deleted file mode 100644 index c12e526f518..00000000000 --- a/arch/m68k/include/asm/bootinfo_no.h +++ /dev/null @@ -1,2 +0,0 @@ - -/* Nothing for m68knommu */ diff --git a/arch/m68k/include/asm/bug.h b/arch/m68k/include/asm/bug.h index 997e0944ebc..ef9a2e47352 100644 --- a/arch/m68k/include/asm/bug.h +++ b/arch/m68k/include/asm/bug.h @@ -1,5 +1,30 @@ -#ifdef __uClinux__ -#include "bug_no.h" +#ifndef _M68K_BUG_H +#define _M68K_BUG_H + +#ifdef CONFIG_MMU +#ifdef CONFIG_BUG +#ifdef CONFIG_DEBUG_BUGVERBOSE +#ifndef CONFIG_SUN3 +#define BUG() do { \ + printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ + __builtin_trap(); \ +} while (0) #else -#include "bug_mm.h" +#define BUG() do { \ + printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ + panic("BUG!"); \ +} while (0) +#endif +#else +#define BUG() do { \ + __builtin_trap(); \ +} while (0) +#endif + +#define HAVE_ARCH_BUG +#endif +#endif /* CONFIG_MMU */ + +#include <asm-generic/bug.h> + #endif diff --git a/arch/m68k/include/asm/bug_mm.h b/arch/m68k/include/asm/bug_mm.h deleted file mode 100644 index e5b528deb8a..00000000000 --- a/arch/m68k/include/asm/bug_mm.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _M68K_BUG_H -#define _M68K_BUG_H - - -#ifdef CONFIG_BUG -#ifdef CONFIG_DEBUG_BUGVERBOSE -#ifndef CONFIG_SUN3 -#define BUG() do { \ - printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ - __builtin_trap(); \ -} while (0) -#else -#define BUG() do { \ - printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ - panic("BUG!"); \ -} while (0) -#endif -#else -#define BUG() do { \ - __builtin_trap(); \ -} while (0) -#endif - -#define HAVE_ARCH_BUG -#endif - -#include <asm-generic/bug.h> - -#endif diff --git a/arch/m68k/include/asm/bug_no.h b/arch/m68k/include/asm/bug_no.h deleted file mode 100644 index 70e7dc0af21..00000000000 --- a/arch/m68k/include/asm/bug_no.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _M68KNOMMU_BUG_H -#define _M68KNOMMU_BUG_H -#include <asm-generic/bug.h> -#endif diff --git a/arch/m68k/include/asm/bugs.h b/arch/m68k/include/asm/bugs.h index 01f047d784e..d06207b9ba5 100644 --- a/arch/m68k/include/asm/bugs.h +++ b/arch/m68k/include/asm/bugs.h @@ -1,5 +1,20 @@ -#ifdef __uClinux__ -#include "bugs_no.h" +/* + * include/asm-m68k/bugs.h + * + * Copyright (C) 1994 Linus Torvalds + */ + +/* + * This is included by init/main.c to check for architecture-dependent bugs. + * + * Needs: + * void check_bugs(void); + */ + +#ifdef CONFIG_MMU +extern void check_bugs(void); /* in arch/m68k/kernel/setup.c */ #else -#include "bugs_mm.h" +static void check_bugs(void) +{ +} #endif diff --git a/arch/m68k/include/asm/bugs_mm.h b/arch/m68k/include/asm/bugs_mm.h deleted file mode 100644 index d0193559241..00000000000 --- a/arch/m68k/include/asm/bugs_mm.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-m68k/bugs.h - * - * Copyright (C) 1994 Linus Torvalds - */ - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -extern void check_bugs(void); /* in arch/m68k/kernel/setup.c */ diff --git a/arch/m68k/include/asm/bugs_no.h b/arch/m68k/include/asm/bugs_no.h deleted file mode 100644 index 5f382dac3a6..00000000000 --- a/arch/m68k/include/asm/bugs_no.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-m68k/bugs.h - * - * Copyright (C) 1994 Linus Torvalds - */ - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -static void check_bugs(void) -{ -} diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index 599c29bc8f4..fed3fd30de7 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h @@ -1,5 +1,11 @@ -#ifdef __uClinux__ -#include "cache_no.h" -#else -#include "cache_mm.h" +/* + * include/asm-m68k/cache.h + */ +#ifndef __ARCH_M68K_CACHE_H +#define __ARCH_M68K_CACHE_H + +/* bytes per L1 cache line */ +#define L1_CACHE_SHIFT 4 +#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) + #endif diff --git a/arch/m68k/include/asm/cache_mm.h b/arch/m68k/include/asm/cache_mm.h deleted file mode 100644 index fed3fd30de7..00000000000 --- a/arch/m68k/include/asm/cache_mm.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * include/asm-m68k/cache.h - */ -#ifndef __ARCH_M68K_CACHE_H -#define __ARCH_M68K_CACHE_H - -/* bytes per L1 cache line */ -#define L1_CACHE_SHIFT 4 -#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) - -#endif diff --git a/arch/m68k/include/asm/cache_no.h b/arch/m68k/include/asm/cache_no.h deleted file mode 100644 index 24e9eace5f8..00000000000 --- a/arch/m68k/include/asm/cache_no.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ARCH_M68KNOMMU_CACHE_H -#define __ARCH_M68KNOMMU_CACHE_H - -/* bytes per L1 cache line */ -#define L1_CACHE_BYTES 16 /* this need to be at least 1 */ - -/* m68k-elf-gcc 2.95.2 doesn't like these */ - -#define __cacheline_aligned -#define ____cacheline_aligned - -#endif diff --git a/arch/m68k/include/asm/current.h b/arch/m68k/include/asm/current.h index 51b056dfaed..91fcc5358cf 100644 --- a/arch/m68k/include/asm/current.h +++ b/arch/m68k/include/asm/current.h @@ -1,5 +1,28 @@ -#ifdef __uClinux__ -#include "current_no.h" +#ifndef _M68K_CURRENT_H +#define _M68K_CURRENT_H + +#ifdef CONFIG_MMU + +register struct task_struct *current __asm__("%a2"); + #else -#include "current_mm.h" -#endif + +/* + * Rather than dedicate a register (as the m68k source does), we + * just keep a global, we should probably just change it all to be + * current and lose _current_task. + */ +#include <linux/thread_info.h> + +struct task_struct; + +static inline struct task_struct *get_current(void) +{ + return(current_thread_info()->task); +} + +#define current get_current() + +#endif /* CONFNIG_MMU */ + +#endif /* !(_M68K_CURRENT_H) */ diff --git a/arch/m68k/include/asm/current_mm.h b/arch/m68k/include/asm/current_mm.h deleted file mode 100644 index 8de8f8ceda6..00000000000 --- a/arch/m68k/include/asm/current_mm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _M68K_CURRENT_H -#define _M68K_CURRENT_H - -register struct task_struct *current __asm__("%a2"); - -#endif /* !(_M68K_CURRENT_H) */ diff --git a/arch/m68k/include/asm/current_no.h b/arch/m68k/include/asm/current_no.h deleted file mode 100644 index 53ee0f9f7ce..00000000000 --- a/arch/m68k/include/asm/current_no.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _M68KNOMMU_CURRENT_H -#define _M68KNOMMU_CURRENT_H -/* - * current.h - * (C) Copyright 2000, Lineo, David McCullough <davidm@uclinux.org> - * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) - * - * rather than dedicate a register (as the m68k source does), we - * just keep a global, we should probably just change it all to be - * current and lose _current_task. - */ - -#include <linux/thread_info.h> - -struct task_struct; - -static inline struct task_struct *get_current(void) -{ - return(current_thread_info()->task); -} - -#define current get_current() - -#endif /* _M68KNOMMU_CURRENT_H */ diff --git a/arch/m68k/include/asm/div64.h b/arch/m68k/include/asm/div64.h index d211d9f5427..edb66148a71 100644 --- a/arch/m68k/include/asm/div64.h +++ b/arch/m68k/include/asm/div64.h @@ -1,5 +1,34 @@ -#ifdef __uClinux__ -#include "div64_no.h" +#ifndef _M68K_DIV64_H +#define _M68K_DIV64_H + +#ifdef CONFIG_MMU + +#include <linux/types.h> + +/* n = n / base; return rem; */ + +#define do_div(n, base) ({ \ + union { \ + unsigned long n32[2]; \ + unsigned long long n64; \ + } __n; \ + unsigned long __rem, __upper; \ + \ + __n.n64 = (n); \ + if ((__upper = __n.n32[0])) { \ + asm ("divul.l %2,%1:%0" \ + : "=d" (__n.n32[0]), "=d" (__upper) \ + : "d" (base), "0" (__n.n32[0])); \ + } \ + asm ("divu.l %2,%1:%0" \ + : "=d" (__n.n32[1]), "=d" (__rem) \ + : "d" (base), "1" (__upper), "0" (__n.n32[1])); \ + (n) = __n.n64; \ + __rem; \ +}) + #else -#include "div64_mm.h" -#endif +#include <asm-generic/div64.h> +#endif /* CONFIG_MMU */ + +#endif /* _M68K_DIV64_H */ diff --git a/arch/m68k/include/asm/div64_mm.h b/arch/m68k/include/asm/div64_mm.h deleted file mode 100644 index 8243c931b5c..00000000000 --- a/arch/m68k/include/asm/div64_mm.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _M68K_DIV64_H -#define _M68K_DIV64_H - -#include <linux/types.h> - -/* n = n / base; return rem; */ - -#define do_div(n, base) ({ \ - union { \ - unsigned long n32[2]; \ - unsigned long long n64; \ - } __n; \ - unsigned long __rem, __upper; \ - \ - __n.n64 = (n); \ - if ((__upper = __n.n32[0])) { \ - asm ("divul.l %2,%1:%0" \ - : "=d" (__n.n32[0]), "=d" (__upper) \ - : "d" (base), "0" (__n.n32[0])); \ - } \ - asm ("divu.l %2,%1:%0" \ - : "=d" (__n.n32[1]), "=d" (__rem) \ - : "d" (base), "1" (__upper), "0" (__n.n32[1])); \ - (n) = __n.n64; \ - __rem; \ -}) - -#endif /* _M68K_DIV64_H */ diff --git a/arch/m68k/include/asm/div64_no.h b/arch/m68k/include/asm/div64_no.h deleted file mode 100644 index 6cd978cefb2..00000000000 --- a/arch/m68k/include/asm/div64_no.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/div64.h> diff --git a/arch/m68k/include/asm/dma-mapping.h b/arch/m68k/include/asm/dma-mapping.h index f4a4c7638f8..26f505488c1 100644 --- a/arch/m68k/include/asm/dma-mapping.h +++ b/arch/m68k/include/asm/dma-mapping.h @@ -1,5 +1,112 @@ -#ifdef __uClinux__ -#include "dma-mapping_no.h" +#ifndef _M68K_DMA_MAPPING_H +#define _M68K_DMA_MAPPING_H + +#include <asm/cache.h> + +struct scatterlist; + +#ifndef CONFIG_MMU_SUN3 +static inline int dma_supported(struct device *dev, u64 mask) +{ + return 1; +} + +static inline int dma_set_mask(struct device *dev, u64 mask) +{ + return 0; +} + +static inline int dma_get_cache_alignment(void) +{ + return 1 << L1_CACHE_SHIFT; +} + +static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) +{ + return 0; +} + +extern void *dma_alloc_coherent(struct device *, size_t, + dma_addr_t *, gfp_t); +extern void dma_free_coherent(struct device *, size_t, + void *, dma_addr_t); + +static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, + dma_addr_t *handle, gfp_t flag) +{ + return dma_alloc_coherent(dev, size, handle, flag); +} +static inline void dma_free_noncoherent(struct device *dev, size_t size, + void *addr, dma_addr_t handle) +{ + dma_free_coherent(dev, size, addr, handle); +} +static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, + enum dma_data_direction dir) +{ + /* we use coherent allocation, so not much to do here. */ +} + +extern dma_addr_t dma_map_single(struct device *, void *, size_t, + enum dma_data_direction); +static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, + size_t size, enum dma_data_direction dir) +{ +} + +extern dma_addr_t dma_map_page(struct device *, struct page *, + unsigned long, size_t size, + enum dma_data_direction); +static inline void dma_unmap_page(struct device *dev, dma_addr_t address, + size_t size, enum dma_data_direction dir) +{ +} + +extern int dma_map_sg(struct device *, struct scatterlist *, int, + enum dma_data_direction); +static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, + int nhwentries, enum dma_data_direction dir) +{ +} + +extern void dma_sync_single_for_device(struct device *, dma_addr_t, size_t, + enum dma_data_direction); +extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int, + enum dma_data_direction); + +static inline void dma_sync_single_range_for_device(struct device *dev, + dma_addr_t dma_handle, unsigned long offset, size_t size, + enum dma_data_direction direction) +{ + /* just sync everything for now */ + dma_sync_single_for_device(dev, dma_handle, offset + size, direction); +} + +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, + size_t size, enum dma_data_direction dir) +{ +} + +static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction dir) +{ +} + +static inline void dma_sync_single_range_for_cpu(struct device *dev, + dma_addr_t dma_handle, unsigned long offset, size_t size, + enum dma_data_direction direction) +{ + /* just sync everything for now */ + dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); +} + +static inline int dma_mapping_error(struct device *dev, dma_addr_t handle) +{ + return 0; +} + #else -#include "dma-mapping_mm.h" +#include <asm-generic/dma-mapping-broken.h> #endif + +#endif /* _M68K_DMA_MAPPING_H */ diff --git a/arch/m68k/include/asm/dma-mapping_mm.h b/arch/m68k/include/asm/dma-mapping_mm.h deleted file mode 100644 index 26f505488c1..00000000000 --- a/arch/m68k/include/asm/dma-mapping_mm.h +++ /dev/null @@ -1,112 +0,0 @@ -#ifndef _M68K_DMA_MAPPING_H -#define _M68K_DMA_MAPPING_H - -#include <asm/cache.h> - -struct scatterlist; - -#ifndef CONFIG_MMU_SUN3 -static inline int dma_supported(struct device *dev, u64 mask) -{ - return 1; -} - -static inline int dma_set_mask(struct device *dev, u64 mask) -{ - return 0; -} - -static inline int dma_get_cache_alignment(void) -{ - return 1 << L1_CACHE_SHIFT; -} - -static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) -{ - return 0; -} - -extern void *dma_alloc_coherent(struct device *, size_t, - dma_addr_t *, gfp_t); -extern void dma_free_coherent(struct device *, size_t, - void *, dma_addr_t); - -static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, - dma_addr_t *handle, gfp_t flag) -{ - return dma_alloc_coherent(dev, size, handle, flag); -} -static inline void dma_free_noncoherent(struct device *dev, size_t size, - void *addr, dma_addr_t handle) -{ - dma_free_coherent(dev, size, addr, handle); -} -static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction dir) -{ - /* we use coherent allocation, so not much to do here. */ -} - -extern dma_addr_t dma_map_single(struct device *, void *, size_t, - enum dma_data_direction); -static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, - size_t size, enum dma_data_direction dir) -{ -} - -extern dma_addr_t dma_map_page(struct device *, struct page *, - unsigned long, size_t size, - enum dma_data_direction); -static inline void dma_unmap_page(struct device *dev, dma_addr_t address, - size_t size, enum dma_data_direction dir) -{ -} - -extern int dma_map_sg(struct device *, struct scatterlist *, int, - enum dma_data_direction); -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, enum dma_data_direction dir) -{ -} - -extern void dma_sync_single_for_device(struct device *, dma_addr_t, size_t, - enum dma_data_direction); -extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int, - enum dma_data_direction); - -static inline void dma_sync_single_range_for_device(struct device *dev, - dma_addr_t dma_handle, unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything for now */ - dma_sync_single_for_device(dev, dma_handle, offset + size, direction); -} - -static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, - size_t size, enum dma_data_direction dir) -{ -} - -static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction dir) -{ -} - -static inline void dma_sync_single_range_for_cpu(struct device *dev, - dma_addr_t dma_handle, unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything for now */ - dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); -} - -static inline int dma_mapping_error(struct device *dev, dma_addr_t handle) -{ - return 0; -} - -#else -#include <asm-generic/dma-mapping-broken.h> -#endif - -#endif /* _M68K_DMA_MAPPING_H */ diff --git a/arch/m68k/include/asm/dma-mapping_no.h b/arch/m68k/include/asm/dma-mapping_no.h deleted file mode 100644 index 1748f2bca94..00000000000 --- a/arch/m68k/include/asm/dma-mapping_no.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _M68KNOMMU_DMA_MAPPING_H -#define _M68KNOMMU_DMA_MAPPING_H - -#include <asm-generic/dma-mapping-broken.h> - -#endif /* _M68KNOMMU_DMA_MAPPING_H */ diff --git a/arch/m68k/include/asm/elf.h b/arch/m68k/include/asm/elf.h index 04ce488bc63..0b0f49eb876 100644 --- a/arch/m68k/include/asm/elf.h +++ b/arch/m68k/include/asm/elf.h @@ -1,5 +1,119 @@ -#ifdef __uClinux__ -#include "elf_no.h" +#ifndef __ASMm68k_ELF_H +#define __ASMm68k_ELF_H + +/* + * ELF register definitions.. + */ + +#include <asm/ptrace.h> +#include <asm/user.h> + +/* + * 68k ELF relocation types + */ +#define R_68K_NONE 0 +#define R_68K_32 1 +#define R_68K_16 2 +#define R_68K_8 3 +#define R_68K_PC32 4 +#define R_68K_PC16 5 +#define R_68K_PC8 6 +#define R_68K_GOT32 7 +#define R_68K_GOT16 8 +#define R_68K_GOT8 9 +#define R_68K_GOT32O 10 +#define R_68K_GOT16O 11 +#define R_68K_GOT8O 12 +#define R_68K_PLT32 13 +#define R_68K_PLT16 14 +#define R_68K_PLT8 15 +#define R_68K_PLT32O 16 +#define R_68K_PLT16O 17 +#define R_68K_PLT8O 18 +#define R_68K_COPY 19 +#define R_68K_GLOB_DAT 20 +#define R_68K_JMP_SLOT 21 +#define R_68K_RELATIVE 22 + +typedef unsigned long elf_greg_t; + +#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct user_m68kfp_struct elf_fpregset_t; + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == EM_68K) + +/* + * These are used to set parameters in the core dumps. + */ +#define ELF_CLASS ELFCLASS32 +#define ELF_DATA ELFDATA2MSB +#define ELF_ARCH EM_68K + +/* For SVR4/m68k the function pointer to be registered with `atexit' is + passed in %a1. Although my copy of the ABI has no such statement, it + is actually used on ASV. */ +#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 + +#define USE_ELF_CORE_DUMP +#ifndef CONFIG_SUN3 +#define ELF_EXEC_PAGESIZE 4096 #else -#include "elf_mm.h" +#define ELF_EXEC_PAGESIZE 8192 +#endif + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#ifndef CONFIG_SUN3 +#define ELF_ET_DYN_BASE 0xD0000000UL +#else +#define ELF_ET_DYN_BASE 0x0D800000UL +#endif + +#define ELF_CORE_COPY_REGS(pr_reg, regs) \ + /* Bleech. */ \ + pr_reg[0] = regs->d1; \ + pr_reg[1] = regs->d2; \ + pr_reg[2] = regs->d3; \ + pr_reg[3] = regs->d4; \ + pr_reg[4] = regs->d5; \ + pr_reg[7] = regs->a0; \ + pr_reg[8] = regs->a1; \ + pr_reg[9] = regs->a2; \ + pr_reg[14] = regs->d0; \ + pr_reg[15] = rdusp(); \ + pr_reg[16] = regs->orig_d0; \ + pr_reg[17] = regs->sr; \ + pr_reg[18] = regs->pc; \ + pr_reg[19] = (regs->format << 12) | regs->vector; \ + { \ + struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ + pr_reg[5] = sw->d6; \ + pr_reg[6] = sw->d7; \ + pr_reg[10] = sw->a3; \ + pr_reg[11] = sw->a4; \ + pr_reg[12] = sw->a5; \ + pr_reg[13] = sw->a6; \ + } + +/* This yields a mask that user programs can use to figure out what + instruction set this cpu supports. */ + +#define ELF_HWCAP (0) + +/* This yields a string that ld.so will use to load implementation + specific libraries for optimization. This is more specific in + intent than poking at uname or /proc/cpuinfo. */ + +#define ELF_PLATFORM (NULL) + +#define SET_PERSONALITY(ex) set_personality(PER_LINUX) + #endif diff --git a/arch/m68k/include/asm/elf_mm.h b/arch/m68k/include/asm/elf_mm.h deleted file mode 100644 index 0b0f49eb876..00000000000 --- a/arch/m68k/include/asm/elf_mm.h +++ /dev/null @@ -1,119 +0,0 @@ -#ifndef __ASMm68k_ELF_H -#define __ASMm68k_ELF_H - -/* - * ELF register definitions.. - */ - -#include <asm/ptrace.h> -#include <asm/user.h> - -/* - * 68k ELF relocation types - */ -#define R_68K_NONE 0 -#define R_68K_32 1 -#define R_68K_16 2 -#define R_68K_8 3 -#define R_68K_PC32 4 -#define R_68K_PC16 5 -#define R_68K_PC8 6 -#define R_68K_GOT32 7 -#define R_68K_GOT16 8 -#define R_68K_GOT8 9 -#define R_68K_GOT32O 10 -#define R_68K_GOT16O 11 -#define R_68K_GOT8O 12 -#define R_68K_PLT32 13 -#define R_68K_PLT16 14 -#define R_68K_PLT8 15 -#define R_68K_PLT32O 16 -#define R_68K_PLT16O 17 -#define R_68K_PLT8O 18 -#define R_68K_COPY 19 -#define R_68K_GLOB_DAT 20 -#define R_68K_JMP_SLOT 21 -#define R_68K_RELATIVE 22 - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_m68kfp_struct elf_fpregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_68K) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB -#define ELF_ARCH EM_68K - -/* For SVR4/m68k the function pointer to be registered with `atexit' is - passed in %a1. Although my copy of the ABI has no such statement, it - is actually used on ASV. */ -#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 - -#define USE_ELF_CORE_DUMP -#ifndef CONFIG_SUN3 -#define ELF_EXEC_PAGESIZE 4096 -#else -#define ELF_EXEC_PAGESIZE 8192 -#endif - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#ifndef CONFIG_SUN3 -#define ELF_ET_DYN_BASE 0xD0000000UL -#else -#define ELF_ET_DYN_BASE 0x0D800000UL -#endif - -#define ELF_CORE_COPY_REGS(pr_reg, regs) \ - /* Bleech. */ \ - pr_reg[0] = regs->d1; \ - pr_reg[1] = regs->d2; \ - pr_reg[2] = regs->d3; \ - pr_reg[3] = regs->d4; \ - pr_reg[4] = regs->d5; \ - pr_reg[7] = regs->a0; \ - pr_reg[8] = regs->a1; \ - pr_reg[9] = regs->a2; \ - pr_reg[14] = regs->d0; \ - pr_reg[15] = rdusp(); \ - pr_reg[16] = regs->orig_d0; \ - pr_reg[17] = regs->sr; \ - pr_reg[18] = regs->pc; \ - pr_reg[19] = (regs->format << 12) | regs->vector; \ - { \ - struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ - pr_reg[5] = sw->d6; \ - pr_reg[6] = sw->d7; \ - pr_reg[10] = sw->a3; \ - pr_reg[11] = sw->a4; \ - pr_reg[12] = sw->a5; \ - pr_reg[13] = sw->a6; \ - } - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ - -#define ELF_HWCAP (0) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex) set_personality(PER_LINUX) - -#endif diff --git a/arch/m68k/include/asm/elf_no.h b/arch/m68k/include/asm/elf_no.h deleted file mode 100644 index b8046837f38..00000000000 --- a/arch/m68k/include/asm/elf_no.h +++ /dev/null @@ -1,110 +0,0 @@ -#ifndef __ASMm68k_ELF_H -#define __ASMm68k_ELF_H - -/* - * ELF register definitions.. - */ - -#include <asm/ptrace.h> -#include <asm/user.h> - -/* - * 68k ELF relocation types - */ -#define R_68K_NONE 0 -#define R_68K_32 1 -#define R_68K_16 2 -#define R_68K_8 3 -#define R_68K_PC32 4 -#define R_68K_PC16 5 -#define R_68K_PC8 6 -#define R_68K_GOT32 7 -#define R_68K_GOT16 8 -#define R_68K_GOT8 9 -#define R_68K_GOT32O 10 -#define R_68K_GOT16O 11 -#define R_68K_GOT8O 12 -#define R_68K_PLT32 13 -#define R_68K_PLT16 14 -#define R_68K_PLT8 15 -#define R_68K_PLT32O 16 -#define R_68K_PLT16O 17 -#define R_68K_PLT8O 18 -#define R_68K_COPY 19 -#define R_68K_GLOB_DAT 20 -#define R_68K_JMP_SLOT 21 -#define R_68K_RELATIVE 22 - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_m68kfp_struct elf_fpregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_68K) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB -#define ELF_ARCH EM_68K - -/* For SVR4/m68k the function pointer to be registered with `atexit' is - passed in %a1. Although my copy of the ABI has no such statement, it - is actually used on ASV. */ -#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE 0xD0000000UL - -#define ELF_CORE_COPY_REGS(pr_reg, regs) \ - /* Bleech. */ \ - pr_reg[0] = regs->d1; \ - pr_reg[1] = regs->d2; \ - pr_reg[2] = regs->d3; \ - pr_reg[3] = regs->d4; \ - pr_reg[4] = regs->d5; \ - pr_reg[7] = regs->a0; \ - pr_reg[8] = regs->a1; \ - pr_reg[14] = regs->d0; \ - pr_reg[15] = rdusp(); \ - pr_reg[16] = 0 /* regs->orig_d0 */; \ - pr_reg[17] = regs->sr; \ - pr_reg[18] = regs->pc; \ - /* pr_reg[19] = (regs->format << 12) | regs->vector; */ \ - { \ - struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ - pr_reg[5] = sw->d6; \ - pr_reg[6] = sw->d7; \ - pr_reg[10] = sw->a3; \ - pr_reg[11] = sw->a4; \ - pr_reg[12] = sw->a5; \ - pr_reg[13] = sw->a6; \ - } - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ - -#define ELF_HWCAP (0) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex) set_personality(PER_LINUX) - -#endif diff --git a/arch/m68k/include/asm/fb.h b/arch/m68k/include/asm/fb.h index 97bcaefd206..be4e4c6797e 100644 --- a/arch/m68k/include/asm/fb.h +++ b/arch/m68k/include/asm/fb.h @@ -1,5 +1,38 @@ -#ifdef __uClinux__ -#include "fb_no.h" +#ifndef _ASM_FB_H_ +#define _ASM_FB_H_ + +#include <linux/fb.h> +#include <linux/fs.h> +#include <asm/page.h> +#include <asm/setup.h> + +#ifdef CONFIG_MMU +#ifdef CONFIG_SUN3 +static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, + unsigned long off) +{ + pgprot_val(vma->vm_page_prot) |= SUN3_PAGE_NOCACHE; +} #else -#include "fb_mm.h" -#endif +static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, + unsigned long off) +{ + if (CPU_IS_020_OR_030) + pgprot_val(vma->vm_page_prot) |= _PAGE_NOCACHE030; + if (CPU_IS_040_OR_060) { + pgprot_val(vma->vm_page_prot) &= _CACHEMASK040; + /* Use no-cache mode, serialized */ + pgprot_val(vma->vm_page_prot) |= _PAGE_NOCACHE_S; + } +} +#endif /* CONFIG_SUN3 */ +#else +#define fb_pgprotect(...) do {} while (0) +#endif /* CONFIG_MMU */ + +static inline int fb_is_primary_device(struct fb_info *info) +{ + return 0; +} + +#endif /* _ASM_FB_H_ */ diff --git a/arch/m68k/include/asm/fb_mm.h b/arch/m68k/include/asm/fb_mm.h deleted file mode 100644 index 380b97ae815..00000000000 --- a/arch/m68k/include/asm/fb_mm.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include <linux/fb.h> -#include <linux/fs.h> -#include <asm/page.h> -#include <asm/setup.h> - -#ifdef CONFIG_SUN3 -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - pgprot_val(vma->vm_page_prot) |= SUN3_PAGE_NOCACHE; -} -#else -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - if (CPU_IS_020_OR_030) - pgprot_val(vma->vm_page_prot) |= _PAGE_NOCACHE030; - if (CPU_IS_040_OR_060) { - pgprot_val(vma->vm_page_prot) &= _CACHEMASK040; - /* Use no-cache mode, serialized */ - pgprot_val(vma->vm_page_prot) |= _PAGE_NOCACHE_S; - } -} -#endif /* CONFIG_SUN3 */ - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/arch/m68k/include/asm/fb_no.h b/arch/m68k/include/asm/fb_no.h deleted file mode 100644 index c7df3803099..00000000000 --- a/arch/m68k/include/asm/fb_no.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ -#include <linux/fb.h> - -#define fb_pgprotect(...) do {} while (0) - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/arch/m68k/include/asm/fpu.h b/arch/m68k/include/asm/fpu.h index e19bc5ed9c3..ffb6b8cfc6d 100644 --- a/arch/m68k/include/asm/fpu.h +++ b/arch/m68k/include/asm/fpu.h @@ -1,5 +1,21 @@ -#ifdef __uClinux__ -#include "fpu_no.h" +#ifndef __M68K_FPU_H +#define __M68K_FPU_H + + +/* + * MAX floating point unit state size (FSAVE/FRESTORE) + */ + +#if defined(CONFIG_M68020) || defined(CONFIG_M68030) +#define FPSTATESIZE (216) +#elif defined(CONFIG_M68040) +#define FPSTATESIZE (96) +#elif defined(CONFIG_M68KFPU_EMU) +#define FPSTATESIZE (28) +#elif defined(CONFIG_M68060) +#define FPSTATESIZE (12) #else -#include "fpu_mm.h" +#define FPSTATESIZE (0) #endif + +#endif /* __M68K_FPU_H */ diff --git a/arch/m68k/include/asm/fpu_mm.h b/arch/m68k/include/asm/fpu_mm.h deleted file mode 100644 index ffb6b8cfc6d..00000000000 --- a/arch/m68k/include/asm/fpu_mm.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __M68K_FPU_H -#define __M68K_FPU_H - - -/* - * MAX floating point unit state size (FSAVE/FRESTORE) - */ - -#if defined(CONFIG_M68020) || defined(CONFIG_M68030) -#define FPSTATESIZE (216) -#elif defined(CONFIG_M68040) -#define FPSTATESIZE (96) -#elif defined(CONFIG_M68KFPU_EMU) -#define FPSTATESIZE (28) -#elif defined(CONFIG_M68060) -#define FPSTATESIZE (12) -#else -#define FPSTATESIZE (0) -#endif - -#endif /* __M68K_FPU_H */ diff --git a/arch/m68k/include/asm/fpu_no.h b/arch/m68k/include/asm/fpu_no.h deleted file mode 100644 index b16b2e4fca2..00000000000 --- a/arch/m68k/include/asm/fpu_no.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __M68KNOMMU_FPU_H -#define __M68KNOMMU_FPU_H - - -/* - * MAX floating point unit state size (FSAVE/FRESTORE) - */ -#if defined(CONFIG_M68020) || defined(CONFIG_M68030) -#define FPSTATESIZE (216/sizeof(unsigned char)) -#elif defined(CONFIG_M68040) -#define FPSTATESIZE (96/sizeof(unsigned char)) -#elif defined(CONFIG_M68KFPU_EMU) -#define FPSTATESIZE (28/sizeof(unsigned char)) -#elif defined(CONFIG_M68060) -#define FPSTATESIZE (12/sizeof(unsigned char)) -#else -/* Assume no FP unit present then... */ -#define FPSTATESIZE (2) /* dummy size */ -#endif - -#endif /* __M68K_FPU_H */ diff --git a/arch/m68k/include/asm/hw_irq.h b/arch/m68k/include/asm/hw_irq.h index e1952601589..eacef0951fb 100644 --- a/arch/m68k/include/asm/hw_irq.h +++ b/arch/m68k/include/asm/hw_irq.h @@ -1,5 +1,6 @@ -#ifdef __uClinux__ -#include "hw_irq_no.h" -#else -#include "hw_irq_mm.h" +#ifndef __ASM_M68K_HW_IRQ_H +#define __ASM_M68K_HW_IRQ_H + +/* Dummy include. */ + #endif diff --git a/arch/m68k/include/asm/hw_irq_mm.h b/arch/m68k/include/asm/hw_irq_mm.h deleted file mode 100644 index eacef0951fb..00000000000 --- a/arch/m68k/include/asm/hw_irq_mm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_M68K_HW_IRQ_H -#define __ASM_M68K_HW_IRQ_H - -/* Dummy include. */ - -#endif diff --git a/arch/m68k/include/asm/hw_irq_no.h b/arch/m68k/include/asm/hw_irq_no.h deleted file mode 100644 index f3ec9e5ae04..00000000000 --- a/arch/m68k/include/asm/hw_irq_no.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __M68KNOMMU_HW_IRQ_H__ -#define __M68KNOMMU_HW_IRQ_H__ - -#endif /* __M68KNOMMU_HW_IRQ_H__ */ diff --git a/arch/m68k/include/asm/kmap_types.h b/arch/m68k/include/asm/kmap_types.h index 045d9fd122a..c843c63d380 100644 --- a/arch/m68k/include/asm/kmap_types.h +++ b/arch/m68k/include/asm/kmap_types.h @@ -1,5 +1,21 @@ -#ifdef __uClinux__ -#include "kmap_types_no.h" -#else -#include "kmap_types_mm.h" -#endif +#ifndef __ASM_M68K_KMAP_TYPES_H +#define __ASM_M68K_KMAP_TYPES_H + +enum km_type { + KM_BOUNCE_READ, + KM_SKB_SUNRPC_DATA, + KM_SKB_DATA_SOFTIRQ, + KM_USER0, + KM_USER1, + KM_BIO_SRC_IRQ, + KM_BIO_DST_IRQ, + KM_PTE0, + KM_PTE1, + KM_IRQ0, + KM_IRQ1, + KM_SOFTIRQ0, + KM_SOFTIRQ1, + KM_TYPE_NR +}; + +#endif /* __ASM_M68K_KMAP_TYPES_H */ diff --git a/arch/m68k/include/asm/kmap_types_mm.h b/arch/m68k/include/asm/kmap_types_mm.h deleted file mode 100644 index c843c63d380..00000000000 --- a/arch/m68k/include/asm/kmap_types_mm.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_M68K_KMAP_TYPES_H -#define __ASM_M68K_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif /* __ASM_M68K_KMAP_TYPES_H */ diff --git a/arch/m68k/include/asm/kmap_types_no.h b/arch/m68k/include/asm/kmap_types_no.h deleted file mode 100644 index bfb6707575d..00000000000 --- a/arch/m68k/include/asm/kmap_types_no.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_M68K_KMAP_TYPES_H -#define __ASM_M68K_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 1835fd20a82..ce603451b55 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -16,6 +16,7 @@ #define MCFINT_VECBASE 64 #define MCFINT_UART0 26 /* Interrupt number for UART0 */ #define MCFINT_UART1 27 /* Interrupt number for UART1 */ +#define MCFINT_UART2 28 /* Interrupt number for UART2 */ #define MCF_WTM_WCR MCF_REG16(0xFC098000) diff --git a/arch/m68k/include/asm/mc146818rtc.h b/arch/m68k/include/asm/mc146818rtc.h index fb90dcf7842..9f70a01f73d 100644 --- a/arch/m68k/include/asm/mc146818rtc.h +++ b/arch/m68k/include/asm/mc146818rtc.h @@ -1,5 +1,26 @@ -#ifdef __uClinux__ -#include "mc146818rtc_no.h" -#else -#include "mc146818rtc_mm.h" -#endif +/* + * Machine dependent access functions for RTC registers. + */ +#ifndef _ASM_MC146818RTC_H +#define _ASM_MC146818RTC_H + + +#ifdef CONFIG_ATARI +/* RTC in Atari machines */ + +#include <asm/atarihw.h> + +#define RTC_PORT(x) (TT_RTC_BAS + 2*(x)) +#define RTC_ALWAYS_BCD 0 + +#define CMOS_READ(addr) ({ \ +atari_outb_p((addr),RTC_PORT(0)); \ +atari_inb_p(RTC_PORT(1)); \ +}) +#define CMOS_WRITE(val, addr) ({ \ +atari_outb_p((addr),RTC_PORT(0)); \ +atari_outb_p((val),RTC_PORT(1)); \ +}) +#endif /* CONFIG_ATARI */ + +#endif /* _ASM_MC146818RTC_H */ diff --git a/arch/m68k/include/asm/mc146818rtc_mm.h b/arch/m68k/include/asm/mc146818rtc_mm.h deleted file mode 100644 index 9f70a01f73d..00000000000 --- a/arch/m68k/include/asm/mc146818rtc_mm.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef _ASM_MC146818RTC_H -#define _ASM_MC146818RTC_H - - -#ifdef CONFIG_ATARI -/* RTC in Atari machines */ - -#include <asm/atarihw.h> - -#define RTC_PORT(x) (TT_RTC_BAS + 2*(x)) -#define RTC_ALWAYS_BCD 0 - -#define CMOS_READ(addr) ({ \ -atari_outb_p((addr),RTC_PORT(0)); \ -atari_inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -atari_outb_p((addr),RTC_PORT(0)); \ -atari_outb_p((val),RTC_PORT(1)); \ -}) -#endif /* CONFIG_ATARI */ - -#endif /* _ASM_MC146818RTC_H */ diff --git a/arch/m68k/include/asm/mc146818rtc_no.h b/arch/m68k/include/asm/mc146818rtc_no.h deleted file mode 100644 index 907a0481a14..00000000000 --- a/arch/m68k/include/asm/mc146818rtc_no.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef _M68KNOMMU_MC146818RTC_H -#define _M68KNOMMU_MC146818RTC_H - -/* empty include file to satisfy the include in genrtc.c/ide-geometry.c */ - -#endif /* _M68KNOMMU_MC146818RTC_H */ diff --git a/arch/m68k/include/asm/mcfpci.h b/arch/m68k/include/asm/mcfpci.h deleted file mode 100644 index f1507dd06ec..00000000000 --- a/arch/m68k/include/asm/mcfpci.h +++ /dev/null @@ -1,119 +0,0 @@ -/****************************************************************************/ - -/* - * mcfpci.h -- PCI bridge on ColdFire eval boards. - * - * (C) Copyright 2000, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfpci_h -#define mcfpci_h -/****************************************************************************/ - - -#ifdef CONFIG_PCI - -/* - * Address regions in the PCI address space are not mapped into the - * normal memory space of the ColdFire. They must be accessed via - * handler routines. This is easy for I/O space (inb/outb/etc) but - * needs some code changes to support ordinary memory. Interrupts - * also need to be vectored through the PCI handler first, then it - * will call the actual driver sub-handlers. - */ - -/* - * Un-define all the standard I/O access routines. - */ -#undef inb -#undef inw -#undef inl -#undef inb_p -#undef inw_p -#undef insb -#undef insw -#undef insl -#undef outb -#undef outw -#undef outl -#undef outb_p -#undef outw_p -#undef outsb -#undef outsw -#undef outsl - -#undef request_irq -#undef free_irq - -#undef bus_to_virt -#undef virt_to_bus - - -/* - * Re-direct all I/O memory accesses functions to PCI specific ones. - */ -#define inb pci_inb -#define inw pci_inw -#define inl pci_inl -#define inb_p pci_inb -#define inw_p pci_inw -#define insb pci_insb -#define insw pci_insw -#define insl pci_insl - -#define outb pci_outb -#define outw pci_outw -#define outl pci_outl -#define outb_p pci_outb -#define outw_p pci_outw -#define outsb pci_outsb -#define outsw pci_outsw -#define outsl pci_outsl - -#define request_irq pci_request_irq -#define free_irq pci_free_irq - -#define virt_to_bus pci_virt_to_bus -#define bus_to_virt pci_bus_to_virt - -#define CONFIG_COMEMPCI 1 - - -/* - * Prototypes of the real PCI functions (defined in bios32.c). - */ -unsigned char pci_inb(unsigned int addr); -unsigned short pci_inw(unsigned int addr); -unsigned int pci_inl(unsigned int addr); -void pci_insb(void *addr, void *buf, int len); -void pci_insw(void *addr, void *buf, int len); -void pci_insl(void *addr, void *buf, int len); - -void pci_outb(unsigned char val, unsigned int addr); -void pci_outw(unsigned short val, unsigned int addr); -void pci_outl(unsigned int val, unsigned int addr); -void pci_outsb(void *addr, void *buf, int len); -void pci_outsw(void *addr, void *buf, int len); -void pci_outsl(void *addr, void *buf, int len); - -int pci_request_irq(unsigned int irq, - void (*handler)(int, void *, struct pt_regs *), - unsigned long flags, - const char *device, - void *dev_id); -void pci_free_irq(unsigned int irq, void *dev_id); - -void *pci_bmalloc(int size); -void pci_bmfree(void *bmp, int len); -void pci_copytoshmem(unsigned long bmp, void *src, int size); -void pci_copyfromshmem(void *dst, unsigned long bmp, int size); -unsigned long pci_virt_to_bus(volatile void *address); -void *pci_bus_to_virt(unsigned long address); -void pci_bmcpyto(void *dst, void *src, int len); -void pci_bmcpyfrom(void *dst, void *src, int len); - -#endif /* CONFIG_PCI */ -/****************************************************************************/ -#endif /* mcfpci_h */ diff --git a/arch/m68k/include/asm/mmu.h b/arch/m68k/include/asm/mmu.h index a81d3946675..8a11a63ee15 100644 --- a/arch/m68k/include/asm/mmu.h +++ b/arch/m68k/include/asm/mmu.h @@ -1,5 +1,13 @@ -#ifdef __uClinux__ -#include "mmu_no.h" +#ifndef __MMU_H +#define __MMU_H + +#ifdef CONFIG_MMU +/* Default "unsigned long" context */ +typedef unsigned long mm_context_t; #else -#include "mmu_mm.h" +typedef struct { + unsigned long end_brk; +} mm_context_t; +#endif + #endif diff --git a/arch/m68k/include/asm/mmu_context.h b/arch/m68k/include/asm/mmu_context.h index b440928fc6c..7d4341e55a9 100644 --- a/arch/m68k/include/asm/mmu_context.h +++ b/arch/m68k/include/asm/mmu_context.h @@ -1,5 +1,175 @@ -#ifdef __uClinux__ -#include "mmu_context_no.h" +#ifndef __M68K_MMU_CONTEXT_H +#define __M68K_MMU_CONTEXT_H + +#include <asm-generic/mm_hooks.h> + +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +#ifdef CONFIG_MMU +#ifndef CONFIG_SUN3 + +#include <asm/setup.h> +#include <asm/page.h> +#include <asm/pgalloc.h> + +static inline int init_new_context(struct task_struct *tsk, + struct mm_struct *mm) +{ + mm->context = virt_to_phys(mm->pgd); + return 0; +} + +#define destroy_context(mm) do { } while(0) + +static inline void switch_mm_0230(struct mm_struct *mm) +{ + unsigned long crp[2] = { + 0x80000000 | _PAGE_TABLE, mm->context + }; + unsigned long tmp; + + asm volatile (".chip 68030"); + + /* flush MC68030/MC68020 caches (they are virtually addressed) */ + asm volatile ( + "movec %%cacr,%0;" + "orw %1,%0; " + "movec %0,%%cacr" + : "=d" (tmp) : "di" (FLUSH_I_AND_D)); + + /* Switch the root pointer. For a 030-only kernel, + * avoid flushing the whole ATC, we only need to + * flush the user entries. The 68851 does this by + * itself. Avoid a runtime check here. + */ + asm volatile ( +#ifdef CPU_M68030_ONLY + "pmovefd %0,%%crp; " + "pflush #0,#4" #else -#include "mmu_context_mm.h" + "pmove %0,%%crp" #endif + : : "m" (crp[0])); + + asm volatile (".chip 68k"); +} + +static inline void switch_mm_0460(struct mm_struct *mm) +{ + asm volatile (".chip 68040"); + + /* flush address translation cache (user entries) */ + asm volatile ("pflushan"); + + /* switch the root pointer */ + asm volatile ("movec %0,%%urp" : : "r" (mm->context)); + + if (CPU_IS_060) { + unsigned long tmp; + + /* clear user entries in the branch cache */ + asm volatile ( + "movec %%cacr,%0; " + "orl %1,%0; " + "movec %0,%%cacr" + : "=d" (tmp): "di" (0x00200000)); + } + + asm volatile (".chip 68k"); +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) +{ + if (prev != next) { + if (CPU_IS_020_OR_030) + switch_mm_0230(next); + else + switch_mm_0460(next); + } +} + +#define deactivate_mm(tsk,mm) do { } while (0) + +static inline void activate_mm(struct mm_struct *prev_mm, + struct mm_struct *next_mm) +{ + next_mm->context = virt_to_phys(next_mm->pgd); + + if (CPU_IS_020_OR_030) + switch_mm_0230(next_mm); + else + switch_mm_0460(next_mm); +} + +#else /* CONFIG_SUN3 */ +#include <asm/sun3mmu.h> +#include <linux/sched.h> + +extern unsigned long get_free_context(struct mm_struct *mm); +extern void clear_context(unsigned long context); + +/* set the context for a new task to unmapped */ +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) +{ + mm->context = SUN3_INVALID_CONTEXT; + return 0; +} + +/* find the context given to this process, and if it hasn't already + got one, go get one for it. */ +static inline void get_mmu_context(struct mm_struct *mm) +{ + if(mm->context == SUN3_INVALID_CONTEXT) + mm->context = get_free_context(mm); +} + +/* flush context if allocated... */ +static inline void destroy_context(struct mm_struct *mm) +{ + if(mm->context != SUN3_INVALID_CONTEXT) + clear_context(mm->context); +} + +static inline void activate_context(struct mm_struct *mm) +{ + get_mmu_context(mm); + sun3_put_context(mm->context); +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) +{ + activate_context(tsk->mm); +} + +#define deactivate_mm(tsk,mm) do { } while (0) + +static inline void activate_mm(struct mm_struct *prev_mm, + struct mm_struct *next_mm) +{ + activate_context(next_mm); +} + +#endif +#else /* !CONFIG_MMU */ + +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) +{ + return 0; +} + + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) +{ +} + +#define destroy_context(mm) do { } while (0) +#define deactivate_mm(tsk,mm) do { } while (0) + +static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm) +{ +} + +#endif /* CONFIG_MMU */ +#endif /* __M68K_MMU_CONTEXT_H */ diff --git a/arch/m68k/include/asm/mmu_context_mm.h b/arch/m68k/include/asm/mmu_context_mm.h deleted file mode 100644 index 894dacbcee1..00000000000 --- a/arch/m68k/include/asm/mmu_context_mm.h +++ /dev/null @@ -1,154 +0,0 @@ -#ifndef __M68K_MMU_CONTEXT_H -#define __M68K_MMU_CONTEXT_H - -#include <asm-generic/mm_hooks.h> - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -#ifndef CONFIG_SUN3 - -#include <asm/setup.h> -#include <asm/page.h> -#include <asm/pgalloc.h> - -static inline int init_new_context(struct task_struct *tsk, - struct mm_struct *mm) -{ - mm->context = virt_to_phys(mm->pgd); - return 0; -} - -#define destroy_context(mm) do { } while(0) - -static inline void switch_mm_0230(struct mm_struct *mm) -{ - unsigned long crp[2] = { - 0x80000000 | _PAGE_TABLE, mm->context - }; - unsigned long tmp; - - asm volatile (".chip 68030"); - - /* flush MC68030/MC68020 caches (they are virtually addressed) */ - asm volatile ( - "movec %%cacr,%0;" - "orw %1,%0; " - "movec %0,%%cacr" - : "=d" (tmp) : "di" (FLUSH_I_AND_D)); - - /* Switch the root pointer. For a 030-only kernel, - * avoid flushing the whole ATC, we only need to - * flush the user entries. The 68851 does this by - * itself. Avoid a runtime check here. - */ - asm volatile ( -#ifdef CPU_M68030_ONLY - "pmovefd %0,%%crp; " - "pflush #0,#4" -#else - "pmove %0,%%crp" -#endif - : : "m" (crp[0])); - - asm volatile (".chip 68k"); -} - -static inline void switch_mm_0460(struct mm_struct *mm) -{ - asm volatile (".chip 68040"); - - /* flush address translation cache (user entries) */ - asm volatile ("pflushan"); - - /* switch the root pointer */ - asm volatile ("movec %0,%%urp" : : "r" (mm->context)); - - if (CPU_IS_060) { - unsigned long tmp; - - /* clear user entries in the branch cache */ - asm volatile ( - "movec %%cacr,%0; " - "orl %1,%0; " - "movec %0,%%cacr" - : "=d" (tmp): "di" (0x00200000)); - } - - asm volatile (".chip 68k"); -} - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) -{ - if (prev != next) { - if (CPU_IS_020_OR_030) - switch_mm_0230(next); - else - switch_mm_0460(next); - } -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev_mm, - struct mm_struct *next_mm) -{ - next_mm->context = virt_to_phys(next_mm->pgd); - - if (CPU_IS_020_OR_030) - switch_mm_0230(next_mm); - else - switch_mm_0460(next_mm); -} - -#else /* CONFIG_SUN3 */ -#include <asm/sun3mmu.h> -#include <linux/sched.h> - -extern unsigned long get_free_context(struct mm_struct *mm); -extern void clear_context(unsigned long context); - -/* set the context for a new task to unmapped */ -static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) -{ - mm->context = SUN3_INVALID_CONTEXT; - return 0; -} - -/* find the context given to this process, and if it hasn't already - got one, go get one for it. */ -static inline void get_mmu_context(struct mm_struct *mm) -{ - if(mm->context == SUN3_INVALID_CONTEXT) - mm->context = get_free_context(mm); -} - -/* flush context if allocated... */ -static inline void destroy_context(struct mm_struct *mm) -{ - if(mm->context != SUN3_INVALID_CONTEXT) - clear_context(mm->context); -} - -static inline void activate_context(struct mm_struct *mm) -{ - get_mmu_context(mm); - sun3_put_context(mm->context); -} - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) -{ - activate_context(tsk->mm); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev_mm, - struct mm_struct *next_mm) -{ - activate_context(next_mm); -} - -#endif -#endif diff --git a/arch/m68k/include/asm/mmu_context_no.h b/arch/m68k/include/asm/mmu_context_no.h deleted file mode 100644 index 9ccee4278c9..00000000000 --- a/arch/m68k/include/asm/mmu_context_no.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __M68KNOMMU_MMU_CONTEXT_H -#define __M68KNOMMU_MMU_CONTEXT_H - -#include <asm/setup.h> -#include <asm/page.h> -#include <asm/pgalloc.h> -#include <asm-generic/mm_hooks.h> - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -static inline int -init_new_context(struct task_struct *tsk, struct mm_struct *mm) -{ - // mm->context = virt_to_phys(mm->pgd); - return(0); -} - -#define destroy_context(mm) do { } while(0) - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) -{ -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev_mm, - struct mm_struct *next_mm) -{ -} - -#endif diff --git a/arch/m68k/include/asm/mmu_mm.h b/arch/m68k/include/asm/mmu_mm.h deleted file mode 100644 index ccd36d26615..00000000000 --- a/arch/m68k/include/asm/mmu_mm.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_t; - -#endif diff --git a/arch/m68k/include/asm/mmu_no.h b/arch/m68k/include/asm/mmu_no.h deleted file mode 100644 index e2da1e6f09f..00000000000 --- a/arch/m68k/include/asm/mmu_no.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __M68KNOMMU_MMU_H -#define __M68KNOMMU_MMU_H - -/* Copyright (C) 2002, David McCullough <davidm@snapgear.com> */ - -typedef struct { - unsigned long end_brk; -} mm_context_t; - -#endif /* __M68KNOMMU_MMU_H */ diff --git a/arch/m68k/include/asm/module.h b/arch/m68k/include/asm/module.h index 79b59d137dd..5f21e11071b 100644 --- a/arch/m68k/include/asm/module.h +++ b/arch/m68k/include/asm/module.h @@ -1,5 +1,48 @@ -#ifdef __uClinux__ -#include "module_no.h" +#ifndef _ASM_M68K_MODULE_H +#define _ASM_M68K_MODULE_H + +#ifdef CONFIG_MMU + +struct mod_arch_specific { + struct m68k_fixup_info *fixup_start, *fixup_end; +}; + +#define MODULE_ARCH_INIT { \ + .fixup_start = __start_fixup, \ + .fixup_end = __stop_fixup, \ +} + + +enum m68k_fixup_type { + m68k_fixup_memoffset, + m68k_fixup_vnode_shift, +}; + +struct m68k_fixup_info { + enum m68k_fixup_type type; + void *addr; +}; + +#define m68k_fixup(type, addr) \ + " .section \".m68k_fixup\",\"aw\"\n" \ + " .long " #type "," #addr "\n" \ + " .previous\n" + +extern struct m68k_fixup_info __start_fixup[], __stop_fixup[]; + +struct module; +extern void module_fixup(struct module *mod, struct m68k_fixup_info *start, + struct m68k_fixup_info *end); + #else -#include "module_mm.h" -#endif + +struct mod_arch_specific { +}; + +#endif /* CONFIG_MMU */ + +#define Elf_Shdr Elf32_Shdr +#define Elf_Sym Elf32_Sym +#define Elf_Ehdr Elf32_Ehdr + +#endif /* _ASM_M68K_MODULE_H */ diff --git a/arch/m68k/include/asm/module_mm.h b/arch/m68k/include/asm/module_mm.h deleted file mode 100644 index 382d20a6fc1..00000000000 --- a/arch/m68k/include/asm/module_mm.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef _ASM_M68K_MODULE_H -#define _ASM_M68K_MODULE_H - -struct mod_arch_specific { - struct m68k_fixup_info *fixup_start, *fixup_end; -}; - -#define MODULE_ARCH_INIT { \ - .fixup_start = __start_fixup, \ - .fixup_end = __stop_fixup, \ -} - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - - -enum m68k_fixup_type { - m68k_fixup_memoffset, - m68k_fixup_vnode_shift, -}; - -struct m68k_fixup_info { - enum m68k_fixup_type type; - void *addr; -}; - -#define m68k_fixup(type, addr) \ - " .section \".m68k_fixup\",\"aw\"\n" \ - " .long " #type "," #addr "\n" \ - " .previous\n" - -extern struct m68k_fixup_info __start_fixup[], __stop_fixup[]; - -struct module; -extern void module_fixup(struct module *mod, struct m68k_fixup_info *start, - struct m68k_fixup_info *end); - -#endif /* _ASM_M68K_MODULE_H */ diff --git a/arch/m68k/include/asm/module_no.h b/arch/m68k/include/asm/module_no.h deleted file mode 100644 index 2e45ab50b23..00000000000 --- a/arch/m68k/include/asm/module_no.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef ASM_M68KNOMMU_MODULE_H -#define ASM_M68KNOMMU_MODULE_H - -struct mod_arch_specific { -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -#endif /* ASM_M68KNOMMU_MODULE_H */ diff --git a/arch/m68k/include/asm/page_offset.h b/arch/m68k/include/asm/page_offset.h index 66455c849fb..1780152d81d 100644 --- a/arch/m68k/include/asm/page_offset.h +++ b/arch/m68k/include/asm/page_offset.h @@ -1,5 +1,11 @@ -#ifdef __uClinux__ -#include "page_offset_no.h" +/* This handles the memory map.. */ + +#ifdef CONFIG_MMU +#ifndef CONFIG_SUN3 +#define PAGE_OFFSET_RAW 0x00000000 #else -#include "page_offset_mm.h" +#define PAGE_OFFSET_RAW 0x0E000000 +#endif +#else +#define PAGE_OFFSET_RAW CONFIG_RAMBASE #endif diff --git a/arch/m68k/include/asm/page_offset_mm.h b/arch/m68k/include/asm/page_offset_mm.h deleted file mode 100644 index 1cbdb7f30ac..00000000000 --- a/arch/m68k/include/asm/page_offset_mm.h +++ /dev/null @@ -1,8 +0,0 @@ - -/* This handles the memory map.. */ -#ifndef CONFIG_SUN3 -#define PAGE_OFFSET_RAW 0x00000000 -#else -#define PAGE_OFFSET_RAW 0x0E000000 -#endif - diff --git a/arch/m68k/include/asm/page_offset_no.h b/arch/m68k/include/asm/page_offset_no.h deleted file mode 100644 index d4e73e0ba64..00000000000 --- a/arch/m68k/include/asm/page_offset_no.h +++ /dev/null @@ -1,5 +0,0 @@ - - -/* This handles the memory map.. */ -#define PAGE_OFFSET_RAW CONFIG_RAMBASE - diff --git a/arch/m68k/include/asm/pci.h b/arch/m68k/include/asm/pci.h index dbea9537308..4ad0aea48ab 100644 --- a/arch/m68k/include/asm/pci.h +++ b/arch/m68k/include/asm/pci.h @@ -1,5 +1,12 @@ -#ifdef __uClinux__ -#include "pci_no.h" -#else -#include "pci_mm.h" -#endif +#ifndef _ASM_M68K_PCI_H +#define _ASM_M68K_PCI_H + +#include <asm-generic/pci-dma-compat.h> + +/* The PCI address space does equal the physical memory + * address space. The networking and block device layers use + * this boolean for bounce buffer decisions. + */ +#define PCI_DMA_BUS_IS_PHYS (1) + +#endif /* _ASM_M68K_PCI_H */ diff --git a/arch/m68k/include/asm/pci_mm.h b/arch/m68k/include/asm/pci_mm.h deleted file mode 100644 index 4ad0aea48ab..00000000000 --- a/arch/m68k/include/asm/pci_mm.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_M68K_PCI_H -#define _ASM_M68K_PCI_H - -#include <asm-generic/pci-dma-compat.h> - -/* The PCI address space does equal the physical memory - * address space. The networking and block device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (1) - -#endif /* _ASM_M68K_PCI_H */ diff --git a/arch/m68k/include/asm/pci_no.h b/arch/m68k/include/asm/pci_no.h deleted file mode 100644 index 9abbc03c73e..00000000000 --- a/arch/m68k/include/asm/pci_no.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef M68KNOMMU_PCI_H -#define M68KNOMMU_PCI_H - -#include <asm/pci_mm.h> - -#ifdef CONFIG_COMEMPCI -/* - * These are pretty much arbitary with the CoMEM implementation. - * We have the whole address space to ourselves. - */ -#define PCIBIOS_MIN_IO 0x100 -#define PCIBIOS_MIN_MEM 0x00010000 - -#define pcibios_scan_all_fns(a, b) 0 - -/* - * Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) -{ - return 1; -} - -#endif /* CONFIG_COMEMPCI */ - -#endif /* M68KNOMMU_PCI_H */ diff --git a/arch/m68k/include/asm/pgalloc.h b/arch/m68k/include/asm/pgalloc.h index 059cb73e78f..c294aad8a90 100644 --- a/arch/m68k/include/asm/pgalloc.h +++ b/arch/m68k/include/asm/pgalloc.h @@ -1,5 +1,19 @@ -#ifdef __uClinux__ -#include "pgalloc_no.h" +#ifndef M68K_PGALLOC_H +#define M68K_PGALLOC_H + +#include <linux/mm.h> +#include <linux/highmem.h> +#include <asm/setup.h> + +#ifdef CONFIG_MMU +#include <asm/virtconvert.h> +#ifdef CONFIG_SUN3 +#include <asm/sun3_pgalloc.h> #else -#include "pgalloc_mm.h" +#include <asm/motorola_pgalloc.h> #endif + +extern void m68k_setup_node(int node); +#endif + +#endif /* M68K_PGALLOC_H */ diff --git a/arch/m68k/include/asm/pgalloc_mm.h b/arch/m68k/include/asm/pgalloc_mm.h deleted file mode 100644 index 4cb1a57ab76..00000000000 --- a/arch/m68k/include/asm/pgalloc_mm.h +++ /dev/null @@ -1,19 +0,0 @@ - -#ifndef M68K_PGALLOC_H -#define M68K_PGALLOC_H - -#include <linux/mm.h> -#include <linux/highmem.h> -#include <asm/setup.h> -#include <asm/virtconvert.h> - - -#ifdef CONFIG_SUN3 -#include <asm/sun3_pgalloc.h> -#else -#include <asm/motorola_pgalloc.h> -#endif - -extern void m68k_setup_node(int node); - -#endif /* M68K_PGALLOC_H */ diff --git a/arch/m68k/include/asm/pgalloc_no.h b/arch/m68k/include/asm/pgalloc_no.h deleted file mode 100644 index d6352f671ec..00000000000 --- a/arch/m68k/include/asm/pgalloc_no.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _M68KNOMMU_PGALLOC_H -#define _M68KNOMMU_PGALLOC_H - -#include <asm/setup.h> - -#define check_pgt_cache() do { } while (0) - -#endif /* _M68KNOMMU_PGALLOC_H */ diff --git a/arch/m68k/include/asm/pgtable_no.h b/arch/m68k/include/asm/pgtable_no.h index 46251016e82..bf86b29fe64 100644 --- a/arch/m68k/include/asm/pgtable_no.h +++ b/arch/m68k/include/asm/pgtable_no.h @@ -67,4 +67,6 @@ extern unsigned int kobjsize(const void *objp); #include <asm-generic/pgtable.h> +#define check_pgt_cache() do { } while (0) + #endif /* _M68KNOMMU_PGTABLE_H */ diff --git a/arch/m68k/include/asm/rtc.h b/arch/m68k/include/asm/rtc.h index 5d3e0385984..a4d08ea122e 100644 --- a/arch/m68k/include/asm/rtc.h +++ b/arch/m68k/include/asm/rtc.h @@ -36,13 +36,16 @@ static inline unsigned int get_rtc_time(struct rtc_time *time) * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated * by the RTC when initially set to a non-zero value. */ - mach_hwclk(0, time); + if (mach_hwclk) + mach_hwclk(0, time); return RTC_24H; } static inline int set_rtc_time(struct rtc_time *time) { - return mach_hwclk(1, time); + if (mach_hwclk) + return mach_hwclk(1, time); + return -EINVAL; } static inline unsigned int get_rtc_ss(void) diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h index b7e52863625..e27ad902b1c 100644 --- a/arch/m68k/include/asm/scatterlist.h +++ b/arch/m68k/include/asm/scatterlist.h @@ -1,5 +1,23 @@ -#ifdef __uClinux__ -#include "scatterlist_no.h" -#else -#include "scatterlist_mm.h" +#ifndef _M68K_SCATTERLIST_H +#define _M68K_SCATTERLIST_H + +#include <linux/types.h> + +struct scatterlist { +#ifdef CONFIG_DEBUG_SG + unsigned long sg_magic; #endif + unsigned long page_link; + unsigned int offset; + unsigned int length; + + dma_addr_t dma_address; /* A place to hang host-specific addresses at. */ +}; + +/* This is bogus and should go away. */ +#define ISA_DMA_THRESHOLD (0x00ffffff) + +#define sg_dma_address(sg) ((sg)->dma_address) +#define sg_dma_len(sg) ((sg)->length) + +#endif /* !(_M68K_SCATTERLIST_H) */ diff --git a/arch/m68k/include/asm/scatterlist_mm.h b/arch/m68k/include/asm/scatterlist_mm.h deleted file mode 100644 index d3a7a0edfec..00000000000 --- a/arch/m68k/include/asm/scatterlist_mm.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _M68K_SCATTERLIST_H -#define _M68K_SCATTERLIST_H - -#include <linux/types.h> - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - unsigned int length; - - __u32 dma_address; /* A place to hang host-specific addresses at. */ -}; - -/* This is bogus and should go away. */ -#define ISA_DMA_THRESHOLD (0x00ffffff) - -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#endif /* !(_M68K_SCATTERLIST_H) */ diff --git a/arch/m68k/include/asm/scatterlist_no.h b/arch/m68k/include/asm/scatterlist_no.h deleted file mode 100644 index afc4788b0d2..00000000000 --- a/arch/m68k/include/asm/scatterlist_no.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _M68KNOMMU_SCATTERLIST_H -#define _M68KNOMMU_SCATTERLIST_H - -#include <linux/mm.h> -#include <asm/types.h> - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - dma_addr_t dma_address; - unsigned int length; -}; - -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#define ISA_DMA_THRESHOLD (0xffffffff) - -#endif /* !(_M68KNOMMU_SCATTERLIST_H) */ diff --git a/arch/m68k/include/asm/segment.h b/arch/m68k/include/asm/segment.h index 82583bc004b..ee959219fdf 100644 --- a/arch/m68k/include/asm/segment.h +++ b/arch/m68k/include/asm/segment.h @@ -1,5 +1,63 @@ -#ifdef __uClinux__ -#include "segment_no.h" +#ifndef _M68K_SEGMENT_H +#define _M68K_SEGMENT_H + +/* define constants */ +/* Address spaces (FC0-FC2) */ +#define USER_DATA (1) +#ifndef __USER_DS +#define __USER_DS (USER_DATA) +#endif +#define USER_PROGRAM (2) +#define SUPER_DATA (5) +#ifndef __KERNEL_DS +#define __KERNEL_DS (SUPER_DATA) +#endif +#define SUPER_PROGRAM (6) +#define CPU_SPACE (7) + +#ifndef __ASSEMBLY__ + +typedef struct { + unsigned long seg; +} mm_segment_t; + +#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) +#define USER_DS MAKE_MM_SEG(__USER_DS) +#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) + +/* + * Get/set the SFC/DFC registers for MOVES instructions + */ + +static inline mm_segment_t get_fs(void) +{ +#ifdef CONFIG_MMU + mm_segment_t _v; + __asm__ ("movec %/dfc,%0":"=r" (_v.seg):); + + return _v; #else -#include "segment_mm.h" + return USER_DS; +#endif +} + +static inline mm_segment_t get_ds(void) +{ + /* return the supervisor data space code */ + return KERNEL_DS; +} + +static inline void set_fs(mm_segment_t val) +{ +#ifdef CONFIG_MMU + __asm__ __volatile__ ("movec %0,%/sfc\n\t" + "movec %0,%/dfc\n\t" + : /* no outputs */ : "r" (val.seg) : "memory"); #endif +} + +#define segment_eq(a,b) ((a).seg == (b).seg) + +#endif /* __ASSEMBLY__ */ + +#endif /* _M68K_SEGMENT_H */ diff --git a/arch/m68k/include/asm/segment_mm.h b/arch/m68k/include/asm/segment_mm.h deleted file mode 100644 index 7b0b2d3127f..00000000000 --- a/arch/m68k/include/asm/segment_mm.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef _M68K_SEGMENT_H -#define _M68K_SEGMENT_H - -/* define constants */ -/* Address spaces (FC0-FC2) */ -#define USER_DATA (1) -#ifndef __USER_DS -#define __USER_DS (USER_DATA) -#endif -#define USER_PROGRAM (2) -#define SUPER_DATA (5) -#ifndef __KERNEL_DS -#define __KERNEL_DS (SUPER_DATA) -#endif -#define SUPER_PROGRAM (6) -#define CPU_SPACE (7) - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long seg; -} mm_segment_t; - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define USER_DS MAKE_MM_SEG(__USER_DS) -#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) - -/* - * Get/set the SFC/DFC registers for MOVES instructions - */ - -static inline mm_segment_t get_fs(void) -{ - mm_segment_t _v; - __asm__ ("movec %/dfc,%0":"=r" (_v.seg):); - - return _v; -} - -static inline mm_segment_t get_ds(void) -{ - /* return the supervisor data space code */ - return KERNEL_DS; -} - -static inline void set_fs(mm_segment_t val) -{ - __asm__ __volatile__ ("movec %0,%/sfc\n\t" - "movec %0,%/dfc\n\t" - : /* no outputs */ : "r" (val.seg) : "memory"); -} - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#endif /* __ASSEMBLY__ */ - -#endif /* _M68K_SEGMENT_H */ diff --git a/arch/m68k/include/asm/segment_no.h b/arch/m68k/include/asm/segment_no.h deleted file mode 100644 index 42318ebec7e..00000000000 --- a/arch/m68k/include/asm/segment_no.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _M68K_SEGMENT_H -#define _M68K_SEGMENT_H - -/* define constants */ -/* Address spaces (FC0-FC2) */ -#define USER_DATA (1) -#ifndef __USER_DS -#define __USER_DS (USER_DATA) -#endif -#define USER_PROGRAM (2) -#define SUPER_DATA (5) -#ifndef __KERNEL_DS -#define __KERNEL_DS (SUPER_DATA) -#endif -#define SUPER_PROGRAM (6) -#define CPU_SPACE (7) - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long seg; -} mm_segment_t; - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define USER_DS MAKE_MM_SEG(__USER_DS) -#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) - -/* - * Get/set the SFC/DFC registers for MOVES instructions - */ - -static inline mm_segment_t get_fs(void) -{ - return USER_DS; -} - -static inline mm_segment_t get_ds(void) -{ - /* return the supervisor data space code */ - return KERNEL_DS; -} - -static inline void set_fs(mm_segment_t val) -{ -} - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#endif /* __ASSEMBLY__ */ - -#endif /* _M68K_SEGMENT_H */ diff --git a/arch/m68k/include/asm/timex.h b/arch/m68k/include/asm/timex.h index 71976298057..b87f2f278f6 100644 --- a/arch/m68k/include/asm/timex.h +++ b/arch/m68k/include/asm/timex.h @@ -1,5 +1,18 @@ -#ifdef __uClinux__ -#include "timex_no.h" -#else -#include "timex_mm.h" +/* + * linux/include/asm-m68k/timex.h + * + * m68k architecture timex specifications + */ +#ifndef _ASMm68k_TIMEX_H +#define _ASMm68k_TIMEX_H + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ + +typedef unsigned long cycles_t; + +static inline cycles_t get_cycles(void) +{ + return 0; +} + #endif diff --git a/arch/m68k/include/asm/timex_mm.h b/arch/m68k/include/asm/timex_mm.h deleted file mode 100644 index b87f2f278f6..00000000000 --- a/arch/m68k/include/asm/timex_mm.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-m68k/timex.h - * - * m68k architecture timex specifications - */ -#ifndef _ASMm68k_TIMEX_H -#define _ASMm68k_TIMEX_H - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles(void) -{ - return 0; -} - -#endif diff --git a/arch/m68k/include/asm/timex_no.h b/arch/m68k/include/asm/timex_no.h deleted file mode 100644 index 109050f3fe9..00000000000 --- a/arch/m68k/include/asm/timex_no.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-m68knommu/timex.h - * - * m68knommu architecture timex specifications - */ -#ifndef _ASM_M68KNOMMU_TIMEX_H -#define _ASM_M68KNOMMU_TIMEX_H - -#ifdef CONFIG_COLDFIRE -#include <asm/coldfire.h> -#define CLOCK_TICK_RATE MCF_CLK -#else -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ -#endif - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles(void) -{ - return 0; -} - -#endif diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h index b6f93b30951..a6b4ed4fc90 100644 --- a/arch/m68k/include/asm/tlbflush.h +++ b/arch/m68k/include/asm/tlbflush.h @@ -1,5 +1,267 @@ -#ifdef __uClinux__ -#include "tlbflush_no.h" +#ifndef _M68K_TLBFLUSH_H +#define _M68K_TLBFLUSH_H + +#ifdef CONFIG_MMU +#ifndef CONFIG_SUN3 + +#include <asm/current.h> + +static inline void flush_tlb_kernel_page(void *addr) +{ + if (CPU_IS_040_OR_060) { + mm_segment_t old_fs = get_fs(); + set_fs(KERNEL_DS); + __asm__ __volatile__(".chip 68040\n\t" + "pflush (%0)\n\t" + ".chip 68k" + : : "a" (addr)); + set_fs(old_fs); + } else if (CPU_IS_020_OR_030) + __asm__ __volatile__("pflush #4,#4,(%0)" : : "a" (addr)); +} + +/* + * flush all user-space atc entries. + */ +static inline void __flush_tlb(void) +{ + if (CPU_IS_040_OR_060) + __asm__ __volatile__(".chip 68040\n\t" + "pflushan\n\t" + ".chip 68k"); + else if (CPU_IS_020_OR_030) + __asm__ __volatile__("pflush #0,#4"); +} + +static inline void __flush_tlb040_one(unsigned long addr) +{ + __asm__ __volatile__(".chip 68040\n\t" + "pflush (%0)\n\t" + ".chip 68k" + : : "a" (addr)); +} + +static inline void __flush_tlb_one(unsigned long addr) +{ + if (CPU_IS_040_OR_060) + __flush_tlb040_one(addr); + else if (CPU_IS_020_OR_030) + __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr)); +} + +#define flush_tlb() __flush_tlb() + +/* + * flush all atc entries (both kernel and user-space entries). + */ +static inline void flush_tlb_all(void) +{ + if (CPU_IS_040_OR_060) + __asm__ __volatile__(".chip 68040\n\t" + "pflusha\n\t" + ".chip 68k"); + else if (CPU_IS_020_OR_030) + __asm__ __volatile__("pflusha"); +} + +static inline void flush_tlb_mm(struct mm_struct *mm) +{ + if (mm == current->active_mm) + __flush_tlb(); +} + +static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) +{ + if (vma->vm_mm == current->active_mm) { + mm_segment_t old_fs = get_fs(); + set_fs(USER_DS); + __flush_tlb_one(addr); + set_fs(old_fs); + } +} + +static inline void flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, unsigned long end) +{ + if (vma->vm_mm == current->active_mm) + __flush_tlb(); +} + +static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) +{ + flush_tlb_all(); +} + #else -#include "tlbflush_mm.h" + + +/* Reserved PMEGs. */ +extern char sun3_reserved_pmeg[SUN3_PMEGS_NUM]; +extern unsigned long pmeg_vaddr[SUN3_PMEGS_NUM]; +extern unsigned char pmeg_alloc[SUN3_PMEGS_NUM]; +extern unsigned char pmeg_ctx[SUN3_PMEGS_NUM]; + +/* Flush all userspace mappings one by one... (why no flush command, + sun?) */ +static inline void flush_tlb_all(void) +{ + unsigned long addr; + unsigned char ctx, oldctx; + + oldctx = sun3_get_context(); + for(addr = 0x00000000; addr < TASK_SIZE; addr += SUN3_PMEG_SIZE) { + for(ctx = 0; ctx < 8; ctx++) { + sun3_put_context(ctx); + sun3_put_segmap(addr, SUN3_INVALID_PMEG); + } + } + + sun3_put_context(oldctx); + /* erase all of the userspace pmeg maps, we've clobbered them + all anyway */ + for(addr = 0; addr < SUN3_INVALID_PMEG; addr++) { + if(pmeg_alloc[addr] == 1) { + pmeg_alloc[addr] = 0; + pmeg_ctx[addr] = 0; + pmeg_vaddr[addr] = 0; + } + } + +} + +/* Clear user TLB entries within the context named in mm */ +static inline void flush_tlb_mm (struct mm_struct *mm) +{ + unsigned char oldctx; + unsigned char seg; + unsigned long i; + + oldctx = sun3_get_context(); + sun3_put_context(mm->context); + + for(i = 0; i < TASK_SIZE; i += SUN3_PMEG_SIZE) { + seg = sun3_get_segmap(i); + if(seg == SUN3_INVALID_PMEG) + continue; + + sun3_put_segmap(i, SUN3_INVALID_PMEG); + pmeg_alloc[seg] = 0; + pmeg_ctx[seg] = 0; + pmeg_vaddr[seg] = 0; + } + + sun3_put_context(oldctx); + +} + +/* Flush a single TLB page. In this case, we're limited to flushing a + single PMEG */ +static inline void flush_tlb_page (struct vm_area_struct *vma, + unsigned long addr) +{ + unsigned char oldctx; + unsigned char i; + + oldctx = sun3_get_context(); + sun3_put_context(vma->vm_mm->context); + addr &= ~SUN3_PMEG_MASK; + if((i = sun3_get_segmap(addr)) != SUN3_INVALID_PMEG) + { + pmeg_alloc[i] = 0; + pmeg_ctx[i] = 0; + pmeg_vaddr[i] = 0; + sun3_put_segmap (addr, SUN3_INVALID_PMEG); + } + sun3_put_context(oldctx); + +} +/* Flush a range of pages from TLB. */ + +static inline void flush_tlb_range (struct vm_area_struct *vma, + unsigned long start, unsigned long end) +{ + struct mm_struct *mm = vma->vm_mm; + unsigned char seg, oldctx; + + start &= ~SUN3_PMEG_MASK; + + oldctx = sun3_get_context(); + sun3_put_context(mm->context); + + while(start < end) + { + if((seg = sun3_get_segmap(start)) == SUN3_INVALID_PMEG) + goto next; + if(pmeg_ctx[seg] == mm->context) { + pmeg_alloc[seg] = 0; + pmeg_ctx[seg] = 0; + pmeg_vaddr[seg] = 0; + } + sun3_put_segmap(start, SUN3_INVALID_PMEG); + next: + start += SUN3_PMEG_SIZE; + } +} + +static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) +{ + flush_tlb_all(); +} + +/* Flush kernel page from TLB. */ +static inline void flush_tlb_kernel_page (unsigned long addr) +{ + sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG); +} + #endif + +#else /* !CONFIG_MMU */ + +/* + * flush all user-space atc entries. + */ +static inline void __flush_tlb(void) +{ + BUG(); +} + +static inline void __flush_tlb_one(unsigned long addr) +{ + BUG(); +} + +#define flush_tlb() __flush_tlb() + +/* + * flush all atc entries (both kernel and user-space entries). + */ +static inline void flush_tlb_all(void) +{ + BUG(); +} + +static inline void flush_tlb_mm(struct mm_struct *mm) +{ + BUG(); +} + +static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) +{ + BUG(); +} + +static inline void flush_tlb_range(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ + BUG(); +} + +static inline void flush_tlb_kernel_page(unsigned long addr) +{ + BUG(); +} + +#endif /* CONFIG_MMU */ + +#endif /* _M68K_TLBFLUSH_H */ diff --git a/arch/m68k/include/asm/tlbflush_mm.h b/arch/m68k/include/asm/tlbflush_mm.h deleted file mode 100644 index acb6bf21a32..00000000000 --- a/arch/m68k/include/asm/tlbflush_mm.h +++ /dev/null @@ -1,219 +0,0 @@ -#ifndef _M68K_TLBFLUSH_H -#define _M68K_TLBFLUSH_H - - -#ifndef CONFIG_SUN3 - -#include <asm/current.h> - -static inline void flush_tlb_kernel_page(void *addr) -{ - if (CPU_IS_040_OR_060) { - mm_segment_t old_fs = get_fs(); - set_fs(KERNEL_DS); - __asm__ __volatile__(".chip 68040\n\t" - "pflush (%0)\n\t" - ".chip 68k" - : : "a" (addr)); - set_fs(old_fs); - } else if (CPU_IS_020_OR_030) - __asm__ __volatile__("pflush #4,#4,(%0)" : : "a" (addr)); -} - -/* - * flush all user-space atc entries. - */ -static inline void __flush_tlb(void) -{ - if (CPU_IS_040_OR_060) - __asm__ __volatile__(".chip 68040\n\t" - "pflushan\n\t" - ".chip 68k"); - else if (CPU_IS_020_OR_030) - __asm__ __volatile__("pflush #0,#4"); -} - -static inline void __flush_tlb040_one(unsigned long addr) -{ - __asm__ __volatile__(".chip 68040\n\t" - "pflush (%0)\n\t" - ".chip 68k" - : : "a" (addr)); -} - -static inline void __flush_tlb_one(unsigned long addr) -{ - if (CPU_IS_040_OR_060) - __flush_tlb040_one(addr); - else if (CPU_IS_020_OR_030) - __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr)); -} - -#define flush_tlb() __flush_tlb() - -/* - * flush all atc entries (both kernel and user-space entries). - */ -static inline void flush_tlb_all(void) -{ - if (CPU_IS_040_OR_060) - __asm__ __volatile__(".chip 68040\n\t" - "pflusha\n\t" - ".chip 68k"); - else if (CPU_IS_020_OR_030) - __asm__ __volatile__("pflusha"); -} - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - if (mm == current->active_mm) - __flush_tlb(); -} - -static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) -{ - if (vma->vm_mm == current->active_mm) { - mm_segment_t old_fs = get_fs(); - set_fs(USER_DS); - __flush_tlb_one(addr); - set_fs(old_fs); - } -} - -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) -{ - if (vma->vm_mm == current->active_mm) - __flush_tlb(); -} - -static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) -{ - flush_tlb_all(); -} - -#else - - -/* Reserved PMEGs. */ -extern char sun3_reserved_pmeg[SUN3_PMEGS_NUM]; -extern unsigned long pmeg_vaddr[SUN3_PMEGS_NUM]; -extern unsigned char pmeg_alloc[SUN3_PMEGS_NUM]; -extern unsigned char pmeg_ctx[SUN3_PMEGS_NUM]; - -/* Flush all userspace mappings one by one... (why no flush command, - sun?) */ -static inline void flush_tlb_all(void) -{ - unsigned long addr; - unsigned char ctx, oldctx; - - oldctx = sun3_get_context(); - for(addr = 0x00000000; addr < TASK_SIZE; addr += SUN3_PMEG_SIZE) { - for(ctx = 0; ctx < 8; ctx++) { - sun3_put_context(ctx); - sun3_put_segmap(addr, SUN3_INVALID_PMEG); - } - } - - sun3_put_context(oldctx); - /* erase all of the userspace pmeg maps, we've clobbered them - all anyway */ - for(addr = 0; addr < SUN3_INVALID_PMEG; addr++) { - if(pmeg_alloc[addr] == 1) { - pmeg_alloc[addr] = 0; - pmeg_ctx[addr] = 0; - pmeg_vaddr[addr] = 0; - } - } - -} - -/* Clear user TLB entries within the context named in mm */ -static inline void flush_tlb_mm (struct mm_struct *mm) -{ - unsigned char oldctx; - unsigned char seg; - unsigned long i; - - oldctx = sun3_get_context(); - sun3_put_context(mm->context); - - for(i = 0; i < TASK_SIZE; i += SUN3_PMEG_SIZE) { - seg = sun3_get_segmap(i); - if(seg == SUN3_INVALID_PMEG) - continue; - - sun3_put_segmap(i, SUN3_INVALID_PMEG); - pmeg_alloc[seg] = 0; - pmeg_ctx[seg] = 0; - pmeg_vaddr[seg] = 0; - } - - sun3_put_context(oldctx); - -} - -/* Flush a single TLB page. In this case, we're limited to flushing a - single PMEG */ -static inline void flush_tlb_page (struct vm_area_struct *vma, - unsigned long addr) -{ - unsigned char oldctx; - unsigned char i; - - oldctx = sun3_get_context(); - sun3_put_context(vma->vm_mm->context); - addr &= ~SUN3_PMEG_MASK; - if((i = sun3_get_segmap(addr)) != SUN3_INVALID_PMEG) - { - pmeg_alloc[i] = 0; - pmeg_ctx[i] = 0; - pmeg_vaddr[i] = 0; - sun3_put_segmap (addr, SUN3_INVALID_PMEG); - } - sun3_put_context(oldctx); - -} -/* Flush a range of pages from TLB. */ - -static inline void flush_tlb_range (struct vm_area_struct *vma, - unsigned long start, unsigned long end) -{ - struct mm_struct *mm = vma->vm_mm; - unsigned char seg, oldctx; - - start &= ~SUN3_PMEG_MASK; - - oldctx = sun3_get_context(); - sun3_put_context(mm->context); - - while(start < end) - { - if((seg = sun3_get_segmap(start)) == SUN3_INVALID_PMEG) - goto next; - if(pmeg_ctx[seg] == mm->context) { - pmeg_alloc[seg] = 0; - pmeg_ctx[seg] = 0; - pmeg_vaddr[seg] = 0; - } - sun3_put_segmap(start, SUN3_INVALID_PMEG); - next: - start += SUN3_PMEG_SIZE; - } -} - -static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) -{ - flush_tlb_all(); -} - -/* Flush kernel page from TLB. */ -static inline void flush_tlb_kernel_page (unsigned long addr) -{ - sun3_put_segmap (addr & ~(SUN3_PMEG_SIZE - 1), SUN3_INVALID_PMEG); -} - -#endif - -#endif /* _M68K_TLBFLUSH_H */ diff --git a/arch/m68k/include/asm/tlbflush_no.h b/arch/m68k/include/asm/tlbflush_no.h deleted file mode 100644 index a470cfb803e..00000000000 --- a/arch/m68k/include/asm/tlbflush_no.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef _M68KNOMMU_TLBFLUSH_H -#define _M68KNOMMU_TLBFLUSH_H - -/* - * Copyright (C) 2000 Lineo, David McCullough <davidm@uclinux.org> - * Copyright (C) 2000-2002, Greg Ungerer <gerg@snapgear.com> - */ - -#include <asm/setup.h> - -/* - * flush all user-space atc entries. - */ -static inline void __flush_tlb(void) -{ - BUG(); -} - -static inline void __flush_tlb_one(unsigned long addr) -{ - BUG(); -} - -#define flush_tlb() __flush_tlb() - -/* - * flush all atc entries (both kernel and user-space entries). - */ -static inline void flush_tlb_all(void) -{ - BUG(); -} - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - BUG(); -} - -static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) -{ - BUG(); -} - -static inline void flush_tlb_range(struct mm_struct *mm, - unsigned long start, unsigned long end) -{ - BUG(); -} - -static inline void flush_tlb_kernel_page(unsigned long addr) -{ - BUG(); -} - -#endif /* _M68KNOMMU_TLBFLUSH_H */ diff --git a/arch/m68k/include/asm/ucontext.h b/arch/m68k/include/asm/ucontext.h index b53cd160c0b..e4e22669edc 100644 --- a/arch/m68k/include/asm/ucontext.h +++ b/arch/m68k/include/asm/ucontext.h @@ -1,5 +1,30 @@ -#ifdef __uClinux__ -#include "ucontext_no.h" -#else -#include "ucontext_mm.h" +#ifndef _M68K_UCONTEXT_H +#define _M68K_UCONTEXT_H + +typedef int greg_t; +#define NGREG 18 +typedef greg_t gregset_t[NGREG]; + +typedef struct fpregset { + int f_fpcntl[3]; + int f_fpregs[8*3]; +} fpregset_t; + +struct mcontext { + int version; + gregset_t gregs; + fpregset_t fpregs; +}; + +#define MCONTEXT_VERSION 2 + +struct ucontext { + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + struct mcontext uc_mcontext; + unsigned long uc_filler[80]; + sigset_t uc_sigmask; /* mask last for extensibility */ +}; + #endif diff --git a/arch/m68k/include/asm/ucontext_mm.h b/arch/m68k/include/asm/ucontext_mm.h deleted file mode 100644 index e4e22669edc..00000000000 --- a/arch/m68k/include/asm/ucontext_mm.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef _M68K_UCONTEXT_H -#define _M68K_UCONTEXT_H - -typedef int greg_t; -#define NGREG 18 -typedef greg_t gregset_t[NGREG]; - -typedef struct fpregset { - int f_fpcntl[3]; - int f_fpregs[8*3]; -} fpregset_t; - -struct mcontext { - int version; - gregset_t gregs; - fpregset_t fpregs; -}; - -#define MCONTEXT_VERSION 2 - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct mcontext uc_mcontext; - unsigned long uc_filler[80]; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif diff --git a/arch/m68k/include/asm/ucontext_no.h b/arch/m68k/include/asm/ucontext_no.h deleted file mode 100644 index 713a27f901c..00000000000 --- a/arch/m68k/include/asm/ucontext_no.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _M68KNOMMU_UCONTEXT_H -#define _M68KNOMMU_UCONTEXT_H - -typedef int greg_t; -#define NGREG 18 -typedef greg_t gregset_t[NGREG]; - -typedef struct fpregset { - int f_pcr; - int f_psr; - int f_fpiaddr; - int f_fpregs[8][3]; -} fpregset_t; - -struct mcontext { - int version; - gregset_t gregs; - fpregset_t fpregs; -}; - -#define MCONTEXT_VERSION 2 - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct mcontext uc_mcontext; - unsigned long uc_filler[80]; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif diff --git a/arch/m68k/include/asm/unaligned.h b/arch/m68k/include/asm/unaligned.h index c640bba3bdf..019caa740c2 100644 --- a/arch/m68k/include/asm/unaligned.h +++ b/arch/m68k/include/asm/unaligned.h @@ -1,5 +1,25 @@ -#ifdef __uClinux__ -#include "unaligned_no.h" +#ifndef _ASM_M68K_UNALIGNED_H +#define _ASM_M68K_UNALIGNED_H + + +#ifdef CONFIG_COLDFIRE +#include <linux/unaligned/be_struct.h> +#include <linux/unaligned/le_byteshift.h> +#include <linux/unaligned/generic.h> + +#define get_unaligned __get_unaligned_be +#define put_unaligned __put_unaligned_be + #else -#include "unaligned_mm.h" +/* + * The m68k can do unaligned accesses itself. + */ +#include <linux/unaligned/access_ok.h> +#include <linux/unaligned/generic.h> + +#define get_unaligned __get_unaligned_be +#define put_unaligned __put_unaligned_be + #endif + +#endif /* _ASM_M68K_UNALIGNED_H */ diff --git a/arch/m68k/include/asm/unaligned_mm.h b/arch/m68k/include/asm/unaligned_mm.h deleted file mode 100644 index 77698f2dc33..00000000000 --- a/arch/m68k/include/asm/unaligned_mm.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _ASM_M68K_UNALIGNED_H -#define _ASM_M68K_UNALIGNED_H - -/* - * The m68k can do unaligned accesses itself. - */ -#include <linux/unaligned/access_ok.h> -#include <linux/unaligned/generic.h> - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif /* _ASM_M68K_UNALIGNED_H */ diff --git a/arch/m68k/include/asm/unaligned_no.h b/arch/m68k/include/asm/unaligned_no.h deleted file mode 100644 index eb1ea4cb9a5..00000000000 --- a/arch/m68k/include/asm/unaligned_no.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_M68KNOMMU_UNALIGNED_H -#define _ASM_M68KNOMMU_UNALIGNED_H - - -#ifdef CONFIG_COLDFIRE -#include <linux/unaligned/be_struct.h> -#include <linux/unaligned/le_byteshift.h> -#include <linux/unaligned/generic.h> - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#else -/* - * The m68k can do unaligned accesses itself. - */ -#include <linux/unaligned/access_ok.h> -#include <linux/unaligned/generic.h> - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif - -#endif /* _ASM_M68KNOMMU_UNALIGNED_H */ diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c index 7db41594d7b..54d980795fc 100644 --- a/arch/m68k/kernel/time.c +++ b/arch/m68k/kernel/time.c @@ -18,6 +18,7 @@ #include <linux/string.h> #include <linux/mm.h> #include <linux/rtc.h> +#include <linux/platform_device.h> #include <asm/machdep.h> #include <asm/io.h> @@ -159,3 +160,20 @@ int do_settimeofday(struct timespec *tv) } EXPORT_SYMBOL(do_settimeofday); + + +static int __init rtc_init(void) +{ + struct platform_device *pdev; + + if (!mach_hwclk) + return -ENODEV; + + pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + return 0; +} + +module_init(rtc_init); diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index fd0fb303d88..ce404bc9ccb 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile @@ -88,18 +88,18 @@ export PLATFORM BOARD MODEL CPUCLASS # # Some CFLAG additions based on specific CPU type. # -cflags-$(CONFIG_M5206) := -m5200 -cflags-$(CONFIG_M5206e) := -m5200 -cflags-$(CONFIG_M520x) := -m5307 +cflags-$(CONFIG_M5206) := $(call cc-option,-mcpu=5206,-m5200) +cflags-$(CONFIG_M5206e) := $(call cc-option,-m5206e,-m5200) +cflags-$(CONFIG_M520x) := $(call cc-option,-mcpu=5208,-m5200) cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307) -cflags-$(CONFIG_M5249) := -m5200 +cflags-$(CONFIG_M5249) := $(call cc-option,-mcpu=5249,-m5200) cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307) -cflags-$(CONFIG_M5272) := -m5307 +cflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5271,-m5200) cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307) cflags-$(CONFIG_M528x) := $(call cc-option,-m528x,-m5307) -cflags-$(CONFIG_M5307) := -m5307 +cflags-$(CONFIG_M5307) := $(call cc-option,-m5307,-m5200) cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307) -cflags-$(CONFIG_M5407) := -m5200 +cflags-$(CONFIG_M5407) := $(call cc-option,-m5407,-m5200) cflags-$(CONFIG_M68328) := -m68000 cflags-$(CONFIG_M68EZ328) := -m68000 cflags-$(CONFIG_M68VZ328) := -m68000 diff --git a/arch/m68knommu/kernel/dma.c b/arch/m68knommu/kernel/dma.c index e10eafc5278..93612580663 100644 --- a/arch/m68knommu/kernel/dma.c +++ b/arch/m68knommu/kernel/dma.c @@ -9,10 +9,11 @@ #include <linux/mm.h> #include <linux/string.h> #include <linux/device.h> +#include <linux/dma-mapping.h> #include <asm/io.h> void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, int gfp) + dma_addr_t *dma_handle, gfp_t gfp) { void *ret; /* ignore region specifiers */ @@ -34,3 +35,8 @@ void dma_free_coherent(struct device *dev, size_t size, { free_pages((unsigned long)vaddr, get_order(size)); } + +void dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir) +{ +} + diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68knommu/kernel/irq.c index bba1bb48a21..56e0f4c55a6 100644 --- a/arch/m68knommu/kernel/irq.c +++ b/arch/m68knommu/kernel/irq.c @@ -23,7 +23,7 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs) struct pt_regs *oldregs = set_irq_regs(regs); irq_enter(); - __do_IRQ(irq); + generic_handle_irq(irq); irq_exit(); set_irq_regs(oldregs); diff --git a/arch/m68knommu/mm/init.c b/arch/m68knommu/mm/init.c index 3bf249c53e4..7befc0c357e 100644 --- a/arch/m68knommu/mm/init.c +++ b/arch/m68knommu/mm/init.c @@ -111,11 +111,7 @@ void __init paging_init(void) { unsigned long zones_size[MAX_NR_ZONES] = {0, }; - zones_size[ZONE_DMA] = 0 >> PAGE_SHIFT; - zones_size[ZONE_NORMAL] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT; -#ifdef CONFIG_HIGHMEM - zones_size[ZONE_HIGHMEM] = 0; -#endif + zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT; free_area_init(zones_size); } } diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c index d299f7b8768..9eab19d01eb 100644 --- a/arch/m68knommu/platform/5249/config.c +++ b/arch/m68knommu/platform/5249/config.c @@ -32,7 +32,8 @@ static struct mcf_platform_uart m5249_uart_platform[] = { { .mapbase = MCF_MBAR + MCFUART_BASE2, .irq = 74, - } + }, + { }, }; static struct platform_device m5249_uart = { @@ -50,12 +51,12 @@ static struct platform_device *m5249_devices[] __initdata = { static void __init m5249_uart_init_line(int line, int irq) { if (line == 0) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); } else if (line == 1) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); } } diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c index 724faf05852..44803bf70a6 100644 --- a/arch/m68knommu/platform/5307/config.c +++ b/arch/m68knommu/platform/5307/config.c @@ -65,12 +65,12 @@ static struct platform_device *m5307_devices[] __initdata = { static void __init m5307_uart_init_line(int line, int irq) { if (line == 0) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); } else if (line == 1) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); } } diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c index 648b8b77821..0ee8c1a200c 100644 --- a/arch/m68knommu/platform/5407/config.c +++ b/arch/m68knommu/platform/5407/config.c @@ -56,12 +56,12 @@ static struct platform_device *m5407_devices[] __initdata = { static void __init m5407_uart_init_line(int line, int irq) { if (line == 0) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); } else if (line == 1) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); } } diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 4f416a91a82..1bcb9372353 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile @@ -14,7 +14,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o obj-$(CONFIG_M5206e) += timers.o obj-$(CONFIG_M520x) += pit.o diff --git a/arch/m68knommu/platform/coldfire/clk.c b/arch/m68knommu/platform/coldfire/clk.c new file mode 100644 index 00000000000..7cdbf445b28 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/clk.c @@ -0,0 +1,40 @@ +/***************************************************************************/ + +/* + * clk.c -- general ColdFire CPU kernel clk handling + * + * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <linux/clk.h> +#include <asm/coldfire.h> + +/***************************************************************************/ + +struct clk *clk_get(struct device *dev, const char *id) +{ + return NULL; +} + +int clk_enable(struct clk *clk) +{ + return 0; +} + +void clk_disable(struct clk *clk) +{ +} + +void clk_put(struct clk *clk) +{ +} + +unsigned long clk_get_rate(struct clk *clk) +{ + return MCF_CLK; +} + +/***************************************************************************/ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index dc787190430..998e5db8cc0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -134,7 +134,7 @@ config MACH_JAZZ help This a family of machines based on the MIPS R4030 chipset which was used by several vendors to build RISC/os and Windows NT workstations. - Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and + Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and Olivetti M700-10 workstations. config LASAT diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c index 5b47d6b6527..cbcd7eb83bd 100644 --- a/arch/mips/sgi-ip27/ip27-smp.c +++ b/arch/mips/sgi-ip27/ip27-smp.c @@ -221,7 +221,7 @@ static void __init ip27_smp_setup(void) * Assumption to be fixed: we're always booted on logical / physical * processor 0. While we're always running on logical processor 0 * this still means this is physical processor zero; it might for - * example be disabled in the firwware. + * example be disabled in the firmware. */ alloc_cpupda(0, 0); } diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index aacf11d3372..9038f39d9d7 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -9,9 +9,13 @@ config PARISC def_bool y select HAVE_IDE select HAVE_OPROFILE + select HAVE_FUNCTION_TRACER if 64BIT + select HAVE_FUNCTION_GRAPH_TRACER if 64BIT + select HAVE_FUNCTION_TRACE_MCOUNT_TEST if 64BIT select RTC_CLASS - select RTC_DRV_PARISC + select RTC_DRV_GENERIC select INIT_ALL_POSSIBLE + select BUG help The PA-RISC microprocessor is designed by Hewlett-Packard and used in many of their workstations & servers (HP9000 700 and 800 series, @@ -75,6 +79,9 @@ config GENERIC_HARDIRQS config GENERIC_IRQ_PROBE def_bool y +config HAVE_LATENCYTOP_SUPPORT + def_bool y + config IRQ_PER_CPU bool default y @@ -83,6 +90,9 @@ config IRQ_PER_CPU config PM bool +config STACKTRACE_SUPPORT + def_bool y + config ISA_DMA_API bool diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile index 0d428278356..da6f66901c9 100644 --- a/arch/parisc/Makefile +++ b/arch/parisc/Makefile @@ -56,7 +56,9 @@ cflags-y += -mdisable-fpregs # Without this, "ld -r" results in .text sections that are too big # (> 0x40000) for branches to reach stubs. -cflags-y += -ffunction-sections +ifndef CONFIG_FUNCTION_TRACER + cflags-y += -ffunction-sections +endif # select which processor to optimise for cflags-$(CONFIG_PA7100) += -march=1.1 -mschedule=7100 diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h index edbfe25c5fc..ada3e5364d8 100644 --- a/arch/parisc/include/asm/atomic.h +++ b/arch/parisc/include/asm/atomic.h @@ -25,7 +25,7 @@ * Since "a" is usually an address, use one spinlock per cacheline. */ # define ATOMIC_HASH_SIZE 4 -# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) +# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ])) extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned; @@ -222,13 +222,13 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) -#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) -#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) +#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)(i)),(v)))) +#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)(i)),(v)))) #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v)))) #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v)))) -#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v))) -#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v))) +#define atomic_add_return(i,v) (__atomic_add_return( ((int)(i)),(v))) +#define atomic_sub_return(i,v) (__atomic_add_return(-((int)(i)),(v))) #define atomic_inc_return(v) (__atomic_add_return( 1,(v))) #define atomic_dec_return(v) (__atomic_add_return( -1,(v))) @@ -289,13 +289,13 @@ atomic64_read(const atomic64_t *v) return v->counter; } -#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v)))) -#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v)))) +#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)(i)),(v)))) +#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)(i)),(v)))) #define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v)))) #define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v)))) -#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v))) -#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v))) +#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)(i)),(v))) +#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)(i)),(v))) #define atomic64_inc_return(v) (__atomic64_add_return( 1,(v))) #define atomic64_dec_return(v) (__atomic64_add_return( -1,(v))) diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index b7ca6dc7fdd..724395143f2 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -97,6 +97,9 @@ void mark_rodata_ro(void); #ifdef CONFIG_PA8X00 /* Only pa8800, pa8900 needs this */ + +#include <asm/kmap_types.h> + #define ARCH_HAS_KMAP void kunmap_parisc(void *addr); diff --git a/arch/parisc/include/asm/elf.h b/arch/parisc/include/asm/elf.h index 7fa675799e6..9c802eb4be8 100644 --- a/arch/parisc/include/asm/elf.h +++ b/arch/parisc/include/asm/elf.h @@ -168,6 +168,16 @@ typedef struct elf64_fdesc { __u64 gp; } Elf64_Fdesc; +#ifdef __KERNEL__ + +#ifdef CONFIG_64BIT +#define Elf_Fdesc Elf64_Fdesc +#else +#define Elf_Fdesc Elf32_Fdesc +#endif /*CONFIG_64BIT*/ + +#endif /*__KERNEL__*/ + /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ #define PT_HP_TLS (PT_LOOS + 0x0) diff --git a/arch/parisc/include/asm/ftrace.h b/arch/parisc/include/asm/ftrace.h new file mode 100644 index 00000000000..2fa05dd6aee --- /dev/null +++ b/arch/parisc/include/asm/ftrace.h @@ -0,0 +1,25 @@ +#ifndef _ASM_PARISC_FTRACE_H +#define _ASM_PARISC_FTRACE_H + +#ifndef __ASSEMBLY__ +extern void mcount(void); + +/* + * Stack of return addresses for functions of a thread. + * Used in struct thread_info + */ +struct ftrace_ret_stack { + unsigned long ret; + unsigned long func; + unsigned long long calltime; +}; + +/* + * Primary handler of a function return. + * It relays on ftrace_return_to_handler. + * Defined in entry.S + */ +extern void return_to_handler(void); +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_PARISC_FTRACE_H */ diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h index c3941f09a87..7bc5125d7d4 100644 --- a/arch/parisc/include/asm/page.h +++ b/arch/parisc/include/asm/page.h @@ -36,16 +36,7 @@ void clear_user_page(void *page, unsigned long vaddr, struct page *pg); */ #define STRICT_MM_TYPECHECKS #ifdef STRICT_MM_TYPECHECKS -typedef struct { unsigned long pte; -#if !defined(CONFIG_64BIT) - unsigned long future_flags; - /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY - to 2, but then strangely the identical 32bit kernel boots on a - c3000(pa20), but not any longer on a 715(pa11). - Still investigating... HelgeD. - */ -#endif -} pte_t; /* either 32 or 64bit */ +typedef struct { unsigned long pte; } pte_t; /* either 32 or 64bit */ /* NOTE: even on 64 bits, these entries are __u32 because we allocate * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */ @@ -111,7 +102,7 @@ extern int npmem_ranges; #define BITS_PER_PMD_ENTRY 2 #define BITS_PER_PGD_ENTRY 2 #else -#define BITS_PER_PTE_ENTRY 3 +#define BITS_PER_PTE_ENTRY 2 #define BITS_PER_PMD_ENTRY 2 #define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY #endif diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h index 430f1aeea0b..4ca510b3c6f 100644 --- a/arch/parisc/include/asm/pdc.h +++ b/arch/parisc/include/asm/pdc.h @@ -49,6 +49,8 @@ #define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */ #define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */ /* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */ +#define PDC_MODEL_OS64 (1 << 0) +#define PDC_MODEL_OS32 (1 << 1) #define PDC_MODEL_IOPDIR_FDC (1 << 2) #define PDC_MODEL_NVA_MASK (3 << 4) #define PDC_MODEL_NVA_SUPPORTED (0 << 4) @@ -341,6 +343,8 @@ #ifdef __KERNEL__ +#include <asm/page.h> /* for __PAGE_OFFSET */ + extern int pdc_type; /* Values for pdc_type */ diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h index 470a4b88124..a27d2e200fb 100644 --- a/arch/parisc/include/asm/pgtable.h +++ b/arch/parisc/include/asm/pgtable.h @@ -50,11 +50,7 @@ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e)) /* This is the size of the initially mapped kernel memory */ -#ifdef CONFIG_64BIT #define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */ -#else -#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */ -#endif #define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER) #if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB) @@ -91,16 +87,25 @@ /* Definitions for 1st level */ #define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD) +#if (PGDIR_SHIFT + PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) > BITS_PER_LONG +#define BITS_PER_PGD (BITS_PER_LONG - PGDIR_SHIFT) +#else #define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) +#endif #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) #define PTRS_PER_PGD (1UL << BITS_PER_PGD) #define USER_PTRS_PER_PGD PTRS_PER_PGD +#ifdef CONFIG_64BIT #define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD) #define MAX_ADDRESS (1UL << MAX_ADDRBITS) - #define SPACEID_SHIFT (MAX_ADDRBITS - 32) +#else +#define MAX_ADDRBITS (BITS_PER_LONG) +#define MAX_ADDRESS (1UL << MAX_ADDRBITS) +#define SPACEID_SHIFT 0 +#endif /* This calculates the number of initial pages we need for the initial * page tables */ diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h index 6ef4b7867b1..21eb45a5262 100644 --- a/arch/parisc/include/asm/smp.h +++ b/arch/parisc/include/asm/smp.h @@ -29,7 +29,8 @@ extern void smp_send_reschedule(int cpu); extern void smp_send_all_nop(void); extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); +#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask #endif /* !ASSEMBLY */ diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile index 016d3fc4111..67db0722e6c 100644 --- a/arch/parisc/kernel/Makefile +++ b/arch/parisc/kernel/Makefile @@ -11,10 +11,25 @@ obj-y := cache.o pacache.o setup.o traps.o time.o irq.o \ process.o processor.o pdc_cons.o pdc_chassis.o unwind.o \ topology.o +ifdef CONFIG_FUNCTION_TRACER +# Do not profile debug and lowlevel utilities +CFLAGS_REMOVE_ftrace.o = -pg +CFLAGS_REMOVE_cache.o = -pg +CFLAGS_REMOVE_irq.o = -pg +CFLAGS_REMOVE_pacache.o = -pg +CFLAGS_REMOVE_perf.o = -pg +CFLAGS_REMOVE_traps.o = -pg +CFLAGS_REMOVE_unaligned.o = -pg +CFLAGS_REMOVE_unwind.o = -pg +endif + obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_PA11) += pci-dma.o obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_64BIT) += binfmt_elf32.o sys_parisc32.o signal32.o +obj-$(CONFIG_STACKTRACE)+= stacktrace.o # only supported for PCX-W/U in 64-bit mode at the moment obj-$(CONFIG_64BIT) += perf.o perf_asm.o +obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o +obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 0db9fdcb770..ae3e70cd1e1 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -505,6 +505,18 @@ STREG \pte,0(\ptep) .endm + /* bitshift difference between a PFN (based on kernel's PAGE_SIZE) + * to a CPU TLB 4k PFN (4k => 12 bits to shift) */ + #define PAGE_ADD_SHIFT (PAGE_SHIFT-12) + + /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ + .macro convert_for_tlb_insert20 pte + extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ + 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte + depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ + (63-58)+PAGE_ADD_SHIFT,\pte + .endm + /* Convert the pte and prot to tlb insertion values. How * this happens is quite subtle, read below */ .macro make_insert_tlb spc,pte,prot @@ -544,8 +556,7 @@ depi 1,12,1,\prot /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ - extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58),64-PAGE_SHIFT,\pte - depdi _PAGE_SIZE_ENCODING_DEFAULT,63,63-58,\pte + convert_for_tlb_insert20 \pte .endm /* Identical macro to make_insert_tlb above, except it @@ -563,8 +574,8 @@ /* Get rid of prot bits and convert to page addr for iitlba */ - depi _PAGE_SIZE_ENCODING_DEFAULT,31,ASM_PFN_PTE_SHIFT,\pte - extru \pte,24,25,\pte + depi 0,31,ASM_PFN_PTE_SHIFT,\pte + SHRREG \pte,(ASM_PFN_PTE_SHIFT-(31-26)),\pte .endm /* This is for ILP32 PA2.0 only. The TLB insertion needs @@ -1244,10 +1255,9 @@ nadtlb_check_flush_20w: depdi,z 7,7,3,prot depdi 1,10,1,prot - /* Get rid of prot bits and convert to page addr for idtlbt */ + /* Drop prot bits from pte and convert to page addr for idtlbt */ + convert_for_tlb_insert20 pte - depdi 0,63,12,pte - extrd,u pte,56,52,pte idtlbt pte,prot rfir @@ -1337,8 +1347,8 @@ nadtlb_check_flush_11: /* Get rid of prot bits and convert to page addr for idtlba */ - depi 0,31,12,pte - extru pte,24,25,pte + depi 0,31,ASM_PFN_PTE_SHIFT,pte + SHRREG pte,(ASM_PFN_PTE_SHIFT-(31-26)),pte mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */ mtsp spc,%sr1 @@ -1403,10 +1413,9 @@ nadtlb_check_flush_20: depdi,z 7,7,3,prot depdi 1,10,1,prot - /* Get rid of prot bits and convert to page addr for idtlbt */ + /* Drop prot bits from pte and convert to page addr for idtlbt */ + convert_for_tlb_insert20 pte - depdi 0,63,12,pte - extrd,u pte,56,32,pte idtlbt pte,prot rfir @@ -2176,6 +2185,33 @@ syscall_do_resched: ENDPROC(syscall_exit) +#ifdef CONFIG_FUNCTION_TRACER + .import ftrace_function_trampoline,code +ENTRY(_mcount) + copy %r3, %arg2 + b ftrace_function_trampoline + nop +ENDPROC(_mcount) + +ENTRY(return_to_handler) + load32 return_trampoline, %rp + copy %ret0, %arg0 + copy %ret1, %arg1 + b ftrace_return_to_handler + nop +return_trampoline: + copy %ret0, %rp + copy %r23, %ret0 + copy %r24, %ret1 + +.globl ftrace_stub +ftrace_stub: + bv %r0(%rp) + nop +ENDPROC(return_to_handler) +#endif /* CONFIG_FUNCTION_TRACER */ + + get_register: /* * get_register is used by the non access tlb miss handlers to diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c index f6d241238a7..4c247e02d9b 100644 --- a/arch/parisc/kernel/firmware.c +++ b/arch/parisc/kernel/firmware.c @@ -527,7 +527,11 @@ int pdc_model_capabilities(unsigned long *capabilities) pdc_result[0] = 0; /* preset zero (call may not be implemented!) */ retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_CAPABILITIES, __pa(pdc_result), 0); convert_to_wide(pdc_result); - *capabilities = pdc_result[0]; + if (retval == PDC_OK) { + *capabilities = pdc_result[0]; + } else { + *capabilities = PDC_MODEL_OS32; + } spin_unlock_irqrestore(&pdc_lock, flags); return retval; diff --git a/arch/parisc/kernel/ftrace.c b/arch/parisc/kernel/ftrace.c new file mode 100644 index 00000000000..9877372ffdb --- /dev/null +++ b/arch/parisc/kernel/ftrace.c @@ -0,0 +1,185 @@ +/* + * Code for tracing calls in Linux kernel. + * Copyright (C) 2009 Helge Deller <deller@gmx.de> + * + * based on code for x86 which is: + * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com> + * + * future possible enhancements: + * - add CONFIG_DYNAMIC_FTRACE + * - add CONFIG_STACK_TRACER + */ + +#include <linux/init.h> +#include <linux/ftrace.h> + +#include <asm/sections.h> +#include <asm/ftrace.h> + + + +#ifdef CONFIG_FUNCTION_GRAPH_TRACER + +/* Add a function return address to the trace stack on thread info.*/ +static int push_return_trace(unsigned long ret, unsigned long long time, + unsigned long func, int *depth) +{ + int index; + + if (!current->ret_stack) + return -EBUSY; + + /* The return trace stack is full */ + if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) { + atomic_inc(¤t->trace_overrun); + return -EBUSY; + } + + index = ++current->curr_ret_stack; + barrier(); + current->ret_stack[index].ret = ret; + current->ret_stack[index].func = func; + current->ret_stack[index].calltime = time; + *depth = index; + + return 0; +} + +/* Retrieve a function return address to the trace stack on thread info.*/ +static void pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret) +{ + int index; + + index = current->curr_ret_stack; + + if (unlikely(index < 0)) { + ftrace_graph_stop(); + WARN_ON(1); + /* Might as well panic, otherwise we have no where to go */ + *ret = (unsigned long) + dereference_function_descriptor(&panic); + return; + } + + *ret = current->ret_stack[index].ret; + trace->func = current->ret_stack[index].func; + trace->calltime = current->ret_stack[index].calltime; + trace->overrun = atomic_read(¤t->trace_overrun); + trace->depth = index; + barrier(); + current->curr_ret_stack--; + +} + +/* + * Send the trace to the ring-buffer. + * @return the original return address. + */ +unsigned long ftrace_return_to_handler(unsigned long retval0, + unsigned long retval1) +{ + struct ftrace_graph_ret trace; + unsigned long ret; + + pop_return_trace(&trace, &ret); + trace.rettime = cpu_clock(raw_smp_processor_id()); + ftrace_graph_return(&trace); + + if (unlikely(!ret)) { + ftrace_graph_stop(); + WARN_ON(1); + /* Might as well panic. What else to do? */ + ret = (unsigned long) + dereference_function_descriptor(&panic); + } + + /* HACK: we hand over the old functions' return values + in %r23 and %r24. Assembly in entry.S will take care + and move those to their final registers %ret0 and %ret1 */ + asm( "copy %0, %%r23 \n\t" + "copy %1, %%r24 \n" : : "r" (retval0), "r" (retval1) ); + + return ret; +} + +/* + * Hook the return address and push it in the stack of return addrs + * in current thread info. + */ +void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) +{ + unsigned long old; + unsigned long long calltime; + struct ftrace_graph_ent trace; + + if (unlikely(atomic_read(¤t->tracing_graph_pause))) + return; + + old = *parent; + *parent = (unsigned long) + dereference_function_descriptor(&return_to_handler); + + if (unlikely(!__kernel_text_address(old))) { + ftrace_graph_stop(); + *parent = old; + WARN_ON(1); + return; + } + + calltime = cpu_clock(raw_smp_processor_id()); + + if (push_return_trace(old, calltime, + self_addr, &trace.depth) == -EBUSY) { + *parent = old; + return; + } + + trace.func = self_addr; + + /* Only trace if the calling function expects to */ + if (!ftrace_graph_entry(&trace)) { + current->curr_ret_stack--; + *parent = old; + } +} + +#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ + + +void ftrace_function_trampoline(unsigned long parent, + unsigned long self_addr, + unsigned long org_sp_gr3) +{ + extern ftrace_func_t ftrace_trace_function; + + if (function_trace_stop) + return; + + if (ftrace_trace_function != ftrace_stub) { + ftrace_trace_function(parent, self_addr); + return; + } +#ifdef CONFIG_FUNCTION_GRAPH_TRACER + if (ftrace_graph_entry && ftrace_graph_return) { + unsigned long sp; + unsigned long *parent_rp; + + asm volatile ("copy %%r30, %0" : "=r"(sp)); + /* sanity check: is stack pointer which we got from + assembler function in entry.S in a reasonable + range compared to current stack pointer? */ + if ((sp - org_sp_gr3) > 0x400) + return; + + /* calculate pointer to %rp in stack */ + parent_rp = (unsigned long *) org_sp_gr3 - 0x10; + /* sanity check: parent_rp should hold parent */ + if (*parent_rp != parent) + return; + + prepare_ftrace_return(parent_rp, self_addr); + return; + } +#endif +} + diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 1c740f5cbd6..4ea4229d765 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -311,12 +311,12 @@ unsigned long txn_alloc_addr(unsigned int virt_irq) next_cpu++; /* assign to "next" CPU we want this bugger on */ /* validate entry */ - while ((next_cpu < NR_CPUS) && + while ((next_cpu < nr_cpu_ids) && (!per_cpu(cpu_data, next_cpu).txn_addr || !cpu_online(next_cpu))) next_cpu++; - if (next_cpu >= NR_CPUS) + if (next_cpu >= nr_cpu_ids) next_cpu = 0; /* nothing else, assign monarch */ return txn_affinity_addr(virt_irq, next_cpu); diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c index 9013243cecc..ecd1c502444 100644 --- a/arch/parisc/kernel/module.c +++ b/arch/parisc/kernel/module.c @@ -61,9 +61,7 @@ #include <linux/string.h> #include <linux/kernel.h> #include <linux/bug.h> -#include <linux/uaccess.h> -#include <asm/sections.h> #include <asm/unwind.h> #if 0 @@ -115,8 +113,6 @@ struct got_entry { Elf32_Addr addr; }; -#define Elf_Fdesc Elf32_Fdesc - struct stub_entry { Elf32_Word insns[2]; /* each stub entry has two insns */ }; @@ -125,8 +121,6 @@ struct got_entry { Elf64_Addr addr; }; -#define Elf_Fdesc Elf64_Fdesc - struct stub_entry { Elf64_Word insns[4]; /* each stub entry has four insns */ }; @@ -916,15 +910,3 @@ void module_arch_cleanup(struct module *mod) deregister_unwind_table(mod); module_bug_cleanup(mod); } - -#ifdef CONFIG_64BIT -void *dereference_function_descriptor(void *ptr) -{ - Elf64_Fdesc *desc = ptr; - void *p; - - if (!probe_kernel_address(&desc->addr, p)) - ptr = p; - return ptr; -} -#endif diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c index 0eecfbbc59c..df653663d3d 100644 --- a/arch/parisc/kernel/parisc_ksyms.c +++ b/arch/parisc/kernel/parisc_ksyms.c @@ -153,5 +153,10 @@ EXPORT_SYMBOL(node_data); EXPORT_SYMBOL(pfnnid_map); #endif +#ifdef CONFIG_FUNCTION_TRACER +extern void _mcount(void); +EXPORT_SYMBOL(_mcount); +#endif + /* from pacache.S -- needed for copy_page */ EXPORT_SYMBOL(copy_user_page_asm); diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c index 8aa591ed912..6f69101f90b 100644 --- a/arch/parisc/kernel/process.c +++ b/arch/parisc/kernel/process.c @@ -46,14 +46,15 @@ #include <linux/stddef.h> #include <linux/unistd.h> #include <linux/kallsyms.h> +#include <linux/uaccess.h> #include <asm/io.h> #include <asm/asm-offsets.h> #include <asm/pdc.h> #include <asm/pdc_chassis.h> #include <asm/pgalloc.h> -#include <asm/uaccess.h> #include <asm/unwind.h> +#include <asm/sections.h> /* * The idle thread. There's no useful work to be @@ -231,8 +232,8 @@ sys_clone(unsigned long clone_flags, unsigned long usp, However, these last 3 args are only examined if the proper flags are set. */ - int __user *child_tidptr; - int __user *parent_tidptr; + int __user *parent_tidptr = (int __user *)regs->gr[24]; + int __user *child_tidptr = (int __user *)regs->gr[22]; /* usp must be word aligned. This also prevents users from * passing in the value 1 (which is the signal for a special @@ -243,16 +244,6 @@ sys_clone(unsigned long clone_flags, unsigned long usp, if (usp == 0) usp = regs->gr[30]; - if (clone_flags & CLONE_PARENT_SETTID) - parent_tidptr = (int __user *)regs->gr[24]; - else - parent_tidptr = NULL; - - if (clone_flags & (CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)) - child_tidptr = (int __user *)regs->gr[22]; - else - child_tidptr = NULL; - return do_fork(clone_flags, usp, regs, 0, parent_tidptr, child_tidptr); } @@ -400,3 +391,15 @@ get_wchan(struct task_struct *p) } while (count++ < 16); return 0; } + +#ifdef CONFIG_64BIT +void *dereference_function_descriptor(void *ptr) +{ + Elf64_Fdesc *desc = ptr; + void *p; + + if (!probe_kernel_address(&desc->addr, p)) + ptr = p; + return ptr; +} +#endif diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c index ecb609342fe..e09d0f7fb6b 100644 --- a/arch/parisc/kernel/processor.c +++ b/arch/parisc/kernel/processor.c @@ -100,8 +100,8 @@ static int __cpuinit processor_probe(struct parisc_device *dev) struct cpuinfo_parisc *p; #ifdef CONFIG_SMP - if (num_online_cpus() >= NR_CPUS) { - printk(KERN_INFO "num_online_cpus() >= NR_CPUS\n"); + if (num_online_cpus() >= nr_cpu_ids) { + printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n"); return 1; } #else @@ -214,7 +214,7 @@ static int __cpuinit processor_probe(struct parisc_device *dev) */ #ifdef CONFIG_SMP if (cpuid) { - cpu_set(cpuid, cpu_present_map); + set_cpu_present(cpuid, true); cpu_up(cpuid); } #endif @@ -364,6 +364,13 @@ show_cpuinfo (struct seq_file *m, void *v) boot_cpu_data.cpu_hz / 1000000, boot_cpu_data.cpu_hz % 1000000 ); + seq_printf(m, "capabilities\t:"); + if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32) + seq_printf(m, " os32"); + if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64) + seq_printf(m, " os64"); + seq_printf(m, "\n"); + seq_printf(m, "model\t\t: %s\n" "model name\t: %s\n", boot_cpu_data.pdc.sys_model_name, diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c index 9995d7ed581..1fd0f0cec03 100644 --- a/arch/parisc/kernel/smp.c +++ b/arch/parisc/kernel/smp.c @@ -31,6 +31,7 @@ #include <linux/err.h> #include <linux/delay.h> #include <linux/bitops.h> +#include <linux/ftrace.h> #include <asm/system.h> #include <asm/atomic.h> @@ -113,14 +114,14 @@ halt_processor(void) { /* REVISIT : redirect I/O Interrupts to another CPU? */ /* REVISIT : does PM *know* this CPU isn't available? */ - cpu_clear(smp_processor_id(), cpu_online_map); + set_cpu_online(smp_processor_id(), false); local_irq_disable(); for (;;) ; } -irqreturn_t +irqreturn_t __irq_entry ipi_interrupt(int irq, void *dev_id) { int this_cpu = smp_processor_id(); @@ -214,11 +215,11 @@ ipi_send(int cpu, enum ipi_message_type op) } static void -send_IPI_mask(cpumask_t mask, enum ipi_message_type op) +send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op) { int cpu; - for_each_cpu_mask(cpu, mask) + for_each_cpu(cpu, mask) ipi_send(cpu, op); } @@ -257,7 +258,7 @@ smp_send_all_nop(void) send_IPI_allbutself(IPI_NOP); } -void arch_send_call_function_ipi(cpumask_t mask) +void arch_send_call_function_ipi_mask(const struct cpumask *mask) { send_IPI_mask(mask, IPI_CALL_FUNC); } @@ -296,13 +297,14 @@ smp_cpu_init(int cpunum) mb(); /* Well, support 2.4 linux scheme as well. */ - if (cpu_test_and_set(cpunum, cpu_online_map)) + if (cpu_isset(cpunum, cpu_online_map)) { extern void machine_halt(void); /* arch/parisc.../process.c */ printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); machine_halt(); } + set_cpu_online(cpunum, true); /* Initialise the idle task for this CPU */ atomic_inc(&init_mm.mm_count); @@ -424,8 +426,8 @@ void __init smp_prepare_boot_cpu(void) /* Setup BSP mappings */ printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor); - cpu_set(bootstrap_processor, cpu_online_map); - cpu_set(bootstrap_processor, cpu_present_map); + set_cpu_online(bootstrap_processor, true); + set_cpu_present(bootstrap_processor, true); } @@ -436,8 +438,7 @@ void __init smp_prepare_boot_cpu(void) */ void __init smp_prepare_cpus(unsigned int max_cpus) { - cpus_clear(cpu_present_map); - cpu_set(0, cpu_present_map); + init_cpu_present(cpumask_of(0)); parisc_max_cpus = max_cpus; if (!max_cpus) diff --git a/arch/parisc/kernel/stacktrace.c b/arch/parisc/kernel/stacktrace.c new file mode 100644 index 00000000000..2fe914c5f53 --- /dev/null +++ b/arch/parisc/kernel/stacktrace.c @@ -0,0 +1,63 @@ +/* + * Stack trace management functions + * + * Copyright (C) 2009 Helge Deller <deller@gmx.de> + * based on arch/x86/kernel/stacktrace.c by Ingo Molnar <mingo@redhat.com> + * and parisc unwind functions by Randolph Chung <tausq@debian.org> + * + * TODO: Userspace stacktrace (CONFIG_USER_STACKTRACE_SUPPORT) + */ +#include <linux/module.h> +#include <linux/stacktrace.h> + +#include <asm/unwind.h> + +static void dump_trace(struct task_struct *task, struct stack_trace *trace) +{ + struct unwind_frame_info info; + + /* initialize unwind info */ + if (task == current) { + unsigned long sp; + struct pt_regs r; +HERE: + asm volatile ("copy %%r30, %0" : "=r"(sp)); + memset(&r, 0, sizeof(struct pt_regs)); + r.iaoq[0] = (unsigned long)&&HERE; + r.gr[2] = (unsigned long)__builtin_return_address(0); + r.gr[30] = sp; + unwind_frame_init(&info, task, &r); + } else { + unwind_frame_init_from_blocked_task(&info, task); + } + + /* unwind stack and save entries in stack_trace struct */ + trace->nr_entries = 0; + while (trace->nr_entries < trace->max_entries) { + if (unwind_once(&info) < 0 || info.ip == 0) + break; + + if (__kernel_text_address(info.ip)) + trace->entries[trace->nr_entries++] = info.ip; + } +} + + +/* + * Save stack-backtrace addresses into a stack_trace buffer. + */ +void save_stack_trace(struct stack_trace *trace) +{ + dump_trace(current, trace); + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; +} +EXPORT_SYMBOL_GPL(save_stack_trace); + +void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) +{ + dump_trace(tsk, trace); + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; +} +EXPORT_SYMBOL_GPL(save_stack_trace_tsk); diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index 69b6eebc466..59fc1a43ec3 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S @@ -365,17 +365,51 @@ tracesys_sigexit: /********************************************************* - Light-weight-syscall code + 32/64-bit Light-Weight-Syscall ABI - r20 - lws number - r26,r25,r24,r23,r22 - Input registers - r28 - Function return register - r21 - Error code. + * - Indicates a hint for userspace inline asm + implementations. - Scracth: Any of the above that aren't being - currently used, including r1. + Syscall number (caller-saves) + - %r20 + * In asm clobber. - Return pointer: r31 (Not usable) + Argument registers (caller-saves) + - %r26, %r25, %r24, %r23, %r22 + * In asm input. + + Return registers (caller-saves) + - %r28 (return), %r21 (errno) + * In asm output. + + Caller-saves registers + - %r1, %r27, %r29 + - %r2 (return pointer) + - %r31 (ble link register) + * In asm clobber. + + Callee-saves registers + - %r3-%r18 + - %r30 (stack pointer) + * Not in asm clobber. + + If userspace is 32-bit: + Callee-saves registers + - %r19 (32-bit PIC register) + + Differences from 32-bit calling convention: + - Syscall number in %r20 + - Additional argument register %r22 (arg4) + - Callee-saves %r19. + + If userspace is 64-bit: + Callee-saves registers + - %r27 (64-bit PIC register) + + Differences from 64-bit calling convention: + - Syscall number in %r20 + - Additional argument register %r22 (arg4) + - Callee-saves %r27. Error codes returned by entry path: @@ -473,7 +507,8 @@ lws_compare_and_swap64: b,n lws_compare_and_swap #else /* If we are not a 64-bit kernel, then we don't - * implement having 64-bit input registers + * have 64-bit input registers, and calling + * the 64-bit LWS CAS returns ENOSYS. */ b,n lws_exit_nosys #endif @@ -635,12 +670,15 @@ END(sys_call_table64) /* All light-weight-syscall atomic operations will use this set of locks + + NOTE: The lws_lock_start symbol must be + at least 16-byte aligned for safe use + with ldcw. */ .section .data .align PAGE_SIZE ENTRY(lws_lock_start) /* lws locks */ - .align 16 .rept 16 /* Keep locks aligned at 16-bytes */ .word 1 diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index e75cae6072c..d4dd05674c6 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c @@ -24,6 +24,7 @@ #include <linux/profile.h> #include <linux/clocksource.h> #include <linux/platform_device.h> +#include <linux/ftrace.h> #include <asm/uaccess.h> #include <asm/io.h> @@ -53,7 +54,7 @@ static unsigned long clocktick __read_mostly; /* timer cycles per tick */ * held off for an arbitrarily long period of time by interrupts being * disabled, so we may miss one or more ticks. */ -irqreturn_t timer_interrupt(int irq, void *dev_id) +irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id) { unsigned long now; unsigned long next_tick; @@ -216,14 +217,14 @@ void __init start_cpu_itimer(void) per_cpu(cpu_data, cpu).it_value = next_tick; } -static struct platform_device rtc_parisc_dev = { - .name = "rtc-parisc", +static struct platform_device rtc_generic_dev = { + .name = "rtc-generic", .id = -1, }; static int __init rtc_init(void) { - if (platform_device_register(&rtc_parisc_dev) < 0) + if (platform_device_register(&rtc_generic_dev) < 0) printk(KERN_ERR "unable to register rtc device...\n"); /* not necessarily an error */ diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c index ba658d2086f..c32f5d6d778 100644 --- a/arch/parisc/kernel/traps.c +++ b/arch/parisc/kernel/traps.c @@ -247,6 +247,8 @@ void die_if_kernel(char *str, struct pt_regs *regs, long err) oops_in_progress = 1; + oops_enter(); + /* Amuse the user in a SPARC fashion */ if (err) printk( KERN_CRIT " _______________________________ \n" @@ -293,6 +295,7 @@ KERN_CRIT " || ||\n"); panic("Fatal exception"); } + oops_exit(); do_exit(SIGSEGV); } @@ -494,7 +497,7 @@ void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long o panic(msg); } -void handle_interruption(int code, struct pt_regs *regs) +void notrace handle_interruption(int code, struct pt_regs *regs) { unsigned long fault_address = 0; unsigned long fault_space = 0; diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 1a3b6ccd362..fd2cc4fd2b6 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S @@ -54,6 +54,8 @@ SECTIONS TEXT_TEXT SCHED_TEXT LOCK_TEXT + KPROBES_TEXT + IRQENTRY_TEXT *(.text.do_softirq) *(.text.sys_exit) *(.text.do_sigaltstack) diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index 9d704d9831d..4356ceb1e36 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c @@ -456,6 +456,13 @@ void __init mem_init(void) { int codesize, reservedpages, datasize, initsize; + /* Do sanity checks on page table constants */ + BUILD_BUG_ON(PTE_ENTRY_SIZE != sizeof(pte_t)); + BUILD_BUG_ON(PMD_ENTRY_SIZE != sizeof(pmd_t)); + BUILD_BUG_ON(PGD_ENTRY_SIZE != sizeof(pgd_t)); + BUILD_BUG_ON(PAGE_SHIFT + BITS_PER_PTE + BITS_PER_PMD + BITS_PER_PGD + > BITS_PER_LONG); + high_memory = __va((max_pfn << PAGE_SHIFT)); #ifndef CONFIG_DISCONTIGMEM diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 45192dce65c..9e08d8a69fd 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -346,7 +346,7 @@ config PHYP_DUMP help Hypervisor-assisted dump is meant to be a kdump replacement offering robustness and speed not possible without system - hypervisor assistence. + hypervisor assistance. If unsure, say "N" diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h index 67f1812698d..cdb6fd814de 100644 --- a/arch/powerpc/include/asm/ps3.h +++ b/arch/powerpc/include/asm/ps3.h @@ -50,6 +50,9 @@ enum ps3_param_av_multi_out { enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void); +extern u64 ps3_os_area_get_rtc_diff(void); +extern void ps3_os_area_set_rtc_diff(u64 rtc_diff); + /* dma routines */ enum ps3_dma_page_size { diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index c9564031a2a..926ea864e34 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c @@ -1127,3 +1127,19 @@ void div128_by_32(u64 dividend_high, u64 dividend_low, dr->result_low = ((u64)y << 32) + z; } + +static int __init rtc_init(void) +{ + struct platform_device *pdev; + + if (!ppc_md.get_rtc_time) + return -ENODEV; + + pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + return 0; +} + +module_init(rtc_init); diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index ffa2a9fd53d..e3e87078d03 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -293,7 +293,7 @@ config CPM config OF_RTC bool help - Uses information from the OF or flattened device tree to instatiate + Uses information from the OF or flattened device tree to instantiate platform devices for direct mapped RTC chips like the DS1742 or DS1743. source "arch/powerpc/sysdev/bestcomm/Kconfig" diff --git a/arch/powerpc/platforms/ps3/os-area.c b/arch/powerpc/platforms/ps3/os-area.c index e1c83c23b43..86e392b1b04 100644 --- a/arch/powerpc/platforms/ps3/os-area.c +++ b/arch/powerpc/platforms/ps3/os-area.c @@ -808,6 +808,7 @@ u64 ps3_os_area_get_rtc_diff(void) { return saved_params.rtc_diff; } +EXPORT_SYMBOL(ps3_os_area_get_rtc_diff); /** * ps3_os_area_set_rtc_diff - Set the rtc diff value. @@ -823,6 +824,7 @@ void ps3_os_area_set_rtc_diff(u64 rtc_diff) os_area_queue_work(); } } +EXPORT_SYMBOL(ps3_os_area_set_rtc_diff); /** * ps3_os_area_get_av_multi_out - Returns the default video mode. diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h index 235c13ebacd..136aa0637d9 100644 --- a/arch/powerpc/platforms/ps3/platform.h +++ b/arch/powerpc/platforms/ps3/platform.h @@ -64,8 +64,6 @@ int ps3_set_rtc_time(struct rtc_time *time); void __init ps3_os_area_save_params(void); void __init ps3_os_area_init(void); -u64 ps3_os_area_get_rtc_diff(void); -void ps3_os_area_set_rtc_diff(u64 rtc_diff); /* spu */ diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c index 3331ccbb8d3..66181821322 100644 --- a/arch/powerpc/platforms/ps3/setup.c +++ b/arch/powerpc/platforms/ps3/setup.c @@ -270,8 +270,6 @@ define_machine(ps3) { .init_IRQ = ps3_init_IRQ, .panic = ps3_panic, .get_boot_time = ps3_get_boot_time, - .set_rtc_time = ps3_set_rtc_time, - .get_rtc_time = ps3_get_rtc_time, .set_dabr = ps3_set_dabr, .calibrate_decr = ps3_calibrate_decr, .progress = ps3_progress, diff --git a/arch/powerpc/platforms/ps3/time.c b/arch/powerpc/platforms/ps3/time.c index d0daf7d6d3b..b178a1e66c9 100644 --- a/arch/powerpc/platforms/ps3/time.c +++ b/arch/powerpc/platforms/ps3/time.c @@ -19,6 +19,7 @@ */ #include <linux/kernel.h> +#include <linux/platform_device.h> #include <asm/rtc.h> #include <asm/lv1call.h> @@ -74,23 +75,20 @@ static u64 read_rtc(void) return rtc_val; } -int ps3_set_rtc_time(struct rtc_time *tm) +unsigned long __init ps3_get_boot_time(void) { - u64 now = mktime(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, - tm->tm_hour, tm->tm_min, tm->tm_sec); - - ps3_os_area_set_rtc_diff(now - read_rtc()); - return 0; + return read_rtc() + ps3_os_area_get_rtc_diff(); } -void ps3_get_rtc_time(struct rtc_time *tm) +static int __init ps3_rtc_init(void) { - to_tm(read_rtc() + ps3_os_area_get_rtc_diff(), tm); - tm->tm_year -= 1900; - tm->tm_mon -= 1; -} + struct platform_device *pdev; -unsigned long __init ps3_get_boot_time(void) -{ - return read_rtc() + ps3_os_area_get_rtc_diff(); + pdev = platform_device_register_simple("rtc-ps3", -1, NULL, 0); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + return 0; } + +module_init(ps3_rtc_init); diff --git a/arch/powerpc/sysdev/bestcomm/Kconfig b/arch/powerpc/sysdev/bestcomm/Kconfig index 0b192a1c429..29e427085ef 100644 --- a/arch/powerpc/sysdev/bestcomm/Kconfig +++ b/arch/powerpc/sysdev/bestcomm/Kconfig @@ -9,8 +9,8 @@ config PPC_BESTCOMM select PPC_LIB_RHEAP help BestComm is the name of the communication coprocessor found - on the Freescale MPC5200 family of processor. It's usage is - optionnal for some drivers (like ATA), but required for + on the Freescale MPC5200 family of processor. Its usage is + optional for some drivers (like ATA), but required for others (like FEC). If you want to use drivers that require DMA operations, diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h index 2009158a450..72137bc907a 100644 --- a/arch/s390/include/asm/smp.h +++ b/arch/s390/include/asm/smp.h @@ -92,12 +92,6 @@ extern void arch_send_call_function_ipi(cpumask_t mask); #endif #ifndef CONFIG_SMP -static inline void smp_send_stop(void) -{ - /* Disable all interrupts/machine checks */ - __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); -} - #define hard_smp_processor_id() 0 #define smp_cpu_not_running(cpu) 1 #endif diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 8d50d527c59..2d52b515c24 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -640,10 +640,10 @@ config GUSA_RB depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) help Enabling this option will allow the kernel to implement some - atomic operations using a software implemention of load-locked/ + atomic operations using a software implementation of load-locked/ store-conditional (LLSC). On machines which do not have hardware LLSC, this should be more efficient than the other alternative of - disabling insterrupts around the atomic sequence. + disabling interrupts around the atomic sequence. endmenu diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index a46c3a21e26..3a1b7bf03cf 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S @@ -686,7 +686,7 @@ tlb_fixup_done: * point. * * There used to be enormous complexity wrt. transferring - * over from the firwmare's trap table to the Linux kernel's. + * over from the firmware's trap table to the Linux kernel's. * For example, there was a chicken & egg problem wrt. building * the OBP page tables, yet needing to be on the Linux kernel * trap table (to translate PAGE_OFFSET addresses) in order to diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c index d42f826a8ab..f934225fd8e 100644 --- a/arch/um/drivers/ubd_kern.c +++ b/arch/um/drivers/ubd_kern.c @@ -22,6 +22,7 @@ #include "linux/kernel.h" #include "linux/module.h" #include "linux/blkdev.h" +#include "linux/ata.h" #include "linux/hdreg.h" #include "linux/init.h" #include "linux/cdrom.h" @@ -1308,16 +1309,15 @@ static int ubd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, unsigned long arg) { struct ubd *ubd_dev = bdev->bd_disk->private_data; - struct hd_driveid ubd_id = { - .cyls = 0, - .heads = 128, - .sectors = 32, - }; + u16 ubd_id[ATA_ID_WORDS]; switch (cmd) { struct cdrom_volctrl volume; case HDIO_GET_IDENTITY: - ubd_id.cyls = ubd_dev->size / (128 * 32 * 512); + memset(&ubd_id, 0, ATA_ID_WORDS * 2); + ubd_id[ATA_ID_CYLS] = ubd_dev->size / (128 * 32 * 512); + ubd_id[ATA_ID_HEADS] = 128; + ubd_id[ATA_ID_SECTORS] = 32; if(copy_to_user((char __user *) arg, (char *) &ubd_id, sizeof(ubd_id))) return -EFAULT; diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 748e50a1a15..5696cec7b4b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1144,7 +1144,7 @@ config NODES_SHIFT depends on NEED_MULTIPLE_NODES ---help--- Specify the maximum number of NUMA Nodes available on the target - system. Increases memory reserved to accomodate various tables. + system. Increases memory reserved to accommodate various tables. config HAVE_ARCH_BOOTMEM def_bool y @@ -1322,7 +1322,7 @@ config MTRR_SANITIZER add writeback entries. Can be disabled with disable_mtrr_cleanup on the kernel command line. - The largest mtrr entry size for a continous block can be set with + The largest mtrr entry size for a continuous block can be set with mtrr_chunk_size. If unsure, say Y. @@ -1837,8 +1837,8 @@ config PCI_MMCONFIG config DMAR bool "Support for DMA Remapping Devices (EXPERIMENTAL)" - depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL - ---help--- + depends on PCI_MSI && ACPI && EXPERIMENTAL + help DMA remapping (DMAR) devices support enables independent address translations for Direct Memory Access (DMA) from devices. These DMA remapping devices are reported via ACPI tables diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index c5962fe3796..a97db99dad5 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c @@ -1928,6 +1928,12 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, return paddr; } +static int amd_iommu_domain_has_cap(struct iommu_domain *domain, + unsigned long cap) +{ + return 0; +} + static struct iommu_ops amd_iommu_ops = { .domain_init = amd_iommu_domain_init, .domain_destroy = amd_iommu_domain_destroy, @@ -1936,5 +1942,6 @@ static struct iommu_ops amd_iommu_ops = { .map = amd_iommu_map_range, .unmap = amd_iommu_unmap_range, .iova_to_phys = amd_iommu_iova_to_phys, + .domain_has_cap = amd_iommu_domain_has_cap, }; diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index f234a37bd42..f1817f71e00 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -258,24 +258,7 @@ void pcibios_set_master(struct pci_dev *dev) pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); } -static void pci_unmap_page_range(struct vm_area_struct *vma) -{ - u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT; - free_memtype(addr, addr + vma->vm_end - vma->vm_start); -} - -static void pci_track_mmap_page_range(struct vm_area_struct *vma) -{ - u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT; - unsigned long flags = pgprot_val(vma->vm_page_prot) - & _PAGE_CACHE_MASK; - - reserve_memtype(addr, addr + vma->vm_end - vma->vm_start, flags, NULL); -} - static struct vm_operations_struct pci_mmap_ops = { - .open = pci_track_mmap_page_range, - .close = pci_unmap_page_range, .access = generic_access_phys, }; @@ -283,11 +266,6 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine) { unsigned long prot; - u64 addr = vma->vm_pgoff << PAGE_SHIFT; - unsigned long len = vma->vm_end - vma->vm_start; - unsigned long flags; - unsigned long new_flags; - int retval; /* I/O space cannot be accessed via normal processor loads and * stores on this platform. @@ -308,30 +286,6 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, vma->vm_page_prot = __pgprot(prot); - flags = pgprot_val(vma->vm_page_prot) & _PAGE_CACHE_MASK; - retval = reserve_memtype(addr, addr + len, flags, &new_flags); - if (retval) - return retval; - - if (flags != new_flags) { - if (!is_new_memtype_allowed(flags, new_flags)) { - free_memtype(addr, addr+len); - return -EINVAL; - } - flags = new_flags; - vma->vm_page_prot = __pgprot( - (pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK) | - flags); - } - - if (((vma->vm_pgoff < max_low_pfn_mapped) || - (vma->vm_pgoff >= (1UL<<(32 - PAGE_SHIFT)) && - vma->vm_pgoff < max_pfn_mapped)) && - ioremap_change_attr((unsigned long)__va(addr), len, flags)) { - free_memtype(addr, addr + len); - return -EINVAL; - } - if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, vma->vm_end - vma->vm_start, vma->vm_page_prot)) diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 98120083043..fa6dc4dd3b1 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -4,16 +4,13 @@ mainmenu "Linux/Xtensa Kernel Configuration" config FRAME_POINTER - bool - default n + def_bool n config ZONE_DMA - bool - default y + def_bool y config XTENSA - bool - default y + def_bool y select HAVE_IDE help Xtensa processors are 32-bit RISC machines designed by Tensilica @@ -24,28 +21,25 @@ config XTENSA a home page at <http://xtensa.sourceforge.net/>. config RWSEM_XCHGADD_ALGORITHM - bool - default y + def_bool y config GENERIC_FIND_NEXT_BIT - bool - default y + def_bool y config GENERIC_HWEIGHT - bool - default y + def_bool y config GENERIC_HARDIRQS - bool - default y + def_bool y + +config GENERIC_GPIO + def_bool y config ARCH_HAS_ILOG2_U32 - bool - default n + def_bool n config ARCH_HAS_ILOG2_U64 - bool - default n + def_bool n config NO_IOPORT def_bool y @@ -54,9 +48,18 @@ config HZ int default 100 +config GENERIC_TIME + def_bool y + source "init/Kconfig" source "kernel/Kconfig.freezer" +config MMU + def_bool n + +config VARIANT_IRQ_SWITCH + def_bool n + menu "Processor type and features" choice @@ -65,38 +68,41 @@ choice config XTENSA_VARIANT_FSF bool "fsf - default (not generic) configuration" + select MMU config XTENSA_VARIANT_DC232B bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" + select MMU help - This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). -endchoice + This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). -config MMU - bool - default y +config XTENSA_VARIANT_S6000 + bool "s6000 - Stretch software configurable processor" + select VARIANT_IRQ_SWITCH + select ARCH_REQUIRE_GPIOLIB +endchoice config XTENSA_UNALIGNED_USER bool "Unaligned memory access in use space" - ---help--- - The Xtensa architecture currently does not handle unaligned - memory accesses in hardware but through an exception handler. - Per default, unaligned memory accesses are disabled in user space. + help + The Xtensa architecture currently does not handle unaligned + memory accesses in hardware but through an exception handler. + Per default, unaligned memory accesses are disabled in user space. - Say Y here to enable unaligned memory access in user space. + Say Y here to enable unaligned memory access in user space. config PREEMPT bool "Preemptible Kernel" - ---help--- - This option reduces the latency of the kernel when reacting to - real-time or interactive events by allowing a low priority process to - be preempted even if it is in kernel mode executing a system call. - Unfortunately the kernel code has some race conditions if both - CONFIG_SMP and CONFIG_PREEMPT are enabled, so this option is - currently disabled if you are building an SMP kernel. + help + This option reduces the latency of the kernel when reacting to + real-time or interactive events by allowing a low priority process to + be preempted even if it is in kernel mode executing a system call. + Unfortunately the kernel code has some race conditions if both + CONFIG_SMP and CONFIG_PREEMPT are enabled, so this option is + currently disabled if you are building an SMP kernel. - Say Y here if you are building a kernel for a desktop, embedded - or real-time system. Say N if you are unsure. + Say Y here if you are building a kernel for a desktop, embedded + or real-time system. Say N if you are unsure. config MATH_EMULATION bool "Math emulation" @@ -105,6 +111,32 @@ config MATH_EMULATION endmenu +config XTENSA_CALIBRATE_CCOUNT + def_bool n + help + On some platforms (XT2000, for example), the CPU clock rate can + vary. The frequency can be determined, however, by measuring + against a well known, fixed frequency, such as an UART oscillator. + +config SERIAL_CONSOLE + def_bool n + +config XTENSA_ISS_NETWORK + def_bool n + +menu "Bus options" + +config PCI + bool "PCI support" + default y + help + Find out whether you have a PCI motherboard. PCI is the name of a + bus system, i.e. the way the CPU talks to the other stuff inside + your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or + VESA. If you have PCI, say Y, otherwise N. + +source "drivers/pci/Kconfig" + menu "Platform options" choice @@ -113,33 +145,35 @@ choice config XTENSA_PLATFORM_ISS bool "ISS" + select XTENSA_CALIBRATE_CCOUNT + select SERIAL_CONSOLE + select XTENSA_ISS_NETWORK help ISS is an acronym for Tensilica's Instruction Set Simulator. config XTENSA_PLATFORM_XT2000 bool "XT2000" + select XTENSA_CALIBRATE_CCOUNT + select PCI help XT2000 is the name of Tensilica's feature-rich emulation platform. This hardware is capable of running a full Linux distribution. -endchoice +config XTENSA_PLATFORM_S6105 + bool "S6105" + select SERIAL_CONSOLE +endchoice -config XTENSA_CALIBRATE_CCOUNT - bool "Auto calibration of the CPU clock rate" - ---help--- - On some platforms (XT2000, for example), the CPU clock rate can - vary. The frequency can be determined, however, by measuring - against a well known, fixed frequency, such as an UART oscillator. config XTENSA_CPU_CLOCK int "CPU clock rate [MHz]" depends on !XTENSA_CALIBRATE_CCOUNT - default "16" + default 16 config GENERIC_CALIBRATE_DELAY bool "Auto calibration of the BogoMIPS value" - ---help--- + help The BogoMIPS value can easily be derived from the CPU frequency. config CMDLINE_BOOL @@ -156,52 +190,27 @@ config CMDLINE time by entering them here. As a minimum, you should specify the memory size and the root device (e.g., mem=64M root=/dev/nfs). -config SERIAL_CONSOLE - bool - depends on XTENSA_PLATFORM_ISS - default y - -config XTENSA_ISS_NETWORK - bool - depends on XTENSA_PLATFORM_ISS - default y - source "mm/Kconfig" endmenu -menu "Bus options" - -config PCI - bool "PCI support" if !XTENSA_PLATFORM_ISS - depends on !XTENSA_PLATFORM_ISS - default y +config HOTPLUG + bool "Support for hot-pluggable devices" help - Find out whether you have a PCI motherboard. PCI is the name of a - bus system, i.e. the way the CPU talks to the other stuff inside - your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or - VESA. If you have PCI, say Y, otherwise N. + Say Y here if you want to plug devices into your computer while + the system is running, and be able to use them quickly. In many + cases, the devices can likewise be unplugged at any time too. -source "drivers/pci/Kconfig" + One well known example of this is PCMCIA- or PC-cards, credit-card + size devices such as network cards, modems or hard drives which are + plugged into slots found on all modern laptop computers. Another + example, used on modern desktops as well as laptops, is USB. -config HOTPLUG - - bool "Support for hot-pluggable devices" - ---help--- - Say Y here if you want to plug devices into your computer while - the system is running, and be able to use them quickly. In many - cases, the devices can likewise be unplugged at any time too. - - One well known example of this is PCMCIA- or PC-cards, credit-card - size devices such as network cards, modems or hard drives which are - plugged into slots found on all modern laptop computers. Another - example, used on modern desktops as well as laptops, is USB. - - Enable HOTPLUG and build a modular kernel. Get agent software - (from <http://linux-hotplug.sourceforge.net/>) and install it. - Then your kernel will automatically call out to a user mode "policy - agent" (/sbin/hotplug) to load modules and set up software needed - to use devices as you hotplug them. + Enable HOTPLUG and build a modular kernel. Get agent software + (from <http://linux-hotplug.sourceforge.net/>) and install it. + Then your kernel will automatically call out to a user mode "policy + agent" (/sbin/hotplug) to load modules and set up software needed + to use devices as you hotplug them. source "drivers/pcmcia/Kconfig" @@ -213,9 +222,8 @@ menu "Executable file formats" # only elf supported config KCORE_ELF - bool + def_bool y depends on PROC_FS - default y help If you enabled support for /proc file system then the file /proc/kcore will contain the kernel core image in ELF format. This @@ -240,7 +248,7 @@ source "fs/Kconfig" menu "Xtensa initrd options" depends on BLK_DEV_INITRD - config EMBEDDED_RAMDISK +config EMBEDDED_RAMDISK bool "Embed root filesystem ramdisk into the kernel" config EMBEDDED_RAMDISK_IMAGE diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile index 1da55fe4bef..4caffac3ca2 100644 --- a/arch/xtensa/Makefile +++ b/arch/xtensa/Makefile @@ -15,6 +15,7 @@ variant-$(CONFIG_XTENSA_VARIANT_FSF) := fsf variant-$(CONFIG_XTENSA_VARIANT_DC232B) := dc232b +variant-$(CONFIG_XTENSA_VARIANT_S6000) := s6000 variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM) := custom VARIANT = $(variant-y) @@ -24,6 +25,7 @@ export VARIANT platform-$(CONFIG_XTENSA_PLATFORM_XT2000) := xt2000 platform-$(CONFIG_XTENSA_PLATFORM_ISS) := iss +platform-$(CONFIG_XTENSA_PLATFORM_S6105) := s6105 PLATFORM = $(platform-y) export PLATFORM @@ -62,20 +64,23 @@ ifneq ($(VARIANT),) endif endif -# +# Only build variant and/or platform if it includes a Makefile + +buildvar := $(shell test -a $(srctree)/arch/xtensa/variants/$(VARIANT)/Makefile && echo arch/xtensa/variants/$(VARIANT)/) +buildplf := $(shell test -a $(srctree)/arch/xtensa/platforms/$(PLATFORM)/Makefile && echo arch/xtensa/platforms/$(PLATFORM)/) + +# Find libgcc.a LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) head-y := arch/xtensa/kernel/head.o core-y += arch/xtensa/kernel/ arch/xtensa/mm/ -ifneq ($(PLATFORM),) -core-y += arch/xtensa/platforms/$(PLATFORM)/ -endif +core-y += $(buildvar) $(buildplf) + libs-y += arch/xtensa/lib/ $(LIBGCC) boot := arch/xtensa/boot - all: zImage bzImage : zImage diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig new file mode 100644 index 00000000000..6e1deff4159 --- /dev/null +++ b/arch/xtensa/configs/s6105_defconfig @@ -0,0 +1,530 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.29-rc7-s6 +# Tue Mar 10 11:09:26 2009 +# +# CONFIG_FRAME_POINTER is not set +CONFIG_ZONE_DMA=y +CONFIG_XTENSA=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_NO_IOPORT=y +CONFIG_HZ=100 +CONFIG_GENERIC_TIME=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +# CONFIG_CLASSIC_RCU is not set +# CONFIG_TREE_RCU is not set +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_TRACE is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_HOTPLUG is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_FREEZER is not set +# CONFIG_MMU is not set +CONFIG_VARIANT_IRQ_SWITCH=y + +# +# Processor type and features +# +# CONFIG_XTENSA_VARIANT_FSF is not set +# CONFIG_XTENSA_VARIANT_DC232B is not set +CONFIG_XTENSA_VARIANT_S6000=y +# CONFIG_XTENSA_UNALIGNED_USER is not set +CONFIG_PREEMPT=y +# CONFIG_MATH_EMULATION is not set +# CONFIG_HIGHMEM is not set +# CONFIG_XTENSA_CALIBRATE_CCOUNT is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_XTENSA_ISS_NETWORK is not set + +# +# Bus options +# +# CONFIG_PCI is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set + +# +# Platform options +# +# CONFIG_XTENSA_PLATFORM_ISS is not set +# CONFIG_XTENSA_PLATFORM_XT2000 is not set +CONFIG_XTENSA_PLATFORM_S6105=y +CONFIG_XTENSA_CPU_CLOCK=300 +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttyS1,38400 debug bootmem_debug loglevel=7" +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_VIRT_TO_BUS=y + +# +# Executable file formats +# +CONFIG_KCORE_ELF=y +CONFIG_BINFMT_FLAT=y +# CONFIG_BINFMT_ZFLAT is not set +# CONFIG_BINFMT_SHARED_FLAT is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_NET=y + +# +# Networking options +# +CONFIG_COMPAT_NET_DEV_OPS=y +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_NETDEVICES is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_REGULATOR is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_SOUND is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Xtensa initrd options +# +# CONFIG_EMBEDDED_RAMDISK is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +CONFIG_DEBUG_NOMMU_REGIONS=y +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set + +# +# Tracers +# +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_TRACE_BRANCH_PROFILING is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +# CONFIG_CRC32 is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h index 94c4c53a099..8fc1c0c8de0 100644 --- a/arch/xtensa/include/asm/cacheflush.h +++ b/arch/xtensa/include/asm/cacheflush.h @@ -65,13 +65,17 @@ extern void __flush_invalidate_dcache_range(unsigned long, unsigned long); # define __flush_invalidate_dcache_range(p,s) __invalidate_dcache_range(p,s) #endif -#if (DCACHE_WAY_SIZE > PAGE_SIZE) +#if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE) extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); +#else +static inline void __flush_invalidate_dcache_page_alias(unsigned long virt, + unsigned long phys) { } #endif -#if (ICACHE_WAY_SIZE > PAGE_SIZE) +#if defined(CONFIG_MMU) && (ICACHE_WAY_SIZE > PAGE_SIZE) extern void __invalidate_icache_page_alias(unsigned long, unsigned long); #else -# define __invalidate_icache_page_alias(v,p) do { } while(0) +static inline void __invalidate_icache_page_alias(unsigned long virt, + unsigned long phys) { } #endif /* diff --git a/arch/xtensa/include/asm/dma.h b/arch/xtensa/include/asm/dma.h index e30f3abf48f..137ca3945b0 100644 --- a/arch/xtensa/include/asm/dma.h +++ b/arch/xtensa/include/asm/dma.h @@ -44,8 +44,9 @@ * the value desired). */ +#ifndef MAX_DMA_ADDRESS #define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KIO_SIZE - 1) - +#endif /* Reserve and release a DMA channel */ extern int request_dma(unsigned int dmanr, const char * device_id); diff --git a/arch/xtensa/include/asm/flat.h b/arch/xtensa/include/asm/flat.h new file mode 100644 index 00000000000..94c44abf15e --- /dev/null +++ b/arch/xtensa/include/asm/flat.h @@ -0,0 +1,12 @@ +#ifndef __ASM_XTENSA_FLAT_H +#define __ASM_XTENSA_FLAT_H + +#define flat_argvp_envp_on_stack() 0 +#define flat_old_ram_flag(flags) (flags) +#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) +#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp) +#define flat_put_addr_at_rp(rp, val, relval ) put_unaligned(val, rp) +#define flat_get_relocate_addr(rel) (rel) +#define flat_set_persistent(relval, p) 0 + +#endif /* __ASM_XTENSA_FLAT_H */ diff --git a/arch/xtensa/include/asm/gpio.h b/arch/xtensa/include/asm/gpio.h new file mode 100644 index 00000000000..0763b076396 --- /dev/null +++ b/arch/xtensa/include/asm/gpio.h @@ -0,0 +1,56 @@ +/* + * Generic GPIO API implementation for xtensa. + * + * Stolen from x86, which is derived from the generic GPIO API for powerpc: + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov <avorontsov@ru.mvista.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _ASM_XTENSA_GPIO_H +#define _ASM_XTENSA_GPIO_H + +#include <asm-generic/gpio.h> + +#ifdef CONFIG_GPIOLIB + +/* + * Just call gpiolib. + */ +static inline int gpio_get_value(unsigned int gpio) +{ + return __gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned int gpio, int value) +{ + __gpio_set_value(gpio, value); +} + +static inline int gpio_cansleep(unsigned int gpio) +{ + return __gpio_cansleep(gpio); +} + +/* + * Not implemented, yet. + */ +static inline int gpio_to_irq(unsigned int gpio) +{ + return -ENOSYS; +} + +static inline int irq_to_gpio(unsigned int irq) +{ + return -EINVAL; +} + +#endif /* CONFIG_GPIOLIB */ + +#endif /* _ASM_XTENSA_GPIO_H */ diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index 07b7299dab2..d04cd3a625f 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -69,21 +69,28 @@ static inline void * phys_to_virt(unsigned long address) static inline void *ioremap(unsigned long offset, unsigned long size) { +#ifdef CONFIG_MMU if (offset >= XCHAL_KIO_PADDR && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); - else BUG(); +#else + return (void *)offset; +#endif } static inline void *ioremap_nocache(unsigned long offset, unsigned long size) { +#ifdef CONFIG_MMU if (offset >= XCHAL_KIO_PADDR && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); else BUG(); +#else + return (void *)offset; +#endif } static inline void iounmap(void *addr) diff --git a/arch/xtensa/include/asm/irq.h b/arch/xtensa/include/asm/irq.h index 1620d1e0e69..dfac82dc52a 100644 --- a/arch/xtensa/include/asm/irq.h +++ b/arch/xtensa/include/asm/irq.h @@ -14,6 +14,13 @@ #include <platform/hardware.h> #include <variant/core.h> +#ifdef CONFIG_VARIANT_IRQ_SWITCH +#include <variant/irq.h> +#else +static inline void variant_irq_enable(unsigned int irq) { } +static inline void variant_irq_disable(unsigned int irq) { } +#endif + #ifndef PLATFORM_NR_IRQS # define PLATFORM_NR_IRQS 0 #endif diff --git a/arch/xtensa/include/asm/mmu.h b/arch/xtensa/include/asm/mmu.h index 44c5bb04c55..04890d6e233 100644 --- a/arch/xtensa/include/asm/mmu.h +++ b/arch/xtensa/include/asm/mmu.h @@ -11,7 +11,12 @@ #ifndef _XTENSA_MMU_H #define _XTENSA_MMU_H +#ifndef CONFIG_MMU +#include <asm/nommu.h> +#else + /* Default "unsigned long" context */ typedef unsigned long mm_context_t; +#endif /* CONFIG_MMU */ #endif /* _XTENSA_MMU_H */ diff --git a/arch/xtensa/include/asm/mmu_context.h b/arch/xtensa/include/asm/mmu_context.h index c0fd8e5b451..dbd8731a876 100644 --- a/arch/xtensa/include/asm/mmu_context.h +++ b/arch/xtensa/include/asm/mmu_context.h @@ -13,16 +13,20 @@ #ifndef _XTENSA_MMU_CONTEXT_H #define _XTENSA_MMU_CONTEXT_H +#ifndef CONFIG_MMU +#include <asm/nommu_context.h> +#else + #include <linux/stringify.h> #include <linux/sched.h> +#include <variant/core.h> + #include <asm/pgtable.h> #include <asm/cacheflush.h> #include <asm/tlbflush.h> #include <asm-generic/mm_hooks.h> -#define XCHAL_MMU_ASID_BITS 8 - #if (XCHAL_HAVE_TLBS != 1) # error "Linux must have an MMU!" #endif @@ -133,4 +137,5 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) } +#endif /* CONFIG_MMU */ #endif /* _XTENSA_MMU_CONTEXT_H */ diff --git a/arch/xtensa/include/asm/nommu.h b/arch/xtensa/include/asm/nommu.h new file mode 100644 index 00000000000..dce2c438c5b --- /dev/null +++ b/arch/xtensa/include/asm/nommu.h @@ -0,0 +1,3 @@ +typedef struct { + unsigned long end_brk; +} mm_context_t; diff --git a/arch/xtensa/include/asm/nommu_context.h b/arch/xtensa/include/asm/nommu_context.h new file mode 100644 index 00000000000..599e7a2e729 --- /dev/null +++ b/arch/xtensa/include/asm/nommu_context.h @@ -0,0 +1,25 @@ +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) +{ + return 0; +} + +static inline void destroy_context(struct mm_struct *mm) +{ +} + +static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) +{ +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk) +{ +} + +static inline void deactivate_mm(struct task_struct *tsk, struct mm_struct *mm) +{ +} diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h index 11f7dc2dbec..17e0c5383b1 100644 --- a/arch/xtensa/include/asm/page.h +++ b/arch/xtensa/include/asm/page.h @@ -14,6 +14,7 @@ #include <asm/processor.h> #include <asm/types.h> #include <asm/cache.h> +#include <platform/hardware.h> /* * Fixed TLB translations in the processor. @@ -32,8 +33,14 @@ #define PAGE_SIZE (__XTENSA_UL_CONST(1) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) +#ifdef CONFIG_MMU #define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR #define MAX_MEM_PFN XCHAL_KSEG_SIZE +#else +#define PAGE_OFFSET 0 +#define MAX_MEM_PFN (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE) +#endif + #define PGTABLE_START 0x80000000 /* @@ -150,9 +157,11 @@ extern void copy_user_page(void*, void*, unsigned long, struct page*); * addresses. */ +#define ARCH_PFN_OFFSET (PLATFORM_DEFAULT_MEM_START >> PAGE_SHIFT) + #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) -#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr) +#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && ((pfn) - ARCH_PFN_OFFSET) < max_mapnr) #ifdef CONFIG_DISCONTIGMEM # error CONFIG_DISCONTIGMEM not supported #endif @@ -162,8 +171,9 @@ extern void copy_user_page(void*, void*, unsigned long, struct page*); #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) +#ifdef CONFIG_MMU #define WANT_PAGE_VIRTUAL - +#endif #endif /* __ASSEMBLY__ */ diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index 8014d96b21f..a138770c358 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -183,7 +183,15 @@ extern unsigned long empty_zero_page[1024]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) +#ifdef CONFIG_MMU extern pgd_t swapper_pg_dir[PAGE_SIZE/sizeof(pgd_t)]; +extern void paging_init(void); +extern void pgtable_cache_init(void); +#else +# define swapper_pg_dir NULL +static inline void paging_init(void) { } +static inline void pgtable_cache_init(void) { } +#endif /* * The pmd contains the kernel virtual address of the pte page. @@ -383,8 +391,6 @@ ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) #else -extern void paging_init(void); - #define kern_addr_valid(addr) (1) extern void update_mmu_cache(struct vm_area_struct * vma, @@ -398,9 +404,6 @@ extern void update_mmu_cache(struct vm_area_struct * vma, #define io_remap_pfn_range(vma,from,pfn,size,prot) \ remap_pfn_range(vma, from, pfn, size, prot) - -extern void pgtable_cache_init(void); - typedef pte_t *pte_addr_t; #endif /* !defined (__ASSEMBLY__) */ diff --git a/arch/xtensa/include/asm/platform.h b/arch/xtensa/include/asm/platform.h index e3d5a48ad49..7d936e58e9b 100644 --- a/arch/xtensa/include/asm/platform.h +++ b/arch/xtensa/include/asm/platform.h @@ -74,16 +74,5 @@ extern int platform_pcibios_fixup (void); */ extern void platform_calibrate_ccount (void); -/* - * platform_get_rtc_time returns RTC seconds (returns 0 for no error) - */ -extern int platform_get_rtc_time(time_t*); - -/* - * platform_set_rtc_time set RTC seconds (returns 0 for no error) - */ -extern int platform_set_rtc_time(time_t); - - #endif /* _XTENSA_PLATFORM_H */ diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 07387d3b99f..0ea4937c0b6 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -13,6 +13,7 @@ #include <variant/core.h> #include <asm/coprocessor.h> +#include <platform/hardware.h> #include <linux/compiler.h> #include <asm/ptrace.h> @@ -25,6 +26,8 @@ # error Linux requires the Xtensa Windowed Registers Option. #endif +#define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH + /* * User space process size: 1 GB. * Windowed call ABI requires caller and callee to be located within the same @@ -33,7 +36,12 @@ * the 1 GB requirement applies to the stack as well. */ +#ifdef CONFIG_MMU #define TASK_SIZE __XTENSA_UL_CONST(0x40000000) +#else +#define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE) +#endif + #define STACK_TOP TASK_SIZE #define STACK_TOP_MAX STACK_TOP diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index a51d36a2738..80d24c485fd 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -1463,6 +1463,7 @@ ENTRY(_spill_registers) callx0 a0 # should not return 1: j 1b +#ifdef CONFIG_MMU /* * We should never get here. Bail out! */ @@ -1775,7 +1776,7 @@ ENTRY(fast_store_prohibited) bbsi.l a2, PS_UM_BIT, 1f j _kernel_exception 1: j _user_exception - +#endif /* CONFIG_MMU */ /* * System Calls. diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S index 67e69139520..0817f9db836 100644 --- a/arch/xtensa/kernel/head.S +++ b/arch/xtensa/kernel/head.S @@ -53,7 +53,7 @@ _start: _j 2f 2: l32r a0, 1b jx a0 - .text + .section .init.text, "ax" .align 4 _startup: @@ -235,8 +235,9 @@ should_never_return: */ .section ".bss.page_aligned", "w" +#ifdef CONFIG_MMU ENTRY(swapper_pg_dir) .fill PAGE_SIZE, 1, 0 +#endif ENTRY(empty_zero_page) .fill PAGE_SIZE, 1, 0 - diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index f3b66fba5b8..a36c85edd04 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c @@ -132,6 +132,18 @@ static void xtensa_irq_unmask(unsigned int irq) set_sr (cached_irq_mask, INTENABLE); } +static void xtensa_irq_enable(unsigned int irq) +{ + variant_irq_enable(irq); + xtensa_irq_unmask(irq); +} + +static void xtensa_irq_disable(unsigned int irq) +{ + xtensa_irq_mask(irq); + variant_irq_disable(irq); +} + static void xtensa_irq_ack(unsigned int irq) { set_sr(1 << irq, INTCLEAR); @@ -146,6 +158,8 @@ static int xtensa_irq_retrigger(unsigned int irq) static struct irq_chip xtensa_irq_chip = { .name = "xtensa", + .enable = xtensa_irq_enable, + .disable = xtensa_irq_disable, .mask = xtensa_irq_mask, .unmask = xtensa_irq_unmask, .ack = xtensa_irq_ack, diff --git a/arch/xtensa/kernel/platform.c b/arch/xtensa/kernel/platform.c index 69675f21606..1b91a97f1d8 100644 --- a/arch/xtensa/kernel/platform.c +++ b/arch/xtensa/kernel/platform.c @@ -36,8 +36,6 @@ _F(void, power_off, (void), { while(1); }); _F(void, idle, (void), { __asm__ __volatile__ ("waiti 0" ::: "memory"); }); _F(void, heartbeat, (void), { }); _F(int, pcibios_fixup, (void), { return 0; }); -_F(int, get_rtc_time, (time_t* t), { return 0; }); -_F(int, set_rtc_time, (time_t t), { return 0; }); #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT _F(void, calibrate_ccount, (void), diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 4ec1633c294..1e5a034fe01 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -84,7 +84,13 @@ sysmem_info_t __initdata sysmem; int initrd_is_mapped; #endif +#ifdef CONFIG_MMU extern void init_mmu(void); +#else +static inline void init_mmu(void) { } +#endif + +extern void zones_init(void); /* * Boot parameter parsing. @@ -286,6 +292,7 @@ void __init setup_arch(char **cmdline_p) paging_init(); + zones_init(); #ifdef CONFIG_VT # if defined(CONFIG_VGA_CONSOLE) diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c index 8df1e842f6d..8848120d291 100644 --- a/arch/xtensa/kernel/time.c +++ b/arch/xtensa/kernel/time.c @@ -14,7 +14,7 @@ #include <linux/errno.h> #include <linux/time.h> -#include <linux/timex.h> +#include <linux/clocksource.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/init.h> @@ -25,27 +25,31 @@ #include <asm/timex.h> #include <asm/platform.h> - -DEFINE_SPINLOCK(rtc_lock); -EXPORT_SYMBOL(rtc_lock); - - #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT unsigned long ccount_per_jiffy; /* per 1/HZ */ unsigned long nsec_per_ccount; /* nsec per ccount increment */ #endif -static long last_rtc_update = 0; - -/* - * Scheduler clock - returns current tim in nanosec units. - */ - -unsigned long long sched_clock(void) +static cycle_t ccount_read(void) { - return (unsigned long long)jiffies * (1000000000 / HZ); + return (cycle_t)get_ccount(); } +static struct clocksource ccount_clocksource = { + .name = "ccount", + .rating = 200, + .read = ccount_read, + .mask = CLOCKSOURCE_MASK(32), + /* + * With a shift of 22 the lower limit of the cpu clock is + * 1MHz, where NSEC_PER_CCOUNT is 1000 or a bit less than + * 2^10: Since we have 32 bits and the multiplicator can + * already take up as much as 10 bits, this leaves us with + * remaining upper 22 bits. + */ + .shift = 22, +}; + static irqreturn_t timer_interrupt(int irq, void *dev_id); static struct irqaction timer_irqaction = { .handler = timer_interrupt, @@ -55,11 +59,11 @@ static struct irqaction timer_irqaction = { void __init time_init(void) { - time_t sec_o, sec_n = 0; + xtime.tv_nsec = 0; + xtime.tv_sec = read_persistent_clock(); - /* The platform must provide a function to calibrate the processor - * speed for the CALIBRATE. - */ + set_normalized_timespec(&wall_to_monotonic, + -xtime.tv_sec, -xtime.tv_nsec); #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT printk("Calibrating CPU frequency "); @@ -67,19 +71,10 @@ void __init time_init(void) printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ), (int)(ccount_per_jiffy/(10000/HZ))%100); #endif - - /* Set time from RTC (if provided) */ - - if (platform_get_rtc_time(&sec_o) == 0) - while (platform_get_rtc_time(&sec_n)) - if (sec_o != sec_n) - break; - - xtime.tv_nsec = 0; - last_rtc_update = xtime.tv_sec = sec_n; - - set_normalized_timespec(&wall_to_monotonic, - -xtime.tv_sec, -xtime.tv_nsec); + ccount_clocksource.mult = + clocksource_hz2mult(CCOUNT_PER_JIFFY * HZ, + ccount_clocksource.shift); + clocksource_register(&ccount_clocksource); /* Initialize the linux timer interrupt. */ @@ -87,69 +82,6 @@ void __init time_init(void) set_linux_timer(get_ccount() + CCOUNT_PER_JIFFY); } - -int do_settimeofday(struct timespec *tv) -{ - time_t wtm_sec, sec = tv->tv_sec; - long wtm_nsec, nsec = tv->tv_nsec; - unsigned long delta; - - if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) - return -EINVAL; - - write_seqlock_irq(&xtime_lock); - - /* This is revolting. We need to set "xtime" correctly. However, the - * value in this location is the value at the most recent update of - * wall time. Discover what correction gettimeofday() would have - * made, and then undo it! - */ - - delta = CCOUNT_PER_JIFFY; - delta += get_ccount() - get_linux_timer(); - nsec -= delta * NSEC_PER_CCOUNT; - - wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); - wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); - - set_normalized_timespec(&xtime, sec, nsec); - set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); - - ntp_clear(); - write_sequnlock_irq(&xtime_lock); - return 0; -} - -EXPORT_SYMBOL(do_settimeofday); - - -void do_gettimeofday(struct timeval *tv) -{ - unsigned long flags; - unsigned long volatile sec, usec, delta, seq; - - do { - seq = read_seqbegin_irqsave(&xtime_lock, flags); - - sec = xtime.tv_sec; - usec = (xtime.tv_nsec / NSEC_PER_USEC); - - delta = get_linux_timer() - get_ccount(); - - } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); - - usec += (((unsigned long) CCOUNT_PER_JIFFY - delta) - * (unsigned long) NSEC_PER_CCOUNT) / NSEC_PER_USEC; - - for (; usec >= 1000000; sec++, usec -= 1000000) - ; - - tv->tv_sec = sec; - tv->tv_usec = usec; -} - -EXPORT_SYMBOL(do_gettimeofday); - /* * The timer interrupt is called HZ times per second. */ @@ -178,16 +110,6 @@ again: next += CCOUNT_PER_JIFFY; set_linux_timer(next); - if (ntp_synced() && - xtime.tv_sec - last_rtc_update >= 659 && - abs((xtime.tv_nsec/1000)-(1000000-1000000/HZ))<5000000/HZ) { - - if (platform_set_rtc_time(xtime.tv_sec+1) == 0) - last_rtc_update = xtime.tv_sec+1; - else - /* Do it again in 60 s */ - last_rtc_update += 60; - } write_sequnlock(&xtime_lock); } @@ -213,4 +135,3 @@ void __cpuinit calibrate_delay(void) (loops_per_jiffy/(10000/HZ)) % 100); } #endif - diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index c44f830b6c7..9f0b71189e9 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c @@ -104,6 +104,7 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = { #endif { EXCCAUSE_UNALIGNED, KRNL, fast_unaligned }, #endif +#ifdef CONFIG_MMU { EXCCAUSE_ITLB_MISS, 0, do_page_fault }, { EXCCAUSE_ITLB_MISS, USER|KRNL, fast_second_level_miss}, { EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit }, @@ -118,6 +119,7 @@ static dispatch_init_table_t __initdata dispatch_init_table[] = { { EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER|KRNL, fast_store_prohibited }, { EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault }, { EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault }, +#endif /* CONFIG_MMU */ /* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */ #if XTENSA_HAVE_COPROCESSOR(0) COPROCESSOR(0), @@ -372,11 +374,10 @@ void show_trace(struct task_struct *task, unsigned long *sp) unsigned long a0, a1, pc; unsigned long sp_start, sp_end; - a1 = (unsigned long)sp; - - if (a1 == 0) - __asm__ __volatile__ ("mov %0, a1\n" : "=a"(a1)); - + if (sp) + a1 = (unsigned long)sp; + else + a1 = task->thread.sp; sp_start = a1 & ~(THREAD_SIZE-1); sp_end = sp_start + THREAD_SIZE; @@ -418,9 +419,8 @@ void show_stack(struct task_struct *task, unsigned long *sp) int i = 0; unsigned long *stack; - if (sp == 0) - __asm__ __volatile__ ("mov %0, a1\n" : "=a"(sp)); - + if (!sp) + sp = (unsigned long *)task->thread.sp; stack = sp; printk("\nStack: "); diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S index eb2d7bb69ee..74a7518faf1 100644 --- a/arch/xtensa/kernel/vectors.S +++ b/arch/xtensa/kernel/vectors.S @@ -309,6 +309,7 @@ ENTRY(_DoubleExceptionVector) * All other exceptions are unexpected and thus unrecoverable! */ +#ifdef CONFIG_MMU .extern fast_second_level_miss_double_kernel .Lksp: /* a0: a0, a1: a1, a2: a2, a3: trashed, depc: depc, excsave: a3 */ @@ -319,6 +320,9 @@ ENTRY(_DoubleExceptionVector) bnez a3, .Lunrecoverable 1: movi a3, fast_second_level_miss_double_kernel jx a3 +#else +.equ .Lksp, .Lunrecoverable +#endif /* Critical! We can't handle this situation. PANIC! */ diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S index d506774f4b0..c1be9a4a740 100644 --- a/arch/xtensa/kernel/vmlinux.lds.S +++ b/arch/xtensa/kernel/vmlinux.lds.S @@ -17,6 +17,7 @@ #include <asm-generic/vmlinux.lds.h> #include <variant/core.h> +#include <platform/hardware.h> OUTPUT_ARCH(xtensa) ENTRY(_start) @@ -26,7 +27,9 @@ jiffies = jiffies_64 + 4; jiffies = jiffies_64; #endif +#ifndef KERNELOFFSET #define KERNELOFFSET 0xd0001000 +#endif /* Note: In the following macros, it would be nice to specify only the vector name and section kind and construct "sym" and "section" using diff --git a/arch/xtensa/mm/Makefile b/arch/xtensa/mm/Makefile index 64e304a2f88..f0b646d2f84 100644 --- a/arch/xtensa/mm/Makefile +++ b/arch/xtensa/mm/Makefile @@ -2,4 +2,5 @@ # Makefile for the Linux/Xtensa-specific parts of the memory manager. # -obj-y := init.o fault.o tlb.o misc.o cache.o +obj-y := init.o cache.o misc.o +obj-$(CONFIG_MMU) += fault.o mmu.o tlb.o diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c index 34163cfaaff..427e14fa43c 100644 --- a/arch/xtensa/mm/init.c +++ b/arch/xtensa/mm/init.c @@ -24,15 +24,8 @@ #include <linux/mm.h> #include <linux/slab.h> -#include <asm/pgtable.h> #include <asm/bootparam.h> -#include <asm/mmu_context.h> -#include <asm/tlb.h> #include <asm/page.h> -#include <asm/pgalloc.h> - - -DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); /* References to section boundaries */ @@ -130,7 +123,8 @@ void __init bootmem_init(void) /* Find an area to use for the bootmem bitmap. */ - bootmap_size = bootmem_bootmap_pages(max_low_pfn) << PAGE_SHIFT; + bootmap_size = bootmem_bootmap_pages(max_low_pfn - min_low_pfn); + bootmap_size <<= PAGE_SHIFT; bootmap_start = ~0; for (i=0; i<sysmem.nr_banks; i++) @@ -145,8 +139,9 @@ void __init bootmem_init(void) /* Reserve the bootmem bitmap area */ mem_reserve(bootmap_start, bootmap_start + bootmap_size, 1); - bootmap_size = init_bootmem_node(NODE_DATA(0), min_low_pfn, + bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap_start >> PAGE_SHIFT, + min_low_pfn, max_low_pfn); /* Add all remaining memory pieces into the bootmem map */ @@ -158,14 +153,14 @@ void __init bootmem_init(void) } -void __init paging_init(void) +void __init zones_init(void) { unsigned long zones_size[MAX_NR_ZONES]; int i; /* All pages are DMA-able, so we put them all in the DMA zone. */ - zones_size[ZONE_DMA] = max_low_pfn; + zones_size[ZONE_DMA] = max_low_pfn - ARCH_PFN_OFFSET; for (i = 1; i < MAX_NR_ZONES; i++) zones_size[i] = 0; @@ -173,40 +168,7 @@ void __init paging_init(void) zones_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn; #endif - /* Initialize the kernel's page tables. */ - - memset(swapper_pg_dir, 0, PAGE_SIZE); - - free_area_init(zones_size); -} - -/* - * Flush the mmu and reset associated register to default values. - */ - -void __init init_mmu (void) -{ - /* Writing zeros to the <t>TLBCFG special registers ensure - * that valid values exist in the register. For existing - * PGSZID<w> fields, zero selects the first element of the - * page-size array. For nonexistent PGSZID<w> fields, zero is - * the best value to write. Also, when changing PGSZID<w> - * fields, the corresponding TLB must be flushed. - */ - set_itlbcfg_register (0); - set_dtlbcfg_register (0); - flush_tlb_all (); - - /* Set rasid register to a known value. */ - - set_rasid_register (ASID_USER_FIRST); - - /* Set PTEVADDR special register to the start of the page - * table, which is in kernel mappable space (ie. not - * statically mapped). This register's value is undefined on - * reset. - */ - set_ptevaddr_register (PGTABLE_START); + free_area_init_node(0, zones_size, ARCH_PFN_OFFSET, NULL); } /* @@ -218,8 +180,8 @@ void __init mem_init(void) unsigned long codesize, reservedpages, datasize, initsize; unsigned long highmemsize, tmp, ram; - max_mapnr = num_physpages = max_low_pfn; - high_memory = (void *) __va(max_mapnr << PAGE_SHIFT); + max_mapnr = num_physpages = max_low_pfn - ARCH_PFN_OFFSET; + high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); highmemsize = 0; #ifdef CONFIG_HIGHMEM @@ -229,7 +191,7 @@ void __init mem_init(void) totalram_pages += free_all_bootmem(); reservedpages = ram = 0; - for (tmp = 0; tmp < max_low_pfn; tmp++) { + for (tmp = 0; tmp < max_mapnr; tmp++) { ram++; if (PageReserved(mem_map+tmp)) reservedpages++; @@ -279,23 +241,3 @@ void free_initmem(void) printk("Freeing unused kernel memory: %dk freed\n", (&__init_end - &__init_begin) >> 10); } - -struct kmem_cache *pgtable_cache __read_mostly; - -static void pgd_ctor(void* addr) -{ - pte_t* ptep = (pte_t*)addr; - int i; - - for (i = 0; i < 1024; i++, ptep++) - pte_clear(NULL, 0, ptep); - -} - -void __init pgtable_cache_init(void) -{ - pgtable_cache = kmem_cache_create("pgd", - PAGE_SIZE, PAGE_SIZE, - SLAB_HWCACHE_ALIGN, - pgd_ctor); -} diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S index c885664211d..b048406d875 100644 --- a/arch/xtensa/mm/misc.S +++ b/arch/xtensa/mm/misc.S @@ -84,6 +84,7 @@ ENTRY(copy_page) retw +#ifdef CONFIG_MMU /* * If we have to deal with cache aliasing, we use temporary memory mappings * to ensure that the source and destination pages have the same color as @@ -311,6 +312,7 @@ ENTRY(__invalidate_icache_page_alias) /* End of special treatment in tlb miss exception */ ENTRY(__tlbtemp_mapping_end) +#endif /* CONFIG_MMU /* * void __invalidate_icache_page(ulong start) diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c new file mode 100644 index 00000000000..4bb91a970f1 --- /dev/null +++ b/arch/xtensa/mm/mmu.c @@ -0,0 +1,70 @@ +/* + * xtensa mmu stuff + * + * Extracted from init.c + */ +#include <linux/percpu.h> +#include <linux/init.h> +#include <linux/string.h> +#include <linux/slab.h> +#include <linux/cache.h> + +#include <asm/tlb.h> +#include <asm/tlbflush.h> +#include <asm/mmu_context.h> +#include <asm/page.h> + +DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); + +void __init paging_init(void) +{ + memset(swapper_pg_dir, 0, PAGE_SIZE); +} + +/* + * Flush the mmu and reset associated register to default values. + */ +void __init init_mmu(void) +{ + /* Writing zeros to the <t>TLBCFG special registers ensure + * that valid values exist in the register. For existing + * PGSZID<w> fields, zero selects the first element of the + * page-size array. For nonexistent PGSZID<w> fields, zero is + * the best value to write. Also, when changing PGSZID<w> + * fields, the corresponding TLB must be flushed. + */ + set_itlbcfg_register(0); + set_dtlbcfg_register(0); + flush_tlb_all(); + + /* Set rasid register to a known value. */ + + set_rasid_register(ASID_USER_FIRST); + + /* Set PTEVADDR special register to the start of the page + * table, which is in kernel mappable space (ie. not + * statically mapped). This register's value is undefined on + * reset. + */ + set_ptevaddr_register(PGTABLE_START); +} + +struct kmem_cache *pgtable_cache __read_mostly; + +static void pgd_ctor(void *addr) +{ + pte_t *ptep = (pte_t *)addr; + int i; + + for (i = 0; i < 1024; i++, ptep++) + pte_clear(NULL, 0, ptep); + +} + +void __init pgtable_cache_init(void) +{ + pgtable_cache = kmem_cache_create("pgd", + PAGE_SIZE, PAGE_SIZE, + SLAB_HWCACHE_ALIGN, + pgd_ctor); +} diff --git a/arch/xtensa/platforms/s6105/Makefile b/arch/xtensa/platforms/s6105/Makefile new file mode 100644 index 00000000000..0be6194bcb7 --- /dev/null +++ b/arch/xtensa/platforms/s6105/Makefile @@ -0,0 +1,3 @@ +# Makefile for the Stretch S6105 eval board + +obj-y := setup.o device.o diff --git a/arch/xtensa/platforms/s6105/device.c b/arch/xtensa/platforms/s6105/device.c new file mode 100644 index 00000000000..78b08be5a92 --- /dev/null +++ b/arch/xtensa/platforms/s6105/device.c @@ -0,0 +1,67 @@ +/* + * s6105 platform devices + * + * Copyright (c) 2009 emlix GmbH + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/serial.h> +#include <linux/serial_8250.h> + +#include <variant/hardware.h> + +#define UART_INTNUM 4 + +static const signed char uart_irq_mappings[] = { + S6_INTC_UART(0), + S6_INTC_UART(1), + -1, +}; + +const signed char *platform_irq_mappings[NR_IRQS] = { + [UART_INTNUM] = uart_irq_mappings, +}; + +static struct plat_serial8250_port serial_platform_data[] = { + { + .membase = (void *)S6_REG_UART + 0x0000, + .mapbase = S6_REG_UART + 0x0000, + .irq = UART_INTNUM, + .uartclk = S6_SCLK, + .regshift = 2, + .iotype = SERIAL_IO_MEM, + .flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST, + }, + { + .membase = (void *)S6_REG_UART + 0x1000, + .mapbase = S6_REG_UART + 0x1000, + .irq = UART_INTNUM, + .uartclk = S6_SCLK, + .regshift = 2, + .iotype = SERIAL_IO_MEM, + .flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST, + }, + { }, +}; + +static struct platform_device platform_devices[] = { + { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = serial_platform_data, + }, + }, +}; + +static int __init device_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(platform_devices); i++) + platform_device_register(&platform_devices[i]); + return 0; +} +arch_initcall_sync(device_init); diff --git a/arch/xtensa/platforms/s6105/include/platform/gpio.h b/arch/xtensa/platforms/s6105/include/platform/gpio.h new file mode 100644 index 00000000000..fa11aa4b61e --- /dev/null +++ b/arch/xtensa/platforms/s6105/include/platform/gpio.h @@ -0,0 +1,27 @@ +#ifndef __ASM_XTENSA_S6105_GPIO_H +#define __ASM_XTENSA_S6105_GPIO_H + +#define GPIO_BP_TEMP_ALARM 0 +#define GPIO_PB_RESET_IN 1 +#define GPIO_EXP_IRQ 2 +#define GPIO_TRIGGER_IRQ 3 +#define GPIO_RTC_IRQ 4 +#define GPIO_PHY_IRQ 5 +#define GPIO_IMAGER_RESET 6 +#define GPIO_SD_IRQ 7 +#define GPIO_MINI_BOOT_INH 8 +#define GPIO_BOARD_RESET 9 +#define GPIO_EXP_PRESENT 10 +#define GPIO_LED1_NGREEN 12 +#define GPIO_LED1_RED 13 +#define GPIO_LED0_NGREEN 14 +#define GPIO_LED0_NRED 15 +#define GPIO_SPI_CS0 16 +#define GPIO_SPI_CS1 17 +#define GPIO_SPI_CS3 19 +#define GPIO_SPI_CS4 20 +#define GPIO_SD_WP 21 +#define GPIO_BP_RESET 22 +#define GPIO_ALARM_OUT 23 + +#endif /* __ASM_XTENSA_S6105_GPIO_H */ diff --git a/arch/xtensa/platforms/s6105/include/platform/hardware.h b/arch/xtensa/platforms/s6105/include/platform/hardware.h new file mode 100644 index 00000000000..d628efac708 --- /dev/null +++ b/arch/xtensa/platforms/s6105/include/platform/hardware.h @@ -0,0 +1,11 @@ +#ifndef __XTENSA_S6105_HARDWARE_H +#define __XTENSA_S6105_HARDWARE_H + +#define PLATFORM_DEFAULT_MEM_START 0x40000000 +#define PLATFORM_DEFAULT_MEM_SIZE 0x08000000 + +#define MAX_DMA_ADDRESS 0 + +#define KERNELOFFSET (PLATFORM_DEFAULT_MEM_START + 0x1000) + +#endif /* __XTENSA_S6105_HARDWARE_H */ diff --git a/arch/xtensa/platforms/s6105/include/platform/serial.h b/arch/xtensa/platforms/s6105/include/platform/serial.h new file mode 100644 index 00000000000..c8a771e5981 --- /dev/null +++ b/arch/xtensa/platforms/s6105/include/platform/serial.h @@ -0,0 +1,8 @@ +#ifndef __ASM_XTENSA_S6105_SERIAL_H +#define __ASM_XTENSA_S6105_SERIAL_H + +#include <variant/hardware.h> + +#define BASE_BAUD (S6_SCLK / 16) + +#endif /* __ASM_XTENSA_S6105_SERIAL_H */ diff --git a/arch/xtensa/platforms/s6105/setup.c b/arch/xtensa/platforms/s6105/setup.c new file mode 100644 index 00000000000..ae041d5027a --- /dev/null +++ b/arch/xtensa/platforms/s6105/setup.c @@ -0,0 +1,61 @@ +/* + * s6105 control routines + * + * Copyright (c) 2009 emlix GmbH + */ +#include <linux/irq.h> +#include <linux/io.h> +#include <linux/gpio.h> + +#include <asm/bootparam.h> + +#include <variant/hardware.h> +#include <platform/gpio.h> + +void platform_halt(void) +{ + local_irq_disable(); + while (1) + ; +} + +void platform_power_off(void) +{ + platform_halt(); +} + +void platform_restart(void) +{ + platform_halt(); +} + +void __init platform_setup(char **cmdline) +{ + unsigned long reg; + + reg = readl(S6_REG_GREG1 + S6_GREG1_CLKGATE); + reg &= ~(1 << S6_GREG1_BLOCK_SB); + writel(reg, S6_REG_GREG1 + S6_GREG1_CLKGATE); + + reg = readl(S6_REG_GREG1 + S6_GREG1_BLOCKENA); + reg |= 1 << S6_GREG1_BLOCK_SB; + writel(reg, S6_REG_GREG1 + S6_GREG1_BLOCKENA); + + printk(KERN_NOTICE "S6105 on Stretch S6000 - " + "Copyright (C) 2009 emlix GmbH <info@emlix.com>\n"); +} + +void __init platform_init(bp_tag_t *first) +{ + gpio_request(GPIO_LED1_NGREEN, "led1_green"); + gpio_request(GPIO_LED1_RED, "led1_red"); + gpio_direction_output(GPIO_LED1_NGREEN, 1); +} + +void platform_heartbeat(void) +{ + static unsigned int c; + + if (!(++c & 0x4F)) + gpio_direction_output(GPIO_LED1_RED, !(c & 0x10)); +} diff --git a/arch/xtensa/platforms/xt2000/include/platform/hardware.h b/arch/xtensa/platforms/xt2000/include/platform/hardware.h index 41459ad0776..886ef156ded 100644 --- a/arch/xtensa/platforms/xt2000/include/platform/hardware.h +++ b/arch/xtensa/platforms/xt2000/include/platform/hardware.h @@ -16,7 +16,6 @@ #define _XTENSA_XT2000_HARDWARE_H #include <variant/core.h> -#include <asm/io.h> /* * Memory configuration. diff --git a/arch/xtensa/variants/s6000/Makefile b/arch/xtensa/variants/s6000/Makefile new file mode 100644 index 00000000000..03b3975468b --- /dev/null +++ b/arch/xtensa/variants/s6000/Makefile @@ -0,0 +1,3 @@ +# s6000 Makefile + +obj-y += irq.o gpio.o diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c new file mode 100644 index 00000000000..33a8d952934 --- /dev/null +++ b/arch/xtensa/variants/s6000/gpio.c @@ -0,0 +1,71 @@ +/* + * s6000 gpio driver + * + * Copyright (c) 2009 emlix GmbH + * Authors: Oskar Schirmer <os@emlix.com> + * Johannes Weiner <jw@emlix.com> + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/gpio.h> + +#include <variant/hardware.h> + +#define S6_GPIO_DATA 0x000 +#define S6_GPIO_IS 0x404 +#define S6_GPIO_IBE 0x408 +#define S6_GPIO_IEV 0x40C +#define S6_GPIO_IE 0x410 +#define S6_GPIO_RIS 0x414 +#define S6_GPIO_MIS 0x418 +#define S6_GPIO_IC 0x41C +#define S6_GPIO_AFSEL 0x420 +#define S6_GPIO_DIR 0x800 +#define S6_GPIO_BANK(nr) ((nr) * 0x1000) +#define S6_GPIO_MASK(nr) (4 << (nr)) +#define S6_GPIO_OFFSET(nr) \ + (S6_GPIO_BANK((nr) >> 3) + S6_GPIO_MASK((nr) & 7)) + +static int direction_input(struct gpio_chip *chip, unsigned int off) +{ + writeb(0, S6_REG_GPIO + S6_GPIO_DIR + S6_GPIO_OFFSET(off)); + return 0; +} + +static int get(struct gpio_chip *chip, unsigned int off) +{ + return readb(S6_REG_GPIO + S6_GPIO_DATA + S6_GPIO_OFFSET(off)); +} + +static int direction_output(struct gpio_chip *chip, unsigned int off, int val) +{ + unsigned rel = S6_GPIO_OFFSET(off); + writeb(~0, S6_REG_GPIO + S6_GPIO_DIR + rel); + writeb(val ? ~0 : 0, S6_REG_GPIO + S6_GPIO_DATA + rel); + return 0; +} + +static void set(struct gpio_chip *chip, unsigned int off, int val) +{ + writeb(val ? ~0 : 0, S6_REG_GPIO + S6_GPIO_DATA + S6_GPIO_OFFSET(off)); +} + +static struct gpio_chip gpiochip = { + .owner = THIS_MODULE, + .direction_input = direction_input, + .get = get, + .direction_output = direction_output, + .set = set, + .base = 0, + .ngpio = 24, + .can_sleep = 0, /* no blocking io needed */ + .exported = 0, /* no exporting to userspace */ +}; + +static int gpio_init(void) +{ + return gpiochip_add(&gpiochip); +} +device_initcall(gpio_init); diff --git a/arch/xtensa/variants/s6000/include/variant/core.h b/arch/xtensa/variants/s6000/include/variant/core.h new file mode 100644 index 00000000000..af007953027 --- /dev/null +++ b/arch/xtensa/variants/s6000/include/variant/core.h @@ -0,0 +1,431 @@ +/* + * Xtensa processor core configuration information. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (c) 1999-2008 Tensilica Inc. + */ + +#ifndef _XTENSA_CORE_CONFIGURATION_H +#define _XTENSA_CORE_CONFIGURATION_H + + +/**************************************************************************** + Parameters Useful for Any Code, USER or PRIVILEGED + ****************************************************************************/ + +/* + * Note: Macros of the form XCHAL_HAVE_*** have a value of 1 if the option is + * configured, and a value of 0 otherwise. These macros are always defined. + */ + + +/*---------------------------------------------------------------------- + ISA + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_BE 0 /* big-endian byte ordering */ +#define XCHAL_HAVE_WINDOWED 1 /* windowed registers option */ +#define XCHAL_NUM_AREGS 64 /* num of physical addr regs */ +#define XCHAL_NUM_AREGS_LOG2 6 /* log2(XCHAL_NUM_AREGS) */ +#define XCHAL_MAX_INSTRUCTION_SIZE 8 /* max instr bytes (3..8) */ +#define XCHAL_HAVE_DEBUG 1 /* debug option */ +#define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */ +#define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */ +#define XCHAL_HAVE_NSA 1 /* NSA/NSAU instructions */ +#define XCHAL_HAVE_MINMAX 1 /* MIN/MAX instructions */ +#define XCHAL_HAVE_SEXT 1 /* SEXT instruction */ +#define XCHAL_HAVE_CLAMPS 1 /* CLAMPS instruction */ +#define XCHAL_HAVE_MUL16 1 /* MUL16S/MUL16U instructions */ +#define XCHAL_HAVE_MUL32 1 /* MULL instruction */ +#define XCHAL_HAVE_MUL32_HIGH 1 /* MULUH/MULSH instructions */ +#define XCHAL_HAVE_DIV32 0 /* QUOS/QUOU/REMS/REMU instructions */ +#define XCHAL_HAVE_L32R 1 /* L32R instruction */ +#define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */ +#define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */ +#define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ +#define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's */ +#define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T instr's */ +#define XCHAL_HAVE_CALL4AND12 1 /* (obsolete option) */ +#define XCHAL_HAVE_ABS 1 /* ABS instruction */ +/*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */ +/*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */ +#define XCHAL_HAVE_RELEASE_SYNC 0 /* L32AI/S32RI instructions */ +#define XCHAL_HAVE_S32C1I 0 /* S32C1I instruction */ +#define XCHAL_HAVE_SPECULATION 0 /* speculation */ +#define XCHAL_HAVE_FULL_RESET 0 /* all regs/state reset */ +#define XCHAL_NUM_CONTEXTS 1 /* */ +#define XCHAL_NUM_MISC_REGS 4 /* num of scratch regs (0..4) */ +#define XCHAL_HAVE_TAP_MASTER 0 /* JTAG TAP control instr's */ +#define XCHAL_HAVE_PRID 0 /* processor ID register */ +#define XCHAL_HAVE_THREADPTR 0 /* THREADPTR register */ +#define XCHAL_HAVE_BOOLEANS 1 /* boolean registers */ +#define XCHAL_HAVE_CP 1 /* CPENABLE reg (coprocessor) */ +#define XCHAL_CP_MAXCFG 8 /* max allowed cp id plus one */ +#define XCHAL_HAVE_MAC16 0 /* MAC16 package */ +#define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point pkg */ +#define XCHAL_HAVE_FP 1 /* floating point pkg */ +#define XCHAL_HAVE_VECTRA1 0 /* Vectra I pkg */ +#define XCHAL_HAVE_VECTRALX 0 /* Vectra LX pkg */ +#define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */ + + +/*---------------------------------------------------------------------- + MISC + ----------------------------------------------------------------------*/ + +#define XCHAL_NUM_WRITEBUFFER_ENTRIES 8 /* size of write buffer */ +#define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ +#define XCHAL_DATA_WIDTH 16 /* data width in bytes */ +/* In T1050, applies to selected core load and store instructions (see ISA): */ +#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1 /* unaligned loads cause exc. */ +#define XCHAL_UNALIGNED_STORE_EXCEPTION 1 /* unaligned stores cause exc.*/ + +#define XCHAL_SW_VERSION 701001 /* sw version of this header */ + +#define XCHAL_CORE_ID "stretch_bali" /* alphanum core name + (CoreID) set in the Xtensa + Processor Generator */ + +#define XCHAL_BUILD_UNIQUE_ID 0x000104B9 /* 22-bit sw build ID */ + +/* + * These definitions describe the hardware targeted by this software. + */ +#define XCHAL_HW_CONFIGID0 0xC2F3F9FE /* ConfigID hi 32 bits*/ +#define XCHAL_HW_CONFIGID1 0x054104B9 /* ConfigID lo 32 bits*/ +#define XCHAL_HW_VERSION_NAME "LX1.0.2" /* full version name */ +#define XCHAL_HW_VERSION_MAJOR 2100 /* major ver# of targeted hw */ +#define XCHAL_HW_VERSION_MINOR 2 /* minor ver# of targeted hw */ +#define XCHAL_HW_VERSION 210002 /* major*100+minor */ +#define XCHAL_HW_REL_LX1 1 +#define XCHAL_HW_REL_LX1_0 1 +#define XCHAL_HW_REL_LX1_0_2 1 +#define XCHAL_HW_CONFIGID_RELIABLE 1 +/* If software targets a *range* of hardware versions, these are the bounds: */ +#define XCHAL_HW_MIN_VERSION_MAJOR 2100 /* major v of earliest tgt hw */ +#define XCHAL_HW_MIN_VERSION_MINOR 2 /* minor v of earliest tgt hw */ +#define XCHAL_HW_MIN_VERSION 210002 /* earliest targeted hw */ +#define XCHAL_HW_MAX_VERSION_MAJOR 2100 /* major v of latest tgt hw */ +#define XCHAL_HW_MAX_VERSION_MINOR 2 /* minor v of latest tgt hw */ +#define XCHAL_HW_MAX_VERSION 210002 /* latest targeted hw */ + + +/*---------------------------------------------------------------------- + CACHE + ----------------------------------------------------------------------*/ + +#define XCHAL_ICACHE_LINESIZE 16 /* I-cache line size in bytes */ +#define XCHAL_DCACHE_LINESIZE 16 /* D-cache line size in bytes */ +#define XCHAL_ICACHE_LINEWIDTH 4 /* log2(I line size in bytes) */ +#define XCHAL_DCACHE_LINEWIDTH 4 /* log2(D line size in bytes) */ + +#define XCHAL_ICACHE_SIZE 32768 /* I-cache size in bytes or 0 */ +#define XCHAL_DCACHE_SIZE 32768 /* D-cache size in bytes or 0 */ + +#define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ + + + + +/**************************************************************************** + Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code + ****************************************************************************/ + + +#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY + +/*---------------------------------------------------------------------- + CACHE + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_PIF 1 /* any outbound PIF present */ + +/* If present, cache size in bytes == (ways * 2^(linewidth + setwidth)). */ + +/* Number of cache sets in log2(lines per way): */ +#define XCHAL_ICACHE_SETWIDTH 9 +#define XCHAL_DCACHE_SETWIDTH 10 + +/* Cache set associativity (number of ways): */ +#define XCHAL_ICACHE_WAYS 4 +#define XCHAL_DCACHE_WAYS 2 + +/* Cache features: */ +#define XCHAL_ICACHE_LINE_LOCKABLE 1 +#define XCHAL_DCACHE_LINE_LOCKABLE 0 +#define XCHAL_ICACHE_ECC_PARITY 0 +#define XCHAL_DCACHE_ECC_PARITY 0 + +/* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */ +#define XCHAL_CA_BITS 4 + + +/*---------------------------------------------------------------------- + INTERNAL I/D RAM/ROMs and XLMI + ----------------------------------------------------------------------*/ + +#define XCHAL_NUM_INSTROM 0 /* number of core instr. ROMs */ +#define XCHAL_NUM_INSTRAM 0 /* number of core instr. RAMs */ +#define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ +#define XCHAL_NUM_DATARAM 1 /* number of core data RAMs */ +#define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/ +#define XCHAL_NUM_XLMI 1 /* number of core XLMI ports */ + +/* Data RAM 0: */ +#define XCHAL_DATARAM0_VADDR 0x3FFF0000 +#define XCHAL_DATARAM0_PADDR 0x3FFF0000 +#define XCHAL_DATARAM0_SIZE 65536 +#define XCHAL_DATARAM0_ECC_PARITY 0 + +/* XLMI Port 0: */ +#define XCHAL_XLMI0_VADDR 0x37F80000 +#define XCHAL_XLMI0_PADDR 0x37F80000 +#define XCHAL_XLMI0_SIZE 262144 +#define XCHAL_XLMI0_ECC_PARITY 0 + + +/*---------------------------------------------------------------------- + INTERRUPTS and TIMERS + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_INTERRUPTS 1 /* interrupt option */ +#define XCHAL_HAVE_HIGHPRI_INTERRUPTS 1 /* med/high-pri. interrupts */ +#define XCHAL_HAVE_NMI 1 /* non-maskable interrupt */ +#define XCHAL_HAVE_CCOUNT 1 /* CCOUNT reg. (timer option) */ +#define XCHAL_NUM_TIMERS 3 /* number of CCOMPAREn regs */ +#define XCHAL_NUM_INTERRUPTS 27 /* number of interrupts */ +#define XCHAL_NUM_INTERRUPTS_LOG2 5 /* ceil(log2(NUM_INTERRUPTS)) */ +#define XCHAL_NUM_EXTINTERRUPTS 20 /* num of external interrupts */ +#define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels + (not including level zero) */ +#define XCHAL_EXCM_LEVEL 1 /* level masked by PS.EXCM */ + /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */ + +/* Masks of interrupts at each interrupt level: */ +#define XCHAL_INTLEVEL1_MASK 0x01F07FFF +#define XCHAL_INTLEVEL2_MASK 0x02018000 +#define XCHAL_INTLEVEL3_MASK 0x04060000 +#define XCHAL_INTLEVEL4_MASK 0x00000000 +#define XCHAL_INTLEVEL5_MASK 0x00080000 +#define XCHAL_INTLEVEL6_MASK 0x00000000 +#define XCHAL_INTLEVEL7_MASK 0x00000000 + +/* Masks of interrupts at each range 1..n of interrupt levels: */ +#define XCHAL_INTLEVEL1_ANDBELOW_MASK 0x01F07FFF +#define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x03F1FFFF +#define XCHAL_INTLEVEL3_ANDBELOW_MASK 0x07F7FFFF +#define XCHAL_INTLEVEL4_ANDBELOW_MASK 0x07F7FFFF +#define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x07FFFFFF +#define XCHAL_INTLEVEL6_ANDBELOW_MASK 0x07FFFFFF +#define XCHAL_INTLEVEL7_ANDBELOW_MASK 0x07FFFFFF + +/* Level of each interrupt: */ +#define XCHAL_INT0_LEVEL 1 +#define XCHAL_INT1_LEVEL 1 +#define XCHAL_INT2_LEVEL 1 +#define XCHAL_INT3_LEVEL 1 +#define XCHAL_INT4_LEVEL 1 +#define XCHAL_INT5_LEVEL 1 +#define XCHAL_INT6_LEVEL 1 +#define XCHAL_INT7_LEVEL 1 +#define XCHAL_INT8_LEVEL 1 +#define XCHAL_INT9_LEVEL 1 +#define XCHAL_INT10_LEVEL 1 +#define XCHAL_INT11_LEVEL 1 +#define XCHAL_INT12_LEVEL 1 +#define XCHAL_INT13_LEVEL 1 +#define XCHAL_INT14_LEVEL 1 +#define XCHAL_INT15_LEVEL 2 +#define XCHAL_INT16_LEVEL 2 +#define XCHAL_INT17_LEVEL 3 +#define XCHAL_INT18_LEVEL 3 +#define XCHAL_INT19_LEVEL 5 +#define XCHAL_INT20_LEVEL 1 +#define XCHAL_INT21_LEVEL 1 +#define XCHAL_INT22_LEVEL 1 +#define XCHAL_INT23_LEVEL 1 +#define XCHAL_INT24_LEVEL 1 +#define XCHAL_INT25_LEVEL 2 +#define XCHAL_INT26_LEVEL 3 +#define XCHAL_DEBUGLEVEL 4 /* debug interrupt level */ +#define XCHAL_HAVE_DEBUG_EXTERN_INT 1 /* OCD external db interrupt */ +#define XCHAL_NMILEVEL 5 /* NMI "level" (for use with + EXCSAVE/EPS/EPC_n, RFI n) */ + +/* Type of each interrupt: */ +#define XCHAL_INT0_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT1_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT2_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT3_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT4_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT5_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT6_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT7_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT8_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT9_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT10_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT11_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT12_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT13_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT14_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT15_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT16_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT17_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT18_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT19_TYPE XTHAL_INTTYPE_NMI +#define XCHAL_INT20_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT21_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT22_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT23_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT24_TYPE XTHAL_INTTYPE_TIMER +#define XCHAL_INT25_TYPE XTHAL_INTTYPE_TIMER +#define XCHAL_INT26_TYPE XTHAL_INTTYPE_TIMER + +/* Masks of interrupts for each type of interrupt: */ +#define XCHAL_INTTYPE_MASK_UNCONFIGURED 0xF8000000 +#define XCHAL_INTTYPE_MASK_SOFTWARE 0x00F00000 +#define XCHAL_INTTYPE_MASK_EXTERN_EDGE 0x00000000 +#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL 0x0007FFFF +#define XCHAL_INTTYPE_MASK_TIMER 0x07000000 +#define XCHAL_INTTYPE_MASK_NMI 0x00080000 +#define XCHAL_INTTYPE_MASK_WRITE_ERROR 0x00000000 + +/* Interrupt numbers assigned to specific interrupt sources: */ +#define XCHAL_TIMER0_INTERRUPT 24 /* CCOMPARE0 */ +#define XCHAL_TIMER1_INTERRUPT 25 /* CCOMPARE1 */ +#define XCHAL_TIMER2_INTERRUPT 26 /* CCOMPARE2 */ +#define XCHAL_TIMER3_INTERRUPT XTHAL_TIMER_UNCONFIGURED +#define XCHAL_NMI_INTERRUPT 19 /* non-maskable interrupt */ + +/* Interrupt numbers for levels at which only one interrupt is configured: */ +#define XCHAL_INTLEVEL5_NUM 19 +/* (There are many interrupts each at level(s) 1, 2, 3.) */ + + +/* + * External interrupt vectors/levels. + * These macros describe how Xtensa processor interrupt numbers + * (as numbered internally, eg. in INTERRUPT and INTENABLE registers) + * map to external BInterrupt<n> pins, for those interrupts + * configured as external (level-triggered, edge-triggered, or NMI). + * See the Xtensa processor databook for more details. + */ + +/* Core interrupt numbers mapped to each EXTERNAL interrupt number: */ +#define XCHAL_EXTINT0_NUM 0 /* (intlevel 1) */ +#define XCHAL_EXTINT1_NUM 1 /* (intlevel 1) */ +#define XCHAL_EXTINT2_NUM 2 /* (intlevel 1) */ +#define XCHAL_EXTINT3_NUM 3 /* (intlevel 1) */ +#define XCHAL_EXTINT4_NUM 4 /* (intlevel 1) */ +#define XCHAL_EXTINT5_NUM 5 /* (intlevel 1) */ +#define XCHAL_EXTINT6_NUM 6 /* (intlevel 1) */ +#define XCHAL_EXTINT7_NUM 7 /* (intlevel 1) */ +#define XCHAL_EXTINT8_NUM 8 /* (intlevel 1) */ +#define XCHAL_EXTINT9_NUM 9 /* (intlevel 1) */ +#define XCHAL_EXTINT10_NUM 10 /* (intlevel 1) */ +#define XCHAL_EXTINT11_NUM 11 /* (intlevel 1) */ +#define XCHAL_EXTINT12_NUM 12 /* (intlevel 1) */ +#define XCHAL_EXTINT13_NUM 13 /* (intlevel 1) */ +#define XCHAL_EXTINT14_NUM 14 /* (intlevel 1) */ +#define XCHAL_EXTINT15_NUM 15 /* (intlevel 2) */ +#define XCHAL_EXTINT16_NUM 16 /* (intlevel 2) */ +#define XCHAL_EXTINT17_NUM 17 /* (intlevel 3) */ +#define XCHAL_EXTINT18_NUM 18 /* (intlevel 3) */ +#define XCHAL_EXTINT19_NUM 19 /* (intlevel 5) */ + + +/*---------------------------------------------------------------------- + EXCEPTIONS and VECTORS + ----------------------------------------------------------------------*/ + +#define XCHAL_XEA_VERSION 2 /* Xtensa Exception Architecture + number: 1 == XEA1 (old) + 2 == XEA2 (new) + 0 == XEAX (extern) */ +#define XCHAL_HAVE_XEA1 0 /* Exception Architecture 1 */ +#define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ +#define XCHAL_HAVE_XEAX 0 /* External Exception Arch. */ +#define XCHAL_HAVE_EXCEPTIONS 1 /* exception option */ +#define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ +#define XCHAL_HAVE_VECTOR_SELECT 0 /* relocatable vectors */ +#define XCHAL_HAVE_VECBASE 0 /* relocatable vectors */ + +#define XCHAL_RESET_VECOFS 0x00000000 +#define XCHAL_RESET_VECTOR_VADDR 0x3FFE03D0 +#define XCHAL_RESET_VECTOR_PADDR 0x3FFE03D0 +#define XCHAL_USER_VECOFS 0x00000000 +#define XCHAL_USER_VECTOR_VADDR 0x40000220 +#define XCHAL_USER_VECTOR_PADDR 0x40000220 +#define XCHAL_KERNEL_VECOFS 0x00000000 +#define XCHAL_KERNEL_VECTOR_VADDR 0x40000200 +#define XCHAL_KERNEL_VECTOR_PADDR 0x40000200 +#define XCHAL_DOUBLEEXC_VECOFS 0x00000000 +#define XCHAL_DOUBLEEXC_VECTOR_VADDR 0x400002A0 +#define XCHAL_DOUBLEEXC_VECTOR_PADDR 0x400002A0 +#define XCHAL_WINDOW_OF4_VECOFS 0x00000000 +#define XCHAL_WINDOW_UF4_VECOFS 0x00000040 +#define XCHAL_WINDOW_OF8_VECOFS 0x00000080 +#define XCHAL_WINDOW_UF8_VECOFS 0x000000C0 +#define XCHAL_WINDOW_OF12_VECOFS 0x00000100 +#define XCHAL_WINDOW_UF12_VECOFS 0x00000140 +#define XCHAL_WINDOW_VECTORS_VADDR 0x40000000 +#define XCHAL_WINDOW_VECTORS_PADDR 0x40000000 +#define XCHAL_INTLEVEL2_VECOFS 0x00000000 +#define XCHAL_INTLEVEL2_VECTOR_VADDR 0x40000240 +#define XCHAL_INTLEVEL2_VECTOR_PADDR 0x40000240 +#define XCHAL_INTLEVEL3_VECOFS 0x00000000 +#define XCHAL_INTLEVEL3_VECTOR_VADDR 0x40000260 +#define XCHAL_INTLEVEL3_VECTOR_PADDR 0x40000260 +#define XCHAL_INTLEVEL4_VECOFS 0x00000000 +#define XCHAL_INTLEVEL4_VECTOR_VADDR 0x40000390 +#define XCHAL_INTLEVEL4_VECTOR_PADDR 0x40000390 +#define XCHAL_DEBUG_VECOFS XCHAL_INTLEVEL4_VECOFS +#define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR +#define XCHAL_DEBUG_VECTOR_PADDR XCHAL_INTLEVEL4_VECTOR_PADDR +#define XCHAL_NMI_VECOFS 0x00000000 +#define XCHAL_NMI_VECTOR_VADDR 0x400003B0 +#define XCHAL_NMI_VECTOR_PADDR 0x400003B0 +#define XCHAL_INTLEVEL5_VECOFS XCHAL_NMI_VECOFS +#define XCHAL_INTLEVEL5_VECTOR_VADDR XCHAL_NMI_VECTOR_VADDR +#define XCHAL_INTLEVEL5_VECTOR_PADDR XCHAL_NMI_VECTOR_PADDR + + +/*---------------------------------------------------------------------- + DEBUG + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_OCD 1 /* OnChipDebug option */ +#define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ +#define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */ +#define XCHAL_HAVE_OCD_DIR_ARRAY 1 /* faster OCD option */ + + +/*---------------------------------------------------------------------- + MMU + ----------------------------------------------------------------------*/ + +/* See core-matmap.h header file for more details. */ + +#define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ +#define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ +#define XCHAL_HAVE_IDENTITY_MAP 1 /* vaddr == paddr always */ +#define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ +#define XCHAL_HAVE_MIMIC_CACHEATTR 1 /* region protection */ +#define XCHAL_HAVE_XLT_CACHEATTR 0 /* region prot. w/translation */ +#define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table + [autorefill] and protection) + usable for an MMU-based OS */ +/* If none of the above last 4 are set, it's a custom TLB configuration. */ + +#define XCHAL_MMU_ASID_BITS 0 /* number of bits in ASIDs */ +#define XCHAL_MMU_RINGS 1 /* number of rings (1..4) */ +#define XCHAL_MMU_RING_BITS 0 /* num of bits in RING field */ + +#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */ + + +#endif /* _XTENSA_CORE_CONFIGURATION_H */ + diff --git a/arch/xtensa/variants/s6000/include/variant/hardware.h b/arch/xtensa/variants/s6000/include/variant/hardware.h new file mode 100644 index 00000000000..5d9ba098d84 --- /dev/null +++ b/arch/xtensa/variants/s6000/include/variant/hardware.h @@ -0,0 +1,259 @@ +#ifndef __XTENSA_S6000_HARDWARE_H +#define __XTENSA_S6000_HARDWARE_H + +#define S6_SCLK 1843200 + +#define S6_MEM_REG 0x20000000 +#define S6_MEM_EFI 0x33F00000 +#define S6_MEM_PCIE_DATARAM1 0x34000000 +#define S6_MEM_XLMI 0x37F80000 +#define S6_MEM_PIF_DATARAM1 0x37FFC000 +#define S6_MEM_GMAC 0x38000000 +#define S6_MEM_I2S 0x3A000000 +#define S6_MEM_EGIB 0x3C000000 +#define S6_MEM_PCIE_CFG 0x3E000000 +#define S6_MEM_PIF_DATARAM 0x3FFE0000 +#define S6_MEM_XLMI_DATARAM 0x3FFF0000 +#define S6_MEM_DDR 0x40000000 +#define S6_MEM_PCIE_APER 0xC0000000 +#define S6_MEM_AUX 0xF0000000 + +/* Device addresses */ + +#define S6_REG_SCB S6_MEM_REG +#define S6_REG_NB (S6_REG_SCB + 0x10000) +#define S6_REG_LMSDMA (S6_REG_SCB + 0x20000) +#define S6_REG_NI (S6_REG_SCB + 0x30000) +#define S6_REG_NIDMA (S6_REG_SCB + 0x40000) +#define S6_REG_NS (S6_REG_SCB + 0x50000) +#define S6_REG_DDR (S6_REG_SCB + 0x60000) +#define S6_REG_GREG1 (S6_REG_SCB + 0x70000) +#define S6_REG_DP (S6_REG_SCB + 0x80000) +#define S6_REG_DPDMA (S6_REG_SCB + 0x90000) +#define S6_REG_EGIB (S6_REG_SCB + 0xA0000) +#define S6_REG_PCIE (S6_REG_SCB + 0xB0000) +#define S6_REG_I2S (S6_REG_SCB + 0xC0000) +#define S6_REG_GMAC (S6_REG_SCB + 0xD0000) +#define S6_REG_HIFDMA (S6_REG_SCB + 0xE0000) +#define S6_REG_GREG2 (S6_REG_SCB + 0xF0000) + +#define S6_REG_APB S6_REG_SCB +#define S6_REG_UART (S6_REG_APB + 0x0000) +#define S6_REG_INTC (S6_REG_APB + 0x2000) +#define S6_REG_SPI (S6_REG_APB + 0x3000) +#define S6_REG_I2C (S6_REG_APB + 0x4000) +#define S6_REG_GPIO (S6_REG_APB + 0x8000) + +/* Global register block */ + +#define S6_GREG1_PLL_LOCKCLEAR 0x000 +#define S6_GREG1_PLL_LOCK_SYS 0 +#define S6_GREG1_PLL_LOCK_IO 1 +#define S6_GREG1_PLL_LOCK_AIM 2 +#define S6_GREG1_PLL_LOCK_DP0 3 +#define S6_GREG1_PLL_LOCK_DP2 4 +#define S6_GREG1_PLL_LOCK_DDR 5 +#define S6_GREG1_PLL_LOCKSTAT 0x004 +#define S6_GREG1_PLL_LOCKSTAT_CURLOCK 0 +#define S6_GREG1_PLL_LOCKSTAT_EVERUNLCK 8 +#define S6_GREG1_PLLSEL 0x010 +#define S6_GREG1_PLLSEL_AIM 0 +#define S6_GREG1_PLLSEL_AIM_DDR2 0 +#define S6_GREG1_PLLSEL_AIM_300MHZ 1 +#define S6_GREG1_PLLSEL_AIM_240MHZ 2 +#define S6_GREG1_PLLSEL_AIM_200MHZ 3 +#define S6_GREG1_PLLSEL_AIM_150MHZ 4 +#define S6_GREG1_PLLSEL_AIM_120MHZ 5 +#define S6_GREG1_PLLSEL_AIM_40MHZ 6 +#define S6_GREG1_PLLSEL_AIM_PLLAIMREF 7 +#define S6_GREG1_PLLSEL_AIM_MASK 7 +#define S6_GREG1_PLLSEL_DDR 8 +#define S6_GREG1_PLLSEL_DDR_HS 0 +#define S6_GREG1_PLLSEL_DDR_333MHZ 1 +#define S6_GREG1_PLLSEL_DDR_250MHZ 2 +#define S6_GREG1_PLLSEL_DDR_200MHZ 3 +#define S6_GREG1_PLLSEL_DDR_167MHZ 4 +#define S6_GREG1_PLLSEL_DDR_100MHZ 5 +#define S6_GREG1_PLLSEL_DDR_33MHZ 6 +#define S6_GREG1_PLLSEL_DDR_PLLIOREF 7 +#define S6_GREG1_PLLSEL_DDR_MASK 7 +#define S6_GREG1_PLLSEL_GMAC 16 +#define S6_GREG1_PLLSEL_GMAC_125MHZ 0 +#define S6_GREG1_PLLSEL_GMAC_25MHZ 1 +#define S6_GREG1_PLLSEL_GMAC_2500KHZ 2 +#define S6_GREG1_PLLSEL_GMAC_EXTERN 3 +#define S6_GREG1_PLLSEL_GMAC_MASK 3 +#define S6_GREG1_PLLSEL_GMII 18 +#define S6_GREG1_PLLSEL_GMII_111MHZ 0 +#define S6_GREG1_PLLSEL_GMII_IOREF 1 +#define S6_GREG1_PLLSEL_GMII_NONE 2 +#define S6_GREG1_PLLSEL_GMII_125MHZ 3 +#define S6_GREG1_PLLSEL_GMII_MASK 3 +#define S6_GREG1_SYSUNLOCKCNT 0x020 +#define S6_GREG1_IOUNLOCKCNT 0x024 +#define S6_GREG1_AIMUNLOCKCNT 0x028 +#define S6_GREG1_DP0UNLOCKCNT 0x02C +#define S6_GREG1_DP2UNLOCKCNT 0x030 +#define S6_GREG1_DDRUNLOCKCNT 0x034 +#define S6_GREG1_CLKBAL0 0x040 +#define S6_GREG1_CLKBAL0_LSGB 0 +#define S6_GREG1_CLKBAL0_LSPX 8 +#define S6_GREG1_CLKBAL0_MEMDO 16 +#define S6_GREG1_CLKBAL0_HSXT1 24 +#define S6_GREG1_CLKBAL1 0x044 +#define S6_GREG1_CLKBAL1_HSISEF 0 +#define S6_GREG1_CLKBAL1_HSNI 8 +#define S6_GREG1_CLKBAL1_HSNS 16 +#define S6_GREG1_CLKBAL1_HSISEFCFG 24 +#define S6_GREG1_CLKBAL2 0x048 +#define S6_GREG1_CLKBAL2_LSNB 0 +#define S6_GREG1_CLKBAL2_LSSB 8 +#define S6_GREG1_CLKBAL2_LSREST 24 +#define S6_GREG1_CLKBAL3 0x04C +#define S6_GREG1_CLKBAL3_ISEFXAD 0 +#define S6_GREG1_CLKBAL3_ISEFLMS 8 +#define S6_GREG1_CLKBAL3_ISEFISEF 16 +#define S6_GREG1_CLKBAL3_DDRDD 24 +#define S6_GREG1_CLKBAL4 0x050 +#define S6_GREG1_CLKBAL4_DDRDP 0 +#define S6_GREG1_CLKBAL4_DDRDO 8 +#define S6_GREG1_CLKBAL4_DDRNB 16 +#define S6_GREG1_CLKBAL4_DDRLMS 24 +#define S6_GREG1_BLOCKENA 0x100 +#define S6_GREG1_BLOCK_DDR 0 +#define S6_GREG1_BLOCK_DP 1 +#define S6_GREG1_BLOCK_NSNI 2 +#define S6_GREG1_BLOCK_PCIE 3 +#define S6_GREG1_BLOCK_GMAC 4 +#define S6_GREG1_BLOCK_I2S 5 +#define S6_GREG1_BLOCK_EGIB 6 +#define S6_GREG1_BLOCK_SB 7 +#define S6_GREG1_BLOCK_XT1 8 +#define S6_GREG1_CLKGATE 0x104 +#define S6_GREG1_BGATE_AIMNORTH 9 +#define S6_GREG1_BGATE_AIMEAST 10 +#define S6_GREG1_BGATE_AIMWEST 11 +#define S6_GREG1_BGATE_AIMSOUTH 12 +#define S6_GREG1_CHIPRES 0x108 +#define S6_GREG1_CHIPRES_SOFTRES 0 +#define S6_GREG1_CHIPRES_LOSTLOCK 1 +#define S6_GREG1_RESETCAUSE 0x10C +#define S6_GREG1_RESETCAUSE_RESETN 0 +#define S6_GREG1_RESETCAUSE_GLOBAL 1 +#define S6_GREG1_RESETCAUSE_WDOGTIMER 2 +#define S6_GREG1_RESETCAUSE_SWCHIP 3 +#define S6_GREG1_RESETCAUSE_PLLSYSLOSS 4 +#define S6_GREG1_RESETCAUSE_PCIE 5 +#define S6_GREG1_RESETCAUSE_CREATEDGLOB 6 +#define S6_GREG1_REFCLOCKCNT 0x110 +#define S6_GREG1_RESETTIMER 0x114 +#define S6_GREG1_NMITIMER 0x118 +#define S6_GREG1_GLOBAL_TIMER 0x11C +#define S6_GREG1_TIMER0 0x180 +#define S6_GREG1_TIMER1 0x184 +#define S6_GREG1_UARTCLOCKSEL 0x204 +#define S6_GREG1_CHIPVERSPACKG 0x208 +#define S6_GREG1_CHIPVERSPACKG_CHIPVID 0 +#define S6_GREG1_CHIPVERSPACKG_PACKSEL 8 +#define S6_GREG1_ONDIETERMCTRL 0x20C +#define S6_GREG1_ONDIETERMCTRL_WEST 0 +#define S6_GREG1_ONDIETERMCTRL_NORTH 2 +#define S6_GREG1_ONDIETERMCTRL_EAST 4 +#define S6_GREG1_ONDIETERMCTRL_SOUTH 6 +#define S6_GREG1_ONDIETERMCTRL_NONE 0 +#define S6_GREG1_ONDIETERMCTRL_75OHM 2 +#define S6_GREG1_ONDIETERMCTRL_MASK 3 +#define S6_GREG1_BOOT_CFG0 0x210 +#define S6_GREG1_BOOT_CFG0_AIMSTRONG 1 +#define S6_GREG1_BOOT_CFG0_MINIBOOTDL 2 +#define S6_GREG1_BOOT_CFG0_OCDGPIO8SET 5 +#define S6_GREG1_BOOT_CFG0_OCDGPIOENA 6 +#define S6_GREG1_BOOT_CFG0_DOWNSTREAM 7 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV 8 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_300MHZ 1 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_240MHZ 2 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_200MHZ 3 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_150MHZ 4 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_120MHZ 5 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_40MHZ 6 +#define S6_GREG1_BOOT_CFG0_PLLSYSDIV_MASK 7 +#define S6_GREG1_BOOT_CFG0_BALHSLMS 12 +#define S6_GREG1_BOOT_CFG0_BALHSNB 18 +#define S6_GREG1_BOOT_CFG0_BALHSXAD 24 +#define S6_GREG1_BOOT_CFG1 0x214 +#define S6_GREG1_BOOT_CFG1_PCIE1LANE 1 +#define S6_GREG1_BOOT_CFG1_MPLLPRESCALE 2 +#define S6_GREG1_BOOT_CFG1_MPLLNCY 4 +#define S6_GREG1_BOOT_CFG1_MPLLNCY5 9 +#define S6_GREG1_BOOT_CFG1_BALHSREST 14 +#define S6_GREG1_BOOT_CFG1_BALHSPSMEMS 20 +#define S6_GREG1_BOOT_CFG1_BALLSGI 26 +#define S6_GREG1_BOOT_CFG2 0x218 +#define S6_GREG1_BOOT_CFG2_PEID 0 +#define S6_GREG1_BOOT_CFG3 0x21C +#define S6_GREG1_DRAMBUSYHOLDOF 0x220 +#define S6_GREG1_DRAMBUSYHOLDOF_XT0 0 +#define S6_GREG1_DRAMBUSYHOLDOF_XT1 4 +#define S6_GREG1_DRAMBUSYHOLDOF_XT_MASK 7 +#define S6_GREG1_PCIEBAR1SIZE 0x224 +#define S6_GREG1_PCIEBAR2SIZE 0x228 +#define S6_GREG1_PCIEVENDOR 0x22C +#define S6_GREG1_PCIEDEVICE 0x230 +#define S6_GREG1_PCIEREV 0x234 +#define S6_GREG1_PCIECLASS 0x238 +#define S6_GREG1_XT1DCACHEMISS 0x240 +#define S6_GREG1_XT1ICACHEMISS 0x244 +#define S6_GREG1_HWSEMAPHORE(n) (0x400 + 4 * (n)) +#define S6_GREG1_HWSEMAPHORE_NB 16 + +/* peripheral interrupt numbers */ + +#define S6_INTC_GPIO(n) (n) /* 0..3 */ +#define S6_INTC_I2C 4 +#define S6_INTC_SPI 5 +#define S6_INTC_NB_ERR 6 +#define S6_INTC_DMA_LMSERR 7 +#define S6_INTC_DMA_LMSLOWWMRK(n) (8 + (n)) /* 0..11 */ +#define S6_INTC_DMA_LMSPENDCNT(n) (20 + (n)) /* 0..11 */ +#define S6_INTC_DMA HOSTLOWWMRK(n) (32 + (n)) /* 0..6 */ +#define S6_INTC_DMA_HOSTPENDCNT(n) (39 + (n)) /* 0..6 */ +#define S6_INTC_DMA_HOSTERR 46 +#define S6_INTC_UART(n) (47 + (n)) /* 0..1 */ +#define S6_INTC_XAD 49 +#define S6_INTC_NI_ERR 50 +#define S6_INTC_NI_INFIFOFULL 51 +#define S6_INTC_DMA_NIERR 52 +#define S6_INTC_DMA_NILOWWMRK(n) (53 + (n)) /* 0..3 */ +#define S6_INTC_DMA_NIPENDCNT(n) (57 + (n)) /* 0..3 */ +#define S6_INTC_DDR 61 +#define S6_INTC_NS_ERR 62 +#define S6_INTC_EFI_CFGERR 63 +#define S6_INTC_EFI_ISEFTEST 64 +#define S6_INTC_EFI_WRITEERR 65 +#define S6_INTC_NMI_TIMER 66 +#define S6_INTC_PLLLOCK_SYS 67 +#define S6_INTC_PLLLOCK_IO 68 +#define S6_INTC_PLLLOCK_AIM 69 +#define S6_INTC_PLLLOCK_DP0 70 +#define S6_INTC_PLLLOCK_DP2 71 +#define S6_INTC_I2S_ERR 72 +#define S6_INTC_GMAC_STAT 73 +#define S6_INTC_GMAC_ERR 74 +#define S6_INTC_GIB_ERR 75 +#define S6_INTC_PCIE_ERR 76 +#define S6_INTC_PCIE_MSI(n) (77 + (n)) /* 0..3 */ +#define S6_INTC_PCIE_INTA 81 +#define S6_INTC_PCIE_INTB 82 +#define S6_INTC_PCIE_INTC 83 +#define S6_INTC_PCIE_INTD 84 +#define S6_INTC_SW(n) (85 + (n)) /* 0..9 */ +#define S6_INTC_SW_ENABLE(n) (85 + 256 + (n)) +#define S6_INTC_DMA_DP_ERR 95 +#define S6_INTC_DMA_DPLOWWMRK(n) (96 + (n)) /* 0..3 */ +#define S6_INTC_DMA_DPPENDCNT(n) (100 + (n)) /* 0..3 */ +#define S6_INTC_DMA_DPTERMCNT(n) (104 + (n)) /* 0..3 */ +#define S6_INTC_TIMER0 108 +#define S6_INTC_TIMER1 109 +#define S6_INTC_DMA_HOSTTERMCNT(n) (110 + (n)) /* 0..6 */ + +#endif /* __XTENSA_S6000_HARDWARE_H */ diff --git a/arch/xtensa/variants/s6000/include/variant/irq.h b/arch/xtensa/variants/s6000/include/variant/irq.h new file mode 100644 index 00000000000..fa031cb0acc --- /dev/null +++ b/arch/xtensa/variants/s6000/include/variant/irq.h @@ -0,0 +1,9 @@ +#ifndef __XTENSA_S6000_IRQ_H +#define __XTENSA_S6000_IRQ_H + +#define NO_IRQ (-1) + +extern void variant_irq_enable(unsigned int irq); +extern void variant_irq_disable(unsigned int irq); + +#endif /* __XTENSA_S6000_IRQ_H */ diff --git a/arch/xtensa/variants/s6000/include/variant/tie-asm.h b/arch/xtensa/variants/s6000/include/variant/tie-asm.h new file mode 100644 index 00000000000..f02d0a3a2e2 --- /dev/null +++ b/arch/xtensa/variants/s6000/include/variant/tie-asm.h @@ -0,0 +1,304 @@ +/* + * This header file contains assembly-language definitions (assembly + * macros, etc.) for this specific Xtensa processor's TIE extensions + * and options. It is customized to this Xtensa processor configuration. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1999-2008 Tensilica Inc. + */ + +#ifndef _XTENSA_CORE_TIE_ASM_H +#define _XTENSA_CORE_TIE_ASM_H + +/* Selection parameter values for save-area save/restore macros: */ +/* Option vs. TIE: */ +#define XTHAL_SAS_TIE 0x0001 /* custom extension or coprocessor */ +#define XTHAL_SAS_OPT 0x0002 /* optional (and not a coprocessor) */ +/* Whether used automatically by compiler: */ +#define XTHAL_SAS_NOCC 0x0004 /* not used by compiler w/o special opts/code */ +#define XTHAL_SAS_CC 0x0008 /* used by compiler without special opts/code */ +/* ABI handling across function calls: */ +#define XTHAL_SAS_CALR 0x0010 /* caller-saved */ +#define XTHAL_SAS_CALE 0x0020 /* callee-saved */ +#define XTHAL_SAS_GLOB 0x0040 /* global across function calls (in thread) */ +/* Misc */ +#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */ + + + +/* Macro to save all non-coprocessor (extra) custom TIE and optional state + * (not including zero-overhead loop registers). + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) + */ + .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 1024-4, 4, 4 + rsr \at1, BR // boolean option + s32i \at1, \ptr, .Lxchal_ofs_ + 0 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 + .endif + .endm // xchal_ncp_store + +/* Macro to save all non-coprocessor (extra) custom TIE and optional state + * (not including zero-overhead loop registers). + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed) + */ + .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 1024-4, 4, 4 + l32i \at1, \ptr, .Lxchal_ofs_ + 0 + wsr \at1, BR // boolean option + .set .Lxchal_ofs_, .Lxchal_ofs_ + 4 + .endif + .endm // xchal_ncp_load + + + +#define XCHAL_NCP_NUM_ATMPS 1 + + + +/* Macro to save the state of TIE coprocessor FPU. + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_CP0_NUM_ATMPS needed) + */ +#define xchal_cp_FPU_store xchal_cp0_store +/* #define xchal_cp_FPU_store_a2 xchal_cp0_store a2 a3 a4 a5 a6 */ + .macro xchal_cp0_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 0, 1, 16 + rur232 \at1 // FCR + s32i \at1, \ptr, 0 + rur233 \at1 // FSR + s32i \at1, \ptr, 4 + SSI f0, \ptr, 8 + SSI f1, \ptr, 12 + SSI f2, \ptr, 16 + SSI f3, \ptr, 20 + SSI f4, \ptr, 24 + SSI f5, \ptr, 28 + SSI f6, \ptr, 32 + SSI f7, \ptr, 36 + SSI f8, \ptr, 40 + SSI f9, \ptr, 44 + SSI f10, \ptr, 48 + SSI f11, \ptr, 52 + SSI f12, \ptr, 56 + SSI f13, \ptr, 60 + SSI f14, \ptr, 64 + SSI f15, \ptr, 68 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 72 + .endif + .endm // xchal_cp0_store + +/* Macro to restore the state of TIE coprocessor FPU. + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_CP0_NUM_ATMPS needed) + */ +#define xchal_cp_FPU_load xchal_cp0_load +/* #define xchal_cp_FPU_load_a2 xchal_cp0_load a2 a3 a4 a5 a6 */ + .macro xchal_cp0_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 0, 1, 16 + l32i \at1, \ptr, 0 + wur232 \at1 // FCR + l32i \at1, \ptr, 4 + wur233 \at1 // FSR + LSI f0, \ptr, 8 + LSI f1, \ptr, 12 + LSI f2, \ptr, 16 + LSI f3, \ptr, 20 + LSI f4, \ptr, 24 + LSI f5, \ptr, 28 + LSI f6, \ptr, 32 + LSI f7, \ptr, 36 + LSI f8, \ptr, 40 + LSI f9, \ptr, 44 + LSI f10, \ptr, 48 + LSI f11, \ptr, 52 + LSI f12, \ptr, 56 + LSI f13, \ptr, 60 + LSI f14, \ptr, 64 + LSI f15, \ptr, 68 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 72 + .endif + .endm // xchal_cp0_load + +#define XCHAL_CP0_NUM_ATMPS 1 + +/* Macro to save the state of TIE coprocessor XAD. + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_CP6_NUM_ATMPS needed) + */ +#define xchal_cp_XAD_store xchal_cp6_store +/* #define xchal_cp_XAD_store_a2 xchal_cp6_store a2 a3 a4 a5 a6 */ + .macro xchal_cp6_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 0, 1, 16 + rur0 \at1 // LDCBHI + s32i \at1, \ptr, 0 + rur1 \at1 // LDCBLO + s32i \at1, \ptr, 4 + rur2 \at1 // STCBHI + s32i \at1, \ptr, 8 + rur3 \at1 // STCBLO + s32i \at1, \ptr, 12 + rur8 \at1 // LDBRBASE + s32i \at1, \ptr, 16 + rur9 \at1 // LDBROFF + s32i \at1, \ptr, 20 + rur10 \at1 // LDBRINC + s32i \at1, \ptr, 24 + rur11 \at1 // STBRBASE + s32i \at1, \ptr, 28 + rur12 \at1 // STBROFF + s32i \at1, \ptr, 32 + rur13 \at1 // STBRINC + s32i \at1, \ptr, 36 + rur24 \at1 // SCRATCH0 + s32i \at1, \ptr, 40 + rur25 \at1 // SCRATCH1 + s32i \at1, \ptr, 44 + rur26 \at1 // SCRATCH2 + s32i \at1, \ptr, 48 + rur27 \at1 // SCRATCH3 + s32i \at1, \ptr, 52 + WRAS128I wra0, \ptr, 64 + WRAS128I wra1, \ptr, 80 + WRAS128I wra2, \ptr, 96 + WRAS128I wra3, \ptr, 112 + WRAS128I wra4, \ptr, 128 + WRAS128I wra5, \ptr, 144 + WRAS128I wra6, \ptr, 160 + WRAS128I wra7, \ptr, 176 + WRAS128I wra8, \ptr, 192 + WRAS128I wra9, \ptr, 208 + WRAS128I wra10, \ptr, 224 + WRAS128I wra11, \ptr, 240 + WRAS128I wra12, \ptr, 256 + WRAS128I wra13, \ptr, 272 + WRAS128I wra14, \ptr, 288 + WRAS128I wra15, \ptr, 304 + WRBS128I wrb0, \ptr, 320 + WRBS128I wrb1, \ptr, 336 + WRBS128I wrb2, \ptr, 352 + WRBS128I wrb3, \ptr, 368 + WRBS128I wrb4, \ptr, 384 + WRBS128I wrb5, \ptr, 400 + WRBS128I wrb6, \ptr, 416 + WRBS128I wrb7, \ptr, 432 + WRBS128I wrb8, \ptr, 448 + WRBS128I wrb9, \ptr, 464 + WRBS128I wrb10, \ptr, 480 + WRBS128I wrb11, \ptr, 496 + WRBS128I wrb12, \ptr, 512 + WRBS128I wrb13, \ptr, 528 + WRBS128I wrb14, \ptr, 544 + WRBS128I wrb15, \ptr, 560 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 576 + .endif + .endm // xchal_cp6_store + +/* Macro to restore the state of TIE coprocessor XAD. + * Save area ptr (clobbered): ptr (16 byte aligned) + * Scratch regs (clobbered): at1..at4 (only first XCHAL_CP6_NUM_ATMPS needed) + */ +#define xchal_cp_XAD_load xchal_cp6_load +/* #define xchal_cp_XAD_load_a2 xchal_cp6_load a2 a3 a4 a5 a6 */ + .macro xchal_cp6_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL + xchal_sa_start \continue, \ofs + .ifeq (XTHAL_SAS_TIE | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~\select + xchal_sa_align \ptr, 0, 0, 1, 16 + l32i \at1, \ptr, 0 + wur0 \at1 // LDCBHI + l32i \at1, \ptr, 4 + wur1 \at1 // LDCBLO + l32i \at1, \ptr, 8 + wur2 \at1 // STCBHI + l32i \at1, \ptr, 12 + wur3 \at1 // STCBLO + l32i \at1, \ptr, 16 + wur8 \at1 // LDBRBASE + l32i \at1, \ptr, 20 + wur9 \at1 // LDBROFF + l32i \at1, \ptr, 24 + wur10 \at1 // LDBRINC + l32i \at1, \ptr, 28 + wur11 \at1 // STBRBASE + l32i \at1, \ptr, 32 + wur12 \at1 // STBROFF + l32i \at1, \ptr, 36 + wur13 \at1 // STBRINC + l32i \at1, \ptr, 40 + wur24 \at1 // SCRATCH0 + l32i \at1, \ptr, 44 + wur25 \at1 // SCRATCH1 + l32i \at1, \ptr, 48 + wur26 \at1 // SCRATCH2 + l32i \at1, \ptr, 52 + wur27 \at1 // SCRATCH3 + WRBL128I wrb0, \ptr, 320 + WRBL128I wrb1, \ptr, 336 + WRBL128I wrb2, \ptr, 352 + WRBL128I wrb3, \ptr, 368 + WRBL128I wrb4, \ptr, 384 + WRBL128I wrb5, \ptr, 400 + WRBL128I wrb6, \ptr, 416 + WRBL128I wrb7, \ptr, 432 + WRBL128I wrb8, \ptr, 448 + WRBL128I wrb9, \ptr, 464 + WRBL128I wrb10, \ptr, 480 + WRBL128I wrb11, \ptr, 496 + WRBL128I wrb12, \ptr, 512 + WRBL128I wrb13, \ptr, 528 + WRBL128I wrb14, \ptr, 544 + WRBL128I wrb15, \ptr, 560 + WRAL128I wra0, \ptr, 64 + WRAL128I wra1, \ptr, 80 + WRAL128I wra2, \ptr, 96 + WRAL128I wra3, \ptr, 112 + WRAL128I wra4, \ptr, 128 + WRAL128I wra5, \ptr, 144 + WRAL128I wra6, \ptr, 160 + WRAL128I wra7, \ptr, 176 + WRAL128I wra8, \ptr, 192 + WRAL128I wra9, \ptr, 208 + WRAL128I wra10, \ptr, 224 + WRAL128I wra11, \ptr, 240 + WRAL128I wra12, \ptr, 256 + WRAL128I wra13, \ptr, 272 + WRAL128I wra14, \ptr, 288 + WRAL128I wra15, \ptr, 304 + .set .Lxchal_ofs_, .Lxchal_ofs_ + 576 + .endif + .endm // xchal_cp6_load + +#define XCHAL_CP6_NUM_ATMPS 1 +#define XCHAL_SA_NUM_ATMPS 1 + + /* Empty macros for unconfigured coprocessors: */ + .macro xchal_cp1_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp1_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp7_store p a b c d continue=0 ofs=-1 select=-1 ; .endm + .macro xchal_cp7_load p a b c d continue=0 ofs=-1 select=-1 ; .endm + +#endif /*_XTENSA_CORE_TIE_ASM_H*/ + diff --git a/arch/xtensa/variants/s6000/include/variant/tie.h b/arch/xtensa/variants/s6000/include/variant/tie.h new file mode 100644 index 00000000000..be7ea843d5d --- /dev/null +++ b/arch/xtensa/variants/s6000/include/variant/tie.h @@ -0,0 +1,191 @@ +/* + * This header file describes this specific Xtensa processor's TIE extensions + * that extend basic Xtensa core functionality. It is customized to this + * Xtensa processor configuration. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1999-2008 Tensilica Inc. + */ + +#ifndef _XTENSA_CORE_TIE_H +#define _XTENSA_CORE_TIE_H + +#define XCHAL_CP_NUM 2 /* number of coprocessors */ +#define XCHAL_CP_MAX 7 /* max CP ID + 1 (0 if none) */ +#define XCHAL_CP_MASK 0x41 /* bitmask of all CPs by ID */ +#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ + +/* Basic parameters of each coprocessor: */ +#define XCHAL_CP0_NAME "FPU" +#define XCHAL_CP0_IDENT FPU +#define XCHAL_CP0_SA_SIZE 72 /* size of state save area */ +#define XCHAL_CP0_SA_ALIGN 4 /* min alignment of save area */ +#define XCHAL_CP_ID_FPU 0 /* coprocessor ID (0..7) */ +#define XCHAL_CP6_NAME "XAD" +#define XCHAL_CP6_IDENT XAD +#define XCHAL_CP6_SA_SIZE 576 /* size of state save area */ +#define XCHAL_CP6_SA_ALIGN 16 /* min alignment of save area */ +#define XCHAL_CP_ID_XAD 6 /* coprocessor ID (0..7) */ + +/* Filler info for unassigned coprocessors, to simplify arrays etc: */ +#define XCHAL_CP1_SA_SIZE 0 +#define XCHAL_CP1_SA_ALIGN 1 +#define XCHAL_CP2_SA_SIZE 0 +#define XCHAL_CP2_SA_ALIGN 1 +#define XCHAL_CP3_SA_SIZE 0 +#define XCHAL_CP3_SA_ALIGN 1 +#define XCHAL_CP4_SA_SIZE 0 +#define XCHAL_CP4_SA_ALIGN 1 +#define XCHAL_CP5_SA_SIZE 0 +#define XCHAL_CP5_SA_ALIGN 1 +#define XCHAL_CP7_SA_SIZE 0 +#define XCHAL_CP7_SA_ALIGN 1 + +/* Save area for non-coprocessor optional and custom (TIE) state: */ +#define XCHAL_NCP_SA_SIZE 4 +#define XCHAL_NCP_SA_ALIGN 4 + +/* Total save area for optional and custom state (NCP + CPn): */ +#define XCHAL_TOTAL_SA_SIZE 672 /* with 16-byte align padding */ +#define XCHAL_TOTAL_SA_ALIGN 16 /* actual minimum alignment */ + +/* + * Detailed contents of save areas. + * NOTE: caller must define the XCHAL_SA_REG macro (not defined here) + * before expanding the XCHAL_xxx_SA_LIST() macros. + * + * XCHAL_SA_REG(s,ccused,abikind,kind,opt,name,galign,align,asize, + * dbnum,base,regnum,bitsz,gapsz,reset,x...) + * + * s = passed from XCHAL_*_LIST(s), eg. to select how to expand + * ccused = set if used by compiler without special options or code + * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global) + * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg) + * opt = 0 (custom TIE extension or coprocessor), or 1 (optional reg) + * name = lowercase reg name (no quotes) + * galign = group byte alignment (power of 2) (galign >= align) + * align = register byte alignment (power of 2) + * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz) + * (not including any pad bytes required to galign this or next reg) + * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>) + * base = reg shortname w/o index (or sr=special, ur=TIE user reg) + * regnum = reg index in regfile, or special/TIE-user reg number + * bitsz = number of significant bits (regfile width, or ur/sr mask bits) + * gapsz = intervening bits, if bitsz bits not stored contiguously + * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize) + * reset = register reset value (or 0 if undefined at reset) + * x = reserved for future use (0 until then) + * + * To filter out certain registers, e.g. to expand only the non-global + * registers used by the compiler, you can do something like this: + * + * #define XCHAL_SA_REG(s,ccused,p...) SELCC##ccused(p) + * #define SELCC0(p...) + * #define SELCC1(abikind,p...) SELAK##abikind(p) + * #define SELAK0(p...) REG(p) + * #define SELAK1(p...) REG(p) + * #define SELAK2(p...) + * #define REG(kind,tie,name,galn,aln,asz,csz,dbnum,base,rnum,bsz,rst,x...) \ + * ...what you want to expand... + */ + +#define XCHAL_NCP_SA_NUM 1 +#define XCHAL_NCP_SA_LIST(s) \ + XCHAL_SA_REG(s,0,0,0,1, br, 4, 4, 4,0x0204, sr,4 , 16,0,0,0) + +#define XCHAL_CP0_SA_NUM 18 +#define XCHAL_CP0_SA_LIST(s) \ + XCHAL_SA_REG(s,0,0,1,0, fcr, 4, 4, 4,0x03E8, ur,232, 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, fsr, 4, 4, 4,0x03E9, ur,233, 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f0, 4, 4, 4,0x0030, f,0 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f1, 4, 4, 4,0x0031, f,1 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f2, 4, 4, 4,0x0032, f,2 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f3, 4, 4, 4,0x0033, f,3 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f4, 4, 4, 4,0x0034, f,4 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f5, 4, 4, 4,0x0035, f,5 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f6, 4, 4, 4,0x0036, f,6 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f7, 4, 4, 4,0x0037, f,7 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f8, 4, 4, 4,0x0038, f,8 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f9, 4, 4, 4,0x0039, f,9 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f10, 4, 4, 4,0x003A, f,10 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f11, 4, 4, 4,0x003B, f,11 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f12, 4, 4, 4,0x003C, f,12 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f13, 4, 4, 4,0x003D, f,13 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f14, 4, 4, 4,0x003E, f,14 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, f15, 4, 4, 4,0x003F, f,15 , 32,0,0,0) + +#define XCHAL_CP1_SA_NUM 0 +#define XCHAL_CP1_SA_LIST(s) /* empty */ + +#define XCHAL_CP2_SA_NUM 0 +#define XCHAL_CP2_SA_LIST(s) /* empty */ + +#define XCHAL_CP3_SA_NUM 0 +#define XCHAL_CP3_SA_LIST(s) /* empty */ + +#define XCHAL_CP4_SA_NUM 0 +#define XCHAL_CP4_SA_LIST(s) /* empty */ + +#define XCHAL_CP5_SA_NUM 0 +#define XCHAL_CP5_SA_LIST(s) /* empty */ + +#define XCHAL_CP6_SA_NUM 46 +#define XCHAL_CP6_SA_LIST(s) \ + XCHAL_SA_REG(s,0,0,1,0, ldcbhi,16, 4, 4,0x0300, ur,0 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, ldcblo, 4, 4, 4,0x0301, ur,1 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, stcbhi, 4, 4, 4,0x0302, ur,2 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, stcblo, 4, 4, 4,0x0303, ur,3 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, ldbrbase, 4, 4, 4,0x0308, ur,8 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, ldbroff, 4, 4, 4,0x0309, ur,9 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, ldbrinc, 4, 4, 4,0x030A, ur,10 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, stbrbase, 4, 4, 4,0x030B, ur,11 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, stbroff, 4, 4, 4,0x030C, ur,12 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, stbrinc, 4, 4, 4,0x030D, ur,13 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, scratch0, 4, 4, 4,0x0318, ur,24 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, scratch1, 4, 4, 4,0x0319, ur,25 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, scratch2, 4, 4, 4,0x031A, ur,26 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,1,0, scratch3, 4, 4, 4,0x031B, ur,27 , 32,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra0,16,16,16,0x1010, wra,0 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra1,16,16,16,0x1011, wra,1 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra2,16,16,16,0x1012, wra,2 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra3,16,16,16,0x1013, wra,3 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra4,16,16,16,0x1014, wra,4 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra5,16,16,16,0x1015, wra,5 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra6,16,16,16,0x1016, wra,6 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra7,16,16,16,0x1017, wra,7 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra8,16,16,16,0x1018, wra,8 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra9,16,16,16,0x1019, wra,9 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra10,16,16,16,0x101A, wra,10 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra11,16,16,16,0x101B, wra,11 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra12,16,16,16,0x101C, wra,12 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra13,16,16,16,0x101D, wra,13 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra14,16,16,16,0x101E, wra,14 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wra15,16,16,16,0x101F, wra,15 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb0,16,16,16,0x1020, wrb,0 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb1,16,16,16,0x1021, wrb,1 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb2,16,16,16,0x1022, wrb,2 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb3,16,16,16,0x1023, wrb,3 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb4,16,16,16,0x1024, wrb,4 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb5,16,16,16,0x1025, wrb,5 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb6,16,16,16,0x1026, wrb,6 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb7,16,16,16,0x1027, wrb,7 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb8,16,16,16,0x1028, wrb,8 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb9,16,16,16,0x1029, wrb,9 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb10,16,16,16,0x102A, wrb,10 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb11,16,16,16,0x102B, wrb,11 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb12,16,16,16,0x102C, wrb,12 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb13,16,16,16,0x102D, wrb,13 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb14,16,16,16,0x102E, wrb,14 ,128,0,0,0) \ + XCHAL_SA_REG(s,0,0,2,0, wrb15,16,16,16,0x102F, wrb,15 ,128,0,0,0) + +#define XCHAL_CP7_SA_NUM 0 +#define XCHAL_CP7_SA_LIST(s) /* empty */ + +/* Byte length of instruction from its first nibble (op0 field), per FLIX. */ +#define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8 + +#endif /*_XTENSA_CORE_TIE_H*/ + diff --git a/arch/xtensa/variants/s6000/irq.c b/arch/xtensa/variants/s6000/irq.c new file mode 100644 index 00000000000..6651e3285fc --- /dev/null +++ b/arch/xtensa/variants/s6000/irq.c @@ -0,0 +1,74 @@ +/* + * s6000 irq crossbar + * + * Copyright (c) 2009 emlix GmbH + * Authors: Johannes Weiner <jw@emlix.com> + * Oskar Schirmer <os@emlix.com> + */ +#include <linux/io.h> +#include <asm/irq.h> +#include <variant/hardware.h> + +/* S6_REG_INTC */ +#define INTC_STATUS 0x000 +#define INTC_RAW 0x010 +#define INTC_STATUS_AG 0x100 +#define INTC_CFG(n) (0x200 + 4 * (n)) + +/* + * The s6000 has a crossbar that multiplexes interrupt output lines + * from the peripherals to input lines on the xtensa core. + * + * We leave the mapping decisions to the platform as it depends on the + * actually connected peripherals which distribution makes sense. + */ +extern const signed char *platform_irq_mappings[NR_IRQS]; + +static unsigned long scp_to_intc_enable[] = { +#define TO_INTC_ENABLE(n) (((n) << 1) + 1) + TO_INTC_ENABLE(0), + TO_INTC_ENABLE(1), + TO_INTC_ENABLE(2), + TO_INTC_ENABLE(3), + TO_INTC_ENABLE(4), + TO_INTC_ENABLE(5), + TO_INTC_ENABLE(6), + TO_INTC_ENABLE(7), + TO_INTC_ENABLE(8), + TO_INTC_ENABLE(9), + TO_INTC_ENABLE(10), + TO_INTC_ENABLE(11), + TO_INTC_ENABLE(12), + -1, + -1, + TO_INTC_ENABLE(13), + -1, + TO_INTC_ENABLE(14), + -1, + TO_INTC_ENABLE(15), +#undef TO_INTC_ENABLE +}; + +static void irq_set(unsigned int irq, int enable) +{ + unsigned long en; + const signed char *m = platform_irq_mappings[irq]; + + if (!m) + return; + en = enable ? scp_to_intc_enable[irq] : 0; + while (*m >= 0) { + writel(en, S6_REG_INTC + INTC_CFG(*m)); + m++; + } +} + +void variant_irq_enable(unsigned int irq) +{ + irq_set(irq, 1); +} + +void variant_irq_disable(unsigned int irq) +{ + irq_set(irq, 0); +} |