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Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/perf_counter.c12
-rw-r--r--arch/x86/kernel/cpu/perf_counter.c8
2 files changed, 10 insertions, 10 deletions
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_counter.c
index f96d55f55bd..c9633321e7a 100644
--- a/arch/powerpc/kernel/perf_counter.c
+++ b/arch/powerpc/kernel/perf_counter.c
@@ -535,7 +535,7 @@ void hw_perf_enable(void)
continue;
}
val = 0;
- if (counter->hw.irq_period) {
+ if (counter->hw.sample_period) {
left = atomic64_read(&counter->hw.period_left);
if (left < 0x80000000L)
val = 0x80000000L - left;
@@ -749,12 +749,12 @@ static void power_pmu_unthrottle(struct perf_counter *counter)
s64 val, left;
unsigned long flags;
- if (!counter->hw.idx || !counter->hw.irq_period)
+ if (!counter->hw.idx || !counter->hw.sample_period)
return;
local_irq_save(flags);
perf_disable();
power_pmu_read(counter);
- left = counter->hw.irq_period;
+ left = counter->hw.sample_period;
val = 0;
if (left < 0x80000000L)
val = 0x80000000L - left;
@@ -789,7 +789,7 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev,
if (counter->hw_event.exclude_user
|| counter->hw_event.exclude_kernel
|| counter->hw_event.exclude_hv
- || counter->hw_event.irq_period)
+ || counter->hw_event.sample_period)
return 0;
if (ppmu->limited_pmc_event(ev))
@@ -925,7 +925,7 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
counter->hw.config = events[n];
counter->hw.counter_base = cflags[n];
- atomic64_set(&counter->hw.period_left, counter->hw.irq_period);
+ atomic64_set(&counter->hw.period_left, counter->hw.sample_period);
/*
* See if we need to reserve the PMU.
@@ -958,7 +958,7 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
static void record_and_restart(struct perf_counter *counter, long val,
struct pt_regs *regs, int nmi)
{
- u64 period = counter->hw.irq_period;
+ u64 period = counter->hw.sample_period;
s64 prev, delta, left;
int record = 0;
u64 addr, mmcra, sdsync;
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 316b0c995f3..ec06aa5e928 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -290,11 +290,11 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
hwc->nmi = 1;
hw_event->nmi = 1;
- if (!hwc->irq_period)
- hwc->irq_period = x86_pmu.max_period;
+ if (!hwc->sample_period)
+ hwc->sample_period = x86_pmu.max_period;
atomic64_set(&hwc->period_left,
- min(x86_pmu.max_period, hwc->irq_period));
+ min(x86_pmu.max_period, hwc->sample_period));
/*
* Raw event type provide the config in the event structure
@@ -462,7 +462,7 @@ x86_perf_counter_set_period(struct perf_counter *counter,
struct hw_perf_counter *hwc, int idx)
{
s64 left = atomic64_read(&hwc->period_left);
- s64 period = min(x86_pmu.max_period, hwc->irq_period);
+ s64 period = min(x86_pmu.max_period, hwc->sample_period);
int err;
/*