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-rw-r--r--arch/arm/boot/compressed/head-shark.S42
-rw-r--r--arch/arm/kernel/smp.c6
-rw-r--r--arch/arm/mach-integrator/platsmp.c8
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/nwfpe/fpa11.h4
-rw-r--r--arch/arm/nwfpe/fpmodule.c2
-rw-r--r--arch/arm/nwfpe/fpmodule.inl14
7 files changed, 50 insertions, 28 deletions
diff --git a/arch/arm/boot/compressed/head-shark.S b/arch/arm/boot/compressed/head-shark.S
index 848f60e5429..089c560e07f 100644
--- a/arch/arm/boot/compressed/head-shark.S
+++ b/arch/arm/boot/compressed/head-shark.S
@@ -63,8 +63,8 @@ __beginning: mov r4, r0 @ save the entry to the firmware
mov pc, r2
-__copy_target: .long 0x08508000
-__copy_end: .long 0x08608000
+__copy_target: .long 0x08507FFC
+__copy_end: .long 0x08607FFC
.word _start
.word __bss_start
@@ -73,9 +73,10 @@ __copy_end: .long 0x08608000
__temp_stack: .space 128
__mmu_off:
- adr r0, __ofw_data
+ adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
orr r0, r0, #0x00600000
+ sub r0, r0, #4
ldr r1, __copy_end
ldr r3, __copy_target
@@ -89,20 +90,43 @@ __mmu_off:
* from 0x08500000 to 0x08508000 if we have only 8MB
*/
+/* As we get more 2.6-kernels it gets more and more
+ * uncomfortable to be bound to kernel images of 1MB only.
+ * So we add a loop here, to be able to copy some more.
+ * Alexander Schulz 2005-07-17
+ */
+
+ mov r4, #3 @ How many megabytes to copy
+
+
+__MoveCode: sub r4, r4, #1
__Copy: ldr r2, [r0], #-4
str r2, [r1], #-4
teq r1, r3
bne __Copy
+
+ /* The firmware maps us in blocks of 1 MB, the next block is
+ _below_ the last one. So our decrementing source pointer
+ ist right here, but the destination pointer must be increased
+ by 2 MB */
+ add r1, r1, #0x00200000
+ add r3, r3, #0x00100000
+
+ teq r4, #0
+ bne __MoveCode
+
+
/* and jump to it */
- adr r2, __go_on
- adr r0, __ofw_data
+ adr r2, __go_on @ where we want to jump
+ adr r0, __ofw_data @ read the 1. entry of the memory map
ldr r0, [r0, #4]
- sub r2, r2, r0
- sub r2, r2, #0x00500000
- ldr r0, __copy_target
+ sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)
+ sub r2, r2, #0x00500000 @ -0050
+ ldr r0, __copy_target @ and add 0850 8000 instead
+ add r0, r0, #4
add r2, r2, r0
- mov pc, r2
+ mov pc, r2 @ and jump there
__go_on:
adr sp, __temp_stack
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 7ae45c3fc83..295e0a8379c 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -78,7 +78,7 @@ struct smp_call_struct {
static struct smp_call_struct * volatile smp_call_function_data;
static DEFINE_SPINLOCK(smp_call_function_lock);
-int __init __cpu_up(unsigned int cpu)
+int __cpuinit __cpu_up(unsigned int cpu)
{
struct task_struct *idle;
pgd_t *pgd;
@@ -159,7 +159,7 @@ int __init __cpu_up(unsigned int cpu)
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
*/
-asmlinkage void __init secondary_start_kernel(void)
+asmlinkage void __cpuinit secondary_start_kernel(void)
{
struct mm_struct *mm = &init_mm;
unsigned int cpu = smp_processor_id();
@@ -209,7 +209,7 @@ asmlinkage void __init secondary_start_kernel(void)
* Called by both boot and secondaries to move global data into
* per-processor storage.
*/
-void __init smp_store_cpu_info(unsigned int cpuid)
+void __cpuinit smp_store_cpu_info(unsigned int cpuid)
{
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
diff --git a/arch/arm/mach-integrator/platsmp.c b/arch/arm/mach-integrator/platsmp.c
index 2ba02577709..aecf47ba033 100644
--- a/arch/arm/mach-integrator/platsmp.c
+++ b/arch/arm/mach-integrator/platsmp.c
@@ -27,12 +27,12 @@ extern void integrator_secondary_startup(void);
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
-volatile int __initdata pen_release = -1;
-unsigned long __initdata phys_pen_release = 0;
+volatile int __cpuinitdata pen_release = -1;
+unsigned long __cpuinitdata phys_pen_release = 0;
static DEFINE_SPINLOCK(boot_lock);
-void __init platform_secondary_init(unsigned int cpu)
+void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
* the primary core may have used a "cross call" soft interrupt
@@ -61,7 +61,7 @@ void __init platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __init boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index c7c28890d40..65feaf20d23 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -436,7 +436,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC);
if (buf == NULL) {
- pr_debug("%s: out of memory (%d alloc)\n",
+ pr_debug("%s: out of memory (%ld alloc)\n",
__FUNCTION__, sizeof(*buf));
return -ENOMEM;
}
diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h
index 45cc65426a2..e4a61aea534 100644
--- a/arch/arm/nwfpe/fpa11.h
+++ b/arch/arm/nwfpe/fpa11.h
@@ -29,9 +29,7 @@
* stack+task struct. Use the same method as 'current' uses to
* reach them.
*/
-register unsigned long *user_registers asm("sl");
-
-#define GET_USERREG() (user_registers)
+#define GET_USERREG() ((struct pt_regs *)(THREAD_START_SP + (unsigned long)current_thread_info()) - 1)
#include <linux/config.h>
#include <linux/thread_info.h>
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c
index a8efcf34888..12885f31d34 100644
--- a/arch/arm/nwfpe/fpmodule.c
+++ b/arch/arm/nwfpe/fpmodule.c
@@ -132,7 +132,7 @@ void float_raise(signed char flags)
printk(KERN_DEBUG
"NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",
current->comm, current->pid, flags,
- __builtin_return_address(0), GET_USERREG()[15]);
+ __builtin_return_address(0), GET_USERREG()->ARM_pc);
#endif
/* Keep SoftFloat exception flags up to date. */
diff --git a/arch/arm/nwfpe/fpmodule.inl b/arch/arm/nwfpe/fpmodule.inl
index e5f59e9a302..2c39ad408f2 100644
--- a/arch/arm/nwfpe/fpmodule.inl
+++ b/arch/arm/nwfpe/fpmodule.inl
@@ -28,8 +28,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
for this in this routine. LDF/STF instructions with Rn = PC
depend on the PC being correct, as they use PC+8 in their
address calculations. */
- unsigned long *userRegisters = GET_USERREG();
- unsigned int val = userRegisters[nReg];
+ struct pt_regs *regs = GET_USERREG();
+ unsigned int val = regs->uregs[nReg];
if (REG_PC == nReg)
val -= 4;
return val;
@@ -38,8 +38,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
static inline void
writeRegister(const unsigned int nReg, const unsigned long val)
{
- unsigned long *userRegisters = GET_USERREG();
- userRegisters[nReg] = val;
+ struct pt_regs *regs = GET_USERREG();
+ regs->uregs[nReg] = val;
}
static inline unsigned long readCPSR(void)
@@ -63,12 +63,12 @@ static inline unsigned long readConditionCodes(void)
static inline void writeConditionCodes(const unsigned long val)
{
- unsigned long *userRegisters = GET_USERREG();
+ struct pt_regs *regs = GET_USERREG();
unsigned long rval;
/*
* Operate directly on userRegisters since
* the CPSR may be the PC register itself.
*/
- rval = userRegisters[REG_CPSR] & ~CC_MASK;
- userRegisters[REG_CPSR] = rval | (val & CC_MASK);
+ rval = regs->ARM_cpsr & ~CC_MASK;
+ regs->ARM_cpsr = rval | (val & CC_MASK);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 11:18:06 +0000