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path: root/drivers/ide/pci/cmd64x.c
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Diffstat (limited to 'drivers/ide/pci/cmd64x.c')
-rw-r--r--drivers/ide/pci/cmd64x.c151
1 files changed, 19 insertions, 132 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index ea0143ef5fe..edabe6299ef 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -1,6 +1,4 @@
/*
- * linux/drivers/ide/pci/cmd64x.c Version 1.50 May 10, 2007
- *
* cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
* Due to massive hardware bugs, UltraDMA is only supported
* on the 646U2 and not on the 646U.
@@ -15,15 +13,12 @@
#include <linux/module.h>
#include <linux/types.h>
#include <linux/pci.h>
-#include <linux/delay.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/io.h>
-#define DISPLAY_CMD64X_TIMINGS
-
#define CMD_DEBUG 0
#if CMD_DEBUG
@@ -37,11 +32,6 @@
*/
#define CFR 0x50
#define CFR_INTR_CH0 0x04
-#define CNTRL 0x51
-#define CNTRL_ENA_1ST 0x04
-#define CNTRL_ENA_2ND 0x08
-#define CNTRL_DIS_RA0 0x40
-#define CNTRL_DIS_RA1 0x80
#define CMDTIM 0x52
#define ARTTIM0 0x53
@@ -60,108 +50,13 @@
#define MRDMODE 0x71
#define MRDMODE_INTR_CH0 0x04
#define MRDMODE_INTR_CH1 0x08
-#define MRDMODE_BLK_CH0 0x10
-#define MRDMODE_BLK_CH1 0x20
-#define BMIDESR0 0x72
#define UDIDETCR0 0x73
#define DTPR0 0x74
#define BMIDECR1 0x78
#define BMIDECSR 0x79
-#define BMIDESR1 0x7A
#define UDIDETCR1 0x7B
#define DTPR1 0x7C
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
-#include <linux/stat.h>
-#include <linux/proc_fs.h>
-
-static u8 cmd64x_proc = 0;
-
-#define CMD_MAX_DEVS 5
-
-static struct pci_dev *cmd_devs[CMD_MAX_DEVS];
-static int n_cmd_devs;
-
-static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index)
-{
- char *p = buf;
- u8 reg72 = 0, reg73 = 0; /* primary */
- u8 reg7a = 0, reg7b = 0; /* secondary */
- u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */
-
- p += sprintf(p, "\nController: %d\n", index);
- p += sprintf(p, "PCI-%x Chipset.\n", dev->device);
-
- (void) pci_read_config_byte(dev, CFR, &reg50);
- (void) pci_read_config_byte(dev, CNTRL, &reg51);
- (void) pci_read_config_byte(dev, ARTTIM23, &reg57);
- (void) pci_read_config_byte(dev, MRDMODE, &reg71);
- (void) pci_read_config_byte(dev, BMIDESR0, &reg72);
- (void) pci_read_config_byte(dev, UDIDETCR0, &reg73);
- (void) pci_read_config_byte(dev, BMIDESR1, &reg7a);
- (void) pci_read_config_byte(dev, UDIDETCR1, &reg7b);
-
- /* PCI0643/6 originally didn't have the primary channel enable bit */
- if ((dev->device == PCI_DEVICE_ID_CMD_643) ||
- (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 3))
- reg51 |= CNTRL_ENA_1ST;
-
- p += sprintf(p, "---------------- Primary Channel "
- "---------------- Secondary Channel ------------\n");
- p += sprintf(p, " %s %s\n",
- (reg51 & CNTRL_ENA_1ST) ? "enabled " : "disabled",
- (reg51 & CNTRL_ENA_2ND) ? "enabled " : "disabled");
- p += sprintf(p, "---------------- drive0 --------- drive1 "
- "-------- drive0 --------- drive1 ------\n");
- p += sprintf(p, "DMA enabled: %s %s"
- " %s %s\n",
- (reg72 & 0x20) ? "yes" : "no ", (reg72 & 0x40) ? "yes" : "no ",
- (reg7a & 0x20) ? "yes" : "no ", (reg7a & 0x40) ? "yes" : "no ");
- p += sprintf(p, "UltraDMA mode: %s (%c) %s (%c)",
- ( reg73 & 0x01) ? " on" : "off",
- ((reg73 & 0x30) == 0x30) ? ((reg73 & 0x04) ? '3' : '0') :
- ((reg73 & 0x30) == 0x20) ? ((reg73 & 0x04) ? '3' : '1') :
- ((reg73 & 0x30) == 0x10) ? ((reg73 & 0x04) ? '4' : '2') :
- ((reg73 & 0x30) == 0x00) ? ((reg73 & 0x04) ? '5' : '2') : '?',
- ( reg73 & 0x02) ? " on" : "off",
- ((reg73 & 0xC0) == 0xC0) ? ((reg73 & 0x08) ? '3' : '0') :
- ((reg73 & 0xC0) == 0x80) ? ((reg73 & 0x08) ? '3' : '1') :
- ((reg73 & 0xC0) == 0x40) ? ((reg73 & 0x08) ? '4' : '2') :
- ((reg73 & 0xC0) == 0x00) ? ((reg73 & 0x08) ? '5' : '2') : '?');
- p += sprintf(p, " %s (%c) %s (%c)\n",
- ( reg7b & 0x01) ? " on" : "off",
- ((reg7b & 0x30) == 0x30) ? ((reg7b & 0x04) ? '3' : '0') :
- ((reg7b & 0x30) == 0x20) ? ((reg7b & 0x04) ? '3' : '1') :
- ((reg7b & 0x30) == 0x10) ? ((reg7b & 0x04) ? '4' : '2') :
- ((reg7b & 0x30) == 0x00) ? ((reg7b & 0x04) ? '5' : '2') : '?',
- ( reg7b & 0x02) ? " on" : "off",
- ((reg7b & 0xC0) == 0xC0) ? ((reg7b & 0x08) ? '3' : '0') :
- ((reg7b & 0xC0) == 0x80) ? ((reg7b & 0x08) ? '3' : '1') :
- ((reg7b & 0xC0) == 0x40) ? ((reg7b & 0x08) ? '4' : '2') :
- ((reg7b & 0xC0) == 0x00) ? ((reg7b & 0x08) ? '5' : '2') : '?');
- p += sprintf(p, "Interrupt: %s, %s %s, %s\n",
- (reg71 & MRDMODE_BLK_CH0 ) ? "blocked" : "enabled",
- (reg50 & CFR_INTR_CH0 ) ? "pending" : "clear ",
- (reg71 & MRDMODE_BLK_CH1 ) ? "blocked" : "enabled",
- (reg57 & ARTTIM23_INTR_CH1) ? "pending" : "clear ");
-
- return (char *)p;
-}
-
-static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
-{
- char *p = buffer;
- int i;
-
- for (i = 0; i < n_cmd_devs; i++) {
- struct pci_dev *dev = cmd_devs[i];
- p = print_cmd64x_get_info(p, dev, i);
- }
- return p-buffer; /* => must be less than 4k! */
-}
-
-#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
-
static u8 quantize_timing(int timing, int quant)
{
return (timing + quant - 1) / quant;
@@ -173,7 +68,7 @@ static u8 quantize_timing(int timing, int quant)
*/
static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
{
- struct pci_dev *dev = HWIF(drive)->pci_dev;
+ struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
int clock_time = 1000 / system_bus_clock();
u8 cycle_count, active_count, recovery_count, drwtim;
static const u8 recovery_values[] =
@@ -220,7 +115,7 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
{
ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned int cycle_time;
u8 setup_count, arttim = 0;
@@ -285,7 +180,7 @@ static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 unit = drive->dn & 0x01;
u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
@@ -322,8 +217,6 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
case XFER_MW_DMA_0:
program_cycle_times(drive, 480, 215);
break;
- default:
- return;
}
if (speed >= XFER_SW_DMA_0)
@@ -333,13 +226,15 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
static int cmd648_ide_dma_end (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
+ unsigned long base = hwif->dma_base - (hwif->channel * 8);
int err = __ide_dma_end(drive);
u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
MRDMODE_INTR_CH0;
- u8 mrdmode = inb(hwif->dma_master + 0x01);
+ u8 mrdmode = inb(base + 1);
/* clear the interrupt bit */
- outb(mrdmode | irq_mask, hwif->dma_master + 0x01);
+ outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask,
+ base + 1);
return err;
}
@@ -347,7 +242,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive)
static int cmd64x_ide_dma_end (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
int irq_reg = hwif->channel ? ARTTIM23 : CFR;
u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
CFR_INTR_CH0;
@@ -364,10 +259,11 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
+ unsigned long base = hwif->dma_base - (hwif->channel * 8);
u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
MRDMODE_INTR_CH0;
u8 dma_stat = inb(hwif->dma_status);
- u8 mrdmode = inb(hwif->dma_master + 0x01);
+ u8 mrdmode = inb(base + 1);
#ifdef DEBUG
printk("%s: dma_stat: 0x%02x mrdmode: 0x%02x irq_mask: 0x%02x\n",
@@ -386,7 +282,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
int irq_reg = hwif->channel ? ARTTIM23 : CFR;
u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
CFR_INTR_CH0;
@@ -471,22 +367,12 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
mrdmode &= ~0x30;
(void) pci_write_config_byte(dev, MRDMODE, (mrdmode | 0x02));
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
-
- cmd_devs[n_cmd_devs++] = dev;
-
- if (!cmd64x_proc) {
- cmd64x_proc = 1;
- ide_pci_create_host_proc("cmd64x", cmd64x_get_info);
- }
-#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_IDE_PROC_FS */
-
return 0;
}
static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
{
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
switch (dev->device) {
@@ -501,11 +387,13 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
{
- struct pci_dev *dev = hwif->pci_dev;
+ struct pci_dev *dev = to_pci_dev(hwif->dev);
hwif->set_pio_mode = &cmd64x_set_pio_mode;
hwif->set_dma_mode = &cmd64x_set_dma_mode;
+ hwif->cable_detect = ata66_cmd64x;
+
if (!hwif->dma_base)
return;
@@ -524,9 +412,6 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
hwif->ultra_mask = 0x00;
- if (hwif->cbl != ATA_CBL_PATA40_SHORT)
- hwif->cbl = ata66_cmd64x(hwif);
-
switch (dev->device) {
case PCI_DEVICE_ID_CMD_648:
case PCI_DEVICE_ID_CMD_649:
@@ -554,7 +439,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
- .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
+ .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
+ IDE_HFLAG_ABUSE_PREFETCH |
+ IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
.udma_mask = 0x00, /* no udma */
@@ -563,6 +450,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
+ .chipset = ide_cmd646,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
@@ -572,7 +460,6 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
- .chipset = ide_cmd646,
.host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO5,
.mwdma_mask = ATA_MWDMA2,
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 05:55:55 +0000