1 files changed, 71 insertions, 133 deletions

diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
index 28dc1f309ac..3dcb3589084 100644
--- a/drivers/mfd/glamo/glamo-core.c
+++ b/drivers/mfd/glamo/glamo-core.c
@@ -175,119 +175,47 @@ static inline void glamo_vmem_read(struct glamo_core *glamo, u_int16_t *buf,
 /***********************************************************************
  * resources of sibling devices
  ***********************************************************************/
-
-#if 0
-static struct resource glamo_core_resources[] = {
+static struct resource glamo_graphics_resources[] = {
 	{
-		.start	= GLAMO_REGOFS_GENERIC,
-		.end	= GLAMO_REGOFS_GENERIC + 0x400,
-		.flags	= IORESOURCE_MEM,
+		.name	= "glamo-cmdq-regs",
+		.start  = GLAMO_REGOFS_CMDQUEUE,
+		.end    = GLAMO_REGOFS_RISC - 1,
+		.flags  = IORESOURCE_MEM,
 	}, {
-		.start	= 0,
-		.end	= 0,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device glamo_core_dev = {
-	.name		= "glamo-core",
-	.resource	= &glamo_core_resources,
-	.num_resources	= ARRAY_SIZE(glamo_core_resources),
-};
-#endif
-
-static struct resource glamo_jpeg_resources[] = {
-	{
-		.start	= GLAMO_REGOFS_JPEG,
-		.end	= GLAMO_REGOFS_MPEG - 1,
-		.flags	= IORESOURCE_MEM,
+		.name	= "glamo-command-queue",
+		.start  = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ,
+		.end    = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ +
+			  GLAMO_CMDQ_SIZE - 1,
+		.flags  = IORESOURCE_MEM,
 	}, {
-		.start	= IRQ_GLAMO_JPEG,
-		.end	= IRQ_GLAMO_JPEG,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device glamo_jpeg_dev = {
-	.name		= "glamo-jpeg",
-	.resource	= glamo_jpeg_resources,
-	.num_resources	= ARRAY_SIZE(glamo_jpeg_resources),
-};
-
-static struct resource glamo_mpeg_resources[] = {
-	{
-		.start	= GLAMO_REGOFS_MPEG,
-		.end	= GLAMO_REGOFS_LCD - 1,
+		.name	= "glamo-fb-mem",
+		.start	= GLAMO_MEM_BASE + GLAMO_OFFSET_FB,
+		.end	= GLAMO_MEM_BASE + GLAMO_OFFSET_FB +
+			  GLAMO_FB_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	}, {
-		.start	= IRQ_GLAMO_MPEG,
-		.end	= IRQ_GLAMO_MPEG,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device glamo_mpeg_dev = {
-	.name		= "glamo-mpeg",
-	.resource	= glamo_mpeg_resources,
-	.num_resources	= ARRAY_SIZE(glamo_mpeg_resources),
-};
-
-static struct resource glamo_2d_resources[] = {
-	{
-		.start	= GLAMO_REGOFS_2D,
-		.end	= GLAMO_REGOFS_3D - 1,
+		.name	= "glamo-fb-regs",
+		.start	= GLAMO_REGOFS_LCD,
+		.end	= GLAMO_REGOFS_MMC - 1,
 		.flags	= IORESOURCE_MEM,
 	}, {
-		.start	= IRQ_GLAMO_2D,
-		.end	= IRQ_GLAMO_2D,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device glamo_2d_dev = {
-	.name		= "glamo-2d",
-	.resource	= glamo_2d_resources,
-	.num_resources	= ARRAY_SIZE(glamo_2d_resources),
-};
-
-static struct resource glamo_3d_resources[] = {
-	{
-		.start	= GLAMO_REGOFS_3D,
-		.end	= GLAMO_REGOFS_END - 1,
-		.flags	= IORESOURCE_MEM,
-	},
+		.name	= "glamo-2d-regs",
+		.start  = GLAMO_REGOFS_2D,
+		.end    = GLAMO_REGOFS_3D- 1,
+		.flags  = IORESOURCE_MEM,
+	}
 };
 
-static struct platform_device glamo_3d_dev = {
-	.name		= "glamo-3d",
-	.resource	= glamo_3d_resources,
-	.num_resources	= ARRAY_SIZE(glamo_3d_resources),
+static struct platform_device glamo_graphics_dev = {
+	.name           = "glamo-fb",
+	.resource       = glamo_graphics_resources,
+	.num_resources  = ARRAY_SIZE(glamo_graphics_resources),
 };
 
 static struct platform_device glamo_spigpio_dev = {
 	.name		= "glamo-spi-gpio",
 };
 
-static struct resource glamo_fb_resources[] = {
-	/* FIXME: those need to be incremented by parent base */
-	{
-		.name	= "glamo-fb-regs",
-		.start	= GLAMO_REGOFS_LCD,
-		.end	= GLAMO_REGOFS_MMC - 1,
-		.flags	= IORESOURCE_MEM,
-	}, {
-		.name	= "glamo-fb-mem",
-		.start	= GLAMO_OFFSET_FB,
-		.end	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
-		.flags	= IORESOURCE_MEM,
-	},
-};
-
-static struct platform_device glamo_fb_dev = {
-	.name		= "glamo-fb",
-	.resource	= glamo_fb_resources,
-	.num_resources	= ARRAY_SIZE(glamo_fb_resources),
-};
 
 static struct resource glamo_mmc_resources[] = {
 	{
@@ -300,9 +228,9 @@ static struct resource glamo_mmc_resources[] = {
 		.end	= IRQ_GLAMO_MMC,
 		.flags	= IORESOURCE_IRQ,
 	}, { /* our data buffer for MMC transfers */
-		.start	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
-		.end	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
-				  GLAMO_MMC_BUFFER_SIZE - 1,
+		.start	= GLAMO_MEM_BASE + GLAMO_OFFSET_MMC,
+		.end	= GLAMO_MEM_BASE + GLAMO_OFFSET_MMC +
+			  GLAMO_MMC_BUFFER_SIZE - 1,
 		.flags	= IORESOURCE_MEM
 	},
 };
@@ -426,6 +354,24 @@ static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
 }
 
 
+void glamo_clear_irq(struct glamo_core *glamo, unsigned int irq)
+{
+	/* set interrupt source */
+	__reg_write(glamo, GLAMO_REG_IRQ_CLEAR, irq);
+}
+
+
+void glamo_enable_irq(struct glamo_core *glamo, unsigned int irq)
+{
+	u_int16_t tmp;
+
+	/* set bit in enable register */
+	tmp = __reg_read(glamo, GLAMO_REG_IRQ_ENABLE);
+	tmp |= irq;
+	__reg_write(glamo, GLAMO_REG_IRQ_ENABLE, tmp);
+}
+
+
 static ssize_t regs_write(struct device *dev, struct device_attribute *attr,
 			   const char *buf, size_t count)
 {
@@ -538,6 +484,8 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
 		__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
 				   GLAMO_HOSTBUS2_MMIO_EN_2D,
 				   GLAMO_HOSTBUS2_MMIO_EN_2D);
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+				   GLAMO_CLOCK_GEN51_EN_DIV_GCLK, 0xffff);
 		break;
 	case GLAMO_ENGINE_CMDQ:
 		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
@@ -545,6 +493,8 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
 		__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
 				   GLAMO_HOSTBUS2_MMIO_EN_CQ,
 				   GLAMO_HOSTBUS2_MMIO_EN_CQ);
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+				   GLAMO_CLOCK_GEN51_EN_DIV_MCLK, 0xffff);
 		break;
 	/* FIXME: Implementation */
 	default:
@@ -675,6 +625,11 @@ struct glamo_script reset_regs[] = {
 	[GLAMO_ENGINE_JPEG] = {
 		GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET
 	},
+	/* The following is defined as "Reset command queue", nothing to do
+	 * with the 2D engine. */
+	[GLAMO_ENGINE_CMDQ] = {
+		GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_CQ_RESET
+	},
 };
 
 void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine)
@@ -983,7 +938,7 @@ static void glamo_power(struct glamo_core *glamo,
 {
 	int n;
 	unsigned long flags;
-	
+
 	spin_lock_irqsave(&glamo->lock, flags);
 
 	dev_info(&glamo->pdev->dev, "***** glamo_power -> %d\n", new_state);
@@ -1308,52 +1263,33 @@ static int __init glamo_probe(struct platform_device *pdev)
 					glamo->pdata->glamo_irq_is_wired;
 
 	/* start creating the siblings */
-
-	glamo_2d_dev.dev.parent = &pdev->dev;
-	mangle_mem_resources(glamo_2d_dev.resource,
-			     glamo_2d_dev.num_resources, glamo->mem);
-	platform_device_register(&glamo_2d_dev);
-
-	glamo_3d_dev.dev.parent = &pdev->dev;
-	mangle_mem_resources(glamo_3d_dev.resource,
-			     glamo_3d_dev.num_resources, glamo->mem);
-	platform_device_register(&glamo_3d_dev);
-
-	glamo_jpeg_dev.dev.parent = &pdev->dev;
-	mangle_mem_resources(glamo_jpeg_dev.resource,
-			     glamo_jpeg_dev.num_resources, glamo->mem);
-	platform_device_register(&glamo_jpeg_dev);
-
-	glamo_mpeg_dev.dev.parent = &pdev->dev;
-	mangle_mem_resources(glamo_mpeg_dev.resource,
-			     glamo_mpeg_dev.num_resources, glamo->mem);
-	platform_device_register(&glamo_mpeg_dev);
-
 	glamo->pdata->glamo = glamo;
-	glamo_fb_dev.dev.parent = &pdev->dev;
-	glamo_fb_dev.dev.platform_data = glamo->pdata;
-	mangle_mem_resources(glamo_fb_dev.resource,
-			     glamo_fb_dev.num_resources, glamo->mem);
-	platform_device_register(&glamo_fb_dev);
 
+	/* Command queue device (for DRM) */
+	glamo_graphics_dev.dev.parent = &pdev->dev;
+	glamo_graphics_dev.dev.platform_data = glamo->pdata;
+	mangle_mem_resources(glamo_graphics_dev.resource,
+			     glamo_graphics_dev.num_resources, glamo->mem);
+	platform_device_register(&glamo_graphics_dev);
+
+	/* GPIO */
 	glamo->pdata->spigpio_info->glamo = glamo;
 	glamo_spigpio_dev.dev.parent = &pdev->dev;
 	glamo_spigpio_dev.dev.platform_data = glamo->pdata->spigpio_info;
 	platform_device_register(&glamo_spigpio_dev);
 
+	/* MMC */
 	glamo_mmc_dev = glamo->pdata->mmc_dev;
 	glamo_mmc_dev->name = "glamo-mci";
 	glamo_mmc_dev->dev.parent = &pdev->dev;
 	glamo_mmc_dev->resource = glamo_mmc_resources;
-	glamo_mmc_dev->num_resources = ARRAY_SIZE(glamo_mmc_resources); 
-
-	/* we need it later to give to the engine enable and disable */
+	glamo_mmc_dev->num_resources = ARRAY_SIZE(glamo_mmc_resources);
 	glamo_mci_def_pdata.pglamo = glamo;
 	mangle_mem_resources(glamo_mmc_dev->resource,
 			     glamo_mmc_dev->num_resources, glamo->mem);
 	platform_device_register(glamo_mmc_dev);
 
-	/* only request the generic, hostbus and memory controller MMIO */
+	/* Only request the generic, hostbus and memory controller MMIO */
 	glamo->mem = request_mem_region(glamo->mem->start,
 					GLAMO_REGOFS_VIDCAP, "glamo-core");
 	if (!glamo->mem) {
@@ -1395,8 +1331,10 @@ static int glamo_remove(struct platform_device *pdev)
 	}
 
 	platform_set_drvdata(pdev, NULL);
-	platform_device_unregister(&glamo_fb_dev);
 	platform_device_unregister(glamo->pdata->mmc_dev);
+	/* FIXME: Don't we need to unregister these as well?
+	 * platform_device_unregister(glamo->pdata->graphics_dev);
+	 * platform_device_unregister(glamo->pdata->gpio_dev); */
 	iounmap(glamo->base);
 	release_mem_region(glamo->mem->start, GLAMO_REGOFS_VIDCAP);
 	glamo_handle = NULL;