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-rw-r--r--drivers/net/wireless/Kconfig140
-rw-r--r--drivers/net/wireless/Makefile10
-rw-r--r--drivers/net/wireless/arlan-main.c1887
-rw-r--r--drivers/net/wireless/arlan-proc.c1253
-rw-r--r--drivers/net/wireless/arlan.h539
-rw-r--r--drivers/net/wireless/ath/Kconfig1
-rw-r--r--drivers/net/wireless/ath/ar9170/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ath5k/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ath9k/ahb.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c669
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h22
-rw-r--r--drivers/net/wireless/ath/ath9k/initvals.h29
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c58
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.c1100
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.h40
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h3
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c3
-rw-r--r--drivers/net/wireless/b43/Kconfig2
-rw-r--r--drivers/net/wireless/b43/b43.h2
-rw-r--r--drivers/net/wireless/b43/main.c2
-rw-r--r--drivers/net/wireless/b43/phy_lp.c783
-rw-r--r--drivers/net/wireless/b43/phy_lp.h11
-rw-r--r--drivers/net/wireless/b43/xmit.c1
-rw-r--r--drivers/net/wireless/b43legacy/Kconfig2
-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h2
-rw-r--r--drivers/net/wireless/b43legacy/dma.c17
-rw-r--r--drivers/net/wireless/b43legacy/main.c2
-rw-r--r--drivers/net/wireless/b43legacy/xmit.c1
-rw-r--r--drivers/net/wireless/hostap/Kconfig1
-rw-r--r--drivers/net/wireless/i82586.h413
-rw-r--r--drivers/net/wireless/i82593.h229
-rw-r--r--drivers/net/wireless/ipw2x00/Kconfig6
-rw-r--r--drivers/net/wireless/iwlwifi/Kconfig2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-rs.c102
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h35
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c25
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c143
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-calib.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h161
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c236
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c11
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c69
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c15
-rw-r--r--drivers/net/wireless/iwmc3200wifi/Kconfig2
-rw-r--r--drivers/net/wireless/libertas/Kconfig2
-rw-r--r--drivers/net/wireless/libertas/if_spi.c136
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c67
-rw-r--r--drivers/net/wireless/mwl8k.c1258
-rw-r--r--drivers/net/wireless/netwave_cs.c1389
-rw-r--r--drivers/net/wireless/orinoco/Kconfig2
-rw-r--r--drivers/net/wireless/p54/Kconfig2
-rw-r--r--drivers/net/wireless/p54/eeprom.c31
-rw-r--r--drivers/net/wireless/rt2x00/Kconfig18
-rw-r--r--drivers/net/wireless/rt2x00/Makefile1
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h1816
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c1817
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.h134
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c1908
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.h1780
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c1828
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.h1818
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h43
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00leds.h4
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.h24
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.h17
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187.h1
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_dev.c13
-rw-r--r--drivers/net/wireless/strip.c2822
-rw-r--r--drivers/net/wireless/wavelan.c4383
-rw-r--r--drivers/net/wireless/wavelan.h370
-rw-r--r--drivers/net/wireless/wavelan.p.h696
-rw-r--r--drivers/net/wireless/wavelan_cs.c4635
-rw-r--r--drivers/net/wireless/wavelan_cs.h386
-rw-r--r--drivers/net/wireless/wavelan_cs.p.h766
-rw-r--r--drivers/net/wireless/wl12xx/Kconfig3
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_main.c3
-rw-r--r--drivers/net/wireless/wl12xx/wl1271.h3
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_acx.c2
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_boot.c5
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.c99
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.h3
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_conf.h8
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.c53
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.h7
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_init.c7
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_main.c19
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_rx.c2
-rw-r--r--drivers/net/wireless/zd1211rw/Kconfig2
104 files changed, 7596 insertions, 28910 deletions
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 85f8bf4112c..56dd6650c97 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -16,118 +16,9 @@ menuconfig WLAN
if WLAN
-menuconfig WLAN_PRE80211
- bool "Wireless LAN (pre-802.11)"
- depends on NETDEVICES
- ---help---
- Say Y if you have any pre-802.11 wireless LAN hardware.
-
- This option does not affect the kernel build, it only
- lets you choose drivers.
-
-config STRIP
- tristate "STRIP (Metricom starmode radio IP)"
- depends on INET && WLAN_PRE80211
- select WIRELESS_EXT
- ---help---
- Say Y if you have a Metricom radio and intend to use Starmode Radio
- IP. STRIP is a radio protocol developed for the MosquitoNet project
- to send Internet traffic using Metricom radios. Metricom radios are
- small, battery powered, 100kbit/sec packet radio transceivers, about
- the size and weight of a cellular telephone. (You may also have heard
- them called "Metricom modems" but we avoid the term "modem" because
- it misleads many people into thinking that you can plug a Metricom
- modem into a phone line and use it as a modem.)
-
- You can use STRIP on any Linux machine with a serial port, although
- it is obviously most useful for people with laptop computers. If you
- think you might get a Metricom radio in the future, there is no harm
- in saying Y to STRIP now, except that it makes the kernel a bit
- bigger.
-
- To compile this as a module, choose M here: the module will be
- called strip.
-
-config ARLAN
- tristate "Aironet Arlan 655 & IC2200 DS support"
- depends on ISA && !64BIT && WLAN_PRE80211
- select WIRELESS_EXT
- ---help---
- Aironet makes Arlan, a class of wireless LAN adapters. These use the
- www.Telxon.com chip, which is also used on several similar cards.
- This driver is tested on the 655 and IC2200 series cards. Look at
- <http://www.ylenurme.ee/~elmer/655/> for the latest information.
-
- The driver is built as two modules, arlan and arlan-proc. The latter
- is the /proc interface and is not needed most of time.
-
- On some computers the card ends up in non-valid state after some
- time. Use a ping-reset script to clear it.
-
-config WAVELAN
- tristate "AT&T/Lucent old WaveLAN & DEC RoamAbout DS ISA support"
- depends on ISA && WLAN_PRE80211
- select WIRELESS_EXT
- select WEXT_SPY
- select WEXT_PRIV
- ---help---
- The Lucent WaveLAN (formerly NCR and AT&T; or DEC RoamAbout DS) is
- a Radio LAN (wireless Ethernet-like Local Area Network) using the
- radio frequencies 900 MHz and 2.4 GHz.
-
- If you want to use an ISA WaveLAN card under Linux, say Y and read
- the Ethernet-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. Some more specific
- information is contained in
- <file:Documentation/networking/wavelan.txt> and in the source code
- <file:drivers/net/wireless/wavelan.p.h>.
-
- You will also need the wireless tools package available from
- <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
- Please read the man pages contained therein.
-
- To compile this driver as a module, choose M here: the module will be
- called wavelan.
-
-config PCMCIA_WAVELAN
- tristate "AT&T/Lucent old WaveLAN Pcmcia wireless support"
- depends on PCMCIA && WLAN_PRE80211
- select WIRELESS_EXT
- select WEXT_SPY
- select WEXT_PRIV
- help
- Say Y here if you intend to attach an AT&T/Lucent Wavelan PCMCIA
- (PC-card) wireless Ethernet networking card to your computer. This
- driver is for the non-IEEE-802.11 Wavelan cards.
-
- To compile this driver as a module, choose M here: the module will be
- called wavelan_cs. If unsure, say N.
-
-config PCMCIA_NETWAVE
- tristate "Xircom Netwave AirSurfer Pcmcia wireless support"
- depends on PCMCIA && WLAN_PRE80211
- select WIRELESS_EXT
- select WEXT_PRIV
- help
- Say Y here if you intend to attach this type of PCMCIA (PC-card)
- wireless Ethernet networking card to your computer.
-
- To compile this driver as a module, choose M here: the module will be
- called netwave_cs. If unsure, say N.
-
-
-menuconfig WLAN_80211
- bool "Wireless LAN (IEEE 802.11)"
- depends on NETDEVICES
- ---help---
- Say Y if you have any 802.11 wireless LAN hardware.
-
- This option does not affect the kernel build, it only
- lets you choose drivers.
-
config PCMCIA_RAYCS
tristate "Aviator/Raytheon 2.4GHz wireless support"
- depends on PCMCIA && WLAN_80211
+ depends on PCMCIA
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
@@ -142,7 +33,7 @@ config PCMCIA_RAYCS
config LIBERTAS_THINFIRM
tristate "Marvell 8xxx Libertas WLAN driver support with thin firmware"
- depends on WLAN_80211 && MAC80211
+ depends on MAC80211
select FW_LOADER
---help---
A library for Marvell Libertas 8xxx devices using thinfirm.
@@ -155,7 +46,7 @@ config LIBERTAS_THINFIRM_USB
config AIRO
tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards"
- depends on ISA_DMA_API && WLAN_80211 && (PCI || BROKEN)
+ depends on ISA_DMA_API && (PCI || BROKEN)
select WIRELESS_EXT
select CRYPTO
select WEXT_SPY
@@ -175,7 +66,7 @@ config AIRO
config ATMEL
tristate "Atmel at76c50x chipset 802.11b support"
- depends on (PCI || PCMCIA) && WLAN_80211
+ depends on (PCI || PCMCIA)
select WIRELESS_EXT
select WEXT_PRIV
select FW_LOADER
@@ -210,7 +101,7 @@ config PCMCIA_ATMEL
config AT76C50X_USB
tristate "Atmel at76c503/at76c505/at76c505a USB cards"
- depends on MAC80211 && WLAN_80211 && USB
+ depends on MAC80211 && USB
select FW_LOADER
---help---
Enable support for USB Wireless devices using Atmel at76c503,
@@ -218,8 +109,9 @@ config AT76C50X_USB
config AIRO_CS
tristate "Cisco/Aironet 34X/35X/4500/4800 PCMCIA cards"
- depends on PCMCIA && (BROKEN || !M32R) && WLAN_80211
+ depends on PCMCIA && (BROKEN || !M32R)
select WIRELESS_EXT
+ select WEXT_SPY
select CRYPTO
select CRYPTO_AES
---help---
@@ -238,7 +130,7 @@ config AIRO_CS
config PCMCIA_WL3501
tristate "Planet WL3501 PCMCIA cards"
- depends on EXPERIMENTAL && PCMCIA && WLAN_80211
+ depends on EXPERIMENTAL && PCMCIA
select WIRELESS_EXT
select WEXT_SPY
help
@@ -248,7 +140,7 @@ config PCMCIA_WL3501
config PRISM54
tristate 'Intersil Prism GT/Duette/Indigo PCI/Cardbus (DEPRECATED)'
- depends on PCI && EXPERIMENTAL && WLAN_80211
+ depends on PCI && EXPERIMENTAL
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
@@ -272,7 +164,7 @@ config PRISM54
config USB_ZD1201
tristate "USB ZD1201 based Wireless device support"
- depends on USB && WLAN_80211
+ depends on USB
select WIRELESS_EXT
select WEXT_PRIV
select FW_LOADER
@@ -291,7 +183,7 @@ config USB_ZD1201
config USB_NET_RNDIS_WLAN
tristate "Wireless RNDIS USB support"
- depends on USB && WLAN_80211 && EXPERIMENTAL
+ depends on USB && EXPERIMENTAL
depends on CFG80211
select USB_USBNET
select USB_NET_CDCETHER
@@ -319,7 +211,7 @@ config USB_NET_RNDIS_WLAN
config RTL8180
tristate "Realtek 8180/8185 PCI support"
- depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL
+ depends on MAC80211 && PCI && EXPERIMENTAL
select EEPROM_93CX6
---help---
This is a driver for RTL8180 and RTL8185 based cards.
@@ -375,7 +267,7 @@ config RTL8180
config RTL8187
tristate "Realtek 8187 and 8187B USB support"
- depends on MAC80211 && USB && WLAN_80211
+ depends on MAC80211 && USB
select EEPROM_93CX6
---help---
This is a driver for RTL8187 and RTL8187B based cards.
@@ -404,7 +296,7 @@ config RTL8187_LEDS
config ADM8211
tristate "ADMtek ADM8211 support"
- depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL
+ depends on MAC80211 && PCI && EXPERIMENTAL
select CRC32
select EEPROM_93CX6
---help---
@@ -431,7 +323,7 @@ config ADM8211
config MAC80211_HWSIM
tristate "Simulated radio testing tool for mac80211"
- depends on MAC80211 && WLAN_80211
+ depends on MAC80211
---help---
This driver is a developer testing tool that can be used to test
IEEE 802.11 networking stack (mac80211) functionality. This is not
@@ -444,7 +336,7 @@ config MAC80211_HWSIM
config MWL8K
tristate "Marvell 88W8xxx PCI/PCIe Wireless support"
- depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL
+ depends on MAC80211 && PCI && EXPERIMENTAL
---help---
This driver supports Marvell TOPDOG 802.11 wireless cards.
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 7a4647e78fd..5d4ce4d2b32 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -5,16 +5,6 @@
obj-$(CONFIG_IPW2100) += ipw2x00/
obj-$(CONFIG_IPW2200) += ipw2x00/
-obj-$(CONFIG_STRIP) += strip.o
-obj-$(CONFIG_ARLAN) += arlan.o
-
-arlan-objs := arlan-main.o arlan-proc.o
-
-# Obsolete cards
-obj-$(CONFIG_WAVELAN) += wavelan.o
-obj-$(CONFIG_PCMCIA_NETWAVE) += netwave_cs.o
-obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan_cs.o
-
obj-$(CONFIG_HERMES) += orinoco/
obj-$(CONFIG_AIRO) += airo.o
diff --git a/drivers/net/wireless/arlan-main.c b/drivers/net/wireless/arlan-main.c
deleted file mode 100644
index 921a082487a..00000000000
--- a/drivers/net/wireless/arlan-main.c
+++ /dev/null
@@ -1,1887 +0,0 @@
-/*
- * Copyright (C) 1997 Cullen Jennings
- * Copyright (C) 1998 Elmer Joandiu, elmer@ylenurme.ee
- * GNU General Public License applies
- * This module provides support for the Arlan 655 card made by Aironet
- */
-
-#include "arlan.h"
-
-#if BITS_PER_LONG != 32
-# error FIXME: this driver requires a 32-bit platform
-#endif
-
-static const char *arlan_version = "C.Jennigs 97 & Elmer.Joandi@ut.ee Oct'98, http://www.ylenurme.ee/~elmer/655/";
-
-struct net_device *arlan_device[MAX_ARLANS];
-
-static int SID = SIDUNKNOWN;
-static int radioNodeId = radioNodeIdUNKNOWN;
-static char encryptionKey[12] = {'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h'};
-int arlan_debug = debugUNKNOWN;
-static int spreadingCode = spreadingCodeUNKNOWN;
-static int channelNumber = channelNumberUNKNOWN;
-static int channelSet = channelSetUNKNOWN;
-static int systemId = systemIdUNKNOWN;
-static int registrationMode = registrationModeUNKNOWN;
-static int keyStart;
-static int tx_delay_ms;
-static int retries = 5;
-static int tx_queue_len = 1;
-static int arlan_EEPROM_bad;
-
-#ifdef ARLAN_DEBUGGING
-
-static int testMemory = testMemoryUNKNOWN;
-static int irq = irqUNKNOWN;
-static int txScrambled = 1;
-static int mdebug;
-
-module_param(irq, int, 0);
-module_param(mdebug, int, 0);
-module_param(testMemory, int, 0);
-module_param(txScrambled, int, 0);
-MODULE_PARM_DESC(irq, "(unused)");
-MODULE_PARM_DESC(testMemory, "(unused)");
-MODULE_PARM_DESC(mdebug, "Arlan multicast debugging (0-1)");
-#endif
-
-module_param_named(debug, arlan_debug, int, 0);
-module_param(spreadingCode, int, 0);
-module_param(channelNumber, int, 0);
-module_param(channelSet, int, 0);
-module_param(systemId, int, 0);
-module_param(registrationMode, int, 0);
-module_param(radioNodeId, int, 0);
-module_param(SID, int, 0);
-module_param(keyStart, int, 0);
-module_param(tx_delay_ms, int, 0);
-module_param(retries, int, 0);
-module_param(tx_queue_len, int, 0);
-module_param_named(EEPROM_bad, arlan_EEPROM_bad, int, 0);
-MODULE_PARM_DESC(debug, "Arlan debug enable (0-1)");
-MODULE_PARM_DESC(retries, "Arlan maximum packet retransmisions");
-#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
-static int arlan_entry_debug;
-static int arlan_exit_debug;
-static int arlan_entry_and_exit_debug;
-module_param_named(entry_debug, arlan_entry_debug, int, 0);
-module_param_named(exit_debug, arlan_exit_debug, int, 0);
-module_param_named(entry_and_exit_debug, arlan_entry_and_exit_debug, int, 0);
-MODULE_PARM_DESC(entry_debug, "Arlan driver function entry debugging");
-MODULE_PARM_DESC(exit_debug, "Arlan driver function exit debugging");
-MODULE_PARM_DESC(entry_and_exit_debug, "Arlan driver function entry and exit debugging");
-#endif
-
-struct arlan_conf_stru arlan_conf[MAX_ARLANS];
-static int arlans_found;
-
-static int arlan_open(struct net_device *dev);
-static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev);
-static irqreturn_t arlan_interrupt(int irq, void *dev_id);
-static int arlan_close(struct net_device *dev);
-static struct net_device_stats *
- arlan_statistics (struct net_device *dev);
-static void arlan_set_multicast (struct net_device *dev);
-static int arlan_hw_tx (struct net_device* dev, char *buf, int length );
-static int arlan_hw_config (struct net_device * dev);
-static void arlan_tx_done_interrupt (struct net_device * dev, int status);
-static void arlan_rx_interrupt (struct net_device * dev, u_char rxStatus, u_short, u_short);
-static void arlan_process_interrupt (struct net_device * dev);
-static void arlan_tx_timeout (struct net_device *dev);
-
-static inline long us2ticks(int us)
-{
- return us * (1000000 / HZ);
-}
-
-
-#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
-#define ARLAN_DEBUG_ENTRY(name) \
- {\
- struct timeval timev;\
- do_gettimeofday(&timev);\
- if (arlan_entry_debug || arlan_entry_and_exit_debug)\
- printk("--->>>" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec));\
- }
-#define ARLAN_DEBUG_EXIT(name) \
- {\
- struct timeval timev;\
- do_gettimeofday(&timev);\
- if (arlan_exit_debug || arlan_entry_and_exit_debug)\
- printk("<<<---" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec) );\
- }
-#else
-#define ARLAN_DEBUG_ENTRY(name)
-#define ARLAN_DEBUG_EXIT(name)
-#endif
-
-
-#define arlan_interrupt_ack(dev)\
- clearClearInterrupt(dev);\
- setClearInterrupt(dev);
-
-static inline int arlan_drop_tx(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- dev->stats.tx_errors++;
- if (priv->Conf->tx_delay_ms)
- {
- priv->tx_done_delayed = jiffies + priv->Conf->tx_delay_ms * HZ / 1000 + 1;
- }
- else
- {
- priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
- TXHEAD(dev).offset = 0;
- TXTAIL(dev).offset = 0;
- priv->txLast = 0;
- priv->bad = 0;
- if (!priv->under_reset && !priv->under_config)
- netif_wake_queue (dev);
- }
- return 1;
-}
-
-
-int arlan_command(struct net_device *dev, int command_p)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
- int udelayed = 0;
- int i = 0;
- unsigned long flags;
-
- ARLAN_DEBUG_ENTRY("arlan_command");
-
- if (priv->card_polling_interval)
- priv->card_polling_interval = 1;
-
- if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
- printk(KERN_DEBUG "arlan_command, %lx commandByte %x waiting %lx incoming %x \n",
- jiffies, READSHMB(arlan->commandByte),
- priv->waiting_command_mask, command_p);
-
- priv->waiting_command_mask |= command_p;
-
- if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
- if (time_after(jiffies, priv->lastReset + 5 * HZ))
- priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
-
- if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ACK)
- {
- arlan_interrupt_ack(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ACK;
- }
- if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ENABLE)
- {
- setInterruptEnable(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ENABLE;
- }
-
- /* Card access serializing lock */
- spin_lock_irqsave(&priv->lock, flags);
-
- /* Check cards status and waiting */
-
- if (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
- {
- while (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
- {
- if (READSHMB(arlan->resetFlag) ||
- READSHMB(arlan->commandByte)) /* ||
- (readControlRegister(dev) & ARLAN_ACCESS))
- */
- udelay(40);
- else
- priv->waiting_command_mask &= ~(ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW);
-
- udelayed++;
-
- if (priv->waiting_command_mask & ARLAN_COMMAND_LONG_WAIT_NOW)
- {
- if (udelayed * 40 > 1000000)
- {
- printk(KERN_ERR "%s long wait too long \n", dev->name);
- priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
- break;
- }
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_WAIT_NOW)
- {
- if (udelayed * 40 > 1000)
- {
- printk(KERN_ERR "%s short wait too long \n", dev->name);
- goto bad_end;
- }
- }
- }
- }
- else
- {
- i = 0;
- while ((READSHMB(arlan->resetFlag) ||
- READSHMB(arlan->commandByte)) &&
- conf->pre_Command_Wait > (i++) * 10)
- udelay(10);
-
-
- if ((READSHMB(arlan->resetFlag) ||
- READSHMB(arlan->commandByte)) &&
- !(priv->waiting_command_mask & ARLAN_COMMAND_RESET))
- {
- goto card_busy_end;
- }
- }
- if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
- priv->under_reset = 1;
- if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
- priv->under_config = 1;
-
- /* Issuing command */
- arlan_lock_card_access(dev);
- if (priv->waiting_command_mask & ARLAN_COMMAND_POWERUP)
- {
- // if (readControlRegister(dev) & (ARLAN_ACCESS && ARLAN_POWER))
- setPowerOn(dev);
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERUP;
- priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
- priv->card_polling_interval = HZ / 10;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_ACTIVATE)
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_ACTIVATE);
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_ACTIVATE;
- priv->card_polling_interval = HZ / 10;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_RX_ABORT)
- {
- if (priv->rx_command_given)
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_RX_ABORT);
- arlan_interrupt_lancpu(dev);
- priv->rx_command_given = 0;
- }
- priv->waiting_command_mask &= ~ARLAN_COMMAND_RX_ABORT;
- priv->card_polling_interval = 1;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_TX_ABORT)
- {
- if (priv->tx_command_given)
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ABORT);
- arlan_interrupt_lancpu(dev);
- priv->tx_command_given = 0;
- }
- priv->waiting_command_mask &= ~ARLAN_COMMAND_TX_ABORT;
- priv->card_polling_interval = 1;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
- {
- priv->under_reset=1;
- netif_stop_queue (dev);
-
- arlan_drop_tx(dev);
- if (priv->tx_command_given || priv->rx_command_given)
- {
- printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
- }
- netif_stop_queue (dev);
- if (arlan_debug & ARLAN_DEBUG_RESET)
- printk(KERN_ERR "%s: Doing chip reset\n", dev->name);
- priv->lastReset = jiffies;
- WRITESHM(arlan->commandByte, 0, u_char);
- /* hold card in reset state */
- setHardwareReset(dev);
- /* set reset flag and then release reset */
- WRITESHM(arlan->resetFlag, 0xff, u_char);
- clearChannelAttention(dev);
- clearHardwareReset(dev);
- priv->card_polling_interval = HZ / 4;
- priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
- priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
-// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RENABLE;
-// priv->waiting_command_mask |= ARLAN_COMMAND_RX;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RACK)
- {
- clearHardwareReset(dev);
- clearClearInterrupt(dev);
- setClearInterrupt(dev);
- setInterruptEnable(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RACK;
- priv->waiting_command_mask |= ARLAN_COMMAND_CONF;
- priv->under_config = 1;
- priv->under_reset = 0;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RENABLE)
- {
- setInterruptEnable(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RENABLE;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
- {
- if (priv->tx_command_given || priv->rx_command_given)
- {
- printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
- }
- arlan_drop_tx(dev);
- setInterruptEnable(dev);
- arlan_hw_config(dev);
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF;
- priv->card_polling_interval = HZ / 10;
-// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
-// priv->waiting_command_mask |= ARLAN_COMMAND_INT_ENABLE;
- priv->waiting_command_mask |= ARLAN_COMMAND_CONF_WAIT;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF_WAIT)
- {
- if (READSHMB(arlan->configuredStatusFlag) != 0 &&
- READSHMB(arlan->diagnosticInfo) == 0xff)
- {
- priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF_WAIT;
- priv->waiting_command_mask |= ARLAN_COMMAND_RX;
- priv->waiting_command_mask |= ARLAN_COMMAND_TBUSY_CLEAR;
- priv->card_polling_interval = HZ / 10;
- priv->tx_command_given = 0;
- priv->under_config = 0;
- }
- else
- {
- priv->card_polling_interval = 1;
- if (arlan_debug & ARLAN_DEBUG_TIMING)
- printk(KERN_ERR "configure delayed \n");
- }
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_RX)
- {
- if (!registrationBad(dev))
- {
- setInterruptEnable(dev);
- memset_io(arlan->commandParameter, 0, 0xf);
- WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_RX_ENABLE);
- WRITESHMB(arlan->commandParameter[0], conf->rxParameter);
- arlan_interrupt_lancpu(dev);
- priv->rx_command_given = 0; // mnjah, bad
- priv->waiting_command_mask &= ~ARLAN_COMMAND_RX;
- priv->card_polling_interval = 1;
- }
- else
- priv->card_polling_interval = 2;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_TBUSY_CLEAR)
- {
- if ( !registrationBad(dev) &&
- (netif_queue_stopped(dev) || !netif_running(dev)) )
- {
- priv->waiting_command_mask &= ~ARLAN_COMMAND_TBUSY_CLEAR;
- netif_wake_queue (dev);
- }
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_TX)
- {
- if (!test_and_set_bit(0, (void *) &priv->tx_command_given))
- {
- if (time_after(jiffies,
- priv->tx_last_sent + us2ticks(conf->rx_tweak1))
- || time_before(jiffies,
- priv->last_rx_int_ack_time + us2ticks(conf->rx_tweak2)))
- {
- setInterruptEnable(dev);
- memset_io(arlan->commandParameter, 0, 0xf);
- WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ENABLE | ARLAN_COM_INT);
- memcpy_toio(arlan->commandParameter, &TXLAST(dev), 14);
-// for ( i=1 ; i < 15 ; i++) printk("%02x:",READSHMB(arlan->commandParameter[i]));
- priv->tx_last_sent = jiffies;
- arlan_interrupt_lancpu(dev);
- priv->tx_command_given = 1;
- priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
- priv->card_polling_interval = 1;
- }
- else
- {
- priv->tx_command_given = 0;
- priv->card_polling_interval = 1;
- }
- }
- else if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
- printk(KERN_ERR "tx command when tx chain locked \n");
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOPINT)
- {
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_NOP | ARLAN_COM_INT);
- }
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOPINT;
- priv->card_polling_interval = HZ / 3;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOP)
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_NOP);
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOP;
- priv->card_polling_interval = HZ / 3;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_SLOW_POLL)
- {
- WRITESHMB(arlan->commandByte, ARLAN_COM_GOTO_SLOW_POLL);
- arlan_interrupt_lancpu(dev);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_SLOW_POLL;
- priv->card_polling_interval = HZ / 3;
- }
- else if (priv->waiting_command_mask & ARLAN_COMMAND_POWERDOWN)
- {
- setPowerOff(dev);
- if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
- printk(KERN_WARNING "%s: Arlan Going Standby\n", dev->name);
- priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERDOWN;
- priv->card_polling_interval = 3 * HZ;
- }
- arlan_unlock_card_access(dev);
- for (i = 0; READSHMB(arlan->commandByte) && i < 20; i++)
- udelay(10);
- if (READSHMB(arlan->commandByte))
- if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
- printk(KERN_ERR "card busy leaving command %lx\n", priv->waiting_command_mask);
-
- spin_unlock_irqrestore(&priv->lock, flags);
- ARLAN_DEBUG_EXIT("arlan_command");
- priv->last_command_buff_free_time = jiffies;
- return 0;
-
-card_busy_end:
- if (time_after(jiffies, priv->last_command_buff_free_time + HZ))
- priv->waiting_command_mask |= ARLAN_COMMAND_CLEAN_AND_RESET;
-
- if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
- printk(KERN_ERR "%s arlan_command card busy end \n", dev->name);
- spin_unlock_irqrestore(&priv->lock, flags);
- ARLAN_DEBUG_EXIT("arlan_command");
- return 1;
-
-bad_end:
- printk(KERN_ERR "%s arlan_command bad end \n", dev->name);
-
- spin_unlock_irqrestore(&priv->lock, flags);
- ARLAN_DEBUG_EXIT("arlan_command");
-
- return -1;
-}
-
-static inline void arlan_command_process(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- int times = 0;
- while (priv->waiting_command_mask && times < 8)
- {
- if (priv->waiting_command_mask)
- {
- if (arlan_command(dev, 0))
- break;
- times++;
- }
- /* if long command, we won't repeat trying */ ;
- if (priv->card_polling_interval > 1)
- break;
- times++;
- }
-}
-
-
-static inline void arlan_retransmit_now(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
-
- ARLAN_DEBUG_ENTRY("arlan_retransmit_now");
- if (TXLAST(dev).offset == 0)
- {
- if (TXHEAD(dev).offset)
- {
- priv->txLast = 0;
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to head \n");
-
- }
- else if (TXTAIL(dev).offset)
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to tail \n");
- priv->txLast = 1;
- }
- else
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "ReTransmit buff empty");
- netif_wake_queue (dev);
- return;
-
- }
- arlan_command(dev, ARLAN_COMMAND_TX);
-
- priv->Conf->driverRetransmissions++;
- priv->retransmissions++;
-
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("Retransmit %d bytes \n", TXLAST(dev).length);
-
- ARLAN_DEBUG_EXIT("arlan_retransmit_now");
-}
-
-
-
-static void arlan_registration_timer(unsigned long data)
-{
- struct net_device *dev = (struct net_device *) data;
- struct arlan_private *priv = netdev_priv(dev);
- int bh_mark_needed = 0;
- int next_tick = 1;
- long lostTime = ((long)jiffies - (long)priv->registrationLastSeen)
- * (1000/HZ);
-
- if (registrationBad(dev))
- {
- priv->registrationLostCount++;
- if (lostTime > 7000 && lostTime < 7200)
- {
- printk(KERN_NOTICE "%s registration Lost \n", dev->name);
- }
- if (lostTime / priv->reRegisterExp > 2000)
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
- if (lostTime / (priv->reRegisterExp) > 3500)
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
- if (priv->reRegisterExp < 400)
- priv->reRegisterExp += 2;
- if (lostTime > 7200)
- {
- next_tick = HZ;
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
- }
- }
- else
- {
- if (priv->Conf->registrationMode && lostTime > 10000 &&
- priv->registrationLostCount)
- {
- printk(KERN_NOTICE "%s registration is back after %ld milliseconds\n",
- dev->name, lostTime);
- }
- priv->registrationLastSeen = jiffies;
- priv->registrationLostCount = 0;
- priv->reRegisterExp = 1;
- if (!netif_running(dev) )
- netif_wake_queue(dev);
- if (time_after(priv->tx_last_sent,priv->tx_last_cleared) &&
- time_after(jiffies, priv->tx_last_sent * 5*HZ) ){
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
- priv->tx_last_cleared = jiffies;
- }
- }
-
-
- if (!registrationBad(dev) && priv->ReTransmitRequested)
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk(KERN_ERR "Retransmit from timer \n");
- priv->ReTransmitRequested = 0;
- arlan_retransmit_now(dev);
- }
- if (!registrationBad(dev) &&
- time_after(jiffies, priv->tx_done_delayed) &&
- priv->tx_done_delayed != 0)
- {
- TXLAST(dev).offset = 0;
- if (priv->txLast)
- priv->txLast = 0;
- else if (TXTAIL(dev).offset)
- priv->txLast = 1;
- if (TXLAST(dev).offset)
- {
- arlan_retransmit_now(dev);
- dev->trans_start = jiffies;
- }
- if (!(TXHEAD(dev).offset && TXTAIL(dev).offset))
- {
- netif_wake_queue (dev);
- }
- priv->tx_done_delayed = 0;
- bh_mark_needed = 1;
- }
- if (bh_mark_needed)
- {
- netif_wake_queue (dev);
- }
- arlan_process_interrupt(dev);
-
- if (next_tick < priv->card_polling_interval)
- next_tick = priv->card_polling_interval;
-
- priv->timer.expires = jiffies + next_tick;
-
- add_timer(&priv->timer);
-}
-
-
-#ifdef ARLAN_DEBUGGING
-
-static void arlan_print_registers(struct net_device *dev, int line)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem *arlan = priv->card;
-
- u_char hostcpuLock, lancpuLock, controlRegister, cntrlRegImage,
- txStatus, rxStatus, interruptInProgress, commandByte;
-
-
- ARLAN_DEBUG_ENTRY("arlan_print_registers");
- READSHM(interruptInProgress, arlan->interruptInProgress, u_char);
- READSHM(hostcpuLock, arlan->hostcpuLock, u_char);
- READSHM(lancpuLock, arlan->lancpuLock, u_char);
- READSHM(controlRegister, arlan->controlRegister, u_char);
- READSHM(cntrlRegImage, arlan->cntrlRegImage, u_char);
- READSHM(txStatus, arlan->txStatus, u_char);
- READSHM(rxStatus, arlan->rxStatus, u_char);
- READSHM(commandByte, arlan->commandByte, u_char);
-
- printk(KERN_WARNING "line %04d IP %02x HL %02x LL %02x CB %02x CR %02x CRI %02x TX %02x RX %02x\n",
- line, interruptInProgress, hostcpuLock, lancpuLock, commandByte,
- controlRegister, cntrlRegImage, txStatus, rxStatus);
-
- ARLAN_DEBUG_EXIT("arlan_print_registers");
-}
-#endif
-
-
-static int arlan_hw_tx(struct net_device *dev, char *buf, int length)
-{
- int i;
-
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
-
- int tailStarts = 0x800;
- int headEnds = 0x0;
-
-
- ARLAN_DEBUG_ENTRY("arlan_hw_tx");
- if (TXHEAD(dev).offset)
- headEnds = (((TXHEAD(dev).offset + TXHEAD(dev).length - offsetof(struct arlan_shmem, txBuffer)) / 64) + 1) * 64;
- if (TXTAIL(dev).offset)
- tailStarts = 0x800 - (((TXTAIL(dev).offset - offsetof(struct arlan_shmem, txBuffer)) / 64) + 2) * 64;
-
-
- if (!TXHEAD(dev).offset && length < tailStarts)
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk(KERN_ERR "TXHEAD insert, tailStart %d\n", tailStarts);
-
- TXHEAD(dev).offset =
- offsetof(struct arlan_shmem, txBuffer);
- TXHEAD(dev).length = length - ARLAN_FAKE_HDR_LEN;
- for (i = 0; i < 6; i++)
- TXHEAD(dev).dest[i] = buf[i];
- TXHEAD(dev).clear = conf->txClear;
- TXHEAD(dev).retries = conf->txRetries; /* 0 is use default */
- TXHEAD(dev).routing = conf->txRouting;
- TXHEAD(dev).scrambled = conf->txScrambled;
- memcpy_toio((char __iomem *)arlan + TXHEAD(dev).offset, buf + ARLAN_FAKE_HDR_LEN, TXHEAD(dev).length);
- }
- else if (!TXTAIL(dev).offset && length < (0x800 - headEnds))
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk(KERN_ERR "TXTAIL insert, headEnd %d\n", headEnds);
-
- TXTAIL(dev).offset =
- offsetof(struct arlan_shmem, txBuffer) + 0x800 - (length / 64 + 2) * 64;
- TXTAIL(dev).length = length - ARLAN_FAKE_HDR_LEN;
- for (i = 0; i < 6; i++)
- TXTAIL(dev).dest[i] = buf[i];
- TXTAIL(dev).clear = conf->txClear;
- TXTAIL(dev).retries = conf->txRetries;
- TXTAIL(dev).routing = conf->txRouting;
- TXTAIL(dev).scrambled = conf->txScrambled;
- memcpy_toio(((char __iomem *)arlan + TXTAIL(dev).offset), buf + ARLAN_FAKE_HDR_LEN, TXTAIL(dev).length);
- }
- else
- {
- netif_stop_queue (dev);
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk(KERN_ERR "TX TAIL & HEAD full, return, tailStart %d headEnd %d\n", tailStarts, headEnds);
- return -1;
- }
- priv->out_bytes += length;
- priv->out_bytes10 += length;
- if (conf->measure_rate < 1)
- conf->measure_rate = 1;
- if (time_after(jiffies, priv->out_time + conf->measure_rate * HZ))
- {
- conf->out_speed = priv->out_bytes / conf->measure_rate;
- priv->out_bytes = 0;
- priv->out_time = jiffies;
- }
- if (time_after(jiffies, priv->out_time10 + conf->measure_rate * 10*HZ))
- {
- conf->out_speed10 = priv->out_bytes10 / (10 * conf->measure_rate);
- priv->out_bytes10 = 0;
- priv->out_time10 = jiffies;
- }
- if (TXHEAD(dev).offset && TXTAIL(dev).offset)
- {
- netif_stop_queue (dev);
- return 0;
- }
- else
- netif_start_queue (dev);
-
-
- IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
- printk(KERN_WARNING "%s Transmit t %2x:%2x:%2x:%2x:%2x:%2x f %2x:%2x:%2x:%2x:%2x:%2x \n", dev->name,
- (unsigned char) buf[0], (unsigned char) buf[1], (unsigned char) buf[2], (unsigned char) buf[3],
- (unsigned char) buf[4], (unsigned char) buf[5], (unsigned char) buf[6], (unsigned char) buf[7],
- (unsigned char) buf[8], (unsigned char) buf[9], (unsigned char) buf[10], (unsigned char) buf[11]);
-
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TX command prepare for buffer %d\n", priv->txLast);
-
- arlan_command(dev, ARLAN_COMMAND_TX);
-
- priv->tx_last_sent = jiffies;
-
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("%s TX Qued %d bytes \n", dev->name, length);
-
- ARLAN_DEBUG_EXIT("arlan_hw_tx");
-
- return 0;
-}
-
-
-static int arlan_hw_config(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
-
- ARLAN_DEBUG_ENTRY("arlan_hw_config");
-
- printk(KERN_NOTICE "%s arlan configure called \n", dev->name);
- if (arlan_EEPROM_bad)
- printk(KERN_NOTICE "arlan configure with eeprom bad option \n");
-
-
- WRITESHM(arlan->spreadingCode, conf->spreadingCode, u_char);
- WRITESHM(arlan->channelSet, conf->channelSet, u_char);
-
- if (arlan_EEPROM_bad)
- WRITESHM(arlan->defaultChannelSet, conf->channelSet, u_char);
-
- WRITESHM(arlan->channelNumber, conf->channelNumber, u_char);
-
- WRITESHM(arlan->scramblingDisable, conf->scramblingDisable, u_char);
- WRITESHM(arlan->txAttenuation, conf->txAttenuation, u_char);
-
- WRITESHM(arlan->systemId, conf->systemId, u_int);
-
- WRITESHM(arlan->maxRetries, conf->maxRetries, u_char);
- WRITESHM(arlan->receiveMode, conf->receiveMode, u_char);
- WRITESHM(arlan->priority, conf->priority, u_char);
- WRITESHM(arlan->rootOrRepeater, conf->rootOrRepeater, u_char);
- WRITESHM(arlan->SID, conf->SID, u_int);
-
- WRITESHM(arlan->registrationMode, conf->registrationMode, u_char);
-
- WRITESHM(arlan->registrationFill, conf->registrationFill, u_char);
- WRITESHM(arlan->localTalkAddress, conf->localTalkAddress, u_char);
- WRITESHM(arlan->codeFormat, conf->codeFormat, u_char);
- WRITESHM(arlan->numChannels, conf->numChannels, u_char);
- WRITESHM(arlan->channel1, conf->channel1, u_char);
- WRITESHM(arlan->channel2, conf->channel2, u_char);
- WRITESHM(arlan->channel3, conf->channel3, u_char);
- WRITESHM(arlan->channel4, conf->channel4, u_char);
- WRITESHM(arlan->radioNodeId, conf->radioNodeId, u_short);
- WRITESHM(arlan->SID, conf->SID, u_int);
- WRITESHM(arlan->waitTime, conf->waitTime, u_short);
- WRITESHM(arlan->lParameter, conf->lParameter, u_short);
- memcpy_toio(&(arlan->_15), &(conf->_15), 3);
- WRITESHM(arlan->_15, conf->_15, u_short);
- WRITESHM(arlan->headerSize, conf->headerSize, u_short);
- if (arlan_EEPROM_bad)
- WRITESHM(arlan->hardwareType, conf->hardwareType, u_char);
- WRITESHM(arlan->radioType, conf->radioType, u_char);
- if (arlan_EEPROM_bad)
- WRITESHM(arlan->radioModule, conf->radioType, u_char);
-
- memcpy_toio(arlan->encryptionKey + keyStart, encryptionKey, 8);
- memcpy_toio(arlan->name, conf->siteName, 16);
-
- WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_CONF); /* do configure */
- memset_io(arlan->commandParameter, 0, 0xf); /* 0xf */
- memset_io(arlan->commandParameter + 1, 0, 2);
- if (conf->writeEEPROM)
- {
- memset_io(arlan->commandParameter, conf->writeEEPROM, 1);
-// conf->writeEEPROM=0;
- }
- if (conf->registrationMode && conf->registrationInterrupts)
- memset_io(arlan->commandParameter + 3, 1, 1);
- else
- memset_io(arlan->commandParameter + 3, 0, 1);
-
- priv->irq_test_done = 0;
-
- if (conf->tx_queue_len)
- dev->tx_queue_len = conf->tx_queue_len;
- udelay(100);
-
- ARLAN_DEBUG_EXIT("arlan_hw_config");
- return 0;
-}
-
-
-static int arlan_read_card_configuration(struct net_device *dev)
-{
- u_char tlx415;
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
-
- ARLAN_DEBUG_ENTRY("arlan_read_card_configuration");
-
- if (radioNodeId == radioNodeIdUNKNOWN)
- {
- READSHM(conf->radioNodeId, arlan->radioNodeId, u_short);
- }
- else
- conf->radioNodeId = radioNodeId;
-
- if (SID == SIDUNKNOWN)
- {
- READSHM(conf->SID, arlan->SID, u_int);
- }
- else conf->SID = SID;
-
- if (spreadingCode == spreadingCodeUNKNOWN)
- {
- READSHM(conf->spreadingCode, arlan->spreadingCode, u_char);
- }
- else
- conf->spreadingCode = spreadingCode;
-
- if (channelSet == channelSetUNKNOWN)
- {
- READSHM(conf->channelSet, arlan->channelSet, u_char);
- }
- else conf->channelSet = channelSet;
-
- if (channelNumber == channelNumberUNKNOWN)
- {
- READSHM(conf->channelNumber, arlan->channelNumber, u_char);
- }
- else conf->channelNumber = channelNumber;
-
- READSHM(conf->scramblingDisable, arlan->scramblingDisable, u_char);
- READSHM(conf->txAttenuation, arlan->txAttenuation, u_char);
-
- if (systemId == systemIdUNKNOWN)
- {
- READSHM(conf->systemId, arlan->systemId, u_int);
- }
- else conf->systemId = systemId;
-
- READSHM(conf->maxDatagramSize, arlan->maxDatagramSize, u_short);
- READSHM(conf->maxFrameSize, arlan->maxFrameSize, u_short);
- READSHM(conf->maxRetries, arlan->maxRetries, u_char);
- READSHM(conf->receiveMode, arlan->receiveMode, u_char);
- READSHM(conf->priority, arlan->priority, u_char);
- READSHM(conf->rootOrRepeater, arlan->rootOrRepeater, u_char);
-
- if (SID == SIDUNKNOWN)
- {
- READSHM(conf->SID, arlan->SID, u_int);
- }
- else conf->SID = SID;
-
- if (registrationMode == registrationModeUNKNOWN)
- {
- READSHM(conf->registrationMode, arlan->registrationMode, u_char);
- }
- else conf->registrationMode = registrationMode;
-
- READSHM(conf->registrationFill, arlan->registrationFill, u_char);
- READSHM(conf->localTalkAddress, arlan->localTalkAddress, u_char);
- READSHM(conf->codeFormat, arlan->codeFormat, u_char);
- READSHM(conf->numChannels, arlan->numChannels, u_char);
- READSHM(conf->channel1, arlan->channel1, u_char);
- READSHM(conf->channel2, arlan->channel2, u_char);
- READSHM(conf->channel3, arlan->channel3, u_char);
- READSHM(conf->channel4, arlan->channel4, u_char);
- READSHM(conf->waitTime, arlan->waitTime, u_short);
- READSHM(conf->lParameter, arlan->lParameter, u_short);
- READSHM(conf->_15, arlan->_15, u_short);
- READSHM(conf->headerSize, arlan->headerSize, u_short);
- READSHM(conf->hardwareType, arlan->hardwareType, u_char);
- READSHM(conf->radioType, arlan->radioModule, u_char);
-
- if (conf->radioType == 0)
- conf->radioType = 0xc;
-
- WRITESHM(arlan->configStatus, 0xA5, u_char);
- READSHM(tlx415, arlan->configStatus, u_char);
-
- if (tlx415 != 0xA5)
- printk(KERN_INFO "%s tlx415 chip \n", dev->name);
-
- conf->txClear = 0;
- conf->txRetries = 1;
- conf->txRouting = 1;
- conf->txScrambled = 0;
- conf->rxParameter = 1;
- conf->txTimeoutMs = 4000;
- conf->waitCardTimeout = 100000;
- conf->receiveMode = ARLAN_RCV_CLEAN;
- memcpy_fromio(conf->siteName, arlan->name, 16);
- conf->siteName[16] = '\0';
- conf->retries = retries;
- conf->tx_delay_ms = tx_delay_ms;
- conf->ReTransmitPacketMaxSize = 200;
- conf->waitReTransmitPacketMaxSize = 200;
- conf->txAckTimeoutMs = 900;
- conf->fastReTransCount = 3;
-
- ARLAN_DEBUG_EXIT("arlan_read_card_configuration");
-
- return 0;
-}
-
-
-static int lastFoundAt = 0xbe000;
-
-
-/*
- * This is the real probe routine. Linux has a history of friendly device
- * probes on the ISA bus. A good device probes avoids doing writes, and
- * verifies that the correct device exists and functions.
- */
-#define ARLAN_SHMEM_SIZE 0x2000
-static int __init arlan_check_fingerprint(unsigned long memaddr)
-{
- static const char probeText[] = "TELESYSTEM SLW INC. ARLAN \0";
- volatile struct arlan_shmem __iomem *arlan = (struct arlan_shmem *) memaddr;
- unsigned long paddr = virt_to_phys((void *) memaddr);
- char tempBuf[49];
-
- ARLAN_DEBUG_ENTRY("arlan_check_fingerprint");
-
- if (!request_mem_region(paddr, ARLAN_SHMEM_SIZE, "arlan")) {
- // printk(KERN_WARNING "arlan: memory region %lx excluded from probing \n",paddr);
- return -ENODEV;
- }
-
- memcpy_fromio(tempBuf, arlan->textRegion, 29);
- tempBuf[30] = 0;
-
- /* check for card at this address */
- if (0 != strncmp(tempBuf, probeText, 29)){
- release_mem_region(paddr, ARLAN_SHMEM_SIZE);
- return -ENODEV;
- }
-
-// printk(KERN_INFO "arlan found at 0x%x \n",memaddr);
- ARLAN_DEBUG_EXIT("arlan_check_fingerprint");
-
- return 0;
-}
-
-static int arlan_change_mtu(struct net_device *dev, int new_mtu)
-{
- struct arlan_private *priv = netdev_priv(dev);
- struct arlan_conf_stru *conf = priv->Conf;
-
- ARLAN_DEBUG_ENTRY("arlan_change_mtu");
- if (new_mtu > 2032)
- return -EINVAL;
- dev->mtu = new_mtu;
- if (new_mtu < 256)
- new_mtu = 256; /* cards book suggests 1600 */
- conf->maxDatagramSize = new_mtu;
- conf->maxFrameSize = new_mtu + 48;
-
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
- printk(KERN_NOTICE "%s mtu changed to %d \n", dev->name, new_mtu);
-
- ARLAN_DEBUG_EXIT("arlan_change_mtu");
-
- return 0;
-}
-
-static int arlan_mac_addr(struct net_device *dev, void *p)
-{
- struct sockaddr *addr = p;
-
-
- ARLAN_DEBUG_ENTRY("arlan_mac_addr");
- return -EINVAL;
-
- if (netif_running(dev))
- return -EBUSY;
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
-
- ARLAN_DEBUG_EXIT("arlan_mac_addr");
- return 0;
-}
-
-static const struct net_device_ops arlan_netdev_ops = {
- .ndo_open = arlan_open,
- .ndo_stop = arlan_close,
- .ndo_start_xmit = arlan_tx,
- .ndo_get_stats = arlan_statistics,
- .ndo_set_multicast_list = arlan_set_multicast,
- .ndo_change_mtu = arlan_change_mtu,
- .ndo_set_mac_address = arlan_mac_addr,
- .ndo_tx_timeout = arlan_tx_timeout,
- .ndo_validate_addr = eth_validate_addr,
-};
-
-static int __init arlan_setup_device(struct net_device *dev, int num)
-{
- struct arlan_private *ap = netdev_priv(dev);
- int err;
-
- ARLAN_DEBUG_ENTRY("arlan_setup_device");
-
- ap->conf = (struct arlan_shmem *)(ap+1);
-
- dev->tx_queue_len = tx_queue_len;
- dev->netdev_ops = &arlan_netdev_ops;
- dev->watchdog_timeo = 3*HZ;
-
- ap->irq_test_done = 0;
- ap->Conf = &arlan_conf[num];
-
- ap->Conf->pre_Command_Wait = 40;
- ap->Conf->rx_tweak1 = 30;
- ap->Conf->rx_tweak2 = 0;
-
-
- err = register_netdev(dev);
- if (err) {
- release_mem_region(virt_to_phys((void *) dev->mem_start),
- ARLAN_SHMEM_SIZE);
- free_netdev(dev);
- return err;
- }
- arlan_device[num] = dev;
- ARLAN_DEBUG_EXIT("arlan_setup_device");
- return 0;
-}
-
-static int __init arlan_probe_here(struct net_device *dev,
- unsigned long memaddr)
-{
- struct arlan_private *ap = netdev_priv(dev);
-
- ARLAN_DEBUG_ENTRY("arlan_probe_here");
-
- if (arlan_check_fingerprint(memaddr))
- return -ENODEV;
-
- printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name,
- (u64) virt_to_phys((void*)memaddr));
-
- ap->card = (void *) memaddr;
- dev->mem_start = memaddr;
- dev->mem_end = memaddr + ARLAN_SHMEM_SIZE-1;
-
- if (dev->irq < 2)
- {
- READSHM(dev->irq, ap->card->irqLevel, u_char);
- } else if (dev->irq == 2)
- dev->irq = 9;
-
- arlan_read_card_configuration(dev);
-
- ARLAN_DEBUG_EXIT("arlan_probe_here");
- return 0;
-}
-
-
-static int arlan_open(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- int ret = 0;
-
- ARLAN_DEBUG_ENTRY("arlan_open");
-
- ret = request_irq(dev->irq, &arlan_interrupt, 0, dev->name, dev);
- if (ret)
- {
- printk(KERN_ERR "%s: unable to get IRQ %d .\n",
- dev->name, dev->irq);
- return ret;
- }
-
-
- priv->bad = 0;
- priv->lastReset = 0;
- priv->reset = 0;
- memcpy_fromio(dev->dev_addr, arlan->lanCardNodeId, 6);
- memset(dev->broadcast, 0xff, 6);
- dev->tx_queue_len = tx_queue_len;
- priv->interrupt_processing_active = 0;
- spin_lock_init(&priv->lock);
-
- netif_start_queue (dev);
-
- priv->registrationLostCount = 0;
- priv->registrationLastSeen = jiffies;
- priv->txLast = 0;
- priv->tx_command_given = 0;
- priv->rx_command_given = 0;
-
- priv->reRegisterExp = 1;
- priv->tx_last_sent = jiffies - 1;
- priv->tx_last_cleared = jiffies;
- priv->Conf->writeEEPROM = 0;
- priv->Conf->registrationInterrupts = 1;
-
- init_timer(&priv->timer);
- priv->timer.expires = jiffies + HZ / 10;
- priv->timer.data = (unsigned long) dev;
- priv->timer.function = &arlan_registration_timer; /* timer handler */
-
- arlan_command(dev, ARLAN_COMMAND_POWERUP | ARLAN_COMMAND_LONG_WAIT_NOW);
- mdelay(200);
- add_timer(&priv->timer);
-
- ARLAN_DEBUG_EXIT("arlan_open");
- return 0;
-}
-
-
-static void arlan_tx_timeout (struct net_device *dev)
-{
- printk(KERN_ERR "%s: arlan transmit timed out, kernel decided\n", dev->name);
- /* Try to restart the adaptor. */
- arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
- // dev->trans_start = jiffies;
- // netif_start_queue (dev);
-}
-
-
-static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev)
-{
- short length;
- unsigned char *buf;
-
- ARLAN_DEBUG_ENTRY("arlan_tx");
-
- length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
- buf = skb->data;
-
- if (length + 0x12 > 0x800) {
- printk(KERN_ERR "TX RING overflow \n");
- netif_stop_queue (dev);
- }
-
- if (arlan_hw_tx(dev, buf, length) == -1)
- goto bad_end;
-
- dev->trans_start = jiffies;
-
- dev_kfree_skb(skb);
-
- arlan_process_interrupt(dev);
- ARLAN_DEBUG_EXIT("arlan_tx");
- return NETDEV_TX_OK;
-
-bad_end:
- arlan_process_interrupt(dev);
- netif_stop_queue (dev);
- ARLAN_DEBUG_EXIT("arlan_tx");
- return NETDEV_TX_BUSY;
-}
-
-
-static inline int DoNotReTransmitCrap(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- if (TXLAST(dev).length < priv->Conf->ReTransmitPacketMaxSize)
- return 1;
- return 0;
-
-}
-
-static inline int DoNotWaitReTransmitCrap(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- if (TXLAST(dev).length < priv->Conf->waitReTransmitPacketMaxSize)
- return 1;
- return 0;
-}
-
-static inline void arlan_queue_retransmit(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- ARLAN_DEBUG_ENTRY("arlan_queue_retransmit");
-
- if (DoNotWaitReTransmitCrap(dev))
- {
- arlan_drop_tx(dev);
- } else
- priv->ReTransmitRequested++;
-
- ARLAN_DEBUG_EXIT("arlan_queue_retransmit");
-}
-
-static inline void RetryOrFail(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- ARLAN_DEBUG_ENTRY("RetryOrFail");
-
- if (priv->retransmissions > priv->Conf->retries ||
- DoNotReTransmitCrap(dev))
- {
- arlan_drop_tx(dev);
- }
- else if (priv->bad <= priv->Conf->fastReTransCount)
- {
- arlan_retransmit_now(dev);
- }
- else arlan_queue_retransmit(dev);
-
- ARLAN_DEBUG_EXIT("RetryOrFail");
-}
-
-
-static void arlan_tx_done_interrupt(struct net_device *dev, int status)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- ARLAN_DEBUG_ENTRY("arlan_tx_done_interrupt");
-
- priv->tx_last_cleared = jiffies;
- priv->tx_command_given = 0;
- switch (status)
- {
- case 1:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit OK\n");
- dev->stats.tx_packets++;
- priv->bad = 0;
- priv->reset = 0;
- priv->retransmissions = 0;
- if (priv->Conf->tx_delay_ms)
- {
- priv->tx_done_delayed = jiffies + (priv->Conf->tx_delay_ms * HZ) / 1000 + 1;
- }
- else
- {
- TXLAST(dev).offset = 0;
- if (priv->txLast)
- priv->txLast = 0;
- else if (TXTAIL(dev).offset)
- priv->txLast = 1;
- if (TXLAST(dev).offset)
- {
- arlan_retransmit_now(dev);
- dev->trans_start = jiffies;
- }
- if (!TXHEAD(dev).offset || !TXTAIL(dev).offset)
- {
- netif_wake_queue (dev);
- }
- }
- }
- break;
-
- case 2:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit timed out\n");
- priv->bad += 1;
- //arlan_queue_retransmit(dev);
- RetryOrFail(dev);
- }
- break;
-
- case 3:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit max retries\n");
- priv->bad += 1;
- priv->reset = 0;
- //arlan_queue_retransmit(dev);
- RetryOrFail(dev);
- }
- break;
-
- case 4:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit aborted\n");
- priv->bad += 1;
- arlan_queue_retransmit(dev);
- //RetryOrFail(dev);
- }
- break;
-
- case 5:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit not registered\n");
- priv->bad += 1;
- //debug=101;
- arlan_queue_retransmit(dev);
- }
- break;
-
- case 6:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit destination full\n");
- priv->bad += 1;
- priv->reset = 0;
- //arlan_drop_tx(dev);
- arlan_queue_retransmit(dev);
- }
- break;
-
- case 7:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit unknown ack\n");
- priv->bad += 1;
- priv->reset = 0;
- arlan_queue_retransmit(dev);
- }
- break;
-
- case 8:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit dest mail box full\n");
- priv->bad += 1;
- priv->reset = 0;
- //arlan_drop_tx(dev);
- arlan_queue_retransmit(dev);
- }
- break;
-
- case 9:
- {
- IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
- printk("arlan intr: transmit root dest not reg.\n");
- priv->bad += 1;
- priv->reset = 1;
- //arlan_drop_tx(dev);
- arlan_queue_retransmit(dev);
- }
- break;
-
- default:
- {
- printk(KERN_ERR "arlan intr: transmit status unknown\n");
- priv->bad += 1;
- priv->reset = 1;
- arlan_drop_tx(dev);
- }
- }
-
- ARLAN_DEBUG_EXIT("arlan_tx_done_interrupt");
-}
-
-
-static void arlan_rx_interrupt(struct net_device *dev, u_char rxStatus, u_short rxOffset, u_short pkt_len)
-{
- char *skbtmp;
- int i = 0;
-
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
-
-
- ARLAN_DEBUG_ENTRY("arlan_rx_interrupt");
- // by spec, not WRITESHMB(arlan->rxStatus,0x00);
- // prohibited here arlan_command(dev, ARLAN_COMMAND_RX);
-
- if (pkt_len < 10 || pkt_len > 2048)
- {
- printk(KERN_WARNING "%s: got too short or long packet, len %d \n", dev->name, pkt_len);
- return;
- }
- if (rxOffset + pkt_len > 0x2000)
- {
- printk("%s: got too long packet, len %d offset %x\n", dev->name, pkt_len, rxOffset);
- return;
- }
- priv->in_bytes += pkt_len;
- priv->in_bytes10 += pkt_len;
- if (conf->measure_rate < 1)
- conf->measure_rate = 1;
- if (time_after(jiffies, priv->in_time + conf->measure_rate * HZ))
- {
- conf->in_speed = priv->in_bytes / conf->measure_rate;
- priv->in_bytes = 0;
- priv->in_time = jiffies;
- }
- if (time_after(jiffies, priv->in_time10 + conf->measure_rate * 10*HZ))
- {
- conf->in_speed10 = priv->in_bytes10 / (10 * conf->measure_rate);
- priv->in_bytes10 = 0;
- priv->in_time10 = jiffies;
- }
- DEBUGSHM(1, "arlan rcv pkt rxStatus= %d ", arlan->rxStatus, u_char);
- switch (rxStatus)
- {
- case 1:
- case 2:
- case 3:
- {
- /* Malloc up new buffer. */
- struct sk_buff *skb;
-
- DEBUGSHM(50, "arlan recv pkt offs=%d\n", arlan->rxOffset, u_short);
- DEBUGSHM(1, "arlan rxFrmType = %d \n", arlan->rxFrmType, u_char);
- DEBUGSHM(1, KERN_INFO "arlan rx scrambled = %d \n", arlan->scrambled, u_char);
-
- /* here we do multicast filtering to avoid slow 8-bit memcopy */
-#ifdef ARLAN_MULTICAST
- if (!(dev->flags & IFF_ALLMULTI) &&
- !(dev->flags & IFF_PROMISC) &&
- dev->mc_list)
- {
- char hw_dst_addr[6];
- struct dev_mc_list *dmi = dev->mc_list;
- int i;
-
- memcpy_fromio(hw_dst_addr, arlan->ultimateDestAddress, 6);
- if (hw_dst_addr[0] == 0x01)
- {
- if (mdebug)
- if (hw_dst_addr[1] == 0x00)
- printk(KERN_ERR "%s mcast 0x0100 \n", dev->name);
- else if (hw_dst_addr[1] == 0x40)
- printk(KERN_ERR "%s m/bcast 0x0140 \n", dev->name);
- while (dmi)
- {
- if (dmi->dmi_addrlen == 6) {
- if (arlan_debug & ARLAN_DEBUG_HEADER_DUMP)
- printk(KERN_ERR "%s mcl %pM\n",
- dev->name, dmi->dmi_addr);
- for (i = 0; i < 6; i++)
- if (dmi->dmi_addr[i] != hw_dst_addr[i])
- break;
- if (i == 6)
- break;
- } else
- printk(KERN_ERR "%s: invalid multicast address length given.\n", dev->name);
- dmi = dmi->next;
- }
- /* we reach here if multicast filtering is on and packet
- * is multicast and not for receive */
- goto end_of_interrupt;
- }
- }
-#endif // ARLAN_MULTICAST
- /* multicast filtering ends here */
- pkt_len += ARLAN_FAKE_HDR_LEN;
-
- skb = dev_alloc_skb(pkt_len + 4);
- if (skb == NULL)
- {
- printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
- dev->stats.rx_dropped++;
- break;
- }
- skb_reserve(skb, 2);
- skbtmp = skb_put(skb, pkt_len);
-
- memcpy_fromio(skbtmp + ARLAN_FAKE_HDR_LEN, ((char __iomem *) arlan) + rxOffset, pkt_len - ARLAN_FAKE_HDR_LEN);
- memcpy_fromio(skbtmp, arlan->ultimateDestAddress, 6);
- memcpy_fromio(skbtmp + 6, arlan->rxSrc, 6);
- WRITESHMB(arlan->rxStatus, 0x00);
- arlan_command(dev, ARLAN_COMMAND_RX);
-
- IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
- {
- char immedDestAddress[6];
- char immedSrcAddress[6];
- memcpy_fromio(immedDestAddress, arlan->immedDestAddress, 6);
- memcpy_fromio(immedSrcAddress, arlan->immedSrcAddress, 6);
-
- printk(KERN_WARNING "%s t %pM f %pM imd %pM ims %pM\n",
- dev->name, skbtmp,
- &skbtmp[6],
- immedDestAddress,
- immedSrcAddress);
- }
- skb->protocol = eth_type_trans(skb, dev);
- IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
- if (skb->protocol != 0x608 && skb->protocol != 0x8)
- {
- for (i = 0; i <= 22; i++)
- printk("%02x:", (u_char) skbtmp[i + 12]);
- printk(KERN_ERR "\n");
- printk(KERN_WARNING "arlan kernel pkt type trans %x \n", skb->protocol);
- }
- netif_rx(skb);
- dev->stats.rx_packets++;
- dev->stats.rx_bytes += pkt_len;
- }
- break;
-
- default:
- printk(KERN_ERR "arlan intr: received unknown status\n");
- dev->stats.rx_crc_errors++;
- break;
- }
- ARLAN_DEBUG_EXIT("arlan_rx_interrupt");
-}
-
-static void arlan_process_interrupt(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- u_char rxStatus = READSHMB(arlan->rxStatus);
- u_char txStatus = READSHMB(arlan->txStatus);
- u_short rxOffset = READSHMS(arlan->rxOffset);
- u_short pkt_len = READSHMS(arlan->rxLength);
- int interrupt_count = 0;
-
- ARLAN_DEBUG_ENTRY("arlan_process_interrupt");
-
- if (test_and_set_bit(0, (void *) &priv->interrupt_processing_active))
- {
- if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
- printk(KERN_ERR "interrupt chain reentering \n");
- goto end_int_process;
- }
- while ((rxStatus || txStatus || priv->interrupt_ack_requested)
- && (interrupt_count < 5))
- {
- if (rxStatus)
- priv->last_rx_int_ack_time = jiffies;
-
- arlan_command(dev, ARLAN_COMMAND_INT_ACK);
- arlan_command(dev, ARLAN_COMMAND_INT_ENABLE);
-
- IFDEBUG(ARLAN_DEBUG_INTERRUPT)
- printk(KERN_ERR "%s: got IRQ rx %x tx %x comm %x rxOff %x rxLen %x \n",
- dev->name, rxStatus, txStatus, READSHMB(arlan->commandByte),
- rxOffset, pkt_len);
-
- if (rxStatus == 0 && txStatus == 0)
- {
- if (priv->irq_test_done)
- {
- if (!registrationBad(dev))
- IFDEBUG(ARLAN_DEBUG_INTERRUPT) printk(KERN_ERR "%s unknown interrupt(nop? regLost ?) reason tx %d rx %d ",
- dev->name, txStatus, rxStatus);
- } else {
- IFDEBUG(ARLAN_DEBUG_INTERRUPT)
- printk(KERN_INFO "%s irq $%d test OK \n", dev->name, dev->irq);
-
- }
- priv->interrupt_ack_requested = 0;
- goto ends;
- }
- if (txStatus != 0)
- {
- WRITESHMB(arlan->txStatus, 0x00);
- arlan_tx_done_interrupt(dev, txStatus);
- goto ends;
- }
- if (rxStatus == 1 || rxStatus == 2)
- { /* a packet waiting */
- arlan_rx_interrupt(dev, rxStatus, rxOffset, pkt_len);
- goto ends;
- }
- if (rxStatus > 2 && rxStatus < 0xff)
- {
- WRITESHMB(arlan->rxStatus, 0x00);
- printk(KERN_ERR "%s unknown rxStatus reason tx %d rx %d ",
- dev->name, txStatus, rxStatus);
- goto ends;
- }
- if (rxStatus == 0xff)
- {
- WRITESHMB(arlan->rxStatus, 0x00);
- arlan_command(dev, ARLAN_COMMAND_RX);
- if (registrationBad(dev))
- netif_device_detach(dev);
- if (!registrationBad(dev))
- {
- priv->registrationLastSeen = jiffies;
- if (!netif_queue_stopped(dev) && !priv->under_reset && !priv->under_config)
- netif_wake_queue (dev);
- }
- goto ends;
- }
-ends:
-
- arlan_command_process(dev);
-
- rxStatus = READSHMB(arlan->rxStatus);
- txStatus = READSHMB(arlan->txStatus);
- rxOffset = READSHMS(arlan->rxOffset);
- pkt_len = READSHMS(arlan->rxLength);
-
-
- priv->irq_test_done = 1;
-
- interrupt_count++;
- }
- priv->interrupt_processing_active = 0;
-
-end_int_process:
- arlan_command_process(dev);
-
- ARLAN_DEBUG_EXIT("arlan_process_interrupt");
- return;
-}
-
-static irqreturn_t arlan_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- u_char rxStatus = READSHMB(arlan->rxStatus);
- u_char txStatus = READSHMB(arlan->txStatus);
-
- ARLAN_DEBUG_ENTRY("arlan_interrupt");
-
-
- if (!rxStatus && !txStatus)
- priv->interrupt_ack_requested++;
-
- arlan_process_interrupt(dev);
-
- priv->irq_test_done = 1;
-
- ARLAN_DEBUG_EXIT("arlan_interrupt");
- return IRQ_HANDLED;
-
-}
-
-
-static int arlan_close(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
-
- ARLAN_DEBUG_ENTRY("arlan_close");
-
- del_timer_sync(&priv->timer);
-
- arlan_command(dev, ARLAN_COMMAND_POWERDOWN);
-
- IFDEBUG(ARLAN_DEBUG_STARTUP)
- printk(KERN_NOTICE "%s: Closing device\n", dev->name);
-
- netif_stop_queue(dev);
- free_irq(dev->irq, dev);
-
- ARLAN_DEBUG_EXIT("arlan_close");
- return 0;
-}
-
-#ifdef ARLAN_DEBUGGING
-static long alignLong(volatile u_char * ptr)
-{
- long ret;
- memcpy_fromio(&ret, (void *) ptr, 4);
- return ret;
-}
-#endif
-
-/*
- * Get the current statistics.
- * This may be called with the card open or closed.
- */
-
-static struct net_device_stats *arlan_statistics(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
-
-
- ARLAN_DEBUG_ENTRY("arlan_statistics");
-
- /* Update the statistics from the device registers. */
-
- READSHM(dev->stats.collisions, arlan->numReTransmissions, u_int);
- READSHM(dev->stats.rx_crc_errors, arlan->numCRCErrors, u_int);
- READSHM(dev->stats.rx_dropped, arlan->numFramesDiscarded, u_int);
- READSHM(dev->stats.rx_fifo_errors, arlan->numRXBufferOverflows, u_int);
- READSHM(dev->stats.rx_frame_errors, arlan->numReceiveFramesLost, u_int);
- READSHM(dev->stats.rx_over_errors, arlan->numRXOverruns, u_int);
- READSHM(dev->stats.rx_packets, arlan->numDatagramsReceived, u_int);
- READSHM(dev->stats.tx_aborted_errors, arlan->numAbortErrors, u_int);
- READSHM(dev->stats.tx_carrier_errors, arlan->numStatusTimeouts, u_int);
- READSHM(dev->stats.tx_dropped, arlan->numDatagramsDiscarded, u_int);
- READSHM(dev->stats.tx_fifo_errors, arlan->numTXUnderruns, u_int);
- READSHM(dev->stats.tx_packets, arlan->numDatagramsTransmitted, u_int);
- READSHM(dev->stats.tx_window_errors, arlan->numHoldOffs, u_int);
-
- ARLAN_DEBUG_EXIT("arlan_statistics");
-
- return &dev->stats;
-}
-
-
-static void arlan_set_multicast(struct net_device *dev)
-{
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- struct arlan_conf_stru *conf = priv->Conf;
- int board_conf_needed = 0;
-
-
- ARLAN_DEBUG_ENTRY("arlan_set_multicast");
-
- if (dev->flags & IFF_PROMISC)
- {
- unsigned char recMode;
- READSHM(recMode, arlan->receiveMode, u_char);
- conf->receiveMode = (ARLAN_RCV_PROMISC | ARLAN_RCV_CONTROL);
- if (conf->receiveMode != recMode)
- board_conf_needed = 1;
- }
- else
- {
- /* turn off promiscuous mode */
- unsigned char recMode;
- READSHM(recMode, arlan->receiveMode, u_char);
- conf->receiveMode = ARLAN_RCV_CLEAN | ARLAN_RCV_CONTROL;
- if (conf->receiveMode != recMode)
- board_conf_needed = 1;
- }
- if (board_conf_needed)
- arlan_command(dev, ARLAN_COMMAND_CONF);
-
- ARLAN_DEBUG_EXIT("arlan_set_multicast");
-}
-
-
-struct net_device * __init arlan_probe(int unit)
-{
- struct net_device *dev;
- int err;
- int m;
-
- ARLAN_DEBUG_ENTRY("arlan_probe");
-
- if (arlans_found == MAX_ARLANS)
- return ERR_PTR(-ENODEV);
-
- /*
- * Reserve space for local data and a copy of the shared memory
- * that is used by the /proc interface.
- */
- dev = alloc_etherdev(sizeof(struct arlan_private)
- + sizeof(struct arlan_shmem));
- if (!dev)
- return ERR_PTR(-ENOMEM);
-
- if (unit >= 0) {
- sprintf(dev->name, "eth%d", unit);
- netdev_boot_setup_check(dev);
-
- if (dev->mem_start) {
- if (arlan_probe_here(dev, dev->mem_start) == 0)
- goto found;
- goto not_found;
- }
-
- }
-
-
- for (m = (int)phys_to_virt(lastFoundAt) + ARLAN_SHMEM_SIZE;
- m <= (int)phys_to_virt(0xDE000);
- m += ARLAN_SHMEM_SIZE)
- {
- if (arlan_probe_here(dev, m) == 0)
- {
- lastFoundAt = (int)virt_to_phys((void*)m);
- goto found;
- }
- }
-
- if (lastFoundAt == 0xbe000)
- printk(KERN_ERR "arlan: No Arlan devices found \n");
-
- not_found:
- free_netdev(dev);
- return ERR_PTR(-ENODEV);
-
- found:
- err = arlan_setup_device(dev, arlans_found);
- if (err)
- dev = ERR_PTR(err);
- else if (!arlans_found++)
- printk(KERN_INFO "Arlan driver %s\n", arlan_version);
-
- return dev;
-}
-
-#ifdef MODULE
-int __init init_module(void)
-{
- int i = 0;
-
- ARLAN_DEBUG_ENTRY("init_module");
-
- if (channelSet != channelSetUNKNOWN || channelNumber != channelNumberUNKNOWN || systemId != systemIdUNKNOWN)
- return -EINVAL;
-
- for (i = 0; i < MAX_ARLANS; i++) {
- struct net_device *dev = arlan_probe(i);
-
- if (IS_ERR(dev))
- return PTR_ERR(dev);
- }
- init_arlan_proc();
- printk(KERN_INFO "Arlan driver %s\n", arlan_version);
- ARLAN_DEBUG_EXIT("init_module");
- return 0;
-}
-
-
-void __exit cleanup_module(void)
-{
- int i = 0;
- struct net_device *dev;
-
- ARLAN_DEBUG_ENTRY("cleanup_module");
-
- IFDEBUG(ARLAN_DEBUG_SHUTDOWN)
- printk(KERN_INFO "arlan: unloading module\n");
-
- cleanup_arlan_proc();
-
- for (i = 0; i < MAX_ARLANS; i++)
- {
- dev = arlan_device[i];
- if (dev) {
- arlan_command(dev, ARLAN_COMMAND_POWERDOWN );
-
- unregister_netdev(dev);
- release_mem_region(virt_to_phys((void *) dev->mem_start),
- ARLAN_SHMEM_SIZE);
- free_netdev(dev);
- arlan_device[i] = NULL;
- }
- }
-
- ARLAN_DEBUG_EXIT("cleanup_module");
-}
-
-
-#endif
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/arlan-proc.c b/drivers/net/wireless/arlan-proc.c
deleted file mode 100644
index a8b689635a3..00000000000
--- a/drivers/net/wireless/arlan-proc.c
+++ /dev/null
@@ -1,1253 +0,0 @@
-#include "arlan.h"
-
-#include <linux/sysctl.h>
-
-#ifdef CONFIG_PROC_FS
-
-/* void enableReceive(struct net_device* dev);
-*/
-
-
-
-#define ARLAN_STR_SIZE 0x2ff0
-#define DEV_ARLAN_INFO 1
-#define DEV_ARLAN 1
-#define SARLG(type,var) {\
- pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, READSHMB(priva->card->var)); \
- }
-
-#define SARLBN(type,var,nn) {\
- pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x",#var);\
- for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
- pos += sprintf(arlan_drive_info+pos, "\n"); \
- }
-
-#define SARLBNpln(type,var,nn) {\
- for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
- }
-
-#define SARLSTR(var,nn) {\
- char tmpStr[400];\
- int tmpLn = nn;\
- if (nn > 399 ) tmpLn = 399; \
- memcpy(tmpStr,(char *) priva->conf->var,tmpLn);\
- tmpStr[tmpLn] = 0; \
- pos += sprintf(arlan_drive_info+pos, "%s\t=\t%s \n",#var,priva->conf->var);\
- }
-
-#define SARLUC(var) SARLG(u_char, var)
-#define SARLUCN(var,nn) SARLBN(u_char,var, nn)
-#define SARLUS(var) SARLG(u_short, var)
-#define SARLUSN(var,nn) SARLBN(u_short,var, nn)
-#define SARLUI(var) SARLG(u_int, var)
-
-#define SARLUSA(var) {\
- u_short tmpVar;\
- memcpy(&tmpVar, (short *) priva->conf->var,2); \
- pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
-}
-
-#define SARLUIA(var) {\
- u_int tmpVar;\
- memcpy(&tmpVar, (int* )priva->conf->var,4); \
- pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
-}
-
-
-static const char *arlan_diagnostic_info_string(struct net_device *dev)
-{
-
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- u_char diagnosticInfo;
-
- READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
-
- switch (diagnosticInfo)
- {
- case 0xFF:
- return "Diagnostic info is OK";
- case 0xFE:
- return "ERROR EPROM Checksum error ";
- case 0xFD:
- return "ERROR Local Ram Test Failed ";
- case 0xFC:
- return "ERROR SCC failure ";
- case 0xFB:
- return "ERROR BackBone failure ";
- case 0xFA:
- return "ERROR transceiver not found ";
- case 0xF9:
- return "ERROR no more address space ";
- case 0xF8:
- return "ERROR Checksum error ";
- case 0xF7:
- return "ERROR Missing SS Code";
- case 0xF6:
- return "ERROR Invalid config format";
- case 0xF5:
- return "ERROR Reserved errorcode F5";
- case 0xF4:
- return "ERROR Invalid spreading code/channel number";
- case 0xF3:
- return "ERROR Load Code Error";
- case 0xF2:
- return "ERROR Reserver errorcode F2 ";
- case 0xF1:
- return "ERROR Invalid command receivec by LAN card ";
- case 0xF0:
- return "ERROR Invalid parameter found in command ";
- case 0xEF:
- return "ERROR On-chip timer failure ";
- case 0xEE:
- return "ERROR T410 timer failure ";
- case 0xED:
- return "ERROR Too Many TxEnable commands ";
- case 0xEC:
- return "ERROR EEPROM error on radio module ";
- default:
- return "ERROR unknown Diagnostic info reply code ";
- }
-}
-
-static const char *arlan_hardware_type_string(struct net_device *dev)
-{
- u_char hardwareType;
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
-
- READSHM(hardwareType, arlan->hardwareType, u_char);
- switch (hardwareType)
- {
- case 0x00:
- return "type A450";
- case 0x01:
- return "type A650 ";
- case 0x04:
- return "type TMA coproc";
- case 0x0D:
- return "type A650E ";
- case 0x18:
- return "type TMA coproc Australian";
- case 0x19:
- return "type A650A ";
- case 0x26:
- return "type TMA coproc European";
- case 0x2E:
- return "type A655 ";
- case 0x2F:
- return "type A655A ";
- case 0x30:
- return "type A655E ";
- case 0x0B:
- return "type A670 ";
- case 0x0C:
- return "type A670E ";
- case 0x2D:
- return "type A670A ";
- case 0x0F:
- return "type A411T";
- case 0x16:
- return "type A411TA";
- case 0x1B:
- return "type A440T";
- case 0x1C:
- return "type A412T";
- case 0x1E:
- return "type A412TA";
- case 0x22:
- return "type A411TE";
- case 0x24:
- return "type A412TE";
- case 0x27:
- return "type A671T ";
- case 0x29:
- return "type A671TA ";
- case 0x2B:
- return "type A671TE ";
- case 0x31:
- return "type A415T ";
- case 0x33:
- return "type A415TA ";
- case 0x35:
- return "type A415TE ";
- case 0x37:
- return "type A672";
- case 0x39:
- return "type A672A ";
- case 0x3B:
- return "type A672T";
- case 0x6B:
- return "type IC2200";
- default:
- return "type A672T";
- }
-}
-#ifdef ARLAN_DEBUGGING
-static void arlan_print_diagnostic_info(struct net_device *dev)
-{
- int i;
- u_char diagnosticInfo;
- u_short diagnosticOffset;
- u_char hardwareType;
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
-
- // ARLAN_DEBUG_ENTRY("arlan_print_diagnostic_info");
-
- if (READSHMB(arlan->configuredStatusFlag) == 0)
- printk("Arlan: Card NOT configured\n");
- else
- printk("Arlan: Card is configured\n");
-
- READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
- READSHM(diagnosticOffset, arlan->diagnosticOffset, u_short);
-
- printk(KERN_INFO "%s\n", arlan_diagnostic_info_string(dev));
-
- if (diagnosticInfo != 0xff)
- printk("%s arlan: Diagnostic Offset %d \n", dev->name, diagnosticOffset);
-
- printk("arlan: LAN CODE ID = ");
- for (i = 0; i < 6; i++)
- DEBUGSHM(1, "%03d:", arlan->lanCardNodeId[i], u_char);
- printk("\n");
-
- printk("arlan: Arlan BroadCast address = ");
- for (i = 0; i < 6; i++)
- DEBUGSHM(1, "%03d:", arlan->broadcastAddress[i], u_char);
- printk("\n");
-
- READSHM(hardwareType, arlan->hardwareType, u_char);
- printk(KERN_INFO "%s\n", arlan_hardware_type_string(dev));
-
-
- DEBUGSHM(1, "arlan: channelNumber=%d\n", arlan->channelNumber, u_char);
- DEBUGSHM(1, "arlan: channelSet=%d\n", arlan->channelSet, u_char);
- DEBUGSHM(1, "arlan: spreadingCode=%d\n", arlan->spreadingCode, u_char);
- DEBUGSHM(1, "arlan: radioNodeId=%d\n", arlan->radioNodeId, u_short);
- DEBUGSHM(1, "arlan: SID =%d\n", arlan->SID, u_short);
- DEBUGSHM(1, "arlan: rxOffset=%d\n", arlan->rxOffset, u_short);
-
- DEBUGSHM(1, "arlan: registration mode is %d\n", arlan->registrationMode, u_char);
-
- printk("arlan: name= ");
- IFDEBUG(1)
-
- for (i = 0; i < 16; i++)
- {
- char c;
- READSHM(c, arlan->name[i], char);
- if (c)
- printk("%c", c);
- }
- printk("\n");
-
-// ARLAN_DEBUG_EXIT("arlan_print_diagnostic_info");
-
-}
-
-
-/****************************** TEST MEMORY **************/
-
-static int arlan_hw_test_memory(struct net_device *dev)
-{
- u_char *ptr;
- int i;
- int memlen = sizeof(struct arlan_shmem) - 0xF; /* avoid control register */
- volatile char *arlan_mem = (char *) (dev->mem_start);
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
- char pattern;
-
- ptr = NULL;
-
- /* hold card in reset state */
- setHardwareReset(dev);
-
- /* test memory */
- pattern = 0;
- for (i = 0; i < memlen; i++)
- WRITESHM(arlan_mem[i], ((u_char) pattern++), u_char);
-
- pattern = 0;
- for (i = 0; i < memlen; i++)
- {
- char res;
- READSHM(res, arlan_mem[i], char);
- if (res != pattern++)
- {
- printk(KERN_ERR "Arlan driver memory test 1 failed \n");
- return -1;
- }
- }
-
- pattern = 0;
- for (i = 0; i < memlen; i++)
- WRITESHM(arlan_mem[i], ~(pattern++), char);
-
- pattern = 0;
- for (i = 0; i < memlen; i++)
- {
- char res;
- READSHM(res, arlan_mem[i], char);
- if (res != ~(pattern++))
- {
- printk(KERN_ERR "Arlan driver memory test 2 failed \n");
- return -1;
- }
- }
-
- /* zero memory */
- for (i = 0; i < memlen; i++)
- WRITESHM(arlan_mem[i], 0x00, char);
-
- IFDEBUG(1) printk(KERN_INFO "Arlan: memory tests ok\n");
-
- /* set reset flag and then release reset */
- WRITESHM(arlan->resetFlag, 0xff, u_char);
-
- clearChannelAttention(dev);
- clearHardwareReset(dev);
-
- /* wait for reset flag to become zero, we'll wait for two seconds */
- if (arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW))
- {
- printk(KERN_ERR "%s arlan: failed to come back from memory test\n", dev->name);
- return -1;
- }
- return 0;
-}
-
-static int arlan_setup_card_by_book(struct net_device *dev)
-{
- u_char irqLevel, configuredStatusFlag;
- struct arlan_private *priv = netdev_priv(dev);
- volatile struct arlan_shmem __iomem *arlan = priv->card;
-
-// ARLAN_DEBUG_ENTRY("arlan_setup_card");
-
- READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
-
- IFDEBUG(10)
- if (configuredStatusFlag != 0)
- IFDEBUG(10) printk("arlan: CARD IS CONFIGURED\n");
- else
- IFDEBUG(10) printk("arlan: card is NOT configured\n");
-
- if (testMemory || (READSHMB(arlan->diagnosticInfo) != 0xff))
- if (arlan_hw_test_memory(dev))
- return -1;
-
- DEBUGSHM(4, "arlan configuredStatus = %d \n", arlan->configuredStatusFlag, u_char);
- DEBUGSHM(4, "arlan driver diagnostic: 0x%2x\n", arlan->diagnosticInfo, u_char);
-
- /* issue nop command - no interrupt */
- arlan_command(dev, ARLAN_COMMAND_NOOP);
- if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
- return -1;
-
- IFDEBUG(50) printk("1st Noop successfully executed !!\n");
-
- /* try to turn on the arlan interrupts */
- clearClearInterrupt(dev);
- setClearInterrupt(dev);
- setInterruptEnable(dev);
-
- /* issue nop command - with interrupt */
-
- arlan_command(dev, ARLAN_COMMAND_NOOPINT);
- if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
- return -1;
-
-
- IFDEBUG(50) printk("2nd Noop successfully executed !!\n");
-
- READSHM(irqLevel, arlan->irqLevel, u_char)
-
- if (irqLevel != dev->irq)
- {
- IFDEBUG(1) printk(KERN_WARNING "arlan dip switches set irq to %d\n", irqLevel);
- printk(KERN_WARNING "device driver irq set to %d - does not match\n", dev->irq);
- dev->irq = irqLevel;
- }
- else
- IFDEBUG(2) printk("irq level is OK\n");
-
-
- IFDEBUG(3) arlan_print_diagnostic_info(dev);
-
- arlan_command(dev, ARLAN_COMMAND_CONF);
-
- READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
- if (configuredStatusFlag == 0)
- {
- printk(KERN_WARNING "arlan configure failed\n");
- return -1;
- }
- arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
- arlan_command(dev, ARLAN_COMMAND_RX);
- arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
- printk(KERN_NOTICE "%s: arlan driver version %s loaded\n",
- dev->name, arlan_version);
-
-// ARLAN_DEBUG_EXIT("arlan_setup_card");
-
- return 0; /* no errors */
-}
-#endif
-
-#ifdef ARLAN_PROC_INTERFACE
-#ifdef ARLAN_PROC_SHM_DUMP
-
-static char arlan_drive_info[ARLAN_STR_SIZE] = "A655\n\0";
-
-static int arlan_sysctl_info(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int i;
- int retv, pos, devnum;
- struct arlan_private *priva = NULL;
- struct net_device *dev;
- pos = 0;
- if (write)
- {
- printk("wrirte: ");
- for (i = 0; i < 100; i++)
- printk("adi %x \n", arlan_drive_info[i]);
- }
- if (ctl->procname == NULL || arlan_drive_info == NULL)
- {
- printk(KERN_WARNING " procname is NULL in sysctl_table or arlan_drive_info is NULL \n at arlan module\n ");
- return -1;
- }
- devnum = ctl->procname[5] - '0';
- if (devnum < 0 || devnum > MAX_ARLANS - 1)
- {
- printk(KERN_WARNING "too strange devnum in procfs parse\n ");
- return -1;
- }
- else if (arlan_device[devnum] == NULL)
- {
- if (ctl->procname)
- pos += sprintf(arlan_drive_info + pos, "\t%s\n\n", ctl->procname);
- pos += sprintf(arlan_drive_info + pos, "No device found here \n");
- goto final;
- }
- else
- priva = netdev_priv(arlan_device[devnum]);
-
- if (priva == NULL)
- {
- printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
- return -1;
- }
- dev = arlan_device[devnum];
-
- memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
-
- pos = sprintf(arlan_drive_info, "Arlan info \n");
- /* Header Signature */
- SARLSTR(textRegion, 48);
- SARLUC(resetFlag);
- pos += sprintf(arlan_drive_info + pos, "diagnosticInfo\t=\t%s \n", arlan_diagnostic_info_string(dev));
- SARLUC(diagnosticInfo);
- SARLUS(diagnosticOffset);
- SARLUCN(_1, 12);
- SARLUCN(lanCardNodeId, 6);
- SARLUCN(broadcastAddress, 6);
- pos += sprintf(arlan_drive_info + pos, "hardwareType =\t %s \n", arlan_hardware_type_string(dev));
- SARLUC(hardwareType);
- SARLUC(majorHardwareVersion);
- SARLUC(minorHardwareVersion);
- SARLUC(radioModule);
- SARLUC(defaultChannelSet);
- SARLUCN(_2, 47);
-
- /* Control/Status Block - 0x0080 */
- SARLUC(interruptInProgress);
- SARLUC(cntrlRegImage);
-
- SARLUCN(_3, 14);
- SARLUC(commandByte);
- SARLUCN(commandParameter, 15);
-
- /* Receive Status - 0x00a0 */
- SARLUC(rxStatus);
- SARLUC(rxFrmType);
- SARLUS(rxOffset);
- SARLUS(rxLength);
- SARLUCN(rxSrc, 6);
- SARLUC(rxBroadcastFlag);
- SARLUC(rxQuality);
- SARLUC(scrambled);
- SARLUCN(_4, 1);
-
- /* Transmit Status - 0x00b0 */
- SARLUC(txStatus);
- SARLUC(txAckQuality);
- SARLUC(numRetries);
- SARLUCN(_5, 14);
- SARLUCN(registeredRouter, 6);
- SARLUCN(backboneRouter, 6);
- SARLUC(registrationStatus);
- SARLUC(configuredStatusFlag);
- SARLUCN(_6, 1);
- SARLUCN(ultimateDestAddress, 6);
- SARLUCN(immedDestAddress, 6);
- SARLUCN(immedSrcAddress, 6);
- SARLUS(rxSequenceNumber);
- SARLUC(assignedLocaltalkAddress);
- SARLUCN(_7, 27);
-
- /* System Parameter Block */
-
- /* - Driver Parameters (Novell Specific) */
-
- SARLUS(txTimeout);
- SARLUS(transportTime);
- SARLUCN(_8, 4);
-
- /* - Configuration Parameters */
- SARLUC(irqLevel);
- SARLUC(spreadingCode);
- SARLUC(channelSet);
- SARLUC(channelNumber);
- SARLUS(radioNodeId);
- SARLUCN(_9, 2);
- SARLUC(scramblingDisable);
- SARLUC(radioType);
- SARLUS(routerId);
- SARLUCN(_10, 9);
- SARLUC(txAttenuation);
- SARLUIA(systemId);
- SARLUS(globalChecksum);
- SARLUCN(_11, 4);
- SARLUS(maxDatagramSize);
- SARLUS(maxFrameSize);
- SARLUC(maxRetries);
- SARLUC(receiveMode);
- SARLUC(priority);
- SARLUC(rootOrRepeater);
- SARLUCN(specifiedRouter, 6);
- SARLUS(fastPollPeriod);
- SARLUC(pollDecay);
- SARLUSA(fastPollDelay);
- SARLUC(arlThreshold);
- SARLUC(arlDecay);
- SARLUCN(_12, 1);
- SARLUS(specRouterTimeout);
- SARLUCN(_13, 5);
-
- /* Scrambled Area */
- SARLUIA(SID);
- SARLUCN(encryptionKey, 12);
- SARLUIA(_14);
- SARLUSA(waitTime);
- SARLUSA(lParameter);
- SARLUCN(_15, 3);
- SARLUS(headerSize);
- SARLUS(sectionChecksum);
-
- SARLUC(registrationMode);
- SARLUC(registrationFill);
- SARLUS(pollPeriod);
- SARLUS(refreshPeriod);
- SARLSTR(name, 16);
- SARLUCN(NID, 6);
- SARLUC(localTalkAddress);
- SARLUC(codeFormat);
- SARLUC(numChannels);
- SARLUC(channel1);
- SARLUC(channel2);
- SARLUC(channel3);
- SARLUC(channel4);
- SARLUCN(SSCode, 59);
-
-/* SARLUCN( _16, 0x140);
- */
- /* Statistics Block - 0x0300 */
- SARLUC(hostcpuLock);
- SARLUC(lancpuLock);
- SARLUCN(resetTime, 18);
- SARLUIA(numDatagramsTransmitted);
- SARLUIA(numReTransmissions);
- SARLUIA(numFramesDiscarded);
- SARLUIA(numDatagramsReceived);
- SARLUIA(numDuplicateReceivedFrames);
- SARLUIA(numDatagramsDiscarded);
- SARLUS(maxNumReTransmitDatagram);
- SARLUS(maxNumReTransmitFrames);
- SARLUS(maxNumConsecutiveDuplicateFrames);
- /* misaligned here so we have to go to characters */
- SARLUIA(numBytesTransmitted);
- SARLUIA(numBytesReceived);
- SARLUIA(numCRCErrors);
- SARLUIA(numLengthErrors);
- SARLUIA(numAbortErrors);
- SARLUIA(numTXUnderruns);
- SARLUIA(numRXOverruns);
- SARLUIA(numHoldOffs);
- SARLUIA(numFramesTransmitted);
- SARLUIA(numFramesReceived);
- SARLUIA(numReceiveFramesLost);
- SARLUIA(numRXBufferOverflows);
- SARLUIA(numFramesDiscardedAddrMismatch);
- SARLUIA(numFramesDiscardedSIDMismatch);
- SARLUIA(numPollsTransmistted);
- SARLUIA(numPollAcknowledges);
- SARLUIA(numStatusTimeouts);
- SARLUIA(numNACKReceived);
- SARLUS(auxCmd);
- SARLUCN(dumpPtr, 4);
- SARLUC(dumpVal);
- SARLUC(wireTest);
-
- /* next 4 seems too long for procfs, over single page ?
- SARLUCN( _17, 0x86);
- SARLUCN( txBuffer, 0x800);
- SARLUCN( rxBuffer, 0x800);
- SARLUCN( _18, 0x0bff);
- */
-
- pos += sprintf(arlan_drive_info + pos, "rxRing\t=\t0x");
- for (i = 0; i < 0x50; i++)
- pos += sprintf(arlan_drive_info + pos, "%02x", ((char *) priva->conf)[priva->conf->rxOffset + i]);
- pos += sprintf(arlan_drive_info + pos, "\n");
-
- SARLUC(configStatus);
- SARLUC(_22);
- SARLUC(progIOCtrl);
- SARLUC(shareMBase);
- SARLUC(controlRegister);
-
- pos += sprintf(arlan_drive_info + pos, " total %d chars\n", pos);
- if (ctl)
- if (ctl->procname)
- pos += sprintf(arlan_drive_info + pos, " driver name : %s\n", ctl->procname);
-final:
- *lenp = pos;
-
- if (!write)
- retv = proc_dostring(ctl, write, buffer, lenp, ppos);
- else
- {
- *lenp = 0;
- return -1;
- }
- return retv;
-}
-
-
-static int arlan_sysctl_info161719(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int i;
- int retv, pos, devnum;
- struct arlan_private *priva = NULL;
-
- pos = 0;
- devnum = ctl->procname[5] - '0';
- if (arlan_device[devnum] == NULL)
- {
- pos += sprintf(arlan_drive_info + pos, "No device found here \n");
- goto final;
- }
- else
- priva = netdev_priv(arlan_device[devnum]);
- if (priva == NULL)
- {
- printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
- return -1;
- }
- memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
- SARLUCN(_16, 0xC0);
- SARLUCN(_17, 0x6A);
- SARLUCN(_18, 14);
- SARLUCN(_19, 0x86);
- SARLUCN(_21, 0x3fd);
-
-final:
- *lenp = pos;
- retv = proc_dostring(ctl, write, buffer, lenp, ppos);
- return retv;
-}
-
-static int arlan_sysctl_infotxRing(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int i;
- int retv, pos, devnum;
- struct arlan_private *priva = NULL;
-
- pos = 0;
- devnum = ctl->procname[5] - '0';
- if (arlan_device[devnum] == NULL)
- {
- pos += sprintf(arlan_drive_info + pos, "No device found here \n");
- goto final;
- }
- else
- priva = netdev_priv(arlan_device[devnum]);
- if (priva == NULL)
- {
- printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
- return -1;
- }
- memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
- SARLBNpln(u_char, txBuffer, 0x800);
-final:
- *lenp = pos;
- retv = proc_dostring(ctl, write, buffer, lenp, ppos);
- return retv;
-}
-
-static int arlan_sysctl_inforxRing(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int i;
- int retv, pos, devnum;
- struct arlan_private *priva = NULL;
-
- pos = 0;
- devnum = ctl->procname[5] - '0';
- if (arlan_device[devnum] == NULL)
- {
- pos += sprintf(arlan_drive_info + pos, "No device found here \n");
- goto final;
- } else
- priva = netdev_priv(arlan_device[devnum]);
- if (priva == NULL)
- {
- printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
- return -1;
- }
- memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
- SARLBNpln(u_char, rxBuffer, 0x800);
-final:
- *lenp = pos;
- retv = proc_dostring(ctl, write, buffer, lenp, ppos);
- return retv;
-}
-
-static int arlan_sysctl_info18(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int i;
- int retv, pos, devnum;
- struct arlan_private *priva = NULL;
-
- pos = 0;
- devnum = ctl->procname[5] - '0';
- if (arlan_device[devnum] == NULL)
- {
- pos += sprintf(arlan_drive_info + pos, "No device found here \n");
- goto final;
- }
- else
- priva = netdev_priv(arlan_device[devnum]);
- if (priva == NULL)
- {
- printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
- return -1;
- }
- memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
- SARLBNpln(u_char, _18, 0x800);
-
-final:
- *lenp = pos;
- retv = proc_dostring(ctl, write, buffer, lenp, ppos);
- return retv;
-}
-
-
-#endif /* #ifdef ARLAN_PROC_SHM_DUMP */
-
-
-static char conf_reset_result[200];
-
-static int arlan_configure(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int pos = 0;
- int devnum = ctl->procname[6] - '0';
- struct arlan_private *priv;
-
- if (devnum < 0 || devnum > MAX_ARLANS - 1)
- {
- printk(KERN_WARNING "too strange devnum in procfs parse\n ");
- return -1;
- }
- else if (arlan_device[devnum] != NULL)
- {
- priv = netdev_priv(arlan_device[devnum]);
-
- arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_CONF);
- }
- else
- return -1;
-
- *lenp = pos;
- return proc_dostring(ctl, write, buffer, lenp, ppos);
-}
-
-static int arlan_sysctl_reset(ctl_table * ctl, int write,
- void __user *buffer, size_t * lenp, loff_t *ppos)
-{
- int pos = 0;
- int devnum = ctl->procname[5] - '0';
- struct arlan_private *priv;
-
- if (devnum < 0 || devnum > MAX_ARLANS - 1)
- {
- printk(KERN_WARNING "too strange devnum in procfs parse\n ");
- return -1;
- }
- else if (arlan_device[devnum] != NULL)
- {
- priv = netdev_priv(arlan_device[devnum]);
- arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_RESET);
-
- } else
- return -1;
- *lenp = pos + 3;
- return proc_dostring(ctl, write, buffer, lenp, ppos);
-}
-
-
-/* Place files in /proc/sys/dev/arlan */
-#define CTBLN(num,card,nam) \
- { .ctl_name = num,\
- .procname = #nam,\
- .data = &(arlan_conf[card].nam),\
- .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec}
-#ifdef ARLAN_DEBUGGING
-
-#define ARLAN_PROC_DEBUG_ENTRIES \
- { .ctl_name = 48, .procname = "entry_exit_debug",\
- .data = &arlan_entry_and_exit_debug,\
- .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec},\
- { .ctl_name = 49, .procname = "debug", .data = &arlan_debug,\
- .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec},
-#else
-#define ARLAN_PROC_DEBUG_ENTRIES
-#endif
-
-#define ARLAN_SYSCTL_TABLE_TOTAL(cardNo)\
- CTBLN(1,cardNo,spreadingCode),\
- CTBLN(2,cardNo, channelNumber),\
- CTBLN(3,cardNo, scramblingDisable),\
- CTBLN(4,cardNo, txAttenuation),\
- CTBLN(5,cardNo, systemId), \
- CTBLN(6,cardNo, maxDatagramSize),\
- CTBLN(7,cardNo, maxFrameSize),\
- CTBLN(8,cardNo, maxRetries),\
- CTBLN(9,cardNo, receiveMode),\
- CTBLN(10,cardNo, priority),\
- CTBLN(11,cardNo, rootOrRepeater),\
- CTBLN(12,cardNo, SID),\
- CTBLN(13,cardNo, registrationMode),\
- CTBLN(14,cardNo, registrationFill),\
- CTBLN(15,cardNo, localTalkAddress),\
- CTBLN(16,cardNo, codeFormat),\
- CTBLN(17,cardNo, numChannels),\
- CTBLN(18,cardNo, channel1),\
- CTBLN(19,cardNo, channel2),\
- CTBLN(20,cardNo, channel3),\
- CTBLN(21,cardNo, channel4),\
- CTBLN(22,cardNo, txClear),\
- CTBLN(23,cardNo, txRetries),\
- CTBLN(24,cardNo, txRouting),\
- CTBLN(25,cardNo, txScrambled),\
- CTBLN(26,cardNo, rxParameter),\
- CTBLN(27,cardNo, txTimeoutMs),\
- CTBLN(28,cardNo, waitCardTimeout),\
- CTBLN(29,cardNo, channelSet), \
- {.ctl_name = 30, .procname = "name",\
- .data = arlan_conf[cardNo].siteName,\
- .maxlen = 16, .mode = 0600, .proc_handler = &proc_dostring},\
- CTBLN(31,cardNo,waitTime),\
- CTBLN(32,cardNo,lParameter),\
- CTBLN(33,cardNo,_15),\
- CTBLN(34,cardNo,headerSize),\
- CTBLN(36,cardNo,tx_delay_ms),\
- CTBLN(37,cardNo,retries),\
- CTBLN(38,cardNo,ReTransmitPacketMaxSize),\
- CTBLN(39,cardNo,waitReTransmitPacketMaxSize),\
- CTBLN(40,cardNo,fastReTransCount),\
- CTBLN(41,cardNo,driverRetransmissions),\
- CTBLN(42,cardNo,txAckTimeoutMs),\
- CTBLN(43,cardNo,registrationInterrupts),\
- CTBLN(44,cardNo,hardwareType),\
- CTBLN(45,cardNo,radioType),\
- CTBLN(46,cardNo,writeEEPROM),\
- CTBLN(47,cardNo,writeRadioType),\
- ARLAN_PROC_DEBUG_ENTRIES\
- CTBLN(50,cardNo,in_speed),\
- CTBLN(51,cardNo,out_speed),\
- CTBLN(52,cardNo,in_speed10),\
- CTBLN(53,cardNo,out_speed10),\
- CTBLN(54,cardNo,in_speed_max),\
- CTBLN(55,cardNo,out_speed_max),\
- CTBLN(56,cardNo,measure_rate),\
- CTBLN(57,cardNo,pre_Command_Wait),\
- CTBLN(58,cardNo,rx_tweak1),\
- CTBLN(59,cardNo,rx_tweak2),\
- CTBLN(60,cardNo,tx_queue_len),\
-
-
-
-static ctl_table arlan_conf_table0[] =
-{
- ARLAN_SYSCTL_TABLE_TOTAL(0)
-
-#ifdef ARLAN_PROC_SHM_DUMP
- {
- .ctl_name = 150,
- .procname = "arlan0-txRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_infotxRing,
- },
- {
- .ctl_name = 151,
- .procname = "arlan0-rxRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_inforxRing,
- },
- {
- .ctl_name = 152,
- .procname = "arlan0-18",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info18,
- },
- {
- .ctl_name = 153,
- .procname = "arlan0-ring",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info161719,
- },
- {
- .ctl_name = 154,
- .procname = "arlan0-shm-cpy",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info,
- },
-#endif
- {
- .ctl_name = 155,
- .procname = "config0",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_configure
- },
- {
- .ctl_name = 156,
- .procname = "reset0",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_reset,
- },
- { .ctl_name = 0 }
-};
-
-static ctl_table arlan_conf_table1[] =
-{
-
- ARLAN_SYSCTL_TABLE_TOTAL(1)
-
-#ifdef ARLAN_PROC_SHM_DUMP
- {
- .ctl_name = 150,
- .procname = "arlan1-txRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_infotxRing,
- },
- {
- .ctl_name = 151,
- .procname = "arlan1-rxRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_inforxRing,
- },
- {
- .ctl_name = 152,
- .procname = "arlan1-18",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info18,
- },
- {
- .ctl_name = 153,
- .procname = "arlan1-ring",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info161719,
- },
- {
- .ctl_name = 154,
- .procname = "arlan1-shm-cpy",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info,
- },
-#endif
- {
- .ctl_name = 155,
- .procname = "config1",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_configure,
- },
- {
- .ctl_name = 156,
- .procname = "reset1",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_reset,
- },
- { .ctl_name = 0 }
-};
-
-static ctl_table arlan_conf_table2[] =
-{
-
- ARLAN_SYSCTL_TABLE_TOTAL(2)
-
-#ifdef ARLAN_PROC_SHM_DUMP
- {
- .ctl_name = 150,
- .procname = "arlan2-txRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_infotxRing,
- },
- {
- .ctl_name = 151,
- .procname = "arlan2-rxRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_inforxRing,
- },
- {
- .ctl_name = 152,
- .procname = "arlan2-18",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info18,
- },
- {
- .ctl_name = 153,
- .procname = "arlan2-ring",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info161719,
- },
- {
- .ctl_name = 154,
- .procname = "arlan2-shm-cpy",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info,
- },
-#endif
- {
- .ctl_name = 155,
- .procname = "config2",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_configure,
- },
- {
- .ctl_name = 156,
- .procname = "reset2",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_reset,
- },
- { .ctl_name = 0 }
-};
-
-static ctl_table arlan_conf_table3[] =
-{
-
- ARLAN_SYSCTL_TABLE_TOTAL(3)
-
-#ifdef ARLAN_PROC_SHM_DUMP
- {
- .ctl_name = 150,
- .procname = "arlan3-txRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_infotxRing,
- },
- {
- .ctl_name = 151,
- .procname = "arlan3-rxRing",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_inforxRing,
- },
- {
- .ctl_name = 152,
- .procname = "arlan3-18",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info18,
- },
- {
- .ctl_name = 153,
- .procname = "arlan3-ring",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info161719,
- },
- {
- .ctl_name = 154,
- .procname = "arlan3-shm-cpy",
- .data = &arlan_drive_info,
- .maxlen = ARLAN_STR_SIZE,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_info,
- },
-#endif
- {
- .ctl_name = 155,
- .procname = "config3",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_configure,
- },
- {
- .ctl_name = 156,
- .procname = "reset3",
- .data = &conf_reset_result,
- .maxlen = 100,
- .mode = 0400,
- .proc_handler = &arlan_sysctl_reset,
- },
- { .ctl_name = 0 }
-};
-
-
-
-static ctl_table arlan_table[] =
-{
- {
- .ctl_name = 0,
- .procname = "arlan0",
- .maxlen = 0,
- .mode = 0600,
- .child = arlan_conf_table0,
- },
- {
- .ctl_name = 0,
- .procname = "arlan1",
- .maxlen = 0,
- .mode = 0600,
- .child = arlan_conf_table1,
- },
- {
- .ctl_name = 0,
- .procname = "arlan2",
- .maxlen = 0,
- .mode = 0600,
- .child = arlan_conf_table2,
- },
- {
- .ctl_name = 0,
- .procname = "arlan3",
- .maxlen = 0,
- .mode = 0600,
- .child = arlan_conf_table3,
- },
- { .ctl_name = 0 }
-};
-
-#else
-
-static ctl_table arlan_table[MAX_ARLANS + 1] =
-{
- { .ctl_name = 0 }
-};
-#endif
-
-
-// static int mmtu = 1234;
-
-static ctl_table arlan_root_table[] =
-{
- {
- .ctl_name = CTL_ARLAN,
- .procname = "arlan",
- .maxlen = 0,
- .mode = 0555,
- .child = arlan_table,
- },
- { .ctl_name = 0 }
-};
-
-/* Make sure that /proc/sys/dev is there */
-//static ctl_table arlan_device_root_table[] =
-//{
-// {CTL_DEV, "dev", NULL, 0, 0555, arlan_root_table},
-// {0}
-//};
-
-
-static struct ctl_table_header *arlan_device_sysctl_header;
-
-int __init init_arlan_proc(void)
-{
-
- int i = 0;
- if (arlan_device_sysctl_header)
- return 0;
- for (i = 0; i < MAX_ARLANS && arlan_device[i]; i++)
- arlan_table[i].ctl_name = i + 1;
- arlan_device_sysctl_header = register_sysctl_table(arlan_root_table);
- if (!arlan_device_sysctl_header)
- return -1;
-
- return 0;
-
-}
-
-void __exit cleanup_arlan_proc(void)
-{
- unregister_sysctl_table(arlan_device_sysctl_header);
- arlan_device_sysctl_header = NULL;
-
-}
-#endif
diff --git a/drivers/net/wireless/arlan.h b/drivers/net/wireless/arlan.h
deleted file mode 100644
index fb3ad51a1ca..00000000000
--- a/drivers/net/wireless/arlan.h
+++ /dev/null
@@ -1,539 +0,0 @@
-/*
- * Copyright (C) 1997 Cullen Jennings
- * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
- * GNU General Public License applies
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/skbuff.h>
-#include <linux/if_ether.h> /* For the statistics structure. */
-#include <linux/if_arp.h> /* For ARPHRD_ETHER */
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/in.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/timer.h>
-
-#include <linux/init.h>
-#include <linux/bitops.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-
-
-//#define ARLAN_DEBUGGING 1
-
-#define ARLAN_PROC_INTERFACE
-#define MAX_ARLANS 4 /* not more than 4 ! */
-#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
-
-#define ARLAN_MAX_MULTICAST_ADDRS 16
-#define ARLAN_RCV_CLEAN 0
-#define ARLAN_RCV_PROMISC 1
-#define ARLAN_RCV_CONTROL 2
-
-#ifdef CONFIG_PROC_FS
-extern int init_arlan_proc(void);
-extern void cleanup_arlan_proc(void);
-#else
-#define init_arlan_proc() ({ 0; })
-#define cleanup_arlan_proc() do { } while (0)
-#endif
-
-extern struct net_device *arlan_device[MAX_ARLANS];
-extern int arlan_debug;
-extern int arlan_entry_debug;
-extern int arlan_exit_debug;
-extern int testMemory;
-extern int arlan_command(struct net_device * dev, int command);
-
-#define SIDUNKNOWN -1
-#define radioNodeIdUNKNOWN -1
-#define irqUNKNOWN 0
-#define debugUNKNOWN 0
-#define testMemoryUNKNOWN 1
-#define spreadingCodeUNKNOWN 0
-#define channelNumberUNKNOWN 0
-#define channelSetUNKNOWN 0
-#define systemIdUNKNOWN -1
-#define registrationModeUNKNOWN -1
-
-
-#define IFDEBUG( L ) if ( (L) & arlan_debug )
-#define ARLAN_FAKE_HDR_LEN 12
-
-#ifdef ARLAN_DEBUGGING
- #define DEBUG 1
- #define ARLAN_ENTRY_EXIT_DEBUGGING 1
- #define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b)
-#else
- #define ARLAN_DEBUG(a,b)
-#endif
-
-#define ARLAN_SHMEM_SIZE 0x2000
-
-struct arlan_shmem
-{
- /* Header Signature */
- volatile char textRegion[48];
- volatile u_char resetFlag;
- volatile u_char diagnosticInfo;
- volatile u_short diagnosticOffset;
- volatile u_char _1[12];
- volatile u_char lanCardNodeId[6];
- volatile u_char broadcastAddress[6];
- volatile u_char hardwareType;
- volatile u_char majorHardwareVersion;
- volatile u_char minorHardwareVersion;
- volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111
- volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A
- volatile u_char _2[47];
-
- /* Control/Status Block - 0x0080 */
- volatile u_char interruptInProgress; /* not used by lancpu */
- volatile u_char cntrlRegImage; /* not used by lancpu */
- volatile u_char _3[13];
- volatile u_char dumpByte;
- volatile u_char commandByte; /* non-zero = active */
- volatile u_char commandParameter[15];
-
- /* Receive Status - 0x00a0 */
- volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
- volatile u_char rxFrmType;
- volatile u_short rxOffset;
- volatile u_short rxLength;
- volatile u_char rxSrc[6];
- volatile u_char rxBroadcastFlag;
- volatile u_char rxQuality;
- volatile u_char scrambled;
- volatile u_char _4[1];
-
- /* Transmit Status - 0x00b0 */
- volatile u_char txStatus;
- volatile u_char txAckQuality;
- volatile u_char numRetries;
- volatile u_char _5[14];
- volatile u_char registeredRouter[6];
- volatile u_char backboneRouter[6];
- volatile u_char registrationStatus;
- volatile u_char configuredStatusFlag;
- volatile u_char _6[1];
- volatile u_char ultimateDestAddress[6];
- volatile u_char immedDestAddress[6];
- volatile u_char immedSrcAddress[6];
- volatile u_short rxSequenceNumber;
- volatile u_char assignedLocaltalkAddress;
- volatile u_char _7[27];
-
- /* System Parameter Block */
-
- /* - Driver Parameters (Novell Specific) */
-
- volatile u_short txTimeout;
- volatile u_short transportTime;
- volatile u_char _8[4];
-
- /* - Configuration Parameters */
- volatile u_char irqLevel;
- volatile u_char spreadingCode;
- volatile u_char channelSet;
- volatile u_char channelNumber;
- volatile u_short radioNodeId;
- volatile u_char _9[2];
- volatile u_char scramblingDisable;
- volatile u_char radioType;
- volatile u_short routerId;
- volatile u_char _10[9];
- volatile u_char txAttenuation;
- volatile u_char systemId[4];
- volatile u_short globalChecksum;
- volatile u_char _11[4];
- volatile u_short maxDatagramSize;
- volatile u_short maxFrameSize;
- volatile u_char maxRetries;
- volatile u_char receiveMode;
- volatile u_char priority;
- volatile u_char rootOrRepeater;
- volatile u_char specifiedRouter[6];
- volatile u_short fastPollPeriod;
- volatile u_char pollDecay;
- volatile u_char fastPollDelay[2];
- volatile u_char arlThreshold;
- volatile u_char arlDecay;
- volatile u_char _12[1];
- volatile u_short specRouterTimeout;
- volatile u_char _13[5];
-
- /* Scrambled Area */
- volatile u_char SID[4];
- volatile u_char encryptionKey[12];
- volatile u_char _14[2];
- volatile u_char waitTime[2];
- volatile u_char lParameter[2];
- volatile u_char _15[3];
- volatile u_short headerSize;
- volatile u_short sectionChecksum;
-
- volatile u_char registrationMode;
- volatile u_char registrationFill;
- volatile u_short pollPeriod;
- volatile u_short refreshPeriod;
- volatile u_char name[16];
- volatile u_char NID[6];
- volatile u_char localTalkAddress;
- volatile u_char codeFormat;
- volatile u_char numChannels;
- volatile u_char channel1;
- volatile u_char channel2;
- volatile u_char channel3;
- volatile u_char channel4;
- volatile u_char SSCode[59];
-
- volatile u_char _16[0xC0];
- volatile u_short auxCmd;
- volatile u_char dumpPtr[4];
- volatile u_char dumpVal;
- volatile u_char _17[0x6A];
- volatile u_char wireTest;
- volatile u_char _18[14];
-
- /* Statistics Block - 0x0300 */
- volatile u_char hostcpuLock;
- volatile u_char lancpuLock;
- volatile u_char resetTime[18];
-
- volatile u_char numDatagramsTransmitted[4];
- volatile u_char numReTransmissions[4];
- volatile u_char numFramesDiscarded[4];
- volatile u_char numDatagramsReceived[4];
- volatile u_char numDuplicateReceivedFrames[4];
- volatile u_char numDatagramsDiscarded[4];
-
- volatile u_short maxNumReTransmitDatagram;
- volatile u_short maxNumReTransmitFrames;
- volatile u_short maxNumConsecutiveDuplicateFrames;
- /* misaligned here so we have to go to characters */
-
- volatile u_char numBytesTransmitted[4];
- volatile u_char numBytesReceived[4];
- volatile u_char numCRCErrors[4];
- volatile u_char numLengthErrors[4];
- volatile u_char numAbortErrors[4];
- volatile u_char numTXUnderruns[4];
- volatile u_char numRXOverruns[4];
- volatile u_char numHoldOffs[4];
- volatile u_char numFramesTransmitted[4];
- volatile u_char numFramesReceived[4];
- volatile u_char numReceiveFramesLost[4];
- volatile u_char numRXBufferOverflows[4];
- volatile u_char numFramesDiscardedAddrMismatch[4];
- volatile u_char numFramesDiscardedSIDMismatch[4];
- volatile u_char numPollsTransmistted[4];
- volatile u_char numPollAcknowledges[4];
- volatile u_char numStatusTimeouts[4];
- volatile u_char numNACKReceived[4];
-
- volatile u_char _19[0x86];
-
- volatile u_char txBuffer[0x800];
- volatile u_char rxBuffer[0x800];
-
- volatile u_char _20[0x800];
- volatile u_char _21[0x3fb];
- volatile u_char configStatus;
- volatile u_char _22;
- volatile u_char progIOCtrl;
- volatile u_char shareMBase;
- volatile u_char controlRegister;
-};
-
-struct arlan_conf_stru {
- int spreadingCode;
- int channelSet;
- int channelNumber;
- int scramblingDisable;
- int txAttenuation;
- int systemId;
- int maxDatagramSize;
- int maxFrameSize;
- int maxRetries;
- int receiveMode;
- int priority;
- int rootOrRepeater;
- int SID;
- int radioNodeId;
- int registrationMode;
- int registrationFill;
- int localTalkAddress;
- int codeFormat;
- int numChannels;
- int channel1;
- int channel2;
- int channel3;
- int channel4;
- int txClear;
- int txRetries;
- int txRouting;
- int txScrambled;
- int rxParameter;
- int txTimeoutMs;
- int txAckTimeoutMs;
- int waitCardTimeout;
- int waitTime;
- int lParameter;
- int _15;
- int headerSize;
- int retries;
- int tx_delay_ms;
- int waitReTransmitPacketMaxSize;
- int ReTransmitPacketMaxSize;
- int fastReTransCount;
- int driverRetransmissions;
- int registrationInterrupts;
- int hardwareType;
- int radioType;
- int writeRadioType;
- int writeEEPROM;
- char siteName[17];
- int measure_rate;
- int in_speed;
- int out_speed;
- int in_speed10;
- int out_speed10;
- int in_speed_max;
- int out_speed_max;
- int pre_Command_Wait;
- int rx_tweak1;
- int rx_tweak2;
- int tx_queue_len;
-};
-
-extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
-
-struct TxParam
-{
- volatile short offset;
- volatile short length;
- volatile u_char dest[6];
- volatile unsigned char clear;
- volatile unsigned char retries;
- volatile unsigned char routing;
- volatile unsigned char scrambled;
-};
-
-#define TX_RING_SIZE 2
-/* Information that need to be kept for each board. */
-struct arlan_private {
- struct arlan_shmem __iomem * card;
- struct arlan_shmem * conf;
-
- struct arlan_conf_stru * Conf;
- int bad;
- int reset;
- unsigned long lastReset;
- struct timer_list timer;
- struct timer_list tx_delay_timer;
- struct timer_list tx_retry_timer;
- struct timer_list rx_check_timer;
-
- int registrationLostCount;
- int reRegisterExp;
- int irq_test_done;
-
- struct TxParam txRing[TX_RING_SIZE];
- char reTransmitBuff[0x800];
- int txLast;
- unsigned ReTransmitRequested;
- unsigned long tx_done_delayed;
- unsigned long registrationLastSeen;
-
- unsigned long tx_last_sent;
- unsigned long tx_last_cleared;
- unsigned long retransmissions;
- unsigned long interrupt_ack_requested;
- spinlock_t lock;
- unsigned long waiting_command_mask;
- unsigned long card_polling_interval;
- unsigned long last_command_buff_free_time;
-
- int under_reset;
- int under_config;
- int rx_command_given;
- int tx_command_given;
- unsigned long interrupt_processing_active;
- unsigned long last_rx_int_ack_time;
- unsigned long in_bytes;
- unsigned long out_bytes;
- unsigned long in_time;
- unsigned long out_time;
- unsigned long in_time10;
- unsigned long out_time10;
- unsigned long in_bytes10;
- unsigned long out_bytes10;
- int init_etherdev_alloc;
-};
-
-
-
-#define ARLAN_CLEAR 0x00
-#define ARLAN_RESET 0x01
-#define ARLAN_CHANNEL_ATTENTION 0x02
-#define ARLAN_INTERRUPT_ENABLE 0x04
-#define ARLAN_CLEAR_INTERRUPT 0x08
-#define ARLAN_POWER 0x40
-#define ARLAN_ACCESS 0x80
-
-#define ARLAN_COM_CONF 0x01
-#define ARLAN_COM_RX_ENABLE 0x03
-#define ARLAN_COM_RX_ABORT 0x04
-#define ARLAN_COM_TX_ENABLE 0x05
-#define ARLAN_COM_TX_ABORT 0x06
-#define ARLAN_COM_NOP 0x07
-#define ARLAN_COM_STANDBY 0x08
-#define ARLAN_COM_ACTIVATE 0x09
-#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
-#define ARLAN_COM_INT 0x80
-
-
-#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
-#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
-#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
-
-#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
-#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
-
-#define READSHM(to,from,atype) {\
- atype tmp;\
- memcpy_fromio(&(tmp),&(from),sizeof(atype));\
- to = tmp;\
- }
-
-#define READSHMEM(from,atype)\
- atype from; \
- READSHM(from, arlan->from, atype);
-
-#define WRITESHM(to,from,atype) \
- { atype tmpSHM = from;\
- memcpy_toio(&(to),&tmpSHM,sizeof(atype));\
- }
-
-#define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \
- { atype tmpSHM; \
- memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\
- IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\
- }
-
-#define WRITESHMB(to, val) \
- writeb(val,&(to))
-#define READSHMB(to) \
- readb(&(to))
-#define WRITESHMS(to, val) \
- writew(val,&(to))
-#define READSHMS(to) \
- readw(&(to))
-#define WRITESHMI(to, val) \
- writel(val,&(to))
-#define READSHMI(to) \
- readl(&(to))
-
-
-
-
-
-#define registrationBad(dev)\
- ( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
- ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) )
-
-
-#define readControlRegister(dev)\
- READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
-
-#define writeControlRegister(dev, v){\
- WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\
- WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );}
-
-
-#define arlan_interrupt_lancpu(dev) {\
- int cr; \
- \
- cr = readControlRegister(dev);\
- if (cr & ARLAN_CHANNEL_ATTENTION){ \
- writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
- }else \
- writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
-}
-
-#define clearChannelAttention(dev){ \
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);}
-#define setHardwareReset(dev) {\
- writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);}
-#define clearHardwareReset(dev) {\
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);}
-#define setInterruptEnable(dev){\
- writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;}
-#define clearInterruptEnable(dev){\
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;}
-#define setClearInterrupt(dev){\
- writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;}
-#define clearClearInterrupt(dev){\
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);}
-#define setPowerOff(dev){\
- writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
-#define setPowerOn(dev){\
- writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); }
-#define arlan_lock_card_access(dev){\
- writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
-#define arlan_unlock_card_access(dev){\
- writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); }
-
-
-
-
-#define ARLAN_COMMAND_RX 0x000001
-#define ARLAN_COMMAND_NOOP 0x000002
-#define ARLAN_COMMAND_NOOPINT 0x000004
-#define ARLAN_COMMAND_TX 0x000008
-#define ARLAN_COMMAND_CONF 0x000010
-#define ARLAN_COMMAND_RESET 0x000020
-#define ARLAN_COMMAND_TX_ABORT 0x000040
-#define ARLAN_COMMAND_RX_ABORT 0x000080
-#define ARLAN_COMMAND_POWERDOWN 0x000100
-#define ARLAN_COMMAND_POWERUP 0x000200
-#define ARLAN_COMMAND_SLOW_POLL 0x000400
-#define ARLAN_COMMAND_ACTIVATE 0x000800
-#define ARLAN_COMMAND_INT_ACK 0x001000
-#define ARLAN_COMMAND_INT_ENABLE 0x002000
-#define ARLAN_COMMAND_WAIT_NOW 0x004000
-#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
-#define ARLAN_COMMAND_STANDBY 0x010000
-#define ARLAN_COMMAND_INT_RACK 0x020000
-#define ARLAN_COMMAND_INT_RENABLE 0x040000
-#define ARLAN_COMMAND_CONF_WAIT 0x080000
-#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
-#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
- | ARLAN_COMMAND_RX_ABORT\
- | ARLAN_COMMAND_CONF)
-#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
- | ARLAN_COMMAND_RX_ABORT\
- | ARLAN_COMMAND_RESET)
-
-
-
-#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
-#define ARLAN_DEBUG_RESET 0x00002
-#define ARLAN_DEBUG_TIMING 0x00004
-#define ARLAN_DEBUG_CARD_STATE 0x00008
-#define ARLAN_DEBUG_TX_CHAIN 0x00010
-#define ARLAN_DEBUG_MULTICAST 0x00020
-#define ARLAN_DEBUG_HEADER_DUMP 0x00040
-#define ARLAN_DEBUG_INTERRUPT 0x00080
-#define ARLAN_DEBUG_STARTUP 0x00100
-#define ARLAN_DEBUG_SHUTDOWN 0x00200
-
diff --git a/drivers/net/wireless/ath/Kconfig b/drivers/net/wireless/ath/Kconfig
index 6ce86cb3765..4e7a7fd695c 100644
--- a/drivers/net/wireless/ath/Kconfig
+++ b/drivers/net/wireless/ath/Kconfig
@@ -1,6 +1,5 @@
menuconfig ATH_COMMON
tristate "Atheros Wireless Cards"
- depends on WLAN_80211
depends on CFG80211
---help---
This will enable the support for the Atheros wireless drivers.
diff --git a/drivers/net/wireless/ath/ar9170/Kconfig b/drivers/net/wireless/ath/ar9170/Kconfig
index 05918f1e685..d7a4799d20f 100644
--- a/drivers/net/wireless/ath/ar9170/Kconfig
+++ b/drivers/net/wireless/ath/ar9170/Kconfig
@@ -1,6 +1,6 @@
config AR9170_USB
tristate "Atheros AR9170 802.11n USB support"
- depends on USB && MAC80211 && WLAN_80211
+ depends on USB && MAC80211
select FW_LOADER
help
This is a driver for the Atheros "otus" 802.11n USB devices.
diff --git a/drivers/net/wireless/ath/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig
index 06d006675d7..eb83b7b4d0e 100644
--- a/drivers/net/wireless/ath/ath5k/Kconfig
+++ b/drivers/net/wireless/ath/ath5k/Kconfig
@@ -1,6 +1,6 @@
config ATH5K
tristate "Atheros 5xxx wireless cards support"
- depends on PCI && MAC80211 && WLAN_80211
+ depends on PCI && MAC80211
select MAC80211_LEDS
select LEDS_CLASS
select NEW_LEDS
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index b767c3b67b2..7ce98bd7c74 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -59,6 +59,8 @@ static const struct pci_device_id ath5k_led_devices[] = {
{ ATH_SDEVICE(PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID), ATH_LED(1, 1) },
/* Acer Aspire One A150 (maximlevitsky@gmail.com) */
{ ATH_SDEVICE(PCI_VENDOR_ID_FOXCONN, 0xe008), ATH_LED(3, 0) },
+ /* Acer Aspire One AO531h AO751h (keng-yu.lin@canonical.com) */
+ { ATH_SDEVICE(PCI_VENDOR_ID_FOXCONN, 0xe00d), ATH_LED(3, 0) },
/* Acer Ferrari 5000 (russ.dill@gmail.com) */
{ ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) },
/* E-machines E510 (tuliom@gmail.com) */
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index 99ce066392a..b735fb399fb 100644
--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -3,7 +3,7 @@ config ATH9K_HW
config ATH9K
tristate "Atheros 802.11n wireless cards support"
- depends on PCI && MAC80211 && WLAN_80211
+ depends on PCI && MAC80211
select ATH9K_HW
select MAC80211_LEDS
select LEDS_CLASS
diff --git a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index 25531f231b6..329e6bc137a 100644
--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
@@ -69,6 +69,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
int irq;
int ret = 0;
struct ath_hw *ah;
+ char hw_name[64];
if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "no platform data specified\n");
@@ -133,14 +134,11 @@ static int ath_ahb_probe(struct platform_device *pdev)
}
ah = sc->sc_ah;
+ ath9k_hw_name(ah, hw_name, sizeof(hw_name));
printk(KERN_INFO
- "%s: Atheros AR%s MAC/BB Rev:%x, "
- "AR%s RF Rev:%x, mem=0x%lx, irq=%d\n",
+ "%s: %s mem=0x%lx, irq=%d\n",
wiphy_name(hw->wiphy),
- ath_mac_bb_name(ah->hw_version.macVersion),
- ah->hw_version.macRev,
- ath_rf_name((ah->hw_version.analog5GhzRev & AR_RADIO_SREV_MAJOR)),
- ah->hw_version.phyRev,
+ hw_name,
(unsigned long)mem, irq);
return 0;
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 551f8801459..238a5744d8e 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -877,7 +877,7 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0);
/* find off_6_1; */
- for (i = 6; i >= 0; i--) {
+ for (i = 6; i > 0; i--) {
regVal = REG_READ(ah, 0x7834);
regVal |= (1 << (20 + i));
REG_WRITE(ah, 0x7834, regVal);
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 58167d861dc..68db16690ab 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -1112,6 +1112,10 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
pModal->txEndToRxOn);
+
+ if (AR_SREV_9271_10(ah))
+ REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
+ pModal->txEndToRxOn);
REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
pModal->thresh62);
REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index cab17c6c8a3..111ff049f75 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -30,8 +30,6 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan);
static u32 ath9k_hw_ini_fixup(struct ath_hw *ah,
struct ar5416_eeprom_def *pEepData,
u32 reg, u32 value);
-static void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
-static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
MODULE_AUTHOR("Atheros Communications");
MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
@@ -454,21 +452,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
ah->power_mode = ATH9K_PM_UNDEFINED;
}
-static int ath9k_hw_rfattach(struct ath_hw *ah)
-{
- bool rfStatus = false;
- int ecode = 0;
-
- rfStatus = ath9k_hw_init_rf(ah, &ecode);
- if (!rfStatus) {
- ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
- "RF setup failed, status: %u\n", ecode);
- return ecode;
- }
-
- return 0;
-}
-
static int ath9k_hw_rf_claim(struct ath_hw *ah)
{
u32 val;
@@ -585,9 +568,15 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
ah->eep_ops->get_eeprom_ver(ah),
ah->eep_ops->get_eeprom_rev(ah));
- ecode = ath9k_hw_rfattach(ah);
- if (ecode != 0)
- return ecode;
+ if (!AR_SREV_9280_10_OR_LATER(ah)) {
+ ecode = ath9k_hw_rf_alloc_ext_banks(ah);
+ if (ecode) {
+ ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
+ "Failed allocating banks for "
+ "external radio\n");
+ return ecode;
+ }
+ }
if (!AR_SREV_9100(ah)) {
ath9k_hw_ani_setup(ah);
@@ -662,10 +651,13 @@ static void ath9k_hw_init_cal_settings(struct ath_hw *ah)
static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
{
if (AR_SREV_9271(ah)) {
- INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271_1_0,
- ARRAY_SIZE(ar9271Modes_9271_1_0), 6);
- INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271_1_0,
- ARRAY_SIZE(ar9271Common_9271_1_0), 2);
+ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
+ ARRAY_SIZE(ar9271Modes_9271), 6);
+ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
+ ARRAY_SIZE(ar9271Common_9271), 2);
+ INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
+ ar9271Modes_9271_1_0_only,
+ ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6);
return;
}
@@ -957,8 +949,14 @@ int ath9k_hw_init(struct ath_hw *ah)
ath9k_hw_init_cal_settings(ah);
ah->ani_function = ATH9K_ANI_ALL;
- if (AR_SREV_9280_10_OR_LATER(ah))
+ if (AR_SREV_9280_10_OR_LATER(ah)) {
ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
+ ah->ath9k_hw_rf_set_freq = &ath9k_hw_ar9280_set_channel;
+ ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_9280_spur_mitigate;
+ } else {
+ ah->ath9k_hw_rf_set_freq = &ath9k_hw_set_channel;
+ ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_spur_mitigate;
+ }
ath9k_hw_init_mode_regs(ah);
@@ -1037,6 +1035,22 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
}
+static void ath9k_hw_change_target_baud(struct ath_hw *ah, u32 freq, u32 baud)
+{
+ u32 lcr;
+ u32 baud_divider = freq * 1000 * 1000 / 16 / baud;
+
+ lcr = REG_READ(ah , 0x5100c);
+ lcr |= 0x80;
+
+ REG_WRITE(ah, 0x5100c, lcr);
+ REG_WRITE(ah, 0x51004, (baud_divider >> 8));
+ REG_WRITE(ah, 0x51000, (baud_divider & 0xff));
+
+ lcr &= ~0x80;
+ REG_WRITE(ah, 0x5100c, lcr);
+}
+
static void ath9k_hw_init_pll(struct ath_hw *ah,
struct ath9k_channel *chan)
{
@@ -1100,6 +1114,26 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
}
REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
+ /* Switch the core clock for ar9271 to 117Mhz */
+ if (AR_SREV_9271(ah)) {
+ if ((pll == 0x142c) || (pll == 0x2850) ) {
+ udelay(500);
+ /* set CLKOBS to output AHB clock */
+ REG_WRITE(ah, 0x7020, 0xe);
+ /*
+ * 0x304: 117Mhz, ahb_ratio: 1x1
+ * 0x306: 40Mhz, ahb_ratio: 1x1
+ */
+ REG_WRITE(ah, 0x50040, 0x304);
+ /*
+ * makes adjustments for the baud dividor to keep the
+ * targetted baud rate based on the used core clock.
+ */
+ ath9k_hw_change_target_baud(ah, AR9271_CORE_CLOCK,
+ AR9271_TARGET_BAUD_RATE);
+ }
+ }
+
udelay(RTC_PLL_SETTLE_DELAY);
REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
@@ -1252,7 +1286,8 @@ void ath9k_hw_detach(struct ath_hw *ah)
ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
free_hw:
- ath9k_hw_rf_free(ah);
+ if (!AR_SREV_9280_10_OR_LATER(ah))
+ ath9k_hw_rf_free_ext_banks(ah);
kfree(ah);
ah = NULL;
}
@@ -1274,7 +1309,8 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
* AR9271 1.1
*/
if (AR_SREV_9271_10(ah)) {
- val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) | AR_PHY_SPECTRAL_SCAN_ENABLE;
+ val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) |
+ AR_PHY_SPECTRAL_SCAN_ENABLE;
REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
}
else if (AR_SREV_9271_11(ah))
@@ -1489,7 +1525,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
DO_DELAY(regWrites);
}
- ath9k_hw_write_regs(ah, modesIndex, freqIndex, regWrites);
+ ath9k_hw_write_regs(ah, freqIndex, regWrites);
+
+ if (AR_SREV_9271_10(ah))
+ REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
+ modesIndex, regWrites);
if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
@@ -1832,6 +1872,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
struct ath_common *common = ath9k_hw_common(ah);
struct ieee80211_channel *channel = chan->chan;
u32 synthDelay, qnum;
+ int r;
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
if (ath9k_hw_numtxpending(ah, qnum)) {
@@ -1852,14 +1893,11 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
ath9k_hw_set_regs(ah, chan);
- if (AR_SREV_9280_10_OR_LATER(ah)) {
- ath9k_hw_ar9280_set_channel(ah, chan);
- } else {
- if (!(ath9k_hw_set_channel(ah, chan))) {
- ath_print(common, ATH_DBG_FATAL,
- "Failed to set channel\n");
- return false;
- }
+ r = ah->ath9k_hw_rf_set_freq(ah, chan);
+ if (r) {
+ ath_print(common, ATH_DBG_FATAL,
+ "Failed to set channel\n");
+ return false;
}
ah->eep_ops->set_txpower(ah, chan,
@@ -1882,10 +1920,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
ath9k_hw_set_delta_slope(ah, chan);
- if (AR_SREV_9280_10_OR_LATER(ah))
- ath9k_hw_9280_spur_mitigate(ah, chan);
- else
- ath9k_hw_spur_mitigate(ah, chan);
+ ah->ath9k_hw_spur_mitigate_freq(ah, chan);
if (!chan->oneTimeCalsDone)
chan->oneTimeCalsDone = true;
@@ -1893,457 +1928,6 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
return true;
}
-static void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
-{
- int bb_spur = AR_NO_SPUR;
- int freq;
- int bin, cur_bin;
- int bb_spur_off, spur_subchannel_sd;
- int spur_freq_sd;
- int spur_delta_phase;
- int denominator;
- int upper, lower, cur_vit_mask;
- int tmp, newVal;
- int i;
- int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
- AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
- };
- int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
- AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
- };
- int inc[4] = { 0, 100, 0, 0 };
- struct chan_centers centers;
-
- int8_t mask_m[123];
- int8_t mask_p[123];
- int8_t mask_amt;
- int tmp_mask;
- int cur_bb_spur;
- bool is2GHz = IS_CHAN_2GHZ(chan);
-
- memset(&mask_m, 0, sizeof(int8_t) * 123);
- memset(&mask_p, 0, sizeof(int8_t) * 123);
-
- ath9k_hw_get_channel_centers(ah, chan, &centers);
- freq = centers.synth_center;
-
- ah->config.spurmode = SPUR_ENABLE_EEPROM;
- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
- cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
-
- if (is2GHz)
- cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_2GHZ;
- else
- cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_5GHZ;
-
- if (AR_NO_SPUR == cur_bb_spur)
- break;
- cur_bb_spur = cur_bb_spur - freq;
-
- if (IS_CHAN_HT40(chan)) {
- if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) &&
- (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT40)) {
- bb_spur = cur_bb_spur;
- break;
- }
- } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) &&
- (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT20)) {
- bb_spur = cur_bb_spur;
- break;
- }
- }
-
- if (AR_NO_SPUR == bb_spur) {
- REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
- AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
- return;
- } else {
- REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
- AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
- }
-
- bin = bb_spur * 320;
-
- tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
-
- newVal = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
- AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
- AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
- AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
- REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
-
- newVal = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
- AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
- AR_PHY_SPUR_REG_MASK_RATE_SELECT |
- AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
- SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
- REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);
-
- if (IS_CHAN_HT40(chan)) {
- if (bb_spur < 0) {
- spur_subchannel_sd = 1;
- bb_spur_off = bb_spur + 10;
- } else {
- spur_subchannel_sd = 0;
- bb_spur_off = bb_spur - 10;
- }
- } else {
- spur_subchannel_sd = 0;
- bb_spur_off = bb_spur;
- }
-
- if (IS_CHAN_HT40(chan))
- spur_delta_phase =
- ((bb_spur * 262144) /
- 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
- else
- spur_delta_phase =
- ((bb_spur * 524288) /
- 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
-
- denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
- spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff;
-
- newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
- SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
- SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
- REG_WRITE(ah, AR_PHY_TIMING11, newVal);
-
- newVal = spur_subchannel_sd << AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S;
- REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);
-
- cur_bin = -6000;
- upper = bin + 100;
- lower = bin - 100;
-
- for (i = 0; i < 4; i++) {
- int pilot_mask = 0;
- int chan_mask = 0;
- int bp = 0;
- for (bp = 0; bp < 30; bp++) {
- if ((cur_bin > lower) && (cur_bin < upper)) {
- pilot_mask = pilot_mask | 0x1 << bp;
- chan_mask = chan_mask | 0x1 << bp;
- }
- cur_bin += 100;
- }
- cur_bin += inc[i];
- REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
- REG_WRITE(ah, chan_mask_reg[i], chan_mask);
- }
-
- cur_vit_mask = 6100;
- upper = bin + 120;
- lower = bin - 120;
-
- for (i = 0; i < 123; i++) {
- if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
-
- /* workaround for gcc bug #37014 */
- volatile int tmp_v = abs(cur_vit_mask - bin);
-
- if (tmp_v < 75)
- mask_amt = 1;
- else
- mask_amt = 0;
- if (cur_vit_mask < 0)
- mask_m[abs(cur_vit_mask / 100)] = mask_amt;
- else
- mask_p[cur_vit_mask / 100] = mask_amt;
- }
- cur_vit_mask -= 100;
- }
-
- tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
- | (mask_m[48] << 26) | (mask_m[49] << 24)
- | (mask_m[50] << 22) | (mask_m[51] << 20)
- | (mask_m[52] << 18) | (mask_m[53] << 16)
- | (mask_m[54] << 14) | (mask_m[55] << 12)
- | (mask_m[56] << 10) | (mask_m[57] << 8)
- | (mask_m[58] << 6) | (mask_m[59] << 4)
- | (mask_m[60] << 2) | (mask_m[61] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
- REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
-
- tmp_mask = (mask_m[31] << 28)
- | (mask_m[32] << 26) | (mask_m[33] << 24)
- | (mask_m[34] << 22) | (mask_m[35] << 20)
- | (mask_m[36] << 18) | (mask_m[37] << 16)
- | (mask_m[48] << 14) | (mask_m[39] << 12)
- | (mask_m[40] << 10) | (mask_m[41] << 8)
- | (mask_m[42] << 6) | (mask_m[43] << 4)
- | (mask_m[44] << 2) | (mask_m[45] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
-
- tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
- | (mask_m[18] << 26) | (mask_m[18] << 24)
- | (mask_m[20] << 22) | (mask_m[20] << 20)
- | (mask_m[22] << 18) | (mask_m[22] << 16)
- | (mask_m[24] << 14) | (mask_m[24] << 12)
- | (mask_m[25] << 10) | (mask_m[26] << 8)
- | (mask_m[27] << 6) | (mask_m[28] << 4)
- | (mask_m[29] << 2) | (mask_m[30] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
-
- tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
- | (mask_m[2] << 26) | (mask_m[3] << 24)
- | (mask_m[4] << 22) | (mask_m[5] << 20)
- | (mask_m[6] << 18) | (mask_m[7] << 16)
- | (mask_m[8] << 14) | (mask_m[9] << 12)
- | (mask_m[10] << 10) | (mask_m[11] << 8)
- | (mask_m[12] << 6) | (mask_m[13] << 4)
- | (mask_m[14] << 2) | (mask_m[15] << 0);
- REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
-
- tmp_mask = (mask_p[15] << 28)
- | (mask_p[14] << 26) | (mask_p[13] << 24)
- | (mask_p[12] << 22) | (mask_p[11] << 20)
- | (mask_p[10] << 18) | (mask_p[9] << 16)
- | (mask_p[8] << 14) | (mask_p[7] << 12)
- | (mask_p[6] << 10) | (mask_p[5] << 8)
- | (mask_p[4] << 6) | (mask_p[3] << 4)
- | (mask_p[2] << 2) | (mask_p[1] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
-
- tmp_mask = (mask_p[30] << 28)
- | (mask_p[29] << 26) | (mask_p[28] << 24)
- | (mask_p[27] << 22) | (mask_p[26] << 20)
- | (mask_p[25] << 18) | (mask_p[24] << 16)
- | (mask_p[23] << 14) | (mask_p[22] << 12)
- | (mask_p[21] << 10) | (mask_p[20] << 8)
- | (mask_p[19] << 6) | (mask_p[18] << 4)
- | (mask_p[17] << 2) | (mask_p[16] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
-
- tmp_mask = (mask_p[45] << 28)
- | (mask_p[44] << 26) | (mask_p[43] << 24)
- | (mask_p[42] << 22) | (mask_p[41] << 20)
- | (mask_p[40] << 18) | (mask_p[39] << 16)
- | (mask_p[38] << 14) | (mask_p[37] << 12)
- | (mask_p[36] << 10) | (mask_p[35] << 8)
- | (mask_p[34] << 6) | (mask_p[33] << 4)
- | (mask_p[32] << 2) | (mask_p[31] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
-
- tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
- | (mask_p[59] << 26) | (mask_p[58] << 24)
- | (mask_p[57] << 22) | (mask_p[56] << 20)
- | (mask_p[55] << 18) | (mask_p[54] << 16)
- | (mask_p[53] << 14) | (mask_p[52] << 12)
- | (mask_p[51] << 10) | (mask_p[50] << 8)
- | (mask_p[49] << 6) | (mask_p[48] << 4)
- | (mask_p[47] << 2) | (mask_p[46] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
-}
-
-static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
-{
- int bb_spur = AR_NO_SPUR;
- int bin, cur_bin;
- int spur_freq_sd;
- int spur_delta_phase;
- int denominator;
- int upper, lower, cur_vit_mask;
- int tmp, new;
- int i;
- int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
- AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
- };
- int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
- AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
- };
- int inc[4] = { 0, 100, 0, 0 };
-
- int8_t mask_m[123];
- int8_t mask_p[123];
- int8_t mask_amt;
- int tmp_mask;
- int cur_bb_spur;
- bool is2GHz = IS_CHAN_2GHZ(chan);
-
- memset(&mask_m, 0, sizeof(int8_t) * 123);
- memset(&mask_p, 0, sizeof(int8_t) * 123);
-
- for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
- cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
- if (AR_NO_SPUR == cur_bb_spur)
- break;
- cur_bb_spur = cur_bb_spur - (chan->channel * 10);
- if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
- bb_spur = cur_bb_spur;
- break;
- }
- }
-
- if (AR_NO_SPUR == bb_spur)
- return;
-
- bin = bb_spur * 32;
-
- tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
- new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
- AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
- AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
- AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
-
- REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
-
- new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
- AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
- AR_PHY_SPUR_REG_MASK_RATE_SELECT |
- AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
- SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
- REG_WRITE(ah, AR_PHY_SPUR_REG, new);
-
- spur_delta_phase = ((bb_spur * 524288) / 100) &
- AR_PHY_TIMING11_SPUR_DELTA_PHASE;
-
- denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
- spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
-
- new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
- SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
- SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
- REG_WRITE(ah, AR_PHY_TIMING11, new);
-
- cur_bin = -6000;
- upper = bin + 100;
- lower = bin - 100;
-
- for (i = 0; i < 4; i++) {
- int pilot_mask = 0;
- int chan_mask = 0;
- int bp = 0;
- for (bp = 0; bp < 30; bp++) {
- if ((cur_bin > lower) && (cur_bin < upper)) {
- pilot_mask = pilot_mask | 0x1 << bp;
- chan_mask = chan_mask | 0x1 << bp;
- }
- cur_bin += 100;
- }
- cur_bin += inc[i];
- REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
- REG_WRITE(ah, chan_mask_reg[i], chan_mask);
- }
-
- cur_vit_mask = 6100;
- upper = bin + 120;
- lower = bin - 120;
-
- for (i = 0; i < 123; i++) {
- if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
-
- /* workaround for gcc bug #37014 */
- volatile int tmp_v = abs(cur_vit_mask - bin);
-
- if (tmp_v < 75)
- mask_amt = 1;
- else
- mask_amt = 0;
- if (cur_vit_mask < 0)
- mask_m[abs(cur_vit_mask / 100)] = mask_amt;
- else
- mask_p[cur_vit_mask / 100] = mask_amt;
- }
- cur_vit_mask -= 100;
- }
-
- tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
- | (mask_m[48] << 26) | (mask_m[49] << 24)
- | (mask_m[50] << 22) | (mask_m[51] << 20)
- | (mask_m[52] << 18) | (mask_m[53] << 16)
- | (mask_m[54] << 14) | (mask_m[55] << 12)
- | (mask_m[56] << 10) | (mask_m[57] << 8)
- | (mask_m[58] << 6) | (mask_m[59] << 4)
- | (mask_m[60] << 2) | (mask_m[61] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
- REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
-
- tmp_mask = (mask_m[31] << 28)
- | (mask_m[32] << 26) | (mask_m[33] << 24)
- | (mask_m[34] << 22) | (mask_m[35] << 20)
- | (mask_m[36] << 18) | (mask_m[37] << 16)
- | (mask_m[48] << 14) | (mask_m[39] << 12)
- | (mask_m[40] << 10) | (mask_m[41] << 8)
- | (mask_m[42] << 6) | (mask_m[43] << 4)
- | (mask_m[44] << 2) | (mask_m[45] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
-
- tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
- | (mask_m[18] << 26) | (mask_m[18] << 24)
- | (mask_m[20] << 22) | (mask_m[20] << 20)
- | (mask_m[22] << 18) | (mask_m[22] << 16)
- | (mask_m[24] << 14) | (mask_m[24] << 12)
- | (mask_m[25] << 10) | (mask_m[26] << 8)
- | (mask_m[27] << 6) | (mask_m[28] << 4)
- | (mask_m[29] << 2) | (mask_m[30] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
-
- tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
- | (mask_m[2] << 26) | (mask_m[3] << 24)
- | (mask_m[4] << 22) | (mask_m[5] << 20)
- | (mask_m[6] << 18) | (mask_m[7] << 16)
- | (mask_m[8] << 14) | (mask_m[9] << 12)
- | (mask_m[10] << 10) | (mask_m[11] << 8)
- | (mask_m[12] << 6) | (mask_m[13] << 4)
- | (mask_m[14] << 2) | (mask_m[15] << 0);
- REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
-
- tmp_mask = (mask_p[15] << 28)
- | (mask_p[14] << 26) | (mask_p[13] << 24)
- | (mask_p[12] << 22) | (mask_p[11] << 20)
- | (mask_p[10] << 18) | (mask_p[9] << 16)
- | (mask_p[8] << 14) | (mask_p[7] << 12)
- | (mask_p[6] << 10) | (mask_p[5] << 8)
- | (mask_p[4] << 6) | (mask_p[3] << 4)
- | (mask_p[2] << 2) | (mask_p[1] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
-
- tmp_mask = (mask_p[30] << 28)
- | (mask_p[29] << 26) | (mask_p[28] << 24)
- | (mask_p[27] << 22) | (mask_p[26] << 20)
- | (mask_p[25] << 18) | (mask_p[24] << 16)
- | (mask_p[23] << 14) | (mask_p[22] << 12)
- | (mask_p[21] << 10) | (mask_p[20] << 8)
- | (mask_p[19] << 6) | (mask_p[18] << 4)
- | (mask_p[17] << 2) | (mask_p[16] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
-
- tmp_mask = (mask_p[45] << 28)
- | (mask_p[44] << 26) | (mask_p[43] << 24)
- | (mask_p[42] << 22) | (mask_p[41] << 20)
- | (mask_p[40] << 18) | (mask_p[39] << 16)
- | (mask_p[38] << 14) | (mask_p[37] << 12)
- | (mask_p[36] << 10) | (mask_p[35] << 8)
- | (mask_p[34] << 6) | (mask_p[33] << 4)
- | (mask_p[32] << 2) | (mask_p[31] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
-
- tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
- | (mask_p[59] << 26) | (mask_p[58] << 24)
- | (mask_p[57] << 22) | (mask_p[56] << 20)
- | (mask_p[55] << 18) | (mask_p[54] << 16)
- | (mask_p[53] << 14) | (mask_p[52] << 12)
- | (mask_p[51] << 10) | (mask_p[50] << 8)
- | (mask_p[49] << 6) | (mask_p[48] << 4)
- | (mask_p[47] << 2) | (mask_p[46] << 0);
- REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
- REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
-}
-
static void ath9k_enable_rfkill(struct ath_hw *ah)
{
REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
@@ -2469,14 +2053,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
ath9k_hw_set_delta_slope(ah, chan);
- if (AR_SREV_9280_10_OR_LATER(ah))
- ath9k_hw_9280_spur_mitigate(ah, chan);
- else
- ath9k_hw_spur_mitigate(ah, chan);
-
+ ah->ath9k_hw_spur_mitigate_freq(ah, chan);
ah->eep_ops->set_board_values(ah, chan);
- ath9k_hw_decrease_chain_power(ah, chan);
+ if (AR_SREV_5416(ah))
+ ath9k_hw_decrease_chain_power(ah, chan);
REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(common->macaddr + 4)
@@ -2497,11 +2078,9 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
- if (AR_SREV_9280_10_OR_LATER(ah))
- ath9k_hw_ar9280_set_channel(ah, chan);
- else
- if (!(ath9k_hw_set_channel(ah, chan)))
- return -EIO;
+ r = ah->ath9k_hw_rf_set_freq(ah, chan);
+ if (r)
+ return r;
for (i = 0; i < AR_NUM_DCU; i++)
REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
@@ -4350,3 +3929,89 @@ void ath_gen_timer_isr(struct ath_hw *ah)
}
}
EXPORT_SYMBOL(ath_gen_timer_isr);
+
+static struct {
+ u32 version;
+ const char * name;
+} ath_mac_bb_names[] = {
+ /* Devices with external radios */
+ { AR_SREV_VERSION_5416_PCI, "5416" },
+ { AR_SREV_VERSION_5416_PCIE, "5418" },
+ { AR_SREV_VERSION_9100, "9100" },
+ { AR_SREV_VERSION_9160, "9160" },
+ /* Single-chip solutions */
+ { AR_SREV_VERSION_9280, "9280" },
+ { AR_SREV_VERSION_9285, "9285" },
+ { AR_SREV_VERSION_9287, "9287" },
+ { AR_SREV_VERSION_9271, "9271" },
+};
+
+/* For devices with external radios */
+static struct {
+ u16 version;
+ const char * name;
+} ath_rf_names[] = {
+ { 0, "5133" },
+ { AR_RAD5133_SREV_MAJOR, "5133" },
+ { AR_RAD5122_SREV_MAJOR, "5122" },
+ { AR_RAD2133_SREV_MAJOR, "2133" },
+ { AR_RAD2122_SREV_MAJOR, "2122" }
+};
+
+/*
+ * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
+ */
+static const char *ath9k_hw_mac_bb_name(u32 mac_bb_version)
+{
+ int i;
+
+ for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
+ if (ath_mac_bb_names[i].version == mac_bb_version) {
+ return ath_mac_bb_names[i].name;
+ }
+ }
+
+ return "????";
+}
+
+/*
+ * Return the RF name. "????" is returned if the RF is unknown.
+ * Used for devices with external radios.
+ */
+static const char *ath9k_hw_rf_name(u16 rf_version)
+{
+ int i;
+
+ for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
+ if (ath_rf_names[i].version == rf_version) {
+ return ath_rf_names[i].name;
+ }
+ }
+
+ return "????";
+}
+
+void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len)
+{
+ int used;
+
+ /* chipsets >= AR9280 are single-chip */
+ if (AR_SREV_9280_10_OR_LATER(ah)) {
+ used = snprintf(hw_name, len,
+ "Atheros AR%s Rev:%x",
+ ath9k_hw_mac_bb_name(ah->hw_version.macVersion),
+ ah->hw_version.macRev);
+ }
+ else {
+ used = snprintf(hw_name, len,
+ "Atheros AR%s MAC/BB Rev:%x AR%s RF Rev:%x",
+ ath9k_hw_mac_bb_name(ah->hw_version.macVersion),
+ ah->hw_version.macRev,
+ ath9k_hw_rf_name((ah->hw_version.analog5GhzRev &
+ AR_RADIO_SREV_MAJOR)),
+ ah->hw_version.phyRev);
+ }
+
+ hw_name[used] = '\0';
+}
+EXPORT_SYMBOL(ath9k_hw_name);
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index cdaec526db3..c7b0c4d5f75 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -148,6 +148,15 @@ enum wireless_mode {
ATH9K_MODE_MAX,
};
+/**
+ * ath9k_ant_setting - transmit antenna settings
+ *
+ * Configures the antenna setting to use for transmit.
+ *
+ * @ATH9K_ANT_VARIABLE: this means transmit on all active antennas
+ * @ATH9K_ANT_FIXED_A: this means transmit on the first antenna only
+ * @ATH9K_ANT_FIXED_B: this means transmit on the second antenna only
+ */
enum ath9k_ant_setting {
ATH9K_ANT_VARIABLE = 0,
ATH9K_ANT_FIXED_A,
@@ -539,7 +548,14 @@ struct ath_hw {
DONT_USE_32KHZ,
} enable_32kHz_clock;
- /* RF */
+ /* Callback for radio frequency change */
+ int (*ath9k_hw_rf_set_freq)(struct ath_hw *ah, struct ath9k_channel *chan);
+
+ /* Callback for baseband spur frequency */
+ void (*ath9k_hw_spur_mitigate_freq)(struct ath_hw *ah,
+ struct ath9k_channel *chan);
+
+ /* Used to program the radio on non single-chip devices */
u32 *analogBank0Data;
u32 *analogBank1Data;
u32 *analogBank2Data;
@@ -596,6 +612,7 @@ struct ath_hw {
struct ar5416IniArray iniModesAdditional;
struct ar5416IniArray iniModesRxGain;
struct ar5416IniArray iniModesTxGain;
+ struct ar5416IniArray iniModes_9271_1_0_only;
struct ar5416IniArray iniCckfirNormal;
struct ar5416IniArray iniCckfirJapan2484;
@@ -618,7 +635,6 @@ static inline struct ath_regulatory *ath9k_hw_regulatory(struct ath_hw *ah)
const char *ath9k_hw_probe(u16 vendorid, u16 devid);
void ath9k_hw_detach(struct ath_hw *ah);
int ath9k_hw_init(struct ath_hw *ah);
-void ath9k_hw_rf_free(struct ath_hw *ah);
int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
bool bChannelChange);
void ath9k_hw_fill_cap_info(struct ath_hw *ah);
@@ -704,6 +720,8 @@ void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
void ath_gen_timer_isr(struct ath_hw *hw);
u32 ath9k_hw_gettsf32(struct ath_hw *ah);
+void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len);
+
#define ATH_PCIE_CAP_LINK_CTRL 0x70
#define ATH_PCIE_CAP_LINK_L0S 1
#define ATH_PCIE_CAP_LINK_L1 2
diff --git a/drivers/net/wireless/ath/ath9k/initvals.h b/drivers/net/wireless/ath/ath9k/initvals.h
index 3ee6658d809..8a3bf3ab998 100644
--- a/drivers/net/wireless/ath/ath9k/initvals.h
+++ b/drivers/net/wireless/ath/ath9k/initvals.h
@@ -6379,8 +6379,8 @@ static const u_int32_t ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = {
};
-/* AR9271 initialization values automaticaly created: 03/23/09 */
-static const u_int32_t ar9271Modes_9271_1_0[][6] = {
+/* AR9271 initialization values automaticaly created: 06/04/09 */
+static const u_int32_t ar9271Modes_9271[][6] = {
{ 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
{ 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
{ 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
@@ -6390,8 +6390,8 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
{ 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 },
{ 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
{ 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
- { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
- { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+ { 0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e },
+ { 0x00009828, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001 },
{ 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
{ 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
{ 0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e },
@@ -6405,6 +6405,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
{ 0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
{ 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 },
{ 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 },
+ { 0x00009910, 0x30002310, 0x30002310, 0x30002310, 0x30002310, 0x30002310 },
{ 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 },
{ 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
{ 0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d },
@@ -6415,7 +6416,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
{ 0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00 },
{ 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
{ 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
- { 0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329 },
+ { 0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f },
{ 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
{ 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
{ 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
@@ -6704,7 +6705,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
{ 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e },
};
-static const u_int32_t ar9271Common_9271_1_0[][2] = {
+static const u_int32_t ar9271Common_9271[][2] = {
{ 0x0000000c, 0x00000000 },
{ 0x00000030, 0x00020045 },
{ 0x00000034, 0x00000005 },
@@ -6800,7 +6801,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x0000803c, 0x00000000 },
{ 0x00008048, 0x00000000 },
{ 0x00008054, 0x00000000 },
- { 0x00008058, 0x02000000 },
+ { 0x00008058, 0x00000000 },
{ 0x0000805c, 0x000fc78f },
{ 0x00008060, 0x0000000f },
{ 0x00008064, 0x00000000 },
@@ -6831,7 +6832,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x00008110, 0x00000168 },
{ 0x00008118, 0x000100aa },
{ 0x0000811c, 0x00003210 },
- { 0x00008120, 0x08f04814 },
+ { 0x00008120, 0x08f04810 },
{ 0x00008124, 0x00000000 },
{ 0x00008128, 0x00000000 },
{ 0x0000812c, 0x00000000 },
@@ -6878,7 +6879,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x00008258, 0x00000000 },
{ 0x0000825c, 0x400000ff },
{ 0x00008260, 0x00080922 },
- { 0x00008264, 0xa8a00010 },
+ { 0x00008264, 0x88a00010 },
{ 0x00008270, 0x00000000 },
{ 0x00008274, 0x40000000 },
{ 0x00008278, 0x003e4180 },
@@ -6910,7 +6911,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x00007814, 0x924934a8 },
{ 0x0000781c, 0x00000000 },
{ 0x00007820, 0x00000c04 },
- { 0x00007824, 0x00d86bff },
+ { 0x00007824, 0x00d8abff },
{ 0x00007828, 0x66964300 },
{ 0x0000782c, 0x8db6d961 },
{ 0x00007830, 0x8db6d96c },
@@ -6944,7 +6945,6 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x00009904, 0x00000000 },
{ 0x00009908, 0x00000000 },
{ 0x0000990c, 0x00000000 },
- { 0x00009910, 0x30002310 },
{ 0x0000991c, 0x10000fff },
{ 0x00009920, 0x04900000 },
{ 0x00009928, 0x00000001 },
@@ -6958,7 +6958,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x00009954, 0x5f3ca3de },
{ 0x00009958, 0x0108ecff },
{ 0x00009968, 0x000003ce },
- { 0x00009970, 0x192bb515 },
+ { 0x00009970, 0x192bb514 },
{ 0x00009974, 0x00000000 },
{ 0x00009978, 0x00000001 },
{ 0x0000997c, 0x00000000 },
@@ -7045,3 +7045,8 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
{ 0x0000d380, 0x7f3c7bba },
{ 0x0000d384, 0xf3307ff0 },
};
+
+static const u_int32_t ar9271Modes_9271_1_0_only[][6] = {
+ { 0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311, 0x30002311 },
+ { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
+};
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 69cf702b18c..9fefc51aec1 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -3191,64 +3191,6 @@ struct ieee80211_ops ath9k_ops = {
.rfkill_poll = ath9k_rfkill_poll_state,
};
-static struct {
- u32 version;
- const char * name;
-} ath_mac_bb_names[] = {
- { AR_SREV_VERSION_5416_PCI, "5416" },
- { AR_SREV_VERSION_5416_PCIE, "5418" },
- { AR_SREV_VERSION_9100, "9100" },
- { AR_SREV_VERSION_9160, "9160" },
- { AR_SREV_VERSION_9280, "9280" },
- { AR_SREV_VERSION_9285, "9285" },
- { AR_SREV_VERSION_9287, "9287" }
-};
-
-static struct {
- u16 version;
- const char * name;
-} ath_rf_names[] = {
- { 0, "5133" },
- { AR_RAD5133_SREV_MAJOR, "5133" },
- { AR_RAD5122_SREV_MAJOR, "5122" },
- { AR_RAD2133_SREV_MAJOR, "2133" },
- { AR_RAD2122_SREV_MAJOR, "2122" }
-};
-
-/*
- * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
- */
-const char *
-ath_mac_bb_name(u32 mac_bb_version)
-{
- int i;
-
- for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
- if (ath_mac_bb_names[i].version == mac_bb_version) {
- return ath_mac_bb_names[i].name;
- }
- }
-
- return "????";
-}
-
-/*
- * Return the RF name. "????" is returned if the RF is unknown.
- */
-const char *
-ath_rf_name(u16 rf_version)
-{
- int i;
-
- for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
- if (ath_rf_names[i].version == rf_version) {
- return ath_rf_names[i].name;
- }
- }
-
- return "????";
-}
-
static int __init ath9k_init(void)
{
int error;
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 63059b6a90d..5321f735e5a 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -114,6 +114,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
u32 val;
int ret = 0;
struct ath_hw *ah;
+ char hw_name[64];
if (pci_enable_device(pdev))
return -EIO;
@@ -218,14 +219,11 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sc->irq = pdev->irq;
ah = sc->sc_ah;
+ ath9k_hw_name(ah, hw_name, sizeof(hw_name));
printk(KERN_INFO
- "%s: Atheros AR%s MAC/BB Rev:%x "
- "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
+ "%s: %s mem=0x%lx, irq=%d\n",
wiphy_name(hw->wiphy),
- ath_mac_bb_name(ah->hw_version.macVersion),
- ah->hw_version.macRev,
- ath_rf_name((ah->hw_version.analog5GhzRev & AR_RADIO_SREV_MAJOR)),
- ah->hw_version.phyRev,
+ hw_name,
(unsigned long)mem, pdev->irq);
return 0;
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index 72a17c43a5a..13ab4d7eb7a 100644
--- a/drivers/net/wireless/ath/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -14,91 +14,70 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+/**
+ * DOC: Programming Atheros 802.11n analog front end radios
+ *
+ * AR5416 MAC based PCI devices and AR518 MAC based PCI-Express
+ * devices have either an external AR2133 analog front end radio for single
+ * band 2.4 GHz communication or an AR5133 analog front end radio for dual
+ * band 2.4 GHz / 5 GHz communication.
+ *
+ * All devices after the AR5416 and AR5418 family starting with the AR9280
+ * have their analog front radios, MAC/BB and host PCIe/USB interface embedded
+ * into a single-chip and require less programming.
+ *
+ * The following single-chips exist with a respective embedded radio:
+ *
+ * AR9280 - 11n dual-band 2x2 MIMO for PCIe
+ * AR9281 - 11n single-band 1x2 MIMO for PCIe
+ * AR9285 - 11n single-band 1x1 for PCIe
+ * AR9287 - 11n single-band 2x2 MIMO for PCIe
+ *
+ * AR9220 - 11n dual-band 2x2 MIMO for PCI
+ * AR9223 - 11n single-band 2x2 MIMO for PCI
+ *
+ * AR9287 - 11n single-band 1x1 MIMO for USB
+ */
+
#include "hw.h"
-void
-ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex,
- int regWrites)
+/**
+ * ath9k_hw_write_regs - ??
+ *
+ * @ah: atheros hardware structure
+ * @freqIndex:
+ * @regWrites:
+ *
+ * Used for both the chipsets with an external AR2133/AR5133 radios and
+ * single-chip devices.
+ */
+void ath9k_hw_write_regs(struct ath_hw *ah, u32 freqIndex, int regWrites)
{
REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);
}
-bool
-ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
-{
- struct ath_common *common = ath9k_hw_common(ah);
- u32 channelSel = 0;
- u32 bModeSynth = 0;
- u32 aModeRefSel = 0;
- u32 reg32 = 0;
- u16 freq;
- struct chan_centers centers;
-
- ath9k_hw_get_channel_centers(ah, chan, &centers);
- freq = centers.synth_center;
-
- if (freq < 4800) {
- u32 txctl;
-
- if (((freq - 2192) % 5) == 0) {
- channelSel = ((freq - 672) * 2 - 3040) / 10;
- bModeSynth = 0;
- } else if (((freq - 2224) % 5) == 0) {
- channelSel = ((freq - 704) * 2 - 3040) / 10;
- bModeSynth = 1;
- } else {
- ath_print(common, ATH_DBG_FATAL,
- "Invalid channel %u MHz\n", freq);
- return false;
- }
-
- channelSel = (channelSel << 2) & 0xff;
- channelSel = ath9k_hw_reverse_bits(channelSel, 8);
-
- txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
- if (freq == 2484) {
-
- REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
- txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
- } else {
- REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
- txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
- }
-
- } else if ((freq % 20) == 0 && freq >= 5120) {
- channelSel =
- ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
- aModeRefSel = ath9k_hw_reverse_bits(1, 2);
- } else if ((freq % 10) == 0) {
- channelSel =
- ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
- if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
- aModeRefSel = ath9k_hw_reverse_bits(2, 2);
- else
- aModeRefSel = ath9k_hw_reverse_bits(1, 2);
- } else if ((freq % 5) == 0) {
- channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
- aModeRefSel = ath9k_hw_reverse_bits(1, 2);
- } else {
- ath_print(common, ATH_DBG_FATAL,
- "Invalid channel %u MHz\n", freq);
- return false;
- }
-
- reg32 =
- (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
- (1 << 5) | 0x1;
-
- REG_WRITE(ah, AR_PHY(0x37), reg32);
-
- ah->curchan = chan;
- ah->curchan_rad_index = -1;
-
- return true;
-}
-
-void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
- struct ath9k_channel *chan)
+/**
+ * ath9k_hw_ar9280_set_channel - set channel on single-chip device
+ * @ah: atheros hardware structure
+ * @chan:
+ *
+ * This is the function to change channel on single-chip devices, that is
+ * all devices after ar9280.
+ *
+ * This function takes the channel value in MHz and sets
+ * hardware channel value. Assumes writes have been enabled to analog bus.
+ *
+ * Actual Expression,
+ *
+ * For 2GHz channel,
+ * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
+ * (freq_ref = 40MHz)
+ *
+ * For 5GHz channel,
+ * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
+ * (freq_ref = 40MHz/(24>>amodeRefSel))
+ */
+int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
{
u16 bMode, fracMode, aModeRefSel = 0;
u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -111,7 +90,7 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);
reg32 &= 0xc0000000;
- if (freq < 4800) {
+ if (freq < 4800) { /* 2 GHz, fractional mode */
u32 txctl;
int regWrites = 0;
@@ -122,6 +101,7 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
if (AR_SREV_9287_11_OR_LATER(ah)) {
if (freq == 2484) {
+ /* Enable channel spreading for channel 14 */
REG_WRITE_ARRAY(&ah->iniCckfirJapan2484,
1, regWrites);
} else {
@@ -155,10 +135,15 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
case 1:
default:
aModeRefSel = 0;
+ /*
+ * Enable 2G (fractional) mode for channels
+ * which are 5MHz spaced.
+ */
fracMode = 1;
refDivA = 1;
channelSel = (freq * 0x8000) / 15;
+ /* RefDivA setting */
REG_RMW_FIELD(ah, AR_AN_SYNTH9,
AR_AN_SYNTH9_REFDIVA, refDivA);
@@ -180,12 +165,284 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
ah->curchan = chan;
ah->curchan_rad_index = -1;
+
+ return 0;
+}
+
+/**
+ * ath9k_hw_9280_spur_mitigate - convert baseband spur frequency
+ * @ah: atheros hardware structure
+ * @chan:
+ *
+ * For single-chip solutions. Converts to baseband spur frequency given the
+ * input channel frequency and compute register settings below.
+ */
+void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
+{
+ int bb_spur = AR_NO_SPUR;
+ int freq;
+ int bin, cur_bin;
+ int bb_spur_off, spur_subchannel_sd;
+ int spur_freq_sd;
+ int spur_delta_phase;
+ int denominator;
+ int upper, lower, cur_vit_mask;
+ int tmp, newVal;
+ int i;
+ int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
+ AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
+ };
+ int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
+ AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
+ };
+ int inc[4] = { 0, 100, 0, 0 };
+ struct chan_centers centers;
+
+ int8_t mask_m[123];
+ int8_t mask_p[123];
+ int8_t mask_amt;
+ int tmp_mask;
+ int cur_bb_spur;
+ bool is2GHz = IS_CHAN_2GHZ(chan);
+
+ memset(&mask_m, 0, sizeof(int8_t) * 123);
+ memset(&mask_p, 0, sizeof(int8_t) * 123);
+
+ ath9k_hw_get_channel_centers(ah, chan, &centers);
+ freq = centers.synth_center;
+
+ ah->config.spurmode = SPUR_ENABLE_EEPROM;
+ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+ cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
+
+ if (is2GHz)
+ cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_2GHZ;
+ else
+ cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_5GHZ;
+
+ if (AR_NO_SPUR == cur_bb_spur)
+ break;
+ cur_bb_spur = cur_bb_spur - freq;
+
+ if (IS_CHAN_HT40(chan)) {
+ if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) &&
+ (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT40)) {
+ bb_spur = cur_bb_spur;
+ break;
+ }
+ } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) &&
+ (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT20)) {
+ bb_spur = cur_bb_spur;
+ break;
+ }
+ }
+
+ if (AR_NO_SPUR == bb_spur) {
+ REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
+ AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
+ return;
+ } else {
+ REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
+ AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
+ }
+
+ bin = bb_spur * 320;
+
+ tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
+
+ newVal = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
+ AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
+ AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
+ AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
+ REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
+
+ newVal = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
+ AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
+ AR_PHY_SPUR_REG_MASK_RATE_SELECT |
+ AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
+ SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
+ REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);
+
+ if (IS_CHAN_HT40(chan)) {
+ if (bb_spur < 0) {
+ spur_subchannel_sd = 1;
+ bb_spur_off = bb_spur + 10;
+ } else {
+ spur_subchannel_sd = 0;
+ bb_spur_off = bb_spur - 10;
+ }
+ } else {
+ spur_subchannel_sd = 0;
+ bb_spur_off = bb_spur;
+ }
+
+ if (IS_CHAN_HT40(chan))
+ spur_delta_phase =
+ ((bb_spur * 262144) /
+ 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+ else
+ spur_delta_phase =
+ ((bb_spur * 524288) /
+ 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+
+ denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
+ spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff;
+
+ newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
+ SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
+ SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
+ REG_WRITE(ah, AR_PHY_TIMING11, newVal);
+
+ newVal = spur_subchannel_sd << AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S;
+ REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);
+
+ cur_bin = -6000;
+ upper = bin + 100;
+ lower = bin - 100;
+
+ for (i = 0; i < 4; i++) {
+ int pilot_mask = 0;
+ int chan_mask = 0;
+ int bp = 0;
+ for (bp = 0; bp < 30; bp++) {
+ if ((cur_bin > lower) && (cur_bin < upper)) {
+ pilot_mask = pilot_mask | 0x1 << bp;
+ chan_mask = chan_mask | 0x1 << bp;
+ }
+ cur_bin += 100;
+ }
+ cur_bin += inc[i];
+ REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
+ REG_WRITE(ah, chan_mask_reg[i], chan_mask);
+ }
+
+ cur_vit_mask = 6100;
+ upper = bin + 120;
+ lower = bin - 120;
+
+ for (i = 0; i < 123; i++) {
+ if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
+
+ /* workaround for gcc bug #37014 */
+ volatile int tmp_v = abs(cur_vit_mask - bin);
+
+ if (tmp_v < 75)
+ mask_amt = 1;
+ else
+ mask_amt = 0;
+ if (cur_vit_mask < 0)
+ mask_m[abs(cur_vit_mask / 100)] = mask_amt;
+ else
+ mask_p[cur_vit_mask / 100] = mask_amt;
+ }
+ cur_vit_mask -= 100;
+ }
+
+ tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
+ | (mask_m[48] << 26) | (mask_m[49] << 24)
+ | (mask_m[50] << 22) | (mask_m[51] << 20)
+ | (mask_m[52] << 18) | (mask_m[53] << 16)
+ | (mask_m[54] << 14) | (mask_m[55] << 12)
+ | (mask_m[56] << 10) | (mask_m[57] << 8)
+ | (mask_m[58] << 6) | (mask_m[59] << 4)
+ | (mask_m[60] << 2) | (mask_m[61] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
+ REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
+
+ tmp_mask = (mask_m[31] << 28)
+ | (mask_m[32] << 26) | (mask_m[33] << 24)
+ | (mask_m[34] << 22) | (mask_m[35] << 20)
+ | (mask_m[36] << 18) | (mask_m[37] << 16)
+ | (mask_m[48] << 14) | (mask_m[39] << 12)
+ | (mask_m[40] << 10) | (mask_m[41] << 8)
+ | (mask_m[42] << 6) | (mask_m[43] << 4)
+ | (mask_m[44] << 2) | (mask_m[45] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
+
+ tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
+ | (mask_m[18] << 26) | (mask_m[18] << 24)
+ | (mask_m[20] << 22) | (mask_m[20] << 20)
+ | (mask_m[22] << 18) | (mask_m[22] << 16)
+ | (mask_m[24] << 14) | (mask_m[24] << 12)
+ | (mask_m[25] << 10) | (mask_m[26] << 8)
+ | (mask_m[27] << 6) | (mask_m[28] << 4)
+ | (mask_m[29] << 2) | (mask_m[30] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
+
+ tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
+ | (mask_m[2] << 26) | (mask_m[3] << 24)
+ | (mask_m[4] << 22) | (mask_m[5] << 20)
+ | (mask_m[6] << 18) | (mask_m[7] << 16)
+ | (mask_m[8] << 14) | (mask_m[9] << 12)
+ | (mask_m[10] << 10) | (mask_m[11] << 8)
+ | (mask_m[12] << 6) | (mask_m[13] << 4)
+ | (mask_m[14] << 2) | (mask_m[15] << 0);
+ REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
+
+ tmp_mask = (mask_p[15] << 28)
+ | (mask_p[14] << 26) | (mask_p[13] << 24)
+ | (mask_p[12] << 22) | (mask_p[11] << 20)
+ | (mask_p[10] << 18) | (mask_p[9] << 16)
+ | (mask_p[8] << 14) | (mask_p[7] << 12)
+ | (mask_p[6] << 10) | (mask_p[5] << 8)
+ | (mask_p[4] << 6) | (mask_p[3] << 4)
+ | (mask_p[2] << 2) | (mask_p[1] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
+
+ tmp_mask = (mask_p[30] << 28)
+ | (mask_p[29] << 26) | (mask_p[28] << 24)
+ | (mask_p[27] << 22) | (mask_p[26] << 20)
+ | (mask_p[25] << 18) | (mask_p[24] << 16)
+ | (mask_p[23] << 14) | (mask_p[22] << 12)
+ | (mask_p[21] << 10) | (mask_p[20] << 8)
+ | (mask_p[19] << 6) | (mask_p[18] << 4)
+ | (mask_p[17] << 2) | (mask_p[16] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
+
+ tmp_mask = (mask_p[45] << 28)
+ | (mask_p[44] << 26) | (mask_p[43] << 24)
+ | (mask_p[42] << 22) | (mask_p[41] << 20)
+ | (mask_p[40] << 18) | (mask_p[39] << 16)
+ | (mask_p[38] << 14) | (mask_p[37] << 12)
+ | (mask_p[36] << 10) | (mask_p[35] << 8)
+ | (mask_p[34] << 6) | (mask_p[33] << 4)
+ | (mask_p[32] << 2) | (mask_p[31] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
+
+ tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
+ | (mask_p[59] << 26) | (mask_p[58] << 24)
+ | (mask_p[57] << 22) | (mask_p[56] << 20)
+ | (mask_p[55] << 18) | (mask_p[54] << 16)
+ | (mask_p[53] << 14) | (mask_p[52] << 12)
+ | (mask_p[51] << 10) | (mask_p[50] << 8)
+ | (mask_p[49] << 6) | (mask_p[48] << 4)
+ | (mask_p[47] << 2) | (mask_p[46] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
}
-static void
-ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
- u32 numBits, u32 firstBit,
- u32 column)
+/* All code below is for non single-chip solutions */
+
+/**
+ * ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
+ * @rfbuf:
+ * @reg32:
+ * @numBits:
+ * @firstBit:
+ * @column:
+ *
+ * Performs analog "swizzling" of parameters into their location.
+ * Used on external AR2133/AR5133 radios.
+ */
+static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
+ u32 numBits, u32 firstBit,
+ u32 column)
{
u32 tmp32, mask, arrayEntry, lastBit;
int32_t bitPosition, bitsLeft;
@@ -209,26 +466,556 @@ ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
}
}
-bool
-ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
- u16 modesIndex)
+/*
+ * Fix on 2.4 GHz band for orientation sensitivity issue by increasing
+ * rf_pwd_icsyndiv.
+ *
+ * Theoretical Rules:
+ * if 2 GHz band
+ * if forceBiasAuto
+ * if synth_freq < 2412
+ * bias = 0
+ * else if 2412 <= synth_freq <= 2422
+ * bias = 1
+ * else // synth_freq > 2422
+ * bias = 2
+ * else if forceBias > 0
+ * bias = forceBias & 7
+ * else
+ * no change, use value from ini file
+ * else
+ * no change, invalid band
+ *
+ * 1st Mod:
+ * 2422 also uses value of 2
+ * <approved>
+ *
+ * 2nd Mod:
+ * Less than 2412 uses value of 0, 2412 and above uses value of 2
+ */
+static void ath9k_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
+{
+ struct ath_common *common = ath9k_hw_common(ah);
+ u32 tmp_reg;
+ int reg_writes = 0;
+ u32 new_bias = 0;
+
+ if (!AR_SREV_5416(ah) || synth_freq >= 3000) {
+ return;
+ }
+
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+
+ if (synth_freq < 2412)
+ new_bias = 0;
+ else if (synth_freq < 2422)
+ new_bias = 1;
+ else
+ new_bias = 2;
+
+ /* pre-reverse this field */
+ tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
+
+ ath_print(common, ATH_DBG_CONFIG,
+ "Force rf_pwd_icsyndiv to %1d on %4d\n",
+ new_bias, synth_freq);
+
+ /* swizzle rf_pwd_icsyndiv */
+ ath9k_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
+
+ /* write Bank 6 with new params */
+ REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
+}
+
+/**
+ * ath9k_hw_decrease_chain_power()
+ *
+ * @ah: atheros hardware structure
+ * @chan:
+ *
+ * Only used on the AR5416 and AR5418 with the external AR2133/AR5133 radios.
+ *
+ * Sets a chain internal RF path to the lowest output power. Any
+ * further writes to bank6 after this setting will override these
+ * changes. Thus this function must be the last function in the
+ * sequence to modify bank 6.
+ *
+ * This function must be called after ar5416SetRfRegs() which is
+ * called from ath9k_hw_process_ini() due to swizzling of bank 6.
+ * Depends on ah->analogBank6Data being initialized by
+ * ath9k_hw_set_rf_regs()
+ *
+ * Additional additive reduction in power -
+ * change chain's switch table so chain's tx state is actually the rx
+ * state value. May produce different results in 2GHz/5GHz as well as
+ * board to board but in general should be a reduction.
+ *
+ * Activated by #ifdef ALTER_SWITCH. Not tried yet. If so, must be
+ * called after ah->eep_ops->set_board_values() due to RMW of
+ * PHY_SWITCH_CHAIN_0.
+ */
+void ath9k_hw_decrease_chain_power(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+{
+ int i, regWrites = 0;
+ u32 bank6SelMask;
+ u32 *bank6Temp = ah->bank6Temp;
+
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+
+ switch (ah->config.diversity_control) {
+ case ATH9K_ANT_FIXED_A:
+ bank6SelMask =
+ (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
+ REDUCE_CHAIN_0 : /* swapped, reduce chain 0 */
+ REDUCE_CHAIN_1; /* normal, select chain 1/2 to reduce */
+ break;
+ case ATH9K_ANT_FIXED_B:
+ bank6SelMask =
+ (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
+ REDUCE_CHAIN_1 : /* swapped, reduce chain 1/2 */
+ REDUCE_CHAIN_0; /* normal, select chain 0 to reduce */
+ break;
+ case ATH9K_ANT_VARIABLE:
+ return; /* do not change anything */
+ break;
+ default:
+ return; /* do not change anything */
+ break;
+ }
+
+ for (i = 0; i < ah->iniBank6.ia_rows; i++)
+ bank6Temp[i] = ah->analogBank6Data[i];
+
+ /* Write Bank 5 to switch Bank 6 write to selected chain only */
+ REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
+
+ /*
+ * Modify Bank6 selected chain to use lowest amplification.
+ * Modifies the parameters to a value of 1.
+ * Depends on existing bank 6 values to be cached in
+ * ah->analogBank6Data
+ */
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
+ ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
+
+ REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
+
+ REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
+#ifdef ALTER_SWITCH
+ REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
+ (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
+ | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
+#endif
+}
+
+/**
+ * ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
+ * @ah: atheros hardware stucture
+ * @chan:
+ *
+ * For the external AR2133/AR5133 radios, takes the MHz channel value and set
+ * the channel value. Assumes writes enabled to analog bus and bank6 register
+ * cache in ah->analogBank6Data.
+ */
+int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
+{
+ struct ath_common *common = ath9k_hw_common(ah);
+ u32 channelSel = 0;
+ u32 bModeSynth = 0;
+ u32 aModeRefSel = 0;
+ u32 reg32 = 0;
+ u16 freq;
+ struct chan_centers centers;
+
+ ath9k_hw_get_channel_centers(ah, chan, &centers);
+ freq = centers.synth_center;
+
+ if (freq < 4800) {
+ u32 txctl;
+
+ if (((freq - 2192) % 5) == 0) {
+ channelSel = ((freq - 672) * 2 - 3040) / 10;
+ bModeSynth = 0;
+ } else if (((freq - 2224) % 5) == 0) {
+ channelSel = ((freq - 704) * 2 - 3040) / 10;
+ bModeSynth = 1;
+ } else {
+ ath_print(common, ATH_DBG_FATAL,
+ "Invalid channel %u MHz\n", freq);
+ return -EINVAL;
+ }
+
+ channelSel = (channelSel << 2) & 0xff;
+ channelSel = ath9k_hw_reverse_bits(channelSel, 8);
+
+ txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
+ if (freq == 2484) {
+
+ REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+ txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
+ } else {
+ REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
+ txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
+ }
+
+ } else if ((freq % 20) == 0 && freq >= 5120) {
+ channelSel =
+ ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
+ aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+ } else if ((freq % 10) == 0) {
+ channelSel =
+ ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
+ if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
+ aModeRefSel = ath9k_hw_reverse_bits(2, 2);
+ else
+ aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+ } else if ((freq % 5) == 0) {
+ channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
+ aModeRefSel = ath9k_hw_reverse_bits(1, 2);
+ } else {
+ ath_print(common, ATH_DBG_FATAL,
+ "Invalid channel %u MHz\n", freq);
+ return -EINVAL;
+ }
+
+ ath9k_hw_force_bias(ah, freq);
+ ath9k_hw_decrease_chain_power(ah, chan);
+
+ reg32 =
+ (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
+ (1 << 5) | 0x1;
+
+ REG_WRITE(ah, AR_PHY(0x37), reg32);
+
+ ah->curchan = chan;
+ ah->curchan_rad_index = -1;
+
+ return 0;
+}
+
+/**
+ * ath9k_hw_spur_mitigate - convert baseband spur frequency for external radios
+ * @ah: atheros hardware structure
+ * @chan:
+ *
+ * For non single-chip solutions. Converts to baseband spur frequency given the
+ * input channel frequency and compute register settings below.
+ */
+void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
+{
+ int bb_spur = AR_NO_SPUR;
+ int bin, cur_bin;
+ int spur_freq_sd;
+ int spur_delta_phase;
+ int denominator;
+ int upper, lower, cur_vit_mask;
+ int tmp, new;
+ int i;
+ int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
+ AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
+ };
+ int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
+ AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
+ };
+ int inc[4] = { 0, 100, 0, 0 };
+
+ int8_t mask_m[123];
+ int8_t mask_p[123];
+ int8_t mask_amt;
+ int tmp_mask;
+ int cur_bb_spur;
+ bool is2GHz = IS_CHAN_2GHZ(chan);
+
+ memset(&mask_m, 0, sizeof(int8_t) * 123);
+ memset(&mask_p, 0, sizeof(int8_t) * 123);
+
+ for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
+ cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
+ if (AR_NO_SPUR == cur_bb_spur)
+ break;
+ cur_bb_spur = cur_bb_spur - (chan->channel * 10);
+ if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
+ bb_spur = cur_bb_spur;
+ break;
+ }
+ }
+
+ if (AR_NO_SPUR == bb_spur)
+ return;
+
+ bin = bb_spur * 32;
+
+ tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
+ new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
+ AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
+ AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
+ AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
+
+ REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
+
+ new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
+ AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
+ AR_PHY_SPUR_REG_MASK_RATE_SELECT |
+ AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
+ SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
+ REG_WRITE(ah, AR_PHY_SPUR_REG, new);
+
+ spur_delta_phase = ((bb_spur * 524288) / 100) &
+ AR_PHY_TIMING11_SPUR_DELTA_PHASE;
+
+ denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
+ spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
+
+ new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
+ SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
+ SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
+ REG_WRITE(ah, AR_PHY_TIMING11, new);
+
+ cur_bin = -6000;
+ upper = bin + 100;
+ lower = bin - 100;
+
+ for (i = 0; i < 4; i++) {
+ int pilot_mask = 0;
+ int chan_mask = 0;
+ int bp = 0;
+ for (bp = 0; bp < 30; bp++) {
+ if ((cur_bin > lower) && (cur_bin < upper)) {
+ pilot_mask = pilot_mask | 0x1 << bp;
+ chan_mask = chan_mask | 0x1 << bp;
+ }
+ cur_bin += 100;
+ }
+ cur_bin += inc[i];
+ REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
+ REG_WRITE(ah, chan_mask_reg[i], chan_mask);
+ }
+
+ cur_vit_mask = 6100;
+ upper = bin + 120;
+ lower = bin - 120;
+
+ for (i = 0; i < 123; i++) {
+ if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
+
+ /* workaround for gcc bug #37014 */
+ volatile int tmp_v = abs(cur_vit_mask - bin);
+
+ if (tmp_v < 75)
+ mask_amt = 1;
+ else
+ mask_amt = 0;
+ if (cur_vit_mask < 0)
+ mask_m[abs(cur_vit_mask / 100)] = mask_amt;
+ else
+ mask_p[cur_vit_mask / 100] = mask_amt;
+ }
+ cur_vit_mask -= 100;
+ }
+
+ tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
+ | (mask_m[48] << 26) | (mask_m[49] << 24)
+ | (mask_m[50] << 22) | (mask_m[51] << 20)
+ | (mask_m[52] << 18) | (mask_m[53] << 16)
+ | (mask_m[54] << 14) | (mask_m[55] << 12)
+ | (mask_m[56] << 10) | (mask_m[57] << 8)
+ | (mask_m[58] << 6) | (mask_m[59] << 4)
+ | (mask_m[60] << 2) | (mask_m[61] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
+ REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
+
+ tmp_mask = (mask_m[31] << 28)
+ | (mask_m[32] << 26) | (mask_m[33] << 24)
+ | (mask_m[34] << 22) | (mask_m[35] << 20)
+ | (mask_m[36] << 18) | (mask_m[37] << 16)
+ | (mask_m[48] << 14) | (mask_m[39] << 12)
+ | (mask_m[40] << 10) | (mask_m[41] << 8)
+ | (mask_m[42] << 6) | (mask_m[43] << 4)
+ | (mask_m[44] << 2) | (mask_m[45] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
+
+ tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
+ | (mask_m[18] << 26) | (mask_m[18] << 24)
+ | (mask_m[20] << 22) | (mask_m[20] << 20)
+ | (mask_m[22] << 18) | (mask_m[22] << 16)
+ | (mask_m[24] << 14) | (mask_m[24] << 12)
+ | (mask_m[25] << 10) | (mask_m[26] << 8)
+ | (mask_m[27] << 6) | (mask_m[28] << 4)
+ | (mask_m[29] << 2) | (mask_m[30] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
+
+ tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
+ | (mask_m[2] << 26) | (mask_m[3] << 24)
+ | (mask_m[4] << 22) | (mask_m[5] << 20)
+ | (mask_m[6] << 18) | (mask_m[7] << 16)
+ | (mask_m[8] << 14) | (mask_m[9] << 12)
+ | (mask_m[10] << 10) | (mask_m[11] << 8)
+ | (mask_m[12] << 6) | (mask_m[13] << 4)
+ | (mask_m[14] << 2) | (mask_m[15] << 0);
+ REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
+
+ tmp_mask = (mask_p[15] << 28)
+ | (mask_p[14] << 26) | (mask_p[13] << 24)
+ | (mask_p[12] << 22) | (mask_p[11] << 20)
+ | (mask_p[10] << 18) | (mask_p[9] << 16)
+ | (mask_p[8] << 14) | (mask_p[7] << 12)
+ | (mask_p[6] << 10) | (mask_p[5] << 8)
+ | (mask_p[4] << 6) | (mask_p[3] << 4)
+ | (mask_p[2] << 2) | (mask_p[1] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
+
+ tmp_mask = (mask_p[30] << 28)
+ | (mask_p[29] << 26) | (mask_p[28] << 24)
+ | (mask_p[27] << 22) | (mask_p[26] << 20)
+ | (mask_p[25] << 18) | (mask_p[24] << 16)
+ | (mask_p[23] << 14) | (mask_p[22] << 12)
+ | (mask_p[21] << 10) | (mask_p[20] << 8)
+ | (mask_p[19] << 6) | (mask_p[18] << 4)
+ | (mask_p[17] << 2) | (mask_p[16] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
+
+ tmp_mask = (mask_p[45] << 28)
+ | (mask_p[44] << 26) | (mask_p[43] << 24)
+ | (mask_p[42] << 22) | (mask_p[41] << 20)
+ | (mask_p[40] << 18) | (mask_p[39] << 16)
+ | (mask_p[38] << 14) | (mask_p[37] << 12)
+ | (mask_p[36] << 10) | (mask_p[35] << 8)
+ | (mask_p[34] << 6) | (mask_p[33] << 4)
+ | (mask_p[32] << 2) | (mask_p[31] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
+
+ tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
+ | (mask_p[59] << 26) | (mask_p[58] << 24)
+ | (mask_p[57] << 22) | (mask_p[56] << 20)
+ | (mask_p[55] << 18) | (mask_p[54] << 16)
+ | (mask_p[53] << 14) | (mask_p[52] << 12)
+ | (mask_p[51] << 10) | (mask_p[50] << 8)
+ | (mask_p[49] << 6) | (mask_p[48] << 4)
+ | (mask_p[47] << 2) | (mask_p[46] << 0);
+ REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
+ REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
+}
+
+/**
+ * ath9k_hw_rf_alloc_ext_banks - allocates banks for external radio programming
+ * @ah: atheros hardware structure
+ *
+ * Only required for older devices with external AR2133/AR5133 radios.
+ */
+int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
+{
+#define ATH_ALLOC_BANK(bank, size) do { \
+ bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
+ if (!bank) { \
+ ath_print(common, ATH_DBG_FATAL, \
+ "Cannot allocate RF banks\n"); \
+ return -ENOMEM; \
+ } \
+ } while (0);
+
+ struct ath_common *common = ath9k_hw_common(ah);
+
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+
+ ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
+ ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
+ ATH_ALLOC_BANK(ah->addac5416_21,
+ ah->iniAddac.ia_rows * ah->iniAddac.ia_columns);
+ ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
+
+ return 0;
+#undef ATH_ALLOC_BANK
+}
+
+
+/**
+ * ath9k_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
+ * @ah: atheros hardware struture
+ * For the external AR2133/AR5133 radios banks.
+ */
+void
+ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
+{
+#define ATH_FREE_BANK(bank) do { \
+ kfree(bank); \
+ bank = NULL; \
+ } while (0);
+
+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
+
+ ATH_FREE_BANK(ah->analogBank0Data);
+ ATH_FREE_BANK(ah->analogBank1Data);
+ ATH_FREE_BANK(ah->analogBank2Data);
+ ATH_FREE_BANK(ah->analogBank3Data);
+ ATH_FREE_BANK(ah->analogBank6Data);
+ ATH_FREE_BANK(ah->analogBank6TPCData);
+ ATH_FREE_BANK(ah->analogBank7Data);
+ ATH_FREE_BANK(ah->addac5416_21);
+ ATH_FREE_BANK(ah->bank6Temp);
+
+#undef ATH_FREE_BANK
+}
+
+/* *
+ * ath9k_hw_set_rf_regs - programs rf registers based on EEPROM
+ * @ah: atheros hardware structure
+ * @chan:
+ * @modesIndex:
+ *
+ * Used for the external AR2133/AR5133 radios.
+ *
+ * Reads the EEPROM header info from the device structure and programs
+ * all rf registers. This routine requires access to the analog
+ * rf device. This is not required for single-chip devices.
+ */
+bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
+ u16 modesIndex)
{
u32 eepMinorRev;
u32 ob5GHz = 0, db5GHz = 0;
u32 ob2GHz = 0, db2GHz = 0;
int regWrites = 0;
+ /*
+ * Software does not need to program bank data
+ * for single chip devices, that is AR9280 or anything
+ * after that.
+ */
if (AR_SREV_9280_10_OR_LATER(ah))
return true;
+ /* Setup rf parameters */
eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
+ /* Setup Bank 0 Write */
RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1);
+ /* Setup Bank 1 Write */
RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1);
+ /* Setup Bank 2 Write */
RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1);
+ /* Setup Bank 6 Write */
RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3,
modesIndex);
{
@@ -239,6 +1026,7 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
}
}
+ /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
if (eepMinorRev >= 2) {
if (IS_CHAN_2GHZ(chan)) {
ob2GHz = ah->eep_ops->get_eeprom(ah, EEP_OB_2);
@@ -257,8 +1045,10 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
}
}
+ /* Setup Bank 7 Setup */
RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1);
+ /* Write Analog registers */
REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
regWrites);
REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
@@ -274,139 +1064,3 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
return true;
}
-
-void
-ath9k_hw_rf_free(struct ath_hw *ah)
-{
-#define ATH_FREE_BANK(bank) do { \
- kfree(bank); \
- bank = NULL; \
- } while (0);
-
- ATH_FREE_BANK(ah->analogBank0Data);
- ATH_FREE_BANK(ah->analogBank1Data);
- ATH_FREE_BANK(ah->analogBank2Data);
- ATH_FREE_BANK(ah->analogBank3Data);
- ATH_FREE_BANK(ah->analogBank6Data);
- ATH_FREE_BANK(ah->analogBank6TPCData);
- ATH_FREE_BANK(ah->analogBank7Data);
- ATH_FREE_BANK(ah->addac5416_21);
- ATH_FREE_BANK(ah->bank6Temp);
-#undef ATH_FREE_BANK
-}
-
-bool ath9k_hw_init_rf(struct ath_hw *ah, int *status)
-{
- struct ath_common *common = ath9k_hw_common(ah);
-
- if (!AR_SREV_9280_10_OR_LATER(ah)) {
- ah->analogBank0Data =
- kzalloc((sizeof(u32) *
- ah->iniBank0.ia_rows), GFP_KERNEL);
- ah->analogBank1Data =
- kzalloc((sizeof(u32) *
- ah->iniBank1.ia_rows), GFP_KERNEL);
- ah->analogBank2Data =
- kzalloc((sizeof(u32) *
- ah->iniBank2.ia_rows), GFP_KERNEL);
- ah->analogBank3Data =
- kzalloc((sizeof(u32) *
- ah->iniBank3.ia_rows), GFP_KERNEL);
- ah->analogBank6Data =
- kzalloc((sizeof(u32) *
- ah->iniBank6.ia_rows), GFP_KERNEL);
- ah->analogBank6TPCData =
- kzalloc((sizeof(u32) *
- ah->iniBank6TPC.ia_rows), GFP_KERNEL);
- ah->analogBank7Data =
- kzalloc((sizeof(u32) *
- ah->iniBank7.ia_rows), GFP_KERNEL);
-
- if (ah->analogBank0Data == NULL
- || ah->analogBank1Data == NULL
- || ah->analogBank2Data == NULL
- || ah->analogBank3Data == NULL
- || ah->analogBank6Data == NULL
- || ah->analogBank6TPCData == NULL
- || ah->analogBank7Data == NULL) {
- ath_print(common, ATH_DBG_FATAL,
- "Cannot allocate RF banks\n");
- *status = -ENOMEM;
- return false;
- }
-
- ah->addac5416_21 =
- kzalloc((sizeof(u32) *
- ah->iniAddac.ia_rows *
- ah->iniAddac.ia_columns), GFP_KERNEL);
- if (ah->addac5416_21 == NULL) {
- ath_print(common, ATH_DBG_FATAL,
- "Cannot allocate addac5416_21\n");
- *status = -ENOMEM;
- return false;
- }
-
- ah->bank6Temp =
- kzalloc((sizeof(u32) *
- ah->iniBank6.ia_rows), GFP_KERNEL);
- if (ah->bank6Temp == NULL) {
- ath_print(common, ATH_DBG_FATAL,
- "Cannot allocate bank6Temp\n");
- *status = -ENOMEM;
- return false;
- }
- }
-
- return true;
-}
-
-void
-ath9k_hw_decrease_chain_power(struct ath_hw *ah, struct ath9k_channel *chan)
-{
- int i, regWrites = 0;
- u32 bank6SelMask;
- u32 *bank6Temp = ah->bank6Temp;
-
- switch (ah->config.diversity_control) {
- case ATH9K_ANT_FIXED_A:
- bank6SelMask =
- (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
- REDUCE_CHAIN_0 : REDUCE_CHAIN_1;
- break;
- case ATH9K_ANT_FIXED_B:
- bank6SelMask =
- (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
- REDUCE_CHAIN_1 : REDUCE_CHAIN_0;
- break;
- case ATH9K_ANT_VARIABLE:
- return;
- break;
- default:
- return;
- break;
- }
-
- for (i = 0; i < ah->iniBank6.ia_rows; i++)
- bank6Temp[i] = ah->analogBank6Data[i];
-
- REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
-
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
- ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
-
- REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
-
- REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
-#ifdef ALTER_SWITCH
- REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
- (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
- | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
-#endif
-}
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index 140fef74c66..dc145a135dc 100644
--- a/drivers/net/wireless/ath/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -17,20 +17,26 @@
#ifndef PHY_H
#define PHY_H
-void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
- struct ath9k_channel
- *chan);
-bool ath9k_hw_set_channel(struct ath_hw *ah,
- struct ath9k_channel *chan);
-void ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex,
- u32 freqIndex, int regWrites);
+/* Common between single chip and non single-chip solutions */
+void ath9k_hw_write_regs(struct ath_hw *ah, u32 freqIndex, int regWrites);
+
+/* Single chip radio settings */
+int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
+void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
+
+/* Routines below are for non single-chip solutions */
+int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
+void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
+
+int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah);
+void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah);
+
bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
struct ath9k_channel *chan,
u16 modesIndex);
+
void ath9k_hw_decrease_chain_power(struct ath_hw *ah,
struct ath9k_channel *chan);
-bool ath9k_hw_init_rf(struct ath_hw *ah,
- int *status);
#define AR_PHY_BASE 0x9800
#define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
@@ -186,8 +192,20 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_PLL_CTL_44_2133 0xeb
#define AR_PHY_PLL_CTL_40_2133 0xea
-#define AR_PHY_SPECTRAL_SCAN 0x9912
-#define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1
+#define AR_PHY_SPECTRAL_SCAN 0x9910 /* AR9280 spectral scan configuration register */
+#define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1
+#define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001 /* Enable spectral scan, reg 68, bit 0 */
+#define AR_PHY_SPECTRAL_SCAN_ENA_S 0 /* Enable spectral scan, reg 68, bit 0 */
+#define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002 /* Activate spectral scan reg 68, bit 1*/
+#define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1 /* Activate spectral scan reg 68, bit 1*/
+#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0 /* Interval for FFT reports, reg 68, bits 4-7*/
+#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD_S 4
+#define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00 /* Interval for FFT reports, reg 68, bits 8-15*/
+#define AR_PHY_SPECTRAL_SCAN_PERIOD_S 8
+#define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000 /* Number of reports, reg 68, bits 16-23*/
+#define AR_PHY_SPECTRAL_SCAN_COUNT_S 16
+#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 /* Short repeat, reg 68, bit 24*/
+#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 /* Short repeat, reg 68, bit 24*/
#define AR_PHY_RX_DELAY 0x9914
#define AR_PHY_SEARCH_START_DELAY 0x9918
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index c880a55939b..355dd1834e1 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -202,7 +202,8 @@ static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
}
rcu_read_lock();
- sta = ieee80211_find_sta(sc->hw, hdr->addr2);
+ /* XXX: use ieee80211_find_sta! */
+ sta = ieee80211_find_sta_by_hw(sc->hw, hdr->addr2);
if (sta) {
an = (struct ath_node *) sta->drv_priv;
if (ds->ds_rxstat.rs_rssi != ATH9K_RSSI_BAD &&
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index ceed0095efa..061e12ce0b2 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -1704,4 +1704,7 @@ enum {
#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24)
#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28)
+#define AR9271_CORE_CLOCK 117 /* clock to 117Mhz */
+#define AR9271_TARGET_BAUD_RATE 19200 /* 115200 */
+
#endif
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 2a4efcbced6..8e052f406c3 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -282,7 +282,8 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
rcu_read_lock();
- sta = ieee80211_find_sta(sc->hw, hdr->addr1);
+ /* XXX: use ieee80211_find_sta! */
+ sta = ieee80211_find_sta_by_hw(sc->hw, hdr->addr1);
if (!sta) {
rcu_read_unlock();
return;
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index 54ea61c15d8..64c12e1bced 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -1,6 +1,6 @@
config B43
tristate "Broadcom 43xx wireless support (mac80211 stack)"
- depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA
+ depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
select SSB
select FW_LOADER
---help---
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 65b23f725a0..fe3bf949199 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -26,8 +26,6 @@
# define B43_DEBUG 0
#endif
-#define B43_RX_MAX_SSI 60
-
/* MMIO offsets */
#define B43_MMIO_DMA0_REASON 0x20
#define B43_MMIO_DMA0_IRQ_MASK 0x24
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index ed6e96a3474..c806924c7b5 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -3573,7 +3573,7 @@ static int b43_op_config(struct ieee80211_hw *hw, u32 changed)
if (conf->channel->hw_value != phy->channel)
b43_switch_channel(dev, conf->channel->hw_value);
- dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
+ dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
/* Adjust the desired TX power level. */
if (conf->power_level != 0) {
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index c6987b147af..3e046ec1ff8 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -67,6 +67,7 @@ static void b43_lpphy_op_prepare_structs(struct b43_wldev *dev)
struct b43_phy_lp *lpphy = phy->lp;
memset(lpphy, 0, sizeof(*lpphy));
+ lpphy->antenna = B43_ANTENNA_DEFAULT;
//TODO
}
@@ -379,8 +380,6 @@ static void lpphy_save_dig_flt_state(struct b43_wldev *dev)
}
}
-/* lpphy_restore_dig_flt_state is unused but kept as a reference */
-#if 0
static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
{
static const u16 addr[] = {
@@ -401,7 +400,6 @@ static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
for (i = 0; i < ARRAY_SIZE(addr); i++)
b43_phy_write(dev, addr[i], lpphy->dig_flt_state[i]);
}
-#endif
static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
{
@@ -754,11 +752,17 @@ static void lpphy_clear_deaf(struct b43_wldev *dev, bool user)
}
}
+static void lpphy_set_trsw_over(struct b43_wldev *dev, bool tx, bool rx)
+{
+ u16 trsw = (tx << 1) | rx;
+ b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, trsw);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
+}
+
static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
{
lpphy_set_deaf(dev, user);
- b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x1);
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
+ lpphy_set_trsw_over(dev, false, true);
b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
@@ -793,6 +797,60 @@ static void lpphy_restore_crs(struct b43_wldev *dev, bool user)
struct lpphy_tx_gains { u16 gm, pga, pad, dac; };
+static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
+{
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
+ if (dev->phy.rev >= 2) {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
+ if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
+ b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
+ }
+ } else {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
+ }
+}
+
+static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
+{
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
+ if (dev->phy.rev >= 2) {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
+ if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
+ b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
+ }
+ } else {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
+ }
+}
+
+static void lpphy_disable_tx_gain_override(struct b43_wldev *dev)
+{
+ if (dev->phy.rev < 2)
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
+ else {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF);
+ }
+ b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF);
+}
+
+static void lpphy_enable_tx_gain_override(struct b43_wldev *dev)
+{
+ if (dev->phy.rev < 2)
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
+ else {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x80);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x4000);
+ }
+ b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x40);
+}
+
static struct lpphy_tx_gains lpphy_get_tx_gains(struct b43_wldev *dev)
{
struct lpphy_tx_gains gains;
@@ -822,6 +880,17 @@ static void lpphy_set_dac_gain(struct b43_wldev *dev, u16 dac)
b43_phy_maskset(dev, B43_LPPHY_AFE_DAC_CTL, 0xF000, ctl);
}
+static u16 lpphy_get_pa_gain(struct b43_wldev *dev)
+{
+ return b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F;
+}
+
+static void lpphy_set_pa_gain(struct b43_wldev *dev, u16 gain)
+{
+ b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), 0xE03F, gain << 6);
+ b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), 0x80FF, gain << 8);
+}
+
static void lpphy_set_tx_gains(struct b43_wldev *dev,
struct lpphy_tx_gains gains)
{
@@ -832,25 +901,22 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev,
b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
0xF800, rf_gain);
} else {
- pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x1FC0;
- pa_gain <<= 2;
+ pa_gain = lpphy_get_pa_gain(dev);
b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
(gains.pga << 8) | gains.gm);
+ /*
+ * SPEC FIXME The spec calls for (pa_gain << 8) here, but that
+ * conflicts with the spec for set_pa_gain! Vendor driver bug?
+ */
b43_phy_maskset(dev, B43_PHY_OFDM(0xFB),
- 0x8000, gains.pad | pa_gain);
+ 0x8000, gains.pad | (pa_gain << 6));
b43_phy_write(dev, B43_PHY_OFDM(0xFC),
(gains.pga << 8) | gains.gm);
b43_phy_maskset(dev, B43_PHY_OFDM(0xFD),
- 0x8000, gains.pad | pa_gain);
+ 0x8000, gains.pad | (pa_gain << 8));
}
lpphy_set_dac_gain(dev, gains.dac);
- if (dev->phy.rev < 2) {
- b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF, 1 << 8);
- } else {
- b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F, 1 << 7);
- b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF, 1 << 14);
- }
- b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF, 1 << 6);
+ lpphy_enable_tx_gain_override(dev);
}
static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain)
@@ -890,41 +956,6 @@ static void lpphy_rev2plus_set_rx_gain(struct b43_wldev *dev, u32 gain)
}
}
-/* lpphy_disable_rx_gain_override is unused but kept as a reference */
-#if 0
-static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
-{
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
- if (dev->phy.rev >= 2) {
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
- if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
- b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
- }
- } else {
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
- }
-}
-#endif
-
-static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
-{
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
- if (dev->phy.rev >= 2) {
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
- if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
- b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
- }
- } else {
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
- }
-}
-
static void lpphy_set_rx_gain(struct b43_wldev *dev, u32 gain)
{
if (dev->phy.rev < 2)
@@ -1009,8 +1040,7 @@ static int lpphy_loopback(struct b43_wldev *dev)
memset(&iq_est, 0, sizeof(iq_est));
- b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x3);
- b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
+ lpphy_set_trsw_over(dev, true, true);
b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1);
b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
@@ -1132,7 +1162,7 @@ static void lpphy_set_tx_power_control(struct b43_wldev *dev,
b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM,
0x8FFF, ((u16)lpphy->tssi_npt << 16));
//TODO Set "TSSI Transmit Count" variable to total transmitted frame count
- //TODO Disable TX gain override
+ lpphy_disable_tx_gain_override(dev);
lpphy->tx_pwr_idx_over = -1;
}
}
@@ -1318,15 +1348,73 @@ static void lpphy_calibrate_rc(struct b43_wldev *dev)
}
}
+static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
+{
+ if (dev->phy.rev >= 2)
+ return; // rev2+ doesn't support antenna diversity
+
+ if (B43_WARN_ON(antenna > B43_ANTENNA_AUTO1))
+ return;
+
+ b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP);
+
+ b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2);
+ b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1);
+
+ b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ANTDIVHELP);
+
+ dev->phy.lp->antenna = antenna;
+}
+
+static void lpphy_set_tx_iqcc(struct b43_wldev *dev, u16 a, u16 b)
+{
+ u16 tmp[2];
+
+ tmp[0] = a;
+ tmp[1] = b;
+ b43_lptab_write_bulk(dev, B43_LPTAB16(0, 80), 2, tmp);
+}
+
static void lpphy_set_tx_power_by_index(struct b43_wldev *dev, u8 index)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
+ struct lpphy_tx_gains gains;
+ u32 iq_comp, tx_gain, coeff, rf_power;
lpphy->tx_pwr_idx_over = index;
+ lpphy_read_tx_pctl_mode_from_hardware(dev);
if (lpphy->txpctl_mode != B43_LPPHY_TXPCTL_OFF)
lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_SW);
-
- //TODO
+ if (dev->phy.rev >= 2) {
+ iq_comp = b43_lptab_read(dev, B43_LPTAB32(7, index + 320));
+ tx_gain = b43_lptab_read(dev, B43_LPTAB32(7, index + 192));
+ gains.pad = (tx_gain >> 16) & 0xFF;
+ gains.gm = tx_gain & 0xFF;
+ gains.pga = (tx_gain >> 8) & 0xFF;
+ gains.dac = (iq_comp >> 28) & 0xFF;
+ lpphy_set_tx_gains(dev, gains);
+ } else {
+ iq_comp = b43_lptab_read(dev, B43_LPTAB32(10, index + 320));
+ tx_gain = b43_lptab_read(dev, B43_LPTAB32(10, index + 192));
+ b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
+ 0xF800, (tx_gain >> 4) & 0x7FFF);
+ lpphy_set_dac_gain(dev, tx_gain & 0x7);
+ lpphy_set_pa_gain(dev, (tx_gain >> 24) & 0x7F);
+ }
+ lpphy_set_bb_mult(dev, (iq_comp >> 20) & 0xFF);
+ lpphy_set_tx_iqcc(dev, (iq_comp >> 10) & 0x3FF, iq_comp & 0x3FF);
+ if (dev->phy.rev >= 2) {
+ coeff = b43_lptab_read(dev, B43_LPTAB32(7, index + 448));
+ } else {
+ coeff = b43_lptab_read(dev, B43_LPTAB32(10, index + 448));
+ }
+ b43_lptab_write(dev, B43_LPTAB16(0, 85), coeff & 0xFFFF);
+ if (dev->phy.rev >= 2) {
+ rf_power = b43_lptab_read(dev, B43_LPTAB32(7, index + 576));
+ b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00,
+ rf_power & 0xFFFF);//SPEC FIXME mask & set != 0
+ }
+ lpphy_enable_tx_gain_override(dev);
}
static void lpphy_btcoex_override(struct b43_wldev *dev)
@@ -1335,58 +1423,45 @@ static void lpphy_btcoex_override(struct b43_wldev *dev)
b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF);
}
-static void lpphy_pr41573_workaround(struct b43_wldev *dev)
+static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
+ bool blocked)
{
- struct b43_phy_lp *lpphy = dev->phy.lp;
- u32 *saved_tab;
- const unsigned int saved_tab_size = 256;
- enum b43_lpphy_txpctl_mode txpctl_mode;
- s8 tx_pwr_idx_over;
- u16 tssi_npt, tssi_idx;
-
- saved_tab = kcalloc(saved_tab_size, sizeof(saved_tab[0]), GFP_KERNEL);
- if (!saved_tab) {
- b43err(dev->wl, "PR41573 failed. Out of memory!\n");
- return;
- }
-
- lpphy_read_tx_pctl_mode_from_hardware(dev);
- txpctl_mode = lpphy->txpctl_mode;
- tx_pwr_idx_over = lpphy->tx_pwr_idx_over;
- tssi_npt = lpphy->tssi_npt;
- tssi_idx = lpphy->tssi_idx;
-
- if (dev->phy.rev < 2) {
- b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140),
- saved_tab_size, saved_tab);
+ //TODO check MAC control register
+ if (blocked) {
+ if (dev->phy.rev >= 2) {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x83FF);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
+ b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0x80FF);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xDFFF);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0808);
+ } else {
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xE0FF);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFCFF);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0018);
+ }
} else {
- b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140),
- saved_tab_size, saved_tab);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xE0FF);
+ if (dev->phy.rev >= 2)
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xF7F7);
+ else
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFE7);
}
- //TODO
-
- kfree(saved_tab);
}
-static void lpphy_calibration(struct b43_wldev *dev)
+/* This was previously called lpphy_japan_filter */
+static void lpphy_set_analog_filter(struct b43_wldev *dev, int channel)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
- enum b43_lpphy_txpctl_mode saved_pctl_mode;
-
- b43_mac_suspend(dev);
-
- lpphy_btcoex_override(dev);
- lpphy_read_tx_pctl_mode_from_hardware(dev);
- saved_pctl_mode = lpphy->txpctl_mode;
- lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
- //TODO Perform transmit power table I/Q LO calibration
- if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF))
- lpphy_pr41573_workaround(dev);
- //TODO If a full calibration has not been performed on this channel yet, perform PAPD TX-power calibration
- lpphy_set_tx_power_control(dev, saved_pctl_mode);
- //TODO Perform I/Q calibration with a single control value set
+ u16 tmp = (channel == 14); //SPEC FIXME check japanwidefilter!
- b43_mac_enable(dev);
+ if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific?
+ b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9);
+ if ((dev->phy.rev == 1) && (lpphy->rc_cap))
+ lpphy_set_rc_cap(dev);
+ } else {
+ b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F);
+ }
}
static void lpphy_set_tssi_mux(struct b43_wldev *dev, enum tssi_mux_mode mode)
@@ -1495,6 +1570,473 @@ static void lpphy_tx_pctl_init(struct b43_wldev *dev)
}
}
+static void lpphy_pr41573_workaround(struct b43_wldev *dev)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ u32 *saved_tab;
+ const unsigned int saved_tab_size = 256;
+ enum b43_lpphy_txpctl_mode txpctl_mode;
+ s8 tx_pwr_idx_over;
+ u16 tssi_npt, tssi_idx;
+
+ saved_tab = kcalloc(saved_tab_size, sizeof(saved_tab[0]), GFP_KERNEL);
+ if (!saved_tab) {
+ b43err(dev->wl, "PR41573 failed. Out of memory!\n");
+ return;
+ }
+
+ lpphy_read_tx_pctl_mode_from_hardware(dev);
+ txpctl_mode = lpphy->txpctl_mode;
+ tx_pwr_idx_over = lpphy->tx_pwr_idx_over;
+ tssi_npt = lpphy->tssi_npt;
+ tssi_idx = lpphy->tssi_idx;
+
+ if (dev->phy.rev < 2) {
+ b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140),
+ saved_tab_size, saved_tab);
+ } else {
+ b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140),
+ saved_tab_size, saved_tab);
+ }
+ //FIXME PHY reset
+ lpphy_table_init(dev); //FIXME is table init needed?
+ lpphy_baseband_init(dev);
+ lpphy_tx_pctl_init(dev);
+ b43_lpphy_op_software_rfkill(dev, false);
+ lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
+ if (dev->phy.rev < 2) {
+ b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0x140),
+ saved_tab_size, saved_tab);
+ } else {
+ b43_lptab_write_bulk(dev, B43_LPTAB32(7, 0x140),
+ saved_tab_size, saved_tab);
+ }
+ b43_write16(dev, B43_MMIO_CHANNEL, lpphy->channel);
+ lpphy->tssi_npt = tssi_npt;
+ lpphy->tssi_idx = tssi_idx;
+ lpphy_set_analog_filter(dev, lpphy->channel);
+ if (tx_pwr_idx_over != -1)
+ lpphy_set_tx_power_by_index(dev, tx_pwr_idx_over);
+ if (lpphy->rc_cap)
+ lpphy_set_rc_cap(dev);
+ b43_lpphy_op_set_rx_antenna(dev, lpphy->antenna);
+ lpphy_set_tx_power_control(dev, txpctl_mode);
+ kfree(saved_tab);
+}
+
+struct lpphy_rx_iq_comp { u8 chan; s8 c1, c0; };
+
+static const struct lpphy_rx_iq_comp lpphy_5354_iq_table[] = {
+ { .chan = 1, .c1 = -66, .c0 = 15, },
+ { .chan = 2, .c1 = -66, .c0 = 15, },
+ { .chan = 3, .c1 = -66, .c0 = 15, },
+ { .chan = 4, .c1 = -66, .c0 = 15, },
+ { .chan = 5, .c1 = -66, .c0 = 15, },
+ { .chan = 6, .c1 = -66, .c0 = 15, },
+ { .chan = 7, .c1 = -66, .c0 = 14, },
+ { .chan = 8, .c1 = -66, .c0 = 14, },
+ { .chan = 9, .c1 = -66, .c0 = 14, },
+ { .chan = 10, .c1 = -66, .c0 = 14, },
+ { .chan = 11, .c1 = -66, .c0 = 14, },
+ { .chan = 12, .c1 = -66, .c0 = 13, },
+ { .chan = 13, .c1 = -66, .c0 = 13, },
+ { .chan = 14, .c1 = -66, .c0 = 13, },
+};
+
+static const struct lpphy_rx_iq_comp lpphy_rev0_1_iq_table[] = {
+ { .chan = 1, .c1 = -64, .c0 = 13, },
+ { .chan = 2, .c1 = -64, .c0 = 13, },
+ { .chan = 3, .c1 = -64, .c0 = 13, },
+ { .chan = 4, .c1 = -64, .c0 = 13, },
+ { .chan = 5, .c1 = -64, .c0 = 12, },
+ { .chan = 6, .c1 = -64, .c0 = 12, },
+ { .chan = 7, .c1 = -64, .c0 = 12, },
+ { .chan = 8, .c1 = -64, .c0 = 12, },
+ { .chan = 9, .c1 = -64, .c0 = 12, },
+ { .chan = 10, .c1 = -64, .c0 = 11, },
+ { .chan = 11, .c1 = -64, .c0 = 11, },
+ { .chan = 12, .c1 = -64, .c0 = 11, },
+ { .chan = 13, .c1 = -64, .c0 = 11, },
+ { .chan = 14, .c1 = -64, .c0 = 10, },
+ { .chan = 34, .c1 = -62, .c0 = 24, },
+ { .chan = 38, .c1 = -62, .c0 = 24, },
+ { .chan = 42, .c1 = -62, .c0 = 24, },
+ { .chan = 46, .c1 = -62, .c0 = 23, },
+ { .chan = 36, .c1 = -62, .c0 = 24, },
+ { .chan = 40, .c1 = -62, .c0 = 24, },
+ { .chan = 44, .c1 = -62, .c0 = 23, },
+ { .chan = 48, .c1 = -62, .c0 = 23, },
+ { .chan = 52, .c1 = -62, .c0 = 23, },
+ { .chan = 56, .c1 = -62, .c0 = 22, },
+ { .chan = 60, .c1 = -62, .c0 = 22, },
+ { .chan = 64, .c1 = -62, .c0 = 22, },
+ { .chan = 100, .c1 = -62, .c0 = 16, },
+ { .chan = 104, .c1 = -62, .c0 = 16, },
+ { .chan = 108, .c1 = -62, .c0 = 15, },
+ { .chan = 112, .c1 = -62, .c0 = 14, },
+ { .chan = 116, .c1 = -62, .c0 = 14, },
+ { .chan = 120, .c1 = -62, .c0 = 13, },
+ { .chan = 124, .c1 = -62, .c0 = 12, },
+ { .chan = 128, .c1 = -62, .c0 = 12, },
+ { .chan = 132, .c1 = -62, .c0 = 12, },
+ { .chan = 136, .c1 = -62, .c0 = 11, },
+ { .chan = 140, .c1 = -62, .c0 = 10, },
+ { .chan = 149, .c1 = -61, .c0 = 9, },
+ { .chan = 153, .c1 = -61, .c0 = 9, },
+ { .chan = 157, .c1 = -61, .c0 = 9, },
+ { .chan = 161, .c1 = -61, .c0 = 8, },
+ { .chan = 165, .c1 = -61, .c0 = 8, },
+ { .chan = 184, .c1 = -62, .c0 = 25, },
+ { .chan = 188, .c1 = -62, .c0 = 25, },
+ { .chan = 192, .c1 = -62, .c0 = 25, },
+ { .chan = 196, .c1 = -62, .c0 = 25, },
+ { .chan = 200, .c1 = -62, .c0 = 25, },
+ { .chan = 204, .c1 = -62, .c0 = 25, },
+ { .chan = 208, .c1 = -62, .c0 = 25, },
+ { .chan = 212, .c1 = -62, .c0 = 25, },
+ { .chan = 216, .c1 = -62, .c0 = 26, },
+};
+
+static const struct lpphy_rx_iq_comp lpphy_rev2plus_iq_comp = {
+ .chan = 0,
+ .c1 = -64,
+ .c0 = 0,
+};
+
+static u8 lpphy_nbits(s32 val)
+{
+ u32 tmp = abs(val);
+ u8 nbits = 0;
+
+ while (tmp != 0) {
+ nbits++;
+ tmp >>= 1;
+ }
+
+ return nbits;
+}
+
+static int lpphy_calc_rx_iq_comp(struct b43_wldev *dev, u16 samples)
+{
+ struct lpphy_iq_est iq_est;
+ u16 c0, c1;
+ int prod, ipwr, qpwr, prod_msb, q_msb, tmp1, tmp2, tmp3, tmp4, ret;
+
+ c1 = b43_phy_read(dev, B43_LPPHY_RX_COMP_COEFF_S);
+ c0 = c1 >> 8;
+ c1 |= 0xFF;
+
+ b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, 0x00C0);
+ b43_phy_mask(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF);
+
+ ret = lpphy_rx_iq_est(dev, samples, 32, &iq_est);
+ if (!ret)
+ goto out;
+
+ prod = iq_est.iq_prod;
+ ipwr = iq_est.i_pwr;
+ qpwr = iq_est.q_pwr;
+
+ if (ipwr + qpwr < 2) {
+ ret = 0;
+ goto out;
+ }
+
+ prod_msb = lpphy_nbits(prod);
+ q_msb = lpphy_nbits(qpwr);
+ tmp1 = prod_msb - 20;
+
+ if (tmp1 >= 0) {
+ tmp3 = ((prod << (30 - prod_msb)) + (ipwr >> (1 + tmp1))) /
+ (ipwr >> tmp1);
+ } else {
+ tmp3 = ((prod << (30 - prod_msb)) + (ipwr << (-1 - tmp1))) /
+ (ipwr << -tmp1);
+ }
+
+ tmp2 = q_msb - 11;
+
+ if (tmp2 >= 0)
+ tmp4 = (qpwr << (31 - q_msb)) / (ipwr >> tmp2);
+ else
+ tmp4 = (qpwr << (31 - q_msb)) / (ipwr << -tmp2);
+
+ tmp4 -= tmp3 * tmp3;
+ tmp4 = -int_sqrt(tmp4);
+
+ c0 = tmp3 >> 3;
+ c1 = tmp4 >> 4;
+
+out:
+ b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, c1);
+ b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF, c0 << 8);
+ return ret;
+}
+
+/* Complex number using 2 32-bit signed integers */
+typedef struct {s32 i, q;} lpphy_c32;
+
+static lpphy_c32 lpphy_cordic(int theta)
+{
+ u32 arctg[] = { 2949120, 1740967, 919879, 466945, 234379, 117304,
+ 58666, 29335, 14668, 7334, 3667, 1833, 917, 458,
+ 229, 115, 57, 29, };
+ int i, tmp, signx = 1, angle = 0;
+ lpphy_c32 ret = { .i = 39797, .q = 0, };
+
+ theta = clamp_t(int, theta, -180, 180);
+
+ if (theta > 90) {
+ theta -= 180;
+ signx = -1;
+ } else if (theta < -90) {
+ theta += 180;
+ signx = -1;
+ }
+
+ for (i = 0; i <= 17; i++) {
+ if (theta > angle) {
+ tmp = ret.i - (ret.q >> i);
+ ret.q += ret.i >> i;
+ ret.i = tmp;
+ angle += arctg[i];
+ } else {
+ tmp = ret.i + (ret.q >> i);
+ ret.q -= ret.i >> i;
+ ret.i = tmp;
+ angle -= arctg[i];
+ }
+ }
+
+ ret.i *= signx;
+ ret.q *= signx;
+
+ return ret;
+}
+
+static void lpphy_run_samples(struct b43_wldev *dev, u16 samples, u16 loops,
+ u16 wait)
+{
+ b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL,
+ 0xFFC0, samples - 1);
+ if (loops != 0xFFFF)
+ loops--;
+ b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000, loops);
+ b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL, 0x3F, wait << 6);
+ b43_phy_set(dev, B43_LPPHY_A_PHY_CTL_ADDR, 0x1);
+}
+
+//SPEC FIXME what does a negative freq mean?
+static void lpphy_start_tx_tone(struct b43_wldev *dev, s32 freq, u16 max)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ u16 buf[64];
+ int i, samples = 0, angle = 0, rotation = (9 * freq) / 500;
+ lpphy_c32 sample;
+
+ lpphy->tx_tone_freq = freq;
+
+ if (freq) {
+ /* Find i for which abs(freq) integrally divides 20000 * i */
+ for (i = 1; samples * abs(freq) != 20000 * i; i++) {
+ samples = (20000 * i) / abs(freq);
+ if(B43_WARN_ON(samples > 63))
+ return;
+ }
+ } else {
+ samples = 2;
+ }
+
+ for (i = 0; i < samples; i++) {
+ sample = lpphy_cordic(angle);
+ angle += rotation;
+ buf[i] = ((sample.i * max) & 0xFF) << 8;
+ buf[i] |= (sample.q * max) & 0xFF;
+ }
+
+ b43_lptab_write_bulk(dev, B43_LPTAB16(5, 0), samples, buf);
+
+ lpphy_run_samples(dev, samples, 0xFFFF, 0);
+}
+
+static void lpphy_stop_tx_tone(struct b43_wldev *dev)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ int i;
+
+ lpphy->tx_tone_freq = 0;
+
+ b43_phy_mask(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000);
+ for (i = 0; i < 31; i++) {
+ if (!(b43_phy_read(dev, B43_LPPHY_A_PHY_CTL_ADDR) & 0x1))
+ break;
+ udelay(100);
+ }
+}
+
+
+static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
+ int mode, bool useindex, u8 index)
+{
+ //TODO
+}
+
+static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ struct ssb_bus *bus = dev->dev->bus;
+ struct lpphy_tx_gains gains, oldgains;
+ int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
+
+ lpphy_read_tx_pctl_mode_from_hardware(dev);
+ old_txpctl = lpphy->txpctl_mode;
+ old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
+ if (old_afe_ovr)
+ oldgains = lpphy_get_tx_gains(dev);
+ old_rf = b43_phy_read(dev, B43_LPPHY_RF_PWR_OVERRIDE) & 0xFF;
+ old_bbmult = lpphy_get_bb_mult(dev);
+
+ lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
+
+ if (bus->chip_id == 0x4325 && bus->chip_rev == 0)
+ lpphy_papd_cal(dev, gains, 0, 1, 30);
+ else
+ lpphy_papd_cal(dev, gains, 0, 1, 65);
+
+ if (old_afe_ovr)
+ lpphy_set_tx_gains(dev, oldgains);
+ lpphy_set_bb_mult(dev, old_bbmult);
+ lpphy_set_tx_power_control(dev, old_txpctl);
+ b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00, old_rf);
+}
+
+static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
+ bool rx, bool pa, struct lpphy_tx_gains *gains)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ struct ssb_bus *bus = dev->dev->bus;
+ const struct lpphy_rx_iq_comp *iqcomp = NULL;
+ struct lpphy_tx_gains nogains, oldgains;
+ u16 tmp;
+ int i, ret;
+
+ memset(&nogains, 0, sizeof(nogains));
+ memset(&oldgains, 0, sizeof(oldgains));
+
+ if (bus->chip_id == 0x5354) {
+ for (i = 0; i < ARRAY_SIZE(lpphy_5354_iq_table); i++) {
+ if (lpphy_5354_iq_table[i].chan == lpphy->channel) {
+ iqcomp = &lpphy_5354_iq_table[i];
+ }
+ }
+ } else if (dev->phy.rev >= 2) {
+ iqcomp = &lpphy_rev2plus_iq_comp;
+ } else {
+ for (i = 0; i < ARRAY_SIZE(lpphy_rev0_1_iq_table); i++) {
+ if (lpphy_rev0_1_iq_table[i].chan == lpphy->channel) {
+ iqcomp = &lpphy_rev0_1_iq_table[i];
+ }
+ }
+ }
+
+ if (B43_WARN_ON(!iqcomp))
+ return 0;
+
+ b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, iqcomp->c1);
+ b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S,
+ 0x00FF, iqcomp->c0 << 8);
+
+ if (noise) {
+ tx = true;
+ rx = false;
+ pa = false;
+ }
+
+ lpphy_set_trsw_over(dev, tx, rx);
+
+ if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
+ b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
+ 0xFFF7, pa << 3);
+ } else {
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);
+ b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
+ 0xFFDF, pa << 5);
+ }
+
+ tmp = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
+
+ if (noise)
+ lpphy_set_rx_gain(dev, 0x2D5D);
+ else {
+ if (tmp)
+ oldgains = lpphy_get_tx_gains(dev);
+ if (!gains)
+ gains = &nogains;
+ lpphy_set_tx_gains(dev, *gains);
+ }
+
+ b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
+ b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
+ b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);
+ lpphy_set_deaf(dev, false);
+ if (noise)
+ ret = lpphy_calc_rx_iq_comp(dev, 0xFFF0);
+ else {
+ lpphy_start_tx_tone(dev, 4000, 100);
+ ret = lpphy_calc_rx_iq_comp(dev, 0x4000);
+ lpphy_stop_tx_tone(dev);
+ }
+ lpphy_clear_deaf(dev, false);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFC);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFDF);
+ if (!noise) {
+ if (tmp)
+ lpphy_set_tx_gains(dev, oldgains);
+ else
+ lpphy_disable_tx_gain_override(dev);
+ }
+ lpphy_disable_rx_gain_override(dev);
+ b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
+ b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xF7FF);
+ return ret;
+}
+
+static void lpphy_calibration(struct b43_wldev *dev)
+{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
+ enum b43_lpphy_txpctl_mode saved_pctl_mode;
+ bool full_cal = false;
+
+ if (lpphy->full_calib_chan != lpphy->channel) {
+ full_cal = true;
+ lpphy->full_calib_chan = lpphy->channel;
+ }
+
+ b43_mac_suspend(dev);
+
+ lpphy_btcoex_override(dev);
+ if (dev->phy.rev >= 2)
+ lpphy_save_dig_flt_state(dev);
+ lpphy_read_tx_pctl_mode_from_hardware(dev);
+ saved_pctl_mode = lpphy->txpctl_mode;
+ lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
+ //TODO Perform transmit power table I/Q LO calibration
+ if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF))
+ lpphy_pr41573_workaround(dev);
+ if ((dev->phy.rev >= 2) && full_cal) {
+ lpphy_papd_cal_txpwr(dev);
+ }
+ lpphy_set_tx_power_control(dev, saved_pctl_mode);
+ if (dev->phy.rev >= 2)
+ lpphy_restore_dig_flt_state(dev);
+ lpphy_rx_iq_cal(dev, true, true, false, false, NULL);
+
+ b43_mac_enable(dev);
+}
+
static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
@@ -1539,12 +2081,6 @@ static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
}
-static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
- bool blocked)
-{
- //TODO
-}
-
struct b206x_channel {
u8 channel;
u16 freq;
@@ -2010,22 +2546,6 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
return err;
}
-
-/* This was previously called lpphy_japan_filter */
-static void lpphy_set_analog_filter(struct b43_wldev *dev, int channel)
-{
- struct b43_phy_lp *lpphy = dev->phy.lp;
- u16 tmp = (channel == 14); //SPEC FIXME check japanwidefilter!
-
- if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific?
- b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9);
- if ((dev->phy.rev == 1) && (lpphy->rc_cap))
- lpphy_set_rc_cap(dev);
- } else {
- b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F);
- }
-}
-
static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
{
u16 tmp;
@@ -2210,18 +2730,6 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
return 0;
}
-static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
-{
- if (dev->phy.rev >= 2)
- return; // rev2+ doesn't support antenna diversity
-
- if (B43_WARN_ON(antenna > B43_ANTENNA_AUTO1))
- return;
-
- b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2);
- b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1);
-}
-
static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev)
{
//TODO
@@ -2244,6 +2752,11 @@ void b43_lpphy_op_switch_analog(struct b43_wldev *dev, bool on)
}
}
+static void b43_lpphy_op_pwork_15sec(struct b43_wldev *dev)
+{
+ //TODO
+}
+
const struct b43_phy_operations b43_phyops_lp = {
.allocate = b43_lpphy_op_allocate,
.free = b43_lpphy_op_free,
@@ -2261,4 +2774,6 @@ const struct b43_phy_operations b43_phyops_lp = {
.set_rx_antenna = b43_lpphy_op_set_rx_antenna,
.recalc_txpower = b43_lpphy_op_recalc_txpower,
.adjust_txpower = b43_lpphy_op_adjust_txpower,
+ .pwork_15sec = b43_lpphy_op_pwork_15sec,
+ .pwork_60sec = lpphy_calibration,
};
diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h
index c3232c17b60..62737f700cb 100644
--- a/drivers/net/wireless/b43/phy_lp.h
+++ b/drivers/net/wireless/b43/phy_lp.h
@@ -286,6 +286,7 @@
#define B43_LPPHY_TR_LOOKUP_6 B43_PHY_OFDM(0xC8) /* TR Lookup 6 */
#define B43_LPPHY_TR_LOOKUP_7 B43_PHY_OFDM(0xC9) /* TR Lookup 7 */
#define B43_LPPHY_TR_LOOKUP_8 B43_PHY_OFDM(0xCA) /* TR Lookup 8 */
+#define B43_LPPHY_RF_PWR_OVERRIDE B43_PHY_OFDM(0xD3) /* RF power override */
@@ -871,12 +872,12 @@ struct b43_phy_lp {
u8 rssi_gs;
/* RC cap */
- u8 rc_cap; /* FIXME initial value? */
+ u8 rc_cap;
/* BX arch */
u8 bx_arch;
/* Full calibration channel */
- u8 full_calib_chan; /* FIXME initial value? */
+ u8 full_calib_chan;
/* Transmit iqlocal best coeffs */
bool tx_iqloc_best_coeffs_valid;
@@ -891,6 +892,12 @@ struct b43_phy_lp {
/* The channel we are tuned to */
u8 channel;
+
+ /* The active antenna diversity mode */
+ int antenna;
+
+ /* Frequency of the active TX tone */
+ int tx_tone_freq;
};
enum tssi_mux_mode {
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index 7a5e294be2b..eda06529ef5 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -621,7 +621,6 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
(phystat0 & B43_RX_PHYST0_OFDM),
(phystat0 & B43_RX_PHYST0_GAINCTL),
(phystat3 & B43_RX_PHYST3_TRSTATE));
- status.qual = (rxhdr->jssi * 100) / B43_RX_MAX_SSI;
}
if (phystat0 & B43_RX_PHYST0_OFDM)
diff --git a/drivers/net/wireless/b43legacy/Kconfig b/drivers/net/wireless/b43legacy/Kconfig
index 94a46347805..1ffa28835c5 100644
--- a/drivers/net/wireless/b43legacy/Kconfig
+++ b/drivers/net/wireless/b43legacy/Kconfig
@@ -1,6 +1,6 @@
config B43LEGACY
tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)"
- depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA
+ depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
select SSB
select FW_LOADER
---help---
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h
index 038baa8869e..89fe2f972c7 100644
--- a/drivers/net/wireless/b43legacy/b43legacy.h
+++ b/drivers/net/wireless/b43legacy/b43legacy.h
@@ -29,8 +29,6 @@
#define B43legacy_IRQWAIT_MAX_RETRIES 20
-#define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */
-
/* MMIO offsets */
#define B43legacy_MMIO_DMA0_REASON 0x20
#define B43legacy_MMIO_DMA0_IRQ_MASK 0x24
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c
index 86640341581..0a86bdf5315 100644
--- a/drivers/net/wireless/b43legacy/dma.c
+++ b/drivers/net/wireless/b43legacy/dma.c
@@ -1240,8 +1240,9 @@ struct b43legacy_dmaring *parse_cookie(struct b43legacy_wldev *dev,
}
static int dma_tx_fragment(struct b43legacy_dmaring *ring,
- struct sk_buff *skb)
+ struct sk_buff **in_skb)
{
+ struct sk_buff *skb = *in_skb;
const struct b43legacy_dma_ops *ops = ring->ops;
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
u8 *header;
@@ -1305,8 +1306,14 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
}
memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len);
+ memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb));
+ bounce_skb->dev = skb->dev;
+ skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb));
+ info = IEEE80211_SKB_CB(bounce_skb);
+
dev_kfree_skb_any(skb);
skb = bounce_skb;
+ *in_skb = bounce_skb;
meta->skb = skb;
meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
if (b43legacy_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
@@ -1360,8 +1367,10 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
struct sk_buff *skb)
{
struct b43legacy_dmaring *ring;
+ struct ieee80211_hdr *hdr;
int err = 0;
unsigned long flags;
+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
ring = priority_to_txring(dev, skb_get_queue_mapping(skb));
spin_lock_irqsave(&ring->lock, flags);
@@ -1386,7 +1395,11 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
goto out_unlock;
}
- err = dma_tx_fragment(ring, skb);
+ /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing
+ * into the skb data or cb now. */
+ hdr = NULL;
+ info = NULL;
+ err = dma_tx_fragment(ring, &skb);
if (unlikely(err == -ENOKEY)) {
/* Drop this packet, as we don't have the encryption key
* anymore and must not transmit it unencrypted. */
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c
index 0983406f463..d579bb9035c 100644
--- a/drivers/net/wireless/b43legacy/main.c
+++ b/drivers/net/wireless/b43legacy/main.c
@@ -2676,7 +2676,7 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
if (conf->channel->hw_value != phy->channel)
b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
- dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
+ dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
/* Adjust the desired TX power level. */
if (conf->power_level != 0) {
diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c
index 103f3c9e7f5..9c8882d9275 100644
--- a/drivers/net/wireless/b43legacy/xmit.c
+++ b/drivers/net/wireless/b43legacy/xmit.c
@@ -549,7 +549,6 @@ void b43legacy_rx(struct b43legacy_wldev *dev,
(phystat0 & B43legacy_RX_PHYST0_GAINCTL),
(phystat3 & B43legacy_RX_PHYST3_TRSTATE));
status.noise = dev->stats.link_noise;
- status.qual = (jssi * 100) / B43legacy_RX_MAX_SSI;
/* change to support A PHY */
if (phystat0 & B43legacy_RX_PHYST0_OFDM)
status.rate_idx = b43legacy_plcp_get_bitrate_idx_ofdm(plcp, false);
diff --git a/drivers/net/wireless/hostap/Kconfig b/drivers/net/wireless/hostap/Kconfig
index 08f1e989653..287d82728bc 100644
--- a/drivers/net/wireless/hostap/Kconfig
+++ b/drivers/net/wireless/hostap/Kconfig
@@ -1,6 +1,5 @@
config HOSTAP
tristate "IEEE 802.11 for Host AP (Prism2/2.5/3 and WEP/TKIP/CCMP)"
- depends on WLAN_80211
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
diff --git a/drivers/net/wireless/i82586.h b/drivers/net/wireless/i82586.h
deleted file mode 100644
index 5f65b250646..00000000000
--- a/drivers/net/wireless/i82586.h
+++ /dev/null
@@ -1,413 +0,0 @@
-/*
- * Intel 82586 IEEE 802.3 Ethernet LAN Coprocessor.
- *
- * See:
- * Intel Microcommunications 1991
- * p1-1 to p1-37
- * Intel order No. 231658
- * ISBN 1-55512-119-5
- *
- * Unfortunately, the above chapter mentions neither
- * the System Configuration Pointer (SCP) nor the
- * Intermediate System Configuration Pointer (ISCP),
- * so we probably need to look elsewhere for the
- * whole story -- some recommend the "Intel LAN
- * Components manual" but I have neither a copy
- * nor a full reference. But "elsewhere" may be
- * in the same publication...
- * The description of a later device, the
- * "82596CA High-Performance 32-Bit Local Area Network
- * Coprocessor", (ibid. p1-38 to p1-109) does mention
- * the SCP and ISCP and also has an i82586 compatibility
- * mode. Even more useful is "AP-235 An 82586 Data Link
- * Driver" (ibid. p1-337 to p1-417).
- */
-
-#define I82586_MEMZ (64 * 1024)
-
-#define I82586_SCP_ADDR (I82586_MEMZ - sizeof(scp_t))
-
-#define ADDR_LEN 6
-#define I82586NULL 0xFFFF
-
-#define toff(t,p,f) (unsigned short)((void *)(&((t *)((void *)0 + (p)))->f) - (void *)0)
-
-/*
- * System Configuration Pointer (SCP).
- */
-typedef struct scp_t scp_t;
-struct scp_t
-{
- unsigned short scp_sysbus; /* 82586 bus width: */
-#define SCP_SY_16BBUS (0x0 << 0) /* 16 bits */
-#define SCP_SY_8BBUS (0x1 << 0) /* 8 bits. */
- unsigned short scp_junk[2]; /* Unused */
- unsigned short scp_iscpl; /* lower 16 bits of ISCP_ADDR */
- unsigned short scp_iscph; /* upper 16 bits of ISCP_ADDR */
-};
-
-/*
- * Intermediate System Configuration Pointer (ISCP).
- */
-typedef struct iscp_t iscp_t;
-struct iscp_t
-{
- unsigned short iscp_busy; /* set by CPU before first CA, */
- /* cleared by 82586 after read. */
- unsigned short iscp_offset; /* offset of SCB */
- unsigned short iscp_basel; /* base of SCB */
- unsigned short iscp_baseh; /* " */
-};
-
-/*
- * System Control Block (SCB).
- * The 82586 writes its status to scb_status and then
- * raises an interrupt to alert the CPU.
- * The CPU writes a command to scb_command and
- * then issues a Channel Attention (CA) to alert the 82586.
- */
-typedef struct scb_t scb_t;
-struct scb_t
-{
- unsigned short scb_status; /* Status of 82586 */
-#define SCB_ST_INT (0xF << 12) /* Some of: */
-#define SCB_ST_CX (0x1 << 15) /* Cmd completed */
-#define SCB_ST_FR (0x1 << 14) /* Frame received */
-#define SCB_ST_CNA (0x1 << 13) /* Cmd unit not active */
-#define SCB_ST_RNR (0x1 << 12) /* Rcv unit not ready */
-#define SCB_ST_JUNK0 (0x1 << 11) /* 0 */
-#define SCB_ST_CUS (0x7 << 8) /* Cmd unit status */
-#define SCB_ST_CUS_IDLE (0 << 8) /* Idle */
-#define SCB_ST_CUS_SUSP (1 << 8) /* Suspended */
-#define SCB_ST_CUS_ACTV (2 << 8) /* Active */
-#define SCB_ST_JUNK1 (0x1 << 7) /* 0 */
-#define SCB_ST_RUS (0x7 << 4) /* Rcv unit status */
-#define SCB_ST_RUS_IDLE (0 << 4) /* Idle */
-#define SCB_ST_RUS_SUSP (1 << 4) /* Suspended */
-#define SCB_ST_RUS_NRES (2 << 4) /* No resources */
-#define SCB_ST_RUS_RDY (4 << 4) /* Ready */
- unsigned short scb_command; /* Next command */
-#define SCB_CMD_ACK_CX (0x1 << 15) /* Ack cmd completion */
-#define SCB_CMD_ACK_FR (0x1 << 14) /* Ack frame received */
-#define SCB_CMD_ACK_CNA (0x1 << 13) /* Ack CU not active */
-#define SCB_CMD_ACK_RNR (0x1 << 12) /* Ack RU not ready */
-#define SCB_CMD_JUNKX (0x1 << 11) /* Unused */
-#define SCB_CMD_CUC (0x7 << 8) /* Command Unit command */
-#define SCB_CMD_CUC_NOP (0 << 8) /* Nop */
-#define SCB_CMD_CUC_GO (1 << 8) /* Start cbl_offset */
-#define SCB_CMD_CUC_RES (2 << 8) /* Resume execution */
-#define SCB_CMD_CUC_SUS (3 << 8) /* Suspend " */
-#define SCB_CMD_CUC_ABT (4 << 8) /* Abort " */
-#define SCB_CMD_RESET (0x1 << 7) /* Reset chip (hardware) */
-#define SCB_CMD_RUC (0x7 << 4) /* Receive Unit command */
-#define SCB_CMD_RUC_NOP (0 << 4) /* Nop */
-#define SCB_CMD_RUC_GO (1 << 4) /* Start rfa_offset */
-#define SCB_CMD_RUC_RES (2 << 4) /* Resume reception */
-#define SCB_CMD_RUC_SUS (3 << 4) /* Suspend " */
-#define SCB_CMD_RUC_ABT (4 << 4) /* Abort " */
- unsigned short scb_cbl_offset; /* Offset of first command unit */
- /* Action Command */
- unsigned short scb_rfa_offset; /* Offset of first Receive */
- /* Frame Descriptor in the */
- /* Receive Frame Area */
- unsigned short scb_crcerrs; /* Properly aligned frames */
- /* received with a CRC error */
- unsigned short scb_alnerrs; /* Misaligned frames received */
- /* with a CRC error */
- unsigned short scb_rscerrs; /* Frames lost due to no space */
- unsigned short scb_ovrnerrs; /* Frames lost due to slow bus */
-};
-
-#define scboff(p,f) toff(scb_t, p, f)
-
-/*
- * The eight Action Commands.
- */
-typedef enum acmd_e acmd_e;
-enum acmd_e
-{
- acmd_nop = 0, /* Do nothing */
- acmd_ia_setup = 1, /* Load an (ethernet) address into the */
- /* 82586 */
- acmd_configure = 2, /* Update the 82586 operating parameters */
- acmd_mc_setup = 3, /* Load a list of (ethernet) multicast */
- /* addresses into the 82586 */
- acmd_transmit = 4, /* Transmit a frame */
- acmd_tdr = 5, /* Perform a Time Domain Reflectometer */
- /* test on the serial link */
- acmd_dump = 6, /* Copy 82586 registers to memory */
- acmd_diagnose = 7, /* Run an internal self test */
-};
-
-/*
- * Generic Action Command header.
- */
-typedef struct ach_t ach_t;
-struct ach_t
-{
- unsigned short ac_status; /* Command status: */
-#define AC_SFLD_C (0x1 << 15) /* Command completed */
-#define AC_SFLD_B (0x1 << 14) /* Busy executing */
-#define AC_SFLD_OK (0x1 << 13) /* Completed error free */
-#define AC_SFLD_A (0x1 << 12) /* Command aborted */
-#define AC_SFLD_FAIL (0x1 << 11) /* Selftest failed */
-#define AC_SFLD_S10 (0x1 << 10) /* No carrier sense */
- /* during transmission */
-#define AC_SFLD_S9 (0x1 << 9) /* Tx unsuccessful: */
- /* (stopped) lost CTS */
-#define AC_SFLD_S8 (0x1 << 8) /* Tx unsuccessful: */
- /* (stopped) slow DMA */
-#define AC_SFLD_S7 (0x1 << 7) /* Tx deferred: */
- /* other link traffic */
-#define AC_SFLD_S6 (0x1 << 6) /* Heart Beat: collision */
- /* detect after last tx */
-#define AC_SFLD_S5 (0x1 << 5) /* Tx stopped: */
- /* excessive collisions */
-#define AC_SFLD_MAXCOL (0xF << 0) /* Collision count */
- unsigned short ac_command; /* Command specifier: */
-#define AC_CFLD_EL (0x1 << 15) /* End of command list */
-#define AC_CFLD_S (0x1 << 14) /* Suspend on completion */
-#define AC_CFLD_I (0x1 << 13) /* Interrupt on completion */
-#define AC_CFLD_CMD (0x7 << 0) /* acmd_e */
- unsigned short ac_link; /* Next Action Command */
-};
-
-#define acoff(p,f) toff(ach_t, p, f)
-
-/*
- * The Nop Action Command.
- */
-typedef struct ac_nop_t ac_nop_t;
-struct ac_nop_t
-{
- ach_t nop_h;
-};
-
-/*
- * The IA-Setup Action Command.
- */
-typedef struct ac_ias_t ac_ias_t;
-struct ac_ias_t
-{
- ach_t ias_h;
- unsigned char ias_addr[ADDR_LEN]; /* The (ethernet) address */
-};
-
-/*
- * The Configure Action Command.
- */
-typedef struct ac_cfg_t ac_cfg_t;
-struct ac_cfg_t
-{
- ach_t cfg_h;
- unsigned char cfg_byte_cnt; /* Size foll data: 4-12 */
-#define AC_CFG_BYTE_CNT(v) (((v) & 0xF) << 0)
- unsigned char cfg_fifolim; /* FIFO threshold */
-#define AC_CFG_FIFOLIM(v) (((v) & 0xF) << 0)
- unsigned char cfg_byte8;
-#define AC_CFG_SAV_BF(v) (((v) & 0x1) << 7) /* Save rxd bad frames */
-#define AC_CFG_SRDY(v) (((v) & 0x1) << 6) /* SRDY/ARDY pin means */
- /* external sync. */
- unsigned char cfg_byte9;
-#define AC_CFG_ELPBCK(v) (((v) & 0x1) << 7) /* External loopback */
-#define AC_CFG_ILPBCK(v) (((v) & 0x1) << 6) /* Internal loopback */
-#define AC_CFG_PRELEN(v) (((v) & 0x3) << 4) /* Preamble length */
-#define AC_CFG_PLEN_2 0 /* 2 bytes */
-#define AC_CFG_PLEN_4 1 /* 4 bytes */
-#define AC_CFG_PLEN_8 2 /* 8 bytes */
-#define AC_CFG_PLEN_16 3 /* 16 bytes */
-#define AC_CFG_ALOC(v) (((v) & 0x1) << 3) /* Addr/len data is */
- /* explicit in buffers */
-#define AC_CFG_ADDRLEN(v) (((v) & 0x7) << 0) /* Bytes per address */
- unsigned char cfg_byte10;
-#define AC_CFG_BOFMET(v) (((v) & 0x1) << 7) /* Use alternate expo. */
- /* backoff method */
-#define AC_CFG_ACR(v) (((v) & 0x7) << 4) /* Accelerated cont. res. */
-#define AC_CFG_LINPRIO(v) (((v) & 0x7) << 0) /* Linear priority */
- unsigned char cfg_ifs; /* Interframe spacing */
- unsigned char cfg_slotl; /* Slot time (low byte) */
- unsigned char cfg_byte13;
-#define AC_CFG_RETRYNUM(v) (((v) & 0xF) << 4) /* Max. collision retry */
-#define AC_CFG_SLTTMHI(v) (((v) & 0x7) << 0) /* Slot time (high bits) */
- unsigned char cfg_byte14;
-#define AC_CFG_FLGPAD(v) (((v) & 0x1) << 7) /* Pad with HDLC flags */
-#define AC_CFG_BTSTF(v) (((v) & 0x1) << 6) /* Do HDLC bitstuffing */
-#define AC_CFG_CRC16(v) (((v) & 0x1) << 5) /* 16 bit CCITT CRC */
-#define AC_CFG_NCRC(v) (((v) & 0x1) << 4) /* Insert no CRC */
-#define AC_CFG_TNCRS(v) (((v) & 0x1) << 3) /* Tx even if no carrier */
-#define AC_CFG_MANCH(v) (((v) & 0x1) << 2) /* Manchester coding */
-#define AC_CFG_BCDIS(v) (((v) & 0x1) << 1) /* Disable broadcast */
-#define AC_CFG_PRM(v) (((v) & 0x1) << 0) /* Promiscuous mode */
- unsigned char cfg_byte15;
-#define AC_CFG_ICDS(v) (((v) & 0x1) << 7) /* Internal collision */
- /* detect source */
-#define AC_CFG_CDTF(v) (((v) & 0x7) << 4) /* Collision detect */
- /* filter in bit times */
-#define AC_CFG_ICSS(v) (((v) & 0x1) << 3) /* Internal carrier */
- /* sense source */
-#define AC_CFG_CSTF(v) (((v) & 0x7) << 0) /* Carrier sense */
- /* filter in bit times */
- unsigned short cfg_min_frm_len;
-#define AC_CFG_MNFRM(v) (((v) & 0xFF) << 0) /* Min. bytes/frame (<= 255) */
-};
-
-/*
- * The MC-Setup Action Command.
- */
-typedef struct ac_mcs_t ac_mcs_t;
-struct ac_mcs_t
-{
- ach_t mcs_h;
- unsigned short mcs_cnt; /* No. of bytes of MC addresses */
-#if 0
- unsigned char mcs_data[ADDR_LEN]; /* The first MC address .. */
- ...
-#endif
-};
-
-#define I82586_MAX_MULTICAST_ADDRESSES 128 /* Hardware hashed filter */
-
-/*
- * The Transmit Action Command.
- */
-typedef struct ac_tx_t ac_tx_t;
-struct ac_tx_t
-{
- ach_t tx_h;
- unsigned short tx_tbd_offset; /* Address of list of buffers. */
-#if 0
-Linux packets are passed down with the destination MAC address
-and length/type field already prepended to the data,
-so we do not need to insert it. Consistent with this
-we must also set the AC_CFG_ALOC(..) flag during the
-ac_cfg_t action command.
- unsigned char tx_addr[ADDR_LEN]; /* The frame dest. address */
- unsigned short tx_length; /* The frame length */
-#endif /* 0 */
-};
-
-/*
- * The Time Domain Reflectometer Action Command.
- */
-typedef struct ac_tdr_t ac_tdr_t;
-struct ac_tdr_t
-{
- ach_t tdr_h;
- unsigned short tdr_result; /* Result. */
-#define AC_TDR_LNK_OK (0x1 << 15) /* No link problem */
-#define AC_TDR_XCVR_PRB (0x1 << 14) /* Txcvr cable problem */
-#define AC_TDR_ET_OPN (0x1 << 13) /* Open on the link */
-#define AC_TDR_ET_SRT (0x1 << 12) /* Short on the link */
-#define AC_TDR_TIME (0x7FF << 0) /* Distance to problem */
- /* site in transmit */
- /* clock cycles */
-};
-
-/*
- * The Dump Action Command.
- */
-typedef struct ac_dmp_t ac_dmp_t;
-struct ac_dmp_t
-{
- ach_t dmp_h;
- unsigned short dmp_offset; /* Result. */
-};
-
-/*
- * Size of the result of the dump command.
- */
-#define DUMPBYTES 170
-
-/*
- * The Diagnose Action Command.
- */
-typedef struct ac_dgn_t ac_dgn_t;
-struct ac_dgn_t
-{
- ach_t dgn_h;
-};
-
-/*
- * Transmit Buffer Descriptor (TBD).
- */
-typedef struct tbd_t tbd_t;
-struct tbd_t
-{
- unsigned short tbd_status; /* Written by the CPU */
-#define TBD_STATUS_EOF (0x1 << 15) /* This TBD is the */
- /* last for this frame */
-#define TBD_STATUS_ACNT (0x3FFF << 0) /* Actual count of data */
- /* bytes in this buffer */
- unsigned short tbd_next_bd_offset; /* Next in list */
- unsigned short tbd_bufl; /* Buffer address (low) */
- unsigned short tbd_bufh; /* " " (high) */
-};
-
-/*
- * Receive Buffer Descriptor (RBD).
- */
-typedef struct rbd_t rbd_t;
-struct rbd_t
-{
- unsigned short rbd_status; /* Written by the 82586 */
-#define RBD_STATUS_EOF (0x1 << 15) /* This RBD is the */
- /* last for this frame */
-#define RBD_STATUS_F (0x1 << 14) /* ACNT field is valid */
-#define RBD_STATUS_ACNT (0x3FFF << 0) /* Actual no. of data */
- /* bytes in this buffer */
- unsigned short rbd_next_rbd_offset; /* Next rbd in list */
- unsigned short rbd_bufl; /* Data pointer (low) */
- unsigned short rbd_bufh; /* " " (high) */
- unsigned short rbd_el_size; /* EL+Data buf. size */
-#define RBD_EL (0x1 << 15) /* This BD is the */
- /* last in the list */
-#define RBD_SIZE (0x3FFF << 0) /* No. of bytes the */
- /* buffer can hold */
-};
-
-#define rbdoff(p,f) toff(rbd_t, p, f)
-
-/*
- * Frame Descriptor (FD).
- */
-typedef struct fd_t fd_t;
-struct fd_t
-{
- unsigned short fd_status; /* Written by the 82586 */
-#define FD_STATUS_C (0x1 << 15) /* Completed storing frame */
-#define FD_STATUS_B (0x1 << 14) /* FD was consumed by RU */
-#define FD_STATUS_OK (0x1 << 13) /* Frame rxd successfully */
-#define FD_STATUS_S11 (0x1 << 11) /* CRC error */
-#define FD_STATUS_S10 (0x1 << 10) /* Alignment error */
-#define FD_STATUS_S9 (0x1 << 9) /* Ran out of resources */
-#define FD_STATUS_S8 (0x1 << 8) /* Rx DMA overrun */
-#define FD_STATUS_S7 (0x1 << 7) /* Frame too short */
-#define FD_STATUS_S6 (0x1 << 6) /* No EOF flag */
- unsigned short fd_command; /* Command */
-#define FD_COMMAND_EL (0x1 << 15) /* Last FD in list */
-#define FD_COMMAND_S (0x1 << 14) /* Suspend RU after rx */
- unsigned short fd_link_offset; /* Next FD */
- unsigned short fd_rbd_offset; /* First RBD (data) */
- /* Prepared by CPU, */
- /* updated by 82586 */
-#if 0
-I think the rest is unused since we
-have set AC_CFG_ALOC(..). However, just
-in case, we leave the space.
-#endif /* 0 */
- unsigned char fd_dest[ADDR_LEN]; /* Destination address */
- /* Written by 82586 */
- unsigned char fd_src[ADDR_LEN]; /* Source address */
- /* Written by 82586 */
- unsigned short fd_length; /* Frame length or type */
- /* Written by 82586 */
-};
-
-#define fdoff(p,f) toff(fd_t, p, f)
-
-/*
- * This software may only be used and distributed
- * according to the terms of the GNU General Public License.
- *
- * For more details, see wavelan.c.
- */
diff --git a/drivers/net/wireless/i82593.h b/drivers/net/wireless/i82593.h
deleted file mode 100644
index afac5c7a323..00000000000
--- a/drivers/net/wireless/i82593.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * Definitions for Intel 82593 CSMA/CD Core LAN Controller
- * The definitions are taken from the 1992 users manual with Intel
- * order number 297125-001.
- *
- * /usr/src/pc/RCS/i82593.h,v 1.1 1996/07/17 15:23:12 root Exp
- *
- * Copyright 1994, Anders Klemets <klemets@it.kth.se>
- *
- * HISTORY
- * i82593.h,v
- * Revision 1.4 2005/11/4 09:15:00 baroniunas
- * Modified copyright with permission of author as follows:
- *
- * "If I82539.H is the only file with my copyright statement
- * that is included in the Source Forge project, then you have
- * my approval to change the copyright statement to be a GPL
- * license, in the way you proposed on October 10."
- *
- * Revision 1.1 1996/07/17 15:23:12 root
- * Initial revision
- *
- * Revision 1.3 1995/04/05 15:13:58 adj
- * Initial alpha release
- *
- * Revision 1.2 1994/06/16 23:57:31 klemets
- * Mirrored all the fields in the configuration block.
- *
- * Revision 1.1 1994/06/02 20:25:34 klemets
- * Initial revision
- *
- *
- */
-#ifndef _I82593_H
-#define _I82593_H
-
-/* Intel 82593 CSMA/CD Core LAN Controller */
-
-/* Port 0 Command Register definitions */
-
-/* Execution operations */
-#define OP0_NOP 0 /* CHNL = 0 */
-#define OP0_SWIT_TO_PORT_1 0 /* CHNL = 1 */
-#define OP0_IA_SETUP 1
-#define OP0_CONFIGURE 2
-#define OP0_MC_SETUP 3
-#define OP0_TRANSMIT 4
-#define OP0_TDR 5
-#define OP0_DUMP 6
-#define OP0_DIAGNOSE 7
-#define OP0_TRANSMIT_NO_CRC 9
-#define OP0_RETRANSMIT 12
-#define OP0_ABORT 13
-/* Reception operations */
-#define OP0_RCV_ENABLE 8
-#define OP0_RCV_DISABLE 10
-#define OP0_STOP_RCV 11
-/* Status pointer control operations */
-#define OP0_FIX_PTR 15 /* CHNL = 1 */
-#define OP0_RLS_PTR 15 /* CHNL = 0 */
-#define OP0_RESET 14
-
-#define CR0_CHNL (1 << 4) /* 0=Channel 0, 1=Channel 1 */
-#define CR0_STATUS_0 0x00
-#define CR0_STATUS_1 0x20
-#define CR0_STATUS_2 0x40
-#define CR0_STATUS_3 0x60
-#define CR0_INT_ACK (1 << 7) /* 0=No ack, 1=acknowledge */
-
-/* Port 0 Status Register definitions */
-
-#define SR0_NO_RESULT 0 /* dummy */
-#define SR0_EVENT_MASK 0x0f
-#define SR0_IA_SETUP_DONE 1
-#define SR0_CONFIGURE_DONE 2
-#define SR0_MC_SETUP_DONE 3
-#define SR0_TRANSMIT_DONE 4
-#define SR0_TDR_DONE 5
-#define SR0_DUMP_DONE 6
-#define SR0_DIAGNOSE_PASSED 7
-#define SR0_TRANSMIT_NO_CRC_DONE 9
-#define SR0_RETRANSMIT_DONE 12
-#define SR0_EXECUTION_ABORTED 13
-#define SR0_END_OF_FRAME 8
-#define SR0_RECEPTION_ABORTED 10
-#define SR0_DIAGNOSE_FAILED 15
-#define SR0_STOP_REG_HIT 11
-
-#define SR0_CHNL (1 << 4)
-#define SR0_EXECUTION (1 << 5)
-#define SR0_RECEPTION (1 << 6)
-#define SR0_INTERRUPT (1 << 7)
-#define SR0_BOTH_RX_TX (SR0_EXECUTION | SR0_RECEPTION)
-
-#define SR3_EXEC_STATE_MASK 0x03
-#define SR3_EXEC_IDLE 0
-#define SR3_TX_ABORT_IN_PROGRESS 1
-#define SR3_EXEC_ACTIVE 2
-#define SR3_ABORT_IN_PROGRESS 3
-#define SR3_EXEC_CHNL (1 << 2)
-#define SR3_STP_ON_NO_RSRC (1 << 3)
-#define SR3_RCVING_NO_RSRC (1 << 4)
-#define SR3_RCV_STATE_MASK 0x60
-#define SR3_RCV_IDLE 0x00
-#define SR3_RCV_READY 0x20
-#define SR3_RCV_ACTIVE 0x40
-#define SR3_RCV_STOP_IN_PROG 0x60
-#define SR3_RCV_CHNL (1 << 7)
-
-/* Port 1 Command Register definitions */
-
-#define OP1_NOP 0
-#define OP1_SWIT_TO_PORT_0 1
-#define OP1_INT_DISABLE 2
-#define OP1_INT_ENABLE 3
-#define OP1_SET_TS 5
-#define OP1_RST_TS 7
-#define OP1_POWER_DOWN 8
-#define OP1_RESET_RING_MNGMT 11
-#define OP1_RESET 14
-#define OP1_SEL_RST 15
-
-#define CR1_STATUS_4 0x00
-#define CR1_STATUS_5 0x20
-#define CR1_STATUS_6 0x40
-#define CR1_STOP_REG_UPDATE (1 << 7)
-
-/* Receive frame status bits */
-
-#define RX_RCLD (1 << 0)
-#define RX_IA_MATCH (1 << 1)
-#define RX_NO_AD_MATCH (1 << 2)
-#define RX_NO_SFD (1 << 3)
-#define RX_SRT_FRM (1 << 7)
-#define RX_OVRRUN (1 << 8)
-#define RX_ALG_ERR (1 << 10)
-#define RX_CRC_ERR (1 << 11)
-#define RX_LEN_ERR (1 << 12)
-#define RX_RCV_OK (1 << 13)
-#define RX_TYP_LEN (1 << 15)
-
-/* Transmit status bits */
-
-#define TX_NCOL_MASK 0x0f
-#define TX_FRTL (1 << 4)
-#define TX_MAX_COL (1 << 5)
-#define TX_HRT_BEAT (1 << 6)
-#define TX_DEFER (1 << 7)
-#define TX_UND_RUN (1 << 8)
-#define TX_LOST_CTS (1 << 9)
-#define TX_LOST_CRS (1 << 10)
-#define TX_LTCOL (1 << 11)
-#define TX_OK (1 << 13)
-#define TX_COLL (1 << 15)
-
-struct i82593_conf_block {
- u_char fifo_limit : 4,
- forgnesi : 1,
- fifo_32 : 1,
- d6mod : 1,
- throttle_enb : 1;
- u_char throttle : 6,
- cntrxint : 1,
- contin : 1;
- u_char addr_len : 3,
- acloc : 1,
- preamb_len : 2,
- loopback : 2;
- u_char lin_prio : 3,
- tbofstop : 1,
- exp_prio : 3,
- bof_met : 1;
- u_char : 4,
- ifrm_spc : 4;
- u_char : 5,
- slottim_low : 3;
- u_char slottim_hi : 3,
- : 1,
- max_retr : 4;
- u_char prmisc : 1,
- bc_dis : 1,
- : 1,
- crs_1 : 1,
- nocrc_ins : 1,
- crc_1632 : 1,
- : 1,
- crs_cdt : 1;
- u_char cs_filter : 3,
- crs_src : 1,
- cd_filter : 3,
- : 1;
- u_char : 2,
- min_fr_len : 6;
- u_char lng_typ : 1,
- lng_fld : 1,
- rxcrc_xf : 1,
- artx : 1,
- sarec : 1,
- tx_jabber : 1, /* why is this called max_len in the manual? */
- hash_1 : 1,
- lbpkpol : 1;
- u_char : 6,
- fdx : 1,
- : 1;
- u_char dummy_6 : 6, /* supposed to be ones */
- mult_ia : 1,
- dis_bof : 1;
- u_char dummy_1 : 1, /* supposed to be one */
- tx_ifs_retrig : 2,
- mc_all : 1,
- rcv_mon : 2,
- frag_acpt : 1,
- tstrttrs : 1;
- u_char fretx : 1,
- runt_eop : 1,
- hw_sw_pin : 1,
- big_endn : 1,
- syncrqs : 1,
- sttlen : 1,
- tx_eop : 1,
- rx_eop : 1;
- u_char rbuf_size : 5,
- rcvstop : 1,
- : 2;
-};
-
-#define I82593_MAX_MULTICAST_ADDRESSES 128 /* Hardware hashed filter */
-
-#endif /* _I82593_H */
diff --git a/drivers/net/wireless/ipw2x00/Kconfig b/drivers/net/wireless/ipw2x00/Kconfig
index 59ec9eec502..2715b101ade 100644
--- a/drivers/net/wireless/ipw2x00/Kconfig
+++ b/drivers/net/wireless/ipw2x00/Kconfig
@@ -4,7 +4,7 @@
config IPW2100
tristate "Intel PRO/Wireless 2100 Network Connection"
- depends on PCI && WLAN_80211 && CFG80211
+ depends on PCI && CFG80211
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
@@ -65,7 +65,7 @@ config IPW2100_DEBUG
config IPW2200
tristate "Intel PRO/Wireless 2200BG and 2915ABG Network Connection"
- depends on PCI && WLAN_80211 && CFG80211 && CFG80211_WEXT
+ depends on PCI && CFG80211 && CFG80211_WEXT
select WIRELESS_EXT
select WEXT_SPY
select WEXT_PRIV
@@ -154,7 +154,7 @@ config IPW2200_DEBUG
config LIBIPW
tristate
- depends on PCI && WLAN_80211 && CFG80211
+ depends on PCI && CFG80211
select WIRELESS_EXT
select WEXT_SPY
select CRYPTO
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig
index c82c97be7bf..b16b06c2031 100644
--- a/drivers/net/wireless/iwlwifi/Kconfig
+++ b/drivers/net/wireless/iwlwifi/Kconfig
@@ -1,6 +1,6 @@
config IWLWIFI
tristate "Intel Wireless Wifi"
- depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
+ depends on PCI && MAC80211 && EXPERIMENTAL
select FW_LOADER
config IWLWIFI_SPECTRUM_MEASUREMENT
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 3a645e485dd..1e387b9dce1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -164,7 +164,7 @@ struct iwl_cfg iwl1000_bgn_cfg = {
.valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.max_ll_items = OTP_MAX_LL_ITEMS_1000,
.shadow_ram_support = false,
@@ -190,7 +190,7 @@ struct iwl_cfg iwl1000_bg_cfg = {
.valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.max_ll_items = OTP_MAX_LL_ITEMS_1000,
.shadow_ram_support = false,
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
index cbb0585083a..dc81e19674f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
@@ -42,38 +42,6 @@
#define RS_NAME "iwl-3945-rs"
-struct iwl3945_rate_scale_data {
- u64 data;
- s32 success_counter;
- s32 success_ratio;
- s32 counter;
- s32 average_tpt;
- unsigned long stamp;
-};
-
-struct iwl3945_rs_sta {
- spinlock_t lock;
- struct iwl_priv *priv;
- s32 *expected_tpt;
- unsigned long last_partial_flush;
- unsigned long last_flush;
- u32 flush_time;
- u32 last_tx_packets;
- u32 tx_packets;
- u8 tgg;
- u8 flush_pending;
- u8 start_rate;
- u8 ibss_sta_added;
- struct timer_list rate_scale_flush;
- struct iwl3945_rate_scale_data win[IWL_RATE_COUNT_3945];
-#ifdef CONFIG_MAC80211_DEBUGFS
- struct dentry *rs_sta_dbgfs_stats_table_file;
-#endif
-
- /* used to be in sta_info */
- int last_txrate_idx;
-};
-
static s32 iwl3945_expected_tpt_g[IWL_RATE_COUNT_3945] = {
7, 13, 35, 58, 0, 0, 76, 104, 130, 168, 191, 202
};
@@ -370,6 +338,28 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
IWL_DEBUG_RATE(priv, "enter\n");
+ spin_lock_init(&rs_sta->lock);
+
+ rs_sta->priv = priv;
+
+ rs_sta->start_rate = IWL_RATE_INVALID;
+
+ /* default to just 802.11b */
+ rs_sta->expected_tpt = iwl3945_expected_tpt_b;
+
+ rs_sta->last_partial_flush = jiffies;
+ rs_sta->last_flush = jiffies;
+ rs_sta->flush_time = IWL_RATE_FLUSH;
+ rs_sta->last_tx_packets = 0;
+ rs_sta->ibss_sta_added = 0;
+
+ init_timer(&rs_sta->rate_scale_flush);
+ rs_sta->rate_scale_flush.data = (unsigned long)rs_sta;
+ rs_sta->rate_scale_flush.function = &iwl3945_bg_rate_scale_flush;
+
+ for (i = 0; i < IWL_RATE_COUNT_3945; i++)
+ iwl3945_clear_window(&rs_sta->win[i]);
+
/* TODO: what is a good starting rate for STA? About middle? Maybe not
* the lowest or the highest rate.. Could consider using RSSI from
* previous packets? Need to have IEEE 802.1X auth succeed immediately
@@ -409,45 +399,11 @@ static void *rs_alloc_sta(void *iwl_priv, struct ieee80211_sta *sta, gfp_t gfp)
{
struct iwl3945_rs_sta *rs_sta;
struct iwl3945_sta_priv *psta = (void *) sta->drv_priv;
- struct iwl_priv *priv = iwl_priv;
- int i;
-
- /*
- * XXX: If it's using sta->drv_priv anyway, it might
- * as well just put all the information there.
- */
+ struct iwl_priv *priv __maybe_unused = iwl_priv;
IWL_DEBUG_RATE(priv, "enter\n");
- rs_sta = kzalloc(sizeof(struct iwl3945_rs_sta), gfp);
- if (!rs_sta) {
- IWL_DEBUG_RATE(priv, "leave: ENOMEM\n");
- return NULL;
- }
-
- psta->rs_sta = rs_sta;
-
- spin_lock_init(&rs_sta->lock);
-
- rs_sta->priv = priv;
-
- rs_sta->start_rate = IWL_RATE_INVALID;
-
- /* default to just 802.11b */
- rs_sta->expected_tpt = iwl3945_expected_tpt_b;
-
- rs_sta->last_partial_flush = jiffies;
- rs_sta->last_flush = jiffies;
- rs_sta->flush_time = IWL_RATE_FLUSH;
- rs_sta->last_tx_packets = 0;
- rs_sta->ibss_sta_added = 0;
-
- init_timer(&rs_sta->rate_scale_flush);
- rs_sta->rate_scale_flush.data = (unsigned long)rs_sta;
- rs_sta->rate_scale_flush.function = &iwl3945_bg_rate_scale_flush;
-
- for (i = 0; i < IWL_RATE_COUNT_3945; i++)
- iwl3945_clear_window(&rs_sta->win[i]);
+ rs_sta = &psta->rs_sta;
IWL_DEBUG_RATE(priv, "leave\n");
@@ -458,14 +414,11 @@ static void rs_free_sta(void *iwl_priv, struct ieee80211_sta *sta,
void *priv_sta)
{
struct iwl3945_sta_priv *psta = (void *) sta->drv_priv;
- struct iwl3945_rs_sta *rs_sta = priv_sta;
+ struct iwl3945_rs_sta *rs_sta = &psta->rs_sta;
struct iwl_priv *priv __maybe_unused = rs_sta->priv;
- psta->rs_sta = NULL;
-
IWL_DEBUG_RATE(priv, "enter\n");
del_timer_sync(&rs_sta->rate_scale_flush);
- kfree(rs_sta);
IWL_DEBUG_RATE(priv, "leave\n");
}
@@ -960,14 +913,15 @@ void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id)
rcu_read_lock();
- sta = ieee80211_find_sta(hw, priv->stations[sta_id].sta.sta.addr);
+ sta = ieee80211_find_sta(priv->vif,
+ priv->stations[sta_id].sta.sta.addr);
if (!sta) {
rcu_read_unlock();
return;
}
psta = (void *) sta->drv_priv;
- rs_sta = psta->rs_sta;
+ rs_sta = &psta->rs_sta;
spin_lock_irqsave(&rs_sta->lock, flags);
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index ebb999a51b5..2b0d65c5780 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -74,8 +74,41 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
/* Module parameters accessible from iwl-*.c */
extern struct iwl_mod_params iwl3945_mod_params;
+struct iwl3945_rate_scale_data {
+ u64 data;
+ s32 success_counter;
+ s32 success_ratio;
+ s32 counter;
+ s32 average_tpt;
+ unsigned long stamp;
+};
+
+struct iwl3945_rs_sta {
+ spinlock_t lock;
+ struct iwl_priv *priv;
+ s32 *expected_tpt;
+ unsigned long last_partial_flush;
+ unsigned long last_flush;
+ u32 flush_time;
+ u32 last_tx_packets;
+ u32 tx_packets;
+ u8 tgg;
+ u8 flush_pending;
+ u8 start_rate;
+ u8 ibss_sta_added;
+ struct timer_list rate_scale_flush;
+ struct iwl3945_rate_scale_data win[IWL_RATE_COUNT_3945];
+#ifdef CONFIG_MAC80211_DEBUGFS
+ struct dentry *rs_sta_dbgfs_stats_table_file;
+#endif
+
+ /* used to be in sta_info */
+ int last_txrate_idx;
+};
+
+
struct iwl3945_sta_priv {
- struct iwl3945_rs_sta *rs_sta;
+ struct iwl3945_rs_sta rs_sta;
};
enum iwl3945_antenna {
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index d256fecc6cd..910217f0ad8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -591,16 +591,6 @@ static void iwl5000_tx_queue_set_status(struct iwl_priv *priv,
scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
}
-static int iwl5000_send_wimax_coex(struct iwl_priv *priv)
-{
- struct iwl_wimax_coex_cmd coex_cmd;
-
- memset(&coex_cmd, 0, sizeof(coex_cmd));
-
- return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
- sizeof(coex_cmd), &coex_cmd);
-}
-
int iwl5000_alive_notify(struct iwl_priv *priv)
{
u32 a;
@@ -681,7 +671,7 @@ int iwl5000_alive_notify(struct iwl_priv *priv)
spin_unlock_irqrestore(&priv->lock, flags);
- iwl5000_send_wimax_coex(priv);
+ iwl_send_wimax_coex(priv);
iwl5000_set_Xtal_calib(priv);
iwl_send_calib_results(priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index 32466d38d1a..70e117f8d0c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -299,7 +299,7 @@ struct iwl_cfg iwl6000h_2agn_cfg = {
.valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_HYBRID,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -329,7 +329,7 @@ struct iwl_cfg iwl6000h_2abg_cfg = {
.valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_HYBRID,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -358,7 +358,7 @@ struct iwl_cfg iwl6000h_2bg_cfg = {
.valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_HYBRID,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -390,7 +390,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = {
.valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_INTERNAL,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -420,7 +420,7 @@ struct iwl_cfg iwl6000i_2abg_cfg = {
.valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_INTERNAL,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -449,7 +449,7 @@ struct iwl_cfg iwl6000i_2bg_cfg = {
.valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_INTERNAL,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -478,7 +478,7 @@ struct iwl_cfg iwl6050_2agn_cfg = {
.valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_SYSTEM,
.max_ll_items = OTP_MAX_LL_ITEMS_6x50,
@@ -490,6 +490,8 @@ struct iwl_cfg iwl6050_2agn_cfg = {
.supports_idle = true,
.adv_thermal_throttle = true,
.support_ct_kill_exit = true,
+ .support_sm_ps = true,
+ .support_wimax_coexist = true,
};
struct iwl_cfg iwl6050_2abg_cfg = {
@@ -508,7 +510,7 @@ struct iwl_cfg iwl6050_2abg_cfg = {
.valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_SYSTEM,
.max_ll_items = OTP_MAX_LL_ITEMS_6x50,
@@ -519,6 +521,7 @@ struct iwl_cfg iwl6050_2abg_cfg = {
.supports_idle = true,
.adv_thermal_throttle = true,
.support_ct_kill_exit = true,
+ .support_wimax_coexist = true,
};
struct iwl_cfg iwl6000_3agn_cfg = {
@@ -537,7 +540,7 @@ struct iwl_cfg iwl6000_3agn_cfg = {
.valid_tx_ant = ANT_ABC,
.valid_rx_ant = ANT_ABC,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_SYSTEM,
.max_ll_items = OTP_MAX_LL_ITEMS_6x00,
@@ -567,7 +570,7 @@ struct iwl_cfg iwl6050_3agn_cfg = {
.valid_tx_ant = ANT_ABC,
.valid_rx_ant = ANT_ABC,
.pll_cfg_val = 0,
- .set_l0s = false,
+ .set_l0s = true,
.use_bsm = false,
.pa_type = IWL_PA_SYSTEM,
.max_ll_items = OTP_MAX_LL_ITEMS_6x50,
@@ -579,6 +582,8 @@ struct iwl_cfg iwl6050_3agn_cfg = {
.supports_idle = true,
.adv_thermal_throttle = true,
.support_ct_kill_exit = true,
+ .support_sm_ps = true,
+ .support_wimax_coexist = true,
};
MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index 27d4ece4d46..43edd8fd440 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -2477,19 +2477,12 @@ static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta,
struct iwl_lq_sta *lq_sta;
struct iwl_station_priv *sta_priv = (struct iwl_station_priv *) sta->drv_priv;
struct iwl_priv *priv;
- int i, j;
priv = (struct iwl_priv *)priv_rate;
IWL_DEBUG_RATE(priv, "create station rate scale window\n");
lq_sta = &sta_priv->lq_sta;
- lq_sta->lq.sta_id = 0xff;
-
- for (j = 0; j < LQ_SIZE; j++)
- for (i = 0; i < IWL_RATE_COUNT; i++)
- rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]);
-
return lq_sta;
}
@@ -2502,6 +2495,12 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
struct iwl_lq_sta *lq_sta = priv_sta;
+ lq_sta->lq.sta_id = 0xff;
+
+ for (j = 0; j < LQ_SIZE; j++)
+ for (i = 0; i < IWL_RATE_COUNT; i++)
+ rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]);
+
lq_sta->flush_timer = 0;
lq_sta->supp_rates = sta->supp_rates[sband->band];
for (j = 0; j < LQ_SIZE; j++)
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index fa1672e99e4..b5fe8f87aa7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -190,11 +190,7 @@ int iwl_commit_rxon(struct iwl_priv *priv)
priv->start_calib = 0;
/* Add the broadcast address so we can send broadcast frames */
- if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
- IWL_INVALID_STATION) {
- IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
- return -EIO;
- }
+ iwl_add_bcast_station(priv);
/* If we have set the ASSOC_MSK and we are in BSS mode then
* add the IWL_AP_ID to the station rate table */
@@ -890,6 +886,7 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
u32 inta, handled = 0;
u32 inta_fh;
unsigned long flags;
+ u32 i;
#ifdef CONFIG_IWLWIFI_DEBUG
u32 inta_mask;
#endif
@@ -1007,19 +1004,17 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
handled |= CSR_INT_BIT_SW_ERR;
}
- /* uCode wakes up after power-down sleep */
+ /*
+ * uCode wakes up after power-down sleep.
+ * Tell device about any new tx or host commands enqueued,
+ * and about any Rx buffers made available while asleep.
+ */
if (inta & CSR_INT_BIT_WAKEUP) {
IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
- iwl_txq_update_write_ptr(priv, &priv->txq[0]);
- iwl_txq_update_write_ptr(priv, &priv->txq[1]);
- iwl_txq_update_write_ptr(priv, &priv->txq[2]);
- iwl_txq_update_write_ptr(priv, &priv->txq[3]);
- iwl_txq_update_write_ptr(priv, &priv->txq[4]);
- iwl_txq_update_write_ptr(priv, &priv->txq[5]);
-
+ for (i = 0; i < priv->hw_params.max_txq_num; i++)
+ iwl_txq_update_write_ptr(priv, &priv->txq[i]);
priv->isr_stats.wakeup++;
-
handled |= CSR_INT_BIT_WAKEUP;
}
@@ -1033,11 +1028,12 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
}
+ /* This "Tx" DMA channel is used only for loading uCode */
if (inta & CSR_INT_BIT_FH_TX) {
- IWL_DEBUG_ISR(priv, "Tx interrupt\n");
+ IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
priv->isr_stats.tx++;
handled |= CSR_INT_BIT_FH_TX;
- /* FH finished to write, send event */
+ /* Wake up uCode load routine, now that load is complete */
priv->ucode_write_complete = 1;
wake_up_interruptible(&priv->wait_command_queue);
}
@@ -1234,12 +1230,13 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
iwl_leds_background(priv);
}
+ /* This "Tx" DMA channel is used only for loading uCode */
if (inta & CSR_INT_BIT_FH_TX) {
iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
- IWL_DEBUG_ISR(priv, "Tx interrupt\n");
+ IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
priv->isr_stats.tx++;
handled |= CSR_INT_BIT_FH_TX;
- /* FH finished to write, send event */
+ /* Wake up uCode load routine, now that load is complete */
priv->ucode_write_complete = 1;
wake_up_interruptible(&priv->wait_command_queue);
}
@@ -1377,6 +1374,14 @@ static int iwl_read_ucode(struct iwl_priv *priv)
IWL_UCODE_API(priv->ucode_ver),
IWL_UCODE_SERIAL(priv->ucode_ver));
+ snprintf(priv->hw->wiphy->fw_version,
+ sizeof(priv->hw->wiphy->fw_version),
+ "%u.%u.%u.%u",
+ IWL_UCODE_MAJOR(priv->ucode_ver),
+ IWL_UCODE_MINOR(priv->ucode_ver),
+ IWL_UCODE_API(priv->ucode_ver),
+ IWL_UCODE_SERIAL(priv->ucode_ver));
+
if (build)
IWL_DEBUG_INFO(priv, "Build %u\n", build);
@@ -2515,7 +2520,7 @@ void iwl_config_ap(struct iwl_priv *priv)
spin_lock_irqsave(&priv->lock, flags);
iwl_activate_qos(priv, 1);
spin_unlock_irqrestore(&priv->lock, flags);
- iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
+ iwl_add_bcast_station(priv);
}
iwl_send_beacon_cmd(priv);
@@ -2963,6 +2968,100 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
del_timer_sync(&priv->statistics_periodic);
}
+static void iwl_init_hw_rates(struct iwl_priv *priv,
+ struct ieee80211_rate *rates)
+{
+ int i;
+
+ for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
+ rates[i].bitrate = iwl_rates[i].ieee * 5;
+ rates[i].hw_value = i; /* Rate scaling will work on indexes */
+ rates[i].hw_value_short = i;
+ rates[i].flags = 0;
+ if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
+ /*
+ * If CCK != 1M then set short preamble rate flag.
+ */
+ rates[i].flags |=
+ (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
+ 0 : IEEE80211_RATE_SHORT_PREAMBLE;
+ }
+ }
+}
+
+static int iwl_init_drv(struct iwl_priv *priv)
+{
+ int ret;
+
+ priv->ibss_beacon = NULL;
+
+ spin_lock_init(&priv->lock);
+ spin_lock_init(&priv->sta_lock);
+ spin_lock_init(&priv->hcmd_lock);
+
+ INIT_LIST_HEAD(&priv->free_frames);
+
+ mutex_init(&priv->mutex);
+
+ /* Clear the driver's (not device's) station table */
+ iwl_clear_stations_table(priv);
+
+ priv->ieee_channels = NULL;
+ priv->ieee_rates = NULL;
+ priv->band = IEEE80211_BAND_2GHZ;
+
+ priv->iw_mode = NL80211_IFTYPE_STATION;
+ if (priv->cfg->support_sm_ps)
+ priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
+ else
+ priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
+
+ /* Choose which receivers/antennas to use */
+ if (priv->cfg->ops->hcmd->set_rxon_chain)
+ priv->cfg->ops->hcmd->set_rxon_chain(priv);
+
+ iwl_init_scan_params(priv);
+
+ iwl_reset_qos(priv);
+
+ priv->qos_data.qos_active = 0;
+ priv->qos_data.qos_cap.val = 0;
+
+ priv->rates_mask = IWL_RATES_MASK;
+ /* Set the tx_power_user_lmt to the lowest power level
+ * this value will get overwritten by channel max power avg
+ * from eeprom */
+ priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
+
+ ret = iwl_init_channel_map(priv);
+ if (ret) {
+ IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
+ goto err;
+ }
+
+ ret = iwlcore_init_geos(priv);
+ if (ret) {
+ IWL_ERR(priv, "initializing geos failed: %d\n", ret);
+ goto err_free_channel_map;
+ }
+ iwl_init_hw_rates(priv, priv->ieee_rates);
+
+ return 0;
+
+err_free_channel_map:
+ iwl_free_channel_map(priv);
+err:
+ return ret;
+}
+
+static void iwl_uninit_drv(struct iwl_priv *priv)
+{
+ iwl_calib_free_results(priv);
+ iwlcore_free_geos(priv);
+ iwl_free_channel_map(priv);
+ kfree(priv->scan);
+}
+
static struct attribute *iwl_sysfs_entries[] = {
&dev_attr_flags.attr,
&dev_attr_filter_flags.attr,
@@ -3105,12 +3204,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
goto out_iounmap;
}
- /* amp init */
- err = priv->cfg->ops->lib->apm_ops.init(priv);
- if (err < 0) {
- IWL_ERR(priv, "Failed to init APMG\n");
- goto out_iounmap;
- }
/*****************
* 4. Read EEPROM
*****************/
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.c b/drivers/net/wireless/iwlwifi/iwl-calib.c
index 1f801eb9fbf..d994de7438d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-calib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-calib.c
@@ -132,6 +132,7 @@ void iwl_calib_free_results(struct iwl_priv *priv)
priv->calib_results[i].buf_len = 0;
}
}
+EXPORT_SYMBOL(iwl_calib_free_results);
/*****************************************************************************
* RUNTIME calibrations framework
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index 954bad60355..b62c90ec9e1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -3503,30 +3503,134 @@ struct iwl_led_cmd {
} __attribute__ ((packed));
/*
- * Coexistence WIFI/WIMAX Command
- * COEX_PRIORITY_TABLE_CMD = 0x5a
- *
+ * station priority table entries
+ * also used as potential "events" value for both
+ * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
*/
+
+/*
+ * COEX events entry flag masks
+ * RP - Requested Priority
+ * WP - Win Medium Priority: priority assigned when the contention has been won
+ */
+#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
+#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
+#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
+
+#define COEX_CU_UNASSOC_IDLE_RP 4
+#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
+#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
+#define COEX_CU_CALIBRATION_RP 4
+#define COEX_CU_PERIODIC_CALIBRATION_RP 4
+#define COEX_CU_CONNECTION_ESTAB_RP 4
+#define COEX_CU_ASSOCIATED_IDLE_RP 4
+#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
+#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
+#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
+#define COEX_CU_RF_ON_RP 6
+#define COEX_CU_RF_OFF_RP 4
+#define COEX_CU_STAND_ALONE_DEBUG_RP 6
+#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
+#define COEX_CU_RSRVD1_RP 4
+#define COEX_CU_RSRVD2_RP 4
+
+#define COEX_CU_UNASSOC_IDLE_WP 3
+#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
+#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
+#define COEX_CU_CALIBRATION_WP 3
+#define COEX_CU_PERIODIC_CALIBRATION_WP 3
+#define COEX_CU_CONNECTION_ESTAB_WP 3
+#define COEX_CU_ASSOCIATED_IDLE_WP 3
+#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
+#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
+#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
+#define COEX_CU_RF_ON_WP 3
+#define COEX_CU_RF_OFF_WP 3
+#define COEX_CU_STAND_ALONE_DEBUG_WP 6
+#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
+#define COEX_CU_RSRVD1_WP 3
+#define COEX_CU_RSRVD2_WP 3
+
+#define COEX_UNASSOC_IDLE_FLAGS 0
+#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_CALIBRATION_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_PERIODIC_CALIBRATION_FLAGS 0
+/*
+ * COEX_CONNECTION_ESTAB:
+ * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
+ */
+#define COEX_CONNECTION_ESTAB_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
+ COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
+#define COEX_ASSOCIATED_IDLE_FLAGS 0
+#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_ASSOC_AUTO_SCAN_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
+#define COEX_RF_ON_FLAGS 0
+#define COEX_RF_OFF_FLAGS 0
+#define COEX_STAND_ALONE_DEBUG_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
+#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
+ COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
+#define COEX_RSRVD1_FLAGS 0
+#define COEX_RSRVD2_FLAGS 0
+/*
+ * COEX_CU_RF_ON is the event wrapping all radio ownership.
+ * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
+ */
+#define COEX_CU_RF_ON_FLAGS \
+ (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
+ COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
+ COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
+
+
enum {
+ /* un-association part */
COEX_UNASSOC_IDLE = 0,
COEX_UNASSOC_MANUAL_SCAN = 1,
COEX_UNASSOC_AUTO_SCAN = 2,
+ /* calibration */
COEX_CALIBRATION = 3,
COEX_PERIODIC_CALIBRATION = 4,
+ /* connection */
COEX_CONNECTION_ESTAB = 5,
+ /* association part */
COEX_ASSOCIATED_IDLE = 6,
COEX_ASSOC_MANUAL_SCAN = 7,
COEX_ASSOC_AUTO_SCAN = 8,
COEX_ASSOC_ACTIVE_LEVEL = 9,
+ /* RF ON/OFF */
COEX_RF_ON = 10,
COEX_RF_OFF = 11,
COEX_STAND_ALONE_DEBUG = 12,
+ /* IPAN */
COEX_IPAN_ASSOC_LEVEL = 13,
+ /* reserved */
COEX_RSRVD1 = 14,
COEX_RSRVD2 = 15,
COEX_NUM_OF_EVENTS = 16
};
+/*
+ * Coexistence WIFI/WIMAX Command
+ * COEX_PRIORITY_TABLE_CMD = 0x5a
+ *
+ */
struct iwl_wimax_coex_event_entry {
u8 request_prio;
u8 win_medium_prio;
@@ -3551,6 +3655,55 @@ struct iwl_wimax_coex_cmd {
struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
} __attribute__ ((packed));
+/*
+ * Coexistence MEDIUM NOTIFICATION
+ * COEX_MEDIUM_NOTIFICATION = 0x5b
+ *
+ * notification from uCode to host to indicate medium changes
+ *
+ */
+/*
+ * status field
+ * bit 0 - 2: medium status
+ * bit 3: medium change indication
+ * bit 4 - 31: reserved
+ */
+/* status option values, (0 - 2 bits) */
+#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
+#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
+#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
+#define COEX_MEDIUM_MSK (0x7)
+
+/* send notification status (1 bit) */
+#define COEX_MEDIUM_CHANGED (0x8)
+#define COEX_MEDIUM_CHANGED_MSK (0x8)
+#define COEX_MEDIUM_SHIFT (3)
+
+struct iwl_coex_medium_notification {
+ __le32 status;
+ __le32 events;
+} __attribute__ ((packed));
+
+/*
+ * Coexistence EVENT Command
+ * COEX_EVENT_CMD = 0x5c
+ *
+ * send from host to uCode for coex event request.
+ */
+/* flags options */
+#define COEX_EVENT_REQUEST_MSK (0x1)
+
+struct iwl_coex_event_cmd {
+ u8 flags;
+ u8 event;
+ __le16 reserved;
+} __attribute__ ((packed));
+
+struct iwl_coex_event_resp {
+ __le32 status;
+} __attribute__ ((packed));
+
+
/******************************************************************************
* (13)
* Union of all expected notifications/responses:
@@ -3587,6 +3740,8 @@ struct iwl_rx_packet {
struct iwl_notif_statistics stats;
struct iwl_compressed_ba_resp compressed_ba;
struct iwl_missed_beacon_notif missed_beacon;
+ struct iwl_coex_medium_notification coex_medium_notif;
+ struct iwl_coex_event_resp coex_event;
__le32 status;
u8 raw[0];
} u;
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index d2b56baf98f..e0b5b4aef41 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -46,6 +46,37 @@ MODULE_VERSION(IWLWIFI_VERSION);
MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
MODULE_LICENSE("GPL");
+static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
+ {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
+ 0, COEX_UNASSOC_IDLE_FLAGS},
+ {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
+ 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
+ {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
+ 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
+ {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
+ 0, COEX_CALIBRATION_FLAGS},
+ {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
+ 0, COEX_PERIODIC_CALIBRATION_FLAGS},
+ {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
+ 0, COEX_CONNECTION_ESTAB_FLAGS},
+ {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
+ 0, COEX_ASSOCIATED_IDLE_FLAGS},
+ {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
+ 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
+ {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
+ 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
+ {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
+ 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
+ {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
+ {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
+ {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
+ 0, COEX_STAND_ALONE_DEBUG_FLAGS},
+ {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
+ 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
+ {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
+ {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
+};
+
#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
[IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
IWL_RATE_SISO_##s##M_PLCP, \
@@ -414,8 +445,12 @@ static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
if (priv->cfg->ht_greenfield_support)
ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
- ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
- (WLAN_HT_CAP_SM_PS_DISABLED << 2));
+ if (priv->cfg->support_sm_ps)
+ ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
+ (WLAN_HT_CAP_SM_PS_DYNAMIC << 2));
+ else
+ ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
+ (WLAN_HT_CAP_SM_PS_DISABLED << 2));
max_bit_rate = MAX_BIT_RATE_20_MHZ;
if (priv->hw_params.ht40_channel & BIT(band)) {
@@ -451,28 +486,6 @@ static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
}
}
-static void iwlcore_init_hw_rates(struct iwl_priv *priv,
- struct ieee80211_rate *rates)
-{
- int i;
-
- for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
- rates[i].bitrate = iwl_rates[i].ieee * 5;
- rates[i].hw_value = i; /* Rate scaling will work on indexes */
- rates[i].hw_value_short = i;
- rates[i].flags = 0;
- if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
- /*
- * If CCK != 1M then set short preamble rate flag.
- */
- rates[i].flags |=
- (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
- 0 : IEEE80211_RATE_SHORT_PREAMBLE;
- }
- }
-}
-
-
/**
* iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
*/
@@ -985,17 +998,35 @@ static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
}
/*
- * When we are in power saving, there's no difference between
- * using multiple chains or just a single chain, but due to the
- * lack of SM PS we lose a lot of throughput if we use just a
- * single chain.
- *
- * Therefore, use the active count here (which will use multiple
- * chains unless connected to a legacy AP).
+ * When we are in power saving mode, unless device support spatial
+ * multiplexing power save, use the active count for rx chain count.
*/
static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
{
- return active_cnt;
+ int idle_cnt = active_cnt;
+ bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
+
+ if (priv->cfg->support_sm_ps) {
+ /* # Rx chains when idling and maybe trying to save power */
+ switch (priv->current_ht_config.sm_ps) {
+ case WLAN_HT_CAP_SM_PS_STATIC:
+ case WLAN_HT_CAP_SM_PS_DYNAMIC:
+ idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
+ IWL_NUM_IDLE_CHAINS_SINGLE;
+ break;
+ case WLAN_HT_CAP_SM_PS_DISABLED:
+ idle_cnt = (is_cam) ? active_cnt :
+ IWL_NUM_IDLE_CHAINS_SINGLE;
+ break;
+ case WLAN_HT_CAP_SM_PS_INVALID:
+ default:
+ IWL_ERR(priv, "invalid sm_ps mode %d\n",
+ priv->current_ht_config.sm_ps);
+ WARN_ON(1);
+ break;
+ }
+ }
+ return idle_cnt;
}
/* up to 4 chains */
@@ -1353,39 +1384,39 @@ EXPORT_SYMBOL(iwl_irq_handle_error);
int iwl_apm_stop_master(struct iwl_priv *priv)
{
- unsigned long flags;
-
- spin_lock_irqsave(&priv->lock, flags);
+ int ret = 0;
- /* set stop master bit */
+ /* stop device's busmaster DMA activity */
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
- iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
+ ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
+ if (ret)
+ IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
- spin_unlock_irqrestore(&priv->lock, flags);
IWL_DEBUG_INFO(priv, "stop master\n");
- return 0;
+ return ret;
}
EXPORT_SYMBOL(iwl_apm_stop_master);
void iwl_apm_stop(struct iwl_priv *priv)
{
- unsigned long flags;
-
IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
+ /* Stop device's DMA activity */
iwl_apm_stop_master(priv);
- spin_lock_irqsave(&priv->lock, flags);
-
+ /* Reset the entire device */
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
udelay(10);
- /* clear "init complete" move adapter D0A* --> D0U state */
+
+ /*
+ * Clear "initialization complete" bit to move adapter from
+ * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
+ */
iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
- spin_unlock_irqrestore(&priv->lock, flags);
}
EXPORT_SYMBOL(iwl_apm_stop);
@@ -1430,8 +1461,12 @@ int iwl_apm_init(struct iwl_priv *priv)
CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
/*
- * HW bug W/A - costs negligible power consumption ...
- * Check if BIOS (or OS) enabled L1-ASPM on this device
+ * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
+ * Check if BIOS (or OS) enabled L1-ASPM on this device.
+ * If so (likely), disable L0S, so device moves directly L0->L1;
+ * costs negligible amount of power savings.
+ * If not (unlikely), enable L0S, so there is at least some
+ * power savings, even without L1.
*/
if (priv->cfg->set_l0s) {
lctl = iwl_pcie_link_ctl(priv);
@@ -1567,68 +1602,6 @@ int iwl_set_hw_params(struct iwl_priv *priv)
}
EXPORT_SYMBOL(iwl_set_hw_params);
-int iwl_init_drv(struct iwl_priv *priv)
-{
- int ret;
-
- priv->ibss_beacon = NULL;
-
- spin_lock_init(&priv->lock);
- spin_lock_init(&priv->sta_lock);
- spin_lock_init(&priv->hcmd_lock);
-
- INIT_LIST_HEAD(&priv->free_frames);
-
- mutex_init(&priv->mutex);
-
- /* Clear the driver's (not device's) station table */
- iwl_clear_stations_table(priv);
-
- priv->ieee_channels = NULL;
- priv->ieee_rates = NULL;
- priv->band = IEEE80211_BAND_2GHZ;
-
- priv->iw_mode = NL80211_IFTYPE_STATION;
-
- /* Choose which receivers/antennas to use */
- if (priv->cfg->ops->hcmd->set_rxon_chain)
- priv->cfg->ops->hcmd->set_rxon_chain(priv);
-
- iwl_init_scan_params(priv);
-
- iwl_reset_qos(priv);
-
- priv->qos_data.qos_active = 0;
- priv->qos_data.qos_cap.val = 0;
-
- priv->rates_mask = IWL_RATES_MASK;
- /* Set the tx_power_user_lmt to the lowest power level
- * this value will get overwritten by channel max power avg
- * from eeprom */
- priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
-
- ret = iwl_init_channel_map(priv);
- if (ret) {
- IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
- goto err;
- }
-
- ret = iwlcore_init_geos(priv);
- if (ret) {
- IWL_ERR(priv, "initializing geos failed: %d\n", ret);
- goto err_free_channel_map;
- }
- iwlcore_init_hw_rates(priv, priv->ieee_rates);
-
- return 0;
-
-err_free_channel_map:
- iwl_free_channel_map(priv);
-err:
- return ret;
-}
-EXPORT_SYMBOL(iwl_init_drv);
-
int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
{
int ret = 0;
@@ -1676,15 +1649,6 @@ int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
}
EXPORT_SYMBOL(iwl_set_tx_power);
-void iwl_uninit_drv(struct iwl_priv *priv)
-{
- iwl_calib_free_results(priv);
- iwlcore_free_geos(priv);
- iwl_free_channel_map(priv);
- kfree(priv->scan);
-}
-EXPORT_SYMBOL(iwl_uninit_drv);
-
#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
/* Free dram table */
@@ -2336,7 +2300,7 @@ static void iwl_ht_conf(struct iwl_priv *priv,
switch (priv->iw_mode) {
case NL80211_IFTYPE_STATION:
rcu_read_lock();
- sta = ieee80211_find_sta(priv->hw, priv->bssid);
+ sta = ieee80211_find_sta(priv->vif, priv->bssid);
if (sta) {
struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
int maxstreams;
@@ -2346,6 +2310,12 @@ static void iwl_ht_conf(struct iwl_priv *priv,
>> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
maxstreams += 1;
+ ht_conf->sm_ps =
+ (u8)((ht_cap->cap & IEEE80211_HT_CAP_SM_PS)
+ >> 2);
+ IWL_DEBUG_MAC80211(priv, "sm_ps: 0x%x\n",
+ ht_conf->sm_ps);
+
if ((ht_cap->mcs.rx_mask[1] == 0) &&
(ht_cap->mcs.rx_mask[2] == 0))
ht_conf->single_chain_sufficient = true;
@@ -2926,6 +2896,34 @@ void iwl_free_txq_mem(struct iwl_priv *priv)
}
EXPORT_SYMBOL(iwl_free_txq_mem);
+int iwl_send_wimax_coex(struct iwl_priv *priv)
+{
+ struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
+
+ if (priv->cfg->support_wimax_coexist) {
+ /* UnMask wake up src at associated sleep */
+ coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
+
+ /* UnMask wake up src at unassociated sleep */
+ coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
+ memcpy(coex_cmd.sta_prio, cu_priorities,
+ sizeof(struct iwl_wimax_coex_event_entry) *
+ COEX_NUM_OF_EVENTS);
+
+ /* enabling the coexistence feature */
+ coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
+
+ /* enabling the priorities tables */
+ coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
+ } else {
+ /* coexistence is disabled */
+ memset(&coex_cmd, 0, sizeof(coex_cmd));
+ }
+ return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
+ sizeof(coex_cmd), &coex_cmd);
+}
+EXPORT_SYMBOL(iwl_send_wimax_coex);
+
#ifdef CONFIG_IWLWIFI_DEBUGFS
#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index b875dcfca2d..9574d8f3353 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -228,6 +228,8 @@ struct iwl_mod_params {
* @chain_noise_num_beacons: number of beacons used to compute chain noise
* @adv_thermal_throttle: support advance thermal throttle
* @support_ct_kill_exit: support ct kill exit condition
+ * @support_sm_ps: support spatial multiplexing power save
+ * @support_wimax_coexist: support wimax/wifi co-exist
*
* We enable the driver to be backward compatible wrt API version. The
* driver specifies which APIs it supports (with @ucode_api_max being the
@@ -283,6 +285,8 @@ struct iwl_cfg {
const bool supports_idle;
bool adv_thermal_throttle;
bool support_ct_kill_exit;
+ bool support_sm_ps;
+ const bool support_wimax_coexist;
};
/***************************
@@ -316,8 +320,6 @@ void iwl_configure_filter(struct ieee80211_hw *hw,
unsigned int *total_flags, u64 multicast);
int iwl_hw_nic_init(struct iwl_priv *priv);
int iwl_set_hw_params(struct iwl_priv *priv);
-int iwl_init_drv(struct iwl_priv *priv);
-void iwl_uninit_drv(struct iwl_priv *priv);
bool iwl_is_monitor_mode(struct iwl_priv *priv);
void iwl_post_associate(struct iwl_priv *priv);
void iwl_bss_info_changed(struct ieee80211_hw *hw,
@@ -340,6 +342,7 @@ int iwl_alloc_txq_mem(struct iwl_priv *priv);
void iwl_free_txq_mem(struct iwl_priv *priv);
void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
__le32 *tx_flags);
+int iwl_send_wimax_coex(struct iwl_priv *priv);
#ifdef CONFIG_IWLWIFI_DEBUGFS
int iwl_alloc_traffic_mem(struct iwl_priv *priv);
void iwl_free_traffic_mem(struct iwl_priv *priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index e7ce6738766..cb2642c18da 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -517,6 +517,7 @@ struct iwl_ht_config {
bool is_ht;
bool is_40mhz;
bool single_chain_sufficient;
+ u8 sm_ps;
/* BSS related data */
u8 extension_chan_offset;
u8 ht_protection;
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 9429cb1c69b..8a0709e81a9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -533,6 +533,10 @@ int iwl_eeprom_init(struct iwl_priv *priv)
goto err;
}
if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
+
+ /* OTP reads require powered-up chip */
+ priv->cfg->ops->lib->apm_ops.init(priv);
+
ret = iwl_init_otp_access(priv);
if (ret) {
IWL_ERR(priv, "Failed to initialize OTP access.\n");
@@ -563,6 +567,13 @@ int iwl_eeprom_init(struct iwl_priv *priv)
e[cache_addr / 2] = eeprom_data;
cache_addr += sizeof(u16);
}
+
+ /*
+ * Now that OTP reads are complete, reset chip to save
+ * power until we load uCode during "up".
+ */
+ priv->cfg->ops->lib->apm_ops.stop(priv);
+
} else {
/* eeprom is an array of 16bit values */
for (addr = 0; addr < sz; addr += sizeof(u16)) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
index f2a60dc4109..905645d15a9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
@@ -55,6 +55,8 @@ const char *get_cmd_string(u8 cmd)
IWL_CMD(REPLY_LEDS_CMD);
IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
IWL_CMD(COEX_PRIORITY_TABLE_CMD);
+ IWL_CMD(COEX_MEDIUM_NOTIFICATION);
+ IWL_CMD(COEX_EVENT_CMD);
IWL_CMD(RADAR_NOTIFICATION);
IWL_CMD(REPLY_QUIET_CMD);
IWL_CMD(REPLY_CHANNEL_SWITCH);
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index 4fca65a2fe9..1eb0d0bf1fe 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -401,6 +401,7 @@ void iwl_init_scan_params(struct iwl_priv *priv)
if (!priv->scan_tx_ant[IEEE80211_BAND_2GHZ])
priv->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
}
+EXPORT_SYMBOL(iwl_init_scan_params);
static int iwl_scan_initiate(struct iwl_priv *priv)
{
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index dc74c16d36a..eba36f73738 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -182,6 +182,11 @@ static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index,
goto done;
mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
+ IWL_DEBUG_ASSOC(priv, "spatial multiplexing power save mode: %s\n",
+ (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
+ "static" :
+ (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
+ "dynamic" : "disabled");
sta_flags = priv->stations[index].sta.station_flags;
@@ -1012,7 +1017,7 @@ int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap)
*/
if (priv->current_ht_config.is_ht) {
rcu_read_lock();
- sta = ieee80211_find_sta(priv->hw, addr);
+ sta = ieee80211_find_sta(priv->vif, addr);
if (sta) {
memcpy(&ht_config, &sta->ht_cap, sizeof(ht_config));
cur_ht_config = &ht_config;
@@ -1030,6 +1035,68 @@ int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap)
EXPORT_SYMBOL(iwl_rxon_add_station);
/**
+ * iwl_sta_init_bcast_lq - Initialize a bcast station's hardware rate table
+ *
+ * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
+ * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
+ * which requires station table entry to exist).
+ */
+static void iwl_sta_init_bcast_lq(struct iwl_priv *priv)
+{
+ int i, r;
+ struct iwl_link_quality_cmd link_cmd = {
+ .reserved1 = 0,
+ };
+ u32 rate_flags;
+
+ /* Set up the rate scaling to start at selected rate, fall back
+ * all the way down to 1M in IEEE order, and then spin on 1M */
+ if (priv->band == IEEE80211_BAND_5GHZ)
+ r = IWL_RATE_6M_INDEX;
+ else
+ r = IWL_RATE_1M_INDEX;
+
+ for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
+ rate_flags = 0;
+ if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
+ rate_flags |= RATE_MCS_CCK_MSK;
+
+ rate_flags |= first_antenna(priv->hw_params.valid_tx_ant) <<
+ RATE_MCS_ANT_POS;
+
+ link_cmd.rs_table[i].rate_n_flags =
+ iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags);
+ r = iwl_get_prev_ieee_rate(r);
+ }
+
+ link_cmd.general_params.single_stream_ant_msk =
+ first_antenna(priv->hw_params.valid_tx_ant);
+ link_cmd.general_params.dual_stream_ant_msk = 3;
+ link_cmd.agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
+ link_cmd.agg_params.agg_time_limit =
+ cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
+
+ /* Update the rate scaling for control frame Tx to AP */
+ link_cmd.sta_id = priv->hw_params.bcast_sta_id;
+
+ iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD,
+ sizeof(link_cmd), &link_cmd, NULL);
+}
+
+
+/**
+ * iwl_add_bcast_station - add broadcast station into station table.
+ */
+void iwl_add_bcast_station(struct iwl_priv *priv)
+{
+ iwl_add_station(priv, iwl_bcast_addr, false, CMD_SYNC, NULL);
+
+ /* Set up default rate scaling table in device's station table */
+ iwl_sta_init_bcast_lq(priv);
+}
+EXPORT_SYMBOL(iwl_add_bcast_station);
+
+/**
* iwl_get_sta_id - Find station's index within station table
*
* If new IBSS station, create new entry in station table
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h
index 6deebade636..1c382de80d4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.h
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.h
@@ -52,6 +52,7 @@ void iwl_update_tkip_key(struct iwl_priv *priv,
const u8 *addr, u32 iv32, u16 *phase1key);
int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap);
+void iwl_add_bcast_station(struct iwl_priv *priv);
int iwl_remove_station(struct iwl_priv *priv, const u8 *addr, bool is_ap);
void iwl_clear_stations_table(struct iwl_priv *priv);
int iwl_get_free_ucode_key_index(struct iwl_priv *priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index 8ae4c9b614e..05e75109d84 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -979,7 +979,8 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
!(cmd->flags & CMD_SIZE_HUGE));
if (iwl_is_rfkill(priv) || iwl_is_ctkill(priv)) {
- IWL_DEBUG_INFO(priv, "Not sending command - RF/CT KILL\n");
+ IWL_WARN(priv, "Not sending command - %s KILL\n",
+ iwl_is_rfkill(priv) ? "RF" : "CT");
return -EIO;
}
@@ -1121,11 +1122,6 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
return;
}
- pci_unmap_single(priv->pci_dev,
- pci_unmap_addr(&txq->meta[cmd_idx], mapping),
- pci_unmap_len(&txq->meta[cmd_idx], len),
- PCI_DMA_BIDIRECTIONAL);
-
for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
@@ -1173,6 +1169,11 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
meta = &priv->txq[IWL_CMD_QUEUE_NUM].meta[cmd_index];
+ pci_unmap_single(priv->pci_dev,
+ pci_unmap_addr(meta, mapping),
+ pci_unmap_len(meta, len),
+ PCI_DMA_BIDIRECTIONAL);
+
/* Input error checking is done when commands are added to queue. */
if (meta->flags & CMD_WANT_SKB) {
meta->source->reply_page = (unsigned long)rxb_addr(rxb);
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index bfd7f497157..23b31e6dcac 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -2160,6 +2160,14 @@ static int iwl3945_read_ucode(struct iwl_priv *priv)
IWL_UCODE_API(priv->ucode_ver),
IWL_UCODE_SERIAL(priv->ucode_ver));
+ snprintf(priv->hw->wiphy->fw_version,
+ sizeof(priv->hw->wiphy->fw_version),
+ "%u.%u.%u.%u",
+ IWL_UCODE_MAJOR(priv->ucode_ver),
+ IWL_UCODE_MINOR(priv->ucode_ver),
+ IWL_UCODE_API(priv->ucode_ver),
+ IWL_UCODE_SERIAL(priv->ucode_ver));
+
IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
priv->ucode_ver);
IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
@@ -3992,13 +4000,6 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
*/
spin_lock_init(&priv->reg_lock);
- /* amp init */
- err = priv->cfg->ops->lib->apm_ops.init(priv);
- if (err < 0) {
- IWL_DEBUG_INFO(priv, "Failed to init the card\n");
- goto out_iounmap;
- }
-
/***********************
* 4. Read EEPROM
* ********************/
diff --git a/drivers/net/wireless/iwmc3200wifi/Kconfig b/drivers/net/wireless/iwmc3200wifi/Kconfig
index 9606b3100fd..b9d34a76696 100644
--- a/drivers/net/wireless/iwmc3200wifi/Kconfig
+++ b/drivers/net/wireless/iwmc3200wifi/Kconfig
@@ -1,6 +1,6 @@
config IWM
tristate "Intel Wireless Multicomm 3200 WiFi driver"
- depends on MMC && WLAN_80211 && EXPERIMENTAL
+ depends on MMC && EXPERIMENTAL
depends on CFG80211
select FW_LOADER
select IWMC3200TOP
diff --git a/drivers/net/wireless/libertas/Kconfig b/drivers/net/wireless/libertas/Kconfig
index 8f8d75b61ea..30aa9d48d67 100644
--- a/drivers/net/wireless/libertas/Kconfig
+++ b/drivers/net/wireless/libertas/Kconfig
@@ -1,6 +1,6 @@
config LIBERTAS
tristate "Marvell 8xxx Libertas WLAN driver support"
- depends on WLAN_80211 && CFG80211
+ depends on CFG80211
select WIRELESS_EXT
select WEXT_SPY
select LIB80211
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c
index 30d9d0ea28e..d6a48dd3652 100644
--- a/drivers/net/wireless/libertas/if_spi.c
+++ b/drivers/net/wireless/libertas/if_spi.c
@@ -32,12 +32,6 @@
#include "dev.h"
#include "if_spi.h"
-struct if_spi_packet {
- struct list_head list;
- u16 blen;
- u8 buffer[0] __attribute__((aligned(4)));
-};
-
struct if_spi_card {
struct spi_device *spi;
struct lbs_private *priv;
@@ -66,33 +60,10 @@ struct if_spi_card {
struct semaphore spi_thread_terminated;
u8 cmd_buffer[IF_SPI_CMD_BUF_SIZE];
-
- /* A buffer of incoming packets from libertas core.
- * Since we can't sleep in hw_host_to_card, we have to buffer
- * them. */
- struct list_head cmd_packet_list;
- struct list_head data_packet_list;
-
- /* Protects cmd_packet_list and data_packet_list */
- spinlock_t buffer_lock;
};
static void free_if_spi_card(struct if_spi_card *card)
{
- struct list_head *cursor, *next;
- struct if_spi_packet *packet;
-
- BUG_ON(card->run_thread);
- list_for_each_safe(cursor, next, &card->cmd_packet_list) {
- packet = container_of(cursor, struct if_spi_packet, list);
- list_del(&packet->list);
- kfree(packet);
- }
- list_for_each_safe(cursor, next, &card->data_packet_list) {
- packet = container_of(cursor, struct if_spi_packet, list);
- list_del(&packet->list);
- kfree(packet);
- }
spi_set_drvdata(card->spi, NULL);
kfree(card);
}
@@ -774,40 +745,6 @@ out:
return err;
}
-/* Move data or a command from the host to the card. */
-static void if_spi_h2c(struct if_spi_card *card,
- struct if_spi_packet *packet, int type)
-{
- int err = 0;
- u16 int_type, port_reg;
-
- switch (type) {
- case MVMS_DAT:
- int_type = IF_SPI_CIC_TX_DOWNLOAD_OVER;
- port_reg = IF_SPI_DATA_RDWRPORT_REG;
- break;
- case MVMS_CMD:
- int_type = IF_SPI_CIC_CMD_DOWNLOAD_OVER;
- port_reg = IF_SPI_CMD_RDWRPORT_REG;
- break;
- default:
- lbs_pr_err("can't transfer buffer of type %d\n", type);
- err = -EINVAL;
- goto out;
- }
-
- /* Write the data to the card */
- err = spu_write(card, port_reg, packet->buffer, packet->blen);
- if (err)
- goto out;
-
-out:
- kfree(packet);
-
- if (err)
- lbs_pr_err("%s: error %d\n", __func__, err);
-}
-
/* Inform the host about a card event */
static void if_spi_e2h(struct if_spi_card *card)
{
@@ -837,8 +774,6 @@ static int lbs_spi_thread(void *data)
int err;
struct if_spi_card *card = data;
u16 hiStatus;
- unsigned long flags;
- struct if_spi_packet *packet;
while (1) {
/* Wait to be woken up by one of two things. First, our ISR
@@ -877,43 +812,9 @@ static int lbs_spi_thread(void *data)
if (hiStatus & IF_SPI_HIST_CMD_DOWNLOAD_RDY ||
(card->priv->psstate != PS_STATE_FULL_POWER &&
(hiStatus & IF_SPI_HIST_TX_DOWNLOAD_RDY))) {
- /* This means two things. First of all,
- * if there was a previous command sent, the card has
- * successfully received it.
- * Secondly, it is now ready to download another
- * command.
- */
lbs_host_to_card_done(card->priv);
-
- /* Do we have any command packets from the host to
- * send? */
- packet = NULL;
- spin_lock_irqsave(&card->buffer_lock, flags);
- if (!list_empty(&card->cmd_packet_list)) {
- packet = (struct if_spi_packet *)(card->
- cmd_packet_list.next);
- list_del(&packet->list);
- }
- spin_unlock_irqrestore(&card->buffer_lock, flags);
-
- if (packet)
- if_spi_h2c(card, packet, MVMS_CMD);
}
- if (hiStatus & IF_SPI_HIST_TX_DOWNLOAD_RDY) {
- /* Do we have any data packets from the host to
- * send? */
- packet = NULL;
- spin_lock_irqsave(&card->buffer_lock, flags);
- if (!list_empty(&card->data_packet_list)) {
- packet = (struct if_spi_packet *)(card->
- data_packet_list.next);
- list_del(&packet->list);
- }
- spin_unlock_irqrestore(&card->buffer_lock, flags);
- if (packet)
- if_spi_h2c(card, packet, MVMS_DAT);
- }
if (hiStatus & IF_SPI_HIST_CARD_EVENT)
if_spi_e2h(card);
@@ -942,40 +843,18 @@ static int if_spi_host_to_card(struct lbs_private *priv,
u8 type, u8 *buf, u16 nb)
{
int err = 0;
- unsigned long flags;
struct if_spi_card *card = priv->card;
- struct if_spi_packet *packet;
- u16 blen;
lbs_deb_enter_args(LBS_DEB_SPI, "type %d, bytes %d", type, nb);
- if (nb == 0) {
- lbs_pr_err("%s: invalid size requested: %d\n", __func__, nb);
- err = -EINVAL;
- goto out;
- }
- blen = ALIGN(nb, 4);
- packet = kzalloc(sizeof(struct if_spi_packet) + blen, GFP_ATOMIC);
- if (!packet) {
- err = -ENOMEM;
- goto out;
- }
- packet->blen = blen;
- memcpy(packet->buffer, buf, nb);
- memset(packet->buffer + nb, 0, blen - nb);
+ nb = ALIGN(nb, 4);
switch (type) {
case MVMS_CMD:
- priv->dnld_sent = DNLD_CMD_SENT;
- spin_lock_irqsave(&card->buffer_lock, flags);
- list_add_tail(&packet->list, &card->cmd_packet_list);
- spin_unlock_irqrestore(&card->buffer_lock, flags);
+ err = spu_write(card, IF_SPI_CMD_RDWRPORT_REG, buf, nb);
break;
case MVMS_DAT:
- priv->dnld_sent = DNLD_DATA_SENT;
- spin_lock_irqsave(&card->buffer_lock, flags);
- list_add_tail(&packet->list, &card->data_packet_list);
- spin_unlock_irqrestore(&card->buffer_lock, flags);
+ err = spu_write(card, IF_SPI_DATA_RDWRPORT_REG, buf, nb);
break;
default:
lbs_pr_err("can't transfer buffer of type %d", type);
@@ -983,9 +862,6 @@ static int if_spi_host_to_card(struct lbs_private *priv,
break;
}
- /* Wake up the spi thread */
- up(&card->spi_ready);
-out:
lbs_deb_leave_args(LBS_DEB_SPI, "err=%d", err);
return err;
}
@@ -1062,9 +938,6 @@ static int __devinit if_spi_probe(struct spi_device *spi)
sema_init(&card->spi_ready, 0);
sema_init(&card->spi_thread_terminated, 0);
- INIT_LIST_HEAD(&card->cmd_packet_list);
- INIT_LIST_HEAD(&card->data_packet_list);
- spin_lock_init(&card->buffer_lock);
/* Initialize the SPI Interface Unit */
err = spu_init(card, pdata->use_dummy_writes);
@@ -1141,6 +1014,9 @@ static int __devinit if_spi_probe(struct spi_device *spi)
goto terminate_thread;
}
+ /* poke the IRQ handler so that we don't miss the first interrupt */
+ up(&card->spi_ready);
+
/* Start the card.
* This will call register_netdev, and we'll start
* getting interrupts... */
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index 38cfd79e059..fc4ec48eda1 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -284,7 +284,7 @@ struct mac80211_hwsim_data {
struct ieee80211_channel *channel;
unsigned long beacon_int; /* in jiffies unit */
unsigned int rx_filter;
- int started;
+ bool started, idle;
struct timer_list beacon_timer;
enum ps_mode {
PS_DISABLED, PS_ENABLED, PS_AUTO_POLL, PS_MANUAL_POLL
@@ -365,6 +365,49 @@ static void mac80211_hwsim_monitor_rx(struct ieee80211_hw *hw,
}
+static void mac80211_hwsim_monitor_ack(struct ieee80211_hw *hw, const u8 *addr)
+{
+ struct mac80211_hwsim_data *data = hw->priv;
+ struct sk_buff *skb;
+ struct hwsim_radiotap_hdr *hdr;
+ u16 flags;
+ struct ieee80211_hdr *hdr11;
+
+ if (!netif_running(hwsim_mon))
+ return;
+
+ skb = dev_alloc_skb(100);
+ if (skb == NULL)
+ return;
+
+ hdr = (struct hwsim_radiotap_hdr *) skb_put(skb, sizeof(*hdr));
+ hdr->hdr.it_version = PKTHDR_RADIOTAP_VERSION;
+ hdr->hdr.it_pad = 0;
+ hdr->hdr.it_len = cpu_to_le16(sizeof(*hdr));
+ hdr->hdr.it_present = cpu_to_le32((1 << IEEE80211_RADIOTAP_FLAGS) |
+ (1 << IEEE80211_RADIOTAP_CHANNEL));
+ hdr->rt_flags = 0;
+ hdr->rt_rate = 0;
+ hdr->rt_channel = cpu_to_le16(data->channel->center_freq);
+ flags = IEEE80211_CHAN_2GHZ;
+ hdr->rt_chbitmask = cpu_to_le16(flags);
+
+ hdr11 = (struct ieee80211_hdr *) skb_put(skb, 10);
+ hdr11->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
+ IEEE80211_STYPE_ACK);
+ hdr11->duration_id = cpu_to_le16(0);
+ memcpy(hdr11->addr1, addr, ETH_ALEN);
+
+ skb->dev = hwsim_mon;
+ skb_set_mac_header(skb, 0);
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ skb->pkt_type = PACKET_OTHERHOST;
+ skb->protocol = htons(ETH_P_802_2);
+ memset(skb->cb, 0, sizeof(skb->cb));
+ netif_rx(skb);
+}
+
+
static bool hwsim_ps_rx_ok(struct mac80211_hwsim_data *data,
struct sk_buff *skb)
{
@@ -402,6 +445,12 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_rx_status rx_status;
+ if (data->idle) {
+ printk(KERN_DEBUG "%s: Trying to TX when idle - reject\n",
+ wiphy_name(hw->wiphy));
+ return false;
+ }
+
memset(&rx_status, 0, sizeof(rx_status));
/* TODO: set mactime */
rx_status.freq = data->channel->center_freq;
@@ -428,7 +477,8 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
if (data == data2)
continue;
- if (!data2->started || !hwsim_ps_rx_ok(data2, skb) ||
+ if (data2->idle || !data2->started ||
+ !hwsim_ps_rx_ok(data2, skb) ||
!data->channel || !data2->channel ||
data->channel->center_freq != data2->channel->center_freq ||
!(data->group & data2->group))
@@ -464,6 +514,10 @@ static int mac80211_hwsim_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
}
ack = mac80211_hwsim_tx_frame(hw, skb);
+ if (ack && skb->len >= 16) {
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+ mac80211_hwsim_monitor_ack(hw, hdr->addr2);
+ }
txi = IEEE80211_SKB_CB(skb);
@@ -571,6 +625,8 @@ static int mac80211_hwsim_config(struct ieee80211_hw *hw, u32 changed)
!!(conf->flags & IEEE80211_CONF_IDLE),
!!(conf->flags & IEEE80211_CONF_PS));
+ data->idle = !!(conf->flags & IEEE80211_CONF_IDLE);
+
data->channel = conf->channel;
if (!data->started || !data->beacon_int)
del_timer(&data->beacon_timer);
@@ -1045,19 +1101,20 @@ static int __init init_mac80211_hwsim(void)
sband->channels = data->channels_2ghz;
sband->n_channels =
ARRAY_SIZE(hwsim_channels_2ghz);
+ sband->bitrates = data->rates;
+ sband->n_bitrates = ARRAY_SIZE(hwsim_rates);
break;
case IEEE80211_BAND_5GHZ:
sband->channels = data->channels_5ghz;
sband->n_channels =
ARRAY_SIZE(hwsim_channels_5ghz);
+ sband->bitrates = data->rates + 4;
+ sband->n_bitrates = ARRAY_SIZE(hwsim_rates) - 4;
break;
default:
break;
}
- sband->bitrates = data->rates;
- sband->n_bitrates = ARRAY_SIZE(hwsim_rates);
-
sband->ht_cap.ht_supported = true;
sband->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
IEEE80211_HT_CAP_GRN_FLD |
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index 746532ebe5a..2ebfee4da3f 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
+#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/pci.h>
@@ -27,18 +28,6 @@
#define MWL8K_NAME KBUILD_MODNAME
#define MWL8K_VERSION "0.10"
-MODULE_DESCRIPTION(MWL8K_DESC);
-MODULE_VERSION(MWL8K_VERSION);
-MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
-MODULE_LICENSE("GPL");
-
-static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
- { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
- { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
- { }
-};
-MODULE_DEVICE_TABLE(pci, mwl8k_table);
-
/* Register definitions */
#define MWL8K_HIU_GEN_PTR 0x00000c10
#define MWL8K_MODE_STA 0x0000005a
@@ -88,72 +77,89 @@ MODULE_DEVICE_TABLE(pci, mwl8k_table);
MWL8K_A2H_INT_RX_READY | \
MWL8K_A2H_INT_TX_DONE)
-/* WME stream classes */
-#define WME_AC_BE 0 /* best effort */
-#define WME_AC_BK 1 /* background */
-#define WME_AC_VI 2 /* video */
-#define WME_AC_VO 3 /* voice */
-
#define MWL8K_RX_QUEUES 1
#define MWL8K_TX_QUEUES 4
+struct rxd_ops {
+ int rxd_size;
+ void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
+ void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
+ int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status);
+};
+
+struct mwl8k_device_info {
+ char *part_name;
+ char *helper_image;
+ char *fw_image;
+ struct rxd_ops *rxd_ops;
+ u16 modes;
+};
+
struct mwl8k_rx_queue {
- int rx_desc_count;
+ int rxd_count;
/* hw receives here */
- int rx_head;
+ int head;
/* refill descs here */
- int rx_tail;
+ int tail;
- struct mwl8k_rx_desc *rx_desc_area;
- dma_addr_t rx_desc_dma;
- struct sk_buff **rx_skb;
+ void *rxd;
+ dma_addr_t rxd_dma;
+ struct {
+ struct sk_buff *skb;
+ DECLARE_PCI_UNMAP_ADDR(dma)
+ } *buf;
};
struct mwl8k_tx_queue {
/* hw transmits here */
- int tx_head;
+ int head;
/* sw appends here */
- int tx_tail;
+ int tail;
- struct ieee80211_tx_queue_stats tx_stats;
- struct mwl8k_tx_desc *tx_desc_area;
- dma_addr_t tx_desc_dma;
- struct sk_buff **tx_skb;
+ struct ieee80211_tx_queue_stats stats;
+ struct mwl8k_tx_desc *txd;
+ dma_addr_t txd_dma;
+ struct sk_buff **skb;
};
/* Pointers to the firmware data and meta information about it. */
struct mwl8k_firmware {
- /* Microcode */
- struct firmware *ucode;
-
/* Boot helper code */
struct firmware *helper;
+
+ /* Microcode */
+ struct firmware *ucode;
};
struct mwl8k_priv {
+ void __iomem *sram;
void __iomem *regs;
struct ieee80211_hw *hw;
struct pci_dev *pdev;
- u8 name[16];
+
+ struct mwl8k_device_info *device_info;
+ bool ap_fw;
+ struct rxd_ops *rxd_ops;
/* firmware files and meta data */
struct mwl8k_firmware fw;
- u32 part_num;
/* firmware access */
struct mutex fw_mutex;
struct task_struct *fw_mutex_owner;
int fw_mutex_depth;
- struct completion *tx_wait;
struct completion *hostcmd_wait;
/* lock held over TX and TX reap */
spinlock_t tx_lock;
+ /* TX quiesce completion, protected by fw_mutex and tx_lock */
+ struct completion *tx_wait;
+
struct ieee80211_vif *vif;
struct ieee80211_channel *current_channel;
@@ -178,10 +184,11 @@ struct mwl8k_priv {
/* PHY parameters */
struct ieee80211_supported_band band;
struct ieee80211_channel channels[14];
- struct ieee80211_rate rates[12];
+ struct ieee80211_rate rates[13];
bool radio_on;
bool radio_short_preamble;
+ bool sniffer_enabled;
bool wmm_enabled;
/* XXX need to convert this to handle multiple interfaces */
@@ -199,9 +206,6 @@ struct mwl8k_priv {
/* Tasklet to reclaim TX descriptors and buffers after tx */
struct tasklet_struct tx_reclaim_task;
-
- /* Work thread to serialize configuration requests */
- struct workqueue_struct *config_wq;
};
/* Per interface specific private data */
@@ -220,7 +224,7 @@ struct mwl8k_vif {
* Subset of supported legacy rates.
* Intersection of AP and STA supported rates.
*/
- struct ieee80211_rate legacy_rates[12];
+ struct ieee80211_rate legacy_rates[13];
/* number of supported legacy rates */
u8 legacy_nrates;
@@ -252,9 +256,10 @@ static const struct ieee80211_rate mwl8k_rates[] = {
{ .bitrate = 10, .hw_value = 2, },
{ .bitrate = 20, .hw_value = 4, },
{ .bitrate = 55, .hw_value = 11, },
+ { .bitrate = 110, .hw_value = 22, },
+ { .bitrate = 220, .hw_value = 44, },
{ .bitrate = 60, .hw_value = 12, },
{ .bitrate = 90, .hw_value = 18, },
- { .bitrate = 110, .hw_value = 22, },
{ .bitrate = 120, .hw_value = 24, },
{ .bitrate = 180, .hw_value = 36, },
{ .bitrate = 240, .hw_value = 48, },
@@ -270,10 +275,12 @@ static const struct ieee80211_rate mwl8k_rates[] = {
/* Firmware command codes */
#define MWL8K_CMD_CODE_DNLD 0x0001
#define MWL8K_CMD_GET_HW_SPEC 0x0003
+#define MWL8K_CMD_SET_HW_SPEC 0x0004
#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
#define MWL8K_CMD_GET_STAT 0x0014
#define MWL8K_CMD_RADIO_CONTROL 0x001c
#define MWL8K_CMD_RF_TX_POWER 0x001e
+#define MWL8K_CMD_RF_ANTENNA 0x0020
#define MWL8K_CMD_SET_PRE_SCAN 0x0107
#define MWL8K_CMD_SET_POST_SCAN 0x0108
#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
@@ -287,6 +294,7 @@ static const struct ieee80211_rate mwl8k_rates[] = {
#define MWL8K_CMD_MIMO_CONFIG 0x0125
#define MWL8K_CMD_USE_FIXED_RATE 0x0126
#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
+#define MWL8K_CMD_SET_MAC_ADDR 0x0202
#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
#define MWL8K_CMD_UPDATE_STADB 0x1123
@@ -299,10 +307,12 @@ static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
switch (cmd & ~0x8000) {
MWL8K_CMDNAME(CODE_DNLD);
MWL8K_CMDNAME(GET_HW_SPEC);
+ MWL8K_CMDNAME(SET_HW_SPEC);
MWL8K_CMDNAME(MAC_MULTICAST_ADR);
MWL8K_CMDNAME(GET_STAT);
MWL8K_CMDNAME(RADIO_CONTROL);
MWL8K_CMDNAME(RF_TX_POWER);
+ MWL8K_CMDNAME(RF_ANTENNA);
MWL8K_CMDNAME(SET_PRE_SCAN);
MWL8K_CMDNAME(SET_POST_SCAN);
MWL8K_CMDNAME(SET_RF_CHANNEL);
@@ -316,6 +326,7 @@ static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
MWL8K_CMDNAME(MIMO_CONFIG);
MWL8K_CMDNAME(USE_FIXED_RATE);
MWL8K_CMDNAME(ENABLE_SNIFFER);
+ MWL8K_CMDNAME(SET_MAC_ADDR);
MWL8K_CMDNAME(SET_RATEADAPT_MODE);
MWL8K_CMDNAME(UPDATE_STADB);
default:
@@ -353,41 +364,35 @@ static void mwl8k_release_firmware(struct mwl8k_priv *priv)
/* Request fw image */
static int mwl8k_request_fw(struct mwl8k_priv *priv,
- const char *fname, struct firmware **fw)
+ const char *fname, struct firmware **fw)
{
/* release current image */
if (*fw != NULL)
mwl8k_release_fw(fw);
return request_firmware((const struct firmware **)fw,
- fname, &priv->pdev->dev);
+ fname, &priv->pdev->dev);
}
-static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
+static int mwl8k_request_firmware(struct mwl8k_priv *priv)
{
- u8 filename[64];
+ struct mwl8k_device_info *di = priv->device_info;
int rc;
- priv->part_num = part_num;
-
- snprintf(filename, sizeof(filename),
- "mwl8k/helper_%u.fw", priv->part_num);
-
- rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
- if (rc) {
- printk(KERN_ERR
- "%s Error requesting helper firmware file %s\n",
- pci_name(priv->pdev), filename);
- return rc;
+ if (di->helper_image != NULL) {
+ rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw.helper);
+ if (rc) {
+ printk(KERN_ERR "%s: Error requesting helper "
+ "firmware file %s\n", pci_name(priv->pdev),
+ di->helper_image);
+ return rc;
+ }
}
- snprintf(filename, sizeof(filename),
- "mwl8k/fmimage_%u.fw", priv->part_num);
-
- rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
+ rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw.ucode);
if (rc) {
- printk(KERN_ERR "%s Error requesting firmware file %s\n",
- pci_name(priv->pdev), filename);
+ printk(KERN_ERR "%s: Error requesting firmware file %s\n",
+ pci_name(priv->pdev), di->fw_image);
mwl8k_release_fw(&priv->fw.helper);
return rc;
}
@@ -434,6 +439,7 @@ mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
break;
}
+ cond_resched();
udelay(1);
} while (--loops);
@@ -542,43 +548,62 @@ static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
return rc;
}
-static int mwl8k_load_firmware(struct mwl8k_priv *priv)
+static int mwl8k_load_firmware(struct ieee80211_hw *hw)
{
- int loops, rc;
+ struct mwl8k_priv *priv = hw->priv;
+ struct firmware *fw = priv->fw.ucode;
+ struct mwl8k_device_info *di = priv->device_info;
+ int rc;
+ int loops;
+
+ if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
+ struct firmware *helper = priv->fw.helper;
- const u8 *ucode = priv->fw.ucode->data;
- size_t ucode_len = priv->fw.ucode->size;
- const u8 *helper = priv->fw.helper->data;
- size_t helper_len = priv->fw.helper->size;
+ if (helper == NULL) {
+ printk(KERN_ERR "%s: helper image needed but none "
+ "given\n", pci_name(priv->pdev));
+ return -EINVAL;
+ }
- if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
- rc = mwl8k_load_fw_image(priv, helper, helper_len);
+ rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
if (rc) {
printk(KERN_ERR "%s: unable to load firmware "
- "helper image\n", pci_name(priv->pdev));
+ "helper image\n", pci_name(priv->pdev));
return rc;
}
msleep(1);
- rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
+ rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
} else {
- rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
+ rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
}
if (rc) {
- printk(KERN_ERR "%s: unable to load firmware data\n",
- pci_name(priv->pdev));
+ printk(KERN_ERR "%s: unable to load firmware image\n",
+ pci_name(priv->pdev));
return rc;
}
- iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
+ if (di->modes & BIT(NL80211_IFTYPE_AP))
+ iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR);
+ else
+ iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
msleep(1);
loops = 200000;
do {
- if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
- == MWL8K_FWSTA_READY)
+ u32 ready_code;
+
+ ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
+ if (ready_code == MWL8K_FWAP_READY) {
+ priv->ap_fw = 1;
break;
+ } else if (ready_code == MWL8K_FWSTA_READY) {
+ priv->ap_fw = 0;
+ break;
+ }
+
+ cond_resched();
udelay(1);
} while (--loops);
@@ -605,7 +630,7 @@ struct ewc_ht_info {
/* Peer Entry flags - used to define the type of the peer node */
#define MWL8K_PEER_TYPE_ACCESSPOINT 2
-#define MWL8K_IEEE_LEGACY_DATA_RATES 12
+#define MWL8K_IEEE_LEGACY_DATA_RATES 13
#define MWL8K_MCS_BITMAP_SIZE 16
struct peer_capability_info {
@@ -731,16 +756,96 @@ static inline void mwl8k_add_dma_header(struct sk_buff *skb)
/*
- * Packet reception.
+ * Packet reception for 88w8366.
*/
-#define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
+struct mwl8k_rxd_8366 {
+ __le16 pkt_len;
+ __u8 sq2;
+ __u8 rate;
+ __le32 pkt_phys_addr;
+ __le32 next_rxd_phys_addr;
+ __le16 qos_control;
+ __le16 htsig2;
+ __le32 hw_rssi_info;
+ __le32 hw_noise_floor_info;
+ __u8 noise_floor;
+ __u8 pad0[3];
+ __u8 rssi;
+ __u8 rx_status;
+ __u8 channel;
+ __u8 rx_ctrl;
+} __attribute__((packed));
-struct mwl8k_rx_desc {
+#define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
+
+static void mwl8k_rxd_8366_init(void *_rxd, dma_addr_t next_dma_addr)
+{
+ struct mwl8k_rxd_8366 *rxd = _rxd;
+
+ rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
+ rxd->rx_ctrl = MWL8K_8366_RX_CTRL_OWNED_BY_HOST;
+}
+
+static void mwl8k_rxd_8366_refill(void *_rxd, dma_addr_t addr, int len)
+{
+ struct mwl8k_rxd_8366 *rxd = _rxd;
+
+ rxd->pkt_len = cpu_to_le16(len);
+ rxd->pkt_phys_addr = cpu_to_le32(addr);
+ wmb();
+ rxd->rx_ctrl = 0;
+}
+
+static int
+mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status)
+{
+ struct mwl8k_rxd_8366 *rxd = _rxd;
+
+ if (!(rxd->rx_ctrl & MWL8K_8366_RX_CTRL_OWNED_BY_HOST))
+ return -1;
+ rmb();
+
+ memset(status, 0, sizeof(*status));
+
+ status->signal = -rxd->rssi;
+ status->noise = -rxd->noise_floor;
+
+ if (rxd->rate & 0x80) {
+ status->flag |= RX_FLAG_HT;
+ status->rate_idx = rxd->rate & 0x7f;
+ } else {
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
+ if (mwl8k_rates[i].hw_value == rxd->rate) {
+ status->rate_idx = i;
+ break;
+ }
+ }
+ }
+
+ status->band = IEEE80211_BAND_2GHZ;
+ status->freq = ieee80211_channel_to_frequency(rxd->channel);
+
+ return le16_to_cpu(rxd->pkt_len);
+}
+
+static struct rxd_ops rxd_8366_ops = {
+ .rxd_size = sizeof(struct mwl8k_rxd_8366),
+ .rxd_init = mwl8k_rxd_8366_init,
+ .rxd_refill = mwl8k_rxd_8366_refill,
+ .rxd_process = mwl8k_rxd_8366_process,
+};
+
+/*
+ * Packet reception for 88w8687.
+ */
+struct mwl8k_rxd_8687 {
__le16 pkt_len;
__u8 link_quality;
__u8 noise_level;
__le32 pkt_phys_addr;
- __le32 next_rx_desc_phys_addr;
+ __le32 next_rxd_phys_addr;
__le16 qos_control;
__le16 rate_info;
__le32 pad0[4];
@@ -752,6 +857,76 @@ struct mwl8k_rx_desc {
__u8 pad2[2];
} __attribute__((packed));
+#define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
+#define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
+#define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
+#define MWL8K_8687_RATE_INFO_40MHZ 0x0004
+#define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
+#define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
+
+#define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
+
+static void mwl8k_rxd_8687_init(void *_rxd, dma_addr_t next_dma_addr)
+{
+ struct mwl8k_rxd_8687 *rxd = _rxd;
+
+ rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
+ rxd->rx_ctrl = MWL8K_8687_RX_CTRL_OWNED_BY_HOST;
+}
+
+static void mwl8k_rxd_8687_refill(void *_rxd, dma_addr_t addr, int len)
+{
+ struct mwl8k_rxd_8687 *rxd = _rxd;
+
+ rxd->pkt_len = cpu_to_le16(len);
+ rxd->pkt_phys_addr = cpu_to_le32(addr);
+ wmb();
+ rxd->rx_ctrl = 0;
+}
+
+static int
+mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status)
+{
+ struct mwl8k_rxd_8687 *rxd = _rxd;
+ u16 rate_info;
+
+ if (!(rxd->rx_ctrl & MWL8K_8687_RX_CTRL_OWNED_BY_HOST))
+ return -1;
+ rmb();
+
+ rate_info = le16_to_cpu(rxd->rate_info);
+
+ memset(status, 0, sizeof(*status));
+
+ status->signal = -rxd->rssi;
+ status->noise = -rxd->noise_level;
+ status->qual = rxd->link_quality;
+ status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info);
+ status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info);
+
+ if (rate_info & MWL8K_8687_RATE_INFO_SHORTPRE)
+ status->flag |= RX_FLAG_SHORTPRE;
+ if (rate_info & MWL8K_8687_RATE_INFO_40MHZ)
+ status->flag |= RX_FLAG_40MHZ;
+ if (rate_info & MWL8K_8687_RATE_INFO_SHORTGI)
+ status->flag |= RX_FLAG_SHORT_GI;
+ if (rate_info & MWL8K_8687_RATE_INFO_MCS_FORMAT)
+ status->flag |= RX_FLAG_HT;
+
+ status->band = IEEE80211_BAND_2GHZ;
+ status->freq = ieee80211_channel_to_frequency(rxd->channel);
+
+ return le16_to_cpu(rxd->pkt_len);
+}
+
+static struct rxd_ops rxd_8687_ops = {
+ .rxd_size = sizeof(struct mwl8k_rxd_8687),
+ .rxd_init = mwl8k_rxd_8687_init,
+ .rxd_refill = mwl8k_rxd_8687_refill,
+ .rxd_process = mwl8k_rxd_8687_process,
+};
+
+
#define MWL8K_RX_DESCS 256
#define MWL8K_RX_MAXSZ 3800
@@ -762,43 +937,44 @@ static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
int size;
int i;
- rxq->rx_desc_count = 0;
- rxq->rx_head = 0;
- rxq->rx_tail = 0;
+ rxq->rxd_count = 0;
+ rxq->head = 0;
+ rxq->tail = 0;
- size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
+ size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
- rxq->rx_desc_area =
- pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
- if (rxq->rx_desc_area == NULL) {
+ rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
+ if (rxq->rxd == NULL) {
printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
- priv->name);
+ wiphy_name(hw->wiphy));
return -ENOMEM;
}
- memset(rxq->rx_desc_area, 0, size);
+ memset(rxq->rxd, 0, size);
- rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
- sizeof(*rxq->rx_skb), GFP_KERNEL);
- if (rxq->rx_skb == NULL) {
+ rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
+ if (rxq->buf == NULL) {
printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
- priv->name);
- pci_free_consistent(priv->pdev, size,
- rxq->rx_desc_area, rxq->rx_desc_dma);
+ wiphy_name(hw->wiphy));
+ pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
return -ENOMEM;
}
- memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
+ memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
for (i = 0; i < MWL8K_RX_DESCS; i++) {
- struct mwl8k_rx_desc *rx_desc;
+ int desc_size;
+ void *rxd;
int nexti;
+ dma_addr_t next_dma_addr;
- rx_desc = rxq->rx_desc_area + i;
- nexti = (i + 1) % MWL8K_RX_DESCS;
+ desc_size = priv->rxd_ops->rxd_size;
+ rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
- rx_desc->next_rx_desc_phys_addr =
- cpu_to_le32(rxq->rx_desc_dma
- + nexti * sizeof(*rx_desc));
- rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
+ nexti = i + 1;
+ if (nexti == MWL8K_RX_DESCS)
+ nexti = 0;
+ next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
+
+ priv->rxd_ops->rxd_init(rxd, next_dma_addr);
}
return 0;
@@ -811,27 +987,28 @@ static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
int refilled;
refilled = 0;
- while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
+ while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
struct sk_buff *skb;
+ dma_addr_t addr;
int rx;
+ void *rxd;
skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
if (skb == NULL)
break;
- rxq->rx_desc_count++;
-
- rx = rxq->rx_tail;
- rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
+ addr = pci_map_single(priv->pdev, skb->data,
+ MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
- rxq->rx_desc_area[rx].pkt_phys_addr =
- cpu_to_le32(pci_map_single(priv->pdev, skb->data,
- MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
+ rxq->rxd_count++;
+ rx = rxq->tail++;
+ if (rxq->tail == MWL8K_RX_DESCS)
+ rxq->tail = 0;
+ rxq->buf[rx].skb = skb;
+ pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
- rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
- rxq->rx_skb[rx] = skb;
- wmb();
- rxq->rx_desc_area[rx].rx_ctrl = 0;
+ rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
+ priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
refilled++;
}
@@ -847,24 +1024,24 @@ static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
int i;
for (i = 0; i < MWL8K_RX_DESCS; i++) {
- if (rxq->rx_skb[i] != NULL) {
- unsigned long addr;
-
- addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
- pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
- PCI_DMA_FROMDEVICE);
- kfree_skb(rxq->rx_skb[i]);
- rxq->rx_skb[i] = NULL;
+ if (rxq->buf[i].skb != NULL) {
+ pci_unmap_single(priv->pdev,
+ pci_unmap_addr(&rxq->buf[i], dma),
+ MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
+ pci_unmap_addr_set(&rxq->buf[i], dma, 0);
+
+ kfree_skb(rxq->buf[i].skb);
+ rxq->buf[i].skb = NULL;
}
}
- kfree(rxq->rx_skb);
- rxq->rx_skb = NULL;
+ kfree(rxq->buf);
+ rxq->buf = NULL;
pci_free_consistent(priv->pdev,
- MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
- rxq->rx_desc_area, rxq->rx_desc_dma);
- rxq->rx_desc_area = NULL;
+ MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
+ rxq->rxd, rxq->rxd_dma);
+ rxq->rxd = NULL;
}
@@ -880,9 +1057,11 @@ mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
!compare_ether_addr(wh->addr3, priv->capture_bssid);
}
-static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
- struct sk_buff *skb)
+static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
+ struct sk_buff *skb)
{
+ struct mwl8k_priv *priv = hw->priv;
+
priv->capture_beacon = false;
memset(priv->capture_bssid, 0, ETH_ALEN);
@@ -893,8 +1072,7 @@ static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
*/
priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
if (priv->beacon_skb != NULL)
- queue_work(priv->config_wq,
- &priv->finalize_join_worker);
+ ieee80211_queue_work(hw, &priv->finalize_join_worker);
}
static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
@@ -904,53 +1082,46 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
int processed;
processed = 0;
- while (rxq->rx_desc_count && limit--) {
- struct mwl8k_rx_desc *rx_desc;
+ while (rxq->rxd_count && limit--) {
struct sk_buff *skb;
+ void *rxd;
+ int pkt_len;
struct ieee80211_rx_status status;
- unsigned long addr;
- struct ieee80211_hdr *wh;
- rx_desc = rxq->rx_desc_area + rxq->rx_head;
- if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
+ skb = rxq->buf[rxq->head].skb;
+ if (skb == NULL)
break;
- rmb();
- skb = rxq->rx_skb[rxq->rx_head];
- if (skb == NULL)
+ rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
+
+ pkt_len = priv->rxd_ops->rxd_process(rxd, &status);
+ if (pkt_len < 0)
break;
- rxq->rx_skb[rxq->rx_head] = NULL;
- rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
- rxq->rx_desc_count--;
+ rxq->buf[rxq->head].skb = NULL;
- addr = le32_to_cpu(rx_desc->pkt_phys_addr);
- pci_unmap_single(priv->pdev, addr,
- MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
+ pci_unmap_single(priv->pdev,
+ pci_unmap_addr(&rxq->buf[rxq->head], dma),
+ MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
+ pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
- skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
- mwl8k_remove_dma_header(skb);
+ rxq->head++;
+ if (rxq->head == MWL8K_RX_DESCS)
+ rxq->head = 0;
+
+ rxq->rxd_count--;
- wh = (struct ieee80211_hdr *)skb->data;
+ skb_put(skb, pkt_len);
+ mwl8k_remove_dma_header(skb);
/*
- * Check for pending join operation. save a copy of
- * the beacon and schedule a tasklet to send finalize
- * join command to the firmware.
+ * Check for a pending join operation. Save a
+ * copy of the beacon and schedule a tasklet to
+ * send a FINALIZE_JOIN command to the firmware.
*/
- if (mwl8k_capture_bssid(priv, wh))
- mwl8k_save_beacon(priv, skb);
-
- memset(&status, 0, sizeof(status));
- status.mactime = 0;
- status.signal = -rx_desc->rssi;
- status.noise = -rx_desc->noise_level;
- status.qual = rx_desc->link_quality;
- status.antenna = 1;
- status.rate_idx = 1;
- status.flag = 0;
- status.band = IEEE80211_BAND_2GHZ;
- status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
+ if (mwl8k_capture_bssid(priv, (void *)skb->data))
+ mwl8k_save_beacon(hw, skb);
+
memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
ieee80211_rx_irqsafe(hw, skb);
@@ -965,24 +1136,10 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
* Packet transmission.
*/
-/* Transmit queue assignment. */
-enum {
- MWL8K_WME_AC_BK = 0, /* background access */
- MWL8K_WME_AC_BE = 1, /* best effort access */
- MWL8K_WME_AC_VI = 2, /* video access */
- MWL8K_WME_AC_VO = 3, /* voice access */
-};
-
/* Transmit packet ACK policy */
#define MWL8K_TXD_ACK_POLICY_NORMAL 0
#define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
-#define GET_TXQ(_ac) (\
- ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
- ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
- ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
- MWL8K_WME_AC_BE)
-
#define MWL8K_TXD_STATUS_OK 0x00000001
#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
@@ -997,7 +1154,7 @@ struct mwl8k_tx_desc {
__le32 pkt_phys_addr;
__le16 pkt_len;
__u8 dest_MAC_addr[ETH_ALEN];
- __le32 next_tx_desc_phys_addr;
+ __le32 next_txd_phys_addr;
__le32 reserved;
__le16 rate_info;
__u8 peer_id;
@@ -1013,44 +1170,40 @@ static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
int size;
int i;
- memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
- txq->tx_stats.limit = MWL8K_TX_DESCS;
- txq->tx_head = 0;
- txq->tx_tail = 0;
+ memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
+ txq->stats.limit = MWL8K_TX_DESCS;
+ txq->head = 0;
+ txq->tail = 0;
size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
- txq->tx_desc_area =
- pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
- if (txq->tx_desc_area == NULL) {
+ txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
+ if (txq->txd == NULL) {
printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
- priv->name);
+ wiphy_name(hw->wiphy));
return -ENOMEM;
}
- memset(txq->tx_desc_area, 0, size);
+ memset(txq->txd, 0, size);
- txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
- GFP_KERNEL);
- if (txq->tx_skb == NULL) {
+ txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
+ if (txq->skb == NULL) {
printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
- priv->name);
- pci_free_consistent(priv->pdev, size,
- txq->tx_desc_area, txq->tx_desc_dma);
+ wiphy_name(hw->wiphy));
+ pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
return -ENOMEM;
}
- memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
+ memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
for (i = 0; i < MWL8K_TX_DESCS; i++) {
struct mwl8k_tx_desc *tx_desc;
int nexti;
- tx_desc = txq->tx_desc_area + i;
+ tx_desc = txq->txd + i;
nexti = (i + 1) % MWL8K_TX_DESCS;
tx_desc->status = 0;
- tx_desc->next_tx_desc_phys_addr =
- cpu_to_le32(txq->tx_desc_dma +
- nexti * sizeof(*tx_desc));
+ tx_desc->next_txd_phys_addr =
+ cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
}
return 0;
@@ -1065,11 +1218,6 @@ static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
ioread32(priv->regs + MWL8K_HIU_INT_CODE);
}
-static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
-{
- return priv->pending_tx_pkts;
-}
-
struct mwl8k_txq_info {
u32 fw_owned;
u32 drv_owned;
@@ -1089,14 +1237,13 @@ static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
- spin_lock_bh(&priv->tx_lock);
for (count = 0; count < MWL8K_TX_QUEUES; count++) {
txq = priv->txq + count;
- txinfo[count].len = txq->tx_stats.len;
- txinfo[count].head = txq->tx_head;
- txinfo[count].tail = txq->tx_tail;
+ txinfo[count].len = txq->stats.len;
+ txinfo[count].head = txq->head;
+ txinfo[count].tail = txq->tail;
for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
- tx_desc = txq->tx_desc_area + desc;
+ tx_desc = txq->txd + desc;
status = le32_to_cpu(tx_desc->status);
if (status & MWL8K_TXD_STATUS_FW_OWNED)
@@ -1108,30 +1255,26 @@ static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
txinfo[count].unused++;
}
}
- spin_unlock_bh(&priv->tx_lock);
return ndescs;
}
/*
- * Must be called with hw->fw_mutex held and tx queues stopped.
+ * Must be called with priv->fw_mutex held and tx queues stopped.
*/
static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
{
struct mwl8k_priv *priv = hw->priv;
- DECLARE_COMPLETION_ONSTACK(cmd_wait);
+ DECLARE_COMPLETION_ONSTACK(tx_wait);
u32 count;
unsigned long timeout;
might_sleep();
spin_lock_bh(&priv->tx_lock);
- count = mwl8k_txq_busy(priv);
- if (count) {
- priv->tx_wait = &cmd_wait;
- if (priv->radio_on)
- mwl8k_tx_start(priv);
- }
+ count = priv->pending_tx_pkts;
+ if (count)
+ priv->tx_wait = &tx_wait;
spin_unlock_bh(&priv->tx_lock);
if (count) {
@@ -1139,23 +1282,23 @@ static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
int index;
int newcount;
- timeout = wait_for_completion_timeout(&cmd_wait,
+ timeout = wait_for_completion_timeout(&tx_wait,
msecs_to_jiffies(5000));
if (timeout)
return 0;
spin_lock_bh(&priv->tx_lock);
priv->tx_wait = NULL;
- newcount = mwl8k_txq_busy(priv);
+ newcount = priv->pending_tx_pkts;
+ mwl8k_scan_tx_ring(priv, txinfo);
spin_unlock_bh(&priv->tx_lock);
printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
__func__, __LINE__, count, newcount);
- mwl8k_scan_tx_ring(priv, txinfo);
for (index = 0; index < MWL8K_TX_QUEUES; index++)
- printk(KERN_ERR
- "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
+ printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u "
+ "DRV:%u U:%u\n",
index,
txinfo[index].len,
txinfo[index].head,
@@ -1181,7 +1324,7 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
struct mwl8k_tx_queue *txq = priv->txq + index;
int wake = 0;
- while (txq->tx_stats.len > 0) {
+ while (txq->stats.len > 0) {
int tx;
struct mwl8k_tx_desc *tx_desc;
unsigned long addr;
@@ -1190,8 +1333,8 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
struct ieee80211_tx_info *info;
u32 status;
- tx = txq->tx_head;
- tx_desc = txq->tx_desc_area + tx;
+ tx = txq->head;
+ tx_desc = txq->txd + tx;
status = le32_to_cpu(tx_desc->status);
@@ -1202,15 +1345,15 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
}
- txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
- BUG_ON(txq->tx_stats.len == 0);
- txq->tx_stats.len--;
+ txq->head = (tx + 1) % MWL8K_TX_DESCS;
+ BUG_ON(txq->stats.len == 0);
+ txq->stats.len--;
priv->pending_tx_pkts--;
addr = le32_to_cpu(tx_desc->pkt_phys_addr);
size = le16_to_cpu(tx_desc->pkt_len);
- skb = txq->tx_skb[tx];
- txq->tx_skb[tx] = NULL;
+ skb = txq->skb[tx];
+ txq->skb[tx] = NULL;
BUG_ON(skb == NULL);
pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
@@ -1243,13 +1386,13 @@ static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
mwl8k_txq_reclaim(hw, index, 1);
- kfree(txq->tx_skb);
- txq->tx_skb = NULL;
+ kfree(txq->skb);
+ txq->skb = NULL;
pci_free_consistent(priv->pdev,
MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
- txq->tx_desc_area, txq->tx_desc_dma);
- txq->tx_desc_area = NULL;
+ txq->txd, txq->txd_dma);
+ txq->txd = NULL;
}
static int
@@ -1317,7 +1460,7 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
if (pci_dma_mapping_error(priv->pdev, dma)) {
printk(KERN_DEBUG "%s: failed to dma map skb, "
- "dropping TX frame.\n", priv->name);
+ "dropping TX frame.\n", wiphy_name(hw->wiphy));
dev_kfree_skb(skb);
return NETDEV_TX_OK;
}
@@ -1326,10 +1469,10 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
txq = priv->txq + index;
- BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
- txq->tx_skb[txq->tx_tail] = skb;
+ BUG_ON(txq->skb[txq->tail] != NULL);
+ txq->skb[txq->tail] = skb;
- tx = txq->tx_desc_area + txq->tx_tail;
+ tx = txq->txd + txq->tail;
tx->data_rate = txdatarate;
tx->tx_priority = index;
tx->qos_control = cpu_to_le16(qos);
@@ -1340,15 +1483,15 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
wmb();
tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
- txq->tx_stats.count++;
- txq->tx_stats.len++;
+ txq->stats.count++;
+ txq->stats.len++;
priv->pending_tx_pkts++;
- txq->tx_tail++;
- if (txq->tx_tail == MWL8K_TX_DESCS)
- txq->tx_tail = 0;
+ txq->tail++;
+ if (txq->tail == MWL8K_TX_DESCS)
+ txq->tail = 0;
- if (txq->tx_head == txq->tx_tail)
+ if (txq->head == txq->tail)
ieee80211_stop_queue(hw, index);
mwl8k_tx_start(priv);
@@ -1431,7 +1574,7 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
unsigned long timeout = 0;
u8 buf[32];
- cmd->result = 0xFFFF;
+ cmd->result = 0xffff;
dma_size = le16_to_cpu(cmd->length);
dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
PCI_DMA_BIDIRECTIONAL);
@@ -1464,7 +1607,7 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
if (!timeout) {
printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
- priv->name,
+ wiphy_name(hw->wiphy),
mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
MWL8K_CMD_TIMEOUT_MS);
rc = -ETIMEDOUT;
@@ -1472,7 +1615,7 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
rc = cmd->result ? -EINVAL : 0;
if (rc)
printk(KERN_ERR "%s: Command %s error 0x%x\n",
- priv->name,
+ wiphy_name(hw->wiphy),
mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
le16_to_cpu(cmd->result));
}
@@ -1481,9 +1624,9 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
}
/*
- * GET_HW_SPEC.
+ * CMD_GET_HW_SPEC (STA version).
*/
-struct mwl8k_cmd_get_hw_spec {
+struct mwl8k_cmd_get_hw_spec_sta {
struct mwl8k_cmd_pkt header;
__u8 hw_rev;
__u8 host_interface;
@@ -1499,13 +1642,13 @@ struct mwl8k_cmd_get_hw_spec {
__le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
__le32 caps2;
__le32 num_tx_desc_per_queue;
- __le32 total_rx_desc;
+ __le32 total_rxd;
} __attribute__((packed));
-static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
+static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
{
struct mwl8k_priv *priv = hw->priv;
- struct mwl8k_cmd_get_hw_spec *cmd;
+ struct mwl8k_cmd_get_hw_spec_sta *cmd;
int rc;
int i;
@@ -1518,12 +1661,12 @@ static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
- cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
+ cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
for (i = 0; i < MWL8K_TX_QUEUES; i++)
- cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
+ cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
- cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
+ cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
rc = mwl8k_post_cmd(hw, &cmd->header);
@@ -1539,6 +1682,129 @@ static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
}
/*
+ * CMD_GET_HW_SPEC (AP version).
+ */
+struct mwl8k_cmd_get_hw_spec_ap {
+ struct mwl8k_cmd_pkt header;
+ __u8 hw_rev;
+ __u8 host_interface;
+ __le16 num_wcb;
+ __le16 num_mcaddrs;
+ __u8 perm_addr[ETH_ALEN];
+ __le16 region_code;
+ __le16 num_antenna;
+ __le32 fw_rev;
+ __le32 wcbbase0;
+ __le32 rxwrptr;
+ __le32 rxrdptr;
+ __le32 ps_cookie;
+ __le32 wcbbase1;
+ __le32 wcbbase2;
+ __le32 wcbbase3;
+} __attribute__((packed));
+
+static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
+{
+ struct mwl8k_priv *priv = hw->priv;
+ struct mwl8k_cmd_get_hw_spec_ap *cmd;
+ int rc;
+
+ cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
+ if (cmd == NULL)
+ return -ENOMEM;
+
+ cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
+ cmd->header.length = cpu_to_le16(sizeof(*cmd));
+
+ memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
+ cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
+
+ rc = mwl8k_post_cmd(hw, &cmd->header);
+
+ if (!rc) {
+ int off;
+
+ SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
+ priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
+ priv->fw_rev = le32_to_cpu(cmd->fw_rev);
+ priv->hw_rev = cmd->hw_rev;
+
+ off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
+ iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
+
+ off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
+ iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
+
+ off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
+ iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
+
+ off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
+ iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
+
+ off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
+ iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
+
+ off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
+ iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
+ }
+
+ kfree(cmd);
+ return rc;
+}
+
+/*
+ * CMD_SET_HW_SPEC.
+ */
+struct mwl8k_cmd_set_hw_spec {
+ struct mwl8k_cmd_pkt header;
+ __u8 hw_rev;
+ __u8 host_interface;
+ __le16 num_mcaddrs;
+ __u8 perm_addr[ETH_ALEN];
+ __le16 region_code;
+ __le32 fw_rev;
+ __le32 ps_cookie;
+ __le32 caps;
+ __le32 rx_queue_ptr;
+ __le32 num_tx_queues;
+ __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
+ __le32 flags;
+ __le32 num_tx_desc_per_queue;
+ __le32 total_rxd;
+} __attribute__((packed));
+
+#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
+
+static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
+{
+ struct mwl8k_priv *priv = hw->priv;
+ struct mwl8k_cmd_set_hw_spec *cmd;
+ int rc;
+ int i;
+
+ cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
+ if (cmd == NULL)
+ return -ENOMEM;
+
+ cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
+ cmd->header.length = cpu_to_le16(sizeof(*cmd));
+
+ cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
+ cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
+ cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
+ for (i = 0; i < MWL8K_TX_QUEUES; i++)
+ cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
+ cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
+ cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
+ cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
+
+ rc = mwl8k_post_cmd(hw, &cmd->header);
+ kfree(cmd);
+
+ return rc;
+}
+
+/*
* CMD_MAC_MULTICAST_ADR.
*/
struct mwl8k_cmd_mac_multicast_adr {
@@ -1548,19 +1814,23 @@ struct mwl8k_cmd_mac_multicast_adr {
__u8 addr[0][ETH_ALEN];
};
-#define MWL8K_ENABLE_RX_MULTICAST 0x000F
+#define MWL8K_ENABLE_RX_DIRECTED 0x0001
+#define MWL8K_ENABLE_RX_MULTICAST 0x0002
+#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
+#define MWL8K_ENABLE_RX_BROADCAST 0x0008
static struct mwl8k_cmd_pkt *
-__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
+__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
int mc_count, struct dev_addr_list *mclist)
{
struct mwl8k_priv *priv = hw->priv;
struct mwl8k_cmd_mac_multicast_adr *cmd;
int size;
- int i;
- if (mc_count > priv->num_mcaddrs)
- mc_count = priv->num_mcaddrs;
+ if (allmulti || mc_count > priv->num_mcaddrs) {
+ allmulti = 1;
+ mc_count = 0;
+ }
size = sizeof(*cmd) + mc_count * ETH_ALEN;
@@ -1570,16 +1840,24 @@ __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
cmd->header.length = cpu_to_le16(size);
- cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
- cmd->numaddr = cpu_to_le16(mc_count);
-
- for (i = 0; i < mc_count && mclist; i++) {
- if (mclist->da_addrlen != ETH_ALEN) {
- kfree(cmd);
- return NULL;
+ cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
+ MWL8K_ENABLE_RX_BROADCAST);
+
+ if (allmulti) {
+ cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
+ } else if (mc_count) {
+ int i;
+
+ cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
+ cmd->numaddr = cpu_to_le16(mc_count);
+ for (i = 0; i < mc_count && mclist; i++) {
+ if (mclist->da_addrlen != ETH_ALEN) {
+ kfree(cmd);
+ return NULL;
+ }
+ memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
+ mclist = mclist->next;
}
- memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
- mclist = mclist->next;
}
return &cmd->header;
@@ -1590,7 +1868,6 @@ __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
*/
struct mwl8k_cmd_802_11_get_stat {
struct mwl8k_cmd_pkt header;
- __le16 action;
__le32 stats[64];
} __attribute__((packed));
@@ -1611,7 +1888,6 @@ static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
cmd->header.length = cpu_to_le16(sizeof(*cmd));
- cmd->action = cpu_to_le16(MWL8K_CMD_GET);
rc = mwl8k_post_cmd(hw, &cmd->header);
if (!rc) {
@@ -1727,6 +2003,39 @@ static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
}
/*
+ * CMD_RF_ANTENNA.
+ */
+struct mwl8k_cmd_rf_antenna {
+ struct mwl8k_cmd_pkt header;
+ __le16 antenna;
+ __le16 mode;
+} __attribute__((packed));
+
+#define MWL8K_RF_ANTENNA_RX 1
+#define MWL8K_RF_ANTENNA_TX 2
+
+static int
+mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
+{
+ struct mwl8k_cmd_rf_antenna *cmd;
+ int rc;
+
+ cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
+ if (cmd == NULL)
+ return -ENOMEM;
+
+ cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
+ cmd->header.length = cpu_to_le16(sizeof(*cmd));
+ cmd->antenna = cpu_to_le16(antenna);
+ cmd->mode = cpu_to_le16(mask);
+
+ rc = mwl8k_post_cmd(hw, &cmd->header);
+ kfree(cmd);
+
+ return rc;
+}
+
+/*
* CMD_SET_PRE_SCAN.
*/
struct mwl8k_cmd_set_pre_scan {
@@ -1904,6 +2213,46 @@ static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
}
/*
+ * CMD_SET_MAC_ADDR.
+ */
+struct mwl8k_cmd_set_mac_addr {
+ struct mwl8k_cmd_pkt header;
+ union {
+ struct {
+ __le16 mac_type;
+ __u8 mac_addr[ETH_ALEN];
+ } mbss;
+ __u8 mac_addr[ETH_ALEN];
+ };
+} __attribute__((packed));
+
+static int mwl8k_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
+{
+ struct mwl8k_priv *priv = hw->priv;
+ struct mwl8k_cmd_set_mac_addr *cmd;
+ int rc;
+
+ cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
+ if (cmd == NULL)
+ return -ENOMEM;
+
+ cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
+ cmd->header.length = cpu_to_le16(sizeof(*cmd));
+ if (priv->ap_fw) {
+ cmd->mbss.mac_type = 0;
+ memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
+ } else {
+ memcpy(cmd->mac_addr, mac, ETH_ALEN);
+ }
+
+ rc = mwl8k_post_cmd(hw, &cmd->header);
+ kfree(cmd);
+
+ return rc;
+}
+
+
+/*
* CMD_SET_RATEADAPT_MODE.
*/
struct mwl8k_cmd_set_rate_adapt_mode {
@@ -2005,17 +2354,34 @@ struct mwl8k_cmd_set_edca_params {
/* TX opportunity in units of 32 us */
__le16 txop;
- /* Log exponent of max contention period: 0...15*/
- __u8 log_cw_max;
+ union {
+ struct {
+ /* Log exponent of max contention period: 0...15 */
+ __le32 log_cw_max;
+
+ /* Log exponent of min contention period: 0...15 */
+ __le32 log_cw_min;
+
+ /* Adaptive interframe spacing in units of 32us */
+ __u8 aifs;
+
+ /* TX queue to configure */
+ __u8 txq;
+ } ap;
+ struct {
+ /* Log exponent of max contention period: 0...15 */
+ __u8 log_cw_max;
- /* Log exponent of min contention period: 0...15 */
- __u8 log_cw_min;
+ /* Log exponent of min contention period: 0...15 */
+ __u8 log_cw_min;
- /* Adaptive interframe spacing in units of 32us */
- __u8 aifs;
+ /* Adaptive interframe spacing in units of 32us */
+ __u8 aifs;
- /* TX queue to configure */
- __u8 txq;
+ /* TX queue to configure */
+ __u8 txq;
+ } sta;
+ };
} __attribute__((packed));
#define MWL8K_SET_EDCA_CW 0x01
@@ -2031,6 +2397,7 @@ mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
__u16 cw_min, __u16 cw_max,
__u8 aifs, __u16 txop)
{
+ struct mwl8k_priv *priv = hw->priv;
struct mwl8k_cmd_set_edca_params *cmd;
int rc;
@@ -2038,14 +2405,27 @@ mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
if (cmd == NULL)
return -ENOMEM;
+ /*
+ * Queues 0 (BE) and 1 (BK) are swapped in hardware for
+ * this call.
+ */
+ qnum ^= !(qnum >> 1);
+
cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
cmd->header.length = cpu_to_le16(sizeof(*cmd));
cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
cmd->txop = cpu_to_le16(txop);
- cmd->log_cw_max = (u8)ilog2(cw_max + 1);
- cmd->log_cw_min = (u8)ilog2(cw_min + 1);
- cmd->aifs = aifs;
- cmd->txq = qnum;
+ if (priv->ap_fw) {
+ cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
+ cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
+ cmd->ap.aifs = aifs;
+ cmd->ap.txq = qnum;
+ } else {
+ cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
+ cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
+ cmd->sta.aifs = aifs;
+ cmd->sta.txq = qnum;
+ }
rc = mwl8k_post_cmd(hw, &cmd->header);
kfree(cmd);
@@ -2093,8 +2473,8 @@ static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
/* XXX TBD Might just have to abort and return an error */
if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
- "sent to firmware. Sz=%u MAX=%u\n", __func__,
- payload_len, MWL8K_FJ_BEACON_MAXLEN);
+ "sent to firmware. Sz=%u MAX=%u\n", __func__,
+ payload_len, MWL8K_FJ_BEACON_MAXLEN);
if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
payload_len = MWL8K_FJ_BEACON_MAXLEN;
@@ -2341,9 +2721,10 @@ static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
cmd->rate_type = cpu_to_le32(rate_type);
if (rate_table != NULL) {
- /* Copy over each field manually so
- * that bitflipping can be done
- */
+ /*
+ * Copy over each field manually so that endian
+ * conversion can be done.
+ */
cmd->rate_table.allow_rate_drop =
cpu_to_le32(rate_table->allow_rate_drop);
cmd->rate_table.num_rates =
@@ -2399,7 +2780,7 @@ static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
if (!mutex_is_locked(&priv->fw_mutex) &&
- priv->radio_on && mwl8k_txq_busy(priv))
+ priv->radio_on && priv->pending_tx_pkts)
mwl8k_tx_start(priv);
}
@@ -2418,7 +2799,7 @@ static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
if (priv->current_channel == NULL) {
printk(KERN_DEBUG "%s: dropped TX frame since radio "
- "disabled\n", priv->name);
+ "disabled\n", wiphy_name(hw->wiphy));
dev_kfree_skb(skb);
return NETDEV_TX_OK;
}
@@ -2437,7 +2818,7 @@ static int mwl8k_start(struct ieee80211_hw *hw)
IRQF_SHARED, MWL8K_NAME, hw);
if (rc) {
printk(KERN_ERR "%s: failed to register IRQ handler\n",
- priv->name);
+ wiphy_name(hw->wiphy));
return -EIO;
}
@@ -2451,12 +2832,17 @@ static int mwl8k_start(struct ieee80211_hw *hw)
if (!rc) {
rc = mwl8k_cmd_802_11_radio_enable(hw);
- if (!rc)
- rc = mwl8k_cmd_set_pre_scan(hw);
+ if (!priv->ap_fw) {
+ if (!rc)
+ rc = mwl8k_enable_sniffer(hw, 0);
- if (!rc)
- rc = mwl8k_cmd_set_post_scan(hw,
- "\x00\x00\x00\x00\x00\x00");
+ if (!rc)
+ rc = mwl8k_cmd_set_pre_scan(hw);
+
+ if (!rc)
+ rc = mwl8k_cmd_set_post_scan(hw,
+ "\x00\x00\x00\x00\x00\x00");
+ }
if (!rc)
rc = mwl8k_cmd_setrateadaptmode(hw, 0);
@@ -2464,9 +2850,6 @@ static int mwl8k_start(struct ieee80211_hw *hw)
if (!rc)
rc = mwl8k_set_wmm(hw, 0);
- if (!rc)
- rc = mwl8k_enable_sniffer(hw, 0);
-
mwl8k_fw_unlock(hw);
}
@@ -2500,9 +2883,6 @@ static void mwl8k_stop(struct ieee80211_hw *hw)
/* Stop tx reclaim tasklet */
tasklet_disable(&priv->tx_reclaim_task);
- /* Stop config thread */
- flush_workqueue(priv->config_wq);
-
/* Return all skbs to mac80211 */
for (i = 0; i < MWL8K_TX_QUEUES; i++)
mwl8k_txq_reclaim(hw, i, 1);
@@ -2526,11 +2906,24 @@ static int mwl8k_add_interface(struct ieee80211_hw *hw,
if (conf->type != NL80211_IFTYPE_STATION)
return -EINVAL;
+ /*
+ * Reject interface creation if sniffer mode is active, as
+ * STA operation is mutually exclusive with hardware sniffer
+ * mode.
+ */
+ if (priv->sniffer_enabled) {
+ printk(KERN_INFO "%s: unable to create STA "
+ "interface due to sniffer mode being enabled\n",
+ wiphy_name(hw->wiphy));
+ return -EINVAL;
+ }
+
/* Clean out driver private area */
mwl8k_vif = MWL8K_VIF(conf->vif);
memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
- /* Save the mac address */
+ /* Set and save the mac address */
+ mwl8k_set_mac_addr(hw, conf->mac_addr);
memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
/* Back pointer to parent config block */
@@ -2558,6 +2951,8 @@ static void mwl8k_remove_interface(struct ieee80211_hw *hw,
if (priv->vif == NULL)
return;
+ mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
+
priv->vif = NULL;
}
@@ -2593,8 +2988,13 @@ static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
if (rc)
goto out;
- if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
- rc = -EINVAL;
+ if (priv->ap_fw) {
+ rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
+ if (!rc)
+ rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
+ } else {
+ rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
+ }
out:
mwl8k_fw_unlock(hw);
@@ -2681,32 +3081,108 @@ static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
{
struct mwl8k_cmd_pkt *cmd;
- cmd = __mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
+ /*
+ * Synthesize and return a command packet that programs the
+ * hardware multicast address filter. At this point we don't
+ * know whether FIF_ALLMULTI is being requested, but if it is,
+ * we'll end up throwing this packet away and creating a new
+ * one in mwl8k_configure_filter().
+ */
+ cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
return (unsigned long)cmd;
}
+static int
+mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
+ unsigned int changed_flags,
+ unsigned int *total_flags)
+{
+ struct mwl8k_priv *priv = hw->priv;
+
+ /*
+ * Hardware sniffer mode is mutually exclusive with STA
+ * operation, so refuse to enable sniffer mode if a STA
+ * interface is active.
+ */
+ if (priv->vif != NULL) {
+ if (net_ratelimit())
+ printk(KERN_INFO "%s: not enabling sniffer "
+ "mode because STA interface is active\n",
+ wiphy_name(hw->wiphy));
+ return 0;
+ }
+
+ if (!priv->sniffer_enabled) {
+ if (mwl8k_enable_sniffer(hw, 1))
+ return 0;
+ priv->sniffer_enabled = true;
+ }
+
+ *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
+ FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
+ FIF_OTHER_BSS;
+
+ return 1;
+}
+
static void mwl8k_configure_filter(struct ieee80211_hw *hw,
unsigned int changed_flags,
unsigned int *total_flags,
u64 multicast)
{
struct mwl8k_priv *priv = hw->priv;
- struct mwl8k_cmd_pkt *multicast_adr_cmd;
+ struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
+
+ /*
+ * AP firmware doesn't allow fine-grained control over
+ * the receive filter.
+ */
+ if (priv->ap_fw) {
+ *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
+ kfree(cmd);
+ return;
+ }
+
+ /*
+ * Enable hardware sniffer mode if FIF_CONTROL or
+ * FIF_OTHER_BSS is requested.
+ */
+ if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
+ mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
+ kfree(cmd);
+ return;
+ }
/* Clear unsupported feature flags */
- *total_flags &= FIF_BCN_PRBRESP_PROMISC;
+ *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
if (mwl8k_fw_lock(hw))
return;
+ if (priv->sniffer_enabled) {
+ mwl8k_enable_sniffer(hw, 0);
+ priv->sniffer_enabled = false;
+ }
+
if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
- if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
+ if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
+ /*
+ * Disable the BSS filter.
+ */
mwl8k_cmd_set_pre_scan(hw);
- else {
+ } else {
u8 *bssid;
- bssid = "\x00\x00\x00\x00\x00\x00";
+ /*
+ * Enable the BSS filter.
+ *
+ * If there is an active STA interface, use that
+ * interface's BSSID, otherwise use a dummy one
+ * (where the OUI part needs to be nonzero for
+ * the BSSID to be accepted by POST_SCAN).
+ */
+ bssid = "\x01\x00\x00\x00\x00\x00";
if (priv->vif != NULL)
bssid = MWL8K_VIF(priv->vif)->bssid;
@@ -2714,10 +3190,20 @@ static void mwl8k_configure_filter(struct ieee80211_hw *hw,
}
}
- multicast_adr_cmd = (void *)(unsigned long)multicast;
- if (multicast_adr_cmd != NULL) {
- mwl8k_post_cmd(hw, multicast_adr_cmd);
- kfree(multicast_adr_cmd);
+ /*
+ * If FIF_ALLMULTI is being requested, throw away the command
+ * packet that ->prepare_multicast() built and replace it with
+ * a command packet that enables reception of all multicast
+ * packets.
+ */
+ if (*total_flags & FIF_ALLMULTI) {
+ kfree(cmd);
+ cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
+ }
+
+ if (cmd != NULL) {
+ mwl8k_post_cmd(hw, cmd);
+ kfree(cmd);
}
mwl8k_fw_unlock(hw);
@@ -2762,7 +3248,7 @@ static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
spin_lock_bh(&priv->tx_lock);
for (index = 0; index < MWL8K_TX_QUEUES; index++) {
txq = priv->txq + index;
- memcpy(&stats[index], &txq->tx_stats,
+ memcpy(&stats[index], &txq->stats,
sizeof(struct ieee80211_tx_queue_stats));
}
spin_unlock_bh(&priv->tx_lock);
@@ -2802,7 +3288,7 @@ static void mwl8k_tx_reclaim_handler(unsigned long data)
for (i = 0; i < MWL8K_TX_QUEUES; i++)
mwl8k_txq_reclaim(hw, i, 0);
- if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
+ if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
complete(priv->tx_wait);
priv->tx_wait = NULL;
}
@@ -2822,6 +3308,36 @@ static void mwl8k_finalize_join_worker(struct work_struct *work)
priv->beacon_skb = NULL;
}
+enum {
+ MWL8687 = 0,
+ MWL8366,
+};
+
+static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
+ {
+ .part_name = "88w8687",
+ .helper_image = "mwl8k/helper_8687.fw",
+ .fw_image = "mwl8k/fmimage_8687.fw",
+ .rxd_ops = &rxd_8687_ops,
+ .modes = BIT(NL80211_IFTYPE_STATION),
+ },
+ {
+ .part_name = "88w8366",
+ .helper_image = "mwl8k/helper_8366.fw",
+ .fw_image = "mwl8k/fmimage_8366.fw",
+ .rxd_ops = &rxd_8366_ops,
+ .modes = 0,
+ },
+};
+
+static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
+ { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
+ { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
+ { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
+ { },
+};
+MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
+
static int __devinit mwl8k_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
@@ -2862,17 +3378,34 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
priv = hw->priv;
priv->hw = hw;
priv->pdev = pdev;
+ priv->device_info = &mwl8k_info_tbl[id->driver_data];
+ priv->rxd_ops = priv->device_info->rxd_ops;
+ priv->sniffer_enabled = false;
priv->wmm_enabled = false;
priv->pending_tx_pkts = 0;
- strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
SET_IEEE80211_DEV(hw, &pdev->dev);
pci_set_drvdata(pdev, hw);
+ priv->sram = pci_iomap(pdev, 0, 0x10000);
+ if (priv->sram == NULL) {
+ printk(KERN_ERR "%s: Cannot map device SRAM\n",
+ wiphy_name(hw->wiphy));
+ goto err_iounmap;
+ }
+
+ /*
+ * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
+ * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
+ */
priv->regs = pci_iomap(pdev, 1, 0x10000);
if (priv->regs == NULL) {
- printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
- goto err_iounmap;
+ priv->regs = pci_iomap(pdev, 2, 0x10000);
+ if (priv->regs == NULL) {
+ printk(KERN_ERR "%s: Cannot map device registers\n",
+ wiphy_name(hw->wiphy));
+ goto err_iounmap;
+ }
}
memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
@@ -2897,7 +3430,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
hw->queues = MWL8K_TX_QUEUES;
- hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
+ hw->wiphy->interface_modes = priv->device_info->modes;
/* Set rssi and noise values to dBm */
hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
@@ -2916,11 +3449,6 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
mwl8k_tx_reclaim_handler, (unsigned long)hw);
tasklet_disable(&priv->tx_reclaim_task);
- /* Config workthread */
- priv->config_wq = create_singlethread_workqueue("mwl8k_config");
- if (priv->config_wq == NULL)
- goto err_iounmap;
-
/* Power management cookie */
priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
if (priv->cookie == NULL)
@@ -2934,11 +3462,12 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
mutex_init(&priv->fw_mutex);
priv->fw_mutex_owner = NULL;
priv->fw_mutex_depth = 0;
- priv->tx_wait = NULL;
priv->hostcmd_wait = NULL;
spin_lock_init(&priv->tx_lock);
+ priv->tx_wait = NULL;
+
for (i = 0; i < MWL8K_TX_QUEUES; i++) {
rc = mwl8k_txq_init(hw, i);
if (rc)
@@ -2954,7 +3483,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
IRQF_SHARED, MWL8K_NAME, hw);
if (rc) {
printk(KERN_ERR "%s: failed to register IRQ handler\n",
- priv->name);
+ wiphy_name(hw->wiphy));
goto err_free_queues;
}
@@ -2962,16 +3491,18 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
mwl8k_hw_reset(priv);
/* Ask userland hotplug daemon for the device firmware */
- rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
+ rc = mwl8k_request_firmware(priv);
if (rc) {
- printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
+ printk(KERN_ERR "%s: Firmware files not found\n",
+ wiphy_name(hw->wiphy));
goto err_free_irq;
}
/* Load firmware into hardware */
- rc = mwl8k_load_firmware(priv);
+ rc = mwl8k_load_firmware(hw);
if (rc) {
- printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
+ printk(KERN_ERR "%s: Cannot start firmware\n",
+ wiphy_name(hw->wiphy));
goto err_stop_firmware;
}
@@ -2986,16 +3517,31 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
/* Get config data, mac addrs etc */
- rc = mwl8k_cmd_get_hw_spec(hw);
+ if (priv->ap_fw) {
+ rc = mwl8k_cmd_get_hw_spec_ap(hw);
+ if (!rc)
+ rc = mwl8k_cmd_set_hw_spec(hw);
+ } else {
+ rc = mwl8k_cmd_get_hw_spec_sta(hw);
+ }
if (rc) {
- printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
+ printk(KERN_ERR "%s: Cannot initialise firmware\n",
+ wiphy_name(hw->wiphy));
goto err_stop_firmware;
}
/* Turn radio off */
rc = mwl8k_cmd_802_11_radio_disable(hw);
if (rc) {
- printk(KERN_ERR "%s: Cannot disable\n", priv->name);
+ printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
+ goto err_stop_firmware;
+ }
+
+ /* Clear MAC address */
+ rc = mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
+ if (rc) {
+ printk(KERN_ERR "%s: Cannot clear MAC address\n",
+ wiphy_name(hw->wiphy));
goto err_stop_firmware;
}
@@ -3005,13 +3551,15 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
rc = ieee80211_register_hw(hw);
if (rc) {
- printk(KERN_ERR "%s: Cannot register device\n", priv->name);
+ printk(KERN_ERR "%s: Cannot register device\n",
+ wiphy_name(hw->wiphy));
goto err_stop_firmware;
}
- printk(KERN_INFO "%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
- wiphy_name(hw->wiphy), priv->part_num, priv->hw_rev,
- hw->wiphy->perm_addr,
+ printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
+ wiphy_name(hw->wiphy), priv->device_info->part_name,
+ priv->hw_rev, hw->wiphy->perm_addr,
+ priv->ap_fw ? "AP" : "STA",
(priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
(priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
@@ -3038,8 +3586,8 @@ err_iounmap:
if (priv->regs != NULL)
pci_iounmap(pdev, priv->regs);
- if (priv->config_wq != NULL)
- destroy_workqueue(priv->config_wq);
+ if (priv->sram != NULL)
+ pci_iounmap(pdev, priv->sram);
pci_set_drvdata(pdev, NULL);
ieee80211_free_hw(hw);
@@ -3073,9 +3621,6 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev)
/* Remove tx reclaim tasklet */
tasklet_kill(&priv->tx_reclaim_task);
- /* Stop config thread */
- destroy_workqueue(priv->config_wq);
-
/* Stop hardware */
mwl8k_hw_reset(priv);
@@ -3088,10 +3633,10 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev)
mwl8k_rxq_deinit(hw, 0);
- pci_free_consistent(priv->pdev, 4,
- priv->cookie, priv->cookie_dma);
+ pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
pci_iounmap(pdev, priv->regs);
+ pci_iounmap(pdev, priv->sram);
pci_set_drvdata(pdev, NULL);
ieee80211_free_hw(hw);
pci_release_regions(pdev);
@@ -3100,7 +3645,7 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev)
static struct pci_driver mwl8k_driver = {
.name = MWL8K_NAME,
- .id_table = mwl8k_table,
+ .id_table = mwl8k_pci_id_table,
.probe = mwl8k_probe,
.remove = __devexit_p(mwl8k_remove),
.shutdown = __devexit_p(mwl8k_shutdown),
@@ -3118,3 +3663,8 @@ static void __exit mwl8k_exit(void)
module_init(mwl8k_init);
module_exit(mwl8k_exit);
+
+MODULE_DESCRIPTION(MWL8K_DESC);
+MODULE_VERSION(MWL8K_VERSION);
+MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/netwave_cs.c b/drivers/net/wireless/netwave_cs.c
deleted file mode 100644
index 9498b46c99a..00000000000
--- a/drivers/net/wireless/netwave_cs.c
+++ /dev/null
@@ -1,1389 +0,0 @@
-/*********************************************************************
- *
- * Filename: netwave_cs.c
- * Version: 0.4.1
- * Description: Netwave AirSurfer Wireless LAN PC Card driver
- * Status: Experimental.
- * Authors: John Markus Bjørndalen <johnm@cs.uit.no>
- * Dag Brattli <dagb@cs.uit.no>
- * David Hinds <dahinds@users.sourceforge.net>
- * Created at: A long time ago!
- * Modified at: Mon Nov 10 11:54:37 1997
- * Modified by: Dag Brattli <dagb@cs.uit.no>
- *
- * Copyright (c) 1997 University of Tromsø, Norway
- *
- * Revision History:
- *
- * 08-Nov-97 15:14:47 John Markus Bjørndalen <johnm@cs.uit.no>
- * - Fixed some bugs in netwave_rx and cleaned it up a bit.
- * (One of the bugs would have destroyed packets when receiving
- * multiple packets per interrupt).
- * - Cleaned up parts of newave_hw_xmit.
- * - A few general cleanups.
- * 24-Oct-97 13:17:36 Dag Brattli <dagb@cs.uit.no>
- * - Fixed netwave_rx receive function (got updated docs)
- * Others:
- * - Changed name from xircnw to netwave, take a look at
- * http://www.netwave-wireless.com
- * - Some reorganizing of the code
- * - Removed possible race condition between interrupt handler and transmit
- * function
- * - Started to add wireless extensions, but still needs some coding
- * - Added watchdog for better handling of transmission timeouts
- * (hopefully this works better)
- ********************************************************************/
-
-/* To have statistics (just packets sent) define this */
-#undef NETWAVE_STATS
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/in.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/timer.h>
-#include <linux/errno.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/bitops.h>
-#include <linux/wireless.h>
-#include <net/iw_handler.h>
-
-#include <pcmcia/cs_types.h>
-#include <pcmcia/cs.h>
-#include <pcmcia/cistpl.h>
-#include <pcmcia/cisreg.h>
-#include <pcmcia/ds.h>
-#include <pcmcia/mem_op.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-
-#define NETWAVE_REGOFF 0x8000
-/* The Netwave IO registers, offsets to iobase */
-#define NETWAVE_REG_COR 0x0
-#define NETWAVE_REG_CCSR 0x2
-#define NETWAVE_REG_ASR 0x4
-#define NETWAVE_REG_IMR 0xa
-#define NETWAVE_REG_PMR 0xc
-#define NETWAVE_REG_IOLOW 0x6
-#define NETWAVE_REG_IOHI 0x7
-#define NETWAVE_REG_IOCONTROL 0x8
-#define NETWAVE_REG_DATA 0xf
-/* The Netwave Extended IO registers, offsets to RamBase */
-#define NETWAVE_EREG_ASCC 0x114
-#define NETWAVE_EREG_RSER 0x120
-#define NETWAVE_EREG_RSERW 0x124
-#define NETWAVE_EREG_TSER 0x130
-#define NETWAVE_EREG_TSERW 0x134
-#define NETWAVE_EREG_CB 0x100
-#define NETWAVE_EREG_SPCQ 0x154
-#define NETWAVE_EREG_SPU 0x155
-#define NETWAVE_EREG_LIF 0x14e
-#define NETWAVE_EREG_ISPLQ 0x156
-#define NETWAVE_EREG_HHC 0x158
-#define NETWAVE_EREG_NI 0x16e
-#define NETWAVE_EREG_MHS 0x16b
-#define NETWAVE_EREG_TDP 0x140
-#define NETWAVE_EREG_RDP 0x150
-#define NETWAVE_EREG_PA 0x160
-#define NETWAVE_EREG_EC 0x180
-#define NETWAVE_EREG_CRBP 0x17a
-#define NETWAVE_EREG_ARW 0x166
-
-/*
- * Commands used in the extended command buffer
- * NETWAVE_EREG_CB (0x100-0x10F)
- */
-#define NETWAVE_CMD_NOP 0x00
-#define NETWAVE_CMD_SRC 0x01
-#define NETWAVE_CMD_STC 0x02
-#define NETWAVE_CMD_AMA 0x03
-#define NETWAVE_CMD_DMA 0x04
-#define NETWAVE_CMD_SAMA 0x05
-#define NETWAVE_CMD_ER 0x06
-#define NETWAVE_CMD_DR 0x07
-#define NETWAVE_CMD_TL 0x08
-#define NETWAVE_CMD_SRP 0x09
-#define NETWAVE_CMD_SSK 0x0a
-#define NETWAVE_CMD_SMD 0x0b
-#define NETWAVE_CMD_SAPD 0x0c
-#define NETWAVE_CMD_SSS 0x11
-/* End of Command marker */
-#define NETWAVE_CMD_EOC 0x00
-
-/* ASR register bits */
-#define NETWAVE_ASR_RXRDY 0x80
-#define NETWAVE_ASR_TXBA 0x01
-
-#define TX_TIMEOUT ((32*HZ)/100)
-
-static const unsigned int imrConfRFU1 = 0x10; /* RFU interrupt mask, keep high */
-static const unsigned int imrConfIENA = 0x02; /* Interrupt enable */
-
-static const unsigned int corConfIENA = 0x01; /* Interrupt enable */
-static const unsigned int corConfLVLREQ = 0x40; /* Keep high */
-
-static const unsigned int rxConfRxEna = 0x80; /* Receive Enable */
-static const unsigned int rxConfMAC = 0x20; /* MAC host receive mode*/
-static const unsigned int rxConfPro = 0x10; /* Promiscuous */
-static const unsigned int rxConfAMP = 0x08; /* Accept Multicast Packets */
-static const unsigned int rxConfBcast = 0x04; /* Accept Broadcast Packets */
-
-static const unsigned int txConfTxEna = 0x80; /* Transmit Enable */
-static const unsigned int txConfMAC = 0x20; /* Host sends MAC mode */
-static const unsigned int txConfEUD = 0x10; /* Enable Uni-Data packets */
-static const unsigned int txConfKey = 0x02; /* Scramble data packets */
-static const unsigned int txConfLoop = 0x01; /* Loopback mode */
-
-/*
- All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
- you do not define PCMCIA_DEBUG at all, all the debug code will be
- left out. If you compile with PCMCIA_DEBUG=0, the debug code will
- be present but disabled -- but it can then be enabled for specific
- modules at load time with a 'pc_debug=#' option to insmod.
-*/
-
-#ifdef PCMCIA_DEBUG
-static int pc_debug = PCMCIA_DEBUG;
-module_param(pc_debug, int, 0);
-#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
-static char *version =
-"netwave_cs.c 0.3.0 Thu Jul 17 14:36:02 1997 (John Markus Bjørndalen)\n";
-#else
-#define DEBUG(n, args...)
-#endif
-
-/*====================================================================*/
-
-/* Parameters that can be set with 'insmod' */
-
-/* Choose the domain, default is 0x100 */
-static u_int domain = 0x100;
-
-/* Scramble key, range from 0x0 to 0xffff.
- * 0x0 is no scrambling.
- */
-static u_int scramble_key = 0x0;
-
-/* Shared memory speed, in ns. The documentation states that
- * the card should not be read faster than every 400ns.
- * This timing should be provided by the HBA. If it becomes a
- * problem, try setting mem_speed to 400.
- */
-static int mem_speed;
-
-module_param(domain, int, 0);
-module_param(scramble_key, int, 0);
-module_param(mem_speed, int, 0);
-
-/*====================================================================*/
-
-/* PCMCIA (Card Services) related functions */
-static void netwave_release(struct pcmcia_device *link); /* Card removal */
-static int netwave_pcmcia_config(struct pcmcia_device *arg); /* Runs after card
- insertion */
-static void netwave_detach(struct pcmcia_device *p_dev); /* Destroy instance */
-
-/* Hardware configuration */
-static void netwave_doreset(unsigned int iobase, u_char __iomem *ramBase);
-static void netwave_reset(struct net_device *dev);
-
-/* Misc device stuff */
-static int netwave_open(struct net_device *dev); /* Open the device */
-static int netwave_close(struct net_device *dev); /* Close the device */
-
-/* Packet transmission and Packet reception */
-static netdev_tx_t netwave_start_xmit( struct sk_buff *skb,
- struct net_device *dev);
-static int netwave_rx( struct net_device *dev);
-
-/* Interrupt routines */
-static irqreturn_t netwave_interrupt(int irq, void *dev_id);
-static void netwave_watchdog(struct net_device *);
-
-/* Wireless extensions */
-static struct iw_statistics* netwave_get_wireless_stats(struct net_device *dev);
-
-static void set_multicast_list(struct net_device *dev);
-
-/*
- A struct pcmcia_device structure has fields for most things that are needed
- to keep track of a socket, but there will usually be some device
- specific information that also needs to be kept track of. The
- 'priv' pointer in a struct pcmcia_device structure can be used to point to
- a device-specific private data structure, like this.
-
- A driver needs to provide a dev_node_t structure for each device
- on a card. In some cases, there is only one device per card (for
- example, ethernet cards, modems). In other cases, there may be
- many actual or logical devices (SCSI adapters, memory cards with
- multiple partitions). The dev_node_t structures need to be kept
- in a linked list starting at the 'dev' field of a struct pcmcia_device
- structure. We allocate them in the card's private data structure,
- because they generally can't be allocated dynamically.
-*/
-
-static const struct iw_handler_def netwave_handler_def;
-
-#define SIOCGIPSNAP SIOCIWFIRSTPRIV + 1 /* Site Survey Snapshot */
-
-#define MAX_ESA 10
-
-typedef struct net_addr {
- u_char addr48[6];
-} net_addr;
-
-struct site_survey {
- u_short length;
- u_char struct_revision;
- u_char roaming_state;
-
- u_char sp_existsFlag;
- u_char sp_link_quality;
- u_char sp_max_link_quality;
- u_char linkQualityGoodFairBoundary;
- u_char linkQualityFairPoorBoundary;
- u_char sp_utilization;
- u_char sp_goodness;
- u_char sp_hotheadcount;
- u_char roaming_condition;
-
- net_addr sp;
- u_char numAPs;
- net_addr nearByAccessPoints[MAX_ESA];
-};
-
-typedef struct netwave_private {
- struct pcmcia_device *p_dev;
- spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
- dev_node_t node;
- u_char __iomem *ramBase;
- int timeoutCounter;
- int lastExec;
- struct timer_list watchdog; /* To avoid blocking state */
- struct site_survey nss;
- struct iw_statistics iw_stats; /* Wireless stats */
-} netwave_private;
-
-/*
- * The Netwave card is little-endian, so won't work for big endian
- * systems.
- */
-static inline unsigned short get_uint16(u_char __iomem *staddr)
-{
- return readw(staddr); /* Return only 16 bits */
-}
-
-static inline short get_int16(u_char __iomem * staddr)
-{
- return readw(staddr);
-}
-
-/*
- * Wait until the WOC (Write Operation Complete) bit in the
- * ASR (Adapter Status Register) is asserted.
- * This should have aborted if it takes too long time.
- */
-static inline void wait_WOC(unsigned int iobase)
-{
- /* Spin lock */
- while ((inb(iobase + NETWAVE_REG_ASR) & 0x8) != 0x8) ;
-}
-
-static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase,
- unsigned int iobase) {
- u_short resultBuffer;
-
- /* if time since last snapshot is > 1 sec. (100 jiffies?) then take
- * new snapshot, else return cached data. This is the recommended rate.
- */
- if ( jiffies - priv->lastExec > 100) {
- /* Take site survey snapshot */
- /*printk( KERN_DEBUG "Taking new snapshot. %ld\n", jiffies -
- priv->lastExec); */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SSS, ramBase + NETWAVE_EREG_CB + 0);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
- wait_WOC(iobase);
-
- /* Get result and copy to cach */
- resultBuffer = readw(ramBase + NETWAVE_EREG_CRBP);
- copy_from_pc( &priv->nss, ramBase+resultBuffer,
- sizeof(struct site_survey));
- }
-}
-
-/*
- * Function netwave_get_wireless_stats (dev)
- *
- * Wireless extensions statistics
- *
- */
-static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev)
-{
- unsigned long flags;
- unsigned int iobase = dev->base_addr;
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
- struct iw_statistics* wstats;
-
- wstats = &priv->iw_stats;
-
- spin_lock_irqsave(&priv->spinlock, flags);
-
- netwave_snapshot( priv, ramBase, iobase);
-
- wstats->status = priv->nss.roaming_state;
- wstats->qual.qual = readb( ramBase + NETWAVE_EREG_SPCQ);
- wstats->qual.level = readb( ramBase + NETWAVE_EREG_ISPLQ);
- wstats->qual.noise = readb( ramBase + NETWAVE_EREG_SPU) & 0x3f;
- wstats->discard.nwid = 0L;
- wstats->discard.code = 0L;
- wstats->discard.misc = 0L;
-
- spin_unlock_irqrestore(&priv->spinlock, flags);
-
- return &priv->iw_stats;
-}
-
-static const struct net_device_ops netwave_netdev_ops = {
- .ndo_open = netwave_open,
- .ndo_stop = netwave_close,
- .ndo_start_xmit = netwave_start_xmit,
- .ndo_set_multicast_list = set_multicast_list,
- .ndo_tx_timeout = netwave_watchdog,
- .ndo_change_mtu = eth_change_mtu,
- .ndo_set_mac_address = eth_mac_addr,
- .ndo_validate_addr = eth_validate_addr,
-};
-
-/*
- * Function netwave_attach (void)
- *
- * Creates an "instance" of the driver, allocating local data
- * structures for one device. The device is registered with Card
- * Services.
- *
- * The dev_link structure is initialized, but we don't actually
- * configure the card at this point -- we wait until we receive a
- * card insertion event.
- */
-static int netwave_probe(struct pcmcia_device *link)
-{
- struct net_device *dev;
- netwave_private *priv;
-
- DEBUG(0, "netwave_attach()\n");
-
- /* Initialize the struct pcmcia_device structure */
- dev = alloc_etherdev(sizeof(netwave_private));
- if (!dev)
- return -ENOMEM;
- priv = netdev_priv(dev);
- priv->p_dev = link;
- link->priv = dev;
-
- /* The io structure describes IO port mapping */
- link->io.NumPorts1 = 16;
- link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
- /* link->io.NumPorts2 = 16;
- link->io.Attributes2 = IO_DATA_PATH_WIDTH_16; */
- link->io.IOAddrLines = 5;
-
- /* Interrupt setup */
- link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT;
- link->irq.IRQInfo1 = IRQ_LEVEL_ID;
- link->irq.Handler = &netwave_interrupt;
-
- /* General socket configuration */
- link->conf.Attributes = CONF_ENABLE_IRQ;
- link->conf.IntType = INT_MEMORY_AND_IO;
- link->conf.ConfigIndex = 1;
-
- /* Netwave private struct init. link/dev/node already taken care of,
- * other stuff zero'd - Jean II */
- spin_lock_init(&priv->spinlock);
-
- /* Netwave specific entries in the device structure */
- dev->netdev_ops = &netwave_netdev_ops;
- /* wireless extensions */
- dev->wireless_handlers = &netwave_handler_def;
-
- dev->watchdog_timeo = TX_TIMEOUT;
-
- link->irq.Instance = dev;
-
- return netwave_pcmcia_config( link);
-} /* netwave_attach */
-
-/*
- * Function netwave_detach (link)
- *
- * This deletes a driver "instance". The device is de-registered
- * with Card Services. If it has been released, all local data
- * structures are freed. Otherwise, the structures will be freed
- * when the device is released.
- */
-static void netwave_detach(struct pcmcia_device *link)
-{
- struct net_device *dev = link->priv;
-
- DEBUG(0, "netwave_detach(0x%p)\n", link);
-
- netwave_release(link);
-
- if (link->dev_node)
- unregister_netdev(dev);
-
- free_netdev(dev);
-} /* netwave_detach */
-
-/*
- * Wireless Handler : get protocol name
- */
-static int netwave_get_name(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- strcpy(wrqu->name, "Netwave");
- return 0;
-}
-
-/*
- * Wireless Handler : set Network ID
- */
-static int netwave_set_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long flags;
- unsigned int iobase = dev->base_addr;
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&priv->spinlock, flags);
-
- if(!wrqu->nwid.disabled) {
- domain = wrqu->nwid.value;
- printk( KERN_DEBUG "Setting domain to 0x%x%02x\n",
- (domain >> 8) & 0x01, domain & 0xff);
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
- writeb( domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
- writeb((domain >>8 ) & 0x01,ramBase + NETWAVE_EREG_CB+2);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
- }
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&priv->spinlock, flags);
-
- return 0;
-}
-
-/*
- * Wireless Handler : get Network ID
- */
-static int netwave_get_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- wrqu->nwid.value = domain;
- wrqu->nwid.disabled = 0;
- wrqu->nwid.fixed = 1;
- return 0;
-}
-
-/*
- * Wireless Handler : set scramble key
- */
-static int netwave_set_scramble(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *key)
-{
- unsigned long flags;
- unsigned int iobase = dev->base_addr;
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&priv->spinlock, flags);
-
- scramble_key = (key[0] << 8) | key[1];
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
- writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
- writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&priv->spinlock, flags);
-
- return 0;
-}
-
-/*
- * Wireless Handler : get scramble key
- */
-static int netwave_get_scramble(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *key)
-{
- key[1] = scramble_key & 0xff;
- key[0] = (scramble_key>>8) & 0xff;
- wrqu->encoding.flags = IW_ENCODE_ENABLED;
- wrqu->encoding.length = 2;
- return 0;
-}
-
-/*
- * Wireless Handler : get mode
- */
-static int netwave_get_mode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- if(domain & 0x100)
- wrqu->mode = IW_MODE_INFRA;
- else
- wrqu->mode = IW_MODE_ADHOC;
-
- return 0;
-}
-
-/*
- * Wireless Handler : get range info
- */
-static int netwave_get_range(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- struct iw_range *range = (struct iw_range *) extra;
- int ret = 0;
-
- /* Set the length (very important for backward compatibility) */
- wrqu->data.length = sizeof(struct iw_range);
-
- /* Set all the info we don't care or don't know about to zero */
- memset(range, 0, sizeof(struct iw_range));
-
- /* Set the Wireless Extension versions */
- range->we_version_compiled = WIRELESS_EXT;
- range->we_version_source = 9; /* Nothing for us in v10 and v11 */
-
- /* Set information in the range struct */
- range->throughput = 450 * 1000; /* don't argue on this ! */
- range->min_nwid = 0x0000;
- range->max_nwid = 0x01FF;
-
- range->num_channels = range->num_frequency = 0;
-
- range->sensitivity = 0x3F;
- range->max_qual.qual = 255;
- range->max_qual.level = 255;
- range->max_qual.noise = 0;
-
- range->num_bitrates = 1;
- range->bitrate[0] = 1000000; /* 1 Mb/s */
-
- range->encoding_size[0] = 2; /* 16 bits scrambling */
- range->num_encoding_sizes = 1;
- range->max_encoding_tokens = 1; /* Only one key possible */
-
- return ret;
-}
-
-/*
- * Wireless Private Handler : get snapshot
- */
-static int netwave_get_snap(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long flags;
- unsigned int iobase = dev->base_addr;
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&priv->spinlock, flags);
-
- /* Take snapshot of environment */
- netwave_snapshot( priv, ramBase, iobase);
- wrqu->data.length = priv->nss.length;
- memcpy(extra, (u_char *) &priv->nss, sizeof( struct site_survey));
-
- priv->lastExec = jiffies;
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&priv->spinlock, flags);
-
- return(0);
-}
-
-/*
- * Structures to export the Wireless Handlers
- * This is the stuff that are treated the wireless extensions (iwconfig)
- */
-
-static const struct iw_priv_args netwave_private_args[] = {
-/*{ cmd, set_args, get_args, name } */
- { SIOCGIPSNAP, 0,
- IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof(struct site_survey),
- "getsitesurvey" },
-};
-
-static const iw_handler netwave_handler[] =
-{
- NULL, /* SIOCSIWNAME */
- netwave_get_name, /* SIOCGIWNAME */
- netwave_set_nwid, /* SIOCSIWNWID */
- netwave_get_nwid, /* SIOCGIWNWID */
- NULL, /* SIOCSIWFREQ */
- NULL, /* SIOCGIWFREQ */
- NULL, /* SIOCSIWMODE */
- netwave_get_mode, /* SIOCGIWMODE */
- NULL, /* SIOCSIWSENS */
- NULL, /* SIOCGIWSENS */
- NULL, /* SIOCSIWRANGE */
- netwave_get_range, /* SIOCGIWRANGE */
- NULL, /* SIOCSIWPRIV */
- NULL, /* SIOCGIWPRIV */
- NULL, /* SIOCSIWSTATS */
- NULL, /* SIOCGIWSTATS */
- NULL, /* SIOCSIWSPY */
- NULL, /* SIOCGIWSPY */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWAP */
- NULL, /* SIOCGIWAP */
- NULL, /* -- hole -- */
- NULL, /* SIOCGIWAPLIST */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWESSID */
- NULL, /* SIOCGIWESSID */
- NULL, /* SIOCSIWNICKN */
- NULL, /* SIOCGIWNICKN */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWRATE */
- NULL, /* SIOCGIWRATE */
- NULL, /* SIOCSIWRTS */
- NULL, /* SIOCGIWRTS */
- NULL, /* SIOCSIWFRAG */
- NULL, /* SIOCGIWFRAG */
- NULL, /* SIOCSIWTXPOW */
- NULL, /* SIOCGIWTXPOW */
- NULL, /* SIOCSIWRETRY */
- NULL, /* SIOCGIWRETRY */
- netwave_set_scramble, /* SIOCSIWENCODE */
- netwave_get_scramble, /* SIOCGIWENCODE */
-};
-
-static const iw_handler netwave_private_handler[] =
-{
- NULL, /* SIOCIWFIRSTPRIV */
- netwave_get_snap, /* SIOCIWFIRSTPRIV + 1 */
-};
-
-static const struct iw_handler_def netwave_handler_def =
-{
- .num_standard = ARRAY_SIZE(netwave_handler),
- .num_private = ARRAY_SIZE(netwave_private_handler),
- .num_private_args = ARRAY_SIZE(netwave_private_args),
- .standard = (iw_handler *) netwave_handler,
- .private = (iw_handler *) netwave_private_handler,
- .private_args = (struct iw_priv_args *) netwave_private_args,
- .get_wireless_stats = netwave_get_wireless_stats,
-};
-
-/*
- * Function netwave_pcmcia_config (link)
- *
- * netwave_pcmcia_config() is scheduled to run after a CARD_INSERTION
- * event is received, to configure the PCMCIA socket, and to make the
- * device available to the system.
- *
- */
-
-#define CS_CHECK(fn, ret) \
-do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
-
-static int netwave_pcmcia_config(struct pcmcia_device *link) {
- struct net_device *dev = link->priv;
- netwave_private *priv = netdev_priv(dev);
- int i, j, last_ret, last_fn;
- win_req_t req;
- memreq_t mem;
- u_char __iomem *ramBase = NULL;
-
- DEBUG(0, "netwave_pcmcia_config(0x%p)\n", link);
-
- /*
- * Try allocating IO ports. This tries a few fixed addresses.
- * If you want, you can also read the card's config table to
- * pick addresses -- see the serial driver for an example.
- */
- for (i = j = 0x0; j < 0x400; j += 0x20) {
- link->io.BasePort1 = j ^ 0x300;
- i = pcmcia_request_io(link, &link->io);
- if (i == 0)
- break;
- }
- if (i != 0) {
- cs_error(link, RequestIO, i);
- goto failed;
- }
-
- /*
- * Now allocate an interrupt line. Note that this does not
- * actually assign a handler to the interrupt.
- */
- CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
-
- /*
- * This actually configures the PCMCIA socket -- setting up
- * the I/O windows and the interrupt mapping.
- */
- CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
-
- /*
- * Allocate a 32K memory window. Note that the struct pcmcia_device
- * structure provides space for one window handle -- if your
- * device needs several windows, you'll need to keep track of
- * the handles in your private data structure, dev->priv.
- */
- DEBUG(1, "Setting mem speed of %d\n", mem_speed);
-
- req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_CM|WIN_ENABLE;
- req.Base = 0; req.Size = 0x8000;
- req.AccessSpeed = mem_speed;
- CS_CHECK(RequestWindow, pcmcia_request_window(&link, &req, &link->win));
- mem.CardOffset = 0x20000; mem.Page = 0;
- CS_CHECK(MapMemPage, pcmcia_map_mem_page(link->win, &mem));
-
- /* Store base address of the common window frame */
- ramBase = ioremap(req.Base, 0x8000);
- priv->ramBase = ramBase;
-
- dev->irq = link->irq.AssignedIRQ;
- dev->base_addr = link->io.BasePort1;
- SET_NETDEV_DEV(dev, &handle_to_dev(link));
-
- if (register_netdev(dev) != 0) {
- printk(KERN_DEBUG "netwave_cs: register_netdev() failed\n");
- goto failed;
- }
-
- strcpy(priv->node.dev_name, dev->name);
- link->dev_node = &priv->node;
-
- /* Reset card before reading physical address */
- netwave_doreset(dev->base_addr, ramBase);
-
- /* Read the ethernet address and fill in the Netwave registers. */
- for (i = 0; i < 6; i++)
- dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i);
-
- printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, "
- "id %c%c, hw_addr %pM\n",
- dev->name, dev->base_addr, dev->irq,
- (u_long) ramBase,
- (int) readb(ramBase+NETWAVE_EREG_NI),
- (int) readb(ramBase+NETWAVE_EREG_NI+1),
- dev->dev_addr);
-
- /* get revision words */
- printk(KERN_DEBUG "Netwave_reset: revision %04x %04x\n",
- get_uint16(ramBase + NETWAVE_EREG_ARW),
- get_uint16(ramBase + NETWAVE_EREG_ARW+2));
- return 0;
-
-cs_failed:
- cs_error(link, last_fn, last_ret);
-failed:
- netwave_release(link);
- return -ENODEV;
-} /* netwave_pcmcia_config */
-
-/*
- * Function netwave_release (arg)
- *
- * After a card is removed, netwave_release() will unregister the net
- * device, and release the PCMCIA configuration. If the device is
- * still open, this will be postponed until it is closed.
- */
-static void netwave_release(struct pcmcia_device *link)
-{
- struct net_device *dev = link->priv;
- netwave_private *priv = netdev_priv(dev);
-
- DEBUG(0, "netwave_release(0x%p)\n", link);
-
- pcmcia_disable_device(link);
- if (link->win)
- iounmap(priv->ramBase);
-}
-
-static int netwave_suspend(struct pcmcia_device *link)
-{
- struct net_device *dev = link->priv;
-
- if (link->open)
- netif_device_detach(dev);
-
- return 0;
-}
-
-static int netwave_resume(struct pcmcia_device *link)
-{
- struct net_device *dev = link->priv;
-
- if (link->open) {
- netwave_reset(dev);
- netif_device_attach(dev);
- }
-
- return 0;
-}
-
-
-/*
- * Function netwave_doreset (ioBase, ramBase)
- *
- * Proper hardware reset of the card.
- */
-static void netwave_doreset(unsigned int ioBase, u_char __iomem *ramBase)
-{
- /* Reset card */
- wait_WOC(ioBase);
- outb(0x80, ioBase + NETWAVE_REG_PMR);
- writeb(0x08, ramBase + NETWAVE_EREG_ASCC); /* Bit 3 is WOC */
- outb(0x0, ioBase + NETWAVE_REG_PMR); /* release reset */
-}
-
-/*
- * Function netwave_reset (dev)
- *
- * Reset and restore all of the netwave registers
- */
-static void netwave_reset(struct net_device *dev) {
- /* u_char state; */
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
- unsigned int iobase = dev->base_addr;
-
- DEBUG(0, "netwave_reset: Done with hardware reset\n");
-
- priv->timeoutCounter = 0;
-
- /* Reset card */
- netwave_doreset(iobase, ramBase);
- printk(KERN_DEBUG "netwave_reset: Done with hardware reset\n");
-
- /* Write a NOP to check the card */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_NOP, ramBase + NETWAVE_EREG_CB + 0);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
-
- /* Set receive conf */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
- writeb(rxConfRxEna + rxConfBcast, ramBase + NETWAVE_EREG_CB + 1);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
-
- /* Set transmit conf */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_STC, ramBase + NETWAVE_EREG_CB + 0);
- writeb(txConfTxEna, ramBase + NETWAVE_EREG_CB + 1);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
-
- /* Now set the MU Domain */
- printk(KERN_DEBUG "Setting domain to 0x%x%02x\n", (domain >> 8) & 0x01, domain & 0xff);
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
- writeb(domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
- writeb((domain>>8) & 0x01, ramBase + NETWAVE_EREG_CB + 2);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
-
- /* Set scramble key */
- printk(KERN_DEBUG "Setting scramble key to 0x%x\n", scramble_key);
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
- writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
- writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
-
- /* Enable interrupts, bit 4 high to keep unused
- * source from interrupting us, bit 2 high to
- * set interrupt enable, 567 to enable TxDN,
- * RxErr and RxRdy
- */
- wait_WOC(iobase);
- outb(imrConfIENA+imrConfRFU1, iobase + NETWAVE_REG_IMR);
-
- /* Hent 4 bytes fra 0x170. Skal vaere 0a,29,88,36
- * waitWOC
- * skriv 80 til d000:3688
- * sjekk om det ble 80
- */
-
- /* Enable Receiver */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_ER, ramBase + NETWAVE_EREG_CB + 0);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
-
- /* Set the IENA bit in COR */
- wait_WOC(iobase);
- outb(corConfIENA + corConfLVLREQ, iobase + NETWAVE_REG_COR);
-}
-
-/*
- * Function netwave_hw_xmit (data, len, dev)
- */
-static int netwave_hw_xmit(unsigned char* data, int len,
- struct net_device* dev) {
- unsigned long flags;
- unsigned int TxFreeList,
- curBuff,
- MaxData,
- DataOffset;
- int tmpcount;
-
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem * ramBase = priv->ramBase;
- unsigned int iobase = dev->base_addr;
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&priv->spinlock, flags);
-
- /* Check if there are transmit buffers available */
- wait_WOC(iobase);
- if ((inb(iobase+NETWAVE_REG_ASR) & NETWAVE_ASR_TXBA) == 0) {
- /* No buffers available */
- printk(KERN_DEBUG "netwave_hw_xmit: %s - no xmit buffers available.\n",
- dev->name);
- spin_unlock_irqrestore(&priv->spinlock, flags);
- return 1;
- }
-
- dev->stats.tx_bytes += len;
-
- DEBUG(3, "Transmitting with SPCQ %x SPU %x LIF %x ISPLQ %x\n",
- readb(ramBase + NETWAVE_EREG_SPCQ),
- readb(ramBase + NETWAVE_EREG_SPU),
- readb(ramBase + NETWAVE_EREG_LIF),
- readb(ramBase + NETWAVE_EREG_ISPLQ));
-
- /* Now try to insert it into the adapters free memory */
- wait_WOC(iobase);
- TxFreeList = get_uint16(ramBase + NETWAVE_EREG_TDP);
- MaxData = get_uint16(ramBase + NETWAVE_EREG_TDP+2);
- DataOffset = get_uint16(ramBase + NETWAVE_EREG_TDP+4);
-
- DEBUG(3, "TxFreeList %x, MaxData %x, DataOffset %x\n",
- TxFreeList, MaxData, DataOffset);
-
- /* Copy packet to the adapter fragment buffers */
- curBuff = TxFreeList;
- tmpcount = 0;
- while (tmpcount < len) {
- int tmplen = len - tmpcount;
- copy_to_pc(ramBase + curBuff + DataOffset, data + tmpcount,
- (tmplen < MaxData) ? tmplen : MaxData);
- tmpcount += MaxData;
-
- /* Advance to next buffer */
- curBuff = get_uint16(ramBase + curBuff);
- }
-
- /* Now issue transmit list */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_TL, ramBase + NETWAVE_EREG_CB + 0);
- writeb(len & 0xff, ramBase + NETWAVE_EREG_CB + 1);
- writeb((len>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
-
- spin_unlock_irqrestore(&priv->spinlock, flags);
- return 0;
-}
-
-static netdev_tx_t netwave_start_xmit(struct sk_buff *skb,
- struct net_device *dev) {
- /* This flag indicate that the hardware can't perform a transmission.
- * Theoritically, NET3 check it before sending a packet to the driver,
- * but in fact it never do that and pool continuously.
- * As the watchdog will abort too long transmissions, we are quite safe...
- */
-
- netif_stop_queue(dev);
-
- {
- short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
- unsigned char* buf = skb->data;
-
- if (netwave_hw_xmit( buf, length, dev) == 1) {
- /* Some error, let's make them call us another time? */
- netif_start_queue(dev);
- }
- dev->trans_start = jiffies;
- }
- dev_kfree_skb(skb);
-
- return NETDEV_TX_OK;
-} /* netwave_start_xmit */
-
-/*
- * Function netwave_interrupt (irq, dev_id)
- *
- * This function is the interrupt handler for the Netwave card. This
- * routine will be called whenever:
- * 1. A packet is received.
- * 2. A packet has successfully been transferred and the unit is
- * ready to transmit another packet.
- * 3. A command has completed execution.
- */
-static irqreturn_t netwave_interrupt(int irq, void* dev_id)
-{
- unsigned int iobase;
- u_char __iomem *ramBase;
- struct net_device *dev = (struct net_device *)dev_id;
- struct netwave_private *priv = netdev_priv(dev);
- struct pcmcia_device *link = priv->p_dev;
- int i;
-
- if (!netif_device_present(dev))
- return IRQ_NONE;
-
- iobase = dev->base_addr;
- ramBase = priv->ramBase;
-
- /* Now find what caused the interrupt, check while interrupts ready */
- for (i = 0; i < 10; i++) {
- u_char status;
-
- wait_WOC(iobase);
- if (!(inb(iobase+NETWAVE_REG_CCSR) & 0x02))
- break; /* None of the interrupt sources asserted (normal exit) */
-
- status = inb(iobase + NETWAVE_REG_ASR);
-
- if (!pcmcia_dev_present(link)) {
- DEBUG(1, "netwave_interrupt: Interrupt with status 0x%x "
- "from removed or suspended card!\n", status);
- break;
- }
-
- /* RxRdy */
- if (status & 0x80) {
- netwave_rx(dev);
- /* wait_WOC(iobase); */
- /* RxRdy cannot be reset directly by the host */
- }
- /* RxErr */
- if (status & 0x40) {
- u_char rser;
-
- rser = readb(ramBase + NETWAVE_EREG_RSER);
-
- if (rser & 0x04) {
- ++dev->stats.rx_dropped;
- ++dev->stats.rx_crc_errors;
- }
- if (rser & 0x02)
- ++dev->stats.rx_frame_errors;
-
- /* Clear the RxErr bit in RSER. RSER+4 is the
- * write part. Also clear the RxCRC (0x04) and
- * RxBig (0x02) bits if present */
- wait_WOC(iobase);
- writeb(0x40 | (rser & 0x06), ramBase + NETWAVE_EREG_RSER + 4);
-
- /* Write bit 6 high to ASCC to clear RxErr in ASR,
- * WOC must be set first!
- */
- wait_WOC(iobase);
- writeb(0x40, ramBase + NETWAVE_EREG_ASCC);
-
- /* Remember to count up dev->stats on error packets */
- ++dev->stats.rx_errors;
- }
- /* TxDN */
- if (status & 0x20) {
- int txStatus;
-
- txStatus = readb(ramBase + NETWAVE_EREG_TSER);
- DEBUG(3, "Transmit done. TSER = %x id %x\n",
- txStatus, readb(ramBase + NETWAVE_EREG_TSER + 1));
-
- if (txStatus & 0x20) {
- /* Transmitting was okay, clear bits */
- wait_WOC(iobase);
- writeb(0x2f, ramBase + NETWAVE_EREG_TSER + 4);
- ++dev->stats.tx_packets;
- }
-
- if (txStatus & 0xd0) {
- if (txStatus & 0x80) {
- ++dev->stats.collisions; /* Because of /proc/net/dev*/
- /* ++dev->stats.tx_aborted_errors; */
- /* printk("Collision. %ld\n", jiffies - dev->trans_start); */
- }
- if (txStatus & 0x40)
- ++dev->stats.tx_carrier_errors;
- /* 0x80 TxGU Transmit giveup - nine times and no luck
- * 0x40 TxNOAP No access point. Discarded packet.
- * 0x10 TxErr Transmit error. Always set when
- * TxGU and TxNOAP is set. (Those are the only ones
- * to set TxErr).
- */
- DEBUG(3, "netwave_interrupt: TxDN with error status %x\n",
- txStatus);
-
- /* Clear out TxGU, TxNOAP, TxErr and TxTrys */
- wait_WOC(iobase);
- writeb(0xdf & txStatus, ramBase+NETWAVE_EREG_TSER+4);
- ++dev->stats.tx_errors;
- }
- DEBUG(3, "New status is TSER %x ASR %x\n",
- readb(ramBase + NETWAVE_EREG_TSER),
- inb(iobase + NETWAVE_REG_ASR));
-
- netif_wake_queue(dev);
- }
- /* TxBA, this would trigger on all error packets received */
- /* if (status & 0x01) {
- DEBUG(4, "Transmit buffers available, %x\n", status);
- }
- */
- }
- /* Handled if we looped at least one time - Jean II */
- return IRQ_RETVAL(i);
-} /* netwave_interrupt */
-
-/*
- * Function netwave_watchdog (a)
- *
- * Watchdog : when we start a transmission, we set a timer in the
- * kernel. If the transmission complete, this timer is disabled. If
- * it expire, we reset the card.
- *
- */
-static void netwave_watchdog(struct net_device *dev) {
-
- DEBUG(1, "%s: netwave_watchdog: watchdog timer expired\n", dev->name);
- netwave_reset(dev);
- dev->trans_start = jiffies;
- netif_wake_queue(dev);
-} /* netwave_watchdog */
-
-static int netwave_rx(struct net_device *dev)
-{
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem *ramBase = priv->ramBase;
- unsigned int iobase = dev->base_addr;
- u_char rxStatus;
- struct sk_buff *skb = NULL;
- unsigned int curBuffer,
- rcvList;
- int rcvLen;
- int tmpcount = 0;
- int dataCount, dataOffset;
- int i;
- u_char *ptr;
-
- DEBUG(3, "xinw_rx: Receiving ... \n");
-
- /* Receive max 10 packets for now. */
- for (i = 0; i < 10; i++) {
- /* Any packets? */
- wait_WOC(iobase);
- rxStatus = readb(ramBase + NETWAVE_EREG_RSER);
- if ( !( rxStatus & 0x80)) /* No more packets */
- break;
-
- /* Check if multicast/broadcast or other */
- /* multicast = (rxStatus & 0x20); */
-
- /* The receive list pointer and length of the packet */
- wait_WOC(iobase);
- rcvLen = get_int16( ramBase + NETWAVE_EREG_RDP);
- rcvList = get_uint16( ramBase + NETWAVE_EREG_RDP + 2);
-
- if (rcvLen < 0) {
- printk(KERN_DEBUG "netwave_rx: Receive packet with len %d\n",
- rcvLen);
- return 0;
- }
-
- skb = dev_alloc_skb(rcvLen+5);
- if (skb == NULL) {
- DEBUG(1, "netwave_rx: Could not allocate an sk_buff of "
- "length %d\n", rcvLen);
- ++dev->stats.rx_dropped;
- /* Tell the adapter to skip the packet */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
- return 0;
- }
-
- skb_reserve( skb, 2); /* Align IP on 16 byte */
- skb_put( skb, rcvLen);
-
- /* Copy packet fragments to the skb data area */
- ptr = (u_char*) skb->data;
- curBuffer = rcvList;
- tmpcount = 0;
- while ( tmpcount < rcvLen) {
- /* Get length and offset of current buffer */
- dataCount = get_uint16( ramBase+curBuffer+2);
- dataOffset = get_uint16( ramBase+curBuffer+4);
-
- copy_from_pc( ptr + tmpcount,
- ramBase+curBuffer+dataOffset, dataCount);
-
- tmpcount += dataCount;
-
- /* Point to next buffer */
- curBuffer = get_uint16(ramBase + curBuffer);
- }
-
- skb->protocol = eth_type_trans(skb,dev);
- /* Queue packet for network layer */
- netif_rx(skb);
-
- dev->stats.rx_packets++;
- dev->stats.rx_bytes += rcvLen;
-
- /* Got the packet, tell the adapter to skip it */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
- DEBUG(3, "Packet reception ok\n");
- }
- return 0;
-}
-
-static int netwave_open(struct net_device *dev) {
- netwave_private *priv = netdev_priv(dev);
- struct pcmcia_device *link = priv->p_dev;
-
- DEBUG(1, "netwave_open: starting.\n");
-
- if (!pcmcia_dev_present(link))
- return -ENODEV;
-
- link->open++;
-
- netif_start_queue(dev);
- netwave_reset(dev);
-
- return 0;
-}
-
-static int netwave_close(struct net_device *dev) {
- netwave_private *priv = netdev_priv(dev);
- struct pcmcia_device *link = priv->p_dev;
-
- DEBUG(1, "netwave_close: finishing.\n");
-
- link->open--;
- netif_stop_queue(dev);
-
- return 0;
-}
-
-static struct pcmcia_device_id netwave_ids[] = {
- PCMCIA_DEVICE_PROD_ID12("Xircom", "CreditCard Netwave", 0x2e3ee845, 0x54e28a28),
- PCMCIA_DEVICE_NULL,
-};
-MODULE_DEVICE_TABLE(pcmcia, netwave_ids);
-
-static struct pcmcia_driver netwave_driver = {
- .owner = THIS_MODULE,
- .drv = {
- .name = "netwave_cs",
- },
- .probe = netwave_probe,
- .remove = netwave_detach,
- .id_table = netwave_ids,
- .suspend = netwave_suspend,
- .resume = netwave_resume,
-};
-
-static int __init init_netwave_cs(void)
-{
- return pcmcia_register_driver(&netwave_driver);
-}
-
-static void __exit exit_netwave_cs(void)
-{
- pcmcia_unregister_driver(&netwave_driver);
-}
-
-module_init(init_netwave_cs);
-module_exit(exit_netwave_cs);
-
-/* Set or clear the multicast filter for this adaptor.
- num_addrs == -1 Promiscuous mode, receive all packets
- num_addrs == 0 Normal mode, clear multicast list
- num_addrs > 0 Multicast mode, receive normal and MC packets, and do
- best-effort filtering.
- */
-static void set_multicast_list(struct net_device *dev)
-{
- unsigned int iobase = dev->base_addr;
- netwave_private *priv = netdev_priv(dev);
- u_char __iomem * ramBase = priv->ramBase;
- u_char rcvMode = 0;
-
-#ifdef PCMCIA_DEBUG
- if (pc_debug > 2) {
- static int old;
- if (old != dev->mc_count) {
- old = dev->mc_count;
- DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
- dev->name, dev->mc_count);
- }
- }
-#endif
-
- if (dev->mc_count || (dev->flags & IFF_ALLMULTI)) {
- /* Multicast Mode */
- rcvMode = rxConfRxEna + rxConfAMP + rxConfBcast;
- } else if (dev->flags & IFF_PROMISC) {
- /* Promiscous mode */
- rcvMode = rxConfRxEna + rxConfPro + rxConfAMP + rxConfBcast;
- } else {
- /* Normal mode */
- rcvMode = rxConfRxEna + rxConfBcast;
- }
-
- /* printk("netwave set_multicast_list: rcvMode to %x\n", rcvMode);*/
- /* Now set receive mode */
- wait_WOC(iobase);
- writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
- writeb(rcvMode, ramBase + NETWAVE_EREG_CB + 1);
- writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
-}
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/orinoco/Kconfig b/drivers/net/wireless/orinoco/Kconfig
index dce652054af..e2a2c18920a 100644
--- a/drivers/net/wireless/orinoco/Kconfig
+++ b/drivers/net/wireless/orinoco/Kconfig
@@ -1,6 +1,6 @@
config HERMES
tristate "Hermes chipset 802.11b support (Orinoco/Prism2/Symbol)"
- depends on (PPC_PMAC || PCI || PCMCIA) && WLAN_80211
+ depends on (PPC_PMAC || PCI || PCMCIA)
depends on CFG80211 && CFG80211_WEXT
select WIRELESS_EXT
select WEXT_SPY
diff --git a/drivers/net/wireless/p54/Kconfig b/drivers/net/wireless/p54/Kconfig
index b45d6a4ed1e..b0342a520bf 100644
--- a/drivers/net/wireless/p54/Kconfig
+++ b/drivers/net/wireless/p54/Kconfig
@@ -1,6 +1,6 @@
config P54_COMMON
tristate "Softmac Prism54 support"
- depends on MAC80211 && WLAN_80211 && EXPERIMENTAL
+ depends on MAC80211 && EXPERIMENTAL
select FW_LOADER
---help---
This is common code for isl38xx/stlc45xx based modules.
diff --git a/drivers/net/wireless/p54/eeprom.c b/drivers/net/wireless/p54/eeprom.c
index 0efe67deede..8e3818f6832 100644
--- a/drivers/net/wireless/p54/eeprom.c
+++ b/drivers/net/wireless/p54/eeprom.c
@@ -126,7 +126,7 @@ static int p54_generate_band(struct ieee80211_hw *dev,
int ret = -ENOMEM;
if ((!list->entries) || (!list->band_channel_num[band]))
- return 0;
+ return -EINVAL;
tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
if (!tmp)
@@ -158,6 +158,7 @@ static int p54_generate_band(struct ieee80211_hw *dev,
(list->channels[i].data & CHAN_HAS_CURVE ? "" :
" [curve data]"),
list->channels[i].index, list->channels[i].freq);
+ continue;
}
tmp->channels[j].band = list->channels[i].band;
@@ -165,7 +166,16 @@ static int p54_generate_band(struct ieee80211_hw *dev,
j++;
}
- tmp->n_channels = list->band_channel_num[band];
+ if (j == 0) {
+ printk(KERN_ERR "%s: Disabling totally damaged %s band.\n",
+ wiphy_name(dev->wiphy), (band == IEEE80211_BAND_2GHZ) ?
+ "2 GHz" : "5 GHz");
+
+ ret = -ENODATA;
+ goto err_out;
+ }
+
+ tmp->n_channels = j;
old = priv->band_table[band];
priv->band_table[band] = tmp;
if (old) {
@@ -228,13 +238,13 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
struct p54_common *priv = dev->priv;
struct p54_channel_list *list;
unsigned int i, j, max_channel_num;
- int ret = -ENOMEM;
+ int ret = 0;
u16 freq;
if ((priv->iq_autocal_len != priv->curve_data->entries) ||
(priv->iq_autocal_len != priv->output_limit->entries))
- printk(KERN_ERR "%s: EEPROM is damaged... you may not be able"
- "to use all channels with this device.\n",
+ printk(KERN_ERR "%s: Unsupported or damaged EEPROM detected. "
+ "You may not be able to use all channels.\n",
wiphy_name(dev->wiphy));
max_channel_num = max_t(unsigned int, priv->output_limit->entries,
@@ -243,8 +253,10 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
priv->curve_data->entries);
list = kzalloc(sizeof(*list), GFP_KERNEL);
- if (!list)
+ if (!list) {
+ ret = -ENOMEM;
goto free;
+ }
list->max_entries = max_channel_num;
list->channels = kzalloc(sizeof(struct p54_channel_entry) *
@@ -282,13 +294,8 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
p54_compare_channels, NULL);
for (i = 0, j = 0; i < IEEE80211_NUM_BANDS; i++) {
- if (list->band_channel_num[i]) {
- ret = p54_generate_band(dev, list, i);
- if (ret)
- goto free;
-
+ if (p54_generate_band(dev, list, i) == 0)
j++;
- }
}
if (j == 0) {
/* no useable band available. */
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index 390c0c7b3ac..bf60689aaab 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -1,6 +1,6 @@
menuconfig RT2X00
tristate "Ralink driver support"
- depends on MAC80211 && WLAN_80211
+ depends on MAC80211
---help---
This will enable the support for the Ralink drivers,
developed in the rt2x00 project <http://rt2x00.serialmonkey.com>.
@@ -64,8 +64,9 @@ config RT2800PCI_SOC
default y
config RT2800PCI
- tristate "Ralink rt2800 (PCI/PCMCIA) support"
+ tristate "Ralink rt2800 (PCI/PCMCIA) support (VERY EXPERIMENTAL)"
depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL
+ select RT2800_LIB
select RT2X00_LIB_PCI if RT2800PCI_PCI
select RT2X00_LIB_SOC if RT2800PCI_SOC
select RT2X00_LIB_HT
@@ -77,6 +78,9 @@ config RT2800PCI
This adds support for rt2800 wireless chipset family.
Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890 & RT3052
+ This driver is non-functional at the moment and is intended for
+ developers.
+
When compiled as a module, this driver will be called "rt2800pci.ko".
config RT2500USB
@@ -104,8 +108,9 @@ config RT73USB
When compiled as a module, this driver will be called rt73usb.
config RT2800USB
- tristate "Ralink rt2800 (USB) support"
+ tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)"
depends on USB && EXPERIMENTAL
+ select RT2800_LIB
select RT2X00_LIB_USB
select RT2X00_LIB_HT
select RT2X00_LIB_FIRMWARE
@@ -115,8 +120,15 @@ config RT2800USB
This adds experimental support for rt2800 wireless chipset family.
Supported chips: RT2770, RT2870 & RT3070.
+ Known issues:
+ - support for RT2870 chips doesn't work with 802.11n APs yet
+ - support for RT3070 chips is non-functional at the moment
+
When compiled as a module, this driver will be called "rt2800usb.ko".
+config RT2800_LIB
+ tristate
+
config RT2X00_LIB_PCI
tristate
select RT2X00_LIB
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile
index 912f5f67e15..97133985829 100644
--- a/drivers/net/wireless/rt2x00/Makefile
+++ b/drivers/net/wireless/rt2x00/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o
obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o
obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o
+obj-$(CONFIG_RT2800_LIB) += rt2800lib.o
obj-$(CONFIG_RT2400PCI) += rt2400pci.o
obj-$(CONFIG_RT2500PCI) += rt2500pci.o
obj-$(CONFIG_RT61PCI) += rt61pci.o
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
new file mode 100644
index 00000000000..d9b6a72e6d2
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -0,0 +1,1816 @@
+/*
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the
+ Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/*
+ Module: rt2800
+ Abstract: Data structures and registers for the rt2800 modules.
+ Supported chipsets: RT2800E, RT2800ED & RT2800U.
+ */
+
+#ifndef RT2800_H
+#define RT2800_H
+
+/*
+ * RF chip defines.
+ *
+ * RF2820 2.4G 2T3R
+ * RF2850 2.4G/5G 2T3R
+ * RF2720 2.4G 1T2R
+ * RF2750 2.4G/5G 1T2R
+ * RF3020 2.4G 1T1R
+ * RF2020 2.4G B/G
+ * RF3021 2.4G 1T2R
+ * RF3022 2.4G 2T2R
+ * RF3052 2.4G 2T2R
+ */
+#define RF2820 0x0001
+#define RF2850 0x0002
+#define RF2720 0x0003
+#define RF2750 0x0004
+#define RF3020 0x0005
+#define RF2020 0x0006
+#define RF3021 0x0007
+#define RF3022 0x0008
+#define RF3052 0x0009
+
+/*
+ * Chipset version.
+ */
+#define RT2860C_VERSION 0x28600100
+#define RT2860D_VERSION 0x28600101
+#define RT2880E_VERSION 0x28720200
+#define RT2883_VERSION 0x28830300
+#define RT3070_VERSION 0x30700200
+
+/*
+ * Signal information.
+ * Default offset is required for RSSI <-> dBm conversion.
+ */
+#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
+
+/*
+ * Register layout information.
+ */
+#define CSR_REG_BASE 0x1000
+#define CSR_REG_SIZE 0x0800
+#define EEPROM_BASE 0x0000
+#define EEPROM_SIZE 0x0110
+#define BBP_BASE 0x0000
+#define BBP_SIZE 0x0080
+#define RF_BASE 0x0004
+#define RF_SIZE 0x0010
+
+/*
+ * Number of TX queues.
+ */
+#define NUM_TX_QUEUES 4
+
+/*
+ * USB registers.
+ */
+
+/*
+ * INT_SOURCE_CSR: Interrupt source register.
+ * Write one to clear corresponding bit.
+ * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
+ */
+#define INT_SOURCE_CSR 0x0200
+#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
+#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
+#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
+#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
+#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
+#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
+#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
+#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
+#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
+#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
+#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
+#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
+#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
+#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
+#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
+#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
+#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
+#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
+
+/*
+ * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
+ */
+#define INT_MASK_CSR 0x0204
+#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
+#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
+#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
+#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
+#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
+#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
+#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
+#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
+#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
+#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
+#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
+#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
+#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
+#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
+#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
+#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
+#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
+#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
+
+/*
+ * WPDMA_GLO_CFG
+ */
+#define WPDMA_GLO_CFG 0x0208
+#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
+#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
+#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
+#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
+#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
+#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
+#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
+#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
+#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
+
+/*
+ * WPDMA_RST_IDX
+ */
+#define WPDMA_RST_IDX 0x020c
+#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
+#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
+#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
+#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
+#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
+#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
+#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
+
+/*
+ * DELAY_INT_CFG
+ */
+#define DELAY_INT_CFG 0x0210
+#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
+#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
+#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
+#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
+#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
+#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
+
+/*
+ * WMM_AIFSN_CFG: Aifsn for each EDCA AC
+ * AIFSN0: AC_BE
+ * AIFSN1: AC_BK
+ * AIFSN2: AC_VI
+ * AIFSN3: AC_VO
+ */
+#define WMM_AIFSN_CFG 0x0214
+#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
+#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
+#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
+#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
+
+/*
+ * WMM_CWMIN_CSR: CWmin for each EDCA AC
+ * CWMIN0: AC_BE
+ * CWMIN1: AC_BK
+ * CWMIN2: AC_VI
+ * CWMIN3: AC_VO
+ */
+#define WMM_CWMIN_CFG 0x0218
+#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
+#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
+#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
+#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
+
+/*
+ * WMM_CWMAX_CSR: CWmax for each EDCA AC
+ * CWMAX0: AC_BE
+ * CWMAX1: AC_BK
+ * CWMAX2: AC_VI
+ * CWMAX3: AC_VO
+ */
+#define WMM_CWMAX_CFG 0x021c
+#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
+#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
+#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
+#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
+
+/*
+ * AC_TXOP0: AC_BK/AC_BE TXOP register
+ * AC0TXOP: AC_BK in unit of 32us
+ * AC1TXOP: AC_BE in unit of 32us
+ */
+#define WMM_TXOP0_CFG 0x0220
+#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
+#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
+
+/*
+ * AC_TXOP1: AC_VO/AC_VI TXOP register
+ * AC2TXOP: AC_VI in unit of 32us
+ * AC3TXOP: AC_VO in unit of 32us
+ */
+#define WMM_TXOP1_CFG 0x0224
+#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
+#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
+
+/*
+ * GPIO_CTRL_CFG:
+ */
+#define GPIO_CTRL_CFG 0x0228
+#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
+#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
+#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
+#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
+#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
+#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
+#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
+#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
+#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
+
+/*
+ * MCU_CMD_CFG
+ */
+#define MCU_CMD_CFG 0x022c
+
+/*
+ * AC_BK register offsets
+ */
+#define TX_BASE_PTR0 0x0230
+#define TX_MAX_CNT0 0x0234
+#define TX_CTX_IDX0 0x0238
+#define TX_DTX_IDX0 0x023c
+
+/*
+ * AC_BE register offsets
+ */
+#define TX_BASE_PTR1 0x0240
+#define TX_MAX_CNT1 0x0244
+#define TX_CTX_IDX1 0x0248
+#define TX_DTX_IDX1 0x024c
+
+/*
+ * AC_VI register offsets
+ */
+#define TX_BASE_PTR2 0x0250
+#define TX_MAX_CNT2 0x0254
+#define TX_CTX_IDX2 0x0258
+#define TX_DTX_IDX2 0x025c
+
+/*
+ * AC_VO register offsets
+ */
+#define TX_BASE_PTR3 0x0260
+#define TX_MAX_CNT3 0x0264
+#define TX_CTX_IDX3 0x0268
+#define TX_DTX_IDX3 0x026c
+
+/*
+ * HCCA register offsets
+ */
+#define TX_BASE_PTR4 0x0270
+#define TX_MAX_CNT4 0x0274
+#define TX_CTX_IDX4 0x0278
+#define TX_DTX_IDX4 0x027c
+
+/*
+ * MGMT register offsets
+ */
+#define TX_BASE_PTR5 0x0280
+#define TX_MAX_CNT5 0x0284
+#define TX_CTX_IDX5 0x0288
+#define TX_DTX_IDX5 0x028c
+
+/*
+ * RX register offsets
+ */
+#define RX_BASE_PTR 0x0290
+#define RX_MAX_CNT 0x0294
+#define RX_CRX_IDX 0x0298
+#define RX_DRX_IDX 0x029c
+
+/*
+ * PBF_SYS_CTRL
+ * HOST_RAM_WRITE: enable Host program ram write selection
+ */
+#define PBF_SYS_CTRL 0x0400
+#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
+#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
+
+/*
+ * HOST-MCU shared memory
+ */
+#define HOST_CMD_CSR 0x0404
+#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
+
+/*
+ * PBF registers
+ * Most are for debug. Driver doesn't touch PBF register.
+ */
+#define PBF_CFG 0x0408
+#define PBF_MAX_PCNT 0x040c
+#define PBF_CTRL 0x0410
+#define PBF_INT_STA 0x0414
+#define PBF_INT_ENA 0x0418
+
+/*
+ * BCN_OFFSET0:
+ */
+#define BCN_OFFSET0 0x042c
+#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
+#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
+#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
+#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
+
+/*
+ * BCN_OFFSET1:
+ */
+#define BCN_OFFSET1 0x0430
+#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
+#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
+#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
+#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
+
+/*
+ * PBF registers
+ * Most are for debug. Driver doesn't touch PBF register.
+ */
+#define TXRXQ_PCNT 0x0438
+#define PBF_DBG 0x043c
+
+/*
+ * RF registers
+ */
+#define RF_CSR_CFG 0x0500
+#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
+#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
+#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
+#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
+
+/*
+ * MAC Control/Status Registers(CSR).
+ * Some values are set in TU, whereas 1 TU == 1024 us.
+ */
+
+/*
+ * MAC_CSR0: ASIC revision number.
+ * ASIC_REV: 0
+ * ASIC_VER: 2860 or 2870
+ */
+#define MAC_CSR0 0x1000
+#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
+#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
+
+/*
+ * MAC_SYS_CTRL:
+ */
+#define MAC_SYS_CTRL 0x1004
+#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
+#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
+#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
+#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
+#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
+#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
+#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
+#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
+
+/*
+ * MAC_ADDR_DW0: STA MAC register 0
+ */
+#define MAC_ADDR_DW0 0x1008
+#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
+#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
+#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
+#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
+
+/*
+ * MAC_ADDR_DW1: STA MAC register 1
+ * UNICAST_TO_ME_MASK:
+ * Used to mask off bits from byte 5 of the MAC address
+ * to determine the UNICAST_TO_ME bit for RX frames.
+ * The full mask is complemented by BSS_ID_MASK:
+ * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
+ */
+#define MAC_ADDR_DW1 0x100c
+#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
+#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
+#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
+
+/*
+ * MAC_BSSID_DW0: BSSID register 0
+ */
+#define MAC_BSSID_DW0 0x1010
+#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
+#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
+#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
+#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
+
+/*
+ * MAC_BSSID_DW1: BSSID register 1
+ * BSS_ID_MASK:
+ * 0: 1-BSSID mode (BSS index = 0)
+ * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
+ * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
+ * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
+ * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
+ * BSSID. This will make sure that those bits will be ignored
+ * when determining the MY_BSS of RX frames.
+ */
+#define MAC_BSSID_DW1 0x1014
+#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
+#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
+#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
+#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
+
+/*
+ * MAX_LEN_CFG: Maximum frame length register.
+ * MAX_MPDU: rt2860b max 16k bytes
+ * MAX_PSDU: Maximum PSDU length
+ * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
+ */
+#define MAX_LEN_CFG 0x1018
+#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
+#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
+#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
+#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
+
+/*
+ * BBP_CSR_CFG: BBP serial control register
+ * VALUE: Register value to program into BBP
+ * REG_NUM: Selected BBP register
+ * READ_CONTROL: 0 write BBP, 1 read BBP
+ * BUSY: ASIC is busy executing BBP commands
+ * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
+ * BBP_RW_MODE: 0 serial, 1 paralell
+ */
+#define BBP_CSR_CFG 0x101c
+#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
+#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
+#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
+#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
+#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
+#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
+
+/*
+ * RF_CSR_CFG0: RF control register
+ * REGID_AND_VALUE: Register value to program into RF
+ * BITWIDTH: Selected RF register
+ * STANDBYMODE: 0 high when standby, 1 low when standby
+ * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
+ * BUSY: ASIC is busy executing RF commands
+ */
+#define RF_CSR_CFG0 0x1020
+#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
+#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
+#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
+#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
+#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
+#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
+
+/*
+ * RF_CSR_CFG1: RF control register
+ * REGID_AND_VALUE: Register value to program into RF
+ * RFGAP: Gap between BB_CONTROL_RF and RF_LE
+ * 0: 3 system clock cycle (37.5usec)
+ * 1: 5 system clock cycle (62.5usec)
+ */
+#define RF_CSR_CFG1 0x1024
+#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
+#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
+
+/*
+ * RF_CSR_CFG2: RF control register
+ * VALUE: Register value to program into RF
+ */
+#define RF_CSR_CFG2 0x1028
+#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
+
+/*
+ * LED_CFG: LED control
+ * color LED's:
+ * 0: off
+ * 1: blinking upon TX2
+ * 2: periodic slow blinking
+ * 3: always on
+ * LED polarity:
+ * 0: active low
+ * 1: active high
+ */
+#define LED_CFG 0x102c
+#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
+#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
+#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
+#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
+#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
+#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
+#define LED_CFG_LED_POLAR FIELD32(0x40000000)
+
+/*
+ * XIFS_TIME_CFG: MAC timing
+ * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
+ * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
+ * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
+ * when MAC doesn't reference BBP signal BBRXEND
+ * EIFS: unit 1us
+ * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
+ *
+ */
+#define XIFS_TIME_CFG 0x1100
+#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
+#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
+#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
+#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
+#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
+
+/*
+ * BKOFF_SLOT_CFG:
+ */
+#define BKOFF_SLOT_CFG 0x1104
+#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
+#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
+
+/*
+ * NAV_TIME_CFG:
+ */
+#define NAV_TIME_CFG 0x1108
+#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
+#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
+#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
+#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
+
+/*
+ * CH_TIME_CFG: count as channel busy
+ */
+#define CH_TIME_CFG 0x110c
+
+/*
+ * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
+ */
+#define PBF_LIFE_TIMER 0x1110
+
+/*
+ * BCN_TIME_CFG:
+ * BEACON_INTERVAL: in unit of 1/16 TU
+ * TSF_TICKING: Enable TSF auto counting
+ * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
+ * BEACON_GEN: Enable beacon generator
+ */
+#define BCN_TIME_CFG 0x1114
+#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
+#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
+#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
+#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
+#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
+#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
+
+/*
+ * TBTT_SYNC_CFG:
+ */
+#define TBTT_SYNC_CFG 0x1118
+
+/*
+ * TSF_TIMER_DW0: Local lsb TSF timer, read-only
+ */
+#define TSF_TIMER_DW0 0x111c
+#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
+
+/*
+ * TSF_TIMER_DW1: Local msb TSF timer, read-only
+ */
+#define TSF_TIMER_DW1 0x1120
+#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
+
+/*
+ * TBTT_TIMER: TImer remains till next TBTT, read-only
+ */
+#define TBTT_TIMER 0x1124
+
+/*
+ * INT_TIMER_CFG:
+ */
+#define INT_TIMER_CFG 0x1128
+
+/*
+ * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
+ */
+#define INT_TIMER_EN 0x112c
+
+/*
+ * CH_IDLE_STA: channel idle time
+ */
+#define CH_IDLE_STA 0x1130
+
+/*
+ * CH_BUSY_STA: channel busy time
+ */
+#define CH_BUSY_STA 0x1134
+
+/*
+ * MAC_STATUS_CFG:
+ * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
+ * if 1 or higher one of the 2 registers is busy.
+ */
+#define MAC_STATUS_CFG 0x1200
+#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
+
+/*
+ * PWR_PIN_CFG:
+ */
+#define PWR_PIN_CFG 0x1204
+
+/*
+ * AUTOWAKEUP_CFG: Manual power control / status register
+ * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
+ * AUTOWAKE: 0:sleep, 1:awake
+ */
+#define AUTOWAKEUP_CFG 0x1208
+#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
+#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
+#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
+
+/*
+ * EDCA_AC0_CFG:
+ */
+#define EDCA_AC0_CFG 0x1300
+#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
+#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
+#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
+#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
+
+/*
+ * EDCA_AC1_CFG:
+ */
+#define EDCA_AC1_CFG 0x1304
+#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
+#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
+#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
+#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
+
+/*
+ * EDCA_AC2_CFG:
+ */
+#define EDCA_AC2_CFG 0x1308
+#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
+#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
+#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
+#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
+
+/*
+ * EDCA_AC3_CFG:
+ */
+#define EDCA_AC3_CFG 0x130c
+#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
+#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
+#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
+#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
+
+/*
+ * EDCA_TID_AC_MAP:
+ */
+#define EDCA_TID_AC_MAP 0x1310
+
+/*
+ * TX_PWR_CFG_0:
+ */
+#define TX_PWR_CFG_0 0x1314
+#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
+#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
+#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
+#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
+#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
+#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
+#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
+#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
+
+/*
+ * TX_PWR_CFG_1:
+ */
+#define TX_PWR_CFG_1 0x1318
+#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
+#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
+#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
+#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
+#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
+#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
+#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
+#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
+
+/*
+ * TX_PWR_CFG_2:
+ */
+#define TX_PWR_CFG_2 0x131c
+#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
+#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
+#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
+#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
+#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
+#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
+#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
+#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
+
+/*
+ * TX_PWR_CFG_3:
+ */
+#define TX_PWR_CFG_3 0x1320
+#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
+#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
+#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
+#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
+#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
+#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
+#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
+#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
+
+/*
+ * TX_PWR_CFG_4:
+ */
+#define TX_PWR_CFG_4 0x1324
+#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
+#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
+#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
+#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
+
+/*
+ * TX_PIN_CFG:
+ */
+#define TX_PIN_CFG 0x1328
+#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
+#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
+#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
+#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
+#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
+#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
+#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
+#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
+#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
+#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
+#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
+#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
+#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
+#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
+#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
+#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
+#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
+#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
+#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
+#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
+
+/*
+ * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
+ */
+#define TX_BAND_CFG 0x132c
+#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
+#define TX_BAND_CFG_A FIELD32(0x00000002)
+#define TX_BAND_CFG_BG FIELD32(0x00000004)
+
+/*
+ * TX_SW_CFG0:
+ */
+#define TX_SW_CFG0 0x1330
+
+/*
+ * TX_SW_CFG1:
+ */
+#define TX_SW_CFG1 0x1334
+
+/*
+ * TX_SW_CFG2:
+ */
+#define TX_SW_CFG2 0x1338
+
+/*
+ * TXOP_THRES_CFG:
+ */
+#define TXOP_THRES_CFG 0x133c
+
+/*
+ * TXOP_CTRL_CFG:
+ */
+#define TXOP_CTRL_CFG 0x1340
+
+/*
+ * TX_RTS_CFG:
+ * RTS_THRES: unit:byte
+ * RTS_FBK_EN: enable rts rate fallback
+ */
+#define TX_RTS_CFG 0x1344
+#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
+#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
+#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
+
+/*
+ * TX_TIMEOUT_CFG:
+ * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
+ * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
+ * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
+ * it is recommended that:
+ * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
+ */
+#define TX_TIMEOUT_CFG 0x1348
+#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
+#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
+#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
+
+/*
+ * TX_RTY_CFG:
+ * SHORT_RTY_LIMIT: short retry limit
+ * LONG_RTY_LIMIT: long retry limit
+ * LONG_RTY_THRE: Long retry threshoold
+ * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
+ * 0:expired by retry limit, 1: expired by mpdu life timer
+ * AGG_RTY_MODE: Aggregate MPDU retry mode
+ * 0:expired by retry limit, 1: expired by mpdu life timer
+ * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
+ */
+#define TX_RTY_CFG 0x134c
+#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
+#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
+#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
+#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
+#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
+#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
+
+/*
+ * TX_LINK_CFG:
+ * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
+ * MFB_ENABLE: TX apply remote MFB 1:enable
+ * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
+ * 0: not apply remote remote unsolicit (MFS=7)
+ * TX_MRQ_EN: MCS request TX enable
+ * TX_RDG_EN: RDG TX enable
+ * TX_CF_ACK_EN: Piggyback CF-ACK enable
+ * REMOTE_MFB: remote MCS feedback
+ * REMOTE_MFS: remote MCS feedback sequence number
+ */
+#define TX_LINK_CFG 0x1350
+#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
+#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
+#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
+#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
+#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
+#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
+#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
+#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
+
+/*
+ * HT_FBK_CFG0:
+ */
+#define HT_FBK_CFG0 0x1354
+#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
+#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
+#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
+#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
+#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
+#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
+#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
+#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
+
+/*
+ * HT_FBK_CFG1:
+ */
+#define HT_FBK_CFG1 0x1358
+#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
+#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
+#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
+#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
+#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
+#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
+#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
+#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
+
+/*
+ * LG_FBK_CFG0:
+ */
+#define LG_FBK_CFG0 0x135c
+#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
+#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
+#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
+#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
+#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
+#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
+#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
+#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
+
+/*
+ * LG_FBK_CFG1:
+ */
+#define LG_FBK_CFG1 0x1360
+#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
+#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
+#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
+#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
+
+/*
+ * CCK_PROT_CFG: CCK Protection
+ * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
+ * PROTECT_CTRL: Protection control frame type for CCK TX
+ * 0:none, 1:RTS/CTS, 2:CTS-to-self
+ * PROTECT_NAV: TXOP protection type for CCK TX
+ * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
+ * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
+ * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
+ * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
+ * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
+ * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
+ * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
+ * RTS_TH_EN: RTS threshold enable on CCK TX
+ */
+#define CCK_PROT_CFG 0x1364
+#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * OFDM_PROT_CFG: OFDM Protection
+ */
+#define OFDM_PROT_CFG 0x1368
+#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * MM20_PROT_CFG: MM20 Protection
+ */
+#define MM20_PROT_CFG 0x136c
+#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * MM40_PROT_CFG: MM40 Protection
+ */
+#define MM40_PROT_CFG 0x1370
+#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * GF20_PROT_CFG: GF20 Protection
+ */
+#define GF20_PROT_CFG 0x1374
+#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * GF40_PROT_CFG: GF40 Protection
+ */
+#define GF40_PROT_CFG 0x1378
+#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
+#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
+#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
+#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
+#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
+
+/*
+ * EXP_CTS_TIME:
+ */
+#define EXP_CTS_TIME 0x137c
+
+/*
+ * EXP_ACK_TIME:
+ */
+#define EXP_ACK_TIME 0x1380
+
+/*
+ * RX_FILTER_CFG: RX configuration register.
+ */
+#define RX_FILTER_CFG 0x1400
+#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
+#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
+#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
+#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
+#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
+#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
+#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
+#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
+#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
+#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
+#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
+#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
+#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
+#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
+#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
+#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
+#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
+
+/*
+ * AUTO_RSP_CFG:
+ * AUTORESPONDER: 0: disable, 1: enable
+ * BAC_ACK_POLICY: 0:long, 1:short preamble
+ * CTS_40_MMODE: Response CTS 40MHz duplicate mode
+ * CTS_40_MREF: Response CTS 40MHz duplicate mode
+ * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
+ * DUAL_CTS_EN: Power bit value in control frame
+ * ACK_CTS_PSM_BIT:Power bit value in control frame
+ */
+#define AUTO_RSP_CFG 0x1404
+#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
+#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
+#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
+#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
+#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
+#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
+#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
+
+/*
+ * LEGACY_BASIC_RATE:
+ */
+#define LEGACY_BASIC_RATE 0x1408
+
+/*
+ * HT_BASIC_RATE:
+ */
+#define HT_BASIC_RATE 0x140c
+
+/*
+ * HT_CTRL_CFG:
+ */
+#define HT_CTRL_CFG 0x1410
+
+/*
+ * SIFS_COST_CFG:
+ */
+#define SIFS_COST_CFG 0x1414
+
+/*
+ * RX_PARSER_CFG:
+ * Set NAV for all received frames
+ */
+#define RX_PARSER_CFG 0x1418
+
+/*
+ * TX_SEC_CNT0:
+ */
+#define TX_SEC_CNT0 0x1500
+
+/*
+ * RX_SEC_CNT0:
+ */
+#define RX_SEC_CNT0 0x1504
+
+/*
+ * CCMP_FC_MUTE:
+ */
+#define CCMP_FC_MUTE 0x1508
+
+/*
+ * TXOP_HLDR_ADDR0:
+ */
+#define TXOP_HLDR_ADDR0 0x1600
+
+/*
+ * TXOP_HLDR_ADDR1:
+ */
+#define TXOP_HLDR_ADDR1 0x1604
+
+/*
+ * TXOP_HLDR_ET:
+ */
+#define TXOP_HLDR_ET 0x1608
+
+/*
+ * QOS_CFPOLL_RA_DW0:
+ */
+#define QOS_CFPOLL_RA_DW0 0x160c
+
+/*
+ * QOS_CFPOLL_RA_DW1:
+ */
+#define QOS_CFPOLL_RA_DW1 0x1610
+
+/*
+ * QOS_CFPOLL_QC:
+ */
+#define QOS_CFPOLL_QC 0x1614
+
+/*
+ * RX_STA_CNT0: RX PLCP error count & RX CRC error count
+ */
+#define RX_STA_CNT0 0x1700
+#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
+#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
+
+/*
+ * RX_STA_CNT1: RX False CCA count & RX LONG frame count
+ */
+#define RX_STA_CNT1 0x1704
+#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
+#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
+
+/*
+ * RX_STA_CNT2:
+ */
+#define RX_STA_CNT2 0x1708
+#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
+#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
+
+/*
+ * TX_STA_CNT0: TX Beacon count
+ */
+#define TX_STA_CNT0 0x170c
+#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
+#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_STA_CNT1: TX tx count
+ */
+#define TX_STA_CNT1 0x1710
+#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
+#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
+
+/*
+ * TX_STA_CNT2: TX tx count
+ */
+#define TX_STA_CNT2 0x1714
+#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
+#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_STA_FIFO: TX Result for specific PID status fifo register
+ */
+#define TX_STA_FIFO 0x1718
+#define TX_STA_FIFO_VALID FIELD32(0x00000001)
+#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
+#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
+#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
+#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
+#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
+#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
+#define TX_STA_FIFO_MCS FIELD32(0x007f0000)
+#define TX_STA_FIFO_PHYMODE FIELD32(0xc0000000)
+
+/*
+ * TX_AGG_CNT: Debug counter
+ */
+#define TX_AGG_CNT 0x171c
+#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT0:
+ */
+#define TX_AGG_CNT0 0x1720
+#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT1:
+ */
+#define TX_AGG_CNT1 0x1724
+#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT2:
+ */
+#define TX_AGG_CNT2 0x1728
+#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT3:
+ */
+#define TX_AGG_CNT3 0x172c
+#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT4:
+ */
+#define TX_AGG_CNT4 0x1730
+#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT5:
+ */
+#define TX_AGG_CNT5 0x1734
+#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT6:
+ */
+#define TX_AGG_CNT6 0x1738
+#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
+
+/*
+ * TX_AGG_CNT7:
+ */
+#define TX_AGG_CNT7 0x173c
+#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
+#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
+
+/*
+ * MPDU_DENSITY_CNT:
+ * TX_ZERO_DEL: TX zero length delimiter count
+ * RX_ZERO_DEL: RX zero length delimiter count
+ */
+#define MPDU_DENSITY_CNT 0x1740
+#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
+#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
+
+/*
+ * Security key table memory.
+ * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
+ * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
+ * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
+ * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
+ * SHARED_KEY_TABLE_BASE: 32-byte * 16-entry
+ * SHARED_KEY_MODE_BASE: 4-byte * 16-entry
+ */
+#define MAC_WCID_BASE 0x1800
+#define PAIRWISE_KEY_TABLE_BASE 0x4000
+#define MAC_IVEIV_TABLE_BASE 0x6000
+#define MAC_WCID_ATTRIBUTE_BASE 0x6800
+#define SHARED_KEY_TABLE_BASE 0x6c00
+#define SHARED_KEY_MODE_BASE 0x7000
+
+#define MAC_WCID_ENTRY(__idx) \
+ ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
+#define PAIRWISE_KEY_ENTRY(__idx) \
+ ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
+#define MAC_IVEIV_ENTRY(__idx) \
+ ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
+#define MAC_WCID_ATTR_ENTRY(__idx) \
+ ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
+#define SHARED_KEY_ENTRY(__idx) \
+ ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
+#define SHARED_KEY_MODE_ENTRY(__idx) \
+ ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
+
+struct mac_wcid_entry {
+ u8 mac[6];
+ u8 reserved[2];
+} __attribute__ ((packed));
+
+struct hw_key_entry {
+ u8 key[16];
+ u8 tx_mic[8];
+ u8 rx_mic[8];
+} __attribute__ ((packed));
+
+struct mac_iveiv_entry {
+ u8 iv[8];
+} __attribute__ ((packed));
+
+/*
+ * MAC_WCID_ATTRIBUTE:
+ */
+#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
+#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
+#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
+#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
+
+/*
+ * SHARED_KEY_MODE:
+ */
+#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
+#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
+#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
+#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
+#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
+#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
+#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
+#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
+
+/*
+ * HOST-MCU communication
+ */
+
+/*
+ * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
+ */
+#define H2M_MAILBOX_CSR 0x7010
+#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
+#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
+#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
+#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
+
+/*
+ * H2M_MAILBOX_CID:
+ */
+#define H2M_MAILBOX_CID 0x7014
+#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
+#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
+#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
+#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
+
+/*
+ * H2M_MAILBOX_STATUS:
+ */
+#define H2M_MAILBOX_STATUS 0x701c
+
+/*
+ * H2M_INT_SRC:
+ */
+#define H2M_INT_SRC 0x7024
+
+/*
+ * H2M_BBP_AGENT:
+ */
+#define H2M_BBP_AGENT 0x7028
+
+/*
+ * MCU_LEDCS: LED control for MCU Mailbox.
+ */
+#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
+#define MCU_LEDCS_POLARITY FIELD8(0x01)
+
+/*
+ * HW_CS_CTS_BASE:
+ * Carrier-sense CTS frame base address.
+ * It's where mac stores carrier-sense frame for carrier-sense function.
+ */
+#define HW_CS_CTS_BASE 0x7700
+
+/*
+ * HW_DFS_CTS_BASE:
+ * DFS CTS frame base address. It's where mac stores CTS frame for DFS.
+ */
+#define HW_DFS_CTS_BASE 0x7780
+
+/*
+ * TXRX control registers - base address 0x3000
+ */
+
+/*
+ * TXRX_CSR1:
+ * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
+ */
+#define TXRX_CSR1 0x77d0
+
+/*
+ * HW_DEBUG_SETTING_BASE:
+ * since NULL frame won't be that long (256 byte)
+ * We steal 16 tail bytes to save debugging settings
+ */
+#define HW_DEBUG_SETTING_BASE 0x77f0
+#define HW_DEBUG_SETTING_BASE2 0x7770
+
+/*
+ * HW_BEACON_BASE
+ * In order to support maximum 8 MBSS and its maximum length
+ * is 512 bytes for each beacon
+ * Three section discontinue memory segments will be used.
+ * 1. The original region for BCN 0~3
+ * 2. Extract memory from FCE table for BCN 4~5
+ * 3. Extract memory from Pair-wise key table for BCN 6~7
+ * It occupied those memory of wcid 238~253 for BCN 6
+ * and wcid 222~237 for BCN 7
+ *
+ * IMPORTANT NOTE: Not sure why legacy driver does this,
+ * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
+ */
+#define HW_BEACON_BASE0 0x7800
+#define HW_BEACON_BASE1 0x7a00
+#define HW_BEACON_BASE2 0x7c00
+#define HW_BEACON_BASE3 0x7e00
+#define HW_BEACON_BASE4 0x7200
+#define HW_BEACON_BASE5 0x7400
+#define HW_BEACON_BASE6 0x5dc0
+#define HW_BEACON_BASE7 0x5bc0
+
+#define HW_BEACON_OFFSET(__index) \
+ ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
+ (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
+ (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
+
+/*
+ * BBP registers.
+ * The wordsize of the BBP is 8 bits.
+ */
+
+/*
+ * BBP 1: TX Antenna
+ */
+#define BBP1_TX_POWER FIELD8(0x07)
+#define BBP1_TX_ANTENNA FIELD8(0x18)
+
+/*
+ * BBP 3: RX Antenna
+ */
+#define BBP3_RX_ANTENNA FIELD8(0x18)
+#define BBP3_HT40_PLUS FIELD8(0x20)
+
+/*
+ * BBP 4: Bandwidth
+ */
+#define BBP4_TX_BF FIELD8(0x01)
+#define BBP4_BANDWIDTH FIELD8(0x18)
+
+/*
+ * RFCSR registers
+ * The wordsize of the RFCSR is 8 bits.
+ */
+
+/*
+ * RFCSR 6:
+ */
+#define RFCSR6_R FIELD8(0x03)
+
+/*
+ * RFCSR 7:
+ */
+#define RFCSR7_RF_TUNING FIELD8(0x01)
+
+/*
+ * RFCSR 12:
+ */
+#define RFCSR12_TX_POWER FIELD8(0x1f)
+
+/*
+ * RFCSR 22:
+ */
+#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
+
+/*
+ * RFCSR 23:
+ */
+#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
+
+/*
+ * RFCSR 30:
+ */
+#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
+
+/*
+ * RF registers
+ */
+
+/*
+ * RF 2
+ */
+#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
+#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
+#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
+
+/*
+ * RF 3
+ */
+#define RF3_TXPOWER_G FIELD32(0x00003e00)
+#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
+#define RF3_TXPOWER_A FIELD32(0x00003c00)
+
+/*
+ * RF 4
+ */
+#define RF4_TXPOWER_G FIELD32(0x000007c0)
+#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
+#define RF4_TXPOWER_A FIELD32(0x00000780)
+#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
+#define RF4_HT40 FIELD32(0x00200000)
+
+/*
+ * EEPROM content.
+ * The wordsize of the EEPROM is 16 bits.
+ */
+
+/*
+ * EEPROM Version
+ */
+#define EEPROM_VERSION 0x0001
+#define EEPROM_VERSION_FAE FIELD16(0x00ff)
+#define EEPROM_VERSION_VERSION FIELD16(0xff00)
+
+/*
+ * HW MAC address.
+ */
+#define EEPROM_MAC_ADDR_0 0x0002
+#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
+#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
+#define EEPROM_MAC_ADDR_1 0x0003
+#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
+#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
+#define EEPROM_MAC_ADDR_2 0x0004
+#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
+#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
+
+/*
+ * EEPROM ANTENNA config
+ * RXPATH: 1: 1R, 2: 2R, 3: 3R
+ * TXPATH: 1: 1T, 2: 2T
+ */
+#define EEPROM_ANTENNA 0x001a
+#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
+#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
+#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
+
+/*
+ * EEPROM NIC config
+ * CARDBUS_ACCEL: 0 - enable, 1 - disable
+ */
+#define EEPROM_NIC 0x001b
+#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
+#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
+#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
+#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
+#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
+#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
+#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
+#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
+#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
+#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
+
+/*
+ * EEPROM frequency
+ */
+#define EEPROM_FREQ 0x001d
+#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
+#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
+#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
+
+/*
+ * EEPROM LED
+ * POLARITY_RDY_G: Polarity RDY_G setting.
+ * POLARITY_RDY_A: Polarity RDY_A setting.
+ * POLARITY_ACT: Polarity ACT setting.
+ * POLARITY_GPIO_0: Polarity GPIO0 setting.
+ * POLARITY_GPIO_1: Polarity GPIO1 setting.
+ * POLARITY_GPIO_2: Polarity GPIO2 setting.
+ * POLARITY_GPIO_3: Polarity GPIO3 setting.
+ * POLARITY_GPIO_4: Polarity GPIO4 setting.
+ * LED_MODE: Led mode.
+ */
+#define EEPROM_LED1 0x001e
+#define EEPROM_LED2 0x001f
+#define EEPROM_LED3 0x0020
+#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
+#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
+#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
+#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
+#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
+#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
+#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
+#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
+#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
+
+/*
+ * EEPROM LNA
+ */
+#define EEPROM_LNA 0x0022
+#define EEPROM_LNA_BG FIELD16(0x00ff)
+#define EEPROM_LNA_A0 FIELD16(0xff00)
+
+/*
+ * EEPROM RSSI BG offset
+ */
+#define EEPROM_RSSI_BG 0x0023
+#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
+#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
+
+/*
+ * EEPROM RSSI BG2 offset
+ */
+#define EEPROM_RSSI_BG2 0x0024
+#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
+#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
+
+/*
+ * EEPROM RSSI A offset
+ */
+#define EEPROM_RSSI_A 0x0025
+#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
+#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
+
+/*
+ * EEPROM RSSI A2 offset
+ */
+#define EEPROM_RSSI_A2 0x0026
+#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
+#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
+
+/*
+ * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
+ * This is delta in 40MHZ.
+ * VALUE: Tx Power dalta value (MAX=4)
+ * TYPE: 1: Plus the delta value, 0: minus the delta value
+ * TXPOWER: Enable:
+ */
+#define EEPROM_TXPOWER_DELTA 0x0028
+#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
+#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
+#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
+
+/*
+ * EEPROM TXPOWER 802.11BG
+ */
+#define EEPROM_TXPOWER_BG1 0x0029
+#define EEPROM_TXPOWER_BG2 0x0030
+#define EEPROM_TXPOWER_BG_SIZE 7
+#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
+#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
+
+/*
+ * EEPROM TXPOWER 802.11A
+ */
+#define EEPROM_TXPOWER_A1 0x003c
+#define EEPROM_TXPOWER_A2 0x0053
+#define EEPROM_TXPOWER_A_SIZE 6
+#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
+#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
+
+/*
+ * EEPROM TXpower byrate: 20MHZ power
+ */
+#define EEPROM_TXPOWER_BYRATE 0x006f
+
+/*
+ * EEPROM BBP.
+ */
+#define EEPROM_BBP_START 0x0078
+#define EEPROM_BBP_SIZE 16
+#define EEPROM_BBP_VALUE FIELD16(0x00ff)
+#define EEPROM_BBP_REG_ID FIELD16(0xff00)
+
+/*
+ * MCU mailbox commands.
+ */
+#define MCU_SLEEP 0x30
+#define MCU_WAKEUP 0x31
+#define MCU_RADIO_OFF 0x35
+#define MCU_CURRENT 0x36
+#define MCU_LED 0x50
+#define MCU_LED_STRENGTH 0x51
+#define MCU_LED_1 0x52
+#define MCU_LED_2 0x53
+#define MCU_LED_3 0x54
+#define MCU_RADAR 0x60
+#define MCU_BOOT_SIGNAL 0x72
+#define MCU_BBP_SIGNAL 0x80
+#define MCU_POWER_SAVE 0x83
+
+/*
+ * MCU mailbox tokens
+ */
+#define TOKEN_WAKUP 3
+
+/*
+ * DMA descriptor defines.
+ */
+#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) )
+#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
+
+/*
+ * TX WI structure
+ */
+
+/*
+ * Word0
+ * FRAG: 1 To inform TKIP engine this is a fragment.
+ * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
+ * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
+ * BW: Channel bandwidth 20MHz or 40 MHz
+ * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
+ */
+#define TXWI_W0_FRAG FIELD32(0x00000001)
+#define TXWI_W0_MIMO_PS FIELD32(0x00000002)
+#define TXWI_W0_CF_ACK FIELD32(0x00000004)
+#define TXWI_W0_TS FIELD32(0x00000008)
+#define TXWI_W0_AMPDU FIELD32(0x00000010)
+#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0)
+#define TXWI_W0_TX_OP FIELD32(0x00000300)
+#define TXWI_W0_MCS FIELD32(0x007f0000)
+#define TXWI_W0_BW FIELD32(0x00800000)
+#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
+#define TXWI_W0_STBC FIELD32(0x06000000)
+#define TXWI_W0_IFS FIELD32(0x08000000)
+#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
+
+/*
+ * Word1
+ */
+#define TXWI_W1_ACK FIELD32(0x00000001)
+#define TXWI_W1_NSEQ FIELD32(0x00000002)
+#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc)
+#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00)
+#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
+#define TXWI_W1_PACKETID FIELD32(0xf0000000)
+
+/*
+ * Word2
+ */
+#define TXWI_W2_IV FIELD32(0xffffffff)
+
+/*
+ * Word3
+ */
+#define TXWI_W3_EIV FIELD32(0xffffffff)
+
+/*
+ * RX WI structure
+ */
+
+/*
+ * Word0
+ */
+#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
+#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
+#define RXWI_W0_BSSID FIELD32(0x00001c00)
+#define RXWI_W0_UDF FIELD32(0x0000e000)
+#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
+#define RXWI_W0_TID FIELD32(0xf0000000)
+
+/*
+ * Word1
+ */
+#define RXWI_W1_FRAG FIELD32(0x0000000f)
+#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
+#define RXWI_W1_MCS FIELD32(0x007f0000)
+#define RXWI_W1_BW FIELD32(0x00800000)
+#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
+#define RXWI_W1_STBC FIELD32(0x06000000)
+#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
+
+/*
+ * Word2
+ */
+#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
+#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
+#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
+
+/*
+ * Word3
+ */
+#define RXWI_W3_SNR0 FIELD32(0x000000ff)
+#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
+
+/*
+ * Macros for converting txpower from EEPROM to mac80211 value
+ * and from mac80211 value to register value.
+ */
+#define MIN_G_TXPOWER 0
+#define MIN_A_TXPOWER -7
+#define MAX_G_TXPOWER 31
+#define MAX_A_TXPOWER 15
+#define DEFAULT_TXPOWER 5
+
+#define TXPOWER_G_FROM_DEV(__txpower) \
+ ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
+
+#define TXPOWER_G_TO_DEV(__txpower) \
+ clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
+
+#define TXPOWER_A_FROM_DEV(__txpower) \
+ ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
+
+#define TXPOWER_A_TO_DEV(__txpower) \
+ clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
+
+#endif /* RT2800_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
new file mode 100644
index 00000000000..5c7d74a6f16
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -0,0 +1,1817 @@
+/*
+ Copyright (C) 2009 Bartlomiej Zolnierkiewicz
+
+ Based on the original rt2800pci.c and rt2800usb.c:
+
+ Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
+ <http://rt2x00.serialmonkey.com>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the
+ Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/*
+ Module: rt2800lib
+ Abstract: rt2800 generic device routines.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include "rt2x00.h"
+#ifdef CONFIG_RT2800USB
+#include "rt2x00usb.h"
+#endif
+#include "rt2800lib.h"
+#include "rt2800.h"
+#include "rt2800usb.h"
+
+MODULE_AUTHOR("Bartlomiej Zolnierkiewicz");
+MODULE_DESCRIPTION("rt2800 library");
+MODULE_LICENSE("GPL");
+
+/*
+ * Register access.
+ * All access to the CSR registers will go through the methods
+ * rt2800_register_read and rt2800_register_write.
+ * BBP and RF register require indirect register access,
+ * and use the CSR registers BBPCSR and RFCSR to achieve this.
+ * These indirect registers work with busy bits,
+ * and we will try maximal REGISTER_BUSY_COUNT times to access
+ * the register while taking a REGISTER_BUSY_DELAY us delay
+ * between each attampt. When the busy bit is still set at that time,
+ * the access attempt is considered to have failed,
+ * and we will print an error.
+ * The _lock versions must be used if you already hold the csr_mutex
+ */
+#define WAIT_FOR_BBP(__dev, __reg) \
+ rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
+#define WAIT_FOR_RFCSR(__dev, __reg) \
+ rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
+#define WAIT_FOR_RF(__dev, __reg) \
+ rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
+#define WAIT_FOR_MCU(__dev, __reg) \
+ rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \
+ H2M_MAILBOX_CSR_OWNER, (__reg))
+
+static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
+ const unsigned int word, const u8 value)
+{
+ u32 reg;
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the BBP becomes available, afterwards we
+ * can safely write the new data into the register.
+ */
+ if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
+ reg = 0;
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
+ if (rt2x00_intf_is_pci(rt2x00dev))
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
+
+ rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
+ }
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+
+static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int word, u8 *value)
+{
+ u32 reg;
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the BBP becomes available, afterwards we
+ * can safely write the read request into the register.
+ * After the data has been written, we wait until hardware
+ * returns the correct value, if at any time the register
+ * doesn't become available in time, reg will be 0xffffffff
+ * which means we return 0xff to the caller.
+ */
+ if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
+ reg = 0;
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
+ if (rt2x00_intf_is_pci(rt2x00dev))
+ rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
+
+ rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
+
+ WAIT_FOR_BBP(rt2x00dev, &reg);
+ }
+
+ *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+
+static void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev,
+ const unsigned int word, const u8 value)
+{
+ u32 reg;
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the RFCSR becomes available, afterwards we
+ * can safely write the new data into the register.
+ */
+ if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
+ reg = 0;
+ rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
+ rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
+ rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
+
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+ }
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+
+static void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int word, u8 *value)
+{
+ u32 reg;
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the RFCSR becomes available, afterwards we
+ * can safely write the read request into the register.
+ * After the data has been written, we wait until hardware
+ * returns the correct value, if at any time the register
+ * doesn't become available in time, reg will be 0xffffffff
+ * which means we return 0xff to the caller.
+ */
+ if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
+ reg = 0;
+ rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
+ rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
+
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+
+ WAIT_FOR_RFCSR(rt2x00dev, &reg);
+ }
+
+ *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+
+static void rt2800_rf_write(struct rt2x00_dev *rt2x00dev,
+ const unsigned int word, const u32 value)
+{
+ u32 reg;
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the RF becomes available, afterwards we
+ * can safely write the new data into the register.
+ */
+ if (WAIT_FOR_RF(rt2x00dev, &reg)) {
+ reg = 0;
+ rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
+ rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
+ rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
+ rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
+
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
+ rt2x00_rf_write(rt2x00dev, word, value);
+ }
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+
+void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
+ const u8 command, const u8 token,
+ const u8 arg0, const u8 arg1)
+{
+ u32 reg;
+
+ if (rt2x00_intf_is_pci(rt2x00dev)) {
+ /*
+ * RT2880 and RT3052 don't support MCU requests.
+ */
+ if (rt2x00_rt(&rt2x00dev->chip, RT2880) ||
+ rt2x00_rt(&rt2x00dev->chip, RT3052))
+ return;
+ }
+
+ mutex_lock(&rt2x00dev->csr_mutex);
+
+ /*
+ * Wait until the MCU becomes available, afterwards we
+ * can safely write the new data into the register.
+ */
+ if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
+ rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
+ rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
+ rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
+ rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
+ rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
+
+ reg = 0;
+ rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
+ rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
+ }
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+}
+EXPORT_SYMBOL_GPL(rt2800_mcu_request);
+
+#ifdef CONFIG_RT2X00_LIB_DEBUGFS
+const struct rt2x00debug rt2800_rt2x00debug = {
+ .owner = THIS_MODULE,
+ .csr = {
+ .read = rt2800_register_read,
+ .write = rt2800_register_write,
+ .flags = RT2X00DEBUGFS_OFFSET,
+ .word_base = CSR_REG_BASE,
+ .word_size = sizeof(u32),
+ .word_count = CSR_REG_SIZE / sizeof(u32),
+ },
+ .eeprom = {
+ .read = rt2x00_eeprom_read,
+ .write = rt2x00_eeprom_write,
+ .word_base = EEPROM_BASE,
+ .word_size = sizeof(u16),
+ .word_count = EEPROM_SIZE / sizeof(u16),
+ },
+ .bbp = {
+ .read = rt2800_bbp_read,
+ .write = rt2800_bbp_write,
+ .word_base = BBP_BASE,
+ .word_size = sizeof(u8),
+ .word_count = BBP_SIZE / sizeof(u8),
+ },
+ .rf = {
+ .read = rt2x00_rf_read,
+ .write = rt2800_rf_write,
+ .word_base = RF_BASE,
+ .word_size = sizeof(u32),
+ .word_count = RF_SIZE / sizeof(u32),
+ },
+};
+EXPORT_SYMBOL_GPL(rt2800_rt2x00debug);
+#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
+
+int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev)
+{
+ u32 reg;
+
+ rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
+ return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
+}
+EXPORT_SYMBOL_GPL(rt2800_rfkill_poll);
+
+#ifdef CONFIG_RT2X00_LIB_LEDS
+static void rt2800_brightness_set(struct led_classdev *led_cdev,
+ enum led_brightness brightness)
+{
+ struct rt2x00_led *led =
+ container_of(led_cdev, struct rt2x00_led, led_dev);
+ unsigned int enabled = brightness != LED_OFF;
+ unsigned int bg_mode =
+ (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
+ unsigned int polarity =
+ rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
+ EEPROM_FREQ_LED_POLARITY);
+ unsigned int ledmode =
+ rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
+ EEPROM_FREQ_LED_MODE);
+
+ if (led->type == LED_TYPE_RADIO) {
+ rt2800_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
+ enabled ? 0x20 : 0);
+ } else if (led->type == LED_TYPE_ASSOC) {
+ rt2800_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
+ enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
+ } else if (led->type == LED_TYPE_QUALITY) {
+ /*
+ * The brightness is divided into 6 levels (0 - 5),
+ * The specs tell us the following levels:
+ * 0, 1 ,3, 7, 15, 31
+ * to determine the level in a simple way we can simply
+ * work with bitshifting:
+ * (1 << level) - 1
+ */
+ rt2800_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
+ (1 << brightness / (LED_FULL / 6)) - 1,
+ polarity);
+ }
+}
+
+static int rt2800_blink_set(struct led_classdev *led_cdev,
+ unsigned long *delay_on, unsigned long *delay_off)
+{
+ struct rt2x00_led *led =
+ container_of(led_cdev, struct rt2x00_led, led_dev);
+ u32 reg;
+
+ rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
+ rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
+ rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
+ rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
+ rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
+ rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
+ rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
+ rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
+ rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
+
+ return 0;
+}
+
+void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00_led *led, enum led_type type)
+{
+ led->rt2x00dev = rt2x00dev;
+ led->type = type;
+ led->led_dev.brightness_set = rt2800_brightness_set;
+ led->led_dev.blink_set = rt2800_blink_set;
+ led->flags = LED_INITIALIZED;
+}
+EXPORT_SYMBOL_GPL(rt2800_init_led);
+#endif /* CONFIG_RT2X00_LIB_LEDS */
+
+/*
+ * Configuration handlers.
+ */
+static void rt2800_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key)
+{
+ struct mac_wcid_entry wcid_entry;
+ struct mac_iveiv_entry iveiv_entry;
+ u32 offset;
+ u32 reg;
+
+ offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
+
+ rt2800_register_read(rt2x00dev, offset, &reg);
+ rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
+ !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
+ rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
+ (crypto->cmd == SET_KEY) * crypto->cipher);
+ rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
+ (crypto->cmd == SET_KEY) * crypto->bssidx);
+ rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
+ rt2800_register_write(rt2x00dev, offset, reg);
+
+ offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
+
+ memset(&iveiv_entry, 0, sizeof(iveiv_entry));
+ if ((crypto->cipher == CIPHER_TKIP) ||
+ (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
+ (crypto->cipher == CIPHER_AES))
+ iveiv_entry.iv[3] |= 0x20;
+ iveiv_entry.iv[3] |= key->keyidx << 6;
+ rt2800_register_multiwrite(rt2x00dev, offset,
+ &iveiv_entry, sizeof(iveiv_entry));
+
+ offset = MAC_WCID_ENTRY(key->hw_key_idx);
+
+ memset(&wcid_entry, 0, sizeof(wcid_entry));
+ if (crypto->cmd == SET_KEY)
+ memcpy(&wcid_entry, crypto->address, ETH_ALEN);
+ rt2800_register_multiwrite(rt2x00dev, offset,
+ &wcid_entry, sizeof(wcid_entry));
+}
+
+int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key)
+{
+ struct hw_key_entry key_entry;
+ struct rt2x00_field32 field;
+ u32 offset;
+ u32 reg;
+
+ if (crypto->cmd == SET_KEY) {
+ key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
+
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ sizeof(key_entry.tx_mic));
+ memcpy(key_entry.rx_mic, crypto->rx_mic,
+ sizeof(key_entry.rx_mic));
+
+ offset = SHARED_KEY_ENTRY(key->hw_key_idx);
+ rt2800_register_multiwrite(rt2x00dev, offset,
+ &key_entry, sizeof(key_entry));
+ }
+
+ /*
+ * The cipher types are stored over multiple registers
+ * starting with SHARED_KEY_MODE_BASE each word will have
+ * 32 bits and contains the cipher types for 2 bssidx each.
+ * Using the correct defines correctly will cause overhead,
+ * so just calculate the correct offset.
+ */
+ field.bit_offset = 4 * (key->hw_key_idx % 8);
+ field.bit_mask = 0x7 << field.bit_offset;
+
+ offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
+
+ rt2800_register_read(rt2x00dev, offset, &reg);
+ rt2x00_set_field32(&reg, field,
+ (crypto->cmd == SET_KEY) * crypto->cipher);
+ rt2800_register_write(rt2x00dev, offset, reg);
+
+ /*
+ * Update WCID information
+ */
+ rt2800_config_wcid_attr(rt2x00dev, crypto, key);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2800_config_shared_key);
+
+int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key)
+{
+ struct hw_key_entry key_entry;
+ u32 offset;
+
+ if (crypto->cmd == SET_KEY) {
+ /*
+ * 1 pairwise key is possible per AID, this means that the AID
+ * equals our hw_key_idx. Make sure the WCID starts _after_ the
+ * last possible shared key entry.
+ */
+ if (crypto->aid > (256 - 32))
+ return -ENOSPC;
+
+ key->hw_key_idx = 32 + crypto->aid;
+
+ memcpy(key_entry.key, crypto->key,
+ sizeof(key_entry.key));
+ memcpy(key_entry.tx_mic, crypto->tx_mic,
+ sizeof(key_entry.tx_mic));
+ memcpy(key_entry.rx_mic, crypto->rx_mic,
+ sizeof(key_entry.rx_mic));
+
+ offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
+ rt2800_register_multiwrite(rt2x00dev, offset,
+ &key_entry, sizeof(key_entry));
+ }
+
+ /*
+ * Update WCID information
+ */
+ rt2800_config_wcid_attr(rt2x00dev, crypto, key);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key);
+
+void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
+ const unsigned int filter_flags)
+{
+ u32 reg;
+
+ /*
+ * Start configuration steps.
+ * Note that the version error will always be dropped
+ * and broadcast frames will always be accepted since
+ * there is no filter for it at this time.
+ */
+ rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
+ !(filter_flags & FIF_FCSFAIL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
+ !(filter_flags & FIF_PLCPFAIL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
+ !(filter_flags & FIF_PROMISC_IN_BSS));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
+ !(filter_flags & FIF_ALLMULTI));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
+ !(filter_flags & FIF_PSPOLL));
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
+ rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
+ !(filter_flags & FIF_CONTROL));
+ rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
+}
+EXPORT_SYMBOL_GPL(rt2800_config_filter);
+
+void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
+ struct rt2x00intf_conf *conf, const unsigned int flags)
+{
+ unsigned int beacon_base;
+ u32 reg;
+
+ if (flags & CONFIG_UPDATE_TYPE) {
+ /*
+ * Clear current synchronisation setup.
+ * For the Beacon base registers we only need to clear
+ * the first byte since that byte contains the VALID and OWNER
+ * bits which (when set to 0) will invalidate the entire beacon.
+ */
+ beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
+ rt2800_register_write(rt2x00dev, beacon_base, 0);
+
+ /*
+ * Enable synchronisation.
+ */
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ }
+
+ if (flags & CONFIG_UPDATE_MAC) {
+ reg = le32_to_cpu(conf->mac[1]);
+ rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
+ conf->mac[1] = cpu_to_le32(reg);
+
+ rt2800_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
+ conf->mac, sizeof(conf->mac));
+ }
+
+ if (flags & CONFIG_UPDATE_BSSID) {
+ reg = le32_to_cpu(conf->bssid[1]);
+ rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
+ rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
+ conf->bssid[1] = cpu_to_le32(reg);
+
+ rt2800_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
+ conf->bssid, sizeof(conf->bssid));
+ }
+}
+EXPORT_SYMBOL_GPL(rt2800_config_intf);
+
+void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
+{
+ u32 reg;
+
+ rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
+ rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
+ !!erp->short_preamble);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
+ !!erp->short_preamble);
+ rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
+ erp->cts_protection ? 2 : 0);
+ rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+
+ rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
+ erp->basic_rates);
+ rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+
+ rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
+ rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
+ rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
+ rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
+ rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
+ rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
+ rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
+ rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
+ rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
+ rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
+ erp->beacon_int * 16);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+}
+EXPORT_SYMBOL_GPL(rt2800_config_erp);
+
+void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
+{
+ u8 r1;
+ u8 r3;
+
+ rt2800_bbp_read(rt2x00dev, 1, &r1);
+ rt2800_bbp_read(rt2x00dev, 3, &r3);
+
+ /*
+ * Configure the TX antenna.
+ */
+ switch ((int)ant->tx) {
+ case 1:
+ rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
+ if (rt2x00_intf_is_pci(rt2x00dev))
+ rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
+ break;
+ case 2:
+ rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
+ break;
+ case 3:
+ /* Do nothing */
+ break;
+ }
+
+ /*
+ * Configure the RX antenna.
+ */
+ switch ((int)ant->rx) {
+ case 1:
+ rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
+ break;
+ case 2:
+ rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
+ break;
+ case 3:
+ rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
+ break;
+ }
+
+ rt2800_bbp_write(rt2x00dev, 3, r3);
+ rt2800_bbp_write(rt2x00dev, 1, r1);
+}
+EXPORT_SYMBOL_GPL(rt2800_config_ant);
+
+static void rt2800_config_lna_gain(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf)
+{
+ u16 eeprom;
+ short lna_gain;
+
+ if (libconf->rf.channel <= 14) {
+ rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
+ lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
+ } else if (libconf->rf.channel <= 64) {
+ rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
+ lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
+ } else if (libconf->rf.channel <= 128) {
+ rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
+ lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
+ } else {
+ rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
+ lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
+ }
+
+ rt2x00dev->lna_gain = lna_gain;
+}
+
+static void rt2800_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_conf *conf,
+ struct rf_channel *rf,
+ struct channel_info *info)
+{
+ rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
+
+ if (rt2x00dev->default_ant.tx == 1)
+ rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
+
+ if (rt2x00dev->default_ant.rx == 1) {
+ rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
+ rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
+ } else if (rt2x00dev->default_ant.rx == 2)
+ rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
+
+ if (rf->channel > 14) {
+ /*
+ * When TX power is below 0, we should increase it by 7 to
+ * make it a positive value (Minumum value is -7).
+ * However this means that values between 0 and 7 have
+ * double meaning, and we should set a 7DBm boost flag.
+ */
+ rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
+ (info->tx_power1 >= 0));
+
+ if (info->tx_power1 < 0)
+ info->tx_power1 += 7;
+
+ rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
+ TXPOWER_A_TO_DEV(info->tx_power1));
+
+ rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
+ (info->tx_power2 >= 0));
+
+ if (info->tx_power2 < 0)
+ info->tx_power2 += 7;
+
+ rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
+ TXPOWER_A_TO_DEV(info->tx_power2));
+ } else {
+ rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
+ TXPOWER_G_TO_DEV(info->tx_power1));
+ rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
+ TXPOWER_G_TO_DEV(info->tx_power2));
+ }
+
+ rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
+
+ rt2800_rf_write(rt2x00dev, 1, rf->rf1);
+ rt2800_rf_write(rt2x00dev, 2, rf->rf2);
+ rt2800_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
+ rt2800_rf_write(rt2x00dev, 4, rf->rf4);
+
+ udelay(200);
+
+ rt2800_rf_write(rt2x00dev, 1, rf->rf1);
+ rt2800_rf_write(rt2x00dev, 2, rf->rf2);
+ rt2800_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
+ rt2800_rf_write(rt2x00dev, 4, rf->rf4);
+
+ udelay(200);
+
+ rt2800_rf_write(rt2x00dev, 1, rf->rf1);
+ rt2800_rf_write(rt2x00dev, 2, rf->rf2);
+ rt2800_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
+ rt2800_rf_write(rt2x00dev, 4, rf->rf4);
+}
+
+static void rt2800_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_conf *conf,
+ struct rf_channel *rf,
+ struct channel_info *info)
+{
+ u8 rfcsr;
+
+ rt2800_rfcsr_write(rt2x00dev, 2, rf->rf1);
+ rt2800_rfcsr_write(rt2x00dev, 2, rf->rf3);
+
+ rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
+ rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 12, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
+ TXPOWER_G_TO_DEV(info->tx_power1));
+ rt2800_rfcsr_write(rt2x00dev, 12, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
+ rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
+
+ rt2800_rfcsr_write(rt2x00dev, 24,
+ rt2x00dev->calibration[conf_is_ht40(conf)]);
+
+ rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
+ rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
+}
+
+static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_conf *conf,
+ struct rf_channel *rf,
+ struct channel_info *info)
+{
+ u32 reg;
+ unsigned int tx_pin;
+ u8 bbp;
+
+ if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
+ rt2800_config_channel_rt2x(rt2x00dev, conf, rf, info);
+ else
+ rt2800_config_channel_rt3x(rt2x00dev, conf, rf, info);
+
+ /*
+ * Change BBP settings
+ */
+ rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
+ rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
+ rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
+ rt2800_bbp_write(rt2x00dev, 86, 0);
+
+ if (rf->channel <= 14) {
+ if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
+ rt2800_bbp_write(rt2x00dev, 82, 0x62);
+ rt2800_bbp_write(rt2x00dev, 75, 0x46);
+ } else {
+ rt2800_bbp_write(rt2x00dev, 82, 0x84);
+ rt2800_bbp_write(rt2x00dev, 75, 0x50);
+ }
+ } else {
+ rt2800_bbp_write(rt2x00dev, 82, 0xf2);
+
+ if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
+ rt2800_bbp_write(rt2x00dev, 75, 0x46);
+ else
+ rt2800_bbp_write(rt2x00dev, 75, 0x50);
+ }
+
+ rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
+ rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
+ rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
+ rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg);
+
+ tx_pin = 0;
+
+ /* Turn on unused PA or LNA when not using 1T or 1R */
+ if (rt2x00dev->default_ant.tx != 1) {
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
+ }
+
+ /* Turn on unused PA or LNA when not using 1T or 1R */
+ if (rt2x00dev->default_ant.rx != 1) {
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
+ }
+
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
+
+ rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
+
+ rt2800_bbp_read(rt2x00dev, 4, &bbp);
+ rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
+ rt2800_bbp_write(rt2x00dev, 4, bbp);
+
+ rt2800_bbp_read(rt2x00dev, 3, &bbp);
+ rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
+ rt2800_bbp_write(rt2x00dev, 3, bbp);
+
+ if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
+ if (conf_is_ht40(conf)) {
+ rt2800_bbp_write(rt2x00dev, 69, 0x1a);
+ rt2800_bbp_write(rt2x00dev, 70, 0x0a);
+ rt2800_bbp_write(rt2x00dev, 73, 0x16);
+ } else {
+ rt2800_bbp_write(rt2x00dev, 69, 0x16);
+ rt2800_bbp_write(rt2x00dev, 70, 0x08);
+ rt2800_bbp_write(rt2x00dev, 73, 0x11);
+ }
+ }
+
+ msleep(1);
+}
+
+static void rt2800_config_txpower(struct rt2x00_dev *rt2x00dev,
+ const int txpower)
+{
+ u32 reg;
+ u32 value = TXPOWER_G_TO_DEV(txpower);
+ u8 r1;
+
+ rt2800_bbp_read(rt2x00dev, 1, &r1);
+ rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
+ rt2800_bbp_write(rt2x00dev, 1, r1);
+
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
+
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
+
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
+
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
+
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
+ rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
+}
+
+static void rt2800_config_retry_limit(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf)
+{
+ u32 reg;
+
+ rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
+ libconf->conf->short_frame_max_tx_count);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
+ libconf->conf->long_frame_max_tx_count);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
+ rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
+ rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
+}
+
+static void rt2800_config_ps(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf)
+{
+ enum dev_state state =
+ (libconf->conf->flags & IEEE80211_CONF_PS) ?
+ STATE_SLEEP : STATE_AWAKE;
+ u32 reg;
+
+ if (state == STATE_SLEEP) {
+ rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
+
+ rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
+ libconf->conf->listen_interval - 1);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
+ rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
+
+ rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
+ } else {
+ rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
+
+ rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
+ rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
+ rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
+ }
+}
+
+void rt2800_config(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf,
+ const unsigned int flags)
+{
+ /* Always recalculate LNA gain before changing configuration */
+ rt2800_config_lna_gain(rt2x00dev, libconf);
+
+ if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
+ rt2800_config_channel(rt2x00dev, libconf->conf,
+ &libconf->rf, &libconf->channel);
+ if (flags & IEEE80211_CONF_CHANGE_POWER)
+ rt2800_config_txpower(rt2x00dev, libconf->conf->power_level);
+ if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
+ rt2800_config_retry_limit(rt2x00dev, libconf);
+ if (flags & IEEE80211_CONF_CHANGE_PS)
+ rt2800_config_ps(rt2x00dev, libconf);
+}
+EXPORT_SYMBOL_GPL(rt2800_config);
+
+/*
+ * Link tuning
+ */
+void rt2800_link_stats(struct rt2x00_dev *rt2x00dev, struct link_qual *qual)
+{
+ u32 reg;
+
+ /*
+ * Update FCS error count from register.
+ */
+ rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
+ qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
+}
+EXPORT_SYMBOL_GPL(rt2800_link_stats);
+
+static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
+{
+ if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
+ if (rt2x00_intf_is_usb(rt2x00dev) &&
+ rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION)
+ return 0x1c + (2 * rt2x00dev->lna_gain);
+ else
+ return 0x2e + rt2x00dev->lna_gain;
+ }
+
+ if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
+ return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
+ else
+ return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
+}
+
+static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev,
+ struct link_qual *qual, u8 vgc_level)
+{
+ if (qual->vgc_level != vgc_level) {
+ rt2800_bbp_write(rt2x00dev, 66, vgc_level);
+ qual->vgc_level = vgc_level;
+ qual->vgc_level_reg = vgc_level;
+ }
+}
+
+void rt2800_reset_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual)
+{
+ rt2800_set_vgc(rt2x00dev, qual, rt2800_get_default_vgc(rt2x00dev));
+}
+EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
+
+void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
+ const u32 count)
+{
+ if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION)
+ return;
+
+ /*
+ * When RSSI is better then -80 increase VGC level with 0x10
+ */
+ rt2800_set_vgc(rt2x00dev, qual,
+ rt2800_get_default_vgc(rt2x00dev) +
+ ((qual->rssi > -80) * 0x10));
+}
+EXPORT_SYMBOL_GPL(rt2800_link_tuner);
+
+/*
+ * Initialization functions.
+ */
+int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
+{
+ u32 reg;
+ unsigned int i;
+
+ if (rt2x00_intf_is_usb(rt2x00dev)) {
+ /*
+ * Wait untill BBP and RF are ready.
+ */
+ for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
+ rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
+ if (reg && reg != ~0)
+ break;
+ msleep(1);
+ }
+
+ if (i == REGISTER_BUSY_COUNT) {
+ ERROR(rt2x00dev, "Unstable hardware.\n");
+ return -EBUSY;
+ }
+
+ rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL,
+ reg & ~0x00002000);
+ } else if (rt2x00_intf_is_pci(rt2x00dev))
+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
+
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
+ rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+
+ if (rt2x00_intf_is_usb(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
+#ifdef CONFIG_RT2800USB
+ rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
+ USB_MODE_RESET, REGISTER_TIMEOUT);
+#endif
+ }
+
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
+
+ rt2800_register_read(rt2x00dev, BCN_OFFSET0, &reg);
+ rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
+ rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
+ rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
+ rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
+ rt2800_register_write(rt2x00dev, BCN_OFFSET0, reg);
+
+ rt2800_register_read(rt2x00dev, BCN_OFFSET1, &reg);
+ rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
+ rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
+ rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
+ rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
+ rt2800_register_write(rt2x00dev, BCN_OFFSET1, reg);
+
+ rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
+ rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
+
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
+ rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+
+ if (rt2x00_intf_is_usb(rt2x00dev) &&
+ rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+ } else {
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
+ }
+
+ rt2800_register_read(rt2x00dev, TX_LINK_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
+ rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
+ rt2800_register_write(rt2x00dev, TX_LINK_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
+ rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
+ rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
+ rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
+ if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
+ rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
+ rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
+ else
+ rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
+ rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
+ rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
+ rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
+
+ rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
+
+ rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
+ rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
+ rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+ rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
+ rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
+ rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
+
+ if (rt2x00_intf_is_usb(rt2x00dev)) {
+ rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006);
+
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 3);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
+ rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ }
+
+ rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
+ rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
+
+ rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
+ rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
+ IEEE80211_MAX_RTS_THRESHOLD);
+ rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
+ rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
+
+ rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
+
+ /*
+ * ASIC will keep garbage value after boot, clear encryption keys.
+ */
+ for (i = 0; i < 4; i++)
+ rt2800_register_write(rt2x00dev,
+ SHARED_KEY_MODE_ENTRY(i), 0);
+
+ for (i = 0; i < 256; i++) {
+ u32 wcid[2] = { 0xffffffff, 0x00ffffff };
+ rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
+ wcid, sizeof(wcid));
+
+ rt2800_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
+ rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
+ }
+
+ /*
+ * Clear all beacons
+ * For the Beacon base registers we only need to clear
+ * the first byte since that byte contains the VALID and OWNER
+ * bits which (when set to 0) will invalidate the entire beacon.
+ */
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
+ rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
+
+ if (rt2x00_intf_is_usb(rt2x00dev)) {
+ rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg);
+ rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
+ rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
+ }
+
+ rt2800_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
+ rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
+ rt2800_register_write(rt2x00dev, HT_FBK_CFG0, reg);
+
+ rt2800_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
+ rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
+ rt2800_register_write(rt2x00dev, HT_FBK_CFG1, reg);
+
+ rt2800_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
+ rt2800_register_write(rt2x00dev, LG_FBK_CFG0, reg);
+
+ rt2800_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
+ rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
+ rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg);
+
+ /*
+ * We must clear the error counters.
+ * These registers are cleared on read,
+ * so we may pass a useless variable to store the value.
+ */
+ rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
+ rt2800_register_read(rt2x00dev, RX_STA_CNT1, &reg);
+ rt2800_register_read(rt2x00dev, RX_STA_CNT2, &reg);
+ rt2800_register_read(rt2x00dev, TX_STA_CNT0, &reg);
+ rt2800_register_read(rt2x00dev, TX_STA_CNT1, &reg);
+ rt2800_register_read(rt2x00dev, TX_STA_CNT2, &reg);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2800_init_registers);
+
+static int rt2800_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
+{
+ unsigned int i;
+ u32 reg;
+
+ for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
+ rt2800_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
+ if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
+ return 0;
+
+ udelay(REGISTER_BUSY_DELAY);
+ }
+
+ ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
+ return -EACCES;
+}
+
+static int rt2800_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
+{
+ unsigned int i;
+ u8 value;
+
+ /*
+ * BBP was enabled after firmware was loaded,
+ * but we need to reactivate it now.
+ */
+ rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
+ msleep(1);
+
+ for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
+ rt2800_bbp_read(rt2x00dev, 0, &value);
+ if ((value != 0xff) && (value != 0x00))
+ return 0;
+ udelay(REGISTER_BUSY_DELAY);
+ }
+
+ ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
+ return -EACCES;
+}
+
+int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
+{
+ unsigned int i;
+ u16 eeprom;
+ u8 reg_id;
+ u8 value;
+
+ if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev) ||
+ rt2800_wait_bbp_ready(rt2x00dev)))
+ return -EACCES;
+
+ rt2800_bbp_write(rt2x00dev, 65, 0x2c);
+ rt2800_bbp_write(rt2x00dev, 66, 0x38);
+ rt2800_bbp_write(rt2x00dev, 69, 0x12);
+ rt2800_bbp_write(rt2x00dev, 70, 0x0a);
+ rt2800_bbp_write(rt2x00dev, 73, 0x10);
+ rt2800_bbp_write(rt2x00dev, 81, 0x37);
+ rt2800_bbp_write(rt2x00dev, 82, 0x62);
+ rt2800_bbp_write(rt2x00dev, 83, 0x6a);
+ rt2800_bbp_write(rt2x00dev, 84, 0x99);
+ rt2800_bbp_write(rt2x00dev, 86, 0x00);
+ rt2800_bbp_write(rt2x00dev, 91, 0x04);
+ rt2800_bbp_write(rt2x00dev, 92, 0x00);
+ rt2800_bbp_write(rt2x00dev, 103, 0x00);
+ rt2800_bbp_write(rt2x00dev, 105, 0x05);
+
+ if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
+ rt2800_bbp_write(rt2x00dev, 69, 0x16);
+ rt2800_bbp_write(rt2x00dev, 73, 0x12);
+ }
+
+ if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION)
+ rt2800_bbp_write(rt2x00dev, 84, 0x19);
+
+ if (rt2x00_intf_is_usb(rt2x00dev) &&
+ rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
+ rt2800_bbp_write(rt2x00dev, 70, 0x0a);
+ rt2800_bbp_write(rt2x00dev, 84, 0x99);
+ rt2800_bbp_write(rt2x00dev, 105, 0x05);
+ }
+
+ if (rt2x00_intf_is_pci(rt2x00dev) &&
+ rt2x00_rt(&rt2x00dev->chip, RT3052)) {
+ rt2800_bbp_write(rt2x00dev, 31, 0x08);
+ rt2800_bbp_write(rt2x00dev, 78, 0x0e);
+ rt2800_bbp_write(rt2x00dev, 80, 0x08);
+ }
+
+ for (i = 0; i < EEPROM_BBP_SIZE; i++) {
+ rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
+
+ if (eeprom != 0xffff && eeprom != 0x0000) {
+ reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
+ value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
+ rt2800_bbp_write(rt2x00dev, reg_id, value);
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2800_init_bbp);
+
+static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev,
+ bool bw40, u8 rfcsr24, u8 filter_target)
+{
+ unsigned int i;
+ u8 bbp;
+ u8 rfcsr;
+ u8 passband;
+ u8 stopband;
+ u8 overtuned = 0;
+
+ rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
+
+ rt2800_bbp_read(rt2x00dev, 4, &bbp);
+ rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
+ rt2800_bbp_write(rt2x00dev, 4, bbp);
+
+ rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
+ rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
+
+ /*
+ * Set power & frequency of passband test tone
+ */
+ rt2800_bbp_write(rt2x00dev, 24, 0);
+
+ for (i = 0; i < 100; i++) {
+ rt2800_bbp_write(rt2x00dev, 25, 0x90);
+ msleep(1);
+
+ rt2800_bbp_read(rt2x00dev, 55, &passband);
+ if (passband)
+ break;
+ }
+
+ /*
+ * Set power & frequency of stopband test tone
+ */
+ rt2800_bbp_write(rt2x00dev, 24, 0x06);
+
+ for (i = 0; i < 100; i++) {
+ rt2800_bbp_write(rt2x00dev, 25, 0x90);
+ msleep(1);
+
+ rt2800_bbp_read(rt2x00dev, 55, &stopband);
+
+ if ((passband - stopband) <= filter_target) {
+ rfcsr24++;
+ overtuned += ((passband - stopband) == filter_target);
+ } else
+ break;
+
+ rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
+ }
+
+ rfcsr24 -= !!overtuned;
+
+ rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
+ return rfcsr24;
+}
+
+int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
+{
+ u8 rfcsr;
+ u8 bbp;
+
+ if (rt2x00_intf_is_usb(rt2x00dev) &&
+ rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
+ return 0;
+
+ if (rt2x00_intf_is_pci(rt2x00dev)) {
+ if (!rt2x00_rf(&rt2x00dev->chip, RF3020) &&
+ !rt2x00_rf(&rt2x00dev->chip, RF3021) &&
+ !rt2x00_rf(&rt2x00dev->chip, RF3022))
+ return 0;
+ }
+
+ /*
+ * Init RF calibration.
+ */
+ rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
+ rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+ msleep(1);
+ rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
+ rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
+
+ if (rt2x00_intf_is_usb(rt2x00dev)) {
+ rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
+ rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
+ rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 7, 0x70);
+ rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
+ rt2800_rfcsr_write(rt2x00dev, 10, 0x71);
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+ rt2800_rfcsr_write(rt2x00dev, 12, 0x7b);
+ rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
+ rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
+ rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
+ rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
+ rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
+ rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
+ rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
+ rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
+ rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
+ rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
+ } else if (rt2x00_intf_is_pci(rt2x00dev)) {
+ rt2800_rfcsr_write(rt2x00dev, 0, 0x50);
+ rt2800_rfcsr_write(rt2x00dev, 1, 0x01);
+ rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);
+ rt2800_rfcsr_write(rt2x00dev, 3, 0x75);
+ rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
+ rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
+ rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 7, 0x50);
+ rt2800_rfcsr_write(rt2x00dev, 8, 0x39);
+ rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
+ rt2800_rfcsr_write(rt2x00dev, 10, 0x60);
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+ rt2800_rfcsr_write(rt2x00dev, 12, 0x75);
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x75);
+ rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
+ rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
+ rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
+ rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
+ rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
+ rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
+ rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
+ rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x31);
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x08);
+ rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
+ rt2800_rfcsr_write(rt2x00dev, 26, 0x25);
+ rt2800_rfcsr_write(rt2x00dev, 27, 0x23);
+ rt2800_rfcsr_write(rt2x00dev, 28, 0x13);
+ rt2800_rfcsr_write(rt2x00dev, 29, 0x83);
+ }
+
+ /*
+ * Set RX Filter calibration for 20MHz and 40MHz
+ */
+ rt2x00dev->calibration[0] =
+ rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
+ rt2x00dev->calibration[1] =
+ rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
+
+ /*
+ * Set back to initial state
+ */
+ rt2800_bbp_write(rt2x00dev, 24, 0);
+
+ rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
+ rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
+
+ /*
+ * set BBP back to BW20
+ */
+ rt2800_bbp_read(rt2x00dev, 4, &bbp);
+ rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
+ rt2800_bbp_write(rt2x00dev, 4, bbp);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
+
+/*
+ * IEEE80211 stack callback functions.
+ */
+static void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
+ u32 *iv32, u16 *iv16)
+{
+ struct rt2x00_dev *rt2x00dev = hw->priv;
+ struct mac_iveiv_entry iveiv_entry;
+ u32 offset;
+
+ offset = MAC_IVEIV_ENTRY(hw_key_idx);
+ rt2800_register_multiread(rt2x00dev, offset,
+ &iveiv_entry, sizeof(iveiv_entry));
+
+ memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
+ memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
+}
+
+static int rt2800_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
+{
+ struct rt2x00_dev *rt2x00dev = hw->priv;
+ u32 reg;
+ bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
+
+ rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
+ rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
+ rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
+ rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
+ rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
+
+ return 0;
+}
+
+static int rt2800_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
+ const struct ieee80211_tx_queue_params *params)
+{
+ struct rt2x00_dev *rt2x00dev = hw->priv;
+ struct data_queue *queue;
+ struct rt2x00_field32 field;
+ int retval;
+ u32 reg;
+ u32 offset;
+
+ /*
+ * First pass the configuration through rt2x00lib, that will
+ * update the queue settings and validate the input. After that
+ * we are free to update the registers based on the value
+ * in the queue parameter.
+ */
+ retval = rt2x00mac_conf_tx(hw, queue_idx, params);
+ if (retval)
+ return retval;
+
+ /*
+ * We only need to perform additional register initialization
+ * for WMM queues/
+ */
+ if (queue_idx >= 4)
+ return 0;
+
+ queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
+
+ /* Update WMM TXOP register */
+ offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
+ field.bit_offset = (queue_idx & 1) * 16;
+ field.bit_mask = 0xffff << field.bit_offset;
+
+ rt2800_register_read(rt2x00dev, offset, &reg);
+ rt2x00_set_field32(&reg, field, queue->txop);
+ rt2800_register_write(rt2x00dev, offset, reg);
+
+ /* Update WMM registers */
+ field.bit_offset = queue_idx * 4;
+ field.bit_mask = 0xf << field.bit_offset;
+
+ rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
+ rt2x00_set_field32(&reg, field, queue->aifs);
+ rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
+ rt2x00_set_field32(&reg, field, queue->cw_min);
+ rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
+
+ rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
+ rt2x00_set_field32(&reg, field, queue->cw_max);
+ rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
+
+ /* Update EDCA registers */
+ offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
+
+ rt2800_register_read(rt2x00dev, offset, &reg);
+ rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
+ rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
+ rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
+ rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
+ rt2800_register_write(rt2x00dev, offset, reg);
+
+ return 0;
+}
+
+static u64 rt2800_get_tsf(struct ieee80211_hw *hw)
+{
+ struct rt2x00_dev *rt2x00dev = hw->priv;
+ u64 tsf;
+ u32 reg;
+
+ rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
+ tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
+ rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
+ tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
+
+ return tsf;
+}
+
+const struct ieee80211_ops rt2800_mac80211_ops = {
+ .tx = rt2x00mac_tx,
+ .start = rt2x00mac_start,
+ .stop = rt2x00mac_stop,
+ .add_interface = rt2x00mac_add_interface,
+ .remove_interface = rt2x00mac_remove_interface,
+ .config = rt2x00mac_config,
+ .configure_filter = rt2x00mac_configure_filter,
+ .set_tim = rt2x00mac_set_tim,
+ .set_key = rt2x00mac_set_key,
+ .get_stats = rt2x00mac_get_stats,
+ .get_tkip_seq = rt2800_get_tkip_seq,
+ .set_rts_threshold = rt2800_set_rts_threshold,
+ .bss_info_changed = rt2x00mac_bss_info_changed,
+ .conf_tx = rt2800_conf_tx,
+ .get_tx_stats = rt2x00mac_get_tx_stats,
+ .get_tsf = rt2800_get_tsf,
+ .rfkill_poll = rt2x00mac_rfkill_poll,
+};
+EXPORT_SYMBOL_GPL(rt2800_mac80211_ops);
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h
new file mode 100644
index 00000000000..5eea8fcba6c
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800lib.h
@@ -0,0 +1,134 @@
+/*
+ Copyright (C) 2009 Bartlomiej Zolnierkiewicz
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the
+ Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef RT2800LIB_H
+#define RT2800LIB_H
+
+struct rt2800_ops {
+ void (*register_read)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset, u32 *value);
+ void (*register_write)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset, u32 value);
+ void (*register_write_lock)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset, u32 value);
+
+ void (*register_multiread)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ void *value, const u32 length);
+ void (*register_multiwrite)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const void *value, const u32 length);
+
+ int (*regbusy_read)(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const struct rt2x00_field32 field, u32 *reg);
+};
+
+static inline void rt2800_register_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ u32 *value)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ rt2800ops->register_read(rt2x00dev, offset, value);
+}
+
+static inline void rt2800_register_write(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ u32 value)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ rt2800ops->register_write(rt2x00dev, offset, value);
+}
+
+static inline void rt2800_register_write_lock(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ u32 value)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ rt2800ops->register_write_lock(rt2x00dev, offset, value);
+}
+
+static inline void rt2800_register_multiread(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ void *value, const u32 length)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ rt2800ops->register_multiread(rt2x00dev, offset, value, length);
+}
+
+static inline void rt2800_register_multiwrite(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const void *value,
+ const u32 length)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ rt2800ops->register_multiwrite(rt2x00dev, offset, value, length);
+}
+
+static inline int rt2800_regbusy_read(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const struct rt2x00_field32 field,
+ u32 *reg)
+{
+ const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
+
+ return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg);
+}
+
+void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
+ const u8 command, const u8 token,
+ const u8 arg0, const u8 arg1);
+
+extern const struct rt2x00debug rt2800_rt2x00debug;
+
+int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev);
+void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00_led *led, enum led_type type);
+int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key);
+int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_crypto *crypto,
+ struct ieee80211_key_conf *key);
+void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
+ const unsigned int filter_flags);
+void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
+ struct rt2x00intf_conf *conf, const unsigned int flags);
+void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp);
+void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant);
+void rt2800_config(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_conf *libconf,
+ const unsigned int flags);
+void rt2800_link_stats(struct rt2x00_dev *rt2x00dev, struct link_qual *qual);
+void rt2800_reset_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual);
+void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
+ const u32 count);
+
+int rt2800_init_registers(struct rt2x00_dev *rt2x00dev);
+int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev);
+int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev);
+
+extern const struct ieee80211_ops rt2800_mac80211_ops;
+
+#endif /* RT2800LIB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index be81788b80c..3c5b875cdee 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -37,6 +37,8 @@
#include "rt2x00.h"
#include "rt2x00pci.h"
#include "rt2x00soc.h"
+#include "rt2800lib.h"
+#include "rt2800.h"
#include "rt2800pci.h"
#ifdef CONFIG_RT2800PCI_PCI_MODULE
@@ -54,205 +56,13 @@ static int modparam_nohwcrypt = 1;
module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
-/*
- * Register access.
- * BBP and RF register require indirect register access,
- * and use the CSR registers PHY_CSR3 and PHY_CSR4 to achieve this.
- * These indirect registers work with busy bits,
- * and we will try maximal REGISTER_BUSY_COUNT times to access
- * the register while taking a REGISTER_BUSY_DELAY us delay
- * between each attampt. When the busy bit is still set at that time,
- * the access attempt is considered to have failed,
- * and we will print an error.
- */
-#define WAIT_FOR_BBP(__dev, __reg) \
- rt2x00pci_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
-#define WAIT_FOR_RFCSR(__dev, __reg) \
- rt2x00pci_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
-#define WAIT_FOR_RF(__dev, __reg) \
- rt2x00pci_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
-#define WAIT_FOR_MCU(__dev, __reg) \
- rt2x00pci_regbusy_read((__dev), H2M_MAILBOX_CSR, \
- H2M_MAILBOX_CSR_OWNER, (__reg))
-
-static void rt2800pci_bbp_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u8 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the BBP becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
-
- rt2x00pci_register_write(rt2x00dev, BBP_CSR_CFG, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800pci_bbp_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, u8 *value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the BBP becomes available, afterwards we
- * can safely write the read request into the register.
- * After the data has been written, we wait until hardware
- * returns the correct value, if at any time the register
- * doesn't become available in time, reg will be 0xffffffff
- * which means we return 0xff to the caller.
- */
- if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
-
- rt2x00pci_register_write(rt2x00dev, BBP_CSR_CFG, reg);
-
- WAIT_FOR_BBP(rt2x00dev, &reg);
- }
-
- *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u8 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RFCSR becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
- rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
- rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
-
- rt2x00pci_register_write(rt2x00dev, RF_CSR_CFG, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800pci_rfcsr_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, u8 *value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RFCSR becomes available, afterwards we
- * can safely write the read request into the register.
- * After the data has been written, we wait until hardware
- * returns the correct value, if at any time the register
- * doesn't become available in time, reg will be 0xffffffff
- * which means we return 0xff to the caller.
- */
- if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
-
- rt2x00pci_register_write(rt2x00dev, RF_CSR_CFG, reg);
-
- WAIT_FOR_RFCSR(rt2x00dev, &reg);
- }
-
- *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800pci_rf_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u32 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RF becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_RF(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
-
- rt2x00pci_register_write(rt2x00dev, RF_CSR_CFG0, reg);
- rt2x00_rf_write(rt2x00dev, word, value);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800pci_mcu_request(struct rt2x00_dev *rt2x00dev,
- const u8 command, const u8 token,
- const u8 arg0, const u8 arg1)
-{
- u32 reg;
-
- /*
- * RT2880 and RT3052 don't support MCU requests.
- */
- if (rt2x00_rt(&rt2x00dev->chip, RT2880) ||
- rt2x00_rt(&rt2x00dev->chip, RT3052))
- return;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the MCU becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
- rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_CSR, reg);
-
- reg = 0;
- rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
- rt2x00pci_register_write(rt2x00dev, HOST_CMD_CSR, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
{
unsigned int i;
u32 reg;
for (i = 0; i < 200; i++) {
- rt2x00pci_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
+ rt2800_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
(rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
@@ -266,8 +76,8 @@ static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
if (i == 200)
ERROR(rt2x00dev, "MCU request failed, no response from hardware\n");
- rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
- rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
}
#ifdef CONFIG_RT2800PCI_WISOC
@@ -289,7 +99,7 @@ static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
struct rt2x00_dev *rt2x00dev = eeprom->data;
u32 reg;
- rt2x00pci_register_read(rt2x00dev, E2PROM_CSR, &reg);
+ rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
@@ -311,7 +121,7 @@ static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
!!eeprom->reg_chip_select);
- rt2x00pci_register_write(rt2x00dev, E2PROM_CSR, reg);
+ rt2800_register_write(rt2x00dev, E2PROM_CSR, reg);
}
static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
@@ -319,7 +129,7 @@ static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
struct eeprom_93cx6 eeprom;
u32 reg;
- rt2x00pci_register_read(rt2x00dev, E2PROM_CSR, &reg);
+ rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
eeprom.data = rt2x00dev;
eeprom.register_read = rt2800pci_eepromregister_read;
@@ -340,23 +150,23 @@ static void rt2800pci_efuse_read(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
- rt2x00pci_register_read(rt2x00dev, EFUSE_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
rt2x00_set_field32(&reg, EFUSE_CTRL_ADDRESS_IN, i);
rt2x00_set_field32(&reg, EFUSE_CTRL_MODE, 0);
rt2x00_set_field32(&reg, EFUSE_CTRL_KICK, 1);
- rt2x00pci_register_write(rt2x00dev, EFUSE_CTRL, reg);
+ rt2800_register_write(rt2x00dev, EFUSE_CTRL, reg);
/* Wait until the EEPROM has been loaded */
- rt2x00pci_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
+ rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
/* Apparently the data is read from end to start */
- rt2x00pci_register_read(rt2x00dev, EFUSE_DATA3,
+ rt2800_register_read(rt2x00dev, EFUSE_DATA3,
(u32 *)&rt2x00dev->eeprom[i]);
- rt2x00pci_register_read(rt2x00dev, EFUSE_DATA2,
+ rt2800_register_read(rt2x00dev, EFUSE_DATA2,
(u32 *)&rt2x00dev->eeprom[i + 2]);
- rt2x00pci_register_read(rt2x00dev, EFUSE_DATA1,
+ rt2800_register_read(rt2x00dev, EFUSE_DATA1,
(u32 *)&rt2x00dev->eeprom[i + 4]);
- rt2x00pci_register_read(rt2x00dev, EFUSE_DATA0,
+ rt2800_register_read(rt2x00dev, EFUSE_DATA0,
(u32 *)&rt2x00dev->eeprom[i + 6]);
}
@@ -377,829 +187,6 @@ static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
}
#endif /* CONFIG_RT2800PCI_PCI */
-#ifdef CONFIG_RT2X00_LIB_DEBUGFS
-static const struct rt2x00debug rt2800pci_rt2x00debug = {
- .owner = THIS_MODULE,
- .csr = {
- .read = rt2x00pci_register_read,
- .write = rt2x00pci_register_write,
- .flags = RT2X00DEBUGFS_OFFSET,
- .word_base = CSR_REG_BASE,
- .word_size = sizeof(u32),
- .word_count = CSR_REG_SIZE / sizeof(u32),
- },
- .eeprom = {
- .read = rt2x00_eeprom_read,
- .write = rt2x00_eeprom_write,
- .word_base = EEPROM_BASE,
- .word_size = sizeof(u16),
- .word_count = EEPROM_SIZE / sizeof(u16),
- },
- .bbp = {
- .read = rt2800pci_bbp_read,
- .write = rt2800pci_bbp_write,
- .word_base = BBP_BASE,
- .word_size = sizeof(u8),
- .word_count = BBP_SIZE / sizeof(u8),
- },
- .rf = {
- .read = rt2x00_rf_read,
- .write = rt2800pci_rf_write,
- .word_base = RF_BASE,
- .word_size = sizeof(u32),
- .word_count = RF_SIZE / sizeof(u32),
- },
-};
-#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
-
-static int rt2800pci_rfkill_poll(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
- return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
-}
-
-#ifdef CONFIG_RT2X00_LIB_LEDS
-static void rt2800pci_brightness_set(struct led_classdev *led_cdev,
- enum led_brightness brightness)
-{
- struct rt2x00_led *led =
- container_of(led_cdev, struct rt2x00_led, led_dev);
- unsigned int enabled = brightness != LED_OFF;
- unsigned int bg_mode =
- (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
- unsigned int polarity =
- rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
- EEPROM_FREQ_LED_POLARITY);
- unsigned int ledmode =
- rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
- EEPROM_FREQ_LED_MODE);
-
- if (led->type == LED_TYPE_RADIO) {
- rt2800pci_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
- enabled ? 0x20 : 0);
- } else if (led->type == LED_TYPE_ASSOC) {
- rt2800pci_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
- enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
- } else if (led->type == LED_TYPE_QUALITY) {
- /*
- * The brightness is divided into 6 levels (0 - 5),
- * The specs tell us the following levels:
- * 0, 1 ,3, 7, 15, 31
- * to determine the level in a simple way we can simply
- * work with bitshifting:
- * (1 << level) - 1
- */
- rt2800pci_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
- (1 << brightness / (LED_FULL / 6)) - 1,
- polarity);
- }
-}
-
-static int rt2800pci_blink_set(struct led_classdev *led_cdev,
- unsigned long *delay_on,
- unsigned long *delay_off)
-{
- struct rt2x00_led *led =
- container_of(led_cdev, struct rt2x00_led, led_dev);
- u32 reg;
-
- rt2x00pci_register_read(led->rt2x00dev, LED_CFG, &reg);
- rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
- rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
- rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
- rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
- rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
- rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
- rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
- rt2x00pci_register_write(led->rt2x00dev, LED_CFG, reg);
-
- return 0;
-}
-
-static void rt2800pci_init_led(struct rt2x00_dev *rt2x00dev,
- struct rt2x00_led *led,
- enum led_type type)
-{
- led->rt2x00dev = rt2x00dev;
- led->type = type;
- led->led_dev.brightness_set = rt2800pci_brightness_set;
- led->led_dev.blink_set = rt2800pci_blink_set;
- led->flags = LED_INITIALIZED;
-}
-#endif /* CONFIG_RT2X00_LIB_LEDS */
-
-/*
- * Configuration handlers.
- */
-static void rt2800pci_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct mac_wcid_entry wcid_entry;
- struct mac_iveiv_entry iveiv_entry;
- u32 offset;
- u32 reg;
-
- offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
-
- rt2x00pci_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
- !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
- (crypto->cmd == SET_KEY) * crypto->cipher);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
- (crypto->cmd == SET_KEY) * crypto->bssidx);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
- rt2x00pci_register_write(rt2x00dev, offset, reg);
-
- offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
-
- memset(&iveiv_entry, 0, sizeof(iveiv_entry));
- if ((crypto->cipher == CIPHER_TKIP) ||
- (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
- (crypto->cipher == CIPHER_AES))
- iveiv_entry.iv[3] |= 0x20;
- iveiv_entry.iv[3] |= key->keyidx << 6;
- rt2x00pci_register_multiwrite(rt2x00dev, offset,
- &iveiv_entry, sizeof(iveiv_entry));
-
- offset = MAC_WCID_ENTRY(key->hw_key_idx);
-
- memset(&wcid_entry, 0, sizeof(wcid_entry));
- if (crypto->cmd == SET_KEY)
- memcpy(&wcid_entry, crypto->address, ETH_ALEN);
- rt2x00pci_register_multiwrite(rt2x00dev, offset,
- &wcid_entry, sizeof(wcid_entry));
-}
-
-static int rt2800pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct hw_key_entry key_entry;
- struct rt2x00_field32 field;
- u32 offset;
- u32 reg;
-
- if (crypto->cmd == SET_KEY) {
- key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
-
- memcpy(key_entry.key, crypto->key,
- sizeof(key_entry.key));
- memcpy(key_entry.tx_mic, crypto->tx_mic,
- sizeof(key_entry.tx_mic));
- memcpy(key_entry.rx_mic, crypto->rx_mic,
- sizeof(key_entry.rx_mic));
-
- offset = SHARED_KEY_ENTRY(key->hw_key_idx);
- rt2x00pci_register_multiwrite(rt2x00dev, offset,
- &key_entry, sizeof(key_entry));
- }
-
- /*
- * The cipher types are stored over multiple registers
- * starting with SHARED_KEY_MODE_BASE each word will have
- * 32 bits and contains the cipher types for 2 bssidx each.
- * Using the correct defines correctly will cause overhead,
- * so just calculate the correct offset.
- */
- field.bit_offset = 4 * (key->hw_key_idx % 8);
- field.bit_mask = 0x7 << field.bit_offset;
-
- offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
-
- rt2x00pci_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, field,
- (crypto->cmd == SET_KEY) * crypto->cipher);
- rt2x00pci_register_write(rt2x00dev, offset, reg);
-
- /*
- * Update WCID information
- */
- rt2800pci_config_wcid_attr(rt2x00dev, crypto, key);
-
- return 0;
-}
-
-static int rt2800pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct hw_key_entry key_entry;
- u32 offset;
-
- if (crypto->cmd == SET_KEY) {
- /*
- * 1 pairwise key is possible per AID, this means that the AID
- * equals our hw_key_idx. Make sure the WCID starts _after_ the
- * last possible shared key entry.
- */
- if (crypto->aid > (256 - 32))
- return -ENOSPC;
-
- key->hw_key_idx = 32 + crypto->aid;
-
-
- memcpy(key_entry.key, crypto->key,
- sizeof(key_entry.key));
- memcpy(key_entry.tx_mic, crypto->tx_mic,
- sizeof(key_entry.tx_mic));
- memcpy(key_entry.rx_mic, crypto->rx_mic,
- sizeof(key_entry.rx_mic));
-
- offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
- rt2x00pci_register_multiwrite(rt2x00dev, offset,
- &key_entry, sizeof(key_entry));
- }
-
- /*
- * Update WCID information
- */
- rt2800pci_config_wcid_attr(rt2x00dev, crypto, key);
-
- return 0;
-}
-
-static void rt2800pci_config_filter(struct rt2x00_dev *rt2x00dev,
- const unsigned int filter_flags)
-{
- u32 reg;
-
- /*
- * Start configuration steps.
- * Note that the version error will always be dropped
- * and broadcast frames will always be accepted since
- * there is no filter for it at this time.
- */
- rt2x00pci_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
- !(filter_flags & FIF_FCSFAIL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
- !(filter_flags & FIF_PLCPFAIL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
- !(filter_flags & FIF_PROMISC_IN_BSS));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
- !(filter_flags & FIF_ALLMULTI));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
- !(filter_flags & FIF_PSPOLL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
- !(filter_flags & FIF_CONTROL));
- rt2x00pci_register_write(rt2x00dev, RX_FILTER_CFG, reg);
-}
-
-static void rt2800pci_config_intf(struct rt2x00_dev *rt2x00dev,
- struct rt2x00_intf *intf,
- struct rt2x00intf_conf *conf,
- const unsigned int flags)
-{
- unsigned int beacon_base;
- u32 reg;
-
- if (flags & CONFIG_UPDATE_TYPE) {
- /*
- * Clear current synchronisation setup.
- * For the Beacon base registers we only need to clear
- * the first byte since that byte contains the VALID and OWNER
- * bits which (when set to 0) will invalidate the entire beacon.
- */
- beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
- rt2x00pci_register_write(rt2x00dev, beacon_base, 0);
-
- /*
- * Enable synchronisation.
- */
- rt2x00pci_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
- }
-
- if (flags & CONFIG_UPDATE_MAC) {
- reg = le32_to_cpu(conf->mac[1]);
- rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
- conf->mac[1] = cpu_to_le32(reg);
-
- rt2x00pci_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
- conf->mac, sizeof(conf->mac));
- }
-
- if (flags & CONFIG_UPDATE_BSSID) {
- reg = le32_to_cpu(conf->bssid[1]);
- rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
- rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
- conf->bssid[1] = cpu_to_le32(reg);
-
- rt2x00pci_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
- conf->bssid, sizeof(conf->bssid));
- }
-}
-
-static void rt2800pci_config_erp(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_erp *erp)
-{
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
- rt2x00pci_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
- !!erp->short_preamble);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
- !!erp->short_preamble);
- rt2x00pci_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
- erp->cts_protection ? 2 : 0);
- rt2x00pci_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, LEGACY_BASIC_RATE,
- erp->basic_rates);
- rt2x00pci_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
-
- rt2x00pci_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
- rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
- rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
- rt2x00pci_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
- rt2x00pci_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
- erp->beacon_int * 16);
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
-}
-
-static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
- struct antenna_setup *ant)
-{
- u8 r1;
- u8 r3;
-
- rt2800pci_bbp_read(rt2x00dev, 1, &r1);
- rt2800pci_bbp_read(rt2x00dev, 3, &r3);
-
- /*
- * Configure the TX antenna.
- */
- switch ((int)ant->tx) {
- case 1:
- rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
- break;
- case 2:
- rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
- break;
- case 3:
- /* Do nothing */
- break;
- }
-
- /*
- * Configure the RX antenna.
- */
- switch ((int)ant->rx) {
- case 1:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
- break;
- case 2:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
- break;
- case 3:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
- break;
- }
-
- rt2800pci_bbp_write(rt2x00dev, 3, r3);
- rt2800pci_bbp_write(rt2x00dev, 1, r1);
-}
-
-static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- u16 eeprom;
- short lna_gain;
-
- if (libconf->rf.channel <= 14) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
- } else if (libconf->rf.channel <= 64) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
- } else if (libconf->rf.channel <= 128) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
- } else {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
- }
-
- rt2x00dev->lna_gain = lna_gain;
-}
-
-static void rt2800pci_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
-
- if (rt2x00dev->default_ant.tx == 1)
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
-
- if (rt2x00dev->default_ant.rx == 1) {
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
- } else if (rt2x00dev->default_ant.rx == 2)
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
-
- if (rf->channel > 14) {
- /*
- * When TX power is below 0, we should increase it by 7 to
- * make it a positive value (Minumum value is -7).
- * However this means that values between 0 and 7 have
- * double meaning, and we should set a 7DBm boost flag.
- */
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
- (info->tx_power1 >= 0));
-
- if (info->tx_power1 < 0)
- info->tx_power1 += 7;
-
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
- TXPOWER_A_TO_DEV(info->tx_power1));
-
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
- (info->tx_power2 >= 0));
-
- if (info->tx_power2 < 0)
- info->tx_power2 += 7;
-
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
- TXPOWER_A_TO_DEV(info->tx_power2));
- } else {
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
- TXPOWER_G_TO_DEV(info->tx_power1));
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
- TXPOWER_G_TO_DEV(info->tx_power2));
- }
-
- rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
-
- rt2800pci_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800pci_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
- rt2800pci_rf_write(rt2x00dev, 4, rf->rf4);
-
- udelay(200);
-
- rt2800pci_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800pci_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800pci_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
- rt2800pci_rf_write(rt2x00dev, 4, rf->rf4);
-
- udelay(200);
-
- rt2800pci_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800pci_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
- rt2800pci_rf_write(rt2x00dev, 4, rf->rf4);
-}
-
-static void rt2800pci_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- u8 rfcsr;
-
- rt2800pci_rfcsr_write(rt2x00dev, 2, rf->rf1);
- rt2800pci_rfcsr_write(rt2x00dev, 2, rf->rf3);
-
- rt2800pci_rfcsr_read(rt2x00dev, 6, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
- rt2800pci_rfcsr_write(rt2x00dev, 6, rfcsr);
-
- rt2800pci_rfcsr_read(rt2x00dev, 12, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
- TXPOWER_G_TO_DEV(info->tx_power1));
- rt2800pci_rfcsr_write(rt2x00dev, 12, rfcsr);
-
- rt2800pci_rfcsr_read(rt2x00dev, 23, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
- rt2800pci_rfcsr_write(rt2x00dev, 23, rfcsr);
-
- rt2800pci_rfcsr_write(rt2x00dev, 24,
- rt2x00dev->calibration[conf_is_ht40(conf)]);
-
- rt2800pci_rfcsr_read(rt2x00dev, 23, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
- rt2800pci_rfcsr_write(rt2x00dev, 23, rfcsr);
-}
-
-static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- u32 reg;
- unsigned int tx_pin;
- u8 bbp;
-
- if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
- rt2800pci_config_channel_rt2x(rt2x00dev, conf, rf, info);
- else
- rt2800pci_config_channel_rt3x(rt2x00dev, conf, rf, info);
-
- /*
- * Change BBP settings
- */
- rt2800pci_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
- rt2800pci_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
- rt2800pci_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
- rt2800pci_bbp_write(rt2x00dev, 86, 0);
-
- if (rf->channel <= 14) {
- if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
- rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
- rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
- } else {
- rt2800pci_bbp_write(rt2x00dev, 82, 0x84);
- rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
- }
- } else {
- rt2800pci_bbp_write(rt2x00dev, 82, 0xf2);
-
- if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
- rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
- else
- rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
- }
-
- rt2x00pci_register_read(rt2x00dev, TX_BAND_CFG, &reg);
- rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
- rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
- rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
- rt2x00pci_register_write(rt2x00dev, TX_BAND_CFG, reg);
-
- tx_pin = 0;
-
- /* Turn on unused PA or LNA when not using 1T or 1R */
- if (rt2x00dev->default_ant.tx != 1) {
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
- }
-
- /* Turn on unused PA or LNA when not using 1T or 1R */
- if (rt2x00dev->default_ant.rx != 1) {
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
- }
-
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
-
- rt2x00pci_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
-
- rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
- rt2800pci_bbp_write(rt2x00dev, 4, bbp);
-
- rt2800pci_bbp_read(rt2x00dev, 3, &bbp);
- rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
- rt2800pci_bbp_write(rt2x00dev, 3, bbp);
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
- if (conf_is_ht40(conf)) {
- rt2800pci_bbp_write(rt2x00dev, 69, 0x1a);
- rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
- rt2800pci_bbp_write(rt2x00dev, 73, 0x16);
- } else {
- rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
- rt2800pci_bbp_write(rt2x00dev, 70, 0x08);
- rt2800pci_bbp_write(rt2x00dev, 73, 0x11);
- }
- }
-
- msleep(1);
-}
-
-static void rt2800pci_config_txpower(struct rt2x00_dev *rt2x00dev,
- const int txpower)
-{
- u32 reg;
- u32 value = TXPOWER_G_TO_DEV(txpower);
- u8 r1;
-
- rt2800pci_bbp_read(rt2x00dev, 1, &r1);
- rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
- rt2800pci_bbp_write(rt2x00dev, 1, r1);
-
- rt2x00pci_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
- rt2x00pci_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
-
- rt2x00pci_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
- rt2x00pci_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
-
- rt2x00pci_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
- rt2x00pci_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
-
- rt2x00pci_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
- rt2x00pci_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
-
- rt2x00pci_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
- rt2x00pci_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
-}
-
-static void rt2800pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, TX_RTY_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
- libconf->conf->short_frame_max_tx_count);
- rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
- libconf->conf->long_frame_max_tx_count);
- rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
- rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
- rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
- rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
- rt2x00pci_register_write(rt2x00dev, TX_RTY_CFG, reg);
-}
-
-static void rt2800pci_config_ps(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- enum dev_state state =
- (libconf->conf->flags & IEEE80211_CONF_PS) ?
- STATE_SLEEP : STATE_AWAKE;
- u32 reg;
-
- if (state == STATE_SLEEP) {
- rt2x00pci_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
-
- rt2x00pci_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
- libconf->conf->listen_interval - 1);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
- rt2x00pci_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
-
- rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
- } else {
- rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
-
- rt2x00pci_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
- rt2x00pci_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
- }
-}
-
-static void rt2800pci_config(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf,
- const unsigned int flags)
-{
- /* Always recalculate LNA gain before changing configuration */
- rt2800pci_config_lna_gain(rt2x00dev, libconf);
-
- if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
- rt2800pci_config_channel(rt2x00dev, libconf->conf,
- &libconf->rf, &libconf->channel);
- if (flags & IEEE80211_CONF_CHANGE_POWER)
- rt2800pci_config_txpower(rt2x00dev, libconf->conf->power_level);
- if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
- rt2800pci_config_retry_limit(rt2x00dev, libconf);
- if (flags & IEEE80211_CONF_CHANGE_PS)
- rt2800pci_config_ps(rt2x00dev, libconf);
-}
-
-/*
- * Link tuning
- */
-static void rt2800pci_link_stats(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual)
-{
- u32 reg;
-
- /*
- * Update FCS error count from register.
- */
- rt2x00pci_register_read(rt2x00dev, RX_STA_CNT0, &reg);
- qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
-}
-
-static u8 rt2800pci_get_default_vgc(struct rt2x00_dev *rt2x00dev)
-{
- if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ)
- return 0x2e + rt2x00dev->lna_gain;
-
- if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
- return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
- else
- return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
-}
-
-static inline void rt2800pci_set_vgc(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual, u8 vgc_level)
-{
- if (qual->vgc_level != vgc_level) {
- rt2800pci_bbp_write(rt2x00dev, 66, vgc_level);
- qual->vgc_level = vgc_level;
- qual->vgc_level_reg = vgc_level;
- }
-}
-
-static void rt2800pci_reset_tuner(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual)
-{
- rt2800pci_set_vgc(rt2x00dev, qual,
- rt2800pci_get_default_vgc(rt2x00dev));
-}
-
-static void rt2800pci_link_tuner(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual, const u32 count)
-{
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION)
- return;
-
- /*
- * When RSSI is better then -80 increase VGC level with 0x10
- */
- rt2800pci_set_vgc(rt2x00dev, qual,
- rt2800pci_get_default_vgc(rt2x00dev) +
- ((qual->rssi > -80) * 0x10));
-}
-
/*
* Firmware functions
*/
@@ -1257,7 +244,7 @@ static int rt2800pci_load_firmware(struct rt2x00_dev *rt2x00dev,
* Wait for stable hardware.
*/
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
+ rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
if (reg && reg != ~0)
break;
msleep(1);
@@ -1268,42 +255,42 @@ static int rt2800pci_load_firmware(struct rt2x00_dev *rt2x00dev,
return -EBUSY;
}
- rt2x00pci_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002);
- rt2x00pci_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0x00000000);
+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002);
+ rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0x00000000);
/*
* Disable DMA, will be reenabled later when enabling
* the radio.
*/
- rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
/*
* enable Host program ram write selection
*/
reg = 0;
rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
/*
* Write firmware to device.
*/
- rt2x00pci_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
+ rt2800_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
data, len);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
/*
* Wait for device to stabilize.
*/
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00pci_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
break;
msleep(1);
@@ -1322,8 +309,8 @@ static int rt2800pci_load_firmware(struct rt2x00_dev *rt2x00dev,
/*
* Initialize BBP R/W access agent
*/
- rt2x00pci_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
- rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
+ rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
return 0;
}
@@ -1373,7 +360,7 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
struct queue_entry_priv_pci *entry_priv;
u32 reg;
- rt2x00pci_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
@@ -1381,539 +368,54 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
/*
* Initialize registers.
*/
entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
- rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR0, entry_priv->desc_dma);
- rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT0, rt2x00dev->tx[0].limit);
- rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX0, 0);
- rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX0, 0);
+ rt2800_register_write(rt2x00dev, TX_BASE_PTR0, entry_priv->desc_dma);
+ rt2800_register_write(rt2x00dev, TX_MAX_CNT0, rt2x00dev->tx[0].limit);
+ rt2800_register_write(rt2x00dev, TX_CTX_IDX0, 0);
+ rt2800_register_write(rt2x00dev, TX_DTX_IDX0, 0);
entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
- rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR1, entry_priv->desc_dma);
- rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT1, rt2x00dev->tx[1].limit);
- rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX1, 0);
- rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX1, 0);
+ rt2800_register_write(rt2x00dev, TX_BASE_PTR1, entry_priv->desc_dma);
+ rt2800_register_write(rt2x00dev, TX_MAX_CNT1, rt2x00dev->tx[1].limit);
+ rt2800_register_write(rt2x00dev, TX_CTX_IDX1, 0);
+ rt2800_register_write(rt2x00dev, TX_DTX_IDX1, 0);
entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
- rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR2, entry_priv->desc_dma);
- rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT2, rt2x00dev->tx[2].limit);
- rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX2, 0);
- rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX2, 0);
+ rt2800_register_write(rt2x00dev, TX_BASE_PTR2, entry_priv->desc_dma);
+ rt2800_register_write(rt2x00dev, TX_MAX_CNT2, rt2x00dev->tx[2].limit);
+ rt2800_register_write(rt2x00dev, TX_CTX_IDX2, 0);
+ rt2800_register_write(rt2x00dev, TX_DTX_IDX2, 0);
entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
- rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR3, entry_priv->desc_dma);
- rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT3, rt2x00dev->tx[3].limit);
- rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX3, 0);
- rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX3, 0);
+ rt2800_register_write(rt2x00dev, TX_BASE_PTR3, entry_priv->desc_dma);
+ rt2800_register_write(rt2x00dev, TX_MAX_CNT3, rt2x00dev->tx[3].limit);
+ rt2800_register_write(rt2x00dev, TX_CTX_IDX3, 0);
+ rt2800_register_write(rt2x00dev, TX_DTX_IDX3, 0);
entry_priv = rt2x00dev->rx->entries[0].priv_data;
- rt2x00pci_register_write(rt2x00dev, RX_BASE_PTR, entry_priv->desc_dma);
- rt2x00pci_register_write(rt2x00dev, RX_MAX_CNT, rt2x00dev->rx[0].limit);
- rt2x00pci_register_write(rt2x00dev, RX_CRX_IDX, rt2x00dev->rx[0].limit - 1);
- rt2x00pci_register_write(rt2x00dev, RX_DRX_IDX, 0);
+ rt2800_register_write(rt2x00dev, RX_BASE_PTR, entry_priv->desc_dma);
+ rt2800_register_write(rt2x00dev, RX_MAX_CNT, rt2x00dev->rx[0].limit);
+ rt2800_register_write(rt2x00dev, RX_CRX_IDX, rt2x00dev->rx[0].limit - 1);
+ rt2800_register_write(rt2x00dev, RX_DRX_IDX, 0);
/*
* Enable global DMA configuration
*/
- rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, DELAY_INT_CFG, 0);
-
- return 0;
-}
-
-static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
- unsigned int i;
-
- rt2x00pci_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
-
- rt2x00pci_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
- rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
- rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
-
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
-
- rt2x00pci_register_read(rt2x00dev, BCN_OFFSET0, &reg);
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
- rt2x00pci_register_write(rt2x00dev, BCN_OFFSET0, reg);
-
- rt2x00pci_register_read(rt2x00dev, BCN_OFFSET1, &reg);
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
- rt2x00pci_register_write(rt2x00dev, BCN_OFFSET1, reg);
-
- rt2x00pci_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
- rt2x00pci_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
-
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
-
- rt2x00pci_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
- rt2x00pci_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
-
- rt2x00pci_register_read(rt2x00dev, TX_LINK_CFG, &reg);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
- rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
- rt2x00pci_register_write(rt2x00dev, TX_LINK_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
- rt2x00pci_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
- if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
- rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
- else
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
- rt2x00pci_register_write(rt2x00dev, MAX_LEN_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
-
- rt2x00pci_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
- rt2x00pci_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00pci_register_write(rt2x00dev, CCK_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00pci_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00pci_register_write(rt2x00dev, MM20_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00pci_register_write(rt2x00dev, MM40_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00pci_register_write(rt2x00dev, GF20_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00pci_register_write(rt2x00dev, GF40_PROT_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
- rt2x00pci_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
-
- rt2x00pci_register_read(rt2x00dev, TX_RTS_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
- IEEE80211_MAX_RTS_THRESHOLD);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
- rt2x00pci_register_write(rt2x00dev, TX_RTS_CFG, reg);
-
- rt2x00pci_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
- rt2x00pci_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
-
- /*
- * ASIC will keep garbage value after boot, clear encryption keys.
- */
- for (i = 0; i < 4; i++)
- rt2x00pci_register_write(rt2x00dev,
- SHARED_KEY_MODE_ENTRY(i), 0);
-
- for (i = 0; i < 256; i++) {
- u32 wcid[2] = { 0xffffffff, 0x00ffffff };
- rt2x00pci_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
- wcid, sizeof(wcid));
-
- rt2x00pci_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
- rt2x00pci_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
- }
-
- /*
- * Clear all beacons
- * For the Beacon base registers we only need to clear
- * the first byte since that byte contains the VALID and OWNER
- * bits which (when set to 0) will invalidate the entire beacon.
- */
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
- rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
-
- rt2x00pci_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
- rt2x00pci_register_write(rt2x00dev, HT_FBK_CFG0, reg);
-
- rt2x00pci_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
- rt2x00pci_register_write(rt2x00dev, HT_FBK_CFG1, reg);
-
- rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
- rt2x00pci_register_write(rt2x00dev, LG_FBK_CFG0, reg);
-
- rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
- rt2x00pci_register_write(rt2x00dev, LG_FBK_CFG1, reg);
-
- /*
- * We must clear the error counters.
- * These registers are cleared on read,
- * so we may pass a useless variable to store the value.
- */
- rt2x00pci_register_read(rt2x00dev, RX_STA_CNT0, &reg);
- rt2x00pci_register_read(rt2x00dev, RX_STA_CNT1, &reg);
- rt2x00pci_register_read(rt2x00dev, RX_STA_CNT2, &reg);
- rt2x00pci_register_read(rt2x00dev, TX_STA_CNT0, &reg);
- rt2x00pci_register_read(rt2x00dev, TX_STA_CNT1, &reg);
- rt2x00pci_register_read(rt2x00dev, TX_STA_CNT2, &reg);
-
- return 0;
-}
-
-static int rt2800pci_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u32 reg;
-
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00pci_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
- if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
- return 0;
-
- udelay(REGISTER_BUSY_DELAY);
- }
-
- ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
- return -EACCES;
-}
-
-static int rt2800pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u8 value;
-
- /*
- * BBP was enabled after firmware was loaded,
- * but we need to reactivate it now.
- */
- rt2x00pci_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
- rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
- msleep(1);
-
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2800pci_bbp_read(rt2x00dev, 0, &value);
- if ((value != 0xff) && (value != 0x00))
- return 0;
- udelay(REGISTER_BUSY_DELAY);
- }
-
- ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
- return -EACCES;
-}
-
-static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u16 eeprom;
- u8 reg_id;
- u8 value;
-
- if (unlikely(rt2800pci_wait_bbp_rf_ready(rt2x00dev) ||
- rt2800pci_wait_bbp_ready(rt2x00dev)))
- return -EACCES;
-
- rt2800pci_bbp_write(rt2x00dev, 65, 0x2c);
- rt2800pci_bbp_write(rt2x00dev, 66, 0x38);
- rt2800pci_bbp_write(rt2x00dev, 69, 0x12);
- rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
- rt2800pci_bbp_write(rt2x00dev, 73, 0x10);
- rt2800pci_bbp_write(rt2x00dev, 81, 0x37);
- rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
- rt2800pci_bbp_write(rt2x00dev, 83, 0x6a);
- rt2800pci_bbp_write(rt2x00dev, 84, 0x99);
- rt2800pci_bbp_write(rt2x00dev, 86, 0x00);
- rt2800pci_bbp_write(rt2x00dev, 91, 0x04);
- rt2800pci_bbp_write(rt2x00dev, 92, 0x00);
- rt2800pci_bbp_write(rt2x00dev, 103, 0x00);
- rt2800pci_bbp_write(rt2x00dev, 105, 0x05);
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
- rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
- rt2800pci_bbp_write(rt2x00dev, 73, 0x12);
- }
-
- if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION)
- rt2800pci_bbp_write(rt2x00dev, 84, 0x19);
-
- if (rt2x00_rt(&rt2x00dev->chip, RT3052)) {
- rt2800pci_bbp_write(rt2x00dev, 31, 0x08);
- rt2800pci_bbp_write(rt2x00dev, 78, 0x0e);
- rt2800pci_bbp_write(rt2x00dev, 80, 0x08);
- }
-
- for (i = 0; i < EEPROM_BBP_SIZE; i++) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
-
- if (eeprom != 0xffff && eeprom != 0x0000) {
- reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
- value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
- rt2800pci_bbp_write(rt2x00dev, reg_id, value);
- }
- }
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
- return 0;
-}
-
-static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
- bool bw40, u8 rfcsr24, u8 filter_target)
-{
- unsigned int i;
- u8 bbp;
- u8 rfcsr;
- u8 passband;
- u8 stopband;
- u8 overtuned = 0;
-
- rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);
-
- rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
- rt2800pci_bbp_write(rt2x00dev, 4, bbp);
-
- rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
- rt2800pci_rfcsr_write(rt2x00dev, 22, rfcsr);
-
- /*
- * Set power & frequency of passband test tone
- */
- rt2800pci_bbp_write(rt2x00dev, 24, 0);
-
- for (i = 0; i < 100; i++) {
- rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
- msleep(1);
-
- rt2800pci_bbp_read(rt2x00dev, 55, &passband);
- if (passband)
- break;
- }
-
- /*
- * Set power & frequency of stopband test tone
- */
- rt2800pci_bbp_write(rt2x00dev, 24, 0x06);
-
- for (i = 0; i < 100; i++) {
- rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
- msleep(1);
-
- rt2800pci_bbp_read(rt2x00dev, 55, &stopband);
-
- if ((passband - stopband) <= filter_target) {
- rfcsr24++;
- overtuned += ((passband - stopband) == filter_target);
- } else
- break;
-
- rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);
- }
-
- rfcsr24 -= !!overtuned;
-
- rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);
- return rfcsr24;
-}
-
-static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
-{
- u8 rfcsr;
- u8 bbp;
-
- if (!rt2x00_rf(&rt2x00dev->chip, RF3020) &&
- !rt2x00_rf(&rt2x00dev->chip, RF3021) &&
- !rt2x00_rf(&rt2x00dev->chip, RF3022))
- return 0;
-
- /*
- * Init RF calibration.
- */
- rt2800pci_rfcsr_read(rt2x00dev, 30, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
- rt2800pci_rfcsr_write(rt2x00dev, 30, rfcsr);
- msleep(1);
- rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
- rt2800pci_rfcsr_write(rt2x00dev, 30, rfcsr);
-
- rt2800pci_rfcsr_write(rt2x00dev, 0, 0x50);
- rt2800pci_rfcsr_write(rt2x00dev, 1, 0x01);
- rt2800pci_rfcsr_write(rt2x00dev, 2, 0xf7);
- rt2800pci_rfcsr_write(rt2x00dev, 3, 0x75);
- rt2800pci_rfcsr_write(rt2x00dev, 4, 0x40);
- rt2800pci_rfcsr_write(rt2x00dev, 5, 0x03);
- rt2800pci_rfcsr_write(rt2x00dev, 6, 0x02);
- rt2800pci_rfcsr_write(rt2x00dev, 7, 0x50);
- rt2800pci_rfcsr_write(rt2x00dev, 8, 0x39);
- rt2800pci_rfcsr_write(rt2x00dev, 9, 0x0f);
- rt2800pci_rfcsr_write(rt2x00dev, 10, 0x60);
- rt2800pci_rfcsr_write(rt2x00dev, 11, 0x21);
- rt2800pci_rfcsr_write(rt2x00dev, 12, 0x75);
- rt2800pci_rfcsr_write(rt2x00dev, 13, 0x75);
- rt2800pci_rfcsr_write(rt2x00dev, 14, 0x90);
- rt2800pci_rfcsr_write(rt2x00dev, 15, 0x58);
- rt2800pci_rfcsr_write(rt2x00dev, 16, 0xb3);
- rt2800pci_rfcsr_write(rt2x00dev, 17, 0x92);
- rt2800pci_rfcsr_write(rt2x00dev, 18, 0x2c);
- rt2800pci_rfcsr_write(rt2x00dev, 19, 0x02);
- rt2800pci_rfcsr_write(rt2x00dev, 20, 0xba);
- rt2800pci_rfcsr_write(rt2x00dev, 21, 0xdb);
- rt2800pci_rfcsr_write(rt2x00dev, 22, 0x00);
- rt2800pci_rfcsr_write(rt2x00dev, 23, 0x31);
- rt2800pci_rfcsr_write(rt2x00dev, 24, 0x08);
- rt2800pci_rfcsr_write(rt2x00dev, 25, 0x01);
- rt2800pci_rfcsr_write(rt2x00dev, 26, 0x25);
- rt2800pci_rfcsr_write(rt2x00dev, 27, 0x23);
- rt2800pci_rfcsr_write(rt2x00dev, 28, 0x13);
- rt2800pci_rfcsr_write(rt2x00dev, 29, 0x83);
-
- /*
- * Set RX Filter calibration for 20MHz and 40MHz
- */
- rt2x00dev->calibration[0] =
- rt2800pci_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
- rt2x00dev->calibration[1] =
- rt2800pci_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
-
- /*
- * Set back to initial state
- */
- rt2800pci_bbp_write(rt2x00dev, 24, 0);
-
- rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
- rt2800pci_rfcsr_write(rt2x00dev, 22, rfcsr);
-
- /*
- * set BBP back to BW20
- */
- rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
- rt2800pci_bbp_write(rt2x00dev, 4, bbp);
+ rt2800_register_write(rt2x00dev, DELAY_INT_CFG, 0);
return 0;
}
@@ -1926,11 +428,11 @@ static void rt2800pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
- rt2x00pci_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
(state == STATE_RADIO_RX_ON) ||
(state == STATE_RADIO_RX_ON_LINK));
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
}
static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
@@ -1944,11 +446,11 @@ static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
* should clear the register to assure a clean state.
*/
if (state == STATE_RADIO_IRQ_ON) {
- rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
- rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
+ rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
+ rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
}
- rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, &reg);
+ rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask);
@@ -1967,7 +469,7 @@ static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, mask);
rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, mask);
- rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
+ rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
}
static int rt2800pci_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
@@ -1976,7 +478,7 @@ static int rt2800pci_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
u32 reg;
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
!rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
return 0;
@@ -1998,50 +500,50 @@ static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
*/
if (unlikely(rt2800pci_wait_wpdma_ready(rt2x00dev) ||
rt2800pci_init_queues(rt2x00dev) ||
- rt2800pci_init_registers(rt2x00dev) ||
+ rt2800_init_registers(rt2x00dev) ||
rt2800pci_wait_wpdma_ready(rt2x00dev) ||
- rt2800pci_init_bbp(rt2x00dev) ||
- rt2800pci_init_rfcsr(rt2x00dev)))
+ rt2800_init_bbp(rt2x00dev) ||
+ rt2800_init_rfcsr(rt2x00dev)))
return -EIO;
/*
* Send signal to firmware during boot time.
*/
- rt2800pci_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
+ rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
/*
* Enable RX.
*/
- rt2x00pci_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
- rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 2);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
- rt2x00pci_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
/*
* Initialize LED control
*/
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
- rt2800pci_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
word & 0xff, (word >> 8) & 0xff);
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
- rt2800pci_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
word & 0xff, (word >> 8) & 0xff);
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
- rt2800pci_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
word & 0xff, (word >> 8) & 0xff);
return 0;
@@ -2051,21 +553,21 @@ static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
{
u32 reg;
- rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
- rt2x00pci_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
- rt2x00pci_register_write(rt2x00dev, PWR_PIN_CFG, 0);
- rt2x00pci_register_write(rt2x00dev, TX_PIN_CFG, 0);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
+ rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001280);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001280);
- rt2x00pci_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
@@ -2073,10 +575,10 @@ static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
- rt2x00pci_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
- rt2x00pci_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
+ rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
/* Wait for DMA, ignore error */
rt2800pci_wait_wpdma_ready(rt2x00dev);
@@ -2090,10 +592,10 @@ static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
* if the device is booting and wasn't asleep it will return
* failure when attempting to wakeup.
*/
- rt2800pci_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
+ rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
if (state == STATE_AWAKE) {
- rt2800pci_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKUP, 0, 0);
+ rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKUP, 0, 0);
rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKUP);
}
@@ -2195,7 +697,7 @@ static void rt2800pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
- (skbdesc->entry->entry_idx + 1) : 0xff);
+ txdesc->key_idx : 0xff);
rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
skb->len - txdesc->l2pad);
rt2x00_set_field32(&word, TXWI_W1_PACKETID,
@@ -2204,8 +706,8 @@ static void rt2800pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
/*
* Always write 0 to IV/EIV fields, hardware will insert the IV
- * from the IVEIV register when ENTRY_TXD_ENCRYPT_IV is set to 0.
- * When ENTRY_TXD_ENCRYPT_IV is set to 1 it will use the IV data
+ * from the IVEIV register when TXD_W3_WIV is set to 0.
+ * When TXD_W3_WIV is set to 1 it will use the IV data
* from the descriptor. The TXWI_W1_WIRELESS_CLI_ID indicates which
* crypto entry in the registers should be used to encrypt the frame.
*/
@@ -2265,18 +767,18 @@ static void rt2800pci_write_beacon(struct queue_entry *entry)
* Disable beaconing while we are reloading the beacon data,
* otherwise we might be sending out invalid data.
*/
- rt2x00pci_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
/*
* Write entire beacon with descriptor to register.
*/
beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
- rt2x00pci_register_multiwrite(rt2x00dev,
+ rt2800_register_multiwrite(rt2x00dev,
beacon_base,
skbdesc->desc, skbdesc->desc_len);
- rt2x00pci_register_multiwrite(rt2x00dev,
+ rt2800_register_multiwrite(rt2x00dev,
beacon_base + skbdesc->desc_len,
entry->skb->data, entry->skb->len);
@@ -2295,12 +797,12 @@ static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
u32 reg;
if (queue_idx == QID_BEACON) {
- rt2x00pci_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
}
return;
}
@@ -2316,7 +818,7 @@ static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
else
qidx = queue_idx;
- rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX(qidx), idx);
+ rt2800_register_write(rt2x00dev, TX_CTX_IDX(qidx), idx);
}
static void rt2800pci_kill_tx_queue(struct rt2x00_dev *rt2x00dev,
@@ -2325,16 +827,16 @@ static void rt2800pci_kill_tx_queue(struct rt2x00_dev *rt2x00dev,
u32 reg;
if (qid == QID_BEACON) {
- rt2x00pci_register_write(rt2x00dev, BCN_TIME_CFG, 0);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, 0);
return;
}
- rt2x00pci_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, (qid == QID_AC_BE));
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, (qid == QID_AC_BK));
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, (qid == QID_AC_VI));
rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, (qid == QID_AC_VO));
- rt2x00pci_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
}
/*
@@ -2430,7 +932,7 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
* Set RX IDX in register to inform hardware that we have handled
* this entry and it is available for reuse again.
*/
- rt2x00pci_register_write(rt2x00dev, RX_CRX_IDX, entry->entry_idx);
+ rt2800_register_write(rt2x00dev, RX_CRX_IDX, entry->entry_idx);
/*
* Remove TXWI descriptor from start of buffer.
@@ -2467,7 +969,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
old_reg = 0;
while (1) {
- rt2x00pci_register_read(rt2x00dev, TX_STA_FIFO, &reg);
+ rt2800_register_read(rt2x00dev, TX_STA_FIFO, &reg);
if (!rt2x00_get_field32(reg, TX_STA_FIFO_VALID))
break;
@@ -2551,8 +1053,8 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
u32 reg;
/* Read status and ACK all interrupts */
- rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
- rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
+ rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
+ rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
if (!reg)
return IRQ_NONE;
@@ -2709,7 +1211,7 @@ static int rt2800pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
* Identify RF chipset.
*/
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
- rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
+ rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
rt2x00_set_chip_rf(rt2x00dev, value, reg);
if (!rt2x00_rf(&rt2x00dev->chip, RF2820) &&
@@ -2758,9 +1260,9 @@ static int rt2800pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
* Store led settings, for correct led behaviour.
*/
#ifdef CONFIG_RT2X00_LIB_LEDS
- rt2800pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
- rt2800pci_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
- rt2800pci_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &rt2x00dev->led_mcu_reg);
#endif /* CONFIG_RT2X00_LIB_LEDS */
@@ -2948,10 +1450,25 @@ static int rt2800pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
return 0;
}
+static const struct rt2800_ops rt2800pci_rt2800_ops = {
+ .register_read = rt2x00pci_register_read,
+ .register_write = rt2x00pci_register_write,
+ .register_write_lock = rt2x00pci_register_write, /* same for PCI */
+
+ .register_multiread = rt2x00pci_register_multiread,
+ .register_multiwrite = rt2x00pci_register_multiwrite,
+
+ .regbusy_read = rt2x00pci_regbusy_read,
+};
+
static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
{
int retval;
+ rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
+
+ rt2x00dev->priv = (void *)&rt2800pci_rt2800_ops;
+
/*
* Allocate eeprom data.
*/
@@ -2996,161 +1513,6 @@ static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
return 0;
}
-/*
- * IEEE80211 stack callback functions.
- */
-static void rt2800pci_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
- u32 *iv32, u16 *iv16)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- struct mac_iveiv_entry iveiv_entry;
- u32 offset;
-
- offset = MAC_IVEIV_ENTRY(hw_key_idx);
- rt2x00pci_register_multiread(rt2x00dev, offset,
- &iveiv_entry, sizeof(iveiv_entry));
-
- memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
- memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
-}
-
-static int rt2800pci_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- u32 reg;
- bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
-
- rt2x00pci_register_read(rt2x00dev, TX_RTS_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
- rt2x00pci_register_write(rt2x00dev, TX_RTS_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, CCK_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, MM20_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, MM40_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, GF20_PROT_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00pci_register_write(rt2x00dev, GF40_PROT_CFG, reg);
-
- return 0;
-}
-
-static int rt2800pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
- const struct ieee80211_tx_queue_params *params)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- struct data_queue *queue;
- struct rt2x00_field32 field;
- int retval;
- u32 reg;
- u32 offset;
-
- /*
- * First pass the configuration through rt2x00lib, that will
- * update the queue settings and validate the input. After that
- * we are free to update the registers based on the value
- * in the queue parameter.
- */
- retval = rt2x00mac_conf_tx(hw, queue_idx, params);
- if (retval)
- return retval;
-
- /*
- * We only need to perform additional register initialization
- * for WMM queues/
- */
- if (queue_idx >= 4)
- return 0;
-
- queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
-
- /* Update WMM TXOP register */
- offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
- field.bit_offset = (queue_idx & 1) * 16;
- field.bit_mask = 0xffff << field.bit_offset;
-
- rt2x00pci_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, field, queue->txop);
- rt2x00pci_register_write(rt2x00dev, offset, reg);
-
- /* Update WMM registers */
- field.bit_offset = queue_idx * 4;
- field.bit_mask = 0xf << field.bit_offset;
-
- rt2x00pci_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->aifs);
- rt2x00pci_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->cw_min);
- rt2x00pci_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
-
- rt2x00pci_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->cw_max);
- rt2x00pci_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
-
- /* Update EDCA registers */
- offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
-
- rt2x00pci_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
- rt2x00pci_register_write(rt2x00dev, offset, reg);
-
- return 0;
-}
-
-static u64 rt2800pci_get_tsf(struct ieee80211_hw *hw)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- u64 tsf;
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
- tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
- rt2x00pci_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
- tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
-
- return tsf;
-}
-
-static const struct ieee80211_ops rt2800pci_mac80211_ops = {
- .tx = rt2x00mac_tx,
- .start = rt2x00mac_start,
- .stop = rt2x00mac_stop,
- .add_interface = rt2x00mac_add_interface,
- .remove_interface = rt2x00mac_remove_interface,
- .config = rt2x00mac_config,
- .configure_filter = rt2x00mac_configure_filter,
- .set_key = rt2x00mac_set_key,
- .get_stats = rt2x00mac_get_stats,
- .get_tkip_seq = rt2800pci_get_tkip_seq,
- .set_rts_threshold = rt2800pci_set_rts_threshold,
- .bss_info_changed = rt2x00mac_bss_info_changed,
- .conf_tx = rt2800pci_conf_tx,
- .get_tx_stats = rt2x00mac_get_tx_stats,
- .get_tsf = rt2800pci_get_tsf,
- .rfkill_poll = rt2x00mac_rfkill_poll,
-};
-
static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
.irq_handler = rt2800pci_interrupt,
.probe_hw = rt2800pci_probe_hw,
@@ -3162,23 +1524,23 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
.get_entry_state = rt2800pci_get_entry_state,
.clear_entry = rt2800pci_clear_entry,
.set_device_state = rt2800pci_set_device_state,
- .rfkill_poll = rt2800pci_rfkill_poll,
- .link_stats = rt2800pci_link_stats,
- .reset_tuner = rt2800pci_reset_tuner,
- .link_tuner = rt2800pci_link_tuner,
+ .rfkill_poll = rt2800_rfkill_poll,
+ .link_stats = rt2800_link_stats,
+ .reset_tuner = rt2800_reset_tuner,
+ .link_tuner = rt2800_link_tuner,
.write_tx_desc = rt2800pci_write_tx_desc,
.write_tx_data = rt2x00pci_write_tx_data,
.write_beacon = rt2800pci_write_beacon,
.kick_tx_queue = rt2800pci_kick_tx_queue,
.kill_tx_queue = rt2800pci_kill_tx_queue,
.fill_rxdone = rt2800pci_fill_rxdone,
- .config_shared_key = rt2800pci_config_shared_key,
- .config_pairwise_key = rt2800pci_config_pairwise_key,
- .config_filter = rt2800pci_config_filter,
- .config_intf = rt2800pci_config_intf,
- .config_erp = rt2800pci_config_erp,
- .config_ant = rt2800pci_config_ant,
- .config = rt2800pci_config,
+ .config_shared_key = rt2800_config_shared_key,
+ .config_pairwise_key = rt2800_config_pairwise_key,
+ .config_filter = rt2800_config_filter,
+ .config_intf = rt2800_config_intf,
+ .config_erp = rt2800_config_erp,
+ .config_ant = rt2800_config_ant,
+ .config = rt2800_config,
};
static const struct data_queue_desc rt2800pci_queue_rx = {
@@ -3213,9 +1575,9 @@ static const struct rt2x00_ops rt2800pci_ops = {
.tx = &rt2800pci_queue_tx,
.bcn = &rt2800pci_queue_bcn,
.lib = &rt2800pci_rt2x00_ops,
- .hw = &rt2800pci_mac80211_ops,
+ .hw = &rt2800_mac80211_ops,
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
- .debugfs = &rt2800pci_rt2x00debug,
+ .debugfs = &rt2800_rt2x00debug,
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
};
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.h b/drivers/net/wireless/rt2x00/rt2800pci.h
index 85690881522..1dbf13270cd 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.h
+++ b/drivers/net/wireless/rt2x00/rt2800pci.h
@@ -28,61 +28,6 @@
#define RT2800PCI_H
/*
- * RF chip defines.
- *
- * RF2820 2.4G 2T3R
- * RF2850 2.4G/5G 2T3R
- * RF2720 2.4G 1T2R
- * RF2750 2.4G/5G 1T2R
- * RF3020 2.4G 1T1R
- * RF2020 2.4G B/G
- * RF3021 2.4G 1T2R
- * RF3022 2.4G 2T2R
- * RF3052 2.4G 2T2R
- */
-#define RF2820 0x0001
-#define RF2850 0x0002
-#define RF2720 0x0003
-#define RF2750 0x0004
-#define RF3020 0x0005
-#define RF2020 0x0006
-#define RF3021 0x0007
-#define RF3022 0x0008
-#define RF3052 0x0009
-
-/*
- * RT2860 version
- */
-#define RT2860C_VERSION 0x28600100
-#define RT2860D_VERSION 0x28600101
-#define RT2880E_VERSION 0x28720200
-#define RT2883_VERSION 0x28830300
-#define RT3070_VERSION 0x30700200
-
-/*
- * Signal information.
- * Default offset is required for RSSI <-> dBm conversion.
- */
-#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
-
-/*
- * Register layout information.
- */
-#define CSR_REG_BASE 0x1000
-#define CSR_REG_SIZE 0x0800
-#define EEPROM_BASE 0x0000
-#define EEPROM_SIZE 0x0110
-#define BBP_BASE 0x0000
-#define BBP_SIZE 0x0080
-#define RF_BASE 0x0004
-#define RF_SIZE 0x0010
-
-/*
- * Number of TX queues.
- */
-#define NUM_TX_QUEUES 4
-
-/*
* PCI registers.
*/
@@ -102,215 +47,6 @@
#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
/*
- * INT_SOURCE_CSR: Interrupt source register.
- * Write one to clear corresponding bit.
- * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
- */
-#define INT_SOURCE_CSR 0x0200
-#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
-#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
-#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
-#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
-#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
-#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
-#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
-#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
-#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
-#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
-#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
-#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
-#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
-#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
-#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
-#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
-#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
-#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
-
-/*
- * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
- */
-#define INT_MASK_CSR 0x0204
-#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
-#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
-#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
-#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
-#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
-#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
-#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
-#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
-#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
-#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
-#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
-#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
-#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
-#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
-#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
-#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
-#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
-#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
-
-/*
- * WPDMA_GLO_CFG
- */
-#define WPDMA_GLO_CFG 0x0208
-#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
-#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
-#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
-#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
-#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
-#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
-#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
-#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
-#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
-
-/*
- * WPDMA_RST_IDX
- */
-#define WPDMA_RST_IDX 0x020c
-#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
-#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
-#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
-#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
-#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
-#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
-#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
-
-/*
- * DELAY_INT_CFG
- */
-#define DELAY_INT_CFG 0x0210
-#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
-#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
-#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
-#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
-#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
-#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
-
-/*
- * WMM_AIFSN_CFG: Aifsn for each EDCA AC
- * AIFSN0: AC_BE
- * AIFSN1: AC_BK
- * AIFSN1: AC_VI
- * AIFSN1: AC_VO
- */
-#define WMM_AIFSN_CFG 0x0214
-#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
-#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
-#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
-#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
-
-/*
- * WMM_CWMIN_CSR: CWmin for each EDCA AC
- * CWMIN0: AC_BE
- * CWMIN1: AC_BK
- * CWMIN1: AC_VI
- * CWMIN1: AC_VO
- */
-#define WMM_CWMIN_CFG 0x0218
-#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
-#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
-#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
-#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
-
-/*
- * WMM_CWMAX_CSR: CWmax for each EDCA AC
- * CWMAX0: AC_BE
- * CWMAX1: AC_BK
- * CWMAX1: AC_VI
- * CWMAX1: AC_VO
- */
-#define WMM_CWMAX_CFG 0x021c
-#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
-#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
-#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
-#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
-
-/*
- * AC_TXOP0: AC_BK/AC_BE TXOP register
- * AC0TXOP: AC_BK in unit of 32us
- * AC1TXOP: AC_BE in unit of 32us
- */
-#define WMM_TXOP0_CFG 0x0220
-#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
-#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
-
-/*
- * AC_TXOP1: AC_VO/AC_VI TXOP register
- * AC2TXOP: AC_VI in unit of 32us
- * AC3TXOP: AC_VO in unit of 32us
- */
-#define WMM_TXOP1_CFG 0x0224
-#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
-#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
-
-/*
- * GPIO_CTRL_CFG:
- */
-#define GPIO_CTRL_CFG 0x0228
-#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
-#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
-#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
-#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
-#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
-#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
-#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
-#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
-#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
-
-/*
- * MCU_CMD_CFG
- */
-#define MCU_CMD_CFG 0x022c
-
-/*
- * AC_BK register offsets
- */
-#define TX_BASE_PTR0 0x0230
-#define TX_MAX_CNT0 0x0234
-#define TX_CTX_IDX0 0x0238
-#define TX_DTX_IDX0 0x023c
-
-/*
- * AC_BE register offsets
- */
-#define TX_BASE_PTR1 0x0240
-#define TX_MAX_CNT1 0x0244
-#define TX_CTX_IDX1 0x0248
-#define TX_DTX_IDX1 0x024c
-
-/*
- * AC_VI register offsets
- */
-#define TX_BASE_PTR2 0x0250
-#define TX_MAX_CNT2 0x0254
-#define TX_CTX_IDX2 0x0258
-#define TX_DTX_IDX2 0x025c
-
-/*
- * AC_VO register offsets
- */
-#define TX_BASE_PTR3 0x0260
-#define TX_MAX_CNT3 0x0264
-#define TX_CTX_IDX3 0x0268
-#define TX_DTX_IDX3 0x026c
-
-/*
- * HCCA register offsets
- */
-#define TX_BASE_PTR4 0x0270
-#define TX_MAX_CNT4 0x0274
-#define TX_CTX_IDX4 0x0278
-#define TX_DTX_IDX4 0x027c
-
-/*
- * MGMT register offsets
- */
-#define TX_BASE_PTR5 0x0280
-#define TX_MAX_CNT5 0x0284
-#define TX_CTX_IDX5 0x0288
-#define TX_DTX_IDX5 0x028c
-
-/*
* Queue register offset macros
*/
#define TX_QUEUE_REG_OFFSET 0x10
@@ -320,72 +56,6 @@
#define TX_DTX_IDX(__x) TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)
/*
- * RX register offsets
- */
-#define RX_BASE_PTR 0x0290
-#define RX_MAX_CNT 0x0294
-#define RX_CRX_IDX 0x0298
-#define RX_DRX_IDX 0x029c
-
-/*
- * PBF_SYS_CTRL
- * HOST_RAM_WRITE: enable Host program ram write selection
- */
-#define PBF_SYS_CTRL 0x0400
-#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
-#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
-
-/*
- * HOST-MCU shared memory
- */
-#define HOST_CMD_CSR 0x0404
-#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
-
-/*
- * PBF registers
- * Most are for debug. Driver doesn't touch PBF register.
- */
-#define PBF_CFG 0x0408
-#define PBF_MAX_PCNT 0x040c
-#define PBF_CTRL 0x0410
-#define PBF_INT_STA 0x0414
-#define PBF_INT_ENA 0x0418
-
-/*
- * BCN_OFFSET0:
- */
-#define BCN_OFFSET0 0x042c
-#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
-#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
-#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
-#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
-
-/*
- * BCN_OFFSET1:
- */
-#define BCN_OFFSET1 0x0430
-#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
-#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
-#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
-#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
-
-/*
- * PBF registers
- * Most are for debug. Driver doesn't touch PBF register.
- */
-#define TXRXQ_PCNT 0x0438
-#define PBF_DBG 0x043c
-
-/*
- * RF registers
- */
-#define RF_CSR_CFG 0x0500
-#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
-#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
-#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
-#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
-
-/*
* EFUSE_CSR: RT3090 EEPROM
*/
#define EFUSE_CTRL 0x0580
@@ -414,1360 +84,16 @@
#define EFUSE_DATA3 0x059c
/*
- * MAC Control/Status Registers(CSR).
- * Some values are set in TU, whereas 1 TU == 1024 us.
- */
-
-/*
- * MAC_CSR0: ASIC revision number.
- * ASIC_REV: 0
- * ASIC_VER: 2860
- */
-#define MAC_CSR0 0x1000
-#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
-#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
-
-/*
- * MAC_SYS_CTRL:
- */
-#define MAC_SYS_CTRL 0x1004
-#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
-#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
-#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
-#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
-#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
-#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
-#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
-#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
-
-/*
- * MAC_ADDR_DW0: STA MAC register 0
- */
-#define MAC_ADDR_DW0 0x1008
-#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
-#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
-#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
-#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
-
-/*
- * MAC_ADDR_DW1: STA MAC register 1
- * UNICAST_TO_ME_MASK:
- * Used to mask off bits from byte 5 of the MAC address
- * to determine the UNICAST_TO_ME bit for RX frames.
- * The full mask is complemented by BSS_ID_MASK:
- * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
- */
-#define MAC_ADDR_DW1 0x100c
-#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
-#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
-#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
-
-/*
- * MAC_BSSID_DW0: BSSID register 0
- */
-#define MAC_BSSID_DW0 0x1010
-#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
-#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
-#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
-#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
-
-/*
- * MAC_BSSID_DW1: BSSID register 1
- * BSS_ID_MASK:
- * 0: 1-BSSID mode (BSS index = 0)
- * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
- * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
- * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
- * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
- * BSSID. This will make sure that those bits will be ignored
- * when determining the MY_BSS of RX frames.
- */
-#define MAC_BSSID_DW1 0x1014
-#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
-#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
-#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
-#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
-
-/*
- * MAX_LEN_CFG: Maximum frame length register.
- * MAX_MPDU: rt2860b max 16k bytes
- * MAX_PSDU: Maximum PSDU length
- * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
- */
-#define MAX_LEN_CFG 0x1018
-#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
-#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
-#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
-#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
-
-/*
- * BBP_CSR_CFG: BBP serial control register
- * VALUE: Register value to program into BBP
- * REG_NUM: Selected BBP register
- * READ_CONTROL: 0 write BBP, 1 read BBP
- * BUSY: ASIC is busy executing BBP commands
- * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
- * BBP_RW_MODE: 0 serial, 1 paralell
- */
-#define BBP_CSR_CFG 0x101c
-#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
-#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
-#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
-#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
-#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
-#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
-
-/*
- * RF_CSR_CFG0: RF control register
- * REGID_AND_VALUE: Register value to program into RF
- * BITWIDTH: Selected RF register
- * STANDBYMODE: 0 high when standby, 1 low when standby
- * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
- * BUSY: ASIC is busy executing RF commands
- */
-#define RF_CSR_CFG0 0x1020
-#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
-#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
-#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
-#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
-#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
-#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
-
-/*
- * RF_CSR_CFG1: RF control register
- * REGID_AND_VALUE: Register value to program into RF
- * RFGAP: Gap between BB_CONTROL_RF and RF_LE
- * 0: 3 system clock cycle (37.5usec)
- * 1: 5 system clock cycle (62.5usec)
- */
-#define RF_CSR_CFG1 0x1024
-#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
-#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
-
-/*
- * RF_CSR_CFG2: RF control register
- * VALUE: Register value to program into RF
- * RFGAP: Gap between BB_CONTROL_RF and RF_LE
- * 0: 3 system clock cycle (37.5usec)
- * 1: 5 system clock cycle (62.5usec)
- */
-#define RF_CSR_CFG2 0x1028
-#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
-
-/*
- * LED_CFG: LED control
- * color LED's:
- * 0: off
- * 1: blinking upon TX2
- * 2: periodic slow blinking
- * 3: always on
- * LED polarity:
- * 0: active low
- * 1: active high
- */
-#define LED_CFG 0x102c
-#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
-#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
-#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
-#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
-#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
-#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
-#define LED_CFG_LED_POLAR FIELD32(0x40000000)
-
-/*
- * XIFS_TIME_CFG: MAC timing
- * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
- * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
- * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
- * when MAC doesn't reference BBP signal BBRXEND
- * EIFS: unit 1us
- * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
- *
- */
-#define XIFS_TIME_CFG 0x1100
-#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
-#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
-#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
-#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
-#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
-
-/*
- * BKOFF_SLOT_CFG:
- */
-#define BKOFF_SLOT_CFG 0x1104
-#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
-#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
-
-/*
- * NAV_TIME_CFG:
- */
-#define NAV_TIME_CFG 0x1108
-#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
-#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
-#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
-#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
-
-/*
- * CH_TIME_CFG: count as channel busy
- */
-#define CH_TIME_CFG 0x110c
-
-/*
- * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
- */
-#define PBF_LIFE_TIMER 0x1110
-
-/*
- * BCN_TIME_CFG:
- * BEACON_INTERVAL: in unit of 1/16 TU
- * TSF_TICKING: Enable TSF auto counting
- * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
- * BEACON_GEN: Enable beacon generator
- */
-#define BCN_TIME_CFG 0x1114
-#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
-#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
-#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
-#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
-#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
-#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
-
-/*
- * TBTT_SYNC_CFG:
- */
-#define TBTT_SYNC_CFG 0x1118
-
-/*
- * TSF_TIMER_DW0: Local lsb TSF timer, read-only
- */
-#define TSF_TIMER_DW0 0x111c
-#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
-
-/*
- * TSF_TIMER_DW1: Local msb TSF timer, read-only
- */
-#define TSF_TIMER_DW1 0x1120
-#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
-
-/*
- * TBTT_TIMER: TImer remains till next TBTT, read-only
- */
-#define TBTT_TIMER 0x1124
-
-/*
- * INT_TIMER_CFG:
- */
-#define INT_TIMER_CFG 0x1128
-
-/*
- * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
- */
-#define INT_TIMER_EN 0x112c
-
-/*
- * CH_IDLE_STA: channel idle time
- */
-#define CH_IDLE_STA 0x1130
-
-/*
- * CH_BUSY_STA: channel busy time
- */
-#define CH_BUSY_STA 0x1134
-
-/*
- * MAC_STATUS_CFG:
- * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
- * if 1 or higher one of the 2 registers is busy.
- */
-#define MAC_STATUS_CFG 0x1200
-#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
-
-/*
- * PWR_PIN_CFG:
- */
-#define PWR_PIN_CFG 0x1204
-
-/*
- * AUTOWAKEUP_CFG: Manual power control / status register
- * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
- * AUTOWAKE: 0:sleep, 1:awake
- */
-#define AUTOWAKEUP_CFG 0x1208
-#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
-#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
-#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
-
-/*
- * EDCA_AC0_CFG:
- */
-#define EDCA_AC0_CFG 0x1300
-#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC1_CFG:
- */
-#define EDCA_AC1_CFG 0x1304
-#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC2_CFG:
- */
-#define EDCA_AC2_CFG 0x1308
-#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC3_CFG:
- */
-#define EDCA_AC3_CFG 0x130c
-#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_TID_AC_MAP:
- */
-#define EDCA_TID_AC_MAP 0x1310
-
-/*
- * TX_PWR_CFG_0:
- */
-#define TX_PWR_CFG_0 0x1314
-#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
-#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
-#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
-#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
-#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
-#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
-#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
-#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_1:
- */
-#define TX_PWR_CFG_1 0x1318
-#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
-#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
-#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
-#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
-#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
-#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
-#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
-#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_2:
- */
-#define TX_PWR_CFG_2 0x131c
-#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
-#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
-#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
-#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
-#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
-#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
-#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
-#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_3:
- */
-#define TX_PWR_CFG_3 0x1320
-#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
-#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
-#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
-#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
-#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
-#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
-#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
-#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_4:
- */
-#define TX_PWR_CFG_4 0x1324
-#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
-#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
-#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
-#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
-
-/*
- * TX_PIN_CFG:
- */
-#define TX_PIN_CFG 0x1328
-#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
-#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
-#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
-#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
-#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
-#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
-#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
-#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
-#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
-#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
-#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
-#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
-#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
-#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
-#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
-#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
-#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
-#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
-#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
-#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
-
-/*
- * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
- */
-#define TX_BAND_CFG 0x132c
-#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
-#define TX_BAND_CFG_A FIELD32(0x00000002)
-#define TX_BAND_CFG_BG FIELD32(0x00000004)
-
-/*
- * TX_SW_CFG0:
- */
-#define TX_SW_CFG0 0x1330
-
-/*
- * TX_SW_CFG1:
- */
-#define TX_SW_CFG1 0x1334
-
-/*
- * TX_SW_CFG2:
- */
-#define TX_SW_CFG2 0x1338
-
-/*
- * TXOP_THRES_CFG:
- */
-#define TXOP_THRES_CFG 0x133c
-
-/*
- * TXOP_CTRL_CFG:
- */
-#define TXOP_CTRL_CFG 0x1340
-
-/*
- * TX_RTS_CFG:
- * RTS_THRES: unit:byte
- * RTS_FBK_EN: enable rts rate fallback
- */
-#define TX_RTS_CFG 0x1344
-#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
-#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
-#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
-
-/*
- * TX_TIMEOUT_CFG:
- * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
- * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
- * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
- * it is recommended that:
- * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
- */
-#define TX_TIMEOUT_CFG 0x1348
-#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
-#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
-#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
-
-/*
- * TX_RTY_CFG:
- * SHORT_RTY_LIMIT: short retry limit
- * LONG_RTY_LIMIT: long retry limit
- * LONG_RTY_THRE: Long retry threshoold
- * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
- * 0:expired by retry limit, 1: expired by mpdu life timer
- * AGG_RTY_MODE: Aggregate MPDU retry mode
- * 0:expired by retry limit, 1: expired by mpdu life timer
- * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
- */
-#define TX_RTY_CFG 0x134c
-#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
-#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
-#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
-#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
-#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
-#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
-
-/*
- * TX_LINK_CFG:
- * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
- * MFB_ENABLE: TX apply remote MFB 1:enable
- * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
- * 0: not apply remote remote unsolicit (MFS=7)
- * TX_MRQ_EN: MCS request TX enable
- * TX_RDG_EN: RDG TX enable
- * TX_CF_ACK_EN: Piggyback CF-ACK enable
- * REMOTE_MFB: remote MCS feedback
- * REMOTE_MFS: remote MCS feedback sequence number
- */
-#define TX_LINK_CFG 0x1350
-#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
-#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
-#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
-#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
-#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
-#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
-#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
-#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
-
-/*
- * HT_FBK_CFG0:
- */
-#define HT_FBK_CFG0 0x1354
-#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
-#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
-#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
-#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
-#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
-#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
-#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
-#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
-
-/*
- * HT_FBK_CFG1:
- */
-#define HT_FBK_CFG1 0x1358
-#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
-#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
-#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
-#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
-#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
-#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
-#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
-#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
-
-/*
- * LG_FBK_CFG0:
- */
-#define LG_FBK_CFG0 0x135c
-#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
-#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
-#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
-#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
-#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
-#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
-#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
-#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
-
-/*
- * LG_FBK_CFG1:
- */
-#define LG_FBK_CFG1 0x1360
-#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
-#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
-#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
-#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
-
-/*
- * CCK_PROT_CFG: CCK Protection
- * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
- * PROTECT_CTRL: Protection control frame type for CCK TX
- * 0:none, 1:RTS/CTS, 2:CTS-to-self
- * PROTECT_NAV: TXOP protection type for CCK TX
- * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
- * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
- * RTS_TH_EN: RTS threshold enable on CCK TX
- */
-#define CCK_PROT_CFG 0x1364
-#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * OFDM_PROT_CFG: OFDM Protection
- */
-#define OFDM_PROT_CFG 0x1368
-#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * MM20_PROT_CFG: MM20 Protection
- */
-#define MM20_PROT_CFG 0x136c
-#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * MM40_PROT_CFG: MM40 Protection
- */
-#define MM40_PROT_CFG 0x1370
-#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * GF20_PROT_CFG: GF20 Protection
- */
-#define GF20_PROT_CFG 0x1374
-#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * GF40_PROT_CFG: GF40 Protection
- */
-#define GF40_PROT_CFG 0x1378
-#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * EXP_CTS_TIME:
- */
-#define EXP_CTS_TIME 0x137c
-
-/*
- * EXP_ACK_TIME:
- */
-#define EXP_ACK_TIME 0x1380
-
-/*
- * RX_FILTER_CFG: RX configuration register.
- */
-#define RX_FILTER_CFG 0x1400
-#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
-#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
-#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
-#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
-#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
-#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
-#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
-#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
-#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
-#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
-#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
-#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
-#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
-#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
-#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
-#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
-#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
-
-/*
- * AUTO_RSP_CFG:
- * AUTORESPONDER: 0: disable, 1: enable
- * BAC_ACK_POLICY: 0:long, 1:short preamble
- * CTS_40_MMODE: Response CTS 40MHz duplicate mode
- * CTS_40_MREF: Response CTS 40MHz duplicate mode
- * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
- * DUAL_CTS_EN: Power bit value in control frame
- * ACK_CTS_PSM_BIT:Power bit value in control frame
- */
-#define AUTO_RSP_CFG 0x1404
-#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
-#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
-#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
-#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
-#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
-#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
-#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
-
-/*
- * LEGACY_BASIC_RATE:
- */
-#define LEGACY_BASIC_RATE 0x1408
-
-/*
- * HT_BASIC_RATE:
- */
-#define HT_BASIC_RATE 0x140c
-
-/*
- * HT_CTRL_CFG:
- */
-#define HT_CTRL_CFG 0x1410
-
-/*
- * SIFS_COST_CFG:
- */
-#define SIFS_COST_CFG 0x1414
-
-/*
- * RX_PARSER_CFG:
- * Set NAV for all received frames
- */
-#define RX_PARSER_CFG 0x1418
-
-/*
- * TX_SEC_CNT0:
- */
-#define TX_SEC_CNT0 0x1500
-
-/*
- * RX_SEC_CNT0:
- */
-#define RX_SEC_CNT0 0x1504
-
-/*
- * CCMP_FC_MUTE:
- */
-#define CCMP_FC_MUTE 0x1508
-
-/*
- * TXOP_HLDR_ADDR0:
- */
-#define TXOP_HLDR_ADDR0 0x1600
-
-/*
- * TXOP_HLDR_ADDR1:
- */
-#define TXOP_HLDR_ADDR1 0x1604
-
-/*
- * TXOP_HLDR_ET:
- */
-#define TXOP_HLDR_ET 0x1608
-
-/*
- * QOS_CFPOLL_RA_DW0:
- */
-#define QOS_CFPOLL_RA_DW0 0x160c
-
-/*
- * QOS_CFPOLL_RA_DW1:
- */
-#define QOS_CFPOLL_RA_DW1 0x1610
-
-/*
- * QOS_CFPOLL_QC:
- */
-#define QOS_CFPOLL_QC 0x1614
-
-/*
- * RX_STA_CNT0: RX PLCP error count & RX CRC error count
- */
-#define RX_STA_CNT0 0x1700
-#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
-#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
-
-/*
- * RX_STA_CNT1: RX False CCA count & RX LONG frame count
- */
-#define RX_STA_CNT1 0x1704
-#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
-#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
-
-/*
- * RX_STA_CNT2:
- */
-#define RX_STA_CNT2 0x1708
-#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
-#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT0: TX Beacon count
- */
-#define TX_STA_CNT0 0x170c
-#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
-#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT1: TX tx count
- */
-#define TX_STA_CNT1 0x1710
-#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
-#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT2: TX tx count
- */
-#define TX_STA_CNT2 0x1714
-#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
-#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_STA_FIFO: TX Result for specific PID status fifo register
- */
-#define TX_STA_FIFO 0x1718
-#define TX_STA_FIFO_VALID FIELD32(0x00000001)
-#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
-#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
-#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
-#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
-#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
-#define TX_STA_FIFO_MCS FIELD32(0x007f0000)
-#define TX_STA_FIFO_PHYMODE FIELD32(0xc0000000)
-
-/*
- * TX_AGG_CNT: Debug counter
- */
-#define TX_AGG_CNT 0x171c
-#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT0:
- */
-#define TX_AGG_CNT0 0x1720
-#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT1:
- */
-#define TX_AGG_CNT1 0x1724
-#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT2:
- */
-#define TX_AGG_CNT2 0x1728
-#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT3:
- */
-#define TX_AGG_CNT3 0x172c
-#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT4:
- */
-#define TX_AGG_CNT4 0x1730
-#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT5:
- */
-#define TX_AGG_CNT5 0x1734
-#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT6:
- */
-#define TX_AGG_CNT6 0x1738
-#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT7:
- */
-#define TX_AGG_CNT7 0x173c
-#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
-
-/*
- * MPDU_DENSITY_CNT:
- * TX_ZERO_DEL: TX zero length delimiter count
- * RX_ZERO_DEL: RX zero length delimiter count
- */
-#define MPDU_DENSITY_CNT 0x1740
-#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
-#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
-
-/*
- * Security key table memory.
- * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
- * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
- * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
- * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
- * SHARED_KEY_TABLE_BASE: 32 bytes * 32-entry
- * SHARED_KEY_MODE_BASE: 4 bits * 32-entry
- */
-#define MAC_WCID_BASE 0x1800
-#define PAIRWISE_KEY_TABLE_BASE 0x4000
-#define MAC_IVEIV_TABLE_BASE 0x6000
-#define MAC_WCID_ATTRIBUTE_BASE 0x6800
-#define SHARED_KEY_TABLE_BASE 0x6c00
-#define SHARED_KEY_MODE_BASE 0x7000
-
-#define MAC_WCID_ENTRY(__idx) \
- ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
-#define PAIRWISE_KEY_ENTRY(__idx) \
- ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
-#define MAC_IVEIV_ENTRY(__idx) \
- ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
-#define MAC_WCID_ATTR_ENTRY(__idx) \
- ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
-#define SHARED_KEY_ENTRY(__idx) \
- ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
-#define SHARED_KEY_MODE_ENTRY(__idx) \
- ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
-
-struct mac_wcid_entry {
- u8 mac[6];
- u8 reserved[2];
-} __attribute__ ((packed));
-
-struct hw_key_entry {
- u8 key[16];
- u8 tx_mic[8];
- u8 rx_mic[8];
-} __attribute__ ((packed));
-
-struct mac_iveiv_entry {
- u8 iv[8];
-} __attribute__ ((packed));
-
-/*
- * MAC_WCID_ATTRIBUTE:
- */
-#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
-#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
-#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
-#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
-
-/*
- * SHARED_KEY_MODE:
- */
-#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
-#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
-#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
-#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
-#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
-#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
-#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
-#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
-
-/*
- * HOST-MCU communication
- */
-
-/*
- * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
- */
-#define H2M_MAILBOX_CSR 0x7010
-#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
-#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
-#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
-#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
-
-/*
- * H2M_MAILBOX_CID:
- */
-#define H2M_MAILBOX_CID 0x7014
-#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
-#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
-#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
-#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
-
-/*
- * H2M_MAILBOX_STATUS:
- */
-#define H2M_MAILBOX_STATUS 0x701c
-
-/*
- * H2M_INT_SRC:
- */
-#define H2M_INT_SRC 0x7024
-
-/*
- * H2M_BBP_AGENT:
- */
-#define H2M_BBP_AGENT 0x7028
-
-/*
- * MCU_LEDCS: LED control for MCU Mailbox.
- */
-#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
-#define MCU_LEDCS_POLARITY FIELD8(0x01)
-
-/*
- * HW_CS_CTS_BASE:
- * Carrier-sense CTS frame base address.
- * It's where mac stores carrier-sense frame for carrier-sense function.
- */
-#define HW_CS_CTS_BASE 0x7700
-
-/*
- * HW_DFS_CTS_BASE:
- * FS CTS frame base address. It's where mac stores CTS frame for DFS.
- */
-#define HW_DFS_CTS_BASE 0x7780
-
-/*
- * TXRX control registers - base address 0x3000
- */
-
-/*
- * TXRX_CSR1:
- * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
- */
-#define TXRX_CSR1 0x77d0
-
-/*
- * HW_DEBUG_SETTING_BASE:
- * since NULL frame won't be that long (256 byte)
- * We steal 16 tail bytes to save debugging settings
- */
-#define HW_DEBUG_SETTING_BASE 0x77f0
-#define HW_DEBUG_SETTING_BASE2 0x7770
-
-/*
- * HW_BEACON_BASE
- * In order to support maximum 8 MBSS and its maximum length
- * is 512 bytes for each beacon
- * Three section discontinue memory segments will be used.
- * 1. The original region for BCN 0~3
- * 2. Extract memory from FCE table for BCN 4~5
- * 3. Extract memory from Pair-wise key table for BCN 6~7
- * It occupied those memory of wcid 238~253 for BCN 6
- * and wcid 222~237 for BCN 7
- *
- * IMPORTANT NOTE: Not sure why legacy driver does this,
- * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
- */
-#define HW_BEACON_BASE0 0x7800
-#define HW_BEACON_BASE1 0x7a00
-#define HW_BEACON_BASE2 0x7c00
-#define HW_BEACON_BASE3 0x7e00
-#define HW_BEACON_BASE4 0x7200
-#define HW_BEACON_BASE5 0x7400
-#define HW_BEACON_BASE6 0x5dc0
-#define HW_BEACON_BASE7 0x5bc0
-
-#define HW_BEACON_OFFSET(__index) \
- ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
- (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
- (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
-
-/*
* 8051 firmware image.
*/
#define FIRMWARE_RT2860 "rt2860.bin"
#define FIRMWARE_IMAGE_BASE 0x2000
/*
- * BBP registers.
- * The wordsize of the BBP is 8 bits.
- */
-
-/*
- * BBP 1: TX Antenna
- */
-#define BBP1_TX_POWER FIELD8(0x07)
-#define BBP1_TX_ANTENNA FIELD8(0x18)
-
-/*
- * BBP 3: RX Antenna
- */
-#define BBP3_RX_ANTENNA FIELD8(0x18)
-#define BBP3_HT40_PLUS FIELD8(0x20)
-
-/*
- * BBP 4: Bandwidth
- */
-#define BBP4_TX_BF FIELD8(0x01)
-#define BBP4_BANDWIDTH FIELD8(0x18)
-
-/*
- * RFCSR registers
- * The wordsize of the RFCSR is 8 bits.
- */
-
-/*
- * RFCSR 6:
- */
-#define RFCSR6_R FIELD8(0x03)
-
-/*
- * RFCSR 7:
- */
-#define RFCSR7_RF_TUNING FIELD8(0x01)
-
-/*
- * RFCSR 12:
- */
-#define RFCSR12_TX_POWER FIELD8(0x1f)
-
-/*
- * RFCSR 22:
- */
-#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
-
-/*
- * RFCSR 23:
- */
-#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
-
-/*
- * RFCSR 30:
- */
-#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
-
-/*
- * RF registers
- */
-
-/*
- * RF 2
- */
-#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
-#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
-#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
-
-/*
- * RF 3
- */
-#define RF3_TXPOWER_G FIELD32(0x00003e00)
-#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
-#define RF3_TXPOWER_A FIELD32(0x00003c00)
-
-/*
- * RF 4
- */
-#define RF4_TXPOWER_G FIELD32(0x000007c0)
-#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
-#define RF4_TXPOWER_A FIELD32(0x00000780)
-#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
-#define RF4_HT40 FIELD32(0x00200000)
-
-/*
- * EEPROM content.
- * The wordsize of the EEPROM is 16 bits.
- */
-
-/*
- * EEPROM Version
- */
-#define EEPROM_VERSION 0x0001
-#define EEPROM_VERSION_FAE FIELD16(0x00ff)
-#define EEPROM_VERSION_VERSION FIELD16(0xff00)
-
-/*
- * HW MAC address.
- */
-#define EEPROM_MAC_ADDR_0 0x0002
-#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR_1 0x0003
-#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR_2 0x0004
-#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
-
-/*
- * EEPROM ANTENNA config
- * RXPATH: 1: 1R, 2: 2R, 3: 3R
- * TXPATH: 1: 1T, 2: 2T
- */
-#define EEPROM_ANTENNA 0x001a
-#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
-#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
-#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
-
-/*
- * EEPROM NIC config
- * CARDBUS_ACCEL: 0 - enable, 1 - disable
- */
-#define EEPROM_NIC 0x001b
-#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
-#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
-#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
-#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
-#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
-#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
-#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
-#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
-#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
-#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
-
-/*
- * EEPROM frequency
- */
-#define EEPROM_FREQ 0x001d
-#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
-#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
-#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
-
-/*
- * EEPROM LED
- * POLARITY_RDY_G: Polarity RDY_G setting.
- * POLARITY_RDY_A: Polarity RDY_A setting.
- * POLARITY_ACT: Polarity ACT setting.
- * POLARITY_GPIO_0: Polarity GPIO0 setting.
- * POLARITY_GPIO_1: Polarity GPIO1 setting.
- * POLARITY_GPIO_2: Polarity GPIO2 setting.
- * POLARITY_GPIO_3: Polarity GPIO3 setting.
- * POLARITY_GPIO_4: Polarity GPIO4 setting.
- * LED_MODE: Led mode.
- */
-#define EEPROM_LED1 0x001e
-#define EEPROM_LED2 0x001f
-#define EEPROM_LED3 0x0020
-#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
-#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
-#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
-#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
-#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
-#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
-#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
-#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
-#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
-
-/*
- * EEPROM LNA
- */
-#define EEPROM_LNA 0x0022
-#define EEPROM_LNA_BG FIELD16(0x00ff)
-#define EEPROM_LNA_A0 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI BG offset
- */
-#define EEPROM_RSSI_BG 0x0023
-#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
-#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI BG2 offset
- */
-#define EEPROM_RSSI_BG2 0x0024
-#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
-#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI A offset
- */
-#define EEPROM_RSSI_A 0x0025
-#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
-#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI A2 offset
- */
-#define EEPROM_RSSI_A2 0x0026
-#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
-#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
-
-/*
- * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
- * This is delta in 40MHZ.
- * VALUE: Tx Power dalta value (MAX=4)
- * TYPE: 1: Plus the delta value, 0: minus the delta value
- * TXPOWER: Enable:
- */
-#define EEPROM_TXPOWER_DELTA 0x0028
-#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
-#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
-#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
-
-/*
- * EEPROM TXPOWER 802.11BG
- */
-#define EEPROM_TXPOWER_BG1 0x0029
-#define EEPROM_TXPOWER_BG2 0x0030
-#define EEPROM_TXPOWER_BG_SIZE 7
-#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
-#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
-
-/*
- * EEPROM TXPOWER 802.11A
- */
-#define EEPROM_TXPOWER_A1 0x003c
-#define EEPROM_TXPOWER_A2 0x0053
-#define EEPROM_TXPOWER_A_SIZE 6
-#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
-#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
-
-/*
- * EEPROM TXpower byrate: 20MHZ power
- */
-#define EEPROM_TXPOWER_BYRATE 0x006f
-
-/*
- * EEPROM BBP.
- */
-#define EEPROM_BBP_START 0x0078
-#define EEPROM_BBP_SIZE 16
-#define EEPROM_BBP_VALUE FIELD16(0x00ff)
-#define EEPROM_BBP_REG_ID FIELD16(0xff00)
-
-/*
- * MCU mailbox commands.
- */
-#define MCU_SLEEP 0x30
-#define MCU_WAKEUP 0x31
-#define MCU_RADIO_OFF 0x35
-#define MCU_CURRENT 0x36
-#define MCU_LED 0x50
-#define MCU_LED_STRENGTH 0x51
-#define MCU_LED_1 0x52
-#define MCU_LED_2 0x53
-#define MCU_LED_3 0x54
-#define MCU_RADAR 0x60
-#define MCU_BOOT_SIGNAL 0x72
-#define MCU_BBP_SIGNAL 0x80
-#define MCU_POWER_SAVE 0x83
-
-/*
- * MCU mailbox tokens
- */
-#define TOKEN_WAKUP 3
-
-/*
* DMA descriptor defines.
*/
#define TXD_DESC_SIZE ( 4 * sizeof(__le32) )
-#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) )
#define RXD_DESC_SIZE ( 4 * sizeof(__le32) )
-#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
/*
* TX descriptor format for TX, PRIO and Beacon Ring.
@@ -1806,52 +132,6 @@ struct mac_iveiv_entry {
#define TXD_W3_ICO FIELD32(0x80000000)
/*
- * TX WI structure
- */
-
-/*
- * Word0
- * FRAG: 1 To inform TKIP engine this is a fragment.
- * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
- * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
- * BW: Channel bandwidth 20MHz or 40 MHz
- * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
- */
-#define TXWI_W0_FRAG FIELD32(0x00000001)
-#define TXWI_W0_MIMO_PS FIELD32(0x00000002)
-#define TXWI_W0_CF_ACK FIELD32(0x00000004)
-#define TXWI_W0_TS FIELD32(0x00000008)
-#define TXWI_W0_AMPDU FIELD32(0x00000010)
-#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0)
-#define TXWI_W0_TX_OP FIELD32(0x00000300)
-#define TXWI_W0_MCS FIELD32(0x007f0000)
-#define TXWI_W0_BW FIELD32(0x00800000)
-#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
-#define TXWI_W0_STBC FIELD32(0x06000000)
-#define TXWI_W0_IFS FIELD32(0x08000000)
-#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
-
-/*
- * Word1
- */
-#define TXWI_W1_ACK FIELD32(0x00000001)
-#define TXWI_W1_NSEQ FIELD32(0x00000002)
-#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc)
-#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00)
-#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
-#define TXWI_W1_PACKETID FIELD32(0xf0000000)
-
-/*
- * Word2
- */
-#define TXWI_W2_IV FIELD32(0xffffffff)
-
-/*
- * Word3
- */
-#define TXWI_W3_EIV FIELD32(0xffffffff)
-
-/*
* RX descriptor format for RX Ring.
*/
@@ -1897,64 +177,4 @@ struct mac_iveiv_entry {
#define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000)
#define RXD_W3_PLCP_RSSI FIELD32(0x00040000)
-/*
- * RX WI structure
- */
-
-/*
- * Word0
- */
-#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
-#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
-#define RXWI_W0_BSSID FIELD32(0x00001c00)
-#define RXWI_W0_UDF FIELD32(0x0000e000)
-#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
-#define RXWI_W0_TID FIELD32(0xf0000000)
-
-/*
- * Word1
- */
-#define RXWI_W1_FRAG FIELD32(0x0000000f)
-#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
-#define RXWI_W1_MCS FIELD32(0x007f0000)
-#define RXWI_W1_BW FIELD32(0x00800000)
-#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
-#define RXWI_W1_STBC FIELD32(0x06000000)
-#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
-
-/*
- * Word2
- */
-#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
-#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
-#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
-
-/*
- * Word3
- */
-#define RXWI_W3_SNR0 FIELD32(0x000000ff)
-#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
-
-/*
- * Macros for converting txpower from EEPROM to mac80211 value
- * and from mac80211 value to register value.
- */
-#define MIN_G_TXPOWER 0
-#define MIN_A_TXPOWER -7
-#define MAX_G_TXPOWER 31
-#define MAX_A_TXPOWER 15
-#define DEFAULT_TXPOWER 5
-
-#define TXPOWER_G_FROM_DEV(__txpower) \
- ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
-
-#define TXPOWER_G_TO_DEV(__txpower) \
- clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
-
-#define TXPOWER_A_FROM_DEV(__txpower) \
- ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
-
-#define TXPOWER_A_TO_DEV(__txpower) \
- clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
-
#endif /* RT2800PCI_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 9fe770f7d7b..ce2e893856c 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -34,6 +34,8 @@
#include "rt2x00.h"
#include "rt2x00usb.h"
+#include "rt2800lib.h"
+#include "rt2800.h"
#include "rt2800usb.h"
/*
@@ -44,1027 +46,6 @@ module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
/*
- * Register access.
- * All access to the CSR registers will go through the methods
- * rt2x00usb_register_read and rt2x00usb_register_write.
- * BBP and RF register require indirect register access,
- * and use the CSR registers BBPCSR and RFCSR to achieve this.
- * These indirect registers work with busy bits,
- * and we will try maximal REGISTER_BUSY_COUNT times to access
- * the register while taking a REGISTER_BUSY_DELAY us delay
- * between each attampt. When the busy bit is still set at that time,
- * the access attempt is considered to have failed,
- * and we will print an error.
- * The _lock versions must be used if you already hold the csr_mutex
- */
-#define WAIT_FOR_BBP(__dev, __reg) \
- rt2x00usb_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
-#define WAIT_FOR_RFCSR(__dev, __reg) \
- rt2x00usb_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
-#define WAIT_FOR_RF(__dev, __reg) \
- rt2x00usb_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
-#define WAIT_FOR_MCU(__dev, __reg) \
- rt2x00usb_regbusy_read((__dev), H2M_MAILBOX_CSR, \
- H2M_MAILBOX_CSR_OWNER, (__reg))
-
-static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u8 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the BBP becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
-
- rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, u8 *value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the BBP becomes available, afterwards we
- * can safely write the read request into the register.
- * After the data has been written, we wait until hardware
- * returns the correct value, if at any time the register
- * doesn't become available in time, reg will be 0xffffffff
- * which means we return 0xff to the caller.
- */
- if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
- rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
-
- rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
-
- WAIT_FOR_BBP(rt2x00dev, &reg);
- }
-
- *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u8 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RFCSR becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
- rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
- rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
-
- rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, u8 *value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RFCSR becomes available, afterwards we
- * can safely write the read request into the register.
- * After the data has been written, we wait until hardware
- * returns the correct value, if at any time the register
- * doesn't become available in time, reg will be 0xffffffff
- * which means we return 0xff to the caller.
- */
- if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
-
- rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
-
- WAIT_FOR_RFCSR(rt2x00dev, &reg);
- }
-
- *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev,
- const unsigned int word, const u32 value)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the RF becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_RF(rt2x00dev, &reg)) {
- reg = 0;
- rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
- rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
-
- rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
- rt2x00_rf_write(rt2x00dev, word, value);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
- const u8 command, const u8 token,
- const u8 arg0, const u8 arg1)
-{
- u32 reg;
-
- mutex_lock(&rt2x00dev->csr_mutex);
-
- /*
- * Wait until the MCU becomes available, afterwards we
- * can safely write the new data into the register.
- */
- if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
- rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
- rt2x00usb_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
-
- reg = 0;
- rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
- rt2x00usb_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
- }
-
- mutex_unlock(&rt2x00dev->csr_mutex);
-}
-
-#ifdef CONFIG_RT2X00_LIB_DEBUGFS
-static const struct rt2x00debug rt2800usb_rt2x00debug = {
- .owner = THIS_MODULE,
- .csr = {
- .read = rt2x00usb_register_read,
- .write = rt2x00usb_register_write,
- .flags = RT2X00DEBUGFS_OFFSET,
- .word_base = CSR_REG_BASE,
- .word_size = sizeof(u32),
- .word_count = CSR_REG_SIZE / sizeof(u32),
- },
- .eeprom = {
- .read = rt2x00_eeprom_read,
- .write = rt2x00_eeprom_write,
- .word_base = EEPROM_BASE,
- .word_size = sizeof(u16),
- .word_count = EEPROM_SIZE / sizeof(u16),
- },
- .bbp = {
- .read = rt2800usb_bbp_read,
- .write = rt2800usb_bbp_write,
- .word_base = BBP_BASE,
- .word_size = sizeof(u8),
- .word_count = BBP_SIZE / sizeof(u8),
- },
- .rf = {
- .read = rt2x00_rf_read,
- .write = rt2800usb_rf_write,
- .word_base = RF_BASE,
- .word_size = sizeof(u32),
- .word_count = RF_SIZE / sizeof(u32),
- },
-};
-#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
-
-static int rt2800usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
-
- rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
- return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
-}
-
-#ifdef CONFIG_RT2X00_LIB_LEDS
-static void rt2800usb_brightness_set(struct led_classdev *led_cdev,
- enum led_brightness brightness)
-{
- struct rt2x00_led *led =
- container_of(led_cdev, struct rt2x00_led, led_dev);
- unsigned int enabled = brightness != LED_OFF;
- unsigned int bg_mode =
- (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
- unsigned int polarity =
- rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
- EEPROM_FREQ_LED_POLARITY);
- unsigned int ledmode =
- rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
- EEPROM_FREQ_LED_MODE);
-
- if (led->type == LED_TYPE_RADIO) {
- rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
- enabled ? 0x20 : 0);
- } else if (led->type == LED_TYPE_ASSOC) {
- rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
- enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
- } else if (led->type == LED_TYPE_QUALITY) {
- /*
- * The brightness is divided into 6 levels (0 - 5),
- * The specs tell us the following levels:
- * 0, 1 ,3, 7, 15, 31
- * to determine the level in a simple way we can simply
- * work with bitshifting:
- * (1 << level) - 1
- */
- rt2800usb_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
- (1 << brightness / (LED_FULL / 6)) - 1,
- polarity);
- }
-}
-
-static int rt2800usb_blink_set(struct led_classdev *led_cdev,
- unsigned long *delay_on,
- unsigned long *delay_off)
-{
- struct rt2x00_led *led =
- container_of(led_cdev, struct rt2x00_led, led_dev);
- u32 reg;
-
- rt2x00usb_register_read(led->rt2x00dev, LED_CFG, &reg);
- rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
- rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
- rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
- rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
- rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
- rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
- rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
- rt2x00usb_register_write(led->rt2x00dev, LED_CFG, reg);
-
- return 0;
-}
-
-static void rt2800usb_init_led(struct rt2x00_dev *rt2x00dev,
- struct rt2x00_led *led,
- enum led_type type)
-{
- led->rt2x00dev = rt2x00dev;
- led->type = type;
- led->led_dev.brightness_set = rt2800usb_brightness_set;
- led->led_dev.blink_set = rt2800usb_blink_set;
- led->flags = LED_INITIALIZED;
-}
-#endif /* CONFIG_RT2X00_LIB_LEDS */
-
-/*
- * Configuration handlers.
- */
-static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct mac_wcid_entry wcid_entry;
- struct mac_iveiv_entry iveiv_entry;
- u32 offset;
- u32 reg;
-
- offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
-
- rt2x00usb_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
- !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
- (crypto->cmd == SET_KEY) * crypto->cipher);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
- (crypto->cmd == SET_KEY) * crypto->bssidx);
- rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
- rt2x00usb_register_write(rt2x00dev, offset, reg);
-
- offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
-
- memset(&iveiv_entry, 0, sizeof(iveiv_entry));
- if ((crypto->cipher == CIPHER_TKIP) ||
- (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
- (crypto->cipher == CIPHER_AES))
- iveiv_entry.iv[3] |= 0x20;
- iveiv_entry.iv[3] |= key->keyidx << 6;
- rt2x00usb_register_multiwrite(rt2x00dev, offset,
- &iveiv_entry, sizeof(iveiv_entry));
-
- offset = MAC_WCID_ENTRY(key->hw_key_idx);
-
- memset(&wcid_entry, 0, sizeof(wcid_entry));
- if (crypto->cmd == SET_KEY)
- memcpy(&wcid_entry, crypto->address, ETH_ALEN);
- rt2x00usb_register_multiwrite(rt2x00dev, offset,
- &wcid_entry, sizeof(wcid_entry));
-}
-
-static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct hw_key_entry key_entry;
- struct rt2x00_field32 field;
- int timeout;
- u32 offset;
- u32 reg;
-
- if (crypto->cmd == SET_KEY) {
- key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
-
- memcpy(key_entry.key, crypto->key,
- sizeof(key_entry.key));
- memcpy(key_entry.tx_mic, crypto->tx_mic,
- sizeof(key_entry.tx_mic));
- memcpy(key_entry.rx_mic, crypto->rx_mic,
- sizeof(key_entry.rx_mic));
-
- offset = SHARED_KEY_ENTRY(key->hw_key_idx);
- timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
- rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
- USB_VENDOR_REQUEST_OUT,
- offset, &key_entry,
- sizeof(key_entry),
- timeout);
- }
-
- /*
- * The cipher types are stored over multiple registers
- * starting with SHARED_KEY_MODE_BASE each word will have
- * 32 bits and contains the cipher types for 2 bssidx each.
- * Using the correct defines correctly will cause overhead,
- * so just calculate the correct offset.
- */
- field.bit_offset = 4 * (key->hw_key_idx % 8);
- field.bit_mask = 0x7 << field.bit_offset;
-
- offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
-
- rt2x00usb_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, field,
- (crypto->cmd == SET_KEY) * crypto->cipher);
- rt2x00usb_register_write(rt2x00dev, offset, reg);
-
- /*
- * Update WCID information
- */
- rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
-
- return 0;
-}
-
-static int rt2800usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_crypto *crypto,
- struct ieee80211_key_conf *key)
-{
- struct hw_key_entry key_entry;
- int timeout;
- u32 offset;
-
- if (crypto->cmd == SET_KEY) {
- /*
- * 1 pairwise key is possible per AID, this means that the AID
- * equals our hw_key_idx. Make sure the WCID starts _after_ the
- * last possible shared key entry.
- */
- if (crypto->aid > (256 - 32))
- return -ENOSPC;
-
- key->hw_key_idx = 32 + crypto->aid;
-
- memcpy(key_entry.key, crypto->key,
- sizeof(key_entry.key));
- memcpy(key_entry.tx_mic, crypto->tx_mic,
- sizeof(key_entry.tx_mic));
- memcpy(key_entry.rx_mic, crypto->rx_mic,
- sizeof(key_entry.rx_mic));
-
- offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
- timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
- rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
- USB_VENDOR_REQUEST_OUT,
- offset, &key_entry,
- sizeof(key_entry),
- timeout);
- }
-
- /*
- * Update WCID information
- */
- rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
-
- return 0;
-}
-
-static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
- const unsigned int filter_flags)
-{
- u32 reg;
-
- /*
- * Start configuration steps.
- * Note that the version error will always be dropped
- * and broadcast frames will always be accepted since
- * there is no filter for it at this time.
- */
- rt2x00usb_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
- !(filter_flags & FIF_FCSFAIL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
- !(filter_flags & FIF_PLCPFAIL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
- !(filter_flags & FIF_PROMISC_IN_BSS));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
- !(filter_flags & FIF_ALLMULTI));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
- !(filter_flags & FIF_CONTROL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
- !(filter_flags & FIF_PSPOLL));
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
- rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
- !(filter_flags & FIF_CONTROL));
- rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg);
-}
-
-static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
- struct rt2x00_intf *intf,
- struct rt2x00intf_conf *conf,
- const unsigned int flags)
-{
- unsigned int beacon_base;
- u32 reg;
-
- if (flags & CONFIG_UPDATE_TYPE) {
- /*
- * Clear current synchronisation setup.
- * For the Beacon base registers we only need to clear
- * the first byte since that byte contains the VALID and OWNER
- * bits which (when set to 0) will invalidate the entire beacon.
- */
- beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
- rt2x00usb_register_write(rt2x00dev, beacon_base, 0);
-
- /*
- * Enable synchronisation.
- */
- rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
- rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
- }
-
- if (flags & CONFIG_UPDATE_MAC) {
- reg = le32_to_cpu(conf->mac[1]);
- rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
- conf->mac[1] = cpu_to_le32(reg);
-
- rt2x00usb_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
- conf->mac, sizeof(conf->mac));
- }
-
- if (flags & CONFIG_UPDATE_BSSID) {
- reg = le32_to_cpu(conf->bssid[1]);
- rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
- rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
- conf->bssid[1] = cpu_to_le32(reg);
-
- rt2x00usb_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
- conf->bssid, sizeof(conf->bssid));
- }
-}
-
-static void rt2800usb_config_erp(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_erp *erp)
-{
- u32 reg;
-
- rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
- rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
- !!erp->short_preamble);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
- !!erp->short_preamble);
- rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
- erp->cts_protection ? 2 : 0);
- rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE,
- erp->basic_rates);
- rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
-
- rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
- rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
- rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
- rt2x00usb_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
- rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
- rt2x00usb_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
- erp->beacon_int * 16);
- rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
-}
-
-static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev,
- struct antenna_setup *ant)
-{
- u8 r1;
- u8 r3;
-
- rt2800usb_bbp_read(rt2x00dev, 1, &r1);
- rt2800usb_bbp_read(rt2x00dev, 3, &r3);
-
- /*
- * Configure the TX antenna.
- */
- switch ((int)ant->tx) {
- case 1:
- rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
- break;
- case 2:
- rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
- break;
- case 3:
- /* Do nothing */
- break;
- }
-
- /*
- * Configure the RX antenna.
- */
- switch ((int)ant->rx) {
- case 1:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
- break;
- case 2:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
- break;
- case 3:
- rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
- break;
- }
-
- rt2800usb_bbp_write(rt2x00dev, 3, r3);
- rt2800usb_bbp_write(rt2x00dev, 1, r1);
-}
-
-static void rt2800usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- u16 eeprom;
- short lna_gain;
-
- if (libconf->rf.channel <= 14) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
- } else if (libconf->rf.channel <= 64) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
- } else if (libconf->rf.channel <= 128) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
- } else {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
- lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
- }
-
- rt2x00dev->lna_gain = lna_gain;
-}
-
-static void rt2800usb_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
-
- if (rt2x00dev->default_ant.tx == 1)
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
-
- if (rt2x00dev->default_ant.rx == 1) {
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
- } else if (rt2x00dev->default_ant.rx == 2)
- rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
-
- if (rf->channel > 14) {
- /*
- * When TX power is below 0, we should increase it by 7 to
- * make it a positive value (Minumum value is -7).
- * However this means that values between 0 and 7 have
- * double meaning, and we should set a 7DBm boost flag.
- */
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
- (info->tx_power1 >= 0));
-
- if (info->tx_power1 < 0)
- info->tx_power1 += 7;
-
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
- TXPOWER_A_TO_DEV(info->tx_power1));
-
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
- (info->tx_power2 >= 0));
-
- if (info->tx_power2 < 0)
- info->tx_power2 += 7;
-
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
- TXPOWER_A_TO_DEV(info->tx_power2));
- } else {
- rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
- TXPOWER_G_TO_DEV(info->tx_power1));
- rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
- TXPOWER_G_TO_DEV(info->tx_power2));
- }
-
- rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
-
- rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
- rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
-
- udelay(200);
-
- rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
- rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
-
- udelay(200);
-
- rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
- rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
- rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
- rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
-}
-
-static void rt2800usb_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- u8 rfcsr;
-
- rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf1);
- rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf3);
-
- rt2800usb_rfcsr_read(rt2x00dev, 6, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
- rt2800usb_rfcsr_write(rt2x00dev, 6, rfcsr);
-
- rt2800usb_rfcsr_read(rt2x00dev, 12, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
- TXPOWER_G_TO_DEV(info->tx_power1));
- rt2800usb_rfcsr_write(rt2x00dev, 12, rfcsr);
-
- rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
- rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
-
- rt2800usb_rfcsr_write(rt2x00dev, 24,
- rt2x00dev->calibration[conf_is_ht40(conf)]);
-
- rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
- rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
-}
-
-static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
- struct ieee80211_conf *conf,
- struct rf_channel *rf,
- struct channel_info *info)
-{
- u32 reg;
- unsigned int tx_pin;
- u8 bbp;
-
- if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
- rt2800usb_config_channel_rt2x(rt2x00dev, conf, rf, info);
- else
- rt2800usb_config_channel_rt3x(rt2x00dev, conf, rf, info);
-
- /*
- * Change BBP settings
- */
- rt2800usb_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
- rt2800usb_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
- rt2800usb_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
- rt2800usb_bbp_write(rt2x00dev, 86, 0);
-
- if (rf->channel <= 14) {
- if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
- rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
- rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
- } else {
- rt2800usb_bbp_write(rt2x00dev, 82, 0x84);
- rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
- }
- } else {
- rt2800usb_bbp_write(rt2x00dev, 82, 0xf2);
-
- if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
- rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
- else
- rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
- }
-
- rt2x00usb_register_read(rt2x00dev, TX_BAND_CFG, &reg);
- rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
- rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
- rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
- rt2x00usb_register_write(rt2x00dev, TX_BAND_CFG, reg);
-
- tx_pin = 0;
-
- /* Turn on unused PA or LNA when not using 1T or 1R */
- if (rt2x00dev->default_ant.tx != 1) {
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
- }
-
- /* Turn on unused PA or LNA when not using 1T or 1R */
- if (rt2x00dev->default_ant.rx != 1) {
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
- }
-
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
- rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
-
- rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
-
- rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
- rt2800usb_bbp_write(rt2x00dev, 4, bbp);
-
- rt2800usb_bbp_read(rt2x00dev, 3, &bbp);
- rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
- rt2800usb_bbp_write(rt2x00dev, 3, bbp);
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
- if (conf_is_ht40(conf)) {
- rt2800usb_bbp_write(rt2x00dev, 69, 0x1a);
- rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
- rt2800usb_bbp_write(rt2x00dev, 73, 0x16);
- } else {
- rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
- rt2800usb_bbp_write(rt2x00dev, 70, 0x08);
- rt2800usb_bbp_write(rt2x00dev, 73, 0x11);
- }
- }
-
- msleep(1);
-}
-
-static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
- const int txpower)
-{
- u32 reg;
- u32 value = TXPOWER_G_TO_DEV(txpower);
- u8 r1;
-
- rt2800usb_bbp_read(rt2x00dev, 1, &r1);
- rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
- rt2800usb_bbp_write(rt2x00dev, 1, r1);
-
- rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
- rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
-
- rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
- rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
-
- rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
- rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
-
- rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
- rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
-
- rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
- rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
- rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
-}
-
-static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- u32 reg;
-
- rt2x00usb_register_read(rt2x00dev, TX_RTY_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
- libconf->conf->short_frame_max_tx_count);
- rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
- libconf->conf->long_frame_max_tx_count);
- rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
- rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
- rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
- rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
- rt2x00usb_register_write(rt2x00dev, TX_RTY_CFG, reg);
-}
-
-static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf)
-{
- enum dev_state state =
- (libconf->conf->flags & IEEE80211_CONF_PS) ?
- STATE_SLEEP : STATE_AWAKE;
- u32 reg;
-
- if (state == STATE_SLEEP) {
- rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
-
- rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
- libconf->conf->listen_interval - 1);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
- rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
-
- rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
- } else {
- rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
-
- rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
- rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
- rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
- }
-}
-
-static void rt2800usb_config(struct rt2x00_dev *rt2x00dev,
- struct rt2x00lib_conf *libconf,
- const unsigned int flags)
-{
- /* Always recalculate LNA gain before changing configuration */
- rt2800usb_config_lna_gain(rt2x00dev, libconf);
-
- if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
- rt2800usb_config_channel(rt2x00dev, libconf->conf,
- &libconf->rf, &libconf->channel);
- if (flags & IEEE80211_CONF_CHANGE_POWER)
- rt2800usb_config_txpower(rt2x00dev, libconf->conf->power_level);
- if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
- rt2800usb_config_retry_limit(rt2x00dev, libconf);
- if (flags & IEEE80211_CONF_CHANGE_PS)
- rt2800usb_config_ps(rt2x00dev, libconf);
-}
-
-/*
- * Link tuning
- */
-static void rt2800usb_link_stats(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual)
-{
- u32 reg;
-
- /*
- * Update FCS error count from register.
- */
- rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
- qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
-}
-
-static u8 rt2800usb_get_default_vgc(struct rt2x00_dev *rt2x00dev)
-{
- if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
- if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION)
- return 0x1c + (2 * rt2x00dev->lna_gain);
- else
- return 0x2e + rt2x00dev->lna_gain;
- }
-
- if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
- return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
- else
- return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
-}
-
-static inline void rt2800usb_set_vgc(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual, u8 vgc_level)
-{
- if (qual->vgc_level != vgc_level) {
- rt2800usb_bbp_write(rt2x00dev, 66, vgc_level);
- qual->vgc_level = vgc_level;
- qual->vgc_level_reg = vgc_level;
- }
-}
-
-static void rt2800usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual)
-{
- rt2800usb_set_vgc(rt2x00dev, qual,
- rt2800usb_get_default_vgc(rt2x00dev));
-}
-
-static void rt2800usb_link_tuner(struct rt2x00_dev *rt2x00dev,
- struct link_qual *qual, const u32 count)
-{
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION)
- return;
-
- /*
- * When RSSI is better then -80 increase VGC level with 0x10
- */
- rt2800usb_set_vgc(rt2x00dev, qual,
- rt2800usb_get_default_vgc(rt2x00dev) +
- ((qual->rssi > -80) * 0x10));
-}
-
-/*
* Firmware functions
*/
static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -1172,7 +153,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
* Wait for stable hardware.
*/
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
+ rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
if (reg && reg != ~0)
break;
msleep(1);
@@ -1192,8 +173,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
data + offset, length,
REGISTER_TIMEOUT32(length));
- rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
- rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
/*
* Send firmware request to device to load firmware,
@@ -1208,18 +189,18 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
}
msleep(10);
- rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
/*
* Send signal to firmware during boot time.
*/
- rt2800usb_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
+ rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
if ((chipset == 0x3070) ||
(chipset == 0x3071) ||
(chipset == 0x3572)) {
udelay(200);
- rt2800usb_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
+ rt2800_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
udelay(10);
}
@@ -1227,7 +208,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
* Wait for device to stabilize.
*/
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
break;
msleep(1);
@@ -1241,536 +222,14 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
/*
* Initialize firmware.
*/
- rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
- rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
+ rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
+ rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
msleep(1);
return 0;
}
/*
- * Initialization functions.
- */
-static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
- unsigned int i;
-
- /*
- * Wait untill BBP and RF are ready.
- */
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
- if (reg && reg != ~0)
- break;
- msleep(1);
- }
-
- if (i == REGISTER_BUSY_COUNT) {
- ERROR(rt2x00dev, "Unstable hardware.\n");
- return -EBUSY;
- }
-
- rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
- rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
-
- rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
- rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
- rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
-
- rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
-
- rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
- USB_MODE_RESET, REGISTER_TIMEOUT);
-
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
-
- rt2x00usb_register_read(rt2x00dev, BCN_OFFSET0, &reg);
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
- rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
- rt2x00usb_register_write(rt2x00dev, BCN_OFFSET0, reg);
-
- rt2x00usb_register_read(rt2x00dev, BCN_OFFSET1, &reg);
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
- rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
- rt2x00usb_register_write(rt2x00dev, BCN_OFFSET1, reg);
-
- rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
- rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
-
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
-
- rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
- rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
- rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
- rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
- rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
- rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
- } else {
- rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
- rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
- }
-
- rt2x00usb_register_read(rt2x00dev, TX_LINK_CFG, &reg);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
- rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
- rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
- rt2x00usb_register_write(rt2x00dev, TX_LINK_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
- rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
- rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
- if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
- rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
- else
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
- rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
- rt2x00usb_register_write(rt2x00dev, MAX_LEN_CFG, reg);
-
- rt2x00usb_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
-
- rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
- rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
- rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
- rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
- rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
-
- rt2x00usb_register_write(rt2x00dev, PBF_CFG, 0xf40006);
-
- rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 3);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
- rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
- rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
-
- rt2x00usb_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
- rt2x00usb_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
-
- rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
- IEEE80211_MAX_RTS_THRESHOLD);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
- rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
-
- rt2x00usb_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
- rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
-
- /*
- * ASIC will keep garbage value after boot, clear encryption keys.
- */
- for (i = 0; i < 4; i++)
- rt2x00usb_register_write(rt2x00dev,
- SHARED_KEY_MODE_ENTRY(i), 0);
-
- for (i = 0; i < 256; i++) {
- u32 wcid[2] = { 0xffffffff, 0x00ffffff };
- rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
- wcid, sizeof(wcid));
-
- rt2x00usb_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
- rt2x00usb_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
- }
-
- /*
- * Clear all beacons
- * For the Beacon base registers we only need to clear
- * the first byte since that byte contains the VALID and OWNER
- * bits which (when set to 0) will invalidate the entire beacon.
- */
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
- rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
-
- rt2x00usb_register_read(rt2x00dev, USB_CYC_CFG, &reg);
- rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
- rt2x00usb_register_write(rt2x00dev, USB_CYC_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
- rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
- rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG0, reg);
-
- rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
- rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
- rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG1, reg);
-
- rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
- rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg);
-
- rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
- rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
- rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG1, reg);
-
- /*
- * We must clear the error counters.
- * These registers are cleared on read,
- * so we may pass a useless variable to store the value.
- */
- rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
- rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, &reg);
- rt2x00usb_register_read(rt2x00dev, RX_STA_CNT2, &reg);
- rt2x00usb_register_read(rt2x00dev, TX_STA_CNT0, &reg);
- rt2x00usb_register_read(rt2x00dev, TX_STA_CNT1, &reg);
- rt2x00usb_register_read(rt2x00dev, TX_STA_CNT2, &reg);
-
- return 0;
-}
-
-static int rt2800usb_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u32 reg;
-
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00usb_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
- if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
- return 0;
-
- udelay(REGISTER_BUSY_DELAY);
- }
-
- ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
- return -EACCES;
-}
-
-static int rt2800usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u8 value;
-
- /*
- * BBP was enabled after firmware was loaded,
- * but we need to reactivate it now.
- */
- rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
- rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
- msleep(1);
-
- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2800usb_bbp_read(rt2x00dev, 0, &value);
- if ((value != 0xff) && (value != 0x00))
- return 0;
- udelay(REGISTER_BUSY_DELAY);
- }
-
- ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
- return -EACCES;
-}
-
-static int rt2800usb_init_bbp(struct rt2x00_dev *rt2x00dev)
-{
- unsigned int i;
- u16 eeprom;
- u8 reg_id;
- u8 value;
-
- if (unlikely(rt2800usb_wait_bbp_rf_ready(rt2x00dev) ||
- rt2800usb_wait_bbp_ready(rt2x00dev)))
- return -EACCES;
-
- rt2800usb_bbp_write(rt2x00dev, 65, 0x2c);
- rt2800usb_bbp_write(rt2x00dev, 66, 0x38);
- rt2800usb_bbp_write(rt2x00dev, 69, 0x12);
- rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
- rt2800usb_bbp_write(rt2x00dev, 73, 0x10);
- rt2800usb_bbp_write(rt2x00dev, 81, 0x37);
- rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
- rt2800usb_bbp_write(rt2x00dev, 83, 0x6a);
- rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
- rt2800usb_bbp_write(rt2x00dev, 86, 0x00);
- rt2800usb_bbp_write(rt2x00dev, 91, 0x04);
- rt2800usb_bbp_write(rt2x00dev, 92, 0x00);
- rt2800usb_bbp_write(rt2x00dev, 103, 0x00);
- rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
- rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
- rt2800usb_bbp_write(rt2x00dev, 73, 0x12);
- }
-
- if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) {
- rt2800usb_bbp_write(rt2x00dev, 84, 0x19);
- }
-
- if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
- rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
- rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
- rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
- }
-
- for (i = 0; i < EEPROM_BBP_SIZE; i++) {
- rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
-
- if (eeprom != 0xffff && eeprom != 0x0000) {
- reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
- value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
- rt2800usb_bbp_write(rt2x00dev, reg_id, value);
- }
- }
-
- return 0;
-}
-
-static u8 rt2800usb_init_rx_filter(struct rt2x00_dev *rt2x00dev,
- bool bw40, u8 rfcsr24, u8 filter_target)
-{
- unsigned int i;
- u8 bbp;
- u8 rfcsr;
- u8 passband;
- u8 stopband;
- u8 overtuned = 0;
-
- rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
-
- rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
- rt2800usb_bbp_write(rt2x00dev, 4, bbp);
-
- rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
- rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
-
- /*
- * Set power & frequency of passband test tone
- */
- rt2800usb_bbp_write(rt2x00dev, 24, 0);
-
- for (i = 0; i < 100; i++) {
- rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
- msleep(1);
-
- rt2800usb_bbp_read(rt2x00dev, 55, &passband);
- if (passband)
- break;
- }
-
- /*
- * Set power & frequency of stopband test tone
- */
- rt2800usb_bbp_write(rt2x00dev, 24, 0x06);
-
- for (i = 0; i < 100; i++) {
- rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
- msleep(1);
-
- rt2800usb_bbp_read(rt2x00dev, 55, &stopband);
-
- if ((passband - stopband) <= filter_target) {
- rfcsr24++;
- overtuned += ((passband - stopband) == filter_target);
- } else
- break;
-
- rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
- }
-
- rfcsr24 -= !!overtuned;
-
- rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
- return rfcsr24;
-}
-
-static int rt2800usb_init_rfcsr(struct rt2x00_dev *rt2x00dev)
-{
- u8 rfcsr;
- u8 bbp;
-
- if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
- return 0;
-
- /*
- * Init RF calibration.
- */
- rt2800usb_rfcsr_read(rt2x00dev, 30, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
- rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
- msleep(1);
- rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
- rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
-
- rt2800usb_rfcsr_write(rt2x00dev, 4, 0x40);
- rt2800usb_rfcsr_write(rt2x00dev, 5, 0x03);
- rt2800usb_rfcsr_write(rt2x00dev, 6, 0x02);
- rt2800usb_rfcsr_write(rt2x00dev, 7, 0x70);
- rt2800usb_rfcsr_write(rt2x00dev, 9, 0x0f);
- rt2800usb_rfcsr_write(rt2x00dev, 10, 0x71);
- rt2800usb_rfcsr_write(rt2x00dev, 11, 0x21);
- rt2800usb_rfcsr_write(rt2x00dev, 12, 0x7b);
- rt2800usb_rfcsr_write(rt2x00dev, 14, 0x90);
- rt2800usb_rfcsr_write(rt2x00dev, 15, 0x58);
- rt2800usb_rfcsr_write(rt2x00dev, 16, 0xb3);
- rt2800usb_rfcsr_write(rt2x00dev, 17, 0x92);
- rt2800usb_rfcsr_write(rt2x00dev, 18, 0x2c);
- rt2800usb_rfcsr_write(rt2x00dev, 19, 0x02);
- rt2800usb_rfcsr_write(rt2x00dev, 20, 0xba);
- rt2800usb_rfcsr_write(rt2x00dev, 21, 0xdb);
- rt2800usb_rfcsr_write(rt2x00dev, 24, 0x16);
- rt2800usb_rfcsr_write(rt2x00dev, 25, 0x01);
- rt2800usb_rfcsr_write(rt2x00dev, 27, 0x03);
- rt2800usb_rfcsr_write(rt2x00dev, 29, 0x1f);
-
- /*
- * Set RX Filter calibration for 20MHz and 40MHz
- */
- rt2x00dev->calibration[0] =
- rt2800usb_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
- rt2x00dev->calibration[1] =
- rt2800usb_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
-
- /*
- * Set back to initial state
- */
- rt2800usb_bbp_write(rt2x00dev, 24, 0);
-
- rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
- rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
- rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
-
- /*
- * set BBP back to BW20
- */
- rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
- rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
- rt2800usb_bbp_write(rt2x00dev, 4, bbp);
-
- return 0;
-}
-
-/*
* Device state switch handlers.
*/
static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
@@ -1778,11 +237,11 @@ static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
- rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
(state == STATE_RADIO_RX_ON) ||
(state == STATE_RADIO_RX_ON_LINK));
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
}
static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
@@ -1791,7 +250,7 @@ static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
u32 reg;
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
- rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
!rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
return 0;
@@ -1812,25 +271,25 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
* Initialize all registers.
*/
if (unlikely(rt2800usb_wait_wpdma_ready(rt2x00dev) ||
- rt2800usb_init_registers(rt2x00dev) ||
- rt2800usb_init_bbp(rt2x00dev) ||
- rt2800usb_init_rfcsr(rt2x00dev)))
+ rt2800_init_registers(rt2x00dev) ||
+ rt2800_init_bbp(rt2x00dev) ||
+ rt2800_init_rfcsr(rt2x00dev)))
return -EIO;
- rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
udelay(50);
- rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
- rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
- rt2x00usb_register_read(rt2x00dev, USB_DMA_CFG, &reg);
+ rt2800_register_read(rt2x00dev, USB_DMA_CFG, &reg);
rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0);
/* Don't use bulk in aggregation when working with USB 1.1 */
rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN,
@@ -1844,26 +303,26 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1);
rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1);
- rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, reg);
+ rt2800_register_write(rt2x00dev, USB_DMA_CFG, reg);
- rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
/*
* Initialize LED control
*/
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
- rt2800usb_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
word & 0xff, (word >> 8) & 0xff);
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
- rt2800usb_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
word & 0xff, (word >> 8) & 0xff);
rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
- rt2800usb_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
+ rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
word & 0xff, (word >> 8) & 0xff);
return 0;
@@ -1873,14 +332,14 @@ static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
{
u32 reg;
- rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
+ rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
- rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
+ rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
- rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
- rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0);
- rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, 0);
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
+ rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
/* Wait for DMA, ignore error */
rt2800usb_wait_wpdma_ready(rt2x00dev);
@@ -1892,9 +351,9 @@ static int rt2800usb_set_state(struct rt2x00_dev *rt2x00dev,
enum dev_state state)
{
if (state == STATE_AWAKE)
- rt2800usb_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0);
+ rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0);
else
- rt2800usb_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
+ rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
return 0;
}
@@ -2048,9 +507,9 @@ static void rt2800usb_write_beacon(struct queue_entry *entry)
* Disable beaconing while we are reloading the beacon data,
* otherwise we might be sending out invalid data.
*/
- rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
- rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
/*
* Write entire beacon with descriptor to register.
@@ -2093,12 +552,12 @@ static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
return;
}
- rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
- rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
}
}
@@ -2124,7 +583,7 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
*/
memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
rxd = (__le32 *)skbdesc->desc;
- rxwi = &rxd[RXD_DESC_SIZE / sizeof(__le32)];
+ rxwi = &rxd[RXINFO_DESC_SIZE / sizeof(__le32)];
/*
* It is now safe to read the descriptor on all architectures.
@@ -2326,7 +785,7 @@ static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
* Identify RF chipset.
*/
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
- rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
+ rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
/*
@@ -2385,9 +844,9 @@ static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
* Store led settings, for correct led behaviour.
*/
#ifdef CONFIG_RT2X00_LIB_LEDS
- rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
- rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
- rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
+ rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ,
&rt2x00dev->led_mcu_reg);
@@ -2600,10 +1059,25 @@ static int rt2800usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
return 0;
}
+static const struct rt2800_ops rt2800usb_rt2800_ops = {
+ .register_read = rt2x00usb_register_read,
+ .register_write = rt2x00usb_register_write,
+ .register_write_lock = rt2x00usb_register_write_lock,
+
+ .register_multiread = rt2x00usb_register_multiread,
+ .register_multiwrite = rt2x00usb_register_multiwrite,
+
+ .regbusy_read = rt2x00usb_regbusy_read,
+};
+
static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
{
int retval;
+ rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
+
+ rt2x00dev->priv = (void *)&rt2800usb_rt2800_ops;
+
/*
* Allocate eeprom data.
*/
@@ -2645,162 +1119,6 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
return 0;
}
-/*
- * IEEE80211 stack callback functions.
- */
-static void rt2800usb_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
- u32 *iv32, u16 *iv16)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- struct mac_iveiv_entry iveiv_entry;
- u32 offset;
-
- offset = MAC_IVEIV_ENTRY(hw_key_idx);
- rt2x00usb_register_multiread(rt2x00dev, offset,
- &iveiv_entry, sizeof(iveiv_entry));
-
- memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
- memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
-}
-
-static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- u32 reg;
- bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
-
- rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
- rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
- rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
- rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
- rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
-
- return 0;
-}
-
-static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
- const struct ieee80211_tx_queue_params *params)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- struct data_queue *queue;
- struct rt2x00_field32 field;
- int retval;
- u32 reg;
- u32 offset;
-
- /*
- * First pass the configuration through rt2x00lib, that will
- * update the queue settings and validate the input. After that
- * we are free to update the registers based on the value
- * in the queue parameter.
- */
- retval = rt2x00mac_conf_tx(hw, queue_idx, params);
- if (retval)
- return retval;
-
- /*
- * We only need to perform additional register initialization
- * for WMM queues/
- */
- if (queue_idx >= 4)
- return 0;
-
- queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
-
- /* Update WMM TXOP register */
- offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
- field.bit_offset = (queue_idx & 1) * 16;
- field.bit_mask = 0xffff << field.bit_offset;
-
- rt2x00usb_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, field, queue->txop);
- rt2x00usb_register_write(rt2x00dev, offset, reg);
-
- /* Update WMM registers */
- field.bit_offset = queue_idx * 4;
- field.bit_mask = 0xf << field.bit_offset;
-
- rt2x00usb_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->aifs);
- rt2x00usb_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->cw_min);
- rt2x00usb_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
-
- rt2x00usb_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
- rt2x00_set_field32(&reg, field, queue->cw_max);
- rt2x00usb_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
-
- /* Update EDCA registers */
- offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
-
- rt2x00usb_register_read(rt2x00dev, offset, &reg);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
- rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
- rt2x00usb_register_write(rt2x00dev, offset, reg);
-
- return 0;
-}
-
-static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- u64 tsf;
- u32 reg;
-
- rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
- tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
- rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
- tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
-
- return tsf;
-}
-
-static const struct ieee80211_ops rt2800usb_mac80211_ops = {
- .tx = rt2x00mac_tx,
- .start = rt2x00mac_start,
- .stop = rt2x00mac_stop,
- .add_interface = rt2x00mac_add_interface,
- .remove_interface = rt2x00mac_remove_interface,
- .config = rt2x00mac_config,
- .configure_filter = rt2x00mac_configure_filter,
- .set_tim = rt2x00mac_set_tim,
- .set_key = rt2x00mac_set_key,
- .get_stats = rt2x00mac_get_stats,
- .get_tkip_seq = rt2800usb_get_tkip_seq,
- .set_rts_threshold = rt2800usb_set_rts_threshold,
- .bss_info_changed = rt2x00mac_bss_info_changed,
- .conf_tx = rt2800usb_conf_tx,
- .get_tx_stats = rt2x00mac_get_tx_stats,
- .get_tsf = rt2800usb_get_tsf,
- .rfkill_poll = rt2x00mac_rfkill_poll,
-};
-
static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
.probe_hw = rt2800usb_probe_hw,
.get_firmware_name = rt2800usb_get_firmware_name,
@@ -2810,10 +1128,10 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
.uninitialize = rt2x00usb_uninitialize,
.clear_entry = rt2x00usb_clear_entry,
.set_device_state = rt2800usb_set_device_state,
- .rfkill_poll = rt2800usb_rfkill_poll,
- .link_stats = rt2800usb_link_stats,
- .reset_tuner = rt2800usb_reset_tuner,
- .link_tuner = rt2800usb_link_tuner,
+ .rfkill_poll = rt2800_rfkill_poll,
+ .link_stats = rt2800_link_stats,
+ .reset_tuner = rt2800_reset_tuner,
+ .link_tuner = rt2800_link_tuner,
.write_tx_desc = rt2800usb_write_tx_desc,
.write_tx_data = rt2x00usb_write_tx_data,
.write_beacon = rt2800usb_write_beacon,
@@ -2821,19 +1139,19 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
.kick_tx_queue = rt2800usb_kick_tx_queue,
.kill_tx_queue = rt2x00usb_kill_tx_queue,
.fill_rxdone = rt2800usb_fill_rxdone,
- .config_shared_key = rt2800usb_config_shared_key,
- .config_pairwise_key = rt2800usb_config_pairwise_key,
- .config_filter = rt2800usb_config_filter,
- .config_intf = rt2800usb_config_intf,
- .config_erp = rt2800usb_config_erp,
- .config_ant = rt2800usb_config_ant,
- .config = rt2800usb_config,
+ .config_shared_key = rt2800_config_shared_key,
+ .config_pairwise_key = rt2800_config_pairwise_key,
+ .config_filter = rt2800_config_filter,
+ .config_intf = rt2800_config_intf,
+ .config_erp = rt2800_config_erp,
+ .config_ant = rt2800_config_ant,
+ .config = rt2800_config,
};
static const struct data_queue_desc rt2800usb_queue_rx = {
.entry_num = RX_ENTRIES,
.data_size = AGGREGATION_SIZE,
- .desc_size = RXD_DESC_SIZE + RXWI_DESC_SIZE,
+ .desc_size = RXINFO_DESC_SIZE + RXWI_DESC_SIZE,
.priv_size = sizeof(struct queue_entry_priv_usb),
};
@@ -2862,9 +1180,9 @@ static const struct rt2x00_ops rt2800usb_ops = {
.tx = &rt2800usb_queue_tx,
.bcn = &rt2800usb_queue_bcn,
.lib = &rt2800usb_rt2x00_ops,
- .hw = &rt2800usb_mac80211_ops,
+ .hw = &rt2800_mac80211_ops,
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
- .debugfs = &rt2800usb_rt2x00debug,
+ .debugfs = &rt2800_rt2x00debug,
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
};
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.h b/drivers/net/wireless/rt2x00/rt2800usb.h
index 4d9991c9a51..c9d7d40ee5f 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.h
+++ b/drivers/net/wireless/rt2x00/rt2800usb.h
@@ -28,288 +28,10 @@
#define RT2800USB_H
/*
- * RF chip defines.
- *
- * RF2820 2.4G 2T3R
- * RF2850 2.4G/5G 2T3R
- * RF2720 2.4G 1T2R
- * RF2750 2.4G/5G 1T2R
- * RF3020 2.4G 1T1R
- * RF2020 2.4G B/G
- * RF3021 2.4G 1T2R
- * RF3022 2.4G 2T2R
- * RF3052 2.4G 2T2R
- */
-#define RF2820 0x0001
-#define RF2850 0x0002
-#define RF2720 0x0003
-#define RF2750 0x0004
-#define RF3020 0x0005
-#define RF2020 0x0006
-#define RF3021 0x0007
-#define RF3022 0x0008
-#define RF3052 0x0009
-
-/*
- * RT2870 version
- */
-#define RT2860C_VERSION 0x28600100
-#define RT2860D_VERSION 0x28600101
-#define RT2880E_VERSION 0x28720200
-#define RT2883_VERSION 0x28830300
-#define RT3070_VERSION 0x30700200
-
-/*
- * Signal information.
- * Defaul offset is required for RSSI <-> dBm conversion.
- */
-#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
-
-/*
- * Register layout information.
- */
-#define CSR_REG_BASE 0x1000
-#define CSR_REG_SIZE 0x0800
-#define EEPROM_BASE 0x0000
-#define EEPROM_SIZE 0x0110
-#define BBP_BASE 0x0000
-#define BBP_SIZE 0x0080
-#define RF_BASE 0x0004
-#define RF_SIZE 0x0010
-
-/*
- * Number of TX queues.
- */
-#define NUM_TX_QUEUES 4
-
-/*
* USB registers.
*/
/*
- * HOST-MCU shared memory
- */
-#define HOST_CMD_CSR 0x0404
-#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
-
-/*
- * INT_SOURCE_CSR: Interrupt source register.
- * Write one to clear corresponding bit.
- * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
- */
-#define INT_SOURCE_CSR 0x0200
-#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
-#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
-#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
-#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
-#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
-#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
-#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
-#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
-#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
-#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
-#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
-#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
-#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
-#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
-#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
-#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
-#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
-#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
-
-/*
- * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
- */
-#define INT_MASK_CSR 0x0204
-#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
-#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
-#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
-#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
-#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
-#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
-#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
-#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
-#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
-#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
-#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
-#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
-#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
-#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
-#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
-#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
-#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
-#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
-
-/*
- * WPDMA_GLO_CFG
- */
-#define WPDMA_GLO_CFG 0x0208
-#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
-#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
-#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
-#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
-#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
-#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
-#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
-#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
-#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
-
-/*
- * WPDMA_RST_IDX
- */
-#define WPDMA_RST_IDX 0x020c
-#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
-#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
-#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
-#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
-#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
-#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
-#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
-
-/*
- * DELAY_INT_CFG
- */
-#define DELAY_INT_CFG 0x0210
-#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
-#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
-#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
-#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
-#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
-#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
-
-/*
- * WMM_AIFSN_CFG: Aifsn for each EDCA AC
- * AIFSN0: AC_BE
- * AIFSN1: AC_BK
- * AIFSN1: AC_VI
- * AIFSN1: AC_VO
- */
-#define WMM_AIFSN_CFG 0x0214
-#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
-#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
-#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
-#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
-
-/*
- * WMM_CWMIN_CSR: CWmin for each EDCA AC
- * CWMIN0: AC_BE
- * CWMIN1: AC_BK
- * CWMIN1: AC_VI
- * CWMIN1: AC_VO
- */
-#define WMM_CWMIN_CFG 0x0218
-#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
-#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
-#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
-#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
-
-/*
- * WMM_CWMAX_CSR: CWmax for each EDCA AC
- * CWMAX0: AC_BE
- * CWMAX1: AC_BK
- * CWMAX1: AC_VI
- * CWMAX1: AC_VO
- */
-#define WMM_CWMAX_CFG 0x021c
-#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
-#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
-#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
-#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
-
-/*
- * AC_TXOP0: AC_BK/AC_BE TXOP register
- * AC0TXOP: AC_BK in unit of 32us
- * AC1TXOP: AC_BE in unit of 32us
- */
-#define WMM_TXOP0_CFG 0x0220
-#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
-#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
-
-/*
- * AC_TXOP1: AC_VO/AC_VI TXOP register
- * AC2TXOP: AC_VI in unit of 32us
- * AC3TXOP: AC_VO in unit of 32us
- */
-#define WMM_TXOP1_CFG 0x0224
-#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
-#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
-
-/*
- * GPIO_CTRL_CFG:
- */
-#define GPIO_CTRL_CFG 0x0228
-#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
-#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
-#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
-#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
-#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
-#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
-#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
-#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
-#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
-
-/*
- * MCU_CMD_CFG
- */
-#define MCU_CMD_CFG 0x022c
-
-/*
- * AC_BK register offsets
- */
-#define TX_BASE_PTR0 0x0230
-#define TX_MAX_CNT0 0x0234
-#define TX_CTX_IDX0 0x0238
-#define TX_DTX_IDX0 0x023c
-
-/*
- * AC_BE register offsets
- */
-#define TX_BASE_PTR1 0x0240
-#define TX_MAX_CNT1 0x0244
-#define TX_CTX_IDX1 0x0248
-#define TX_DTX_IDX1 0x024c
-
-/*
- * AC_VI register offsets
- */
-#define TX_BASE_PTR2 0x0250
-#define TX_MAX_CNT2 0x0254
-#define TX_CTX_IDX2 0x0258
-#define TX_DTX_IDX2 0x025c
-
-/*
- * AC_VO register offsets
- */
-#define TX_BASE_PTR3 0x0260
-#define TX_MAX_CNT3 0x0264
-#define TX_CTX_IDX3 0x0268
-#define TX_DTX_IDX3 0x026c
-
-/*
- * HCCA register offsets
- */
-#define TX_BASE_PTR4 0x0270
-#define TX_MAX_CNT4 0x0274
-#define TX_CTX_IDX4 0x0278
-#define TX_DTX_IDX4 0x027c
-
-/*
- * MGMT register offsets
- */
-#define TX_BASE_PTR5 0x0280
-#define TX_MAX_CNT5 0x0284
-#define TX_CTX_IDX5 0x0288
-#define TX_DTX_IDX5 0x028c
-
-/*
- * RX register offsets
- */
-#define RX_BASE_PTR 0x0290
-#define RX_MAX_CNT 0x0294
-#define RX_CRX_IDX 0x0298
-#define RX_DRX_IDX 0x029c
-
-/*
* USB_DMA_CFG
* RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
* RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
@@ -343,1448 +65,16 @@
#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
/*
- * PBF_SYS_CTRL
- * HOST_RAM_WRITE: enable Host program ram write selection
- */
-#define PBF_SYS_CTRL 0x0400
-#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
-#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
-
-/*
- * PBF registers
- * Most are for debug. Driver doesn't touch PBF register.
- */
-#define PBF_CFG 0x0408
-#define PBF_MAX_PCNT 0x040c
-#define PBF_CTRL 0x0410
-#define PBF_INT_STA 0x0414
-#define PBF_INT_ENA 0x0418
-
-/*
- * BCN_OFFSET0:
- */
-#define BCN_OFFSET0 0x042c
-#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
-#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
-#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
-#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
-
-/*
- * BCN_OFFSET1:
- */
-#define BCN_OFFSET1 0x0430
-#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
-#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
-#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
-#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
-
-/*
- * PBF registers
- * Most are for debug. Driver doesn't touch PBF register.
- */
-#define TXRXQ_PCNT 0x0438
-#define PBF_DBG 0x043c
-
-/*
- * RF registers
- */
-#define RF_CSR_CFG 0x0500
-#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
-#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
-#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
-#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
-
-/*
- * MAC Control/Status Registers(CSR).
- * Some values are set in TU, whereas 1 TU == 1024 us.
- */
-
-/*
- * MAC_CSR0: ASIC revision number.
- * ASIC_REV: 0
- * ASIC_VER: 2870
- */
-#define MAC_CSR0 0x1000
-#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
-#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
-
-/*
- * MAC_SYS_CTRL:
- */
-#define MAC_SYS_CTRL 0x1004
-#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
-#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
-#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
-#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
-#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
-#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
-#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
-#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
-
-/*
- * MAC_ADDR_DW0: STA MAC register 0
- */
-#define MAC_ADDR_DW0 0x1008
-#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
-#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
-#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
-#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
-
-/*
- * MAC_ADDR_DW1: STA MAC register 1
- * UNICAST_TO_ME_MASK:
- * Used to mask off bits from byte 5 of the MAC address
- * to determine the UNICAST_TO_ME bit for RX frames.
- * The full mask is complemented by BSS_ID_MASK:
- * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
- */
-#define MAC_ADDR_DW1 0x100c
-#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
-#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
-#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
-
-/*
- * MAC_BSSID_DW0: BSSID register 0
- */
-#define MAC_BSSID_DW0 0x1010
-#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
-#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
-#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
-#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
-
-/*
- * MAC_BSSID_DW1: BSSID register 1
- * BSS_ID_MASK:
- * 0: 1-BSSID mode (BSS index = 0)
- * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
- * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
- * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
- * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
- * BSSID. This will make sure that those bits will be ignored
- * when determining the MY_BSS of RX frames.
- */
-#define MAC_BSSID_DW1 0x1014
-#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
-#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
-#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
-#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
-
-/*
- * MAX_LEN_CFG: Maximum frame length register.
- * MAX_MPDU: rt2860b max 16k bytes
- * MAX_PSDU: Maximum PSDU length
- * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
- */
-#define MAX_LEN_CFG 0x1018
-#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
-#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
-#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
-#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
-
-/*
- * BBP_CSR_CFG: BBP serial control register
- * VALUE: Register value to program into BBP
- * REG_NUM: Selected BBP register
- * READ_CONTROL: 0 write BBP, 1 read BBP
- * BUSY: ASIC is busy executing BBP commands
- * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
- * BBP_RW_MODE: 0 serial, 1 paralell
- */
-#define BBP_CSR_CFG 0x101c
-#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
-#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
-#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
-#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
-#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
-#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
-
-/*
- * RF_CSR_CFG0: RF control register
- * REGID_AND_VALUE: Register value to program into RF
- * BITWIDTH: Selected RF register
- * STANDBYMODE: 0 high when standby, 1 low when standby
- * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
- * BUSY: ASIC is busy executing RF commands
- */
-#define RF_CSR_CFG0 0x1020
-#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
-#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
-#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
-#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
-#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
-#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
-
-/*
- * RF_CSR_CFG1: RF control register
- * REGID_AND_VALUE: Register value to program into RF
- * RFGAP: Gap between BB_CONTROL_RF and RF_LE
- * 0: 3 system clock cycle (37.5usec)
- * 1: 5 system clock cycle (62.5usec)
- */
-#define RF_CSR_CFG1 0x1024
-#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
-#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
-
-/*
- * RF_CSR_CFG2: RF control register
- * VALUE: Register value to program into RF
- * RFGAP: Gap between BB_CONTROL_RF and RF_LE
- * 0: 3 system clock cycle (37.5usec)
- * 1: 5 system clock cycle (62.5usec)
- */
-#define RF_CSR_CFG2 0x1028
-#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
-
-/*
- * LED_CFG: LED control
- * color LED's:
- * 0: off
- * 1: blinking upon TX2
- * 2: periodic slow blinking
- * 3: always on
- * LED polarity:
- * 0: active low
- * 1: active high
- */
-#define LED_CFG 0x102c
-#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
-#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
-#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
-#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
-#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
-#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
-#define LED_CFG_LED_POLAR FIELD32(0x40000000)
-
-/*
- * XIFS_TIME_CFG: MAC timing
- * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
- * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
- * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
- * when MAC doesn't reference BBP signal BBRXEND
- * EIFS: unit 1us
- * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
- *
- */
-#define XIFS_TIME_CFG 0x1100
-#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
-#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
-#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
-#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
-#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
-
-/*
- * BKOFF_SLOT_CFG:
- */
-#define BKOFF_SLOT_CFG 0x1104
-#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
-#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
-
-/*
- * NAV_TIME_CFG:
- */
-#define NAV_TIME_CFG 0x1108
-#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
-#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
-#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
-#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
-
-/*
- * CH_TIME_CFG: count as channel busy
- */
-#define CH_TIME_CFG 0x110c
-
-/*
- * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
- */
-#define PBF_LIFE_TIMER 0x1110
-
-/*
- * BCN_TIME_CFG:
- * BEACON_INTERVAL: in unit of 1/16 TU
- * TSF_TICKING: Enable TSF auto counting
- * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
- * BEACON_GEN: Enable beacon generator
- */
-#define BCN_TIME_CFG 0x1114
-#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
-#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
-#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
-#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
-#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
-#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
-
-/*
- * TBTT_SYNC_CFG:
- */
-#define TBTT_SYNC_CFG 0x1118
-
-/*
- * TSF_TIMER_DW0: Local lsb TSF timer, read-only
- */
-#define TSF_TIMER_DW0 0x111c
-#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
-
-/*
- * TSF_TIMER_DW1: Local msb TSF timer, read-only
- */
-#define TSF_TIMER_DW1 0x1120
-#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
-
-/*
- * TBTT_TIMER: TImer remains till next TBTT, read-only
- */
-#define TBTT_TIMER 0x1124
-
-/*
- * INT_TIMER_CFG:
- */
-#define INT_TIMER_CFG 0x1128
-
-/*
- * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
- */
-#define INT_TIMER_EN 0x112c
-
-/*
- * CH_IDLE_STA: channel idle time
- */
-#define CH_IDLE_STA 0x1130
-
-/*
- * CH_BUSY_STA: channel busy time
- */
-#define CH_BUSY_STA 0x1134
-
-/*
- * MAC_STATUS_CFG:
- * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
- * if 1 or higher one of the 2 registers is busy.
- */
-#define MAC_STATUS_CFG 0x1200
-#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
-
-/*
- * PWR_PIN_CFG:
- */
-#define PWR_PIN_CFG 0x1204
-
-/*
- * AUTOWAKEUP_CFG: Manual power control / status register
- * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
- * AUTOWAKE: 0:sleep, 1:awake
- */
-#define AUTOWAKEUP_CFG 0x1208
-#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
-#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
-#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
-
-/*
- * EDCA_AC0_CFG:
- */
-#define EDCA_AC0_CFG 0x1300
-#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC1_CFG:
- */
-#define EDCA_AC1_CFG 0x1304
-#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC2_CFG:
- */
-#define EDCA_AC2_CFG 0x1308
-#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_AC3_CFG:
- */
-#define EDCA_AC3_CFG 0x130c
-#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
-#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
-#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
-#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
-
-/*
- * EDCA_TID_AC_MAP:
- */
-#define EDCA_TID_AC_MAP 0x1310
-
-/*
- * TX_PWR_CFG_0:
- */
-#define TX_PWR_CFG_0 0x1314
-#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
-#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
-#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
-#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
-#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
-#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
-#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
-#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_1:
- */
-#define TX_PWR_CFG_1 0x1318
-#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
-#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
-#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
-#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
-#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
-#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
-#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
-#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_2:
- */
-#define TX_PWR_CFG_2 0x131c
-#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
-#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
-#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
-#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
-#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
-#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
-#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
-#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_3:
- */
-#define TX_PWR_CFG_3 0x1320
-#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
-#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
-#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
-#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
-#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
-#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
-#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
-#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
-
-/*
- * TX_PWR_CFG_4:
- */
-#define TX_PWR_CFG_4 0x1324
-#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
-#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
-#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
-#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
-
-/*
- * TX_PIN_CFG:
- */
-#define TX_PIN_CFG 0x1328
-#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
-#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
-#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
-#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
-#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
-#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
-#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
-#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
-#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
-#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
-#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
-#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
-#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
-#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
-#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
-#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
-#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
-#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
-#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
-#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
-
-/*
- * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
- */
-#define TX_BAND_CFG 0x132c
-#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
-#define TX_BAND_CFG_A FIELD32(0x00000002)
-#define TX_BAND_CFG_BG FIELD32(0x00000004)
-
-/*
- * TX_SW_CFG0:
- */
-#define TX_SW_CFG0 0x1330
-
-/*
- * TX_SW_CFG1:
- */
-#define TX_SW_CFG1 0x1334
-
-/*
- * TX_SW_CFG2:
- */
-#define TX_SW_CFG2 0x1338
-
-/*
- * TXOP_THRES_CFG:
- */
-#define TXOP_THRES_CFG 0x133c
-
-/*
- * TXOP_CTRL_CFG:
- */
-#define TXOP_CTRL_CFG 0x1340
-
-/*
- * TX_RTS_CFG:
- * RTS_THRES: unit:byte
- * RTS_FBK_EN: enable rts rate fallback
- */
-#define TX_RTS_CFG 0x1344
-#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
-#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
-#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
-
-/*
- * TX_TIMEOUT_CFG:
- * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
- * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
- * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
- * it is recommended that:
- * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
- */
-#define TX_TIMEOUT_CFG 0x1348
-#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
-#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
-#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
-
-/*
- * TX_RTY_CFG:
- * SHORT_RTY_LIMIT: short retry limit
- * LONG_RTY_LIMIT: long retry limit
- * LONG_RTY_THRE: Long retry threshoold
- * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
- * 0:expired by retry limit, 1: expired by mpdu life timer
- * AGG_RTY_MODE: Aggregate MPDU retry mode
- * 0:expired by retry limit, 1: expired by mpdu life timer
- * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
- */
-#define TX_RTY_CFG 0x134c
-#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
-#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
-#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
-#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
-#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
-#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
-
-/*
- * TX_LINK_CFG:
- * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
- * MFB_ENABLE: TX apply remote MFB 1:enable
- * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
- * 0: not apply remote remote unsolicit (MFS=7)
- * TX_MRQ_EN: MCS request TX enable
- * TX_RDG_EN: RDG TX enable
- * TX_CF_ACK_EN: Piggyback CF-ACK enable
- * REMOTE_MFB: remote MCS feedback
- * REMOTE_MFS: remote MCS feedback sequence number
- */
-#define TX_LINK_CFG 0x1350
-#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
-#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
-#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
-#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
-#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
-#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
-#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
-#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
-
-/*
- * HT_FBK_CFG0:
- */
-#define HT_FBK_CFG0 0x1354
-#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
-#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
-#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
-#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
-#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
-#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
-#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
-#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
-
-/*
- * HT_FBK_CFG1:
- */
-#define HT_FBK_CFG1 0x1358
-#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
-#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
-#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
-#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
-#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
-#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
-#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
-#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
-
-/*
- * LG_FBK_CFG0:
- */
-#define LG_FBK_CFG0 0x135c
-#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
-#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
-#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
-#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
-#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
-#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
-#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
-#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
-
-/*
- * LG_FBK_CFG1:
- */
-#define LG_FBK_CFG1 0x1360
-#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
-#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
-#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
-#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
-
-/*
- * CCK_PROT_CFG: CCK Protection
- * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
- * PROTECT_CTRL: Protection control frame type for CCK TX
- * 0:none, 1:RTS/CTS, 2:CTS-to-self
- * PROTECT_NAV: TXOP protection type for CCK TX
- * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
- * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
- * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
- * RTS_TH_EN: RTS threshold enable on CCK TX
- */
-#define CCK_PROT_CFG 0x1364
-#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * OFDM_PROT_CFG: OFDM Protection
- */
-#define OFDM_PROT_CFG 0x1368
-#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * MM20_PROT_CFG: MM20 Protection
- */
-#define MM20_PROT_CFG 0x136c
-#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * MM40_PROT_CFG: MM40 Protection
- */
-#define MM40_PROT_CFG 0x1370
-#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * GF20_PROT_CFG: GF20 Protection
- */
-#define GF20_PROT_CFG 0x1374
-#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * GF40_PROT_CFG: GF40 Protection
- */
-#define GF40_PROT_CFG 0x1378
-#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
-#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
-#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
-#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
-#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
-
-/*
- * EXP_CTS_TIME:
- */
-#define EXP_CTS_TIME 0x137c
-
-/*
- * EXP_ACK_TIME:
- */
-#define EXP_ACK_TIME 0x1380
-
-/*
- * RX_FILTER_CFG: RX configuration register.
- */
-#define RX_FILTER_CFG 0x1400
-#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
-#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
-#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
-#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
-#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
-#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
-#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
-#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
-#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
-#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
-#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
-#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
-#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
-#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
-#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
-#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
-#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
-
-/*
- * AUTO_RSP_CFG:
- * AUTORESPONDER: 0: disable, 1: enable
- * BAC_ACK_POLICY: 0:long, 1:short preamble
- * CTS_40_MMODE: Response CTS 40MHz duplicate mode
- * CTS_40_MREF: Response CTS 40MHz duplicate mode
- * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
- * DUAL_CTS_EN: Power bit value in control frame
- * ACK_CTS_PSM_BIT:Power bit value in control frame
- */
-#define AUTO_RSP_CFG 0x1404
-#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
-#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
-#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
-#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
-#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
-#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
-#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
-
-/*
- * LEGACY_BASIC_RATE:
- */
-#define LEGACY_BASIC_RATE 0x1408
-
-/*
- * HT_BASIC_RATE:
- */
-#define HT_BASIC_RATE 0x140c
-
-/*
- * HT_CTRL_CFG:
- */
-#define HT_CTRL_CFG 0x1410
-
-/*
- * SIFS_COST_CFG:
- */
-#define SIFS_COST_CFG 0x1414
-
-/*
- * RX_PARSER_CFG:
- * Set NAV for all received frames
- */
-#define RX_PARSER_CFG 0x1418
-
-/*
- * TX_SEC_CNT0:
- */
-#define TX_SEC_CNT0 0x1500
-
-/*
- * RX_SEC_CNT0:
- */
-#define RX_SEC_CNT0 0x1504
-
-/*
- * CCMP_FC_MUTE:
- */
-#define CCMP_FC_MUTE 0x1508
-
-/*
- * TXOP_HLDR_ADDR0:
- */
-#define TXOP_HLDR_ADDR0 0x1600
-
-/*
- * TXOP_HLDR_ADDR1:
- */
-#define TXOP_HLDR_ADDR1 0x1604
-
-/*
- * TXOP_HLDR_ET:
- */
-#define TXOP_HLDR_ET 0x1608
-
-/*
- * QOS_CFPOLL_RA_DW0:
- */
-#define QOS_CFPOLL_RA_DW0 0x160c
-
-/*
- * QOS_CFPOLL_RA_DW1:
- */
-#define QOS_CFPOLL_RA_DW1 0x1610
-
-/*
- * QOS_CFPOLL_QC:
- */
-#define QOS_CFPOLL_QC 0x1614
-
-/*
- * RX_STA_CNT0: RX PLCP error count & RX CRC error count
- */
-#define RX_STA_CNT0 0x1700
-#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
-#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
-
-/*
- * RX_STA_CNT1: RX False CCA count & RX LONG frame count
- */
-#define RX_STA_CNT1 0x1704
-#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
-#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
-
-/*
- * RX_STA_CNT2:
- */
-#define RX_STA_CNT2 0x1708
-#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
-#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT0: TX Beacon count
- */
-#define TX_STA_CNT0 0x170c
-#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
-#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT1: TX tx count
- */
-#define TX_STA_CNT1 0x1710
-#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
-#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
-
-/*
- * TX_STA_CNT2: TX tx count
- */
-#define TX_STA_CNT2 0x1714
-#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
-#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_STA_FIFO: TX Result for specific PID status fifo register
- */
-#define TX_STA_FIFO 0x1718
-#define TX_STA_FIFO_VALID FIELD32(0x00000001)
-#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
-#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
-#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
-#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
-#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
-#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT: Debug counter
- */
-#define TX_AGG_CNT 0x171c
-#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT0:
- */
-#define TX_AGG_CNT0 0x1720
-#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT1:
- */
-#define TX_AGG_CNT1 0x1724
-#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT2:
- */
-#define TX_AGG_CNT2 0x1728
-#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT3:
- */
-#define TX_AGG_CNT3 0x172c
-#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT4:
- */
-#define TX_AGG_CNT4 0x1730
-#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT5:
- */
-#define TX_AGG_CNT5 0x1734
-#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT6:
- */
-#define TX_AGG_CNT6 0x1738
-#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
-
-/*
- * TX_AGG_CNT7:
- */
-#define TX_AGG_CNT7 0x173c
-#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
-#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
-
-/*
- * MPDU_DENSITY_CNT:
- * TX_ZERO_DEL: TX zero length delimiter count
- * RX_ZERO_DEL: RX zero length delimiter count
- */
-#define MPDU_DENSITY_CNT 0x1740
-#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
-#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
-
-/*
- * Security key table memory.
- * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
- * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
- * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
- * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
- * SHARED_KEY_TABLE_BASE: 32 bytes * 32-entry
- * SHARED_KEY_MODE_BASE: 4 bits * 32-entry
- */
-#define MAC_WCID_BASE 0x1800
-#define PAIRWISE_KEY_TABLE_BASE 0x4000
-#define MAC_IVEIV_TABLE_BASE 0x6000
-#define MAC_WCID_ATTRIBUTE_BASE 0x6800
-#define SHARED_KEY_TABLE_BASE 0x6c00
-#define SHARED_KEY_MODE_BASE 0x7000
-
-#define MAC_WCID_ENTRY(__idx) \
- ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
-#define PAIRWISE_KEY_ENTRY(__idx) \
- ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
-#define MAC_IVEIV_ENTRY(__idx) \
- ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
-#define MAC_WCID_ATTR_ENTRY(__idx) \
- ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
-#define SHARED_KEY_ENTRY(__idx) \
- ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
-#define SHARED_KEY_MODE_ENTRY(__idx) \
- ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
-
-struct mac_wcid_entry {
- u8 mac[6];
- u8 reserved[2];
-} __attribute__ ((packed));
-
-struct hw_key_entry {
- u8 key[16];
- u8 tx_mic[8];
- u8 rx_mic[8];
-} __attribute__ ((packed));
-
-struct mac_iveiv_entry {
- u8 iv[8];
-} __attribute__ ((packed));
-
-/*
- * MAC_WCID_ATTRIBUTE:
- */
-#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
-#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
-#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
-#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
-
-/*
- * SHARED_KEY_MODE:
- */
-#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
-#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
-#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
-#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
-#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
-#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
-#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
-#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
-
-/*
- * HOST-MCU communication
- */
-
-/*
- * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
- */
-#define H2M_MAILBOX_CSR 0x7010
-#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
-#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
-#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
-#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
-
-/*
- * H2M_MAILBOX_CID:
- */
-#define H2M_MAILBOX_CID 0x7014
-#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
-#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
-#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
-#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
-
-/*
- * H2M_MAILBOX_STATUS:
- */
-#define H2M_MAILBOX_STATUS 0x701c
-
-/*
- * H2M_INT_SRC:
- */
-#define H2M_INT_SRC 0x7024
-
-/*
- * H2M_BBP_AGENT:
- */
-#define H2M_BBP_AGENT 0x7028
-
-/*
- * MCU_LEDCS: LED control for MCU Mailbox.
- */
-#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
-#define MCU_LEDCS_POLARITY FIELD8(0x01)
-
-/*
- * HW_CS_CTS_BASE:
- * Carrier-sense CTS frame base address.
- * It's where mac stores carrier-sense frame for carrier-sense function.
- */
-#define HW_CS_CTS_BASE 0x7700
-
-/*
- * HW_DFS_CTS_BASE:
- * FS CTS frame base address. It's where mac stores CTS frame for DFS.
- */
-#define HW_DFS_CTS_BASE 0x7780
-
-/*
- * TXRX control registers - base address 0x3000
- */
-
-/*
- * TXRX_CSR1:
- * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
- */
-#define TXRX_CSR1 0x77d0
-
-/*
- * HW_DEBUG_SETTING_BASE:
- * since NULL frame won't be that long (256 byte)
- * We steal 16 tail bytes to save debugging settings
- */
-#define HW_DEBUG_SETTING_BASE 0x77f0
-#define HW_DEBUG_SETTING_BASE2 0x7770
-
-/*
- * HW_BEACON_BASE
- * In order to support maximum 8 MBSS and its maximum length
- * is 512 bytes for each beacon
- * Three section discontinue memory segments will be used.
- * 1. The original region for BCN 0~3
- * 2. Extract memory from FCE table for BCN 4~5
- * 3. Extract memory from Pair-wise key table for BCN 6~7
- * It occupied those memory of wcid 238~253 for BCN 6
- * and wcid 222~237 for BCN 7
- *
- * IMPORTANT NOTE: Not sure why legacy driver does this,
- * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
- */
-#define HW_BEACON_BASE0 0x7800
-#define HW_BEACON_BASE1 0x7a00
-#define HW_BEACON_BASE2 0x7c00
-#define HW_BEACON_BASE3 0x7e00
-#define HW_BEACON_BASE4 0x7200
-#define HW_BEACON_BASE5 0x7400
-#define HW_BEACON_BASE6 0x5dc0
-#define HW_BEACON_BASE7 0x5bc0
-
-#define HW_BEACON_OFFSET(__index) \
- ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
- (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
- (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
-
-/*
* 8051 firmware image.
*/
#define FIRMWARE_RT2870 "rt2870.bin"
#define FIRMWARE_IMAGE_BASE 0x3000
/*
- * BBP registers.
- * The wordsize of the BBP is 8 bits.
- */
-
-/*
- * BBP 1: TX Antenna
- */
-#define BBP1_TX_POWER FIELD8(0x07)
-#define BBP1_TX_ANTENNA FIELD8(0x18)
-
-/*
- * BBP 3: RX Antenna
- */
-#define BBP3_RX_ANTENNA FIELD8(0x18)
-#define BBP3_HT40_PLUS FIELD8(0x20)
-
-/*
- * BBP 4: Bandwidth
- */
-#define BBP4_TX_BF FIELD8(0x01)
-#define BBP4_BANDWIDTH FIELD8(0x18)
-
-/*
- * RFCSR registers
- * The wordsize of the RFCSR is 8 bits.
- */
-
-/*
- * RFCSR 6:
- */
-#define RFCSR6_R FIELD8(0x03)
-
-/*
- * RFCSR 7:
- */
-#define RFCSR7_RF_TUNING FIELD8(0x01)
-
-/*
- * RFCSR 12:
- */
-#define RFCSR12_TX_POWER FIELD8(0x1f)
-
-/*
- * RFCSR 22:
- */
-#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
-
-/*
- * RFCSR 23:
- */
-#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
-
-/*
- * RFCSR 30:
- */
-#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
-
-/*
- * RF registers
- */
-
-/*
- * RF 2
- */
-#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
-#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
-#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
-
-/*
- * RF 3
- */
-#define RF3_TXPOWER_G FIELD32(0x00003e00)
-#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
-#define RF3_TXPOWER_A FIELD32(0x00003c00)
-
-/*
- * RF 4
- */
-#define RF4_TXPOWER_G FIELD32(0x000007c0)
-#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
-#define RF4_TXPOWER_A FIELD32(0x00000780)
-#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
-#define RF4_HT40 FIELD32(0x00200000)
-
-/*
- * EEPROM content.
- * The wordsize of the EEPROM is 16 bits.
- */
-
-/*
- * EEPROM Version
- */
-#define EEPROM_VERSION 0x0001
-#define EEPROM_VERSION_FAE FIELD16(0x00ff)
-#define EEPROM_VERSION_VERSION FIELD16(0xff00)
-
-/*
- * HW MAC address.
- */
-#define EEPROM_MAC_ADDR_0 0x0002
-#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR_1 0x0003
-#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
-#define EEPROM_MAC_ADDR_2 0x0004
-#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
-#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
-
-/*
- * EEPROM ANTENNA config
- * RXPATH: 1: 1R, 2: 2R, 3: 3R
- * TXPATH: 1: 1T, 2: 2T
- */
-#define EEPROM_ANTENNA 0x001a
-#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
-#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
-#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
-
-/*
- * EEPROM NIC config
- * CARDBUS_ACCEL: 0 - enable, 1 - disable
- */
-#define EEPROM_NIC 0x001b
-#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
-#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
-#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
-#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
-#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
-#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
-#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
-#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
-#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
-#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
-
-/*
- * EEPROM frequency
- */
-#define EEPROM_FREQ 0x001d
-#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
-#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
-#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
-
-/*
- * EEPROM LED
- * POLARITY_RDY_G: Polarity RDY_G setting.
- * POLARITY_RDY_A: Polarity RDY_A setting.
- * POLARITY_ACT: Polarity ACT setting.
- * POLARITY_GPIO_0: Polarity GPIO0 setting.
- * POLARITY_GPIO_1: Polarity GPIO1 setting.
- * POLARITY_GPIO_2: Polarity GPIO2 setting.
- * POLARITY_GPIO_3: Polarity GPIO3 setting.
- * POLARITY_GPIO_4: Polarity GPIO4 setting.
- * LED_MODE: Led mode.
- */
-#define EEPROM_LED1 0x001e
-#define EEPROM_LED2 0x001f
-#define EEPROM_LED3 0x0020
-#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
-#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
-#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
-#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
-#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
-#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
-#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
-#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
-#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
-
-/*
- * EEPROM LNA
- */
-#define EEPROM_LNA 0x0022
-#define EEPROM_LNA_BG FIELD16(0x00ff)
-#define EEPROM_LNA_A0 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI BG offset
- */
-#define EEPROM_RSSI_BG 0x0023
-#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
-#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI BG2 offset
- */
-#define EEPROM_RSSI_BG2 0x0024
-#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
-#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI A offset
- */
-#define EEPROM_RSSI_A 0x0025
-#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
-#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
-
-/*
- * EEPROM RSSI A2 offset
- */
-#define EEPROM_RSSI_A2 0x0026
-#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
-#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
-
-/*
- * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
- * This is delta in 40MHZ.
- * VALUE: Tx Power dalta value (MAX=4)
- * TYPE: 1: Plus the delta value, 0: minus the delta value
- * TXPOWER: Enable:
- */
-#define EEPROM_TXPOWER_DELTA 0x0028
-#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
-#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
-#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
-
-/*
- * EEPROM TXPOWER 802.11BG
- */
-#define EEPROM_TXPOWER_BG1 0x0029
-#define EEPROM_TXPOWER_BG2 0x0030
-#define EEPROM_TXPOWER_BG_SIZE 7
-#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
-#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
-
-/*
- * EEPROM TXPOWER 802.11A
- */
-#define EEPROM_TXPOWER_A1 0x003c
-#define EEPROM_TXPOWER_A2 0x0053
-#define EEPROM_TXPOWER_A_SIZE 6
-#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
-#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
-
-/*
- * EEPROM TXpower byrate: 20MHZ power
- */
-#define EEPROM_TXPOWER_BYRATE 0x006f
-
-/*
- * EEPROM BBP.
- */
-#define EEPROM_BBP_START 0x0078
-#define EEPROM_BBP_SIZE 16
-#define EEPROM_BBP_VALUE FIELD16(0x00ff)
-#define EEPROM_BBP_REG_ID FIELD16(0xff00)
-
-/*
- * MCU mailbox commands.
- */
-#define MCU_SLEEP 0x30
-#define MCU_WAKEUP 0x31
-#define MCU_RADIO_OFF 0x35
-#define MCU_CURRENT 0x36
-#define MCU_LED 0x50
-#define MCU_LED_STRENGTH 0x51
-#define MCU_LED_1 0x52
-#define MCU_LED_2 0x53
-#define MCU_LED_3 0x54
-#define MCU_RADAR 0x60
-#define MCU_BOOT_SIGNAL 0x72
-#define MCU_BBP_SIGNAL 0x80
-#define MCU_POWER_SAVE 0x83
-
-/*
- * MCU mailbox tokens
- */
-#define TOKEN_WAKUP 3
-
-/*
* DMA descriptor defines.
*/
-#define TXD_DESC_SIZE ( 4 * sizeof(__le32) )
#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
-#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) )
-#define RXD_DESC_SIZE ( 1 * sizeof(__le32) )
-#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
-
-/*
- * TX descriptor format for TX, PRIO and Beacon Ring.
- */
-
-/*
- * Word0
- */
-#define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
-
-/*
- * Word1
- */
-#define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
-#define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
-#define TXD_W1_BURST FIELD32(0x00008000)
-#define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
-#define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
-#define TXD_W1_DMA_DONE FIELD32(0x80000000)
-
-/*
- * Word2
- */
-#define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
-
-/*
- * Word3
- * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
- * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
- * 0:MGMT, 1:HCCA 2:EDCA
- */
-#define TXD_W3_WIV FIELD32(0x01000000)
-#define TXD_W3_QSEL FIELD32(0x06000000)
-#define TXD_W3_TCO FIELD32(0x20000000)
-#define TXD_W3_UCO FIELD32(0x40000000)
-#define TXD_W3_ICO FIELD32(0x80000000)
+#define RXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
/*
* TX Info structure
@@ -1807,52 +97,6 @@ struct mac_iveiv_entry {
#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
/*
- * TX WI structure
- */
-
-/*
- * Word0
- * FRAG: 1 To inform TKIP engine this is a fragment.
- * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
- * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
- * BW: Channel bandwidth 20MHz or 40 MHz
- * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
- */
-#define TXWI_W0_FRAG FIELD32(0x00000001)
-#define TXWI_W0_MIMO_PS FIELD32(0x00000002)
-#define TXWI_W0_CF_ACK FIELD32(0x00000004)
-#define TXWI_W0_TS FIELD32(0x00000008)
-#define TXWI_W0_AMPDU FIELD32(0x00000010)
-#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0)
-#define TXWI_W0_TX_OP FIELD32(0x00000300)
-#define TXWI_W0_MCS FIELD32(0x007f0000)
-#define TXWI_W0_BW FIELD32(0x00800000)
-#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
-#define TXWI_W0_STBC FIELD32(0x06000000)
-#define TXWI_W0_IFS FIELD32(0x08000000)
-#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
-
-/*
- * Word1
- */
-#define TXWI_W1_ACK FIELD32(0x00000001)
-#define TXWI_W1_NSEQ FIELD32(0x00000002)
-#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc)
-#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00)
-#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
-#define TXWI_W1_PACKETID FIELD32(0xf0000000)
-
-/*
- * Word2
- */
-#define TXWI_W2_IV FIELD32(0xffffffff)
-
-/*
- * Word3
- */
-#define TXWI_W3_EIV FIELD32(0xffffffff)
-
-/*
* RX descriptor format for RX Ring.
*/
@@ -1888,64 +132,4 @@ struct mac_iveiv_entry {
#define RXD_W0_LAST_AMSDU FIELD32(0x00080000)
#define RXD_W0_PLCP_SIGNAL FIELD32(0xfff00000)
-/*
- * RX WI structure
- */
-
-/*
- * Word0
- */
-#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
-#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
-#define RXWI_W0_BSSID FIELD32(0x00001c00)
-#define RXWI_W0_UDF FIELD32(0x0000e000)
-#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
-#define RXWI_W0_TID FIELD32(0xf0000000)
-
-/*
- * Word1
- */
-#define RXWI_W1_FRAG FIELD32(0x0000000f)
-#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
-#define RXWI_W1_MCS FIELD32(0x007f0000)
-#define RXWI_W1_BW FIELD32(0x00800000)
-#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
-#define RXWI_W1_STBC FIELD32(0x06000000)
-#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
-
-/*
- * Word2
- */
-#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
-#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
-#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
-
-/*
- * Word3
- */
-#define RXWI_W3_SNR0 FIELD32(0x000000ff)
-#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
-
-/*
- * Macros for converting txpower from EEPROM to mac80211 value
- * and from mac80211 value to register value.
- */
-#define MIN_G_TXPOWER 0
-#define MIN_A_TXPOWER -7
-#define MAX_G_TXPOWER 31
-#define MAX_A_TXPOWER 15
-#define DEFAULT_TXPOWER 5
-
-#define TXPOWER_G_FROM_DEV(__txpower) \
- ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
-
-#define TXPOWER_G_TO_DEV(__txpower) \
- clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
-
-#define TXPOWER_A_FROM_DEV(__txpower) \
- ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
-
-#define TXPOWER_A_TO_DEV(__txpower) \
- clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
-
#endif /* RT2800USB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 196de8ab815..c83dbaefd57 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -144,6 +144,11 @@ struct avg_val {
int avg_weight;
};
+enum rt2x00_chip_intf {
+ RT2X00_CHIP_INTF_PCI,
+ RT2X00_CHIP_INTF_USB,
+};
+
/*
* Chipset identification
* The chipset on the device is composed of a RT and RF chip.
@@ -169,6 +174,8 @@ struct rt2x00_chip {
u16 rf;
u32 rev;
+
+ enum rt2x00_chip_intf intf;
};
/*
@@ -842,9 +849,23 @@ struct rt2x00_dev {
* Firmware image.
*/
const struct firmware *fw;
+
+ /*
+ * Driver specific data.
+ */
+ void *priv;
};
/*
+ * Register defines.
+ * Some registers require multiple attempts before success,
+ * in those cases REGISTER_BUSY_COUNT attempts should be
+ * taken with a REGISTER_BUSY_DELAY interval.
+ */
+#define REGISTER_BUSY_COUNT 5
+#define REGISTER_BUSY_DELAY 100
+
+/*
* Generic RF access.
* The RF is being accessed by word index.
*/
@@ -932,6 +953,28 @@ static inline bool rt2x00_check_rev(const struct rt2x00_chip *chipset,
return ((chipset->rev & mask) == rev);
}
+static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
+ enum rt2x00_chip_intf intf)
+{
+ rt2x00dev->chip.intf = intf;
+}
+
+static inline bool rt2x00_intf(const struct rt2x00_chip *chipset,
+ enum rt2x00_chip_intf intf)
+{
+ return (chipset->intf == intf);
+}
+
+static inline bool rt2x00_intf_is_pci(struct rt2x00_dev *rt2x00dev)
+{
+ return rt2x00_intf(&rt2x00dev->chip, RT2X00_CHIP_INTF_PCI);
+}
+
+static inline bool rt2x00_intf_is_usb(struct rt2x00_dev *rt2x00dev)
+{
+ return rt2x00_intf(&rt2x00dev->chip, RT2X00_CHIP_INTF_USB);
+}
+
/**
* rt2x00queue_map_txskb - Map a skb into DMA for TX purposes.
* @rt2x00dev: Pointer to &struct rt2x00_dev.
diff --git a/drivers/net/wireless/rt2x00/rt2x00leds.h b/drivers/net/wireless/rt2x00/rt2x00leds.h
index 1046977e6a1..8e03c045e03 100644
--- a/drivers/net/wireless/rt2x00/rt2x00leds.h
+++ b/drivers/net/wireless/rt2x00/rt2x00leds.h
@@ -33,8 +33,6 @@ enum led_type {
LED_TYPE_QUALITY,
};
-#ifdef CONFIG_RT2X00_LIB_LEDS
-
struct rt2x00_led {
struct rt2x00_dev *rt2x00dev;
struct led_classdev led_dev;
@@ -45,6 +43,4 @@ struct rt2x00_led {
#define LED_REGISTERED ( 1 << 1 )
};
-#endif /* CONFIG_RT2X00_LIB_LEDS */
-
#endif /* RT2X00LEDS_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h
index 15a12487e04..ae33eebe9a6 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.h
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.h
@@ -35,15 +35,6 @@
#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
/*
- * Register defines.
- * Some registers require multiple attempts before success,
- * in those cases REGISTER_BUSY_COUNT attempts should be
- * taken with a REGISTER_BUSY_DELAY interval.
- */
-#define REGISTER_BUSY_COUNT 5
-#define REGISTER_BUSY_DELAY 100
-
-/*
* Register access.
*/
static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
@@ -53,10 +44,9 @@ static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
*value = readl(rt2x00dev->csr.base + offset);
}
-static inline void
-rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- void *value, const u16 length)
+static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ void *value, const u32 length)
{
memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
}
@@ -68,10 +58,10 @@ static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
writel(value, rt2x00dev->csr.base + offset);
}
-static inline void
-rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- const void *value, const u16 length)
+static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
+ const unsigned int offset,
+ const void *value,
+ const u32 length)
{
memcpy_toio(rt2x00dev->csr.base + offset, value, length);
}
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index f02b48a9059..c9cbdaa1073 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -160,7 +160,7 @@ EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_large_buff);
int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
const unsigned int offset,
- struct rt2x00_field32 field,
+ const struct rt2x00_field32 field,
u32 *reg)
{
unsigned int i;
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h
index bd2d59c85f1..9943e428bc2 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.h
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.h
@@ -39,17 +39,11 @@
#define USB_DEVICE_DATA(__ops) .driver_info = (kernel_ulong_t)(__ops)
/*
- * Register defines.
- * Some registers require multiple attempts before success,
- * in those cases REGISTER_BUSY_COUNT attempts should be
- * taken with a REGISTER_BUSY_DELAY interval.
* For USB vendor requests we need to pass a timeout
* time in ms, for this we use the REGISTER_TIMEOUT,
* however when loading firmware a higher value is
* required. In that case we use the REGISTER_TIMEOUT_FIRMWARE.
*/
-#define REGISTER_BUSY_COUNT 5
-#define REGISTER_BUSY_DELAY 100
#define REGISTER_TIMEOUT 500
#define REGISTER_TIMEOUT_FIRMWARE 1000
@@ -232,7 +226,7 @@ static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev,
}
/**
- * rt2x00usb_regbusy_read - Read 32bit register word
+ * rt2x00usb_register_read - Read 32bit register word
* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
* @offset: Register offset
* @value: Pointer to where register contents should be stored
@@ -340,12 +334,13 @@ static inline void rt2x00usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
* through rt2x00usb_vendor_request_buff().
*/
static inline void rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
- const unsigned int offset,
- void *value, const u32 length)
+ const unsigned int offset,
+ const void *value,
+ const u32 length)
{
rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
USB_VENDOR_REQUEST_OUT, offset,
- value, length,
+ (void *)value, length,
REGISTER_TIMEOUT32(length));
}
@@ -364,7 +359,7 @@ static inline void rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
*/
int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
const unsigned int offset,
- struct rt2x00_field32 field,
+ const struct rt2x00_field32 field,
u32 *reg);
/*
diff --git a/drivers/net/wireless/rtl818x/rtl8187.h b/drivers/net/wireless/rtl818x/rtl8187.h
index bf9175a8c1f..abb4907cf29 100644
--- a/drivers/net/wireless/rtl818x/rtl8187.h
+++ b/drivers/net/wireless/rtl818x/rtl8187.h
@@ -119,7 +119,6 @@ struct rtl8187_priv {
} hw_rev;
struct sk_buff_head rx_queue;
u8 signal;
- u8 quality;
u8 noise;
u8 slot_time;
u8 aifsn[4];
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c
index 2017ccc0014..76973b8c709 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -320,7 +320,6 @@ static void rtl8187_rx_cb(struct urb *urb)
struct ieee80211_rx_status rx_status = { 0 };
int rate, signal;
u32 flags;
- u32 quality;
unsigned long f;
spin_lock_irqsave(&priv->rx_queue.lock, f);
@@ -338,10 +337,9 @@ static void rtl8187_rx_cb(struct urb *urb)
(typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
flags = le32_to_cpu(hdr->flags);
/* As with the RTL8187B below, the AGC is used to calculate
- * signal strength and quality. In this case, the scaling
+ * signal strength. In this case, the scaling
* constants are derived from the output of p54usb.
*/
- quality = 130 - ((41 * hdr->agc) >> 6);
signal = -4 - ((27 * hdr->agc) >> 6);
rx_status.antenna = (hdr->signal >> 7) & 1;
rx_status.mactime = le64_to_cpu(hdr->mac_time);
@@ -354,23 +352,18 @@ static void rtl8187_rx_cb(struct urb *urb)
* In testing, none of these quantities show qualitative
* agreement with AP signal strength, except for the AGC,
* which is inversely proportional to the strength of the
- * signal. In the following, the quality and signal strength
- * are derived from the AGC. The arbitrary scaling constants
+ * signal. In the following, the signal strength
+ * is derived from the AGC. The arbitrary scaling constants
* are chosen to make the results close to the values obtained
* for a BCM4312 using b43 as the driver. The noise is ignored
* for now.
*/
flags = le32_to_cpu(hdr->flags);
- quality = 170 - hdr->agc;
signal = 14 - hdr->agc / 2;
rx_status.antenna = (hdr->rssi >> 7) & 1;
rx_status.mactime = le64_to_cpu(hdr->mac_time);
}
- if (quality > 100)
- quality = 100;
- rx_status.qual = quality;
- priv->quality = quality;
rx_status.signal = signal;
priv->signal = signal;
rate = (flags >> 20) & 0xF;
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
deleted file mode 100644
index 698aade79d4..00000000000
--- a/drivers/net/wireless/strip.c
+++ /dev/null
@@ -1,2822 +0,0 @@
-/*
- * Copyright 1996 The Board of Trustees of The Leland Stanford
- * Junior University. All Rights Reserved.
- *
- * Permission to use, copy, modify, and distribute this
- * software and its documentation for any purpose and without
- * fee is hereby granted, provided that the above copyright
- * notice appear in all copies. Stanford University
- * makes no representations about the suitability of this
- * software for any purpose. It is provided "as is" without
- * express or implied warranty.
- *
- * strip.c This module implements Starmode Radio IP (STRIP)
- * for kernel-based devices like TTY. It interfaces between a
- * raw TTY, and the kernel's INET protocol layers (via DDI).
- *
- * Version: @(#)strip.c 1.3 July 1997
- *
- * Author: Stuart Cheshire <cheshire@cs.stanford.edu>
- *
- * Fixes: v0.9 12th Feb 1996 (SC)
- * New byte stuffing (2+6 run-length encoding)
- * New watchdog timer task
- * New Protocol key (SIP0)
- *
- * v0.9.1 3rd March 1996 (SC)
- * Changed to dynamic device allocation -- no more compile
- * time (or boot time) limit on the number of STRIP devices.
- *
- * v0.9.2 13th March 1996 (SC)
- * Uses arp cache lookups (but doesn't send arp packets yet)
- *
- * v0.9.3 17th April 1996 (SC)
- * Fixed bug where STR_ERROR flag was getting set unneccessarily
- * (causing otherwise good packets to be unneccessarily dropped)
- *
- * v0.9.4 27th April 1996 (SC)
- * First attempt at using "&COMMAND" Starmode AT commands
- *
- * v0.9.5 29th May 1996 (SC)
- * First attempt at sending (unicast) ARP packets
- *
- * v0.9.6 5th June 1996 (Elliot)
- * Put "message level" tags in every "printk" statement
- *
- * v0.9.7 13th June 1996 (laik)
- * Added support for the /proc fs
- *
- * v0.9.8 July 1996 (Mema)
- * Added packet logging
- *
- * v1.0 November 1996 (SC)
- * Fixed (severe) memory leaks in the /proc fs code
- * Fixed race conditions in the logging code
- *
- * v1.1 January 1997 (SC)
- * Deleted packet logging (use tcpdump instead)
- * Added support for Metricom Firmware v204 features
- * (like message checksums)
- *
- * v1.2 January 1997 (SC)
- * Put portables list back in
- *
- * v1.3 July 1997 (SC)
- * Made STRIP driver set the radio's baud rate automatically.
- * It is no longer necessarily to manually set the radio's
- * rate permanently to 115200 -- the driver handles setting
- * the rate automatically.
- */
-
-#ifdef MODULE
-static const char StripVersion[] = "1.3A-STUART.CHESHIRE-MODULAR";
-#else
-static const char StripVersion[] = "1.3A-STUART.CHESHIRE";
-#endif
-
-#define TICKLE_TIMERS 0
-#define EXT_COUNTERS 1
-
-
-/************************************************************************/
-/* Header files */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/bitops.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-
-# include <linux/ctype.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/in.h>
-#include <linux/tty.h>
-#include <linux/errno.h>
-#include <linux/netdevice.h>
-#include <linux/inetdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/if_arp.h>
-#include <linux/if_strip.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/serialP.h>
-#include <linux/rcupdate.h>
-#include <linux/compat.h>
-#include <net/arp.h>
-#include <net/net_namespace.h>
-
-#include <linux/ip.h>
-#include <linux/tcp.h>
-#include <linux/time.h>
-#include <linux/jiffies.h>
-
-/************************************************************************/
-/* Useful structures and definitions */
-
-/*
- * A MetricomKey identifies the protocol being carried inside a Metricom
- * Starmode packet.
- */
-
-typedef union {
- __u8 c[4];
- __u32 l;
-} MetricomKey;
-
-/*
- * An IP address can be viewed as four bytes in memory (which is what it is) or as
- * a single 32-bit long (which is convenient for assignment, equality testing etc.)
- */
-
-typedef union {
- __u8 b[4];
- __u32 l;
-} IPaddr;
-
-/*
- * A MetricomAddressString is used to hold a printable representation of
- * a Metricom address.
- */
-
-typedef struct {
- __u8 c[24];
-} MetricomAddressString;
-
-/* Encapsulation can expand packet of size x to 65/64x + 1
- * Sent packet looks like "<CR>*<address>*<key><encaps payload><CR>"
- * 1 1 1-18 1 4 ? 1
- * eg. <CR>*0000-1234*SIP0<encaps payload><CR>
- * We allow 31 bytes for the stars, the key, the address and the <CR>s
- */
-#define STRIP_ENCAP_SIZE(X) (32 + (X)*65L/64L)
-
-/*
- * A STRIP_Header is never really sent over the radio, but making a dummy
- * header for internal use within the kernel that looks like an Ethernet
- * header makes certain other software happier. For example, tcpdump
- * already understands Ethernet headers.
- */
-
-typedef struct {
- MetricomAddress dst_addr; /* Destination address, e.g. "0000-1234" */
- MetricomAddress src_addr; /* Source address, e.g. "0000-5678" */
- unsigned short protocol; /* The protocol type, using Ethernet codes */
-} STRIP_Header;
-
-typedef struct {
- char c[60];
-} MetricomNode;
-
-#define NODE_TABLE_SIZE 32
-typedef struct {
- struct timeval timestamp;
- int num_nodes;
- MetricomNode node[NODE_TABLE_SIZE];
-} MetricomNodeTable;
-
-enum { FALSE = 0, TRUE = 1 };
-
-/*
- * Holds the radio's firmware version.
- */
-typedef struct {
- char c[50];
-} FirmwareVersion;
-
-/*
- * Holds the radio's serial number.
- */
-typedef struct {
- char c[18];
-} SerialNumber;
-
-/*
- * Holds the radio's battery voltage.
- */
-typedef struct {
- char c[11];
-} BatteryVoltage;
-
-typedef struct {
- char c[8];
-} char8;
-
-enum {
- NoStructure = 0, /* Really old firmware */
- StructuredMessages = 1, /* Parsable AT response msgs */
- ChecksummedMessages = 2 /* Parsable AT response msgs with checksums */
-};
-
-struct strip {
- int magic;
- /*
- * These are pointers to the malloc()ed frame buffers.
- */
-
- unsigned char *rx_buff; /* buffer for received IP packet */
- unsigned char *sx_buff; /* buffer for received serial data */
- int sx_count; /* received serial data counter */
- int sx_size; /* Serial buffer size */
- unsigned char *tx_buff; /* transmitter buffer */
- unsigned char *tx_head; /* pointer to next byte to XMIT */
- int tx_left; /* bytes left in XMIT queue */
- int tx_size; /* Serial buffer size */
-
- /*
- * STRIP interface statistics.
- */
-
- unsigned long rx_packets; /* inbound frames counter */
- unsigned long tx_packets; /* outbound frames counter */
- unsigned long rx_errors; /* Parity, etc. errors */
- unsigned long tx_errors; /* Planned stuff */
- unsigned long rx_dropped; /* No memory for skb */
- unsigned long tx_dropped; /* When MTU change */
- unsigned long rx_over_errors; /* Frame bigger than STRIP buf. */
-
- unsigned long pps_timer; /* Timer to determine pps */
- unsigned long rx_pps_count; /* Counter to determine pps */
- unsigned long tx_pps_count; /* Counter to determine pps */
- unsigned long sx_pps_count; /* Counter to determine pps */
- unsigned long rx_average_pps; /* rx packets per second * 8 */
- unsigned long tx_average_pps; /* tx packets per second * 8 */
- unsigned long sx_average_pps; /* sent packets per second * 8 */
-
-#ifdef EXT_COUNTERS
- unsigned long rx_bytes; /* total received bytes */
- unsigned long tx_bytes; /* total received bytes */
- unsigned long rx_rbytes; /* bytes thru radio i/f */
- unsigned long tx_rbytes; /* bytes thru radio i/f */
- unsigned long rx_sbytes; /* tot bytes thru serial i/f */
- unsigned long tx_sbytes; /* tot bytes thru serial i/f */
- unsigned long rx_ebytes; /* tot stat/err bytes */
- unsigned long tx_ebytes; /* tot stat/err bytes */
-#endif
-
- /*
- * Internal variables.
- */
-
- struct list_head list; /* Linked list of devices */
-
- int discard; /* Set if serial error */
- int working; /* Is radio working correctly? */
- int firmware_level; /* Message structuring level */
- int next_command; /* Next periodic command */
- unsigned int user_baud; /* The user-selected baud rate */
- int mtu; /* Our mtu (to spot changes!) */
- long watchdog_doprobe; /* Next time to test the radio */
- long watchdog_doreset; /* Time to do next reset */
- long gratuitous_arp; /* Time to send next ARP refresh */
- long arp_interval; /* Next ARP interval */
- struct timer_list idle_timer; /* For periodic wakeup calls */
- MetricomAddress true_dev_addr; /* True address of radio */
- int manual_dev_addr; /* Hack: See note below */
-
- FirmwareVersion firmware_version; /* The radio's firmware version */
- SerialNumber serial_number; /* The radio's serial number */
- BatteryVoltage battery_voltage; /* The radio's battery voltage */
-
- /*
- * Other useful structures.
- */
-
- struct tty_struct *tty; /* ptr to TTY structure */
- struct net_device *dev; /* Our device structure */
-
- /*
- * Neighbour radio records
- */
-
- MetricomNodeTable portables;
- MetricomNodeTable poletops;
-};
-
-/*
- * Note: manual_dev_addr hack
- *
- * It is not possible to change the hardware address of a Metricom radio,
- * or to send packets with a user-specified hardware source address, thus
- * trying to manually set a hardware source address is a questionable
- * thing to do. However, if the user *does* manually set the hardware
- * source address of a STRIP interface, then the kernel will believe it,
- * and use it in certain places. For example, the hardware address listed
- * by ifconfig will be the manual address, not the true one.
- * (Both addresses are listed in /proc/net/strip.)
- * Also, ARP packets will be sent out giving the user-specified address as
- * the source address, not the real address. This is dangerous, because
- * it means you won't receive any replies -- the ARP replies will go to
- * the specified address, which will be some other radio. The case where
- * this is useful is when that other radio is also connected to the same
- * machine. This allows you to connect a pair of radios to one machine,
- * and to use one exclusively for inbound traffic, and the other
- * exclusively for outbound traffic. Pretty neat, huh?
- *
- * Here's the full procedure to set this up:
- *
- * 1. "slattach" two interfaces, e.g. st0 for outgoing packets,
- * and st1 for incoming packets
- *
- * 2. "ifconfig" st0 (outbound radio) to have the hardware address
- * which is the real hardware address of st1 (inbound radio).
- * Now when it sends out packets, it will masquerade as st1, and
- * replies will be sent to that radio, which is exactly what we want.
- *
- * 3. Set the route table entry ("route add default ..." or
- * "route add -net ...", as appropriate) to send packets via the st0
- * interface (outbound radio). Do not add any route which sends packets
- * out via the st1 interface -- that radio is for inbound traffic only.
- *
- * 4. "ifconfig" st1 (inbound radio) to have hardware address zero.
- * This tells the STRIP driver to "shut down" that interface and not
- * send any packets through it. In particular, it stops sending the
- * periodic gratuitous ARP packets that a STRIP interface normally sends.
- * Also, when packets arrive on that interface, it will search the
- * interface list to see if there is another interface who's manual
- * hardware address matches its own real address (i.e. st0 in this
- * example) and if so it will transfer ownership of the skbuff to
- * that interface, so that it looks to the kernel as if the packet
- * arrived on that interface. This is necessary because when the
- * kernel sends an ARP packet on st0, it expects to get a reply on
- * st0, and if it sees the reply come from st1 then it will ignore
- * it (to be accurate, it puts the entry in the ARP table, but
- * labelled in such a way that st0 can't use it).
- *
- * Thanks to Petros Maniatis for coming up with the idea of splitting
- * inbound and outbound traffic between two interfaces, which turned
- * out to be really easy to implement, even if it is a bit of a hack.
- *
- * Having set a manual address on an interface, you can restore it
- * to automatic operation (where the address is automatically kept
- * consistent with the real address of the radio) by setting a manual
- * address of all ones, e.g. "ifconfig st0 hw strip FFFFFFFFFFFF"
- * This 'turns off' manual override mode for the device address.
- *
- * Note: The IEEE 802 headers reported in tcpdump will show the *real*
- * radio addresses the packets were sent and received from, so that you
- * can see what is really going on with packets, and which interfaces
- * they are really going through.
- */
-
-
-/************************************************************************/
-/* Constants */
-
-/*
- * CommandString1 works on all radios
- * Other CommandStrings are only used with firmware that provides structured responses.
- *
- * ats319=1 Enables Info message for node additions and deletions
- * ats319=2 Enables Info message for a new best node
- * ats319=4 Enables checksums
- * ats319=8 Enables ACK messages
- */
-
-static const int MaxCommandStringLength = 32;
-static const int CompatibilityCommand = 1;
-
-static const char CommandString0[] = "*&COMMAND*ATS319=7"; /* Turn on checksums & info messages */
-static const char CommandString1[] = "*&COMMAND*ATS305?"; /* Query radio name */
-static const char CommandString2[] = "*&COMMAND*ATS325?"; /* Query battery voltage */
-static const char CommandString3[] = "*&COMMAND*ATS300?"; /* Query version information */
-static const char CommandString4[] = "*&COMMAND*ATS311?"; /* Query poletop list */
-static const char CommandString5[] = "*&COMMAND*AT~LA"; /* Query portables list */
-typedef struct {
- const char *string;
- long length;
-} StringDescriptor;
-
-static const StringDescriptor CommandString[] = {
- {CommandString0, sizeof(CommandString0) - 1},
- {CommandString1, sizeof(CommandString1) - 1},
- {CommandString2, sizeof(CommandString2) - 1},
- {CommandString3, sizeof(CommandString3) - 1},
- {CommandString4, sizeof(CommandString4) - 1},
- {CommandString5, sizeof(CommandString5) - 1}
-};
-
-#define GOT_ALL_RADIO_INFO(S) \
- ((S)->firmware_version.c[0] && \
- (S)->battery_voltage.c[0] && \
- memcmp(&(S)->true_dev_addr, zero_address.c, sizeof(zero_address)))
-
-static const char hextable[16] = "0123456789ABCDEF";
-
-static const MetricomAddress zero_address;
-static const MetricomAddress broadcast_address =
- { {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF} };
-
-static const MetricomKey SIP0Key = { "SIP0" };
-static const MetricomKey ARP0Key = { "ARP0" };
-static const MetricomKey ATR_Key = { "ATR " };
-static const MetricomKey ACK_Key = { "ACK_" };
-static const MetricomKey INF_Key = { "INF_" };
-static const MetricomKey ERR_Key = { "ERR_" };
-
-static const long MaxARPInterval = 60 * HZ; /* One minute */
-
-/*
- * Maximum Starmode packet length is 1183 bytes. Allowing 4 bytes for
- * protocol key, 4 bytes for checksum, one byte for CR, and 65/64 expansion
- * for STRIP encoding, that translates to a maximum payload MTU of 1155.
- * Note: A standard NFS 1K data packet is a total of 0x480 (1152) bytes
- * long, including IP header, UDP header, and NFS header. Setting the STRIP
- * MTU to 1152 allows us to send default sized NFS packets without fragmentation.
- */
-static const unsigned short MAX_SEND_MTU = 1152;
-static const unsigned short MAX_RECV_MTU = 1500; /* Hoping for Ethernet sized packets in the future! */
-static const unsigned short DEFAULT_STRIP_MTU = 1152;
-static const int STRIP_MAGIC = 0x5303;
-static const long LongTime = 0x7FFFFFFF;
-
-/************************************************************************/
-/* Global variables */
-
-static LIST_HEAD(strip_list);
-static DEFINE_SPINLOCK(strip_lock);
-
-/************************************************************************/
-/* Macros */
-
-/* Returns TRUE if text T begins with prefix P */
-#define has_prefix(T,L,P) (((L) >= sizeof(P)-1) && !strncmp((T), (P), sizeof(P)-1))
-
-/* Returns TRUE if text T of length L is equal to string S */
-#define text_equal(T,L,S) (((L) == sizeof(S)-1) && !strncmp((T), (S), sizeof(S)-1))
-
-#define READHEX(X) ((X)>='0' && (X)<='9' ? (X)-'0' : \
- (X)>='a' && (X)<='f' ? (X)-'a'+10 : \
- (X)>='A' && (X)<='F' ? (X)-'A'+10 : 0 )
-
-#define READHEX16(X) ((__u16)(READHEX(X)))
-
-#define READDEC(X) ((X)>='0' && (X)<='9' ? (X)-'0' : 0)
-
-#define ARRAY_END(X) (&((X)[ARRAY_SIZE(X)]))
-
-#define JIFFIE_TO_SEC(X) ((X) / HZ)
-
-
-/************************************************************************/
-/* Utility routines */
-
-static int arp_query(unsigned char *haddr, u32 paddr,
- struct net_device *dev)
-{
- struct neighbour *neighbor_entry;
- int ret = 0;
-
- neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev);
-
- if (neighbor_entry != NULL) {
- neighbor_entry->used = jiffies;
- if (neighbor_entry->nud_state & NUD_VALID) {
- memcpy(haddr, neighbor_entry->ha, dev->addr_len);
- ret = 1;
- }
- neigh_release(neighbor_entry);
- }
- return ret;
-}
-
-static void DumpData(char *msg, struct strip *strip_info, __u8 * ptr,
- __u8 * end)
-{
- static const int MAX_DumpData = 80;
- __u8 pkt_text[MAX_DumpData], *p = pkt_text;
-
- *p++ = '\"';
-
- while (ptr < end && p < &pkt_text[MAX_DumpData - 4]) {
- if (*ptr == '\\') {
- *p++ = '\\';
- *p++ = '\\';
- } else {
- if (*ptr >= 32 && *ptr <= 126) {
- *p++ = *ptr;
- } else {
- sprintf(p, "\\%02X", *ptr);
- p += 3;
- }
- }
- ptr++;
- }
-
- if (ptr == end)
- *p++ = '\"';
- *p++ = 0;
-
- printk(KERN_INFO "%s: %-13s%s\n", strip_info->dev->name, msg, pkt_text);
-}
-
-
-/************************************************************************/
-/* Byte stuffing/unstuffing routines */
-
-/* Stuffing scheme:
- * 00 Unused (reserved character)
- * 01-3F Run of 2-64 different characters
- * 40-7F Run of 1-64 different characters plus a single zero at the end
- * 80-BF Run of 1-64 of the same character
- * C0-FF Run of 1-64 zeroes (ASCII 0)
- */
-
-typedef enum {
- Stuff_Diff = 0x00,
- Stuff_DiffZero = 0x40,
- Stuff_Same = 0x80,
- Stuff_Zero = 0xC0,
- Stuff_NoCode = 0xFF, /* Special code, meaning no code selected */
-
- Stuff_CodeMask = 0xC0,
- Stuff_CountMask = 0x3F,
- Stuff_MaxCount = 0x3F,
- Stuff_Magic = 0x0D /* The value we are eliminating */
-} StuffingCode;
-
-/* StuffData encodes the data starting at "src" for "length" bytes.
- * It writes it to the buffer pointed to by "dst" (which must be at least
- * as long as 1 + 65/64 of the input length). The output may be up to 1.6%
- * larger than the input for pathological input, but will usually be smaller.
- * StuffData returns the new value of the dst pointer as its result.
- * "code_ptr_ptr" points to a "__u8 *" which is used to hold encoding state
- * between calls, allowing an encoded packet to be incrementally built up
- * from small parts. On the first call, the "__u8 *" pointed to should be
- * initialized to NULL; between subsequent calls the calling routine should
- * leave the value alone and simply pass it back unchanged so that the
- * encoder can recover its current state.
- */
-
-#define StuffData_FinishBlock(X) \
-(*code_ptr = (X) ^ Stuff_Magic, code = Stuff_NoCode)
-
-static __u8 *StuffData(__u8 * src, __u32 length, __u8 * dst,
- __u8 ** code_ptr_ptr)
-{
- __u8 *end = src + length;
- __u8 *code_ptr = *code_ptr_ptr;
- __u8 code = Stuff_NoCode, count = 0;
-
- if (!length)
- return (dst);
-
- if (code_ptr) {
- /*
- * Recover state from last call, if applicable
- */
- code = (*code_ptr ^ Stuff_Magic) & Stuff_CodeMask;
- count = (*code_ptr ^ Stuff_Magic) & Stuff_CountMask;
- }
-
- while (src < end) {
- switch (code) {
- /* Stuff_NoCode: If no current code, select one */
- case Stuff_NoCode:
- /* Record where we're going to put this code */
- code_ptr = dst++;
- count = 0; /* Reset the count (zero means one instance) */
- /* Tentatively start a new block */
- if (*src == 0) {
- code = Stuff_Zero;
- src++;
- } else {
- code = Stuff_Same;
- *dst++ = *src++ ^ Stuff_Magic;
- }
- /* Note: We optimistically assume run of same -- */
- /* which will be fixed later in Stuff_Same */
- /* if it turns out not to be true. */
- break;
-
- /* Stuff_Zero: We already have at least one zero encoded */
- case Stuff_Zero:
- /* If another zero, count it, else finish this code block */
- if (*src == 0) {
- count++;
- src++;
- } else {
- StuffData_FinishBlock(Stuff_Zero + count);
- }
- break;
-
- /* Stuff_Same: We already have at least one byte encoded */
- case Stuff_Same:
- /* If another one the same, count it */
- if ((*src ^ Stuff_Magic) == code_ptr[1]) {
- count++;
- src++;
- break;
- }
- /* else, this byte does not match this block. */
- /* If we already have two or more bytes encoded, finish this code block */
- if (count) {
- StuffData_FinishBlock(Stuff_Same + count);
- break;
- }
- /* else, we only have one so far, so switch to Stuff_Diff code */
- code = Stuff_Diff;
- /* and fall through to Stuff_Diff case below
- * Note cunning cleverness here: case Stuff_Diff compares
- * the current character with the previous two to see if it
- * has a run of three the same. Won't this be an error if
- * there aren't two previous characters stored to compare with?
- * No. Because we know the current character is *not* the same
- * as the previous one, the first test below will necessarily
- * fail and the send half of the "if" won't be executed.
- */
-
- /* Stuff_Diff: We have at least two *different* bytes encoded */
- case Stuff_Diff:
- /* If this is a zero, must encode a Stuff_DiffZero, and begin a new block */
- if (*src == 0) {
- StuffData_FinishBlock(Stuff_DiffZero +
- count);
- }
- /* else, if we have three in a row, it is worth starting a Stuff_Same block */
- else if ((*src ^ Stuff_Magic) == dst[-1]
- && dst[-1] == dst[-2]) {
- /* Back off the last two characters we encoded */
- code += count - 2;
- /* Note: "Stuff_Diff + 0" is an illegal code */
- if (code == Stuff_Diff + 0) {
- code = Stuff_Same + 0;
- }
- StuffData_FinishBlock(code);
- code_ptr = dst - 2;
- /* dst[-1] already holds the correct value */
- count = 2; /* 2 means three bytes encoded */
- code = Stuff_Same;
- }
- /* else, another different byte, so add it to the block */
- else {
- *dst++ = *src ^ Stuff_Magic;
- count++;
- }
- src++; /* Consume the byte */
- break;
- }
- if (count == Stuff_MaxCount) {
- StuffData_FinishBlock(code + count);
- }
- }
- if (code == Stuff_NoCode) {
- *code_ptr_ptr = NULL;
- } else {
- *code_ptr_ptr = code_ptr;
- StuffData_FinishBlock(code + count);
- }
- return (dst);
-}
-
-/*
- * UnStuffData decodes the data at "src", up to (but not including) "end".
- * It writes the decoded data into the buffer pointed to by "dst", up to a
- * maximum of "dst_length", and returns the new value of "src" so that a
- * follow-on call can read more data, continuing from where the first left off.
- *
- * There are three types of results:
- * 1. The source data runs out before extracting "dst_length" bytes:
- * UnStuffData returns NULL to indicate failure.
- * 2. The source data produces exactly "dst_length" bytes:
- * UnStuffData returns new_src = end to indicate that all bytes were consumed.
- * 3. "dst_length" bytes are extracted, with more remaining.
- * UnStuffData returns new_src < end to indicate that there are more bytes
- * to be read.
- *
- * Note: The decoding may be destructive, in that it may alter the source
- * data in the process of decoding it (this is necessary to allow a follow-on
- * call to resume correctly).
- */
-
-static __u8 *UnStuffData(__u8 * src, __u8 * end, __u8 * dst,
- __u32 dst_length)
-{
- __u8 *dst_end = dst + dst_length;
- /* Sanity check */
- if (!src || !end || !dst || !dst_length)
- return (NULL);
- while (src < end && dst < dst_end) {
- int count = (*src ^ Stuff_Magic) & Stuff_CountMask;
- switch ((*src ^ Stuff_Magic) & Stuff_CodeMask) {
- case Stuff_Diff:
- if (src + 1 + count >= end)
- return (NULL);
- do {
- *dst++ = *++src ^ Stuff_Magic;
- }
- while (--count >= 0 && dst < dst_end);
- if (count < 0)
- src += 1;
- else {
- if (count == 0)
- *src = Stuff_Same ^ Stuff_Magic;
- else
- *src =
- (Stuff_Diff +
- count) ^ Stuff_Magic;
- }
- break;
- case Stuff_DiffZero:
- if (src + 1 + count >= end)
- return (NULL);
- do {
- *dst++ = *++src ^ Stuff_Magic;
- }
- while (--count >= 0 && dst < dst_end);
- if (count < 0)
- *src = Stuff_Zero ^ Stuff_Magic;
- else
- *src =
- (Stuff_DiffZero + count) ^ Stuff_Magic;
- break;
- case Stuff_Same:
- if (src + 1 >= end)
- return (NULL);
- do {
- *dst++ = src[1] ^ Stuff_Magic;
- }
- while (--count >= 0 && dst < dst_end);
- if (count < 0)
- src += 2;
- else
- *src = (Stuff_Same + count) ^ Stuff_Magic;
- break;
- case Stuff_Zero:
- do {
- *dst++ = 0;
- }
- while (--count >= 0 && dst < dst_end);
- if (count < 0)
- src += 1;
- else
- *src = (Stuff_Zero + count) ^ Stuff_Magic;
- break;
- }
- }
- if (dst < dst_end)
- return (NULL);
- else
- return (src);
-}
-
-
-/************************************************************************/
-/* General routines for STRIP */
-
-/*
- * set_baud sets the baud rate to the rate defined by baudcode
- */
-static void set_baud(struct tty_struct *tty, speed_t baudrate)
-{
- struct ktermios old_termios;
-
- mutex_lock(&tty->termios_mutex);
- old_termios =*(tty->termios);
- tty_encode_baud_rate(tty, baudrate, baudrate);
- tty->ops->set_termios(tty, &old_termios);
- mutex_unlock(&tty->termios_mutex);
-}
-
-/*
- * Convert a string to a Metricom Address.
- */
-
-#define IS_RADIO_ADDRESS(p) ( \
- isdigit((p)[0]) && isdigit((p)[1]) && isdigit((p)[2]) && isdigit((p)[3]) && \
- (p)[4] == '-' && \
- isdigit((p)[5]) && isdigit((p)[6]) && isdigit((p)[7]) && isdigit((p)[8]) )
-
-static int string_to_radio_address(MetricomAddress * addr, __u8 * p)
-{
- if (!IS_RADIO_ADDRESS(p))
- return (1);
- addr->c[0] = 0;
- addr->c[1] = 0;
- addr->c[2] = READHEX(p[0]) << 4 | READHEX(p[1]);
- addr->c[3] = READHEX(p[2]) << 4 | READHEX(p[3]);
- addr->c[4] = READHEX(p[5]) << 4 | READHEX(p[6]);
- addr->c[5] = READHEX(p[7]) << 4 | READHEX(p[8]);
- return (0);
-}
-
-/*
- * Convert a Metricom Address to a string.
- */
-
-static __u8 *radio_address_to_string(const MetricomAddress * addr,
- MetricomAddressString * p)
-{
- sprintf(p->c, "%02X%02X-%02X%02X", addr->c[2], addr->c[3],
- addr->c[4], addr->c[5]);
- return (p->c);
-}
-
-/*
- * Note: Must make sure sx_size is big enough to receive a stuffed
- * MAX_RECV_MTU packet. Additionally, we also want to ensure that it's
- * big enough to receive a large radio neighbour list (currently 4K).
- */
-
-static int allocate_buffers(struct strip *strip_info, int mtu)
-{
- struct net_device *dev = strip_info->dev;
- int sx_size = max_t(int, STRIP_ENCAP_SIZE(MAX_RECV_MTU), 4096);
- int tx_size = STRIP_ENCAP_SIZE(mtu) + MaxCommandStringLength;
- __u8 *r = kmalloc(MAX_RECV_MTU, GFP_ATOMIC);
- __u8 *s = kmalloc(sx_size, GFP_ATOMIC);
- __u8 *t = kmalloc(tx_size, GFP_ATOMIC);
- if (r && s && t) {
- strip_info->rx_buff = r;
- strip_info->sx_buff = s;
- strip_info->tx_buff = t;
- strip_info->sx_size = sx_size;
- strip_info->tx_size = tx_size;
- strip_info->mtu = dev->mtu = mtu;
- return (1);
- }
- kfree(r);
- kfree(s);
- kfree(t);
- return (0);
-}
-
-/*
- * MTU has been changed by the IP layer.
- * We could be in
- * an upcall from the tty driver, or in an ip packet queue.
- */
-static int strip_change_mtu(struct net_device *dev, int new_mtu)
-{
- struct strip *strip_info = netdev_priv(dev);
- int old_mtu = strip_info->mtu;
- unsigned char *orbuff = strip_info->rx_buff;
- unsigned char *osbuff = strip_info->sx_buff;
- unsigned char *otbuff = strip_info->tx_buff;
-
- if (new_mtu > MAX_SEND_MTU) {
- printk(KERN_ERR
- "%s: MTU exceeds maximum allowable (%d), MTU change cancelled.\n",
- strip_info->dev->name, MAX_SEND_MTU);
- return -EINVAL;
- }
-
- spin_lock_bh(&strip_lock);
- if (!allocate_buffers(strip_info, new_mtu)) {
- printk(KERN_ERR "%s: unable to grow strip buffers, MTU change cancelled.\n",
- strip_info->dev->name);
- spin_unlock_bh(&strip_lock);
- return -ENOMEM;
- }
-
- if (strip_info->sx_count) {
- if (strip_info->sx_count <= strip_info->sx_size)
- memcpy(strip_info->sx_buff, osbuff,
- strip_info->sx_count);
- else {
- strip_info->discard = strip_info->sx_count;
- strip_info->rx_over_errors++;
- }
- }
-
- if (strip_info->tx_left) {
- if (strip_info->tx_left <= strip_info->tx_size)
- memcpy(strip_info->tx_buff, strip_info->tx_head,
- strip_info->tx_left);
- else {
- strip_info->tx_left = 0;
- strip_info->tx_dropped++;
- }
- }
- strip_info->tx_head = strip_info->tx_buff;
- spin_unlock_bh(&strip_lock);
-
- printk(KERN_NOTICE "%s: strip MTU changed fom %d to %d.\n",
- strip_info->dev->name, old_mtu, strip_info->mtu);
-
- kfree(orbuff);
- kfree(osbuff);
- kfree(otbuff);
- return 0;
-}
-
-static void strip_unlock(struct strip *strip_info)
-{
- /*
- * Set the timer to go off in one second.
- */
- strip_info->idle_timer.expires = jiffies + 1 * HZ;
- add_timer(&strip_info->idle_timer);
- netif_wake_queue(strip_info->dev);
-}
-
-
-
-/*
- * If the time is in the near future, time_delta prints the number of
- * seconds to go into the buffer and returns the address of the buffer.
- * If the time is not in the near future, it returns the address of the
- * string "Not scheduled" The buffer must be long enough to contain the
- * ascii representation of the number plus 9 charactes for the " seconds"
- * and the null character.
- */
-#ifdef CONFIG_PROC_FS
-static char *time_delta(char buffer[], long time)
-{
- time -= jiffies;
- if (time > LongTime / 2)
- return ("Not scheduled");
- if (time < 0)
- time = 0; /* Don't print negative times */
- sprintf(buffer, "%ld seconds", time / HZ);
- return (buffer);
-}
-
-/* get Nth element of the linked list */
-static struct strip *strip_get_idx(loff_t pos)
-{
- struct strip *str;
- int i = 0;
-
- list_for_each_entry_rcu(str, &strip_list, list) {
- if (pos == i)
- return str;
- ++i;
- }
- return NULL;
-}
-
-static void *strip_seq_start(struct seq_file *seq, loff_t *pos)
- __acquires(RCU)
-{
- rcu_read_lock();
- return *pos ? strip_get_idx(*pos - 1) : SEQ_START_TOKEN;
-}
-
-static void *strip_seq_next(struct seq_file *seq, void *v, loff_t *pos)
-{
- struct list_head *l;
- struct strip *s;
-
- ++*pos;
- if (v == SEQ_START_TOKEN)
- return strip_get_idx(1);
-
- s = v;
- l = &s->list;
- list_for_each_continue_rcu(l, &strip_list) {
- return list_entry(l, struct strip, list);
- }
- return NULL;
-}
-
-static void strip_seq_stop(struct seq_file *seq, void *v)
- __releases(RCU)
-{
- rcu_read_unlock();
-}
-
-static void strip_seq_neighbours(struct seq_file *seq,
- const MetricomNodeTable * table,
- const char *title)
-{
- /* We wrap this in a do/while loop, so if the table changes */
- /* while we're reading it, we just go around and try again. */
- struct timeval t;
-
- do {
- int i;
- t = table->timestamp;
- if (table->num_nodes)
- seq_printf(seq, "\n %s\n", title);
- for (i = 0; i < table->num_nodes; i++) {
- MetricomNode node;
-
- spin_lock_bh(&strip_lock);
- node = table->node[i];
- spin_unlock_bh(&strip_lock);
- seq_printf(seq, " %s\n", node.c);
- }
- } while (table->timestamp.tv_sec != t.tv_sec
- || table->timestamp.tv_usec != t.tv_usec);
-}
-
-/*
- * This function prints radio status information via the seq_file
- * interface. The interface takes care of buffer size and over
- * run issues.
- *
- * The buffer in seq_file is PAGESIZE (4K)
- * so this routine should never print more or it will get truncated.
- * With the maximum of 32 portables and 32 poletops
- * reported, the routine outputs 3107 bytes into the buffer.
- */
-static void strip_seq_status_info(struct seq_file *seq,
- const struct strip *strip_info)
-{
- char temp[32];
- MetricomAddressString addr_string;
-
- /* First, we must copy all of our data to a safe place, */
- /* in case a serial interrupt comes in and changes it. */
- int tx_left = strip_info->tx_left;
- unsigned long rx_average_pps = strip_info->rx_average_pps;
- unsigned long tx_average_pps = strip_info->tx_average_pps;
- unsigned long sx_average_pps = strip_info->sx_average_pps;
- int working = strip_info->working;
- int firmware_level = strip_info->firmware_level;
- long watchdog_doprobe = strip_info->watchdog_doprobe;
- long watchdog_doreset = strip_info->watchdog_doreset;
- long gratuitous_arp = strip_info->gratuitous_arp;
- long arp_interval = strip_info->arp_interval;
- FirmwareVersion firmware_version = strip_info->firmware_version;
- SerialNumber serial_number = strip_info->serial_number;
- BatteryVoltage battery_voltage = strip_info->battery_voltage;
- char *if_name = strip_info->dev->name;
- MetricomAddress true_dev_addr = strip_info->true_dev_addr;
- MetricomAddress dev_dev_addr =
- *(MetricomAddress *) strip_info->dev->dev_addr;
- int manual_dev_addr = strip_info->manual_dev_addr;
-#ifdef EXT_COUNTERS
- unsigned long rx_bytes = strip_info->rx_bytes;
- unsigned long tx_bytes = strip_info->tx_bytes;
- unsigned long rx_rbytes = strip_info->rx_rbytes;
- unsigned long tx_rbytes = strip_info->tx_rbytes;
- unsigned long rx_sbytes = strip_info->rx_sbytes;
- unsigned long tx_sbytes = strip_info->tx_sbytes;
- unsigned long rx_ebytes = strip_info->rx_ebytes;
- unsigned long tx_ebytes = strip_info->tx_ebytes;
-#endif
-
- seq_printf(seq, "\nInterface name\t\t%s\n", if_name);
- seq_printf(seq, " Radio working:\t\t%s\n", working ? "Yes" : "No");
- radio_address_to_string(&true_dev_addr, &addr_string);
- seq_printf(seq, " Radio address:\t\t%s\n", addr_string.c);
- if (manual_dev_addr) {
- radio_address_to_string(&dev_dev_addr, &addr_string);
- seq_printf(seq, " Device address:\t%s\n", addr_string.c);
- }
- seq_printf(seq, " Firmware version:\t%s", !working ? "Unknown" :
- !firmware_level ? "Should be upgraded" :
- firmware_version.c);
- if (firmware_level >= ChecksummedMessages)
- seq_printf(seq, " (Checksums Enabled)");
- seq_printf(seq, "\n");
- seq_printf(seq, " Serial number:\t\t%s\n", serial_number.c);
- seq_printf(seq, " Battery voltage:\t%s\n", battery_voltage.c);
- seq_printf(seq, " Transmit queue (bytes):%d\n", tx_left);
- seq_printf(seq, " Receive packet rate: %ld packets per second\n",
- rx_average_pps / 8);
- seq_printf(seq, " Transmit packet rate: %ld packets per second\n",
- tx_average_pps / 8);
- seq_printf(seq, " Sent packet rate: %ld packets per second\n",
- sx_average_pps / 8);
- seq_printf(seq, " Next watchdog probe:\t%s\n",
- time_delta(temp, watchdog_doprobe));
- seq_printf(seq, " Next watchdog reset:\t%s\n",
- time_delta(temp, watchdog_doreset));
- seq_printf(seq, " Next gratuitous ARP:\t");
-
- if (!memcmp
- (strip_info->dev->dev_addr, zero_address.c,
- sizeof(zero_address)))
- seq_printf(seq, "Disabled\n");
- else {
- seq_printf(seq, "%s\n", time_delta(temp, gratuitous_arp));
- seq_printf(seq, " Next ARP interval:\t%ld seconds\n",
- JIFFIE_TO_SEC(arp_interval));
- }
-
- if (working) {
-#ifdef EXT_COUNTERS
- seq_printf(seq, "\n");
- seq_printf(seq,
- " Total bytes: \trx:\t%lu\ttx:\t%lu\n",
- rx_bytes, tx_bytes);
- seq_printf(seq,
- " thru radio: \trx:\t%lu\ttx:\t%lu\n",
- rx_rbytes, tx_rbytes);
- seq_printf(seq,
- " thru serial port: \trx:\t%lu\ttx:\t%lu\n",
- rx_sbytes, tx_sbytes);
- seq_printf(seq,
- " Total stat/err bytes:\trx:\t%lu\ttx:\t%lu\n",
- rx_ebytes, tx_ebytes);
-#endif
- strip_seq_neighbours(seq, &strip_info->poletops,
- "Poletops:");
- strip_seq_neighbours(seq, &strip_info->portables,
- "Portables:");
- }
-}
-
-/*
- * This function is exports status information from the STRIP driver through
- * the /proc file system.
- */
-static int strip_seq_show(struct seq_file *seq, void *v)
-{
- if (v == SEQ_START_TOKEN)
- seq_printf(seq, "strip_version: %s\n", StripVersion);
- else
- strip_seq_status_info(seq, (const struct strip *)v);
- return 0;
-}
-
-
-static const struct seq_operations strip_seq_ops = {
- .start = strip_seq_start,
- .next = strip_seq_next,
- .stop = strip_seq_stop,
- .show = strip_seq_show,
-};
-
-static int strip_seq_open(struct inode *inode, struct file *file)
-{
- return seq_open(file, &strip_seq_ops);
-}
-
-static const struct file_operations strip_seq_fops = {
- .owner = THIS_MODULE,
- .open = strip_seq_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = seq_release,
-};
-#endif
-
-
-
-/************************************************************************/
-/* Sending routines */
-
-static void ResetRadio(struct strip *strip_info)
-{
- struct tty_struct *tty = strip_info->tty;
- static const char init[] = "ate0q1dt**starmode\r**";
- StringDescriptor s = { init, sizeof(init) - 1 };
-
- /*
- * If the radio isn't working anymore,
- * we should clear the old status information.
- */
- if (strip_info->working) {
- printk(KERN_INFO "%s: No response: Resetting radio.\n",
- strip_info->dev->name);
- strip_info->firmware_version.c[0] = '\0';
- strip_info->serial_number.c[0] = '\0';
- strip_info->battery_voltage.c[0] = '\0';
- strip_info->portables.num_nodes = 0;
- do_gettimeofday(&strip_info->portables.timestamp);
- strip_info->poletops.num_nodes = 0;
- do_gettimeofday(&strip_info->poletops.timestamp);
- }
-
- strip_info->pps_timer = jiffies;
- strip_info->rx_pps_count = 0;
- strip_info->tx_pps_count = 0;
- strip_info->sx_pps_count = 0;
- strip_info->rx_average_pps = 0;
- strip_info->tx_average_pps = 0;
- strip_info->sx_average_pps = 0;
-
- /* Mark radio address as unknown */
- *(MetricomAddress *) & strip_info->true_dev_addr = zero_address;
- if (!strip_info->manual_dev_addr)
- *(MetricomAddress *) strip_info->dev->dev_addr =
- zero_address;
- strip_info->working = FALSE;
- strip_info->firmware_level = NoStructure;
- strip_info->next_command = CompatibilityCommand;
- strip_info->watchdog_doprobe = jiffies + 10 * HZ;
- strip_info->watchdog_doreset = jiffies + 1 * HZ;
-
- /* If the user has selected a baud rate above 38.4 see what magic we have to do */
- if (strip_info->user_baud > 38400) {
- /*
- * Subtle stuff: Pay attention :-)
- * If the serial port is currently at the user's selected (>38.4) rate,
- * then we temporarily switch to 19.2 and issue the ATS304 command
- * to tell the radio to switch to the user's selected rate.
- * If the serial port is not currently at that rate, that means we just
- * issued the ATS304 command last time through, so this time we restore
- * the user's selected rate and issue the normal starmode reset string.
- */
- if (strip_info->user_baud == tty_get_baud_rate(tty)) {
- static const char b0[] = "ate0q1s304=57600\r";
- static const char b1[] = "ate0q1s304=115200\r";
- static const StringDescriptor baudstring[2] =
- { {b0, sizeof(b0) - 1}
- , {b1, sizeof(b1) - 1}
- };
- set_baud(tty, 19200);
- if (strip_info->user_baud == 57600)
- s = baudstring[0];
- else if (strip_info->user_baud == 115200)
- s = baudstring[1];
- else
- s = baudstring[1]; /* For now */
- } else
- set_baud(tty, strip_info->user_baud);
- }
-
- tty->ops->write(tty, s.string, s.length);
-#ifdef EXT_COUNTERS
- strip_info->tx_ebytes += s.length;
-#endif
-}
-
-/*
- * Called by the driver when there's room for more data. If we have
- * more packets to send, we send them here.
- */
-
-static void strip_write_some_more(struct tty_struct *tty)
-{
- struct strip *strip_info = tty->disc_data;
-
- /* First make sure we're connected. */
- if (!strip_info || strip_info->magic != STRIP_MAGIC ||
- !netif_running(strip_info->dev))
- return;
-
- if (strip_info->tx_left > 0) {
- int num_written =
- tty->ops->write(tty, strip_info->tx_head,
- strip_info->tx_left);
- strip_info->tx_left -= num_written;
- strip_info->tx_head += num_written;
-#ifdef EXT_COUNTERS
- strip_info->tx_sbytes += num_written;
-#endif
- } else { /* Else start transmission of another packet */
-
- clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
- strip_unlock(strip_info);
- }
-}
-
-static __u8 *add_checksum(__u8 * buffer, __u8 * end)
-{
- __u16 sum = 0;
- __u8 *p = buffer;
- while (p < end)
- sum += *p++;
- end[3] = hextable[sum & 0xF];
- sum >>= 4;
- end[2] = hextable[sum & 0xF];
- sum >>= 4;
- end[1] = hextable[sum & 0xF];
- sum >>= 4;
- end[0] = hextable[sum & 0xF];
- return (end + 4);
-}
-
-static unsigned char *strip_make_packet(unsigned char *buffer,
- struct strip *strip_info,
- struct sk_buff *skb)
-{
- __u8 *ptr = buffer;
- __u8 *stuffstate = NULL;
- STRIP_Header *header = (STRIP_Header *) skb->data;
- MetricomAddress haddr = header->dst_addr;
- int len = skb->len - sizeof(STRIP_Header);
- MetricomKey key;
-
- /*HexDump("strip_make_packet", strip_info, skb->data, skb->data + skb->len); */
-
- if (header->protocol == htons(ETH_P_IP))
- key = SIP0Key;
- else if (header->protocol == htons(ETH_P_ARP))
- key = ARP0Key;
- else {
- printk(KERN_ERR
- "%s: strip_make_packet: Unknown packet type 0x%04X\n",
- strip_info->dev->name, ntohs(header->protocol));
- return (NULL);
- }
-
- if (len > strip_info->mtu) {
- printk(KERN_ERR
- "%s: Dropping oversized transmit packet: %d bytes\n",
- strip_info->dev->name, len);
- return (NULL);
- }
-
- /*
- * If we're sending to ourselves, discard the packet.
- * (Metricom radios choke if they try to send a packet to their own address.)
- */
- if (!memcmp(haddr.c, strip_info->true_dev_addr.c, sizeof(haddr))) {
- printk(KERN_ERR "%s: Dropping packet addressed to self\n",
- strip_info->dev->name);
- return (NULL);
- }
-
- /*
- * If this is a broadcast packet, send it to our designated Metricom
- * 'broadcast hub' radio (First byte of address being 0xFF means broadcast)
- */
- if (haddr.c[0] == 0xFF) {
- __be32 brd = 0;
- struct in_device *in_dev;
-
- rcu_read_lock();
- in_dev = __in_dev_get_rcu(strip_info->dev);
- if (in_dev == NULL) {
- rcu_read_unlock();
- return NULL;
- }
- if (in_dev->ifa_list)
- brd = in_dev->ifa_list->ifa_broadcast;
- rcu_read_unlock();
-
- /* arp_query returns 1 if it succeeds in looking up the address, 0 if it fails */
- if (!arp_query(haddr.c, brd, strip_info->dev)) {
- printk(KERN_ERR
- "%s: Unable to send packet (no broadcast hub configured)\n",
- strip_info->dev->name);
- return (NULL);
- }
- /*
- * If we are the broadcast hub, don't bother sending to ourselves.
- * (Metricom radios choke if they try to send a packet to their own address.)
- */
- if (!memcmp
- (haddr.c, strip_info->true_dev_addr.c, sizeof(haddr)))
- return (NULL);
- }
-
- *ptr++ = 0x0D;
- *ptr++ = '*';
- *ptr++ = hextable[haddr.c[2] >> 4];
- *ptr++ = hextable[haddr.c[2] & 0xF];
- *ptr++ = hextable[haddr.c[3] >> 4];
- *ptr++ = hextable[haddr.c[3] & 0xF];
- *ptr++ = '-';
- *ptr++ = hextable[haddr.c[4] >> 4];
- *ptr++ = hextable[haddr.c[4] & 0xF];
- *ptr++ = hextable[haddr.c[5] >> 4];
- *ptr++ = hextable[haddr.c[5] & 0xF];
- *ptr++ = '*';
- *ptr++ = key.c[0];
- *ptr++ = key.c[1];
- *ptr++ = key.c[2];
- *ptr++ = key.c[3];
-
- ptr =
- StuffData(skb->data + sizeof(STRIP_Header), len, ptr,
- &stuffstate);
-
- if (strip_info->firmware_level >= ChecksummedMessages)
- ptr = add_checksum(buffer + 1, ptr);
-
- *ptr++ = 0x0D;
- return (ptr);
-}
-
-static void strip_send(struct strip *strip_info, struct sk_buff *skb)
-{
- MetricomAddress haddr;
- unsigned char *ptr = strip_info->tx_buff;
- int doreset = (long) jiffies - strip_info->watchdog_doreset >= 0;
- int doprobe = (long) jiffies - strip_info->watchdog_doprobe >= 0
- && !doreset;
- __be32 addr, brd;
-
- /*
- * 1. If we have a packet, encapsulate it and put it in the buffer
- */
- if (skb) {
- char *newptr = strip_make_packet(ptr, strip_info, skb);
- strip_info->tx_pps_count++;
- if (!newptr)
- strip_info->tx_dropped++;
- else {
- ptr = newptr;
- strip_info->sx_pps_count++;
- strip_info->tx_packets++; /* Count another successful packet */
-#ifdef EXT_COUNTERS
- strip_info->tx_bytes += skb->len;
- strip_info->tx_rbytes += ptr - strip_info->tx_buff;
-#endif
- /*DumpData("Sending:", strip_info, strip_info->tx_buff, ptr); */
- /*HexDump("Sending", strip_info, strip_info->tx_buff, ptr); */
- }
- }
-
- /*
- * 2. If it is time for another tickle, tack it on, after the packet
- */
- if (doprobe) {
- StringDescriptor ts = CommandString[strip_info->next_command];
-#if TICKLE_TIMERS
- {
- struct timeval tv;
- do_gettimeofday(&tv);
- printk(KERN_INFO "**** Sending tickle string %d at %02d.%06d\n",
- strip_info->next_command, tv.tv_sec % 100,
- tv.tv_usec);
- }
-#endif
- if (ptr == strip_info->tx_buff)
- *ptr++ = 0x0D;
-
- *ptr++ = '*'; /* First send "**" to provoke an error message */
- *ptr++ = '*';
-
- /* Then add the command */
- memcpy(ptr, ts.string, ts.length);
-
- /* Add a checksum ? */
- if (strip_info->firmware_level < ChecksummedMessages)
- ptr += ts.length;
- else
- ptr = add_checksum(ptr, ptr + ts.length);
-
- *ptr++ = 0x0D; /* Terminate the command with a <CR> */
-
- /* Cycle to next periodic command? */
- if (strip_info->firmware_level >= StructuredMessages)
- if (++strip_info->next_command >=
- ARRAY_SIZE(CommandString))
- strip_info->next_command = 0;
-#ifdef EXT_COUNTERS
- strip_info->tx_ebytes += ts.length;
-#endif
- strip_info->watchdog_doprobe = jiffies + 10 * HZ;
- strip_info->watchdog_doreset = jiffies + 1 * HZ;
- /*printk(KERN_INFO "%s: Routine radio test.\n", strip_info->dev->name); */
- }
-
- /*
- * 3. Set up the strip_info ready to send the data (if any).
- */
- strip_info->tx_head = strip_info->tx_buff;
- strip_info->tx_left = ptr - strip_info->tx_buff;
- set_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
- /*
- * 4. Debugging check to make sure we're not overflowing the buffer.
- */
- if (strip_info->tx_size - strip_info->tx_left < 20)
- printk(KERN_ERR "%s: Sending%5d bytes;%5d bytes free.\n",
- strip_info->dev->name, strip_info->tx_left,
- strip_info->tx_size - strip_info->tx_left);
-
- /*
- * 5. If watchdog has expired, reset the radio. Note: if there's data waiting in
- * the buffer, strip_write_some_more will send it after the reset has finished
- */
- if (doreset) {
- ResetRadio(strip_info);
- return;
- }
-
- if (1) {
- struct in_device *in_dev;
-
- brd = addr = 0;
- rcu_read_lock();
- in_dev = __in_dev_get_rcu(strip_info->dev);
- if (in_dev) {
- if (in_dev->ifa_list) {
- brd = in_dev->ifa_list->ifa_broadcast;
- addr = in_dev->ifa_list->ifa_local;
- }
- }
- rcu_read_unlock();
- }
-
-
- /*
- * 6. If it is time for a periodic ARP, queue one up to be sent.
- * We only do this if:
- * 1. The radio is working
- * 2. It's time to send another periodic ARP
- * 3. We really know what our address is (and it is not manually set to zero)
- * 4. We have a designated broadcast address configured
- * If we queue up an ARP packet when we don't have a designated broadcast
- * address configured, then the packet will just have to be discarded in
- * strip_make_packet. This is not fatal, but it causes misleading information
- * to be displayed in tcpdump. tcpdump will report that periodic APRs are
- * being sent, when in fact they are not, because they are all being dropped
- * in the strip_make_packet routine.
- */
- if (strip_info->working
- && (long) jiffies - strip_info->gratuitous_arp >= 0
- && memcmp(strip_info->dev->dev_addr, zero_address.c,
- sizeof(zero_address))
- && arp_query(haddr.c, brd, strip_info->dev)) {
- /*printk(KERN_INFO "%s: Sending gratuitous ARP with interval %ld\n",
- strip_info->dev->name, strip_info->arp_interval / HZ); */
- strip_info->gratuitous_arp =
- jiffies + strip_info->arp_interval;
- strip_info->arp_interval *= 2;
- if (strip_info->arp_interval > MaxARPInterval)
- strip_info->arp_interval = MaxARPInterval;
- if (addr)
- arp_send(ARPOP_REPLY, ETH_P_ARP, addr, /* Target address of ARP packet is our address */
- strip_info->dev, /* Device to send packet on */
- addr, /* Source IP address this ARP packet comes from */
- NULL, /* Destination HW address is NULL (broadcast it) */
- strip_info->dev->dev_addr, /* Source HW address is our HW address */
- strip_info->dev->dev_addr); /* Target HW address is our HW address (redundant) */
- }
-
- /*
- * 7. All ready. Start the transmission
- */
- strip_write_some_more(strip_info->tty);
-}
-
-/* Encapsulate a datagram and kick it into a TTY queue. */
-static netdev_tx_t strip_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct strip *strip_info = netdev_priv(dev);
-
- if (!netif_running(dev)) {
- printk(KERN_ERR "%s: xmit call when iface is down\n",
- dev->name);
- return NETDEV_TX_BUSY;
- }
-
- netif_stop_queue(dev);
-
- del_timer(&strip_info->idle_timer);
-
-
- if (time_after(jiffies, strip_info->pps_timer + HZ)) {
- unsigned long t = jiffies - strip_info->pps_timer;
- unsigned long rx_pps_count =
- DIV_ROUND_CLOSEST(strip_info->rx_pps_count*HZ*8, t);
- unsigned long tx_pps_count =
- DIV_ROUND_CLOSEST(strip_info->tx_pps_count*HZ*8, t);
- unsigned long sx_pps_count =
- DIV_ROUND_CLOSEST(strip_info->sx_pps_count*HZ*8, t);
-
- strip_info->pps_timer = jiffies;
- strip_info->rx_pps_count = 0;
- strip_info->tx_pps_count = 0;
- strip_info->sx_pps_count = 0;
-
- strip_info->rx_average_pps = (strip_info->rx_average_pps + rx_pps_count + 1) / 2;
- strip_info->tx_average_pps = (strip_info->tx_average_pps + tx_pps_count + 1) / 2;
- strip_info->sx_average_pps = (strip_info->sx_average_pps + sx_pps_count + 1) / 2;
-
- if (rx_pps_count / 8 >= 10)
- printk(KERN_INFO "%s: WARNING: Receiving %ld packets per second.\n",
- strip_info->dev->name, rx_pps_count / 8);
- if (tx_pps_count / 8 >= 10)
- printk(KERN_INFO "%s: WARNING: Tx %ld packets per second.\n",
- strip_info->dev->name, tx_pps_count / 8);
- if (sx_pps_count / 8 >= 10)
- printk(KERN_INFO "%s: WARNING: Sending %ld packets per second.\n",
- strip_info->dev->name, sx_pps_count / 8);
- }
-
- spin_lock_bh(&strip_lock);
-
- strip_send(strip_info, skb);
-
- spin_unlock_bh(&strip_lock);
-
- if (skb)
- dev_kfree_skb(skb);
- return NETDEV_TX_OK;
-}
-
-/*
- * IdleTask periodically calls strip_xmit, so even when we have no IP packets
- * to send for an extended period of time, the watchdog processing still gets
- * done to ensure that the radio stays in Starmode
- */
-
-static void strip_IdleTask(unsigned long parameter)
-{
- strip_xmit(NULL, (struct net_device *) parameter);
-}
-
-/*
- * Create the MAC header for an arbitrary protocol layer
- *
- * saddr!=NULL means use this specific address (n/a for Metricom)
- * saddr==NULL means use default device source address
- * daddr!=NULL means use this destination address
- * daddr==NULL means leave destination address alone
- * (e.g. unresolved arp -- kernel will call
- * rebuild_header later to fill in the address)
- */
-
-static int strip_header(struct sk_buff *skb, struct net_device *dev,
- unsigned short type, const void *daddr,
- const void *saddr, unsigned len)
-{
- struct strip *strip_info = netdev_priv(dev);
- STRIP_Header *header = (STRIP_Header *) skb_push(skb, sizeof(STRIP_Header));
-
- /*printk(KERN_INFO "%s: strip_header 0x%04X %s\n", dev->name, type,
- type == ETH_P_IP ? "IP" : type == ETH_P_ARP ? "ARP" : ""); */
-
- header->src_addr = strip_info->true_dev_addr;
- header->protocol = htons(type);
-
- /*HexDump("strip_header", netdev_priv(dev), skb->data, skb->data + skb->len); */
-
- if (!daddr)
- return (-dev->hard_header_len);
-
- header->dst_addr = *(MetricomAddress *) daddr;
- return (dev->hard_header_len);
-}
-
-/*
- * Rebuild the MAC header. This is called after an ARP
- * (or in future other address resolution) has completed on this
- * sk_buff. We now let ARP fill in the other fields.
- * I think this should return zero if packet is ready to send,
- * or non-zero if it needs more time to do an address lookup
- */
-
-static int strip_rebuild_header(struct sk_buff *skb)
-{
-#ifdef CONFIG_INET
- STRIP_Header *header = (STRIP_Header *) skb->data;
-
- /* Arp find returns zero if if knows the address, */
- /* or if it doesn't know the address it sends an ARP packet and returns non-zero */
- return arp_find(header->dst_addr.c, skb) ? 1 : 0;
-#else
- return 0;
-#endif
-}
-
-
-/************************************************************************/
-/* Receiving routines */
-
-/*
- * This function parses the response to the ATS300? command,
- * extracting the radio version and serial number.
- */
-static void get_radio_version(struct strip *strip_info, __u8 * ptr, __u8 * end)
-{
- __u8 *p, *value_begin, *value_end;
- int len;
-
- /* Determine the beginning of the second line of the payload */
- p = ptr;
- while (p < end && *p != 10)
- p++;
- if (p >= end)
- return;
- p++;
- value_begin = p;
-
- /* Determine the end of line */
- while (p < end && *p != 10)
- p++;
- if (p >= end)
- return;
- value_end = p;
- p++;
-
- len = value_end - value_begin;
- len = min_t(int, len, sizeof(FirmwareVersion) - 1);
- if (strip_info->firmware_version.c[0] == 0)
- printk(KERN_INFO "%s: Radio Firmware: %.*s\n",
- strip_info->dev->name, len, value_begin);
- sprintf(strip_info->firmware_version.c, "%.*s", len, value_begin);
-
- /* Look for the first colon */
- while (p < end && *p != ':')
- p++;
- if (p >= end)
- return;
- /* Skip over the space */
- p += 2;
- len = sizeof(SerialNumber) - 1;
- if (p + len <= end) {
- sprintf(strip_info->serial_number.c, "%.*s", len, p);
- } else {
- printk(KERN_DEBUG
- "STRIP: radio serial number shorter (%zd) than expected (%d)\n",
- end - p, len);
- }
-}
-
-/*
- * This function parses the response to the ATS325? command,
- * extracting the radio battery voltage.
- */
-static void get_radio_voltage(struct strip *strip_info, __u8 * ptr, __u8 * end)
-{
- int len;
-
- len = sizeof(BatteryVoltage) - 1;
- if (ptr + len <= end) {
- sprintf(strip_info->battery_voltage.c, "%.*s", len, ptr);
- } else {
- printk(KERN_DEBUG
- "STRIP: radio voltage string shorter (%zd) than expected (%d)\n",
- end - ptr, len);
- }
-}
-
-/*
- * This function parses the responses to the AT~LA and ATS311 commands,
- * which list the radio's neighbours.
- */
-static void get_radio_neighbours(MetricomNodeTable * table, __u8 * ptr, __u8 * end)
-{
- table->num_nodes = 0;
- while (ptr < end && table->num_nodes < NODE_TABLE_SIZE) {
- MetricomNode *node = &table->node[table->num_nodes++];
- char *dst = node->c, *limit = dst + sizeof(*node) - 1;
- while (ptr < end && *ptr <= 32)
- ptr++;
- while (ptr < end && dst < limit && *ptr != 10)
- *dst++ = *ptr++;
- *dst++ = 0;
- while (ptr < end && ptr[-1] != 10)
- ptr++;
- }
- do_gettimeofday(&table->timestamp);
-}
-
-static int get_radio_address(struct strip *strip_info, __u8 * p)
-{
- MetricomAddress addr;
-
- if (string_to_radio_address(&addr, p))
- return (1);
-
- /* See if our radio address has changed */
- if (memcmp(strip_info->true_dev_addr.c, addr.c, sizeof(addr))) {
- MetricomAddressString addr_string;
- radio_address_to_string(&addr, &addr_string);
- printk(KERN_INFO "%s: Radio address = %s\n",
- strip_info->dev->name, addr_string.c);
- strip_info->true_dev_addr = addr;
- if (!strip_info->manual_dev_addr)
- *(MetricomAddress *) strip_info->dev->dev_addr =
- addr;
- /* Give the radio a few seconds to get its head straight, then send an arp */
- strip_info->gratuitous_arp = jiffies + 15 * HZ;
- strip_info->arp_interval = 1 * HZ;
- }
- return (0);
-}
-
-static int verify_checksum(struct strip *strip_info)
-{
- __u8 *p = strip_info->sx_buff;
- __u8 *end = strip_info->sx_buff + strip_info->sx_count - 4;
- u_short sum =
- (READHEX16(end[0]) << 12) | (READHEX16(end[1]) << 8) |
- (READHEX16(end[2]) << 4) | (READHEX16(end[3]));
- while (p < end)
- sum -= *p++;
- if (sum == 0 && strip_info->firmware_level == StructuredMessages) {
- strip_info->firmware_level = ChecksummedMessages;
- printk(KERN_INFO "%s: Radio provides message checksums\n",
- strip_info->dev->name);
- }
- return (sum == 0);
-}
-
-static void RecvErr(char *msg, struct strip *strip_info)
-{
- __u8 *ptr = strip_info->sx_buff;
- __u8 *end = strip_info->sx_buff + strip_info->sx_count;
- DumpData(msg, strip_info, ptr, end);
- strip_info->rx_errors++;
-}
-
-static void RecvErr_Message(struct strip *strip_info, __u8 * sendername,
- const __u8 * msg, u_long len)
-{
- if (has_prefix(msg, len, "001")) { /* Not in StarMode! */
- RecvErr("Error Msg:", strip_info);
- printk(KERN_INFO "%s: Radio %s is not in StarMode\n",
- strip_info->dev->name, sendername);
- }
-
- else if (has_prefix(msg, len, "002")) { /* Remap handle */
- /* We ignore "Remap handle" messages for now */
- }
-
- else if (has_prefix(msg, len, "003")) { /* Can't resolve name */
- RecvErr("Error Msg:", strip_info);
- printk(KERN_INFO "%s: Destination radio name is unknown\n",
- strip_info->dev->name);
- }
-
- else if (has_prefix(msg, len, "004")) { /* Name too small or missing */
- strip_info->watchdog_doreset = jiffies + LongTime;
-#if TICKLE_TIMERS
- {
- struct timeval tv;
- do_gettimeofday(&tv);
- printk(KERN_INFO
- "**** Got ERR_004 response at %02d.%06d\n",
- tv.tv_sec % 100, tv.tv_usec);
- }
-#endif
- if (!strip_info->working) {
- strip_info->working = TRUE;
- printk(KERN_INFO "%s: Radio now in starmode\n",
- strip_info->dev->name);
- /*
- * If the radio has just entered a working state, we should do our first
- * probe ASAP, so that we find out our radio address etc. without delay.
- */
- strip_info->watchdog_doprobe = jiffies;
- }
- if (strip_info->firmware_level == NoStructure && sendername) {
- strip_info->firmware_level = StructuredMessages;
- strip_info->next_command = 0; /* Try to enable checksums ASAP */
- printk(KERN_INFO
- "%s: Radio provides structured messages\n",
- strip_info->dev->name);
- }
- if (strip_info->firmware_level >= StructuredMessages) {
- /*
- * If this message has a valid checksum on the end, then the call to verify_checksum
- * will elevate the firmware_level to ChecksummedMessages for us. (The actual return
- * code from verify_checksum is ignored here.)
- */
- verify_checksum(strip_info);
- /*
- * If the radio has structured messages but we don't yet have all our information about it,
- * we should do probes without delay, until we have gathered all the information
- */
- if (!GOT_ALL_RADIO_INFO(strip_info))
- strip_info->watchdog_doprobe = jiffies;
- }
- }
-
- else if (has_prefix(msg, len, "005")) /* Bad count specification */
- RecvErr("Error Msg:", strip_info);
-
- else if (has_prefix(msg, len, "006")) /* Header too big */
- RecvErr("Error Msg:", strip_info);
-
- else if (has_prefix(msg, len, "007")) { /* Body too big */
- RecvErr("Error Msg:", strip_info);
- printk(KERN_ERR
- "%s: Error! Packet size too big for radio.\n",
- strip_info->dev->name);
- }
-
- else if (has_prefix(msg, len, "008")) { /* Bad character in name */
- RecvErr("Error Msg:", strip_info);
- printk(KERN_ERR
- "%s: Radio name contains illegal character\n",
- strip_info->dev->name);
- }
-
- else if (has_prefix(msg, len, "009")) /* No count or line terminator */
- RecvErr("Error Msg:", strip_info);
-
- else if (has_prefix(msg, len, "010")) /* Invalid checksum */
- RecvErr("Error Msg:", strip_info);
-
- else if (has_prefix(msg, len, "011")) /* Checksum didn't match */
- RecvErr("Error Msg:", strip_info);
-
- else if (has_prefix(msg, len, "012")) /* Failed to transmit packet */
- RecvErr("Error Msg:", strip_info);
-
- else
- RecvErr("Error Msg:", strip_info);
-}
-
-static void process_AT_response(struct strip *strip_info, __u8 * ptr,
- __u8 * end)
-{
- u_long len;
- __u8 *p = ptr;
- while (p < end && p[-1] != 10)
- p++; /* Skip past first newline character */
- /* Now ptr points to the AT command, and p points to the text of the response. */
- len = p - ptr;
-
-#if TICKLE_TIMERS
- {
- struct timeval tv;
- do_gettimeofday(&tv);
- printk(KERN_INFO "**** Got AT response %.7s at %02d.%06d\n",
- ptr, tv.tv_sec % 100, tv.tv_usec);
- }
-#endif
-
- if (has_prefix(ptr, len, "ATS300?"))
- get_radio_version(strip_info, p, end);
- else if (has_prefix(ptr, len, "ATS305?"))
- get_radio_address(strip_info, p);
- else if (has_prefix(ptr, len, "ATS311?"))
- get_radio_neighbours(&strip_info->poletops, p, end);
- else if (has_prefix(ptr, len, "ATS319=7"))
- verify_checksum(strip_info);
- else if (has_prefix(ptr, len, "ATS325?"))
- get_radio_voltage(strip_info, p, end);
- else if (has_prefix(ptr, len, "AT~LA"))
- get_radio_neighbours(&strip_info->portables, p, end);
- else
- RecvErr("Unknown AT Response:", strip_info);
-}
-
-static void process_ACK(struct strip *strip_info, __u8 * ptr, __u8 * end)
-{
- /* Currently we don't do anything with ACKs from the radio */
-}
-
-static void process_Info(struct strip *strip_info, __u8 * ptr, __u8 * end)
-{
- if (ptr + 16 > end)
- RecvErr("Bad Info Msg:", strip_info);
-}
-
-static struct net_device *get_strip_dev(struct strip *strip_info)
-{
- /* If our hardware address is *manually set* to zero, and we know our */
- /* real radio hardware address, try to find another strip device that has been */
- /* manually set to that address that we can 'transfer ownership' of this packet to */
- if (strip_info->manual_dev_addr &&
- !memcmp(strip_info->dev->dev_addr, zero_address.c,
- sizeof(zero_address))
- && memcmp(&strip_info->true_dev_addr, zero_address.c,
- sizeof(zero_address))) {
- struct net_device *dev;
- read_lock_bh(&dev_base_lock);
- for_each_netdev(&init_net, dev) {
- if (dev->type == strip_info->dev->type &&
- !memcmp(dev->dev_addr,
- &strip_info->true_dev_addr,
- sizeof(MetricomAddress))) {
- printk(KERN_INFO
- "%s: Transferred packet ownership to %s.\n",
- strip_info->dev->name, dev->name);
- read_unlock_bh(&dev_base_lock);
- return (dev);
- }
- }
- read_unlock_bh(&dev_base_lock);
- }
- return (strip_info->dev);
-}
-
-/*
- * Send one completely decapsulated datagram to the next layer.
- */
-
-static void deliver_packet(struct strip *strip_info, STRIP_Header * header,
- __u16 packetlen)
-{
- struct sk_buff *skb = dev_alloc_skb(sizeof(STRIP_Header) + packetlen);
- if (!skb) {
- printk(KERN_ERR "%s: memory squeeze, dropping packet.\n",
- strip_info->dev->name);
- strip_info->rx_dropped++;
- } else {
- memcpy(skb_put(skb, sizeof(STRIP_Header)), header,
- sizeof(STRIP_Header));
- memcpy(skb_put(skb, packetlen), strip_info->rx_buff,
- packetlen);
- skb->dev = get_strip_dev(strip_info);
- skb->protocol = header->protocol;
- skb_reset_mac_header(skb);
-
- /* Having put a fake header on the front of the sk_buff for the */
- /* benefit of tools like tcpdump, skb_pull now 'consumes' that */
- /* fake header before we hand the packet up to the next layer. */
- skb_pull(skb, sizeof(STRIP_Header));
-
- /* Finally, hand the packet up to the next layer (e.g. IP or ARP, etc.) */
- strip_info->rx_packets++;
- strip_info->rx_pps_count++;
-#ifdef EXT_COUNTERS
- strip_info->rx_bytes += packetlen;
-#endif
- netif_rx(skb);
- }
-}
-
-static void process_IP_packet(struct strip *strip_info,
- STRIP_Header * header, __u8 * ptr,
- __u8 * end)
-{
- __u16 packetlen;
-
- /* Decode start of the IP packet header */
- ptr = UnStuffData(ptr, end, strip_info->rx_buff, 4);
- if (!ptr) {
- RecvErr("IP Packet too short", strip_info);
- return;
- }
-
- packetlen = ((__u16) strip_info->rx_buff[2] << 8) | strip_info->rx_buff[3];
-
- if (packetlen > MAX_RECV_MTU) {
- printk(KERN_INFO "%s: Dropping oversized received IP packet: %d bytes\n",
- strip_info->dev->name, packetlen);
- strip_info->rx_dropped++;
- return;
- }
-
- /*printk(KERN_INFO "%s: Got %d byte IP packet\n", strip_info->dev->name, packetlen); */
-
- /* Decode remainder of the IP packet */
- ptr =
- UnStuffData(ptr, end, strip_info->rx_buff + 4, packetlen - 4);
- if (!ptr) {
- RecvErr("IP Packet too short", strip_info);
- return;
- }
-
- if (ptr < end) {
- RecvErr("IP Packet too long", strip_info);
- return;
- }
-
- header->protocol = htons(ETH_P_IP);
-
- deliver_packet(strip_info, header, packetlen);
-}
-
-static void process_ARP_packet(struct strip *strip_info,
- STRIP_Header * header, __u8 * ptr,
- __u8 * end)
-{
- __u16 packetlen;
- struct arphdr *arphdr = (struct arphdr *) strip_info->rx_buff;
-
- /* Decode start of the ARP packet */
- ptr = UnStuffData(ptr, end, strip_info->rx_buff, 8);
- if (!ptr) {
- RecvErr("ARP Packet too short", strip_info);
- return;
- }
-
- packetlen = 8 + (arphdr->ar_hln + arphdr->ar_pln) * 2;
-
- if (packetlen > MAX_RECV_MTU) {
- printk(KERN_INFO
- "%s: Dropping oversized received ARP packet: %d bytes\n",
- strip_info->dev->name, packetlen);
- strip_info->rx_dropped++;
- return;
- }
-
- /*printk(KERN_INFO "%s: Got %d byte ARP %s\n",
- strip_info->dev->name, packetlen,
- ntohs(arphdr->ar_op) == ARPOP_REQUEST ? "request" : "reply"); */
-
- /* Decode remainder of the ARP packet */
- ptr =
- UnStuffData(ptr, end, strip_info->rx_buff + 8, packetlen - 8);
- if (!ptr) {
- RecvErr("ARP Packet too short", strip_info);
- return;
- }
-
- if (ptr < end) {
- RecvErr("ARP Packet too long", strip_info);
- return;
- }
-
- header->protocol = htons(ETH_P_ARP);
-
- deliver_packet(strip_info, header, packetlen);
-}
-
-/*
- * process_text_message processes a <CR>-terminated block of data received
- * from the radio that doesn't begin with a '*' character. All normal
- * Starmode communication messages with the radio begin with a '*',
- * so any text that does not indicates a serial port error, a radio that
- * is in Hayes command mode instead of Starmode, or a radio with really
- * old firmware that doesn't frame its Starmode responses properly.
- */
-static void process_text_message(struct strip *strip_info)
-{
- __u8 *msg = strip_info->sx_buff;
- int len = strip_info->sx_count;
-
- /* Check for anything that looks like it might be our radio name */
- /* (This is here for backwards compatibility with old firmware) */
- if (len == 9 && get_radio_address(strip_info, msg) == 0)
- return;
-
- if (text_equal(msg, len, "OK"))
- return; /* Ignore 'OK' responses from prior commands */
- if (text_equal(msg, len, "ERROR"))
- return; /* Ignore 'ERROR' messages */
- if (has_prefix(msg, len, "ate0q1"))
- return; /* Ignore character echo back from the radio */
-
- /* Catch other error messages */
- /* (This is here for backwards compatibility with old firmware) */
- if (has_prefix(msg, len, "ERR_")) {
- RecvErr_Message(strip_info, NULL, &msg[4], len - 4);
- return;
- }
-
- RecvErr("No initial *", strip_info);
-}
-
-/*
- * process_message processes a <CR>-terminated block of data received
- * from the radio. If the radio is not in Starmode or has old firmware,
- * it may be a line of text in response to an AT command. Ideally, with
- * a current radio that's properly in Starmode, all data received should
- * be properly framed and checksummed radio message blocks, containing
- * either a starmode packet, or a other communication from the radio
- * firmware, like "INF_" Info messages and &COMMAND responses.
- */
-static void process_message(struct strip *strip_info)
-{
- STRIP_Header header = { zero_address, zero_address, 0 };
- __u8 *ptr = strip_info->sx_buff;
- __u8 *end = strip_info->sx_buff + strip_info->sx_count;
- __u8 sendername[32], *sptr = sendername;
- MetricomKey key;
-
- /*HexDump("Receiving", strip_info, ptr, end); */
-
- /* Check for start of address marker, and then skip over it */
- if (*ptr == '*')
- ptr++;
- else {
- process_text_message(strip_info);
- return;
- }
-
- /* Copy out the return address */
- while (ptr < end && *ptr != '*'
- && sptr < ARRAY_END(sendername) - 1)
- *sptr++ = *ptr++;
- *sptr = 0; /* Null terminate the sender name */
-
- /* Check for end of address marker, and skip over it */
- if (ptr >= end || *ptr != '*') {
- RecvErr("No second *", strip_info);
- return;
- }
- ptr++; /* Skip the second '*' */
-
- /* If the sender name is "&COMMAND", ignore this 'packet' */
- /* (This is here for backwards compatibility with old firmware) */
- if (!strcmp(sendername, "&COMMAND")) {
- strip_info->firmware_level = NoStructure;
- strip_info->next_command = CompatibilityCommand;
- return;
- }
-
- if (ptr + 4 > end) {
- RecvErr("No proto key", strip_info);
- return;
- }
-
- /* Get the protocol key out of the buffer */
- key.c[0] = *ptr++;
- key.c[1] = *ptr++;
- key.c[2] = *ptr++;
- key.c[3] = *ptr++;
-
- /* If we're using checksums, verify the checksum at the end of the packet */
- if (strip_info->firmware_level >= ChecksummedMessages) {
- end -= 4; /* Chop the last four bytes off the packet (they're the checksum) */
- if (ptr > end) {
- RecvErr("Missing Checksum", strip_info);
- return;
- }
- if (!verify_checksum(strip_info)) {
- RecvErr("Bad Checksum", strip_info);
- return;
- }
- }
-
- /*printk(KERN_INFO "%s: Got packet from \"%s\".\n", strip_info->dev->name, sendername); */
-
- /*
- * Fill in (pseudo) source and destination addresses in the packet.
- * We assume that the destination address was our address (the radio does not
- * tell us this). If the radio supplies a source address, then we use it.
- */
- header.dst_addr = strip_info->true_dev_addr;
- string_to_radio_address(&header.src_addr, sendername);
-
-#ifdef EXT_COUNTERS
- if (key.l == SIP0Key.l) {
- strip_info->rx_rbytes += (end - ptr);
- process_IP_packet(strip_info, &header, ptr, end);
- } else if (key.l == ARP0Key.l) {
- strip_info->rx_rbytes += (end - ptr);
- process_ARP_packet(strip_info, &header, ptr, end);
- } else if (key.l == ATR_Key.l) {
- strip_info->rx_ebytes += (end - ptr);
- process_AT_response(strip_info, ptr, end);
- } else if (key.l == ACK_Key.l) {
- strip_info->rx_ebytes += (end - ptr);
- process_ACK(strip_info, ptr, end);
- } else if (key.l == INF_Key.l) {
- strip_info->rx_ebytes += (end - ptr);
- process_Info(strip_info, ptr, end);
- } else if (key.l == ERR_Key.l) {
- strip_info->rx_ebytes += (end - ptr);
- RecvErr_Message(strip_info, sendername, ptr, end - ptr);
- } else
- RecvErr("Unrecognized protocol key", strip_info);
-#else
- if (key.l == SIP0Key.l)
- process_IP_packet(strip_info, &header, ptr, end);
- else if (key.l == ARP0Key.l)
- process_ARP_packet(strip_info, &header, ptr, end);
- else if (key.l == ATR_Key.l)
- process_AT_response(strip_info, ptr, end);
- else if (key.l == ACK_Key.l)
- process_ACK(strip_info, ptr, end);
- else if (key.l == INF_Key.l)
- process_Info(strip_info, ptr, end);
- else if (key.l == ERR_Key.l)
- RecvErr_Message(strip_info, sendername, ptr, end - ptr);
- else
- RecvErr("Unrecognized protocol key", strip_info);
-#endif
-}
-
-#define TTYERROR(X) ((X) == TTY_BREAK ? "Break" : \
- (X) == TTY_FRAME ? "Framing Error" : \
- (X) == TTY_PARITY ? "Parity Error" : \
- (X) == TTY_OVERRUN ? "Hardware Overrun" : "Unknown Error")
-
-/*
- * Handle the 'receiver data ready' interrupt.
- * This function is called by the 'tty_io' module in the kernel when
- * a block of STRIP data has been received, which can now be decapsulated
- * and sent on to some IP layer for further processing.
- */
-
-static void strip_receive_buf(struct tty_struct *tty, const unsigned char *cp,
- char *fp, int count)
-{
- struct strip *strip_info = tty->disc_data;
- const unsigned char *end = cp + count;
-
- if (!strip_info || strip_info->magic != STRIP_MAGIC
- || !netif_running(strip_info->dev))
- return;
-
- spin_lock_bh(&strip_lock);
-#if 0
- {
- struct timeval tv;
- do_gettimeofday(&tv);
- printk(KERN_INFO
- "**** strip_receive_buf: %3d bytes at %02d.%06d\n",
- count, tv.tv_sec % 100, tv.tv_usec);
- }
-#endif
-
-#ifdef EXT_COUNTERS
- strip_info->rx_sbytes += count;
-#endif
-
- /* Read the characters out of the buffer */
- while (cp < end) {
- if (fp && *fp)
- printk(KERN_INFO "%s: %s on serial port\n",
- strip_info->dev->name, TTYERROR(*fp));
- if (fp && *fp++ && !strip_info->discard) { /* If there's a serial error, record it */
- /* If we have some characters in the buffer, discard them */
- strip_info->discard = strip_info->sx_count;
- strip_info->rx_errors++;
- }
-
- /* Leading control characters (CR, NL, Tab, etc.) are ignored */
- if (strip_info->sx_count > 0 || *cp >= ' ') {
- if (*cp == 0x0D) { /* If end of packet, decide what to do with it */
- if (strip_info->sx_count > 3000)
- printk(KERN_INFO
- "%s: Cut a %d byte packet (%zd bytes remaining)%s\n",
- strip_info->dev->name,
- strip_info->sx_count,
- end - cp - 1,
- strip_info->
- discard ? " (discarded)" :
- "");
- if (strip_info->sx_count >
- strip_info->sx_size) {
- strip_info->rx_over_errors++;
- printk(KERN_INFO
- "%s: sx_buff overflow (%d bytes total)\n",
- strip_info->dev->name,
- strip_info->sx_count);
- } else if (strip_info->discard)
- printk(KERN_INFO
- "%s: Discarding bad packet (%d/%d)\n",
- strip_info->dev->name,
- strip_info->discard,
- strip_info->sx_count);
- else
- process_message(strip_info);
- strip_info->discard = 0;
- strip_info->sx_count = 0;
- } else {
- /* Make sure we have space in the buffer */
- if (strip_info->sx_count <
- strip_info->sx_size)
- strip_info->sx_buff[strip_info->
- sx_count] =
- *cp;
- strip_info->sx_count++;
- }
- }
- cp++;
- }
- spin_unlock_bh(&strip_lock);
-}
-
-
-/************************************************************************/
-/* General control routines */
-
-static int set_mac_address(struct strip *strip_info,
- MetricomAddress * addr)
-{
- /*
- * We're using a manually specified address if the address is set
- * to anything other than all ones. Setting the address to all ones
- * disables manual mode and goes back to automatic address determination
- * (tracking the true address that the radio has).
- */
- strip_info->manual_dev_addr =
- memcmp(addr->c, broadcast_address.c,
- sizeof(broadcast_address));
- if (strip_info->manual_dev_addr)
- *(MetricomAddress *) strip_info->dev->dev_addr = *addr;
- else
- *(MetricomAddress *) strip_info->dev->dev_addr =
- strip_info->true_dev_addr;
- return 0;
-}
-
-static int strip_set_mac_address(struct net_device *dev, void *addr)
-{
- struct strip *strip_info = netdev_priv(dev);
- struct sockaddr *sa = addr;
- printk(KERN_INFO "%s: strip_set_dev_mac_address called\n", dev->name);
- set_mac_address(strip_info, (MetricomAddress *) sa->sa_data);
- return 0;
-}
-
-static struct net_device_stats *strip_get_stats(struct net_device *dev)
-{
- struct strip *strip_info = netdev_priv(dev);
- static struct net_device_stats stats;
-
- memset(&stats, 0, sizeof(struct net_device_stats));
-
- stats.rx_packets = strip_info->rx_packets;
- stats.tx_packets = strip_info->tx_packets;
- stats.rx_dropped = strip_info->rx_dropped;
- stats.tx_dropped = strip_info->tx_dropped;
- stats.tx_errors = strip_info->tx_errors;
- stats.rx_errors = strip_info->rx_errors;
- stats.rx_over_errors = strip_info->rx_over_errors;
- return (&stats);
-}
-
-
-/************************************************************************/
-/* Opening and closing */
-
-/*
- * Here's the order things happen:
- * When the user runs "slattach -p strip ..."
- * 1. The TTY module calls strip_open;;
- * 2. strip_open calls strip_alloc
- * 3. strip_alloc calls register_netdev
- * 4. register_netdev calls strip_dev_init
- * 5. then strip_open finishes setting up the strip_info
- *
- * When the user runs "ifconfig st<x> up address netmask ..."
- * 6. strip_open_low gets called
- *
- * When the user runs "ifconfig st<x> down"
- * 7. strip_close_low gets called
- *
- * When the user kills the slattach process
- * 8. strip_close gets called
- * 9. strip_close calls dev_close
- * 10. if the device is still up, then dev_close calls strip_close_low
- * 11. strip_close calls strip_free
- */
-
-/* Open the low-level part of the STRIP channel. Easy! */
-
-static int strip_open_low(struct net_device *dev)
-{
- struct strip *strip_info = netdev_priv(dev);
-
- if (strip_info->tty == NULL)
- return (-ENODEV);
-
- if (!allocate_buffers(strip_info, dev->mtu))
- return (-ENOMEM);
-
- strip_info->sx_count = 0;
- strip_info->tx_left = 0;
-
- strip_info->discard = 0;
- strip_info->working = FALSE;
- strip_info->firmware_level = NoStructure;
- strip_info->next_command = CompatibilityCommand;
- strip_info->user_baud = tty_get_baud_rate(strip_info->tty);
-
- printk(KERN_INFO "%s: Initializing Radio.\n",
- strip_info->dev->name);
- ResetRadio(strip_info);
- strip_info->idle_timer.expires = jiffies + 1 * HZ;
- add_timer(&strip_info->idle_timer);
- netif_wake_queue(dev);
- return (0);
-}
-
-
-/*
- * Close the low-level part of the STRIP channel. Easy!
- */
-
-static int strip_close_low(struct net_device *dev)
-{
- struct strip *strip_info = netdev_priv(dev);
-
- if (strip_info->tty == NULL)
- return -EBUSY;
- clear_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
- netif_stop_queue(dev);
-
- /*
- * Free all STRIP frame buffers.
- */
- kfree(strip_info->rx_buff);
- strip_info->rx_buff = NULL;
- kfree(strip_info->sx_buff);
- strip_info->sx_buff = NULL;
- kfree(strip_info->tx_buff);
- strip_info->tx_buff = NULL;
-
- del_timer(&strip_info->idle_timer);
- return 0;
-}
-
-static const struct header_ops strip_header_ops = {
- .create = strip_header,
- .rebuild = strip_rebuild_header,
-};
-
-
-static const struct net_device_ops strip_netdev_ops = {
- .ndo_open = strip_open_low,
- .ndo_stop = strip_close_low,
- .ndo_start_xmit = strip_xmit,
- .ndo_set_mac_address = strip_set_mac_address,
- .ndo_get_stats = strip_get_stats,
- .ndo_change_mtu = strip_change_mtu,
-};
-
-/*
- * This routine is called by DDI when the
- * (dynamically assigned) device is registered
- */
-
-static void strip_dev_setup(struct net_device *dev)
-{
- /*
- * Finish setting up the DEVICE info.
- */
-
- dev->trans_start = 0;
- dev->tx_queue_len = 30; /* Drop after 30 frames queued */
-
- dev->flags = 0;
- dev->mtu = DEFAULT_STRIP_MTU;
- dev->type = ARPHRD_METRICOM; /* dtang */
- dev->hard_header_len = sizeof(STRIP_Header);
- /*
- * netdev_priv(dev) Already holds a pointer to our struct strip
- */
-
- *(MetricomAddress *)dev->broadcast = broadcast_address;
- dev->dev_addr[0] = 0;
- dev->addr_len = sizeof(MetricomAddress);
-
- dev->header_ops = &strip_header_ops,
- dev->netdev_ops = &strip_netdev_ops;
-}
-
-/*
- * Free a STRIP channel.
- */
-
-static void strip_free(struct strip *strip_info)
-{
- spin_lock_bh(&strip_lock);
- list_del_rcu(&strip_info->list);
- spin_unlock_bh(&strip_lock);
-
- strip_info->magic = 0;
-
- free_netdev(strip_info->dev);
-}
-
-
-/*
- * Allocate a new free STRIP channel
- */
-static struct strip *strip_alloc(void)
-{
- struct list_head *n;
- struct net_device *dev;
- struct strip *strip_info;
-
- dev = alloc_netdev(sizeof(struct strip), "st%d",
- strip_dev_setup);
-
- if (!dev)
- return NULL; /* If no more memory, return */
-
-
- strip_info = netdev_priv(dev);
- strip_info->dev = dev;
-
- strip_info->magic = STRIP_MAGIC;
- strip_info->tty = NULL;
-
- strip_info->gratuitous_arp = jiffies + LongTime;
- strip_info->arp_interval = 0;
- init_timer(&strip_info->idle_timer);
- strip_info->idle_timer.data = (long) dev;
- strip_info->idle_timer.function = strip_IdleTask;
-
-
- spin_lock_bh(&strip_lock);
- rescan:
- /*
- * Search the list to find where to put our new entry
- * (and in the process decide what channel number it is
- * going to be)
- */
- list_for_each(n, &strip_list) {
- struct strip *s = hlist_entry(n, struct strip, list);
-
- if (s->dev->base_addr == dev->base_addr) {
- ++dev->base_addr;
- goto rescan;
- }
- }
-
- sprintf(dev->name, "st%ld", dev->base_addr);
-
- list_add_tail_rcu(&strip_info->list, &strip_list);
- spin_unlock_bh(&strip_lock);
-
- return strip_info;
-}
-
-/*
- * Open the high-level part of the STRIP channel.
- * This function is called by the TTY module when the
- * STRIP line discipline is called for. Because we are
- * sure the tty line exists, we only have to link it to
- * a free STRIP channel...
- */
-
-static int strip_open(struct tty_struct *tty)
-{
- struct strip *strip_info = tty->disc_data;
-
- /*
- * First make sure we're not already connected.
- */
-
- if (strip_info && strip_info->magic == STRIP_MAGIC)
- return -EEXIST;
-
- /*
- * We need a write method.
- */
-
- if (tty->ops->write == NULL || tty->ops->set_termios == NULL)
- return -EOPNOTSUPP;
-
- /*
- * OK. Find a free STRIP channel to use.
- */
- if ((strip_info = strip_alloc()) == NULL)
- return -ENFILE;
-
- /*
- * Register our newly created device so it can be ifconfig'd
- * strip_dev_init() will be called as a side-effect
- */
-
- if (register_netdev(strip_info->dev) != 0) {
- printk(KERN_ERR "strip: register_netdev() failed.\n");
- strip_free(strip_info);
- return -ENFILE;
- }
-
- strip_info->tty = tty;
- tty->disc_data = strip_info;
- tty->receive_room = 65536;
-
- tty_driver_flush_buffer(tty);
-
- /*
- * Restore default settings
- */
-
- strip_info->dev->type = ARPHRD_METRICOM; /* dtang */
-
- /*
- * Set tty options
- */
-
- tty->termios->c_iflag |= IGNBRK | IGNPAR; /* Ignore breaks and parity errors. */
- tty->termios->c_cflag |= CLOCAL; /* Ignore modem control signals. */
- tty->termios->c_cflag &= ~HUPCL; /* Don't close on hup */
-
- printk(KERN_INFO "STRIP: device \"%s\" activated\n",
- strip_info->dev->name);
-
- /*
- * Done. We have linked the TTY line to a channel.
- */
- return (strip_info->dev->base_addr);
-}
-
-/*
- * Close down a STRIP channel.
- * This means flushing out any pending queues, and then restoring the
- * TTY line discipline to what it was before it got hooked to STRIP
- * (which usually is TTY again).
- */
-
-static void strip_close(struct tty_struct *tty)
-{
- struct strip *strip_info = tty->disc_data;
-
- /*
- * First make sure we're connected.
- */
-
- if (!strip_info || strip_info->magic != STRIP_MAGIC)
- return;
-
- unregister_netdev(strip_info->dev);
-
- tty->disc_data = NULL;
- strip_info->tty = NULL;
- printk(KERN_INFO "STRIP: device \"%s\" closed down\n",
- strip_info->dev->name);
- strip_free(strip_info);
- tty->disc_data = NULL;
-}
-
-
-/************************************************************************/
-/* Perform I/O control calls on an active STRIP channel. */
-
-static int strip_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- struct strip *strip_info = tty->disc_data;
-
- /*
- * First make sure we're connected.
- */
-
- if (!strip_info || strip_info->magic != STRIP_MAGIC)
- return -EINVAL;
-
- switch (cmd) {
- case SIOCGIFNAME:
- if(copy_to_user((void __user *) arg, strip_info->dev->name, strlen(strip_info->dev->name) + 1))
- return -EFAULT;
- break;
- case SIOCSIFHWADDR:
- {
- MetricomAddress addr;
- //printk(KERN_INFO "%s: SIOCSIFHWADDR\n", strip_info->dev->name);
- if(copy_from_user(&addr, (void __user *) arg, sizeof(MetricomAddress)))
- return -EFAULT;
- return set_mac_address(strip_info, &addr);
- }
- default:
- return tty_mode_ioctl(tty, file, cmd, arg);
- break;
- }
- return 0;
-}
-
-#ifdef CONFIG_COMPAT
-static long strip_compat_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- switch (cmd) {
- case SIOCGIFNAME:
- case SIOCSIFHWADDR:
- return strip_ioctl(tty, file, cmd,
- (unsigned long)compat_ptr(arg));
- }
- return -ENOIOCTLCMD;
-}
-#endif
-
-/************************************************************************/
-/* Initialization */
-
-static struct tty_ldisc_ops strip_ldisc = {
- .magic = TTY_LDISC_MAGIC,
- .name = "strip",
- .owner = THIS_MODULE,
- .open = strip_open,
- .close = strip_close,
- .ioctl = strip_ioctl,
-#ifdef CONFIG_COMPAT
- .compat_ioctl = strip_compat_ioctl,
-#endif
- .receive_buf = strip_receive_buf,
- .write_wakeup = strip_write_some_more,
-};
-
-/*
- * Initialize the STRIP driver.
- * This routine is called at boot time, to bootstrap the multi-channel
- * STRIP driver
- */
-
-static char signon[] __initdata =
- KERN_INFO "STRIP: Version %s (unlimited channels)\n";
-
-static int __init strip_init_driver(void)
-{
- int status;
-
- printk(signon, StripVersion);
-
-
- /*
- * Fill in our line protocol discipline, and register it
- */
- if ((status = tty_register_ldisc(N_STRIP, &strip_ldisc)))
- printk(KERN_ERR "STRIP: can't register line discipline (err = %d)\n",
- status);
-
- /*
- * Register the status file with /proc
- */
- proc_net_fops_create(&init_net, "strip", S_IFREG | S_IRUGO, &strip_seq_fops);
-
- return status;
-}
-
-module_init(strip_init_driver);
-
-static const char signoff[] __exitdata =
- KERN_INFO "STRIP: Module Unloaded\n";
-
-static void __exit strip_exit_driver(void)
-{
- int i;
- struct list_head *p,*n;
-
- /* module ref count rules assure that all entries are unregistered */
- list_for_each_safe(p, n, &strip_list) {
- struct strip *s = list_entry(p, struct strip, list);
- strip_free(s);
- }
-
- /* Unregister with the /proc/net file here. */
- proc_net_remove(&init_net, "strip");
-
- if ((i = tty_unregister_ldisc(N_STRIP)))
- printk(KERN_ERR "STRIP: can't unregister line discipline (err = %d)\n", i);
-
- printk(signoff);
-}
-
-module_exit(strip_exit_driver);
-
-MODULE_AUTHOR("Stuart Cheshire <cheshire@cs.stanford.edu>");
-MODULE_DESCRIPTION("Starmode Radio IP (STRIP) Device Driver");
-MODULE_LICENSE("Dual BSD/GPL");
-
-MODULE_SUPPORTED_DEVICE("Starmode Radio IP (STRIP) modem");
diff --git a/drivers/net/wireless/wavelan.c b/drivers/net/wireless/wavelan.c
deleted file mode 100644
index d634b2da3b8..00000000000
--- a/drivers/net/wireless/wavelan.c
+++ /dev/null
@@ -1,4383 +0,0 @@
-/*
- * WaveLAN ISA driver
- *
- * Jean II - HPLB '96
- *
- * Reorganisation and extension of the driver.
- * Original copyright follows (also see the end of this file).
- * See wavelan.p.h for details.
- *
- *
- *
- * AT&T GIS (nee NCR) WaveLAN card:
- * An Ethernet-like radio transceiver
- * controlled by an Intel 82586 coprocessor.
- */
-
-#include "wavelan.p.h" /* Private header */
-
-/************************* MISC SUBROUTINES **************************/
-/*
- * Subroutines which won't fit in one of the following category
- * (WaveLAN modem or i82586)
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Translate irq number to PSA irq parameter
- */
-static u8 wv_irq_to_psa(int irq)
-{
- if (irq < 0 || irq >= ARRAY_SIZE(irqvals))
- return 0;
-
- return irqvals[irq];
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Translate PSA irq parameter to irq number
- */
-static int __init wv_psa_to_irq(u8 irqval)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(irqvals); i++)
- if (irqvals[i] == irqval)
- return i;
-
- return -1;
-}
-
-/********************* HOST ADAPTER SUBROUTINES *********************/
-/*
- * Useful subroutines to manage the WaveLAN ISA interface
- *
- * One major difference with the PCMCIA hardware (except the port mapping)
- * is that we have to keep the state of the Host Control Register
- * because of the interrupt enable & bus size flags.
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Read from card's Host Adaptor Status Register.
- */
-static inline u16 hasr_read(unsigned long ioaddr)
-{
- return (inw(HASR(ioaddr)));
-} /* hasr_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Write to card's Host Adapter Command Register.
- */
-static inline void hacr_write(unsigned long ioaddr, u16 hacr)
-{
- outw(hacr, HACR(ioaddr));
-} /* hacr_write */
-
-/*------------------------------------------------------------------*/
-/*
- * Write to card's Host Adapter Command Register. Include a delay for
- * those times when it is needed.
- */
-static void hacr_write_slow(unsigned long ioaddr, u16 hacr)
-{
- hacr_write(ioaddr, hacr);
- /* delay might only be needed sometimes */
- mdelay(1);
-} /* hacr_write_slow */
-
-/*------------------------------------------------------------------*/
-/*
- * Set the channel attention bit.
- */
-static inline void set_chan_attn(unsigned long ioaddr, u16 hacr)
-{
- hacr_write(ioaddr, hacr | HACR_CA);
-} /* set_chan_attn */
-
-/*------------------------------------------------------------------*/
-/*
- * Reset, and then set host adaptor into default mode.
- */
-static inline void wv_hacr_reset(unsigned long ioaddr)
-{
- hacr_write_slow(ioaddr, HACR_RESET);
- hacr_write(ioaddr, HACR_DEFAULT);
-} /* wv_hacr_reset */
-
-/*------------------------------------------------------------------*/
-/*
- * Set the I/O transfer over the ISA bus to 8-bit mode
- */
-static inline void wv_16_off(unsigned long ioaddr, u16 hacr)
-{
- hacr &= ~HACR_16BITS;
- hacr_write(ioaddr, hacr);
-} /* wv_16_off */
-
-/*------------------------------------------------------------------*/
-/*
- * Set the I/O transfer over the ISA bus to 8-bit mode
- */
-static inline void wv_16_on(unsigned long ioaddr, u16 hacr)
-{
- hacr |= HACR_16BITS;
- hacr_write(ioaddr, hacr);
-} /* wv_16_on */
-
-/*------------------------------------------------------------------*/
-/*
- * Disable interrupts on the WaveLAN hardware.
- * (called by wv_82586_stop())
- */
-static inline void wv_ints_off(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
-
- lp->hacr &= ~HACR_INTRON;
- hacr_write(ioaddr, lp->hacr);
-} /* wv_ints_off */
-
-/*------------------------------------------------------------------*/
-/*
- * Enable interrupts on the WaveLAN hardware.
- * (called by wv_hw_reset())
- */
-static inline void wv_ints_on(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
-
- lp->hacr |= HACR_INTRON;
- hacr_write(ioaddr, lp->hacr);
-} /* wv_ints_on */
-
-/******************* MODEM MANAGEMENT SUBROUTINES *******************/
-/*
- * Useful subroutines to manage the modem of the WaveLAN
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Read the Parameter Storage Area from the WaveLAN card's memory
- */
-/*
- * Read bytes from the PSA.
- */
-static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */
- u8 * b, /* buffer to fill */
- int n)
-{ /* size to read */
- wv_16_off(ioaddr, hacr);
-
- while (n-- > 0) {
- outw(o, PIOR2(ioaddr));
- o++;
- *b++ = inb(PIOP2(ioaddr));
- }
-
- wv_16_on(ioaddr, hacr);
-} /* psa_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Write the Parameter Storage Area to the WaveLAN card's memory.
- */
-static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */
- u8 * b, /* Buffer in memory */
- int n)
-{ /* Length of buffer */
- int count = 0;
-
- wv_16_off(ioaddr, hacr);
-
- while (n-- > 0) {
- outw(o, PIOR2(ioaddr));
- o++;
-
- outb(*b, PIOP2(ioaddr));
- b++;
-
- /* Wait for the memory to finish its write cycle */
- count = 0;
- while ((count++ < 100) &&
- (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1);
- }
-
- wv_16_on(ioaddr, hacr);
-} /* psa_write */
-
-#ifdef SET_PSA_CRC
-/*------------------------------------------------------------------*/
-/*
- * Calculate the PSA CRC
- * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
- * NOTE: By specifying a length including the CRC position the
- * returned value should be zero. (i.e. a correct checksum in the PSA)
- *
- * The Windows drivers don't use the CRC, but the AP and the PtP tool
- * depend on it.
- */
-static u16 psa_crc(u8 * psa, /* The PSA */
- int size)
-{ /* Number of short for CRC */
- int byte_cnt; /* Loop on the PSA */
- u16 crc_bytes = 0; /* Data in the PSA */
- int bit_cnt; /* Loop on the bits of the short */
-
- for (byte_cnt = 0; byte_cnt < size; byte_cnt++) {
- crc_bytes ^= psa[byte_cnt]; /* Its an xor */
-
- for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) {
- if (crc_bytes & 0x0001)
- crc_bytes = (crc_bytes >> 1) ^ 0xA001;
- else
- crc_bytes >>= 1;
- }
- }
-
- return crc_bytes;
-} /* psa_crc */
-#endif /* SET_PSA_CRC */
-
-/*------------------------------------------------------------------*/
-/*
- * update the checksum field in the Wavelan's PSA
- */
-static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr)
-{
-#ifdef SET_PSA_CRC
- psa_t psa;
- u16 crc;
-
- /* read the parameter storage area */
- psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa));
-
- /* update the checksum */
- crc = psa_crc((unsigned char *) &psa,
- sizeof(psa) - sizeof(psa.psa_crc[0]) -
- sizeof(psa.psa_crc[1])
- - sizeof(psa.psa_crc_status));
-
- psa.psa_crc[0] = crc & 0xFF;
- psa.psa_crc[1] = (crc & 0xFF00) >> 8;
-
- /* Write it ! */
- psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa,
- (unsigned char *) &psa.psa_crc, 2);
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
- dev->name, psa.psa_crc[0], psa.psa_crc[1]);
-
- /* Check again (luxury !) */
- crc = psa_crc((unsigned char *) &psa,
- sizeof(psa) - sizeof(psa.psa_crc_status));
-
- if (crc != 0)
- printk(KERN_WARNING
- "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n",
- dev->name);
-#endif /* DEBUG_IOCTL_INFO */
-#endif /* SET_PSA_CRC */
-} /* update_psa_checksum */
-
-/*------------------------------------------------------------------*/
-/*
- * Write 1 byte to the MMC.
- */
-static void mmc_out(unsigned long ioaddr, u16 o, u8 d)
-{
- int count = 0;
-
- /* Wait for MMC to go idle */
- while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
- udelay(10);
-
- outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr));
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to write bytes to the Modem Management Controller.
- * We start at the end because it is the way it should be!
- */
-static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n)
-{
- o += n;
- b += n;
-
- while (n-- > 0)
- mmc_out(ioaddr, --o, *(--b));
-} /* mmc_write */
-
-/*------------------------------------------------------------------*/
-/*
- * Read a byte from the MMC.
- * Optimised version for 1 byte, avoid using memory.
- */
-static u8 mmc_in(unsigned long ioaddr, u16 o)
-{
- int count = 0;
-
- while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
- udelay(10);
- outw(o << 1, MMCR(ioaddr));
-
- while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
- udelay(10);
- return (u8) (inw(MMCR(ioaddr)) >> 8);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to read bytes from the Modem Management Controller.
- * The implementation is complicated by a lack of address lines,
- * which prevents decoding of the low-order bit.
- * (code has just been moved in the above function)
- * We start at the end because it is the way it should be!
- */
-static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n)
-{
- o += n;
- b += n;
-
- while (n-- > 0)
- *(--b) = mmc_in(ioaddr, --o);
-} /* mmc_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Get the type of encryption available.
- */
-static inline int mmc_encr(unsigned long ioaddr)
-{ /* I/O port of the card */
- int temp;
-
- temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail));
- if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
- return 0;
- else
- return temp;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wait for the frequency EEPROM to complete a command.
- * I hope this one will be optimally inlined.
- */
-static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */
- int delay, /* Base delay to wait for */
- int number)
-{ /* Number of time to wait */
- int count = 0; /* Wait only a limited time */
-
- while ((count++ < number) &&
- (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- MMR_FEE_STATUS_BUSY)) udelay(delay);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Read bytes from the Frequency EEPROM (frequency select cards).
- */
-static void fee_read(unsigned long ioaddr, /* I/O port of the card */
- u16 o, /* destination offset */
- u16 * b, /* data buffer */
- int n)
-{ /* number of registers */
- b += n; /* Position at the end of the area */
-
- /* Write the address */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
-
- /* Loop on all buffer */
- while (n-- > 0) {
- /* Write the read command */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_READ);
-
- /* Wait until EEPROM is ready (should be quick). */
- fee_wait(ioaddr, 10, 100);
-
- /* Read the value. */
- *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) |
- mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
- }
-}
-
-
-/*------------------------------------------------------------------*/
-/*
- * Write bytes from the Frequency EEPROM (frequency select cards).
- * This is a bit complicated, because the frequency EEPROM has to
- * be unprotected and the write enabled.
- * Jean II
- */
-static void fee_write(unsigned long ioaddr, /* I/O port of the card */
- u16 o, /* destination offset */
- u16 * b, /* data buffer */
- int n)
-{ /* number of registers */
- b += n; /* Position at the end of the area. */
-
-#ifdef EEPROM_IS_PROTECTED /* disabled */
-#ifdef DOESNT_SEEM_TO_WORK /* disabled */
- /* Ask to read the protected register */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
-
- fee_wait(ioaddr, 10, 100);
-
- /* Read the protected register. */
- printk("Protected 2: %02X-%02X\n",
- mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)),
- mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
-#endif /* DOESNT_SEEM_TO_WORK */
-
- /* Enable protected register. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
-
- fee_wait(ioaddr, 10, 100);
-
- /* Unprotect area. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
-#ifdef DOESNT_SEEM_TO_WORK /* disabled */
- /* or use: */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
-#endif /* DOESNT_SEEM_TO_WORK */
-
- fee_wait(ioaddr, 10, 100);
-#endif /* EEPROM_IS_PROTECTED */
-
- /* Write enable. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
-
- fee_wait(ioaddr, 10, 100);
-
- /* Write the EEPROM address. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
-
- /* Loop on all buffer */
- while (n-- > 0) {
- /* Write the value. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
-
- /* Write the write command. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_WRITE);
-
- /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */
- mdelay(10);
- fee_wait(ioaddr, 10, 100);
- }
-
- /* Write disable. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
-
- fee_wait(ioaddr, 10, 100);
-
-#ifdef EEPROM_IS_PROTECTED /* disabled */
- /* Reprotect EEPROM. */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
-
- fee_wait(ioaddr, 10, 100);
-#endif /* EEPROM_IS_PROTECTED */
-}
-
-/************************ I82586 SUBROUTINES *************************/
-/*
- * Useful subroutines to manage the Ethernet controller
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Read bytes from the on-board RAM.
- * Why does inlining this function make it fail?
- */
-static /*inline */ void obram_read(unsigned long ioaddr,
- u16 o, u8 * b, int n)
-{
- outw(o, PIOR1(ioaddr));
- insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Write bytes to the on-board RAM.
- */
-static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n)
-{
- outw(o, PIOR1(ioaddr));
- outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Acknowledge the reading of the status issued by the i82586.
- */
-static void wv_ack(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- u16 scb_cs;
- int i;
-
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
- scb_cs &= SCB_ST_INT;
-
- if (scb_cs == 0)
- return;
-
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
-
- set_chan_attn(ioaddr, lp->hacr);
-
- for (i = 1000; i > 0; i--) {
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
- if (scb_cs == 0)
- break;
-
- udelay(10);
- }
- udelay(100);
-
-#ifdef DEBUG_CONFIG_ERROR
- if (i <= 0)
- printk(KERN_INFO
- "%s: wv_ack(): board not accepting command.\n",
- dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Set channel attention bit and busy wait until command has
- * completed, then acknowledge completion of the command.
- */
-static int wv_synchronous_cmd(struct net_device * dev, const char *str)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- u16 scb_cmd;
- ach_t cb;
- int i;
-
- scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cmd, sizeof(scb_cmd));
-
- set_chan_attn(ioaddr, lp->hacr);
-
- for (i = 1000; i > 0; i--) {
- obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb,
- sizeof(cb));
- if (cb.ac_status & AC_SFLD_C)
- break;
-
- udelay(10);
- }
- udelay(100);
-
- if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO "%s: %s failed; status = 0x%x\n",
- dev->name, str, cb.ac_status);
-#endif
-#ifdef DEBUG_I82586_SHOW
- wv_scb_show(ioaddr);
-#endif
- return -1;
- }
-
- /* Ack the status */
- wv_ack(dev);
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Configuration commands completion interrupt.
- * Check if done, and if OK.
- */
-static int
-wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
-{
- unsigned short mcs_addr;
- unsigned short status;
- int ret;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name);
-#endif
-
- mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t)
- + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t);
-
- /* Read the status of the last command (set mc list). */
- obram_read(ioaddr, acoff(mcs_addr, ac_status),
- (unsigned char *) &status, sizeof(status));
-
- /* If not completed -> exit */
- if ((status & AC_SFLD_C) == 0)
- ret = 0; /* Not ready to be scrapped */
- else {
-#ifdef DEBUG_CONFIG_ERROR
- unsigned short cfg_addr;
- unsigned short ias_addr;
-
- /* Check mc_config command */
- if ((status & AC_SFLD_OK) != AC_SFLD_OK)
- printk(KERN_INFO
- "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n",
- dev->name, status);
-
- /* check ia-config command */
- ias_addr = mcs_addr - sizeof(ac_ias_t);
- obram_read(ioaddr, acoff(ias_addr, ac_status),
- (unsigned char *) &status, sizeof(status));
- if ((status & AC_SFLD_OK) != AC_SFLD_OK)
- printk(KERN_INFO
- "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n",
- dev->name, status);
-
- /* Check config command. */
- cfg_addr = ias_addr - sizeof(ac_cfg_t);
- obram_read(ioaddr, acoff(cfg_addr, ac_status),
- (unsigned char *) &status, sizeof(status));
- if ((status & AC_SFLD_OK) != AC_SFLD_OK)
- printk(KERN_INFO
- "%s: wv_config_complete(): configure failed; status = 0x%x\n",
- dev->name, status);
-#endif /* DEBUG_CONFIG_ERROR */
-
- ret = 1; /* Ready to be scrapped */
- }
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name,
- ret);
-#endif
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Command completion interrupt.
- * Reclaim as many freed tx buffers as we can.
- * (called in wavelan_interrupt()).
- * Note : the spinlock is already grabbed for us.
- */
-static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
-{
- int nreaped = 0;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name);
-#endif
-
- /* Loop on all the transmit buffers */
- while (lp->tx_first_in_use != I82586NULL) {
- unsigned short tx_status;
-
- /* Read the first transmit buffer */
- obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status),
- (unsigned char *) &tx_status,
- sizeof(tx_status));
-
- /* If not completed -> exit */
- if ((tx_status & AC_SFLD_C) == 0)
- break;
-
- /* Hack for reconfiguration */
- if (tx_status == 0xFFFF)
- if (!wv_config_complete(dev, ioaddr, lp))
- break; /* Not completed */
-
- /* We now remove this buffer */
- nreaped++;
- --lp->tx_n_in_use;
-
-/*
-if (lp->tx_n_in_use > 0)
- printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]);
-*/
-
- /* Was it the last one? */
- if (lp->tx_n_in_use <= 0)
- lp->tx_first_in_use = I82586NULL;
- else {
- /* Next one in the chain */
- lp->tx_first_in_use += TXBLOCKZ;
- if (lp->tx_first_in_use >=
- OFFSET_CU +
- NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -=
- NTXBLOCKS * TXBLOCKZ;
- }
-
- /* Hack for reconfiguration */
- if (tx_status == 0xFFFF)
- continue;
-
- /* Now, check status of the finished command */
- if (tx_status & AC_SFLD_OK) {
- int ncollisions;
-
- dev->stats.tx_packets++;
- ncollisions = tx_status & AC_SFLD_MAXCOL;
- dev->stats.collisions += ncollisions;
-#ifdef DEBUG_TX_INFO
- if (ncollisions > 0)
- printk(KERN_DEBUG
- "%s: wv_complete(): tx completed after %d collisions.\n",
- dev->name, ncollisions);
-#endif
- } else {
- dev->stats.tx_errors++;
- if (tx_status & AC_SFLD_S10) {
- dev->stats.tx_carrier_errors++;
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG
- "%s: wv_complete(): tx error: no CS.\n",
- dev->name);
-#endif
- }
- if (tx_status & AC_SFLD_S9) {
- dev->stats.tx_carrier_errors++;
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG
- "%s: wv_complete(): tx error: lost CTS.\n",
- dev->name);
-#endif
- }
- if (tx_status & AC_SFLD_S8) {
- dev->stats.tx_fifo_errors++;
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG
- "%s: wv_complete(): tx error: slow DMA.\n",
- dev->name);
-#endif
- }
- if (tx_status & AC_SFLD_S6) {
- dev->stats.tx_heartbeat_errors++;
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG
- "%s: wv_complete(): tx error: heart beat.\n",
- dev->name);
-#endif
- }
- if (tx_status & AC_SFLD_S5) {
- dev->stats.tx_aborted_errors++;
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG
- "%s: wv_complete(): tx error: too many collisions.\n",
- dev->name);
-#endif
- }
- }
-
-#ifdef DEBUG_TX_INFO
- printk(KERN_DEBUG
- "%s: wv_complete(): tx completed, tx_status 0x%04x\n",
- dev->name, tx_status);
-#endif
- }
-
-#ifdef DEBUG_INTERRUPT_INFO
- if (nreaped > 1)
- printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n",
- dev->name, nreaped);
-#endif
-
- /*
- * Inform upper layers.
- */
- if (lp->tx_n_in_use < NTXBLOCKS - 1) {
- netif_wake_queue(dev);
- }
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name);
-#endif
- return nreaped;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Reconfigure the i82586, or at least ask for it.
- * Because wv_82586_config uses a transmission buffer, we must do it
- * when we are sure that there is one left, so we do it now
- * or in wavelan_packet_xmit() (I can't find any better place,
- * wavelan_interrupt is not an option), so you may experience
- * delays sometimes.
- */
-static void wv_82586_reconfig(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
-
- /* Arm the flag, will be cleard in wv_82586_config() */
- lp->reconfig_82586 = 1;
-
- /* Check if we can do it now ! */
- if((netif_running(dev)) && !(netif_queue_stopped(dev))) {
- spin_lock_irqsave(&lp->spinlock, flags);
- /* May fail */
- wv_82586_config(dev);
- spin_unlock_irqrestore(&lp->spinlock, flags);
- }
- else {
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG
- "%s: wv_82586_reconfig(): delayed (state = %lX)\n",
- dev->name, dev->state);
-#endif
- }
-}
-
-/********************* DEBUG & INFO SUBROUTINES *********************/
-/*
- * This routine is used in the code to show information for debugging.
- * Most of the time, it dumps the contents of hardware structures.
- */
-
-#ifdef DEBUG_PSA_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted contents of the Parameter Storage Area.
- */
-static void wv_psa_show(psa_t * p)
-{
- printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n");
- printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
- p->psa_io_base_addr_1,
- p->psa_io_base_addr_2,
- p->psa_io_base_addr_3, p->psa_io_base_addr_4);
- printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
- p->psa_rem_boot_addr_1,
- p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3);
- printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
- printk("psa_int_req_no: %d\n", p->psa_int_req_no);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
- printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
- printk(KERN_DEBUG "psa_univ_local_sel: %d, ",
- p->psa_univ_local_sel);
- printk("psa_comp_number: %d, ", p->psa_comp_number);
- printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
- printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
- p->psa_feature_select);
- printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
- printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
- printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
- printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0],
- p->psa_nwid[1]);
- printk("psa_nwid_select: %d\n", p->psa_nwid_select);
- printk(KERN_DEBUG "psa_encryption_select: %d, ",
- p->psa_encryption_select);
- printk
- ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
- p->psa_encryption_key[0], p->psa_encryption_key[1],
- p->psa_encryption_key[2], p->psa_encryption_key[3],
- p->psa_encryption_key[4], p->psa_encryption_key[5],
- p->psa_encryption_key[6], p->psa_encryption_key[7]);
- printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
- printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
- p->psa_call_code[0]);
- printk
- ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
- p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2],
- p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5],
- p->psa_call_code[6], p->psa_call_code[7]);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
- p->psa_reserved[0],
- p->psa_reserved[1]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
- printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
- printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
-} /* wv_psa_show */
-#endif /* DEBUG_PSA_SHOW */
-
-#ifdef DEBUG_MMC_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the Modem Management Controller.
- * This function needs to be completed.
- */
-static void wv_mmc_show(struct net_device * dev)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- mmr_t m;
-
- /* Basic check */
- if (hasr_read(ioaddr) & HASR_NO_CLK) {
- printk(KERN_WARNING
- "%s: wv_mmc_show: modem not connected\n",
- dev->name);
- return;
- }
-
- /* Read the mmc */
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
- mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m));
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
-
- /* Don't forget to update statistics */
- lp->wstats.discard.nwid +=
- (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
-
- printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n");
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG
- "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
- m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2],
- m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5],
- m.mmr_unused0[6], m.mmr_unused0[7]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
- m.mmr_des_avail, m.mmr_des_status);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
- m.mmr_unused1[0],
- m.mmr_unused1[1],
- m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
- m.mmr_dce_status,
- (m.
- mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ?
- "energy detected," : "",
- (m.
- mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
- "loop test indicated," : "",
- (m.
- mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ?
- "transmitter on," : "",
- (m.
- mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
- "jabber timer expired," : "");
- printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
- m.mmr_unused2[0], m.mmr_unused2[1]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
- (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
- (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
- printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
- m.mmr_thr_pre_set & MMR_THR_PRE_SET,
- (m.
- mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" :
- "below");
- printk(KERN_DEBUG "signal_lvl: %d [%s], ",
- m.mmr_signal_lvl & MMR_SIGNAL_LVL,
- (m.
- mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" :
- "no new msg");
- printk("silence_lvl: %d [%s], ",
- m.mmr_silence_lvl & MMR_SILENCE_LVL,
- (m.
- mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" :
- "no new update");
- printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
- (m.
- mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" :
- "Antenna 0");
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
-#endif /* DEBUG_SHOW_UNUSED */
-} /* wv_mmc_show */
-#endif /* DEBUG_MMC_SHOW */
-
-#ifdef DEBUG_I82586_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the last block of the i82586 memory.
- */
-static void wv_scb_show(unsigned long ioaddr)
-{
- scb_t scb;
-
- obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
- sizeof(scb));
-
- printk(KERN_DEBUG "##### WaveLAN system control block: #####\n");
-
- printk(KERN_DEBUG "status: ");
- printk("stat 0x%x[%s%s%s%s] ",
- (scb.
- scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA |
- SCB_ST_RNR)) >> 12,
- (scb.
- scb_status & SCB_ST_CX) ? "command completion interrupt," :
- "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
- (scb.
- scb_status & SCB_ST_CNA) ? "command unit not active," : "",
- (scb.
- scb_status & SCB_ST_RNR) ? "receiving unit not ready," :
- "");
- printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8,
- ((scb.scb_status & SCB_ST_CUS) ==
- SCB_ST_CUS_IDLE) ? "idle" : "",
- ((scb.scb_status & SCB_ST_CUS) ==
- SCB_ST_CUS_SUSP) ? "suspended" : "",
- ((scb.scb_status & SCB_ST_CUS) ==
- SCB_ST_CUS_ACTV) ? "active" : "");
- printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4,
- ((scb.scb_status & SCB_ST_RUS) ==
- SCB_ST_RUS_IDLE) ? "idle" : "",
- ((scb.scb_status & SCB_ST_RUS) ==
- SCB_ST_RUS_SUSP) ? "suspended" : "",
- ((scb.scb_status & SCB_ST_RUS) ==
- SCB_ST_RUS_NRES) ? "no resources" : "",
- ((scb.scb_status & SCB_ST_RUS) ==
- SCB_ST_RUS_RDY) ? "ready" : "");
-
- printk(KERN_DEBUG "command: ");
- printk("ack 0x%x[%s%s%s%s] ",
- (scb.
- scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR |
- SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
- (scb.
- scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
- (scb.
- scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
- (scb.
- scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
- (scb.
- scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : "");
- printk("cuc 0x%x[%s%s%s%s%s] ",
- (scb.scb_command & SCB_CMD_CUC) >> 8,
- ((scb.scb_command & SCB_CMD_CUC) ==
- SCB_CMD_CUC_NOP) ? "nop" : "",
- ((scb.scb_command & SCB_CMD_CUC) ==
- SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
- ((scb.scb_command & SCB_CMD_CUC) ==
- SCB_CMD_CUC_RES) ? "resume execution" : "",
- ((scb.scb_command & SCB_CMD_CUC) ==
- SCB_CMD_CUC_SUS) ? "suspend execution" : "",
- ((scb.scb_command & SCB_CMD_CUC) ==
- SCB_CMD_CUC_ABT) ? "abort execution" : "");
- printk("ruc 0x%x[%s%s%s%s%s]\n",
- (scb.scb_command & SCB_CMD_RUC) >> 4,
- ((scb.scb_command & SCB_CMD_RUC) ==
- SCB_CMD_RUC_NOP) ? "nop" : "",
- ((scb.scb_command & SCB_CMD_RUC) ==
- SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
- ((scb.scb_command & SCB_CMD_RUC) ==
- SCB_CMD_RUC_RES) ? "resume reception" : "",
- ((scb.scb_command & SCB_CMD_RUC) ==
- SCB_CMD_RUC_SUS) ? "suspend reception" : "",
- ((scb.scb_command & SCB_CMD_RUC) ==
- SCB_CMD_RUC_ABT) ? "abort reception" : "");
-
- printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset);
- printk("rfa_offset 0x%x\n", scb.scb_rfa_offset);
-
- printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs);
- printk("alnerrs %d ", scb.scb_alnerrs);
- printk("rscerrs %d ", scb.scb_rscerrs);
- printk("ovrnerrs %d\n", scb.scb_ovrnerrs);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the i82586's receive unit.
- */
-static void wv_ru_show(struct net_device * dev)
-{
- printk(KERN_DEBUG
- "##### WaveLAN i82586 receiver unit status: #####\n");
- printk(KERN_DEBUG "ru:");
- /*
- * Not implemented yet
- */
- printk("\n");
-} /* wv_ru_show */
-
-/*------------------------------------------------------------------*/
-/*
- * Display info about one control block of the i82586 memory.
- */
-static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p)
-{
- unsigned long ioaddr;
- ac_tx_t actx;
-
- ioaddr = dev->base_addr;
-
- printk("%d: 0x%x:", i, p);
-
- obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx));
- printk(" status=0x%x,", actx.tx_h.ac_status);
- printk(" command=0x%x,", actx.tx_h.ac_command);
-
- /*
- {
- tbd_t tbd;
-
- obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd));
- printk(" tbd_status=0x%x,", tbd.tbd_status);
- }
- */
-
- printk("|");
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Print status of the command unit of the i82586.
- */
-static void wv_cu_show(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned int i;
- u16 p;
-
- printk(KERN_DEBUG
- "##### WaveLAN i82586 command unit status: #####\n");
-
- printk(KERN_DEBUG);
- for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) {
- wv_cu_show_one(dev, lp, i, p);
-
- p += TXBLOCKZ;
- if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
- p -= NTXBLOCKS * TXBLOCKZ;
- }
- printk("\n");
-}
-#endif /* DEBUG_I82586_SHOW */
-
-#ifdef DEBUG_DEVICE_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the WaveLAN PCMCIA device driver.
- */
-static void wv_dev_show(struct net_device * dev)
-{
- printk(KERN_DEBUG "dev:");
- printk(" state=%lX,", dev->state);
- printk(" trans_start=%ld,", dev->trans_start);
- printk(" flags=0x%x,", dev->flags);
- printk("\n");
-} /* wv_dev_show */
-
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the WaveLAN PCMCIA device driver's
- * private information.
- */
-static void wv_local_show(struct net_device * dev)
-{
- net_local *lp;
-
- lp = netdev_priv(dev);
-
- printk(KERN_DEBUG "local:");
- printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
- printk(" hacr=0x%x,", lp->hacr);
- printk(" rx_head=0x%x,", lp->rx_head);
- printk(" rx_last=0x%x,", lp->rx_last);
- printk(" tx_first_free=0x%x,", lp->tx_first_free);
- printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
- printk("\n");
-} /* wv_local_show */
-#endif /* DEBUG_DEVICE_SHOW */
-
-#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
-/*------------------------------------------------------------------*/
-/*
- * Dump packet header (and content if necessary) on the screen
- */
-static inline void wv_packet_info(u8 * p, /* Packet to dump */
- int length, /* Length of the packet */
- char *msg1, /* Name of the device */
- char *msg2)
-{ /* Name of the function */
- int i;
- int maxi;
-
- printk(KERN_DEBUG
- "%s: %s(): dest %pM, length %d\n",
- msg1, msg2, p, length);
- printk(KERN_DEBUG
- "%s: %s(): src %pM, type 0x%02X%02X\n",
- msg1, msg2, &p[6], p[12], p[13]);
-
-#ifdef DEBUG_PACKET_DUMP
-
- printk(KERN_DEBUG "data=\"");
-
- if ((maxi = length) > DEBUG_PACKET_DUMP)
- maxi = DEBUG_PACKET_DUMP;
- for (i = 14; i < maxi; i++)
- if (p[i] >= ' ' && p[i] <= '~')
- printk(" %c", p[i]);
- else
- printk("%02X", p[i]);
- if (maxi < length)
- printk("..");
- printk("\"\n");
- printk(KERN_DEBUG "\n");
-#endif /* DEBUG_PACKET_DUMP */
-}
-#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
-
-/*------------------------------------------------------------------*/
-/*
- * This is the information which is displayed by the driver at startup.
- * There are lots of flags for configuring it to your liking.
- */
-static void wv_init_info(struct net_device * dev)
-{
- short ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
-
- /* Read the parameter storage area */
- psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
-
-#ifdef DEBUG_PSA_SHOW
- wv_psa_show(&psa);
-#endif
-#ifdef DEBUG_MMC_SHOW
- wv_mmc_show(dev);
-#endif
-#ifdef DEBUG_I82586_SHOW
- wv_cu_show(dev);
-#endif
-
-#ifdef DEBUG_BASIC_SHOW
- /* Now, let's go for the basic stuff. */
- printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d",
- dev->name, ioaddr, dev->dev_addr, dev->irq);
-
- /* Print current network ID. */
- if (psa.psa_nwid_select)
- printk(", nwid 0x%02X-%02X", psa.psa_nwid[0],
- psa.psa_nwid[1]);
- else
- printk(", nwid off");
-
- /* If 2.00 card */
- if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- unsigned short freq;
-
- /* Ask the EEPROM to read the frequency from the first area. */
- fee_read(ioaddr, 0x00, &freq, 1);
-
- /* Print frequency */
- printk(", 2.00, %ld", (freq >> 6) + 2400L);
-
- /* Hack! */
- if (freq & 0x20)
- printk(".5");
- } else {
- printk(", PC");
- switch (psa.psa_comp_number) {
- case PSA_COMP_PC_AT_915:
- case PSA_COMP_PC_AT_2400:
- printk("-AT");
- break;
- case PSA_COMP_PC_MC_915:
- case PSA_COMP_PC_MC_2400:
- printk("-MC");
- break;
- case PSA_COMP_PCMCIA_915:
- printk("MCIA");
- break;
- default:
- printk("?");
- }
- printk(", ");
- switch (psa.psa_subband) {
- case PSA_SUBBAND_915:
- printk("915");
- break;
- case PSA_SUBBAND_2425:
- printk("2425");
- break;
- case PSA_SUBBAND_2460:
- printk("2460");
- break;
- case PSA_SUBBAND_2484:
- printk("2484");
- break;
- case PSA_SUBBAND_2430_5:
- printk("2430.5");
- break;
- default:
- printk("?");
- }
- }
-
- printk(" MHz\n");
-#endif /* DEBUG_BASIC_SHOW */
-
-#ifdef DEBUG_VERSION_SHOW
- /* Print version information */
- printk(KERN_NOTICE "%s", version);
-#endif
-} /* wv_init_info */
-
-/********************* IOCTL, STATS & RECONFIG *********************/
-/*
- * We found here routines that are called by Linux on different
- * occasions after the configuration and not for transmitting data
- * These may be called when the user use ifconfig, /proc/net/dev
- * or wireless extensions
- */
-
-
-/*------------------------------------------------------------------*/
-/*
- * Set or clear the multicast filter for this adaptor.
- * num_addrs == -1 Promiscuous mode, receive all packets
- * num_addrs == 0 Normal mode, clear multicast list
- * num_addrs > 0 Multicast mode, receive normal and MC packets,
- * and do best-effort filtering.
- */
-static void wavelan_set_multicast_list(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n",
- dev->name);
-#endif
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG
- "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
- dev->name, dev->flags, dev->mc_count);
-#endif
-
- /* Are we asking for promiscuous mode,
- * or all multicast addresses (we don't have that!)
- * or too many multicast addresses for the hardware filter? */
- if ((dev->flags & IFF_PROMISC) ||
- (dev->flags & IFF_ALLMULTI) ||
- (dev->mc_count > I82586_MAX_MULTICAST_ADDRESSES)) {
- /*
- * Enable promiscuous mode: receive all packets.
- */
- if (!lp->promiscuous) {
- lp->promiscuous = 1;
- lp->mc_count = 0;
-
- wv_82586_reconfig(dev);
- }
- } else
- /* Are there multicast addresses to send? */
- if (dev->mc_list != (struct dev_mc_list *) NULL) {
- /*
- * Disable promiscuous mode, but receive all packets
- * in multicast list
- */
-#ifdef MULTICAST_AVOID
- if (lp->promiscuous || (dev->mc_count != lp->mc_count))
-#endif
- {
- lp->promiscuous = 0;
- lp->mc_count = dev->mc_count;
-
- wv_82586_reconfig(dev);
- }
- } else {
- /*
- * Switch to normal mode: disable promiscuous mode and
- * clear the multicast list.
- */
- if (lp->promiscuous || lp->mc_count == 0) {
- lp->promiscuous = 0;
- lp->mc_count = 0;
-
- wv_82586_reconfig(dev);
- }
- }
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n",
- dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This function doesn't exist.
- * (Note : it was a nice way to test the reconfigure stuff...)
- */
-#ifdef SET_MAC_ADDRESS
-static int wavelan_set_mac_address(struct net_device * dev, void *addr)
-{
- struct sockaddr *mac = addr;
-
- /* Copy the address. */
- memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
-
- /* Reconfigure the beast. */
- wv_82586_reconfig(dev);
-
- return 0;
-}
-#endif /* SET_MAC_ADDRESS */
-
-
-/*------------------------------------------------------------------*/
-/*
- * Frequency setting (for hardware capable of it)
- * It's a bit complicated and you don't really want to look into it.
- * (called in wavelan_ioctl)
- */
-static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */
- iw_freq * frequency)
-{
- const int BAND_NUM = 10; /* Number of bands */
- long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
-#ifdef DEBUG_IOCTL_INFO
- int i;
-#endif
-
- /* Setting by frequency */
- /* Theoretically, you may set any frequency between
- * the two limits with a 0.5 MHz precision. In practice,
- * I don't want you to have trouble with local regulations.
- */
- if ((frequency->e == 1) &&
- (frequency->m >= (int) 2.412e8)
- && (frequency->m <= (int) 2.487e8)) {
- freq = ((frequency->m / 10000) - 24000L) / 5;
- }
-
- /* Setting by channel (same as wfreqsel) */
- /* Warning: each channel is 22 MHz wide, so some of the channels
- * will interfere. */
- if ((frequency->e == 0) && (frequency->m < BAND_NUM)) {
- /* Get frequency offset. */
- freq = channel_bands[frequency->m] >> 1;
- }
-
- /* Verify that the frequency is allowed. */
- if (freq != 0L) {
- u16 table[10]; /* Authorized frequency table */
-
- /* Read the frequency table. */
- fee_read(ioaddr, 0x71, table, 10);
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "Frequency table: ");
- for (i = 0; i < 10; i++) {
- printk(" %04X", table[i]);
- }
- printk("\n");
-#endif
-
- /* Look in the table to see whether the frequency is allowed. */
- if (!(table[9 - ((freq - 24) / 16)] &
- (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */
- } else
- return -EINVAL;
-
- /* if we get a usable frequency */
- if (freq != 0L) {
- unsigned short area[16];
- unsigned short dac[2];
- unsigned short area_verify[16];
- unsigned short dac_verify[2];
- /* Corresponding gain (in the power adjust value table)
- * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8
- * and WCIN062D.DOC, page 6.2.9. */
- unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
- int power_band = 0; /* Selected band */
- unsigned short power_adjust; /* Correct value */
-
- /* Search for the gain. */
- power_band = 0;
- while ((freq > power_limit[power_band]) &&
- (power_limit[++power_band] != 0));
-
- /* Read the first area. */
- fee_read(ioaddr, 0x00, area, 16);
-
- /* Read the DAC. */
- fee_read(ioaddr, 0x60, dac, 2);
-
- /* Read the new power adjust value. */
- fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust,
- 1);
- if (power_band & 0x1)
- power_adjust >>= 8;
- else
- power_adjust &= 0xFF;
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
- for (i = 0; i < 16; i++) {
- printk(" %04X", area[i]);
- }
- printk("\n");
-
- printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
- dac[0], dac[1]);
-#endif
-
- /* Frequency offset (for info only) */
- area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
-
- /* Receiver Principle main divider coefficient */
- area[3] = (freq >> 1) + 2400L - 352L;
- area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
-
- /* Transmitter Main divider coefficient */
- area[13] = (freq >> 1) + 2400L;
- area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
-
- /* Other parts of the area are flags, bit streams or unused. */
-
- /* Set the value in the DAC. */
- dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
- dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
-
- /* Write the first area. */
- fee_write(ioaddr, 0x00, area, 16);
-
- /* Write the DAC. */
- fee_write(ioaddr, 0x60, dac, 2);
-
- /* We now should verify here that the writing of the EEPROM went OK. */
-
- /* Reread the first area. */
- fee_read(ioaddr, 0x00, area_verify, 16);
-
- /* Reread the DAC. */
- fee_read(ioaddr, 0x60, dac_verify, 2);
-
- /* Compare. */
- if (memcmp(area, area_verify, 16 * 2) ||
- memcmp(dac, dac_verify, 2 * 2)) {
-#ifdef DEBUG_IOCTL_ERROR
- printk(KERN_INFO
- "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n");
-#endif
- return -EOPNOTSUPP;
- }
-
- /* We must download the frequency parameters to the
- * synthesizers (from the EEPROM - area 1)
- * Note: as the EEPROM is automatically decremented, we set the end
- * if the area... */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
-
- /* Wait until the download is finished. */
- fee_wait(ioaddr, 100, 100);
-
- /* We must now download the power adjust value (gain) to
- * the synthesizers (from the EEPROM - area 7 - DAC). */
- mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61);
- mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
-
- /* Wait for the download to finish. */
- fee_wait(ioaddr, 100, 100);
-
-#ifdef DEBUG_IOCTL_INFO
- /* Verification of what we have done */
-
- printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
- for (i = 0; i < 16; i++) {
- printk(" %04X", area_verify[i]);
- }
- printk("\n");
-
- printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
- dac_verify[0], dac_verify[1]);
-#endif
-
- return 0;
- } else
- return -EINVAL; /* Bah, never get there... */
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Give the list of available frequencies.
- */
-static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */
- iw_freq * list, /* List of frequencies to fill */
- int max)
-{ /* Maximum number of frequencies */
- u16 table[10]; /* Authorized frequency table */
- long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
- int i; /* index in the table */
- int c = 0; /* Channel number */
-
- /* Read the frequency table. */
- fee_read(ioaddr, 0x71 /* frequency table */ , table, 10);
-
- /* Check all frequencies. */
- i = 0;
- for (freq = 0; freq < 150; freq++)
- /* Look in the table if the frequency is allowed */
- if (table[9 - (freq / 16)] & (1 << (freq % 16))) {
- /* Compute approximate channel number */
- while ((c < ARRAY_SIZE(channel_bands)) &&
- (((channel_bands[c] >> 1) - 24) < freq))
- c++;
- list[i].i = c; /* Set the list index */
-
- /* put in the list */
- list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
- list[i++].e = 1;
-
- /* Check number. */
- if (i >= max)
- return (i);
- }
-
- return (i);
-}
-
-#ifdef IW_WIRELESS_SPY
-/*------------------------------------------------------------------*/
-/*
- * Gather wireless spy statistics: for each packet, compare the source
- * address with our list, and if they match, get the statistics.
- * Sorry, but this function really needs the wireless extensions.
- */
-static inline void wl_spy_gather(struct net_device * dev,
- u8 * mac, /* MAC address */
- u8 * stats) /* Statistics to gather */
-{
- struct iw_quality wstats;
-
- wstats.qual = stats[2] & MMR_SGNL_QUAL;
- wstats.level = stats[0] & MMR_SIGNAL_LVL;
- wstats.noise = stats[1] & MMR_SILENCE_LVL;
- wstats.updated = 0x7;
-
- /* Update spy records */
- wireless_spy_update(dev, mac, &wstats);
-}
-#endif /* IW_WIRELESS_SPY */
-
-#ifdef HISTOGRAM
-/*------------------------------------------------------------------*/
-/*
- * This function calculates a histogram of the signal level.
- * As the noise is quite constant, it's like doing it on the SNR.
- * We have defined a set of interval (lp->his_range), and each time
- * the level goes in that interval, we increment the count (lp->his_sum).
- * With this histogram you may detect if one WaveLAN is really weak,
- * or you may also calculate the mean and standard deviation of the level.
- */
-static inline void wl_his_gather(struct net_device * dev, u8 * stats)
-{ /* Statistics to gather */
- net_local *lp = netdev_priv(dev);
- u8 level = stats[0] & MMR_SIGNAL_LVL;
- int i;
-
- /* Find the correct interval. */
- i = 0;
- while ((i < (lp->his_number - 1))
- && (level >= lp->his_range[i++]));
-
- /* Increment interval counter. */
- (lp->his_sum[i])++;
-}
-#endif /* HISTOGRAM */
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get protocol name
- */
-static int wavelan_get_name(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- strcpy(wrqu->name, "WaveLAN");
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set NWID
- */
-static int wavelan_set_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- mm_t m;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Set NWID in WaveLAN. */
- if (!wrqu->nwid.disabled) {
- /* Set NWID in psa */
- psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
- psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
- psa.psa_nwid_select = 0x01;
- psa_write(ioaddr, lp->hacr,
- (char *) psa.psa_nwid - (char *) &psa,
- (unsigned char *) psa.psa_nwid, 3);
-
- /* Set NWID in mmc. */
- m.w.mmw_netw_id_l = psa.psa_nwid[1];
- m.w.mmw_netw_id_h = psa.psa_nwid[0];
- mmc_write(ioaddr,
- (char *) &m.w.mmw_netw_id_l -
- (char *) &m,
- (unsigned char *) &m.w.mmw_netw_id_l, 2);
- mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00);
- } else {
- /* Disable NWID in the psa. */
- psa.psa_nwid_select = 0x00;
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_nwid_select -
- (char *) &psa,
- (unsigned char *) &psa.psa_nwid_select,
- 1);
-
- /* Disable NWID in the mmc (no filtering). */
- mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel),
- MMW_LOOPT_SEL_DIS_NWID);
- }
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, lp->hacr);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get NWID
- */
-static int wavelan_get_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Read the NWID. */
- psa_read(ioaddr, lp->hacr,
- (char *) psa.psa_nwid - (char *) &psa,
- (unsigned char *) psa.psa_nwid, 3);
- wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
- wrqu->nwid.disabled = !(psa.psa_nwid_select);
- wrqu->nwid.fixed = 1; /* Superfluous */
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set frequency
- */
-static int wavelan_set_freq(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- unsigned long flags;
- int ret;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
- if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
- ret = wv_set_frequency(ioaddr, &(wrqu->freq));
- else
- ret = -EOPNOTSUPP;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get frequency
- */
-static int wavelan_get_freq(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
- * Does it work for everybody, especially old cards? */
- if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- unsigned short freq;
-
- /* Ask the EEPROM to read the frequency from the first area. */
- fee_read(ioaddr, 0x00, &freq, 1);
- wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
- wrqu->freq.e = 1;
- } else {
- psa_read(ioaddr, lp->hacr,
- (char *) &psa.psa_subband - (char *) &psa,
- (unsigned char *) &psa.psa_subband, 1);
-
- if (psa.psa_subband <= 4) {
- wrqu->freq.m = fixed_bands[psa.psa_subband];
- wrqu->freq.e = (psa.psa_subband != 0);
- } else
- ret = -EOPNOTSUPP;
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set level threshold
- */
-static int wavelan_set_sens(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Set the level threshold. */
- /* We should complain loudly if wrqu->sens.fixed = 0, because we
- * can't set auto mode... */
- psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_thr_pre_set - (char *) &psa,
- (unsigned char *) &psa.psa_thr_pre_set, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, lp->hacr);
- mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set),
- psa.psa_thr_pre_set);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get level threshold
- */
-static int wavelan_get_sens(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Read the level threshold. */
- psa_read(ioaddr, lp->hacr,
- (char *) &psa.psa_thr_pre_set - (char *) &psa,
- (unsigned char *) &psa.psa_thr_pre_set, 1);
- wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
- wrqu->sens.fixed = 1;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set encryption key
- */
-static int wavelan_set_encode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- unsigned long flags;
- psa_t psa;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check if capable of encryption */
- if (!mmc_encr(ioaddr)) {
- ret = -EOPNOTSUPP;
- }
-
- /* Check the size of the key */
- if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
- ret = -EINVAL;
- }
-
- if(!ret) {
- /* Basic checking... */
- if (wrqu->encoding.length == 8) {
- /* Copy the key in the driver */
- memcpy(psa.psa_encryption_key, extra,
- wrqu->encoding.length);
- psa.psa_encryption_select = 1;
-
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 8 + 1);
-
- mmc_out(ioaddr, mmwoff(0, mmw_encr_enable),
- MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
- mmc_write(ioaddr, mmwoff(0, mmw_encr_key),
- (unsigned char *) &psa.
- psa_encryption_key, 8);
- }
-
- /* disable encryption */
- if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
- psa.psa_encryption_select = 0;
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 1);
-
- mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0);
- }
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, lp->hacr);
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get encryption key
- */
-static int wavelan_get_encode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check if encryption is available */
- if (!mmc_encr(ioaddr)) {
- ret = -EOPNOTSUPP;
- } else {
- /* Read the encryption key */
- psa_read(ioaddr, lp->hacr,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 1 + 8);
-
- /* encryption is enabled ? */
- if (psa.psa_encryption_select)
- wrqu->encoding.flags = IW_ENCODE_ENABLED;
- else
- wrqu->encoding.flags = IW_ENCODE_DISABLED;
- wrqu->encoding.flags |= mmc_encr(ioaddr);
-
- /* Copy the key to the user buffer */
- wrqu->encoding.length = 8;
- memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get range info
- */
-static int wavelan_get_range(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- struct iw_range *range = (struct iw_range *) extra;
- unsigned long flags;
- int ret = 0;
-
- /* Set the length (very important for backward compatibility) */
- wrqu->data.length = sizeof(struct iw_range);
-
- /* Set all the info we don't care or don't know about to zero */
- memset(range, 0, sizeof(struct iw_range));
-
- /* Set the Wireless Extension versions */
- range->we_version_compiled = WIRELESS_EXT;
- range->we_version_source = 9;
-
- /* Set information in the range struct. */
- range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */
- range->min_nwid = 0x0000;
- range->max_nwid = 0xFFFF;
-
- range->sensitivity = 0x3F;
- range->max_qual.qual = MMR_SGNL_QUAL;
- range->max_qual.level = MMR_SIGNAL_LVL;
- range->max_qual.noise = MMR_SILENCE_LVL;
- range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
- /* Need to get better values for those two */
- range->avg_qual.level = 30;
- range->avg_qual.noise = 8;
-
- range->num_bitrates = 1;
- range->bitrate[0] = 2000000; /* 2 Mb/s */
-
- /* Event capability (kernel + driver) */
- range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
- IW_EVENT_CAPA_MASK(0x8B04));
- range->event_capa[1] = IW_EVENT_CAPA_K_1;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
- if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- range->num_channels = 10;
- range->num_frequency = wv_frequency_list(ioaddr, range->freq,
- IW_MAX_FREQUENCIES);
- } else
- range->num_channels = range->num_frequency = 0;
-
- /* Encryption supported ? */
- if (mmc_encr(ioaddr)) {
- range->encoding_size[0] = 8; /* DES = 64 bits key */
- range->num_encoding_sizes = 1;
- range->max_encoding_tokens = 1; /* Only one key possible */
- } else {
- range->num_encoding_sizes = 0;
- range->max_encoding_tokens = 0;
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : set quality threshold
- */
-static int wavelan_set_qthr(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- psa.psa_quality_thr = *(extra) & 0x0F;
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_quality_thr - (char *) &psa,
- (unsigned char *) &psa.psa_quality_thr, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, lp->hacr);
- mmc_out(ioaddr, mmwoff(0, mmw_quality_thr),
- psa.psa_quality_thr);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : get quality threshold
- */
-static int wavelan_get_qthr(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev); /* lp is not unused */
- psa_t psa;
- unsigned long flags;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- psa_read(ioaddr, lp->hacr,
- (char *) &psa.psa_quality_thr - (char *) &psa,
- (unsigned char *) &psa.psa_quality_thr, 1);
- *(extra) = psa.psa_quality_thr & 0x0F;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return 0;
-}
-
-#ifdef HISTOGRAM
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : set histogram
- */
-static int wavelan_set_histo(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev); /* lp is not unused */
-
- /* Check the number of intervals. */
- if (wrqu->data.length > 16) {
- return(-E2BIG);
- }
-
- /* Disable histo while we copy the addresses.
- * As we don't disable interrupts, we need to do this */
- lp->his_number = 0;
-
- /* Are there ranges to copy? */
- if (wrqu->data.length > 0) {
- /* Copy interval ranges to the driver */
- memcpy(lp->his_range, extra, wrqu->data.length);
-
- {
- int i;
- printk(KERN_DEBUG "Histo :");
- for(i = 0; i < wrqu->data.length; i++)
- printk(" %d", lp->his_range[i]);
- printk("\n");
- }
-
- /* Reset result structure. */
- memset(lp->his_sum, 0x00, sizeof(long) * 16);
- }
-
- /* Now we can set the number of ranges */
- lp->his_number = wrqu->data.length;
-
- return(0);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : get histogram
- */
-static int wavelan_get_histo(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev); /* lp is not unused */
-
- /* Set the number of intervals. */
- wrqu->data.length = lp->his_number;
-
- /* Give back the distribution statistics */
- if(lp->his_number > 0)
- memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
-
- return(0);
-}
-#endif /* HISTOGRAM */
-
-/*------------------------------------------------------------------*/
-/*
- * Structures to export the Wireless Handlers
- */
-
-static const iw_handler wavelan_handler[] =
-{
- NULL, /* SIOCSIWNAME */
- wavelan_get_name, /* SIOCGIWNAME */
- wavelan_set_nwid, /* SIOCSIWNWID */
- wavelan_get_nwid, /* SIOCGIWNWID */
- wavelan_set_freq, /* SIOCSIWFREQ */
- wavelan_get_freq, /* SIOCGIWFREQ */
- NULL, /* SIOCSIWMODE */
- NULL, /* SIOCGIWMODE */
- wavelan_set_sens, /* SIOCSIWSENS */
- wavelan_get_sens, /* SIOCGIWSENS */
- NULL, /* SIOCSIWRANGE */
- wavelan_get_range, /* SIOCGIWRANGE */
- NULL, /* SIOCSIWPRIV */
- NULL, /* SIOCGIWPRIV */
- NULL, /* SIOCSIWSTATS */
- NULL, /* SIOCGIWSTATS */
- iw_handler_set_spy, /* SIOCSIWSPY */
- iw_handler_get_spy, /* SIOCGIWSPY */
- iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
- iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
- NULL, /* SIOCSIWAP */
- NULL, /* SIOCGIWAP */
- NULL, /* -- hole -- */
- NULL, /* SIOCGIWAPLIST */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWESSID */
- NULL, /* SIOCGIWESSID */
- NULL, /* SIOCSIWNICKN */
- NULL, /* SIOCGIWNICKN */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWRATE */
- NULL, /* SIOCGIWRATE */
- NULL, /* SIOCSIWRTS */
- NULL, /* SIOCGIWRTS */
- NULL, /* SIOCSIWFRAG */
- NULL, /* SIOCGIWFRAG */
- NULL, /* SIOCSIWTXPOW */
- NULL, /* SIOCGIWTXPOW */
- NULL, /* SIOCSIWRETRY */
- NULL, /* SIOCGIWRETRY */
- /* Bummer ! Why those are only at the end ??? */
- wavelan_set_encode, /* SIOCSIWENCODE */
- wavelan_get_encode, /* SIOCGIWENCODE */
-};
-
-static const iw_handler wavelan_private_handler[] =
-{
- wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
- wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
-#ifdef HISTOGRAM
- wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */
- wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */
-#endif /* HISTOGRAM */
-};
-
-static const struct iw_priv_args wavelan_private_args[] = {
-/*{ cmd, set_args, get_args, name } */
- { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
- { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
- { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
- { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
-};
-
-static const struct iw_handler_def wavelan_handler_def =
-{
- .num_standard = ARRAY_SIZE(wavelan_handler),
- .num_private = ARRAY_SIZE(wavelan_private_handler),
- .num_private_args = ARRAY_SIZE(wavelan_private_args),
- .standard = wavelan_handler,
- .private = wavelan_private_handler,
- .private_args = wavelan_private_args,
- .get_wireless_stats = wavelan_get_wireless_stats,
-};
-
-/*------------------------------------------------------------------*/
-/*
- * Get wireless statistics.
- * Called by /proc/net/wireless
- */
-static iw_stats *wavelan_get_wireless_stats(struct net_device * dev)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- mmr_t m;
- iw_stats *wstats;
- unsigned long flags;
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n",
- dev->name);
-#endif
-
- /* Check */
- if (lp == (net_local *) NULL)
- return (iw_stats *) NULL;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- wstats = &lp->wstats;
-
- /* Get data from the mmc. */
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
-
- mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
- mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l,
- 2);
- mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set,
- 4);
-
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
-
- /* Copy data to wireless stuff. */
- wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
- wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
- wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
- wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
- wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7)
- | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6)
- | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
- wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
- wstats->discard.code = 0L;
- wstats->discard.misc = 0L;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n",
- dev->name);
-#endif
- return &lp->wstats;
-}
-
-/************************* PACKET RECEPTION *************************/
-/*
- * This part deals with receiving the packets.
- * The interrupt handler gets an interrupt when a packet has been
- * successfully received and calls this part.
- */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does the actual copying of data (including the Ethernet
- * header structure) from the WaveLAN card to an sk_buff chain that
- * will be passed up to the network interface layer. NOTE: we
- * currently don't handle trailer protocols (neither does the rest of
- * the network interface), so if that is needed, it will (at least in
- * part) be added here. The contents of the receive ring buffer are
- * copied to a message chain that is then passed to the kernel.
- *
- * Note: if any errors occur, the packet is "dropped on the floor".
- * (called by wv_packet_rcv())
- */
-static void
-wv_packet_read(struct net_device * dev, u16 buf_off, int sksize)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- struct sk_buff *skb;
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
- dev->name, buf_off, sksize);
-#endif
-
- /* Allocate buffer for the data */
- if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO
- "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n",
- dev->name, sksize);
-#endif
- dev->stats.rx_dropped++;
- return;
- }
-
- /* Copy the packet to the buffer. */
- obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize);
- skb->protocol = eth_type_trans(skb, dev);
-
-#ifdef DEBUG_RX_INFO
- wv_packet_info(skb_mac_header(skb), sksize, dev->name,
- "wv_packet_read");
-#endif /* DEBUG_RX_INFO */
-
- /* Statistics-gathering and associated stuff.
- * It seem a bit messy with all the define, but it's really
- * simple... */
- if (
-#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
- (lp->spy_data.spy_number > 0) ||
-#endif /* IW_WIRELESS_SPY */
-#ifdef HISTOGRAM
- (lp->his_number > 0) ||
-#endif /* HISTOGRAM */
- 0) {
- u8 stats[3]; /* signal level, noise level, signal quality */
-
- /* Read signal level, silence level and signal quality bytes */
- /* Note: in the PCMCIA hardware, these are part of the frame.
- * It seems that for the ISA hardware, it's nowhere to be
- * found in the frame, so I'm obliged to do this (it has a
- * side effect on /proc/net/wireless).
- * Any ideas?
- */
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
- mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3);
- mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
-
-#ifdef DEBUG_RX_INFO
- printk(KERN_DEBUG
- "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
- dev->name, stats[0] & 0x3F, stats[1] & 0x3F,
- stats[2] & 0x0F);
-#endif
-
- /* Spying stuff */
-#ifdef IW_WIRELESS_SPY
- wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE,
- stats);
-#endif /* IW_WIRELESS_SPY */
-#ifdef HISTOGRAM
- wl_his_gather(dev, stats);
-#endif /* HISTOGRAM */
- }
-
- /*
- * Hand the packet to the network module.
- */
- netif_rx(skb);
-
- /* Keep statistics up to date */
- dev->stats.rx_packets++;
- dev->stats.rx_bytes += sksize;
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Transfer as many packets as we can
- * from the device RAM.
- * (called in wavelan_interrupt()).
- * Note : the spinlock is already grabbed for us.
- */
-static void wv_receive(struct net_device * dev)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- fd_t fd;
- rbd_t rbd;
- int nreaped = 0;
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name);
-#endif
-
- /* Loop on each received packet. */
- for (;;) {
- obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd,
- sizeof(fd));
-
- /* Note about the status :
- * It start up to be 0 (the value we set). Then, when the RU
- * grab the buffer to prepare for reception, it sets the
- * FD_STATUS_B flag. When the RU has finished receiving the
- * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate
- * completion and set the other flags to indicate the eventual
- * errors. FD_STATUS_OK indicates that the reception was OK.
- */
-
- /* If the current frame is not complete, we have reached the end. */
- if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
- break; /* This is how we exit the loop. */
-
- nreaped++;
-
- /* Check whether frame was correctly received. */
- if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) {
- /* Does the frame contain a pointer to the data? Let's check. */
- if (fd.fd_rbd_offset != I82586NULL) {
- /* Read the receive buffer descriptor */
- obram_read(ioaddr, fd.fd_rbd_offset,
- (unsigned char *) &rbd,
- sizeof(rbd));
-
-#ifdef DEBUG_RX_ERROR
- if ((rbd.rbd_status & RBD_STATUS_EOF) !=
- RBD_STATUS_EOF) printk(KERN_INFO
- "%s: wv_receive(): missing EOF flag.\n",
- dev->name);
-
- if ((rbd.rbd_status & RBD_STATUS_F) !=
- RBD_STATUS_F) printk(KERN_INFO
- "%s: wv_receive(): missing F flag.\n",
- dev->name);
-#endif /* DEBUG_RX_ERROR */
-
- /* Read the packet and transmit to Linux */
- wv_packet_read(dev, rbd.rbd_bufl,
- rbd.
- rbd_status &
- RBD_STATUS_ACNT);
- }
-#ifdef DEBUG_RX_ERROR
- else /* if frame has no data */
- printk(KERN_INFO
- "%s: wv_receive(): frame has no data.\n",
- dev->name);
-#endif
- } else { /* If reception was no successful */
-
- dev->stats.rx_errors++;
-
-#ifdef DEBUG_RX_INFO
- printk(KERN_DEBUG
- "%s: wv_receive(): frame not received successfully (%X).\n",
- dev->name, fd.fd_status);
-#endif
-
-#ifdef DEBUG_RX_ERROR
- if ((fd.fd_status & FD_STATUS_S6) != 0)
- printk(KERN_INFO
- "%s: wv_receive(): no EOF flag.\n",
- dev->name);
-#endif
-
- if ((fd.fd_status & FD_STATUS_S7) != 0) {
- dev->stats.rx_length_errors++;
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG
- "%s: wv_receive(): frame too short.\n",
- dev->name);
-#endif
- }
-
- if ((fd.fd_status & FD_STATUS_S8) != 0) {
- dev->stats.rx_over_errors++;
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG
- "%s: wv_receive(): rx DMA overrun.\n",
- dev->name);
-#endif
- }
-
- if ((fd.fd_status & FD_STATUS_S9) != 0) {
- dev->stats.rx_fifo_errors++;
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG
- "%s: wv_receive(): ran out of resources.\n",
- dev->name);
-#endif
- }
-
- if ((fd.fd_status & FD_STATUS_S10) != 0) {
- dev->stats.rx_frame_errors++;
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG
- "%s: wv_receive(): alignment error.\n",
- dev->name);
-#endif
- }
-
- if ((fd.fd_status & FD_STATUS_S11) != 0) {
- dev->stats.rx_crc_errors++;
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG
- "%s: wv_receive(): CRC error.\n",
- dev->name);
-#endif
- }
- }
-
- fd.fd_status = 0;
- obram_write(ioaddr, fdoff(lp->rx_head, fd_status),
- (unsigned char *) &fd.fd_status,
- sizeof(fd.fd_status));
-
- fd.fd_command = FD_COMMAND_EL;
- obram_write(ioaddr, fdoff(lp->rx_head, fd_command),
- (unsigned char *) &fd.fd_command,
- sizeof(fd.fd_command));
-
- fd.fd_command = 0;
- obram_write(ioaddr, fdoff(lp->rx_last, fd_command),
- (unsigned char *) &fd.fd_command,
- sizeof(fd.fd_command));
-
- lp->rx_last = lp->rx_head;
- lp->rx_head = fd.fd_link_offset;
- } /* for(;;) -> loop on all frames */
-
-#ifdef DEBUG_RX_INFO
- if (nreaped > 1)
- printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n",
- dev->name, nreaped);
-#endif
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name);
-#endif
-}
-
-/*********************** PACKET TRANSMISSION ***********************/
-/*
- * This part deals with sending packets through the WaveLAN.
- *
- */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine fills in the appropriate registers and memory
- * locations on the WaveLAN card and starts the card off on
- * the transmit.
- *
- * The principle:
- * Each block contains a transmit command, a NOP command,
- * a transmit block descriptor and a buffer.
- * The CU read the transmit block which point to the tbd,
- * read the tbd and the content of the buffer.
- * When it has finish with it, it goes to the next command
- * which in our case is the NOP. The NOP points on itself,
- * so the CU stop here.
- * When we add the next block, we modify the previous nop
- * to make it point on the new tx command.
- * Simple, isn't it ?
- *
- * (called in wavelan_packet_xmit())
- */
-static int wv_packet_write(struct net_device * dev, void *buf, short length)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- unsigned short txblock;
- unsigned short txpred;
- unsigned short tx_addr;
- unsigned short nop_addr;
- unsigned short tbd_addr;
- unsigned short buf_addr;
- ac_tx_t tx;
- ac_nop_t nop;
- tbd_t tbd;
- int clen = length;
- unsigned long flags;
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name,
- length);
-#endif
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check nothing bad has happened */
- if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
-#ifdef DEBUG_TX_ERROR
- printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n",
- dev->name);
-#endif
- spin_unlock_irqrestore(&lp->spinlock, flags);
- return 1;
- }
-
- /* Calculate addresses of next block and previous block. */
- txblock = lp->tx_first_free;
- txpred = txblock - TXBLOCKZ;
- if (txpred < OFFSET_CU)
- txpred += NTXBLOCKS * TXBLOCKZ;
- lp->tx_first_free += TXBLOCKZ;
- if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
- lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
-
- lp->tx_n_in_use++;
-
- /* Calculate addresses of the different parts of the block. */
- tx_addr = txblock;
- nop_addr = tx_addr + sizeof(tx);
- tbd_addr = nop_addr + sizeof(nop);
- buf_addr = tbd_addr + sizeof(tbd);
-
- /*
- * Transmit command
- */
- tx.tx_h.ac_status = 0;
- obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
- (unsigned char *) &tx.tx_h.ac_status,
- sizeof(tx.tx_h.ac_status));
-
- /*
- * NOP command
- */
- nop.nop_h.ac_status = 0;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
- (unsigned char *) &nop.nop_h.ac_status,
- sizeof(nop.nop_h.ac_status));
- nop.nop_h.ac_link = nop_addr;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
- (unsigned char *) &nop.nop_h.ac_link,
- sizeof(nop.nop_h.ac_link));
-
- /*
- * Transmit buffer descriptor
- */
- tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen);
- tbd.tbd_next_bd_offset = I82586NULL;
- tbd.tbd_bufl = buf_addr;
- tbd.tbd_bufh = 0;
- obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd));
-
- /*
- * Data
- */
- obram_write(ioaddr, buf_addr, buf, length);
-
- /*
- * Overwrite the predecessor NOP link
- * so that it points to this txblock.
- */
- nop_addr = txpred + sizeof(tx);
- nop.nop_h.ac_status = 0;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
- (unsigned char *) &nop.nop_h.ac_status,
- sizeof(nop.nop_h.ac_status));
- nop.nop_h.ac_link = txblock;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
- (unsigned char *) &nop.nop_h.ac_link,
- sizeof(nop.nop_h.ac_link));
-
- /* Make sure the watchdog will keep quiet for a while */
- dev->trans_start = jiffies;
-
- /* Keep stats up to date. */
- dev->stats.tx_bytes += length;
-
- if (lp->tx_first_in_use == I82586NULL)
- lp->tx_first_in_use = txblock;
-
- if (lp->tx_n_in_use < NTXBLOCKS - 1)
- netif_wake_queue(dev);
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_TX_INFO
- wv_packet_info((u8 *) buf, length, dev->name,
- "wv_packet_write");
-#endif /* DEBUG_TX_INFO */
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
-#endif
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine is called when we want to send a packet (NET3 callback)
- * In this routine, we check if the harware is ready to accept
- * the packet. We also prevent reentrance. Then we call the function
- * to send the packet.
- */
-static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb,
- struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
- char data[ETH_ZLEN];
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
- (unsigned) skb);
-#endif
-
- /*
- * Block a timer-based transmit from overlapping.
- * In other words, prevent reentering this routine.
- */
- netif_stop_queue(dev);
-
- /* If somebody has asked to reconfigure the controller,
- * we can do it now.
- */
- if (lp->reconfig_82586) {
- spin_lock_irqsave(&lp->spinlock, flags);
- wv_82586_config(dev);
- spin_unlock_irqrestore(&lp->spinlock, flags);
- /* Check that we can continue */
- if (lp->tx_n_in_use == (NTXBLOCKS - 1))
- return NETDEV_TX_BUSY;
- }
-
- /* Do we need some padding? */
- /* Note : on wireless the propagation time is in the order of 1us,
- * and we don't have the Ethernet specific requirement of beeing
- * able to detect collisions, therefore in theory we don't really
- * need to pad. Jean II */
- if (skb->len < ETH_ZLEN) {
- memset(data, 0, ETH_ZLEN);
- skb_copy_from_linear_data(skb, data, skb->len);
- /* Write packet on the card */
- if(wv_packet_write(dev, data, ETH_ZLEN))
- return NETDEV_TX_BUSY; /* We failed */
- }
- else if(wv_packet_write(dev, skb->data, skb->len))
- return NETDEV_TX_BUSY; /* We failed */
-
-
- dev_kfree_skb(skb);
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
-#endif
- return NETDEV_TX_OK;
-}
-
-/*********************** HARDWARE CONFIGURATION ***********************/
-/*
- * This part does the real job of starting and configuring the hardware.
- */
-
-/*--------------------------------------------------------------------*/
-/*
- * Routine to initialize the Modem Management Controller.
- * (called by wv_hw_reset())
- */
-static int wv_mmc_init(struct net_device * dev)
-{
- unsigned long ioaddr = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- mmw_t m;
- int configured;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
-#endif
-
- /* Read the parameter storage area. */
- psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
-
-#ifdef USE_PSA_CONFIG
- configured = psa.psa_conf_status & 1;
-#else
- configured = 0;
-#endif
-
- /* Is the PSA is not configured */
- if (!configured) {
- /* User will be able to configure NWID later (with iwconfig). */
- psa.psa_nwid[0] = 0;
- psa.psa_nwid[1] = 0;
-
- /* no NWID checking since NWID is not set */
- psa.psa_nwid_select = 0;
-
- /* Disable encryption */
- psa.psa_encryption_select = 0;
-
- /* Set to standard values:
- * 0x04 for AT,
- * 0x01 for MCA,
- * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
- */
- if (psa.psa_comp_number & 1)
- psa.psa_thr_pre_set = 0x01;
- else
- psa.psa_thr_pre_set = 0x04;
- psa.psa_quality_thr = 0x03;
-
- /* It is configured */
- psa.psa_conf_status |= 1;
-
-#ifdef USE_PSA_CONFIG
- /* Write the psa. */
- psa_write(ioaddr, lp->hacr,
- (char *) psa.psa_nwid - (char *) &psa,
- (unsigned char *) psa.psa_nwid, 4);
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_thr_pre_set - (char *) &psa,
- (unsigned char *) &psa.psa_thr_pre_set, 1);
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_quality_thr - (char *) &psa,
- (unsigned char *) &psa.psa_quality_thr, 1);
- psa_write(ioaddr, lp->hacr,
- (char *) &psa.psa_conf_status - (char *) &psa,
- (unsigned char *) &psa.psa_conf_status, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, lp->hacr);
-#endif
- }
-
- /* Zero the mmc structure. */
- memset(&m, 0x00, sizeof(m));
-
- /* Copy PSA info to the mmc. */
- m.mmw_netw_id_l = psa.psa_nwid[1];
- m.mmw_netw_id_h = psa.psa_nwid[0];
-
- if (psa.psa_nwid_select & 1)
- m.mmw_loopt_sel = 0x00;
- else
- m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
-
- memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
- sizeof(m.mmw_encr_key));
-
- if (psa.psa_encryption_select)
- m.mmw_encr_enable =
- MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
- else
- m.mmw_encr_enable = 0;
-
- m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
- m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
-
- /*
- * Set default modem control parameters.
- * See NCR document 407-0024326 Rev. A.
- */
- m.mmw_jabber_enable = 0x01;
- m.mmw_freeze = 0;
- m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
- m.mmw_ifs = 0x20;
- m.mmw_mod_delay = 0x04;
- m.mmw_jam_time = 0x38;
-
- m.mmw_des_io_invert = 0;
- m.mmw_decay_prm = 0;
- m.mmw_decay_updat_prm = 0;
-
- /* Write all info to MMC. */
- mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m));
-
- /* The following code starts the modem of the 2.00 frequency
- * selectable cards at power on. It's not strictly needed for the
- * following boots.
- * The original patch was by Joe Finney for the PCMCIA driver, but
- * I've cleaned it up a bit and added documentation.
- * Thanks to Loeke Brederveld from Lucent for the info.
- */
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
- * Does it work for everybody, especially old cards? */
- /* Note: WFREQSEL verifies that it is able to read a sensible
- * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID
- * is 0xA (Xilinx version) or 0xB (Ariadne version).
- * My test is more crude but does work. */
- if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- /* We must download the frequency parameters to the
- * synthesizers (from the EEPROM - area 1)
- * Note: as the EEPROM is automatically decremented, we set the end
- * if the area... */
- m.mmw_fee_addr = 0x0F;
- m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
- mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
- (unsigned char *) &m.mmw_fee_ctrl, 2);
-
- /* Wait until the download is finished. */
- fee_wait(ioaddr, 100, 100);
-
-#ifdef DEBUG_CONFIG_INFO
- /* The frequency was in the last word downloaded. */
- mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m,
- (unsigned char *) &m.mmw_fee_data_l, 2);
-
- /* Print some info for the user. */
- printk(KERN_DEBUG
- "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n",
- dev->name,
- ((m.
- mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) *
- 5 / 2 + 24000L);
-#endif
-
- /* We must now download the power adjust value (gain) to
- * the synthesizers (from the EEPROM - area 7 - DAC). */
- m.mmw_fee_addr = 0x61;
- m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
- mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
- (unsigned char *) &m.mmw_fee_ctrl, 2);
-
- /* Wait until the download is finished. */
- }
- /* if 2.00 card */
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Construct the fd and rbd structures.
- * Start the receive unit.
- * (called by wv_hw_reset())
- */
-static int wv_ru_start(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- u16 scb_cs;
- fd_t fd;
- rbd_t rbd;
- u16 rx;
- u16 rx_next;
- int i;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
-#endif
-
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
- if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
- return 0;
-
- lp->rx_head = OFFSET_RU;
-
- for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) {
- rx_next =
- (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
-
- fd.fd_status = 0;
- fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
- fd.fd_link_offset = rx_next;
- fd.fd_rbd_offset = rx + sizeof(fd);
- obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd));
-
- rbd.rbd_status = 0;
- rbd.rbd_next_rbd_offset = I82586NULL;
- rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
- rbd.rbd_bufh = 0;
- rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
- obram_write(ioaddr, rx + sizeof(fd),
- (unsigned char *) &rbd, sizeof(rbd));
-
- lp->rx_last = rx;
- }
-
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset),
- (unsigned char *) &lp->rx_head, sizeof(lp->rx_head));
-
- scb_cs = SCB_CMD_RUC_GO;
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
-
- set_chan_attn(ioaddr, lp->hacr);
-
- for (i = 1000; i > 0; i--) {
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
- if (scb_cs == 0)
- break;
-
- udelay(10);
- }
-
- if (i <= 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wavelan_ru_start(): board not accepting command.\n",
- dev->name);
-#endif
- return -1;
- }
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Initialise the transmit blocks.
- * Start the command unit executing the NOP
- * self-loop of the first transmit block.
- *
- * Here we create the list of send buffers used to transmit packets
- * between the PC and the command unit. For each buffer, we create a
- * buffer descriptor (pointing on the buffer), a transmit command
- * (pointing to the buffer descriptor) and a NOP command.
- * The transmit command is linked to the NOP, and the NOP to itself.
- * When we will have finished executing the transmit command, we will
- * then loop on the NOP. By releasing the NOP link to a new command,
- * we may send another buffer.
- *
- * (called by wv_hw_reset())
- */
-static int wv_cu_start(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- int i;
- u16 txblock;
- u16 first_nop;
- u16 scb_cs;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name);
-#endif
-
- lp->tx_first_free = OFFSET_CU;
- lp->tx_first_in_use = I82586NULL;
-
- for (i = 0, txblock = OFFSET_CU;
- i < NTXBLOCKS; i++, txblock += TXBLOCKZ) {
- ac_tx_t tx;
- ac_nop_t nop;
- tbd_t tbd;
- unsigned short tx_addr;
- unsigned short nop_addr;
- unsigned short tbd_addr;
- unsigned short buf_addr;
-
- tx_addr = txblock;
- nop_addr = tx_addr + sizeof(tx);
- tbd_addr = nop_addr + sizeof(nop);
- buf_addr = tbd_addr + sizeof(tbd);
-
- tx.tx_h.ac_status = 0;
- tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
- tx.tx_h.ac_link = nop_addr;
- tx.tx_tbd_offset = tbd_addr;
- obram_write(ioaddr, tx_addr, (unsigned char *) &tx,
- sizeof(tx));
-
- nop.nop_h.ac_status = 0;
- nop.nop_h.ac_command = acmd_nop;
- nop.nop_h.ac_link = nop_addr;
- obram_write(ioaddr, nop_addr, (unsigned char *) &nop,
- sizeof(nop));
-
- tbd.tbd_status = TBD_STATUS_EOF;
- tbd.tbd_next_bd_offset = I82586NULL;
- tbd.tbd_bufl = buf_addr;
- tbd.tbd_bufh = 0;
- obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd,
- sizeof(tbd));
- }
-
- first_nop =
- OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset),
- (unsigned char *) &first_nop, sizeof(first_nop));
-
- scb_cs = SCB_CMD_CUC_GO;
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
-
- set_chan_attn(ioaddr, lp->hacr);
-
- for (i = 1000; i > 0; i--) {
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cs, sizeof(scb_cs));
- if (scb_cs == 0)
- break;
-
- udelay(10);
- }
-
- if (i <= 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wavelan_cu_start(): board not accepting command.\n",
- dev->name);
-#endif
- return -1;
- }
-
- lp->tx_n_in_use = 0;
- netif_start_queue(dev);
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does a standard configuration of the WaveLAN
- * controller (i82586).
- *
- * It initialises the scp, iscp and scb structure
- * The first two are just pointers to the next.
- * The last one is used for basic configuration and for basic
- * communication (interrupt status).
- *
- * (called by wv_hw_reset())
- */
-static int wv_82586_start(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- scp_t scp; /* system configuration pointer */
- iscp_t iscp; /* intermediate scp */
- scb_t scb; /* system control block */
- ach_t cb; /* Action command header */
- u8 zeroes[512];
- int i;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name);
-#endif
-
- /*
- * Clear the onboard RAM.
- */
- memset(&zeroes[0], 0x00, sizeof(zeroes));
- for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
- obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
-
- /*
- * Construct the command unit structures:
- * scp, iscp, scb, cb.
- */
- memset(&scp, 0x00, sizeof(scp));
- scp.scp_sysbus = SCP_SY_16BBUS;
- scp.scp_iscpl = OFFSET_ISCP;
- obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp,
- sizeof(scp));
-
- memset(&iscp, 0x00, sizeof(iscp));
- iscp.iscp_busy = 1;
- iscp.iscp_offset = OFFSET_SCB;
- obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
- sizeof(iscp));
-
- /* Our first command is to reset the i82586. */
- memset(&scb, 0x00, sizeof(scb));
- scb.scb_command = SCB_CMD_RESET;
- scb.scb_cbl_offset = OFFSET_CU;
- scb.scb_rfa_offset = OFFSET_RU;
- obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
- sizeof(scb));
-
- set_chan_attn(ioaddr, lp->hacr);
-
- /* Wait for command to finish. */
- for (i = 1000; i > 0; i--) {
- obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
- sizeof(iscp));
-
- if (iscp.iscp_busy == (unsigned short) 0)
- break;
-
- udelay(10);
- }
-
- if (i <= 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wv_82586_start(): iscp_busy timeout.\n",
- dev->name);
-#endif
- return -1;
- }
-
- /* Check command completion. */
- for (i = 15; i > 0; i--) {
- obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
- sizeof(scb));
-
- if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
- break;
-
- udelay(10);
- }
-
- if (i <= 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n",
- dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
-#endif
- return -1;
- }
-
- wv_ack(dev);
-
- /* Set the action command header. */
- memset(&cb, 0x00, sizeof(cb));
- cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
- cb.ac_link = OFFSET_CU;
- obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
-
- if (wv_synchronous_cmd(dev, "diag()") == -1)
- return -1;
-
- obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
- if (cb.ac_status & AC_SFLD_FAIL) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wv_82586_start(): i82586 Self Test failed.\n",
- dev->name);
-#endif
- return -1;
- }
-#ifdef DEBUG_I82586_SHOW
- wv_scb_show(ioaddr);
-#endif
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does a standard configuration of the WaveLAN
- * controller (i82586).
- *
- * This routine is a violent hack. We use the first free transmit block
- * to make our configuration. In the buffer area, we create the three
- * configuration commands (linked). We make the previous NOP point to
- * the beginning of the buffer instead of the tx command. After, we go
- * as usual to the NOP command.
- * Note that only the last command (mc_set) will generate an interrupt.
- *
- * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit())
- */
-static void wv_82586_config(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- unsigned short txblock;
- unsigned short txpred;
- unsigned short tx_addr;
- unsigned short nop_addr;
- unsigned short tbd_addr;
- unsigned short cfg_addr;
- unsigned short ias_addr;
- unsigned short mcs_addr;
- ac_tx_t tx;
- ac_nop_t nop;
- ac_cfg_t cfg; /* Configure action */
- ac_ias_t ias; /* IA-setup action */
- ac_mcs_t mcs; /* Multicast setup */
- struct dev_mc_list *dmi;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name);
-#endif
-
- /* Check nothing bad has happened */
- if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n",
- dev->name);
-#endif
- return;
- }
-
- /* Calculate addresses of next block and previous block. */
- txblock = lp->tx_first_free;
- txpred = txblock - TXBLOCKZ;
- if (txpred < OFFSET_CU)
- txpred += NTXBLOCKS * TXBLOCKZ;
- lp->tx_first_free += TXBLOCKZ;
- if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
- lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
-
- lp->tx_n_in_use++;
-
- /* Calculate addresses of the different parts of the block. */
- tx_addr = txblock;
- nop_addr = tx_addr + sizeof(tx);
- tbd_addr = nop_addr + sizeof(nop);
- cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */
- ias_addr = cfg_addr + sizeof(cfg);
- mcs_addr = ias_addr + sizeof(ias);
-
- /*
- * Transmit command
- */
- tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */
- obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
- (unsigned char *) &tx.tx_h.ac_status,
- sizeof(tx.tx_h.ac_status));
-
- /*
- * NOP command
- */
- nop.nop_h.ac_status = 0;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
- (unsigned char *) &nop.nop_h.ac_status,
- sizeof(nop.nop_h.ac_status));
- nop.nop_h.ac_link = nop_addr;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
- (unsigned char *) &nop.nop_h.ac_link,
- sizeof(nop.nop_h.ac_link));
-
- /* Create a configure action. */
- memset(&cfg, 0x00, sizeof(cfg));
-
- /*
- * For Linux we invert AC_CFG_ALOC() so as to conform
- * to the way that net packets reach us from above.
- * (See also ac_tx_t.)
- *
- * Updated from Wavelan Manual WCIN085B
- */
- cfg.cfg_byte_cnt =
- AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
- cfg.cfg_fifolim = AC_CFG_FIFOLIM(4);
- cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0);
- cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
- AC_CFG_ILPBCK(0) |
- AC_CFG_PRELEN(AC_CFG_PLEN_2) |
- AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
- cfg.cfg_byte10 = AC_CFG_BOFMET(1) |
- AC_CFG_ACR(6) | AC_CFG_LINPRIO(0);
- cfg.cfg_ifs = 0x20;
- cfg.cfg_slotl = 0x0C;
- cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0);
- cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
- AC_CFG_BTSTF(0) |
- AC_CFG_CRC16(0) |
- AC_CFG_NCRC(0) |
- AC_CFG_TNCRS(1) |
- AC_CFG_MANCH(0) |
- AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous);
- cfg.cfg_byte15 = AC_CFG_ICDS(0) |
- AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0);
-/*
- cfg.cfg_min_frm_len = AC_CFG_MNFRM(64);
-*/
- cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
-
- cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure);
- cfg.cfg_h.ac_link = ias_addr;
- obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg));
-
- /* Set up the MAC address */
- memset(&ias, 0x00, sizeof(ias));
- ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup);
- ias.ias_h.ac_link = mcs_addr;
- memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0],
- sizeof(ias.ias_addr));
- obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias));
-
- /* Initialize adapter's Ethernet multicast addresses */
- memset(&mcs, 0x00, sizeof(mcs));
- mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup);
- mcs.mcs_h.ac_link = nop_addr;
- mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count;
- obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs));
-
- /* Any address to set? */
- if (lp->mc_count) {
- for (dmi = dev->mc_list; dmi; dmi = dmi->next)
- outsw(PIOP1(ioaddr), (u16 *) dmi->dmi_addr,
- WAVELAN_ADDR_SIZE >> 1);
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG
- "%s: wv_82586_config(): set %d multicast addresses:\n",
- dev->name, lp->mc_count);
- for (dmi = dev->mc_list; dmi; dmi = dmi->next)
- printk(KERN_DEBUG " %pM\n", dmi->dmi_addr);
-#endif
- }
-
- /*
- * Overwrite the predecessor NOP link
- * so that it points to the configure action.
- */
- nop_addr = txpred + sizeof(tx);
- nop.nop_h.ac_status = 0;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
- (unsigned char *) &nop.nop_h.ac_status,
- sizeof(nop.nop_h.ac_status));
- nop.nop_h.ac_link = cfg_addr;
- obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
- (unsigned char *) &nop.nop_h.ac_link,
- sizeof(nop.nop_h.ac_link));
-
- /* Job done, clear the flag */
- lp->reconfig_82586 = 0;
-
- if (lp->tx_first_in_use == I82586NULL)
- lp->tx_first_in_use = txblock;
-
- if (lp->tx_n_in_use == (NTXBLOCKS - 1))
- netif_stop_queue(dev);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine, called by wavelan_close(), gracefully stops the
- * WaveLAN controller (i82586).
- * (called by wavelan_close())
- */
-static void wv_82586_stop(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
- u16 scb_cmd;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name);
-#endif
-
- /* Suspend both command unit and receive unit. */
- scb_cmd =
- (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC &
- SCB_CMD_RUC_SUS);
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &scb_cmd, sizeof(scb_cmd));
- set_chan_attn(ioaddr, lp->hacr);
-
- /* No more interrupts */
- wv_ints_off(dev);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Totally reset the WaveLAN and restart it.
- * Performs the following actions:
- * 1. A power reset (reset DMA)
- * 2. Initialize the radio modem (using wv_mmc_init)
- * 3. Reset & Configure LAN controller (using wv_82586_start)
- * 4. Start the LAN controller's command unit
- * 5. Start the LAN controller's receive unit
- * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open())
- */
-static int wv_hw_reset(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long ioaddr = dev->base_addr;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name,
- (unsigned int) dev);
-#endif
-
- /* Increase the number of resets done. */
- lp->nresets++;
-
- wv_hacr_reset(ioaddr);
- lp->hacr = HACR_DEFAULT;
-
- if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0))
- return -1;
-
- /* Enable the card to send interrupts. */
- wv_ints_on(dev);
-
- /* Start card functions */
- if (wv_cu_start(dev) < 0)
- return -1;
-
- /* Setup the controller and parameters */
- wv_82586_config(dev);
-
- /* Finish configuration with the receive unit */
- if (wv_ru_start(dev) < 0)
- return -1;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Check if there is a WaveLAN at the specific base address.
- * As a side effect, this reads the MAC address.
- * (called in wavelan_probe() and init_module())
- */
-static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac)
-{
- int i; /* Loop counter */
-
- /* Check if the base address if available. */
- if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe"))
- return -EBUSY; /* ioaddr already used */
-
- /* Reset host interface */
- wv_hacr_reset(ioaddr);
-
- /* Read the MAC address from the parameter storage area. */
- psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr),
- mac, 6);
-
- release_region(ioaddr, sizeof(ha_t));
-
- /*
- * Check the first three octets of the address for the manufacturer's code.
- * Note: if this can't find your WaveLAN card, you've got a
- * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on
- * how to configure your card.
- */
- for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
- if ((mac[0] == MAC_ADDRESSES[i][0]) &&
- (mac[1] == MAC_ADDRESSES[i][1]) &&
- (mac[2] == MAC_ADDRESSES[i][2]))
- return 0;
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_WARNING
- "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n",
- ioaddr, mac[0], mac[1], mac[2]);
-#endif
- return -ENODEV;
-}
-
-/************************ INTERRUPT HANDLING ************************/
-
-/*
- * This function is the interrupt handler for the WaveLAN card. This
- * routine will be called whenever:
- */
-static irqreturn_t wavelan_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev;
- unsigned long ioaddr;
- net_local *lp;
- u16 hasr;
- u16 status;
- u16 ack_cmd;
-
- dev = dev_id;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
-#endif
-
- lp = netdev_priv(dev);
- ioaddr = dev->base_addr;
-
-#ifdef DEBUG_INTERRUPT_INFO
- /* Check state of our spinlock */
- if(spin_is_locked(&lp->spinlock))
- printk(KERN_DEBUG
- "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
- dev->name);
-#endif
-
- /* Prevent reentrancy. We need to do that because we may have
- * multiple interrupt handler running concurrently.
- * It is safe because interrupts are disabled before acquiring
- * the spinlock. */
- spin_lock(&lp->spinlock);
-
- /* We always had spurious interrupts at startup, but lately I
- * saw them comming *between* the request_irq() and the
- * spin_lock_irqsave() in wavelan_open(), so the spinlock
- * protection is no enough.
- * So, we also check lp->hacr that will tell us is we enabled
- * irqs or not (see wv_ints_on()).
- * We can't use netif_running(dev) because we depend on the
- * proper processing of the irq generated during the config. */
-
- /* Which interrupt it is ? */
- hasr = hasr_read(ioaddr);
-
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_INFO
- "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n",
- dev->name, hasr, lp->hacr);
-#endif
-
- /* Check modem interrupt */
- if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) {
- u8 dce_status;
-
- /*
- * Interrupt from the modem management controller.
- * This will clear it -- ignored for now.
- */
- mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status,
- sizeof(dce_status));
-
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO
- "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n",
- dev->name, dce_status);
-#endif
- }
-
- /* Check if not controller interrupt */
- if (((hasr & HASR_82586_INTR) == 0) ||
- ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO
- "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n",
- dev->name, hasr);
-#endif
- spin_unlock (&lp->spinlock);
- return IRQ_NONE;
- }
-
- /* Read interrupt data. */
- obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
- (unsigned char *) &status, sizeof(status));
-
- /*
- * Acknowledge the interrupt(s).
- */
- ack_cmd = status & SCB_ST_INT;
- obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
- (unsigned char *) &ack_cmd, sizeof(ack_cmd));
- set_chan_attn(ioaddr, lp->hacr);
-
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n",
- dev->name, status);
-#endif
-
- /* Command completed. */
- if ((status & SCB_ST_CX) == SCB_ST_CX) {
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG
- "%s: wavelan_interrupt(): command completed.\n",
- dev->name);
-#endif
- wv_complete(dev, ioaddr, lp);
- }
-
- /* Frame received. */
- if ((status & SCB_ST_FR) == SCB_ST_FR) {
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG
- "%s: wavelan_interrupt(): received packet.\n",
- dev->name);
-#endif
- wv_receive(dev);
- }
-
- /* Check the state of the command unit. */
- if (((status & SCB_ST_CNA) == SCB_ST_CNA) ||
- (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) &&
- (netif_running(dev)))) {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO
- "%s: wavelan_interrupt(): CU inactive -- restarting\n",
- dev->name);
-#endif
- wv_hw_reset(dev);
- }
-
- /* Check the state of the command unit. */
- if (((status & SCB_ST_RNR) == SCB_ST_RNR) ||
- (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) &&
- (netif_running(dev)))) {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO
- "%s: wavelan_interrupt(): RU not ready -- restarting\n",
- dev->name);
-#endif
- wv_hw_reset(dev);
- }
-
- /* Release spinlock */
- spin_unlock (&lp->spinlock);
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
-#endif
- return IRQ_HANDLED;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Watchdog: when we start a transmission, a timer is set for us in the
- * kernel. If the transmission completes, this timer is disabled. If
- * the timer expires, we are called and we try to unlock the hardware.
- */
-static void wavelan_watchdog(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- u_long ioaddr = dev->base_addr;
- unsigned long flags;
- unsigned int nreaped;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
-#endif
-
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
- dev->name);
-#endif
-
- /* Check that we came here for something */
- if (lp->tx_n_in_use <= 0) {
- return;
- }
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Try to see if some buffers are not free (in case we missed
- * an interrupt */
- nreaped = wv_complete(dev, ioaddr, lp);
-
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG
- "%s: wavelan_watchdog(): %d reaped, %d remain.\n",
- dev->name, nreaped, lp->tx_n_in_use);
-#endif
-
-#ifdef DEBUG_PSA_SHOW
- {
- psa_t psa;
- psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
- wv_psa_show(&psa);
- }
-#endif
-#ifdef DEBUG_MMC_SHOW
- wv_mmc_show(dev);
-#endif
-#ifdef DEBUG_I82586_SHOW
- wv_cu_show(dev);
-#endif
-
- /* If no buffer has been freed */
- if (nreaped == 0) {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO
- "%s: wavelan_watchdog(): cleanup failed, trying reset\n",
- dev->name);
-#endif
- wv_hw_reset(dev);
- }
-
- /* At this point, we should have some free Tx buffer ;-) */
- if (lp->tx_n_in_use < NTXBLOCKS - 1)
- netif_wake_queue(dev);
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
-#endif
-}
-
-/********************* CONFIGURATION CALLBACKS *********************/
-/*
- * Here are the functions called by the Linux networking code (NET3)
- * for initialization, configuration and deinstallations of the
- * WaveLAN ISA hardware.
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Configure and start up the WaveLAN PCMCIA adaptor.
- * Called by NET3 when it "opens" the device.
- */
-static int wavelan_open(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
- (unsigned int) dev);
-#endif
-
- /* Check irq */
- if (dev->irq == 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n",
- dev->name);
-#endif
- return -ENXIO;
- }
-
- if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0)
- {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n",
- dev->name);
-#endif
- return -EAGAIN;
- }
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- if (wv_hw_reset(dev) != -1) {
- netif_start_queue(dev);
- } else {
- free_irq(dev->irq, dev);
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wavelan_open(): impossible to start the card\n",
- dev->name);
-#endif
- spin_unlock_irqrestore(&lp->spinlock, flags);
- return -EAGAIN;
- }
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Shut down the WaveLAN ISA card.
- * Called by NET3 when it "closes" the device.
- */
-static int wavelan_close(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
- (unsigned int) dev);
-#endif
-
- netif_stop_queue(dev);
-
- /*
- * Flush the Tx and disable Rx.
- */
- spin_lock_irqsave(&lp->spinlock, flags);
- wv_82586_stop(dev);
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- free_irq(dev->irq, dev);
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
-#endif
- return 0;
-}
-
-static const struct net_device_ops wavelan_netdev_ops = {
- .ndo_open = wavelan_open,
- .ndo_stop = wavelan_close,
- .ndo_start_xmit = wavelan_packet_xmit,
- .ndo_set_multicast_list = wavelan_set_multicast_list,
- .ndo_tx_timeout = wavelan_watchdog,
- .ndo_change_mtu = eth_change_mtu,
- .ndo_validate_addr = eth_validate_addr,
-#ifdef SET_MAC_ADDRESS
- .ndo_set_mac_address = wavelan_set_mac_address
-#else
- .ndo_set_mac_address = eth_mac_addr,
-#endif
-};
-
-
-/*------------------------------------------------------------------*/
-/*
- * Probe an I/O address, and if the WaveLAN is there configure the
- * device structure
- * (called by wavelan_probe() and via init_module()).
- */
-static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr)
-{
- u8 irq_mask;
- int irq;
- net_local *lp;
- mac_addr mac;
- int err;
-
- if (!request_region(ioaddr, sizeof(ha_t), "wavelan"))
- return -EADDRINUSE;
-
- err = wv_check_ioaddr(ioaddr, mac);
- if (err)
- goto out;
-
- memcpy(dev->dev_addr, mac, 6);
-
- dev->base_addr = ioaddr;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n",
- dev->name, (unsigned int) dev, ioaddr);
-#endif
-
- /* Check IRQ argument on command line. */
- if (dev->irq != 0) {
- irq_mask = wv_irq_to_psa(dev->irq);
-
- if (irq_mask == 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_WARNING
- "%s: wavelan_config(): invalid IRQ %d ignored.\n",
- dev->name, dev->irq);
-#endif
- dev->irq = 0;
- } else {
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG
- "%s: wavelan_config(): changing IRQ to %d\n",
- dev->name, dev->irq);
-#endif
- psa_write(ioaddr, HACR_DEFAULT,
- psaoff(0, psa_int_req_no), &irq_mask, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev, ioaddr, HACR_DEFAULT);
- wv_hacr_reset(ioaddr);
- }
- }
-
- psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no),
- &irq_mask, 1);
- if ((irq = wv_psa_to_irq(irq_mask)) == -1) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_INFO
- "%s: wavelan_config(): could not wavelan_map_irq(%d).\n",
- dev->name, irq_mask);
-#endif
- err = -EAGAIN;
- goto out;
- }
-
- dev->irq = irq;
-
- dev->mem_start = 0x0000;
- dev->mem_end = 0x0000;
- dev->if_port = 0;
-
- /* Initialize device structures */
- memset(netdev_priv(dev), 0, sizeof(net_local));
- lp = netdev_priv(dev);
-
- /* Back link to the device structure. */
- lp->dev = dev;
- /* Add the device at the beginning of the linked list. */
- lp->next = wavelan_list;
- wavelan_list = lp;
-
- lp->hacr = HACR_DEFAULT;
-
- /* Multicast stuff */
- lp->promiscuous = 0;
- lp->mc_count = 0;
-
- /* Init spinlock */
- spin_lock_init(&lp->spinlock);
-
- dev->netdev_ops = &wavelan_netdev_ops;
- dev->watchdog_timeo = WATCHDOG_JIFFIES;
- dev->wireless_handlers = &wavelan_handler_def;
- lp->wireless_data.spy_data = &lp->spy_data;
- dev->wireless_data = &lp->wireless_data;
-
- dev->mtu = WAVELAN_MTU;
-
- /* Display nice information. */
- wv_init_info(dev);
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name);
-#endif
- return 0;
-out:
- release_region(ioaddr, sizeof(ha_t));
- return err;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Check for a network adaptor of this type. Return '0' iff one
- * exists. There seem to be different interpretations of
- * the initial value of dev->base_addr.
- * We follow the example in drivers/net/ne.c.
- * (called in "Space.c")
- */
-struct net_device * __init wavelan_probe(int unit)
-{
- struct net_device *dev;
- short base_addr;
- int def_irq;
- int i;
- int r = 0;
-
- /* compile-time check the sizes of structures */
- BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
- BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
- BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
- BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE);
-
- dev = alloc_etherdev(sizeof(net_local));
- if (!dev)
- return ERR_PTR(-ENOMEM);
-
- sprintf(dev->name, "eth%d", unit);
- netdev_boot_setup_check(dev);
- base_addr = dev->base_addr;
- def_irq = dev->irq;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG
- "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n",
- dev->name, dev, (unsigned int) dev->base_addr);
-#endif
-
- /* Don't probe at all. */
- if (base_addr < 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_WARNING
- "%s: wavelan_probe(): invalid base address\n",
- dev->name);
-#endif
- r = -ENXIO;
- } else if (base_addr > 0x100) { /* Check a single specified location. */
- r = wavelan_config(dev, base_addr);
-#ifdef DEBUG_CONFIG_INFO
- if (r != 0)
- printk(KERN_DEBUG
- "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n",
- dev->name, base_addr);
-#endif
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name);
-#endif
- } else { /* Scan all possible addresses of the WaveLAN hardware. */
- for (i = 0; i < ARRAY_SIZE(iobase); i++) {
- dev->irq = def_irq;
- if (wavelan_config(dev, iobase[i]) == 0) {
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG
- "%s: <-wavelan_probe()\n",
- dev->name);
-#endif
- break;
- }
- }
- if (i == ARRAY_SIZE(iobase))
- r = -ENODEV;
- }
- if (r)
- goto out;
- r = register_netdev(dev);
- if (r)
- goto out1;
- return dev;
-out1:
- release_region(dev->base_addr, sizeof(ha_t));
- wavelan_list = wavelan_list->next;
-out:
- free_netdev(dev);
- return ERR_PTR(r);
-}
-
-/****************************** MODULE ******************************/
-/*
- * Module entry point: insertion and removal
- */
-
-#ifdef MODULE
-/*------------------------------------------------------------------*/
-/*
- * Insertion of the module
- * I'm now quite proud of the multi-device support.
- */
-int __init init_module(void)
-{
- int ret = -EIO; /* Return error if no cards found */
- int i;
-
-#ifdef DEBUG_MODULE_TRACE
- printk(KERN_DEBUG "-> init_module()\n");
-#endif
-
- /* If probing is asked */
- if (io[0] == 0) {
-#ifdef DEBUG_CONFIG_ERROR
- printk(KERN_WARNING
- "WaveLAN init_module(): doing device probing (bad !)\n");
- printk(KERN_WARNING
- "Specify base addresses while loading module to correct the problem\n");
-#endif
-
- /* Copy the basic set of address to be probed. */
- for (i = 0; i < ARRAY_SIZE(iobase); i++)
- io[i] = iobase[i];
- }
-
-
- /* Loop on all possible base addresses. */
- for (i = 0; i < ARRAY_SIZE(io) && io[i] != 0; i++) {
- struct net_device *dev = alloc_etherdev(sizeof(net_local));
- if (!dev)
- break;
- if (name[i])
- strcpy(dev->name, name[i]); /* Copy name */
- dev->base_addr = io[i];
- dev->irq = irq[i];
-
- /* Check if there is something at this base address. */
- if (wavelan_config(dev, io[i]) == 0) {
- if (register_netdev(dev) != 0) {
- release_region(dev->base_addr, sizeof(ha_t));
- wavelan_list = wavelan_list->next;
- } else {
- ret = 0;
- continue;
- }
- }
- free_netdev(dev);
- }
-
-#ifdef DEBUG_CONFIG_ERROR
- if (!wavelan_list)
- printk(KERN_WARNING
- "WaveLAN init_module(): no device found\n");
-#endif
-
-#ifdef DEBUG_MODULE_TRACE
- printk(KERN_DEBUG "<- init_module()\n");
-#endif
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Removal of the module
- */
-void cleanup_module(void)
-{
-#ifdef DEBUG_MODULE_TRACE
- printk(KERN_DEBUG "-> cleanup_module()\n");
-#endif
-
- /* Loop on all devices and release them. */
- while (wavelan_list) {
- struct net_device *dev = wavelan_list->dev;
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG
- "%s: cleanup_module(): removing device at 0x%x\n",
- dev->name, (unsigned int) dev);
-#endif
- unregister_netdev(dev);
-
- release_region(dev->base_addr, sizeof(ha_t));
- wavelan_list = wavelan_list->next;
-
- free_netdev(dev);
- }
-
-#ifdef DEBUG_MODULE_TRACE
- printk(KERN_DEBUG "<- cleanup_module()\n");
-#endif
-}
-#endif /* MODULE */
-MODULE_LICENSE("GPL");
-
-/*
- * This software may only be used and distributed
- * according to the terms of the GNU General Public License.
- *
- * This software was developed as a component of the
- * Linux operating system.
- * It is based on other device drivers and information
- * either written or supplied by:
- * Ajay Bakre (bakre@paul.rutgers.edu),
- * Donald Becker (becker@scyld.com),
- * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com),
- * Anders Klemets (klemets@it.kth.se),
- * Vladimir V. Kolpakov (w@stier.koenig.ru),
- * Marc Meertens (Marc.Meertens@Utrecht.NCR.com),
- * Pauline Middelink (middelin@polyware.iaf.nl),
- * Robert Morris (rtm@das.harvard.edu),
- * Jean Tourrilhes (jt@hplb.hpl.hp.com),
- * Girish Welling (welling@paul.rutgers.edu),
- *
- * Thanks go also to:
- * James Ashton (jaa101@syseng.anu.edu.au),
- * Alan Cox (alan@lxorguk.ukuu.org.uk),
- * Allan Creighton (allanc@cs.usyd.edu.au),
- * Matthew Geier (matthew@cs.usyd.edu.au),
- * Remo di Giovanni (remo@cs.usyd.edu.au),
- * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de),
- * Vipul Gupta (vgupta@cs.binghamton.edu),
- * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
- * Tim Nicholson (tim@cs.usyd.edu.au),
- * Ian Parkin (ian@cs.usyd.edu.au),
- * John Rosenberg (johnr@cs.usyd.edu.au),
- * George Rossi (george@phm.gov.au),
- * Arthur Scott (arthur@cs.usyd.edu.au),
- * Peter Storey,
- * for their assistance and advice.
- *
- * Please send bug reports, updates, comments to:
- *
- * Bruce Janson Email: bruce@cs.usyd.edu.au
- * Basser Department of Computer Science Phone: +61-2-9351-3423
- * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838
- */
diff --git a/drivers/net/wireless/wavelan.h b/drivers/net/wireless/wavelan.h
deleted file mode 100644
index 9ab360558ff..00000000000
--- a/drivers/net/wireless/wavelan.h
+++ /dev/null
@@ -1,370 +0,0 @@
-/*
- * WaveLAN ISA driver
- *
- * Jean II - HPLB '96
- *
- * Reorganisation and extension of the driver.
- * Original copyright follows. See wavelan.p.h for details.
- *
- * This file contains the declarations for the WaveLAN hardware. Note that
- * the WaveLAN ISA includes a i82586 controller (see definitions in
- * file i82586.h).
- *
- * The main difference between the ISA hardware and the PCMCIA one is
- * the Ethernet controller (i82586 instead of i82593).
- * The i82586 allows multiple transmit buffers. The PSA needs to be accessed
- * through the host interface.
- */
-
-#ifndef _WAVELAN_H
-#define _WAVELAN_H
-
-/************************** MAGIC NUMBERS ***************************/
-
-/* Detection of the WaveLAN card is done by reading the MAC
- * address from the card and checking it. If you have a non-AT&T
- * product (OEM, like DEC RoamAbout, Digital Ocean, or Epson),
- * you might need to modify this part to accommodate your hardware.
- */
-static const char MAC_ADDRESSES[][3] =
-{
- { 0x08, 0x00, 0x0E }, /* AT&T WaveLAN (standard) & DEC RoamAbout */
- { 0x08, 0x00, 0x6A }, /* AT&T WaveLAN (alternate) */
- { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
- { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
- /* Add your card here and send me the patch! */
-};
-
-#define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
-
-#define WAVELAN_MTU 1500 /* Maximum size of WaveLAN packet */
-
-#define MAXDATAZ (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
-
-/*
- * Constants used to convert channels to frequencies
- */
-
-/* Frequency available in the 2.0 modem, in units of 250 kHz
- * (as read in the offset register of the dac area).
- * Used to map channel numbers used by `wfreqsel' to frequencies
- */
-static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
- 0xD0, 0xF0, 0xF8, 0x150 };
-
-/* Frequencies of the 1.0 modem (fixed frequencies).
- * Use to map the PSA `subband' to a frequency
- * Note : all frequencies apart from the first one need to be multiplied by 10
- */
-static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
-
-
-
-/*************************** PC INTERFACE ****************************/
-
-/*
- * Host Adaptor structure.
- * (base is board port address).
- */
-typedef union hacs_u hacs_u;
-union hacs_u
-{
- unsigned short hu_command; /* Command register */
-#define HACR_RESET 0x0001 /* Reset board */
-#define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
-#define HACR_16BITS 0x0004 /* 16-bit operation (0 => 8bits) */
-#define HACR_OUT0 0x0008 /* General purpose output pin 0 */
- /* not used - must be 1 */
-#define HACR_OUT1 0x0010 /* General purpose output pin 1 */
- /* not used - must be 1 */
-#define HACR_82586_INT_ENABLE 0x0020 /* Enable 82586 interrupts */
-#define HACR_MMC_INT_ENABLE 0x0040 /* Enable MMC interrupts */
-#define HACR_INTR_CLR_ENABLE 0x0080 /* Enable interrupt status read/clear */
- unsigned short hu_status; /* Status Register */
-#define HASR_82586_INTR 0x0001 /* Interrupt request from 82586 */
-#define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
-#define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
-#define HASR_PSA_BUSY 0x0008 /* LAN parameter storage area busy */
-} __attribute__ ((packed));
-
-typedef struct ha_t ha_t;
-struct ha_t
-{
- hacs_u ha_cs; /* Command and status registers */
-#define ha_command ha_cs.hu_command
-#define ha_status ha_cs.hu_status
- unsigned short ha_mmcr; /* Modem Management Ctrl Register */
- unsigned short ha_pior0; /* Program I/O Address Register Port 0 */
- unsigned short ha_piop0; /* Program I/O Port 0 */
- unsigned short ha_pior1; /* Program I/O Address Register Port 1 */
- unsigned short ha_piop1; /* Program I/O Port 1 */
- unsigned short ha_pior2; /* Program I/O Address Register Port 2 */
- unsigned short ha_piop2; /* Program I/O Port 2 */
-};
-
-#define HA_SIZE 16
-
-#define hoff(p,f) (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
-#define HACR(p) hoff(p, ha_command)
-#define HASR(p) hoff(p, ha_status)
-#define MMCR(p) hoff(p, ha_mmcr)
-#define PIOR0(p) hoff(p, ha_pior0)
-#define PIOP0(p) hoff(p, ha_piop0)
-#define PIOR1(p) hoff(p, ha_pior1)
-#define PIOP1(p) hoff(p, ha_piop1)
-#define PIOR2(p) hoff(p, ha_pior2)
-#define PIOP2(p) hoff(p, ha_piop2)
-
-/*
- * Program I/O Mode Register values.
- */
-#define STATIC_PIO 0 /* Mode 1: static mode */
- /* RAM access ??? */
-#define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
- /* RAM access ??? */
-#define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
- /* RAM access ??? */
-#define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
- /* Parameter access. */
-#define PIO_MASK 3 /* register mask */
-#define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
-
-#define HACR_DEFAULT (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
-#define HACR_INTRON (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
-
-/************************** MEMORY LAYOUT **************************/
-
-/*
- * Onboard 64 k RAM layout.
- * (Offsets from 0x0000.)
- */
-#define OFFSET_RU 0x0000 /* 75% memory */
-#define OFFSET_CU 0xC000 /* 25% memory */
-#define OFFSET_SCB (OFFSET_ISCP - sizeof(scb_t))
-#define OFFSET_ISCP (OFFSET_SCP - sizeof(iscp_t))
-#define OFFSET_SCP I82586_SCP_ADDR
-
-#define RXBLOCKZ (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
-#define TXBLOCKZ (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
-
-#define NRXBLOCKS ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
-#define NTXBLOCKS ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
-
-/********************** PARAMETER STORAGE AREA **********************/
-
-/*
- * Parameter Storage Area (PSA).
- */
-typedef struct psa_t psa_t;
-struct psa_t
-{
- unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
- unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
- unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
- unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
- unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
- unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
- unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
- unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
- unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
- unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
-
- unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
- unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
- unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
-#define PSA_UNIVERSAL 0 /* Universal (factory) */
-#define PSA_LOCAL 1 /* Local */
- unsigned char psa_comp_number; /* [0x1D] Compatibility Number: */
-#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
-#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
-#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
-#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
-#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
- unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
- unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
-#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
- unsigned char psa_subband; /* [0x20] Subband */
-#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
-#define PSA_SUBBAND_2425 1 /* 2425 MHz */
-#define PSA_SUBBAND_2460 2 /* 2460 MHz */
-#define PSA_SUBBAND_2484 3 /* 2484 MHz */
-#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
- unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
- unsigned char psa_mod_delay; /* [0x22] Modem Delay (?) (reserved) */
- unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
- unsigned char psa_nwid_select; /* [0x25] Network ID Select On/Off */
- unsigned char psa_encryption_select; /* [0x26] Encryption On/Off */
- unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
- unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
- unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
- unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
- unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
- unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
- unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
- unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
-};
-
-#define PSA_SIZE 64
-
-/* Calculate offset of a field in the above structure.
- * Warning: only even addresses are used. */
-#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
-
-/******************** MODEM MANAGEMENT INTERFACE ********************/
-
-/*
- * Modem Management Controller (MMC) write structure.
- */
-typedef struct mmw_t mmw_t;
-struct mmw_t
-{
- unsigned char mmw_encr_key[8]; /* encryption key */
- unsigned char mmw_encr_enable; /* Enable or disable encryption. */
-#define MMW_ENCR_ENABLE_MODE 0x02 /* mode of security option */
-#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option. */
- unsigned char mmw_unused0[1]; /* unused */
- unsigned char mmw_des_io_invert; /* encryption option */
-#define MMW_DES_IO_INVERT_RES 0x0F /* reserved */
-#define MMW_DES_IO_INVERT_CTRL 0xF0 /* control (?) (set to 0) */
- unsigned char mmw_unused1[5]; /* unused */
- unsigned char mmw_loopt_sel; /* looptest selection */
-#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* Disable NWID filtering. */
-#define MMW_LOOPT_SEL_INT 0x20 /* Activate Attention Request. */
-#define MMW_LOOPT_SEL_LS 0x10 /* looptest, no collision avoidance */
-#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
-#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
-#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
-#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
- unsigned char mmw_jabber_enable; /* jabber timer enable */
- /* Abort transmissions > 200 ms */
- unsigned char mmw_freeze; /* freeze or unfreeze signal level */
- /* 0 : signal level & qual updated for every new message, 1 : frozen */
- unsigned char mmw_anten_sel; /* antenna selection */
-#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
-#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
- unsigned char mmw_ifs; /* inter frame spacing */
- /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
- unsigned char mmw_mod_delay; /* modem delay (synchro) */
- unsigned char mmw_jam_time; /* jamming time (after collision) */
- unsigned char mmw_unused2[1]; /* unused */
- unsigned char mmw_thr_pre_set; /* level threshold preset */
- /* Discard all packet with signal < this value (4) */
- unsigned char mmw_decay_prm; /* decay parameters */
- unsigned char mmw_decay_updat_prm; /* decay update parameters */
- unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
- /* Discard all packet with quality < this value (3) */
- unsigned char mmw_netw_id_l; /* NWID low order byte */
- unsigned char mmw_netw_id_h; /* NWID high order byte */
- /* Network ID or Domain : create virtual net on the air */
-
- /* 2.0 Hardware extension - frequency selection support */
- unsigned char mmw_mode_select; /* for analog tests (set to 0) */
- unsigned char mmw_unused3[1]; /* unused */
- unsigned char mmw_fee_ctrl; /* frequency EEPROM control */
-#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions. */
-#define MMW_FEE_CTRL_DWLD 0x08 /* Download EEPROM to mmc. */
-#define MMW_FEE_CTRL_CMD 0x07 /* EEPROM commands: */
-#define MMW_FEE_CTRL_READ 0x06 /* Read */
-#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
-#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address. */
-#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses. */
-#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
-#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
-#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
-#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers. */
-#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write address in protect register */
-#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
- /* Never issue the PRDS command: it's irreversible! */
-
- unsigned char mmw_fee_addr; /* EEPROM address */
-#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel. */
-#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
-#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
-#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
-#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
-#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
-
- unsigned char mmw_fee_data_l; /* Write data to EEPROM. */
- unsigned char mmw_fee_data_h; /* high octet */
- unsigned char mmw_ext_ant; /* Setting for external antenna */
-#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
-#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
-#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
-#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
-#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
-} __attribute__ ((packed));
-
-#define MMW_SIZE 37
-
-#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
-
-/*
- * Modem Management Controller (MMC) read structure.
- */
-typedef struct mmr_t mmr_t;
-struct mmr_t
-{
- unsigned char mmr_unused0[8]; /* unused */
- unsigned char mmr_des_status; /* encryption status */
- unsigned char mmr_des_avail; /* encryption available (0x55 read) */
-#define MMR_DES_AVAIL_DES 0x55 /* DES available */
-#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
- unsigned char mmr_des_io_invert; /* des I/O invert register */
- unsigned char mmr_unused1[5]; /* unused */
- unsigned char mmr_dce_status; /* DCE status */
-#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
-#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
-#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
-#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
-#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
- unsigned char mmr_dsp_id; /* DSP ID (AA = Daedalus rev A) */
- unsigned char mmr_unused2[2]; /* unused */
- unsigned char mmr_correct_nwid_l; /* # of correct NWIDs rxd (low) */
- unsigned char mmr_correct_nwid_h; /* # of correct NWIDs rxd (high) */
- /* Warning: read high-order octet first! */
- unsigned char mmr_wrong_nwid_l; /* # of wrong NWIDs rxd (low) */
- unsigned char mmr_wrong_nwid_h; /* # of wrong NWIDs rxd (high) */
- unsigned char mmr_thr_pre_set; /* level threshold preset */
-#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
-#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
- unsigned char mmr_signal_lvl; /* signal level */
-#define MMR_SIGNAL_LVL 0x3F /* signal level */
-#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
- unsigned char mmr_silence_lvl; /* silence level (noise) */
-#define MMR_SILENCE_LVL 0x3F /* silence level */
-#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
- unsigned char mmr_sgnl_qual; /* signal quality */
-#define MMR_SGNL_QUAL 0x0F /* signal quality */
-#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
- unsigned char mmr_netw_id_l; /* NWID low order byte (?) */
- unsigned char mmr_unused3[3]; /* unused */
-
- /* 2.0 Hardware extension - frequency selection support */
- unsigned char mmr_fee_status; /* Status of frequency EEPROM */
-#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision ID */
-#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
-#define MMR_FEE_STATUS_BUSY 0x04 /* EEPROM busy */
- unsigned char mmr_unused4[1]; /* unused */
- unsigned char mmr_fee_data_l; /* Read data from EEPROM (low) */
- unsigned char mmr_fee_data_h; /* Read data from EEPROM (high) */
-} __attribute__ ((packed));
-
-#define MMR_SIZE 36
-
-#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
-
-/* Make the two above structures one */
-typedef union mm_t
-{
- struct mmw_t w; /* Write to the mmc */
- struct mmr_t r; /* Read from the mmc */
-} mm_t;
-
-#endif /* _WAVELAN_H */
-
-/*
- * This software may only be used and distributed
- * according to the terms of the GNU General Public License.
- *
- * For more details, see wavelan.c.
- */
diff --git a/drivers/net/wireless/wavelan.p.h b/drivers/net/wireless/wavelan.p.h
deleted file mode 100644
index dbe8de6e5f5..00000000000
--- a/drivers/net/wireless/wavelan.p.h
+++ /dev/null
@@ -1,696 +0,0 @@
-/*
- * WaveLAN ISA driver
- *
- * Jean II - HPLB '96
- *
- * Reorganisation and extension of the driver.
- *
- * This file contains all definitions and declarations necessary for the
- * WaveLAN ISA driver. This file is a private header, so it should
- * be included only in wavelan.c!
- */
-
-#ifndef WAVELAN_P_H
-#define WAVELAN_P_H
-
-/************************** DOCUMENTATION ***************************/
-/*
- * This driver provides a Linux interface to the WaveLAN ISA hardware.
- * The WaveLAN is a product of Lucent (http://www.wavelan.com/).
- * This division was formerly part of NCR and then AT&T.
- * WaveLANs are also distributed by DEC (RoamAbout DS) and Digital Ocean.
- *
- * To learn how to use this driver, read the NET3 HOWTO.
- * If you want to exploit the many other functionalities, read the comments
- * in the code.
- *
- * This driver is the result of the effort of many people (see below).
- */
-
-/* ------------------------ SPECIFIC NOTES ------------------------ */
-/*
- * Web page
- * --------
- * I try to maintain a web page with the Wireless LAN Howto at :
- * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
- *
- * SMP
- * ---
- * We now are SMP compliant (I eventually fixed the remaining bugs).
- * The driver has been tested on a dual P6-150 and survived my usual
- * set of torture tests.
- * Anyway, I spent enough time chasing interrupt re-entrancy during
- * errors or reconfigure, and I designed the locked/unlocked sections
- * of the driver with great care, and with the recent addition of
- * the spinlock (thanks to the new API), we should be quite close to
- * the truth.
- * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
- * but better safe than sorry (especially at 2 Mb/s ;-).
- *
- * I have also looked into disabling only our interrupt on the card
- * (via HACR) instead of all interrupts in the processor (via cli),
- * so that other driver are not impacted, and it look like it's
- * possible, but it's very tricky to do right (full of races). As
- * the gain would be mostly for SMP systems, it can wait...
- *
- * Debugging and options
- * ---------------------
- * You will find below a set of '#define" allowing a very fine control
- * on the driver behaviour and the debug messages printed.
- * The main options are :
- * o SET_PSA_CRC, to have your card correctly recognised by
- * an access point and the Point-to-Point diagnostic tool.
- * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
- * (otherwise we always start afresh with some defaults)
- *
- * wavelan.o is too darned big
- * ---------------------------
- * That's true! There is a very simple way to reduce the driver
- * object by 33%! Comment out the following line:
- * #include <linux/wireless.h>
- * Other compile options can also reduce the size of it...
- *
- * MAC address and hardware detection:
- * -----------------------------------
- * The detection code for the WaveLAN checks that the first three
- * octets of the MAC address fit the company code. This type of
- * detection works well for AT&T cards (because the AT&T code is
- * hardcoded in wavelan.h), but of course will fail for other
- * manufacturers.
- *
- * If you are sure that your card is derived from the WaveLAN,
- * here is the way to configure it:
- * 1) Get your MAC address
- * a) With your card utilities (wfreqsel, instconf, etc.)
- * b) With the driver:
- * o compile the kernel with DEBUG_CONFIG_INFO enabled
- * o Boot and look the card messages
- * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan.h)
- * 3) Compile and verify
- * 4) Send me the MAC code. I will include it in the next version.
- *
- */
-
-/* --------------------- WIRELESS EXTENSIONS --------------------- */
-/*
- * This driver is the first to support "wireless extensions".
- * This set of extensions provides a standard way to control the wireless
- * characteristics of the hardware. Applications such as mobile IP may
- * take advantage of it.
- *
- * It might be a good idea as well to fetch the wireless tools to
- * configure the device and play a bit.
- */
-
-/* ---------------------------- FILES ---------------------------- */
-/*
- * wavelan.c: actual code for the driver: C functions
- *
- * wavelan.p.h: private header: local types and variables for driver
- *
- * wavelan.h: description of the hardware interface and structs
- *
- * i82586.h: description of the Ethernet controller
- */
-
-/* --------------------------- HISTORY --------------------------- */
-/*
- * This is based on information in the drivers' headers. It may not be
- * accurate, and I guarantee only my best effort.
- *
- * The history of the WaveLAN drivers is as complicated as the history of
- * the WaveLAN itself (NCR -> AT&T -> Lucent).
- *
- * It all started with Anders Klemets <klemets@paul.rutgers.edu>
- * writing a WaveLAN ISA driver for the Mach microkernel. Girish
- * Welling <welling@paul.rutgers.edu> had also worked on it.
- * Keith Moore modified this for the PCMCIA hardware.
- *
- * Robert Morris <rtm@das.harvard.edu> ported these two drivers to BSDI
- * and added specific PCMCIA support (there is currently no equivalent
- * of the PCMCIA package under BSD).
- *
- * Jim Binkley <jrb@cs.pdx.edu> ported both BSDI drivers to FreeBSD.
- *
- * Bruce Janson <bruce@cs.usyd.edu.au> ported the BSDI ISA driver to Linux.
- *
- * Anthony D. Joseph <adj@lcs.mit.edu> started to modify Bruce's driver
- * (with help of the BSDI PCMCIA driver) for PCMCIA.
- * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished this work.
- * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
- * 2.00 cards correctly (2.4 GHz with frequency selection).
- * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
- * PCMCIA package (and bug corrections).
- *
- * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
- * patches to the PCMCIA driver. Later, I added code in the ISA driver
- * for Wireless Extensions and full support of frequency selection
- * cards. Then, I did the same to the PCMCIA driver, and did some
- * reorganisation. Finally, I came back to the ISA driver to
- * upgrade it at the same level as the PCMCIA one and reorganise
- * the code.
- * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
- * much needed information on the WaveLAN hardware.
- */
-
-/* The original copyrights and literature mention others' names and
- * credits. I don't know what their part in this development was.
- */
-
-/* By the way, for the copyright and legal stuff:
- * almost everybody wrote code under the GNU or BSD license (or similar),
- * and want their original copyright to remain somewhere in the
- * code (for myself, I go with the GPL).
- * Nobody wants to take responsibility for anything, except the fame.
- */
-
-/* --------------------------- CREDITS --------------------------- */
-/*
- * This software was developed as a component of the
- * Linux operating system.
- * It is based on other device drivers and information
- * either written or supplied by:
- * Ajay Bakre <bakre@paul.rutgers.edu>,
- * Donald Becker <becker@cesdis.gsfc.nasa.gov>,
- * Loeke Brederveld <Loeke.Brederveld@Utrecht.NCR.com>,
- * Brent Elphick <belphick@uwaterloo.ca>,
- * Anders Klemets <klemets@it.kth.se>,
- * Vladimir V. Kolpakov <w@stier.koenig.ru>,
- * Marc Meertens <Marc.Meertens@Utrecht.NCR.com>,
- * Pauline Middelink <middelin@polyware.iaf.nl>,
- * Robert Morris <rtm@das.harvard.edu>,
- * Jean Tourrilhes <jt@hpl.hp.com>,
- * Girish Welling <welling@paul.rutgers.edu>,
- * Clark Woodworth <clark@hiway1.exit109.com>
- * Yongguang Zhang <ygz@isl.hrl.hac.com>
- *
- * Thanks go also to:
- * James Ashton <jaa101@syseng.anu.edu.au>,
- * Alan Cox <alan@lxorguk.ukuu.org.uk>,
- * Allan Creighton <allanc@cs.usyd.edu.au>,
- * Matthew Geier <matthew@cs.usyd.edu.au>,
- * Remo di Giovanni <remo@cs.usyd.edu.au>,
- * Eckhard Grah <grah@wrcs1.urz.uni-wuppertal.de>,
- * Vipul Gupta <vgupta@cs.binghamton.edu>,
- * Mark Hagan <mhagan@wtcpost.daytonoh.NCR.COM>,
- * Tim Nicholson <tim@cs.usyd.edu.au>,
- * Ian Parkin <ian@cs.usyd.edu.au>,
- * John Rosenberg <johnr@cs.usyd.edu.au>,
- * George Rossi <george@phm.gov.au>,
- * Arthur Scott <arthur@cs.usyd.edu.au>,
- * Stanislav Sinyagin <stas@isf.ru>
- * and Peter Storey for their assistance and advice.
- *
- * Additional Credits:
- *
- * My development has been done initially under Debian 1.1 (Linux 2.0.x)
- * and now under Debian 2.2, initially with an HP Vectra XP/60, and now
- * an HP Vectra XP/90.
- *
- */
-
-/* ------------------------- IMPROVEMENTS ------------------------- */
-/*
- * I proudly present:
- *
- * Changes made in first pre-release:
- * ----------------------------------
- * - reorganisation of the code, function name change
- * - creation of private header (wavelan.p.h)
- * - reorganised debug messages
- * - more comments, history, etc.
- * - mmc_init: configure the PSA if not done
- * - mmc_init: correct default value of level threshold for PCMCIA
- * - mmc_init: 2.00 detection better code for 2.00 initialization
- * - better info at startup
- * - IRQ setting (note: this setting is permanent)
- * - watchdog: change strategy (and solve module removal problems)
- * - add wireless extensions (ioctl and get_wireless_stats)
- * get/set nwid/frequency on fly, info for /proc/net/wireless
- * - more wireless extensions: SETSPY and GETSPY
- * - make wireless extensions optional
- * - private ioctl to set/get quality and level threshold, histogram
- * - remove /proc/net/wavelan
- * - suppress useless stuff from lp (net_local)
- * - kernel 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
- * - add message level (debug stuff in /var/adm/debug and errors not
- * displayed at console and still in /var/adm/messages)
- * - multi device support
- * - start fixing the probe (init code)
- * - more inlines
- * - man page
- * - many other minor details and cleanups
- *
- * Changes made in second pre-release:
- * -----------------------------------
- * - clean up init code (probe and module init)
- * - better multiple device support (module)
- * - name assignment (module)
- *
- * Changes made in third pre-release:
- * ----------------------------------
- * - be more conservative on timers
- * - preliminary support for multicast (I still lack some details)
- *
- * Changes made in fourth pre-release:
- * -----------------------------------
- * - multicast (revisited and finished)
- * - avoid reset in set_multicast_list (a really big hack)
- * if somebody could apply this code for other i82586 based drivers
- * - share onboard memory 75% RU and 25% CU (instead of 50/50)
- *
- * Changes made for release in 2.1.15:
- * -----------------------------------
- * - change the detection code for multi manufacturer code support
- *
- * Changes made for release in 2.1.17:
- * -----------------------------------
- * - update to wireless extensions changes
- * - silly bug in card initial configuration (psa_conf_status)
- *
- * Changes made for release in 2.1.27 & 2.0.30:
- * --------------------------------------------
- * - small bug in debug code (probably not the last one...)
- * - remove extern keyword for wavelan_probe()
- * - level threshold is now a standard wireless extension (version 4 !)
- * - modules parameters types (new module interface)
- *
- * Changes made for release in 2.1.36:
- * -----------------------------------
- * - byte count stats (courtesy of David Hinds)
- * - remove dev_tint stuff (courtesy of David Hinds)
- * - encryption setting from Brent Elphick (thanks a lot!)
- * - 'ioaddr' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
- *
- * Other changes (not by me) :
- * -------------------------
- * - Spelling and gramar "rectification".
- *
- * Changes made for release in 2.0.37 & 2.2.2 :
- * ------------------------------------------
- * - Correct status in /proc/net/wireless
- * - Set PSA CRC to make PtP diagnostic tool happy (Bob Gray)
- * - Module init code don't fail if we found at least one card in
- * the address list (Karlis Peisenieks)
- * - Missing parenthesis (Christopher Peterson)
- * - Correct i82586 configuration parameters
- * - Encryption initialisation bug (Robert McCormack)
- * - New mac addresses detected in the probe
- * - Increase watchdog for busy environments
- *
- * Changes made for release in 2.0.38 & 2.2.7 :
- * ------------------------------------------
- * - Correct the reception logic to better report errors and avoid
- * sending bogus packet up the stack
- * - Delay RU config to avoid corrupting first received packet
- * - Change config completion code (to actually check something)
- * - Avoid reading out of bound in skbuf to transmit
- * - Rectify a lot of (useless) debugging code
- * - Change the way to `#ifdef SET_PSA_CRC'
- *
- * Changes made for release in 2.2.11 & 2.3.13 :
- * -------------------------------------------
- * - Change e-mail and web page addresses
- * - Watchdog timer is now correctly expressed in HZ, not in jiffies
- * - Add channel number to the list of frequencies in range
- * - Add the (short) list of bit-rates in range
- * - Developp a new sensitivity... (sens.value & sens.fixed)
- *
- * Changes made for release in 2.2.14 & 2.3.23 :
- * -------------------------------------------
- * - Fix check for root permission (break instead of exit)
- * - New nwid & encoding setting (Wireless Extension 9)
- *
- * Changes made for release in 2.3.49 :
- * ----------------------------------
- * - Indentation reformating (Alan)
- * - Update to new network API (softnet - 2.3.43) :
- * o replace dev->tbusy (Alan)
- * o replace dev->tstart (Alan)
- * o remove dev->interrupt (Alan)
- * o add SMP locking via spinlock in splxx (me)
- * o add spinlock in interrupt handler (me)
- * o use kernel watchdog instead of ours (me)
- * o increase watchdog timeout (kernel is more sensitive) (me)
- * o verify that all the changes make sense and work (me)
- * - Fixup a potential gotcha when reconfiguring and thighten a bit
- * the interactions with Tx queue.
- *
- * Changes made for release in 2.4.0 :
- * ---------------------------------
- * - Fix spinlock stupid bugs that I left in. The driver is now SMP
- * compliant and doesn't lockup at startup.
- *
- * Changes made for release in 2.5.2 :
- * ---------------------------------
- * - Use new driver API for Wireless Extensions :
- * o got rid of wavelan_ioctl()
- * o use a bunch of iw_handler instead
- *
- * Changes made for release in 2.5.35 :
- * ----------------------------------
- * - Set dev->trans_start to avoid filling the logs
- * - Handle better spurious/bogus interrupt
- * - Avoid deadlocks in mmc_out()/mmc_in()
- *
- * Wishes & dreams:
- * ----------------
- * - roaming (see Pcmcia driver)
- */
-
-/***************************** INCLUDES *****************************/
-
-#include <linux/module.h>
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/stat.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/in.h>
-#include <linux/string.h>
-#include <linux/delay.h>
-#include <linux/bitops.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-#include <asm/uaccess.h>
-#include <linux/errno.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/slab.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-
-#include <linux/wireless.h> /* Wireless extensions */
-#include <net/iw_handler.h> /* Wireless handlers */
-
-/* WaveLAN declarations */
-#include "i82586.h"
-#include "wavelan.h"
-
-/************************** DRIVER OPTIONS **************************/
-/*
- * `#define' or `#undef' the following constant to change the behaviour
- * of the driver...
- */
-#undef SET_PSA_CRC /* Calculate and set the CRC on PSA (slower) */
-#define USE_PSA_CONFIG /* Use info from the PSA. */
-#undef EEPROM_IS_PROTECTED /* doesn't seem to be necessary */
-#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical). */
-#undef SET_MAC_ADDRESS /* Experimental */
-
-/* Warning: this stuff will slow down the driver. */
-#define WIRELESS_SPY /* Enable spying addresses. */
-#undef HISTOGRAM /* Enable histogram of signal level. */
-
-/****************************** DEBUG ******************************/
-
-#undef DEBUG_MODULE_TRACE /* module insertion/removal */
-#undef DEBUG_CALLBACK_TRACE /* calls made by Linux */
-#undef DEBUG_INTERRUPT_TRACE /* calls to handler */
-#undef DEBUG_INTERRUPT_INFO /* type of interrupt and so on */
-#define DEBUG_INTERRUPT_ERROR /* problems */
-#undef DEBUG_CONFIG_TRACE /* Trace the config functions. */
-#undef DEBUG_CONFIG_INFO /* what's going on */
-#define DEBUG_CONFIG_ERROR /* errors on configuration */
-#undef DEBUG_TX_TRACE /* transmission calls */
-#undef DEBUG_TX_INFO /* header of the transmitted packet */
-#undef DEBUG_TX_FAIL /* Normal failure conditions */
-#define DEBUG_TX_ERROR /* Unexpected conditions */
-#undef DEBUG_RX_TRACE /* transmission calls */
-#undef DEBUG_RX_INFO /* header of the received packet */
-#undef DEBUG_RX_FAIL /* Normal failure conditions */
-#define DEBUG_RX_ERROR /* Unexpected conditions */
-
-#undef DEBUG_PACKET_DUMP /* Dump packet on the screen if defined to 32. */
-#undef DEBUG_IOCTL_TRACE /* misc. call by Linux */
-#undef DEBUG_IOCTL_INFO /* various debugging info */
-#define DEBUG_IOCTL_ERROR /* what's going wrong */
-#define DEBUG_BASIC_SHOW /* Show basic startup info. */
-#undef DEBUG_VERSION_SHOW /* Print version info. */
-#undef DEBUG_PSA_SHOW /* Dump PSA to screen. */
-#undef DEBUG_MMC_SHOW /* Dump mmc to screen. */
-#undef DEBUG_SHOW_UNUSED /* Show unused fields too. */
-#undef DEBUG_I82586_SHOW /* Show i82586 status. */
-#undef DEBUG_DEVICE_SHOW /* Show device parameters. */
-
-/************************ CONSTANTS & MACROS ************************/
-
-#ifdef DEBUG_VERSION_SHOW
-static const char *version = "wavelan.c : v24 (SMP + wireless extensions) 11/12/01\n";
-#endif
-
-/* Watchdog temporisation */
-#define WATCHDOG_JIFFIES (512*HZ/100)
-
-/* ------------------------ PRIVATE IOCTL ------------------------ */
-
-#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
-#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
-
-#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 2 /* Set histogram ranges */
-#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 3 /* Get histogram values */
-
-/****************************** TYPES ******************************/
-
-/* Shortcuts */
-typedef struct iw_statistics iw_stats;
-typedef struct iw_quality iw_qual;
-typedef struct iw_freq iw_freq;typedef struct net_local net_local;
-typedef struct timer_list timer_list;
-
-/* Basic types */
-typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
-
-/*
- * Static specific data for the interface.
- *
- * For each network interface, Linux keeps data in two structures: "device"
- * keeps the generic data (same format for everybody) and "net_local" keeps
- * additional specific data.
- */
-struct net_local
-{
- net_local * next; /* linked list of the devices */
- struct net_device * dev; /* reverse link */
- spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
- int nresets; /* number of hardware resets */
- u_char reconfig_82586; /* We need to reconfigure the controller. */
- u_char promiscuous; /* promiscuous mode */
- int mc_count; /* number of multicast addresses */
- u_short hacr; /* current host interface state */
-
- int tx_n_in_use;
- u_short rx_head;
- u_short rx_last;
- u_short tx_first_free;
- u_short tx_first_in_use;
-
- iw_stats wstats; /* Wireless-specific statistics */
-
- struct iw_spy_data spy_data;
- struct iw_public_data wireless_data;
-
-#ifdef HISTOGRAM
- int his_number; /* number of intervals */
- u_char his_range[16]; /* boundaries of interval ]n-1; n] */
- u_long his_sum[16]; /* sum in interval */
-#endif /* HISTOGRAM */
-};
-
-/**************************** PROTOTYPES ****************************/
-
-/* ----------------------- MISC. SUBROUTINES ------------------------ */
-static u_char
- wv_irq_to_psa(int);
-static int
- wv_psa_to_irq(u_char);
-/* ------------------- HOST ADAPTER SUBROUTINES ------------------- */
-static inline u_short /* data */
- hasr_read(u_long); /* Read the host interface: base address */
-static inline void
- hacr_write(u_long, /* Write to host interface: base address */
- u_short), /* data */
- hacr_write_slow(u_long,
- u_short),
- set_chan_attn(u_long, /* ioaddr */
- u_short), /* hacr */
- wv_hacr_reset(u_long), /* ioaddr */
- wv_16_off(u_long, /* ioaddr */
- u_short), /* hacr */
- wv_16_on(u_long, /* ioaddr */
- u_short), /* hacr */
- wv_ints_off(struct net_device *),
- wv_ints_on(struct net_device *);
-/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
-static void
- psa_read(u_long, /* Read the Parameter Storage Area. */
- u_short, /* hacr */
- int, /* offset in PSA */
- u_char *, /* buffer to fill */
- int), /* size to read */
- psa_write(u_long, /* Write to the PSA. */
- u_short, /* hacr */
- int, /* offset in PSA */
- u_char *, /* buffer in memory */
- int); /* length of buffer */
-static inline void
- mmc_out(u_long, /* Write 1 byte to the Modem Manag Control. */
- u_short,
- u_char),
- mmc_write(u_long, /* Write n bytes to the MMC. */
- u_char,
- u_char *,
- int);
-static inline u_char /* Read 1 byte from the MMC. */
- mmc_in(u_long,
- u_short);
-static inline void
- mmc_read(u_long, /* Read n bytes from the MMC. */
- u_char,
- u_char *,
- int),
- fee_wait(u_long, /* Wait for frequency EEPROM: base address */
- int, /* base delay to wait for */
- int); /* time to wait */
-static void
- fee_read(u_long, /* Read the frequency EEPROM: base address */
- u_short, /* destination offset */
- u_short *, /* data buffer */
- int); /* number of registers */
-/* ---------------------- I82586 SUBROUTINES ----------------------- */
-static /*inline*/ void
- obram_read(u_long, /* ioaddr */
- u_short, /* o */
- u_char *, /* b */
- int); /* n */
-static inline void
- obram_write(u_long, /* ioaddr */
- u_short, /* o */
- u_char *, /* b */
- int); /* n */
-static void
- wv_ack(struct net_device *);
-static inline int
- wv_synchronous_cmd(struct net_device *,
- const char *),
- wv_config_complete(struct net_device *,
- u_long,
- net_local *);
-static int
- wv_complete(struct net_device *,
- u_long,
- net_local *);
-static inline void
- wv_82586_reconfig(struct net_device *);
-/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
-#ifdef DEBUG_I82586_SHOW
-static void
- wv_scb_show(unsigned short);
-#endif
-static inline void
- wv_init_info(struct net_device *); /* display startup info */
-/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
-static iw_stats *
- wavelan_get_wireless_stats(struct net_device *);
-static void
- wavelan_set_multicast_list(struct net_device *);
-/* ----------------------- PACKET RECEPTION ----------------------- */
-static inline void
- wv_packet_read(struct net_device *, /* Read a packet from a frame. */
- u_short,
- int),
- wv_receive(struct net_device *); /* Read all packets waiting. */
-/* --------------------- PACKET TRANSMISSION --------------------- */
-static inline int
- wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer. */
- void *,
- short);
-static netdev_tx_t
- wavelan_packet_xmit(struct sk_buff *, /* Send a packet. */
- struct net_device *);
-/* -------------------- HARDWARE CONFIGURATION -------------------- */
-static inline int
- wv_mmc_init(struct net_device *), /* Initialize the modem. */
- wv_ru_start(struct net_device *), /* Start the i82586 receiver unit. */
- wv_cu_start(struct net_device *), /* Start the i82586 command unit. */
- wv_82586_start(struct net_device *); /* Start the i82586. */
-static void
- wv_82586_config(struct net_device *); /* Configure the i82586. */
-static inline void
- wv_82586_stop(struct net_device *);
-static int
- wv_hw_reset(struct net_device *), /* Reset the WaveLAN hardware. */
- wv_check_ioaddr(u_long, /* ioaddr */
- u_char *); /* mac address (read) */
-/* ---------------------- INTERRUPT HANDLING ---------------------- */
-static irqreturn_t
- wavelan_interrupt(int, /* interrupt handler */
- void *);
-static void
- wavelan_watchdog(struct net_device *); /* transmission watchdog */
-/* ------------------- CONFIGURATION CALLBACKS ------------------- */
-static int
- wavelan_open(struct net_device *), /* Open the device. */
- wavelan_close(struct net_device *), /* Close the device. */
- wavelan_config(struct net_device *, unsigned short);/* Configure one device. */
-extern struct net_device *wavelan_probe(int unit); /* See Space.c. */
-
-/**************************** VARIABLES ****************************/
-
-/*
- * This is the root of the linked list of WaveLAN drivers
- * It is use to verify that we don't reuse the same base address
- * for two different drivers and to clean up when removing the module.
- */
-static net_local * wavelan_list = (net_local *) NULL;
-
-/*
- * This table is used to translate the PSA value to IRQ number
- * and vice versa.
- */
-static u_char irqvals[] =
-{
- 0, 0, 0, 0x01,
- 0x02, 0x04, 0, 0x08,
- 0, 0, 0x10, 0x20,
- 0x40, 0, 0, 0x80,
-};
-
-/*
- * Table of the available I/O addresses (base addresses) for WaveLAN
- */
-static unsigned short iobase[] =
-{
-#if 0
- /* Leave out 0x3C0 for now -- seems to clash with some video
- * controllers.
- * Leave out the others too -- we will always use 0x390 and leave
- * 0x300 for the Ethernet device.
- * Jean II: 0x3E0 is fine as well.
- */
- 0x300, 0x390, 0x3E0, 0x3C0
-#endif /* 0 */
- 0x390, 0x3E0
-};
-
-#ifdef MODULE
-/* Parameters set by insmod */
-static int io[4];
-static int irq[4];
-static char *name[4];
-module_param_array(io, int, NULL, 0);
-module_param_array(irq, int, NULL, 0);
-module_param_array(name, charp, NULL, 0);
-
-MODULE_PARM_DESC(io, "WaveLAN I/O base address(es),required");
-MODULE_PARM_DESC(irq, "WaveLAN IRQ number(s)");
-MODULE_PARM_DESC(name, "WaveLAN interface neme(s)");
-#endif /* MODULE */
-
-#endif /* WAVELAN_P_H */
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
deleted file mode 100644
index 431a20ec6db..00000000000
--- a/drivers/net/wireless/wavelan_cs.c
+++ /dev/null
@@ -1,4635 +0,0 @@
-/*
- * Wavelan Pcmcia driver
- *
- * Jean II - HPLB '96
- *
- * Reorganisation and extension of the driver.
- * Original copyright follow. See wavelan_cs.p.h for details.
- *
- * This code is derived from Anthony D. Joseph's code and all the changes here
- * are also under the original copyright below.
- *
- * This code supports version 2.00 of WaveLAN/PCMCIA cards (2.4GHz), and
- * can work on Linux 2.0.36 with support of David Hinds' PCMCIA Card Services
- *
- * Joe Finney (joe@comp.lancs.ac.uk) at Lancaster University in UK added
- * critical code in the routine to initialize the Modem Management Controller.
- *
- * Thanks to Alan Cox and Bruce Janson for their advice.
- *
- * -- Yunzhou Li (scip4166@nus.sg)
- *
-#ifdef WAVELAN_ROAMING
- * Roaming support added 07/22/98 by Justin Seger (jseger@media.mit.edu)
- * based on patch by Joe Finney from Lancaster University.
-#endif
- *
- * Lucent (formerly AT&T GIS, formerly NCR) WaveLAN PCMCIA card: An
- * Ethernet-like radio transceiver controlled by an Intel 82593 coprocessor.
- *
- * A non-shared memory PCMCIA ethernet driver for linux
- *
- * ISA version modified to support PCMCIA by Anthony Joseph (adj@lcs.mit.edu)
- *
- *
- * Joseph O'Sullivan & John Langford (josullvn@cs.cmu.edu & jcl@cs.cmu.edu)
- *
- * Apr 2 '98 made changes to bring the i82593 control/int handling in line
- * with offical specs...
- *
- ****************************************************************************
- * Copyright 1995
- * Anthony D. Joseph
- * Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this program
- * for any purpose and without fee is hereby granted, provided
- * that this copyright and permission notice appear on all copies
- * and supporting documentation, the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * program without specific prior permission, and notice be given
- * in supporting documentation that copying and distribution is
- * by permission of M.I.T. M.I.T. makes no representations about
- * the suitability of this software for any purpose. It is pro-
- * vided "as is" without express or implied warranty.
- ****************************************************************************
- *
- */
-
-/* Do *NOT* add other headers here, you are guaranteed to be wrong - Jean II */
-#include "wavelan_cs.p.h" /* Private header */
-
-#ifdef WAVELAN_ROAMING
-static void wl_cell_expiry(unsigned long data);
-static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp);
-static void wv_nwid_filter(unsigned char mode, net_local *lp);
-#endif /* WAVELAN_ROAMING */
-
-/************************* MISC SUBROUTINES **************************/
-/*
- * Subroutines which won't fit in one of the following category
- * (wavelan modem or i82593)
- */
-
-/******************* MODEM MANAGEMENT SUBROUTINES *******************/
-/*
- * Useful subroutines to manage the modem of the wavelan
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Read from card's Host Adaptor Status Register.
- */
-static inline u_char
-hasr_read(u_long base)
-{
- return(inb(HASR(base)));
-} /* hasr_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Write to card's Host Adapter Command Register.
- */
-static inline void
-hacr_write(u_long base,
- u_char hacr)
-{
- outb(hacr, HACR(base));
-} /* hacr_write */
-
-/*------------------------------------------------------------------*/
-/*
- * Write to card's Host Adapter Command Register. Include a delay for
- * those times when it is needed.
- */
-static void
-hacr_write_slow(u_long base,
- u_char hacr)
-{
- hacr_write(base, hacr);
- /* delay might only be needed sometimes */
- mdelay(1);
-} /* hacr_write_slow */
-
-/*------------------------------------------------------------------*/
-/*
- * Read the Parameter Storage Area from the WaveLAN card's memory
- */
-static void
-psa_read(struct net_device * dev,
- int o, /* offset in PSA */
- u_char * b, /* buffer to fill */
- int n) /* size to read */
-{
- net_local *lp = netdev_priv(dev);
- u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
-
- while(n-- > 0)
- {
- *b++ = readb(ptr);
- /* Due to a lack of address decode pins, the WaveLAN PCMCIA card
- * only supports reading even memory addresses. That means the
- * increment here MUST be two.
- * Because of that, we can't use memcpy_fromio()...
- */
- ptr += 2;
- }
-} /* psa_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Write the Parameter Storage Area to the WaveLAN card's memory
- */
-static void
-psa_write(struct net_device * dev,
- int o, /* Offset in psa */
- u_char * b, /* Buffer in memory */
- int n) /* Length of buffer */
-{
- net_local *lp = netdev_priv(dev);
- u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
- int count = 0;
- unsigned int base = dev->base_addr;
- /* As there seem to have no flag PSA_BUSY as in the ISA model, we are
- * oblige to verify this address to know when the PSA is ready... */
- volatile u_char __iomem *verify = lp->mem + PSA_ADDR +
- (psaoff(0, psa_comp_number) << 1);
-
- /* Authorize writing to PSA */
- hacr_write(base, HACR_PWR_STAT | HACR_ROM_WEN);
-
- while(n-- > 0)
- {
- /* write to PSA */
- writeb(*b++, ptr);
- ptr += 2;
-
- /* I don't have the spec, so I don't know what the correct
- * sequence to write is. This hack seem to work for me... */
- count = 0;
- while((readb(verify) != PSA_COMP_PCMCIA_915) && (count++ < 100))
- mdelay(1);
- }
-
- /* Put the host interface back in standard state */
- hacr_write(base, HACR_DEFAULT);
-} /* psa_write */
-
-#ifdef SET_PSA_CRC
-/*------------------------------------------------------------------*/
-/*
- * Calculate the PSA CRC
- * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
- * NOTE: By specifying a length including the CRC position the
- * returned value should be zero. (i.e. a correct checksum in the PSA)
- *
- * The Windows drivers don't use the CRC, but the AP and the PtP tool
- * depend on it.
- */
-static u_short
-psa_crc(unsigned char * psa, /* The PSA */
- int size) /* Number of short for CRC */
-{
- int byte_cnt; /* Loop on the PSA */
- u_short crc_bytes = 0; /* Data in the PSA */
- int bit_cnt; /* Loop on the bits of the short */
-
- for(byte_cnt = 0; byte_cnt < size; byte_cnt++ )
- {
- crc_bytes ^= psa[byte_cnt]; /* Its an xor */
-
- for(bit_cnt = 1; bit_cnt < 9; bit_cnt++ )
- {
- if(crc_bytes & 0x0001)
- crc_bytes = (crc_bytes >> 1) ^ 0xA001;
- else
- crc_bytes >>= 1 ;
- }
- }
-
- return crc_bytes;
-} /* psa_crc */
-#endif /* SET_PSA_CRC */
-
-/*------------------------------------------------------------------*/
-/*
- * update the checksum field in the Wavelan's PSA
- */
-static void
-update_psa_checksum(struct net_device * dev)
-{
-#ifdef SET_PSA_CRC
- psa_t psa;
- u_short crc;
-
- /* read the parameter storage area */
- psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
-
- /* update the checksum */
- crc = psa_crc((unsigned char *) &psa,
- sizeof(psa) - sizeof(psa.psa_crc[0]) - sizeof(psa.psa_crc[1])
- - sizeof(psa.psa_crc_status));
-
- psa.psa_crc[0] = crc & 0xFF;
- psa.psa_crc[1] = (crc & 0xFF00) >> 8;
-
- /* Write it ! */
- psa_write(dev, (char *)&psa.psa_crc - (char *)&psa,
- (unsigned char *)&psa.psa_crc, 2);
-
-#ifdef DEBUG_IOCTL_INFO
- printk (KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
- dev->name, psa.psa_crc[0], psa.psa_crc[1]);
-
- /* Check again (luxury !) */
- crc = psa_crc((unsigned char *) &psa,
- sizeof(psa) - sizeof(psa.psa_crc_status));
-
- if(crc != 0)
- printk(KERN_WARNING "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", dev->name);
-#endif /* DEBUG_IOCTL_INFO */
-#endif /* SET_PSA_CRC */
-} /* update_psa_checksum */
-
-/*------------------------------------------------------------------*/
-/*
- * Write 1 byte to the MMC.
- */
-static void
-mmc_out(u_long base,
- u_short o,
- u_char d)
-{
- int count = 0;
-
- /* Wait for MMC to go idle */
- while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
- udelay(10);
-
- outb((u_char)((o << 1) | MMR_MMI_WR), MMR(base));
- outb(d, MMD(base));
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to write bytes to the Modem Management Controller.
- * We start by the end because it is the way it should be !
- */
-static void
-mmc_write(u_long base,
- u_char o,
- u_char * b,
- int n)
-{
- o += n;
- b += n;
-
- while(n-- > 0 )
- mmc_out(base, --o, *(--b));
-} /* mmc_write */
-
-/*------------------------------------------------------------------*/
-/*
- * Read 1 byte from the MMC.
- * Optimised version for 1 byte, avoid using memory...
- */
-static u_char
-mmc_in(u_long base,
- u_short o)
-{
- int count = 0;
-
- while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
- udelay(10);
- outb(o << 1, MMR(base)); /* Set the read address */
-
- outb(0, MMD(base)); /* Required dummy write */
-
- while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
- udelay(10);
- return (u_char) (inb(MMD(base))); /* Now do the actual read */
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to read bytes from the Modem Management Controller.
- * The implementation is complicated by a lack of address lines,
- * which prevents decoding of the low-order bit.
- * (code has just been moved in the above function)
- * We start by the end because it is the way it should be !
- */
-static void
-mmc_read(u_long base,
- u_char o,
- u_char * b,
- int n)
-{
- o += n;
- b += n;
-
- while(n-- > 0)
- *(--b) = mmc_in(base, --o);
-} /* mmc_read */
-
-/*------------------------------------------------------------------*/
-/*
- * Get the type of encryption available...
- */
-static inline int
-mmc_encr(u_long base) /* i/o port of the card */
-{
- int temp;
-
- temp = mmc_in(base, mmroff(0, mmr_des_avail));
- if((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
- return 0;
- else
- return temp;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wait for the frequency EEprom to complete a command...
- */
-static void
-fee_wait(u_long base, /* i/o port of the card */
- int delay, /* Base delay to wait for */
- int number) /* Number of time to wait */
-{
- int count = 0; /* Wait only a limited time */
-
- while((count++ < number) &&
- (mmc_in(base, mmroff(0, mmr_fee_status)) & MMR_FEE_STATUS_BUSY))
- udelay(delay);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Read bytes from the Frequency EEprom (frequency select cards).
- */
-static void
-fee_read(u_long base, /* i/o port of the card */
- u_short o, /* destination offset */
- u_short * b, /* data buffer */
- int n) /* number of registers */
-{
- b += n; /* Position at the end of the area */
-
- /* Write the address */
- mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
-
- /* Loop on all buffer */
- while(n-- > 0)
- {
- /* Write the read command */
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_READ);
-
- /* Wait until EEprom is ready (should be quick !) */
- fee_wait(base, 10, 100);
-
- /* Read the value */
- *--b = ((mmc_in(base, mmroff(0, mmr_fee_data_h)) << 8) |
- mmc_in(base, mmroff(0, mmr_fee_data_l)));
- }
-}
-
-
-/*------------------------------------------------------------------*/
-/*
- * Write bytes from the Frequency EEprom (frequency select cards).
- * This is a bit complicated, because the frequency eeprom has to
- * be unprotected and the write enabled.
- * Jean II
- */
-static void
-fee_write(u_long base, /* i/o port of the card */
- u_short o, /* destination offset */
- u_short * b, /* data buffer */
- int n) /* number of registers */
-{
- b += n; /* Position at the end of the area */
-
-#ifdef EEPROM_IS_PROTECTED /* disabled */
-#ifdef DOESNT_SEEM_TO_WORK /* disabled */
- /* Ask to read the protected register */
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
-
- fee_wait(base, 10, 100);
-
- /* Read the protected register */
- printk("Protected 2 : %02X-%02X\n",
- mmc_in(base, mmroff(0, mmr_fee_data_h)),
- mmc_in(base, mmroff(0, mmr_fee_data_l)));
-#endif /* DOESNT_SEEM_TO_WORK */
-
- /* Enable protected register */
- mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
-
- fee_wait(base, 10, 100);
-
- /* Unprotect area */
- mmc_out(base, mmwoff(0, mmw_fee_addr), o + n);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
-#ifdef DOESNT_SEEM_TO_WORK /* disabled */
- /* Or use : */
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
-#endif /* DOESNT_SEEM_TO_WORK */
-
- fee_wait(base, 10, 100);
-#endif /* EEPROM_IS_PROTECTED */
-
- /* Write enable */
- mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
-
- fee_wait(base, 10, 100);
-
- /* Write the EEprom address */
- mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
-
- /* Loop on all buffer */
- while(n-- > 0)
- {
- /* Write the value */
- mmc_out(base, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
- mmc_out(base, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
-
- /* Write the write command */
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WRITE);
-
- /* Wavelan doc says : wait at least 10 ms for EEBUSY = 0 */
- mdelay(10);
- fee_wait(base, 10, 100);
- }
-
- /* Write disable */
- mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
-
- fee_wait(base, 10, 100);
-
-#ifdef EEPROM_IS_PROTECTED /* disabled */
- /* Reprotect EEprom */
- mmc_out(base, mmwoff(0, mmw_fee_addr), 0x00);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
-
- fee_wait(base, 10, 100);
-#endif /* EEPROM_IS_PROTECTED */
-}
-
-/******************* WaveLAN Roaming routines... ********************/
-
-#ifdef WAVELAN_ROAMING /* Conditional compile, see wavelan_cs.h */
-
-static unsigned char WAVELAN_BEACON_ADDRESS[] = {0x09,0x00,0x0e,0x20,0x03,0x00};
-
-static void wv_roam_init(struct net_device *dev)
-{
- net_local *lp= netdev_priv(dev);
-
- /* Do not remove this unless you have a good reason */
- printk(KERN_NOTICE "%s: Warning, you have enabled roaming on"
- " device %s !\n", dev->name, dev->name);
- printk(KERN_NOTICE "Roaming is currently an experimental unsupported feature"
- " of the Wavelan driver.\n");
- printk(KERN_NOTICE "It may work, but may also make the driver behave in"
- " erratic ways or crash.\n");
-
- lp->wavepoint_table.head=NULL; /* Initialise WavePoint table */
- lp->wavepoint_table.num_wavepoints=0;
- lp->wavepoint_table.locked=0;
- lp->curr_point=NULL; /* No default WavePoint */
- lp->cell_search=0;
-
- lp->cell_timer.data=(long)lp; /* Start cell expiry timer */
- lp->cell_timer.function=wl_cell_expiry;
- lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
- add_timer(&lp->cell_timer);
-
- wv_nwid_filter(NWID_PROMISC,lp) ; /* Enter NWID promiscuous mode */
- /* to build up a good WavePoint */
- /* table... */
- printk(KERN_DEBUG "WaveLAN: Roaming enabled on device %s\n",dev->name);
-}
-
-static void wv_roam_cleanup(struct net_device *dev)
-{
- wavepoint_history *ptr,*old_ptr;
- net_local *lp= netdev_priv(dev);
-
- printk(KERN_DEBUG "WaveLAN: Roaming Disabled on device %s\n",dev->name);
-
- /* Fixme : maybe we should check that the timer exist before deleting it */
- del_timer(&lp->cell_timer); /* Remove cell expiry timer */
- ptr=lp->wavepoint_table.head; /* Clear device's WavePoint table */
- while(ptr!=NULL)
- {
- old_ptr=ptr;
- ptr=ptr->next;
- wl_del_wavepoint(old_ptr,lp);
- }
-}
-
-/* Enable/Disable NWID promiscuous mode on a given device */
-static void wv_nwid_filter(unsigned char mode, net_local *lp)
-{
- mm_t m;
- unsigned long flags;
-
-#ifdef WAVELAN_ROAMING_DEBUG
- printk(KERN_DEBUG "WaveLAN: NWID promisc %s, device %s\n",(mode==NWID_PROMISC) ? "on" : "off", lp->dev->name);
-#endif
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- m.w.mmw_loopt_sel = (mode==NWID_PROMISC) ? MMW_LOOPT_SEL_DIS_NWID : 0x00;
- mmc_write(lp->dev->base_addr, (char *)&m.w.mmw_loopt_sel - (char *)&m, (unsigned char *)&m.w.mmw_loopt_sel, 1);
-
- if(mode==NWID_PROMISC)
- lp->cell_search=1;
- else
- lp->cell_search=0;
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-}
-
-/* Find a record in the WavePoint table matching a given NWID */
-static wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp)
-{
- wavepoint_history *ptr=lp->wavepoint_table.head;
-
- while(ptr!=NULL){
- if(ptr->nwid==nwid)
- return ptr;
- ptr=ptr->next;
- }
- return NULL;
-}
-
-/* Create a new wavepoint table entry */
-static wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local* lp)
-{
- wavepoint_history *new_wavepoint;
-
-#ifdef WAVELAN_ROAMING_DEBUG
- printk(KERN_DEBUG "WaveLAN: New Wavepoint, NWID:%.4X\n",nwid);
-#endif
-
- if(lp->wavepoint_table.num_wavepoints==MAX_WAVEPOINTS)
- return NULL;
-
- new_wavepoint = kmalloc(sizeof(wavepoint_history),GFP_ATOMIC);
- if(new_wavepoint==NULL)
- return NULL;
-
- new_wavepoint->nwid=nwid; /* New WavePoints NWID */
- new_wavepoint->average_fast=0; /* Running Averages..*/
- new_wavepoint->average_slow=0;
- new_wavepoint->qualptr=0; /* Start of ringbuffer */
- new_wavepoint->last_seq=seq-1; /* Last sequence no.seen */
- memset(new_wavepoint->sigqual,0,WAVEPOINT_HISTORY);/* Empty ringbuffer */
-
- new_wavepoint->next=lp->wavepoint_table.head;/* Add to wavepoint table */
- new_wavepoint->prev=NULL;
-
- if(lp->wavepoint_table.head!=NULL)
- lp->wavepoint_table.head->prev=new_wavepoint;
-
- lp->wavepoint_table.head=new_wavepoint;
-
- lp->wavepoint_table.num_wavepoints++; /* no. of visible wavepoints */
-
- return new_wavepoint;
-}
-
-/* Remove a wavepoint entry from WavePoint table */
-static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp)
-{
- if(wavepoint==NULL)
- return;
-
- if(lp->curr_point==wavepoint)
- lp->curr_point=NULL;
-
- if(wavepoint->prev!=NULL)
- wavepoint->prev->next=wavepoint->next;
-
- if(wavepoint->next!=NULL)
- wavepoint->next->prev=wavepoint->prev;
-
- if(lp->wavepoint_table.head==wavepoint)
- lp->wavepoint_table.head=wavepoint->next;
-
- lp->wavepoint_table.num_wavepoints--;
- kfree(wavepoint);
-}
-
-/* Timer callback function - checks WavePoint table for stale entries */
-static void wl_cell_expiry(unsigned long data)
-{
- net_local *lp=(net_local *)data;
- wavepoint_history *wavepoint=lp->wavepoint_table.head,*old_point;
-
-#if WAVELAN_ROAMING_DEBUG > 1
- printk(KERN_DEBUG "WaveLAN: Wavepoint timeout, dev %s\n",lp->dev->name);
-#endif
-
- if(lp->wavepoint_table.locked)
- {
-#if WAVELAN_ROAMING_DEBUG > 1
- printk(KERN_DEBUG "WaveLAN: Wavepoint table locked...\n");
-#endif
-
- lp->cell_timer.expires=jiffies+1; /* If table in use, come back later */
- add_timer(&lp->cell_timer);
- return;
- }
-
- while(wavepoint!=NULL)
- {
- if(time_after(jiffies, wavepoint->last_seen + CELL_TIMEOUT))
- {
-#ifdef WAVELAN_ROAMING_DEBUG
- printk(KERN_DEBUG "WaveLAN: Bye bye %.4X\n",wavepoint->nwid);
-#endif
-
- old_point=wavepoint;
- wavepoint=wavepoint->next;
- wl_del_wavepoint(old_point,lp);
- }
- else
- wavepoint=wavepoint->next;
- }
- lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
- add_timer(&lp->cell_timer);
-}
-
-/* Update SNR history of a wavepoint */
-static void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq)
-{
- int i=0,num_missed=0,ptr=0;
- int average_fast=0,average_slow=0;
-
- num_missed=(seq-wavepoint->last_seq)%WAVEPOINT_HISTORY;/* Have we missed
- any beacons? */
- if(num_missed)
- for(i=0;i<num_missed;i++)
- {
- wavepoint->sigqual[wavepoint->qualptr++]=0; /* If so, enter them as 0's */
- wavepoint->qualptr %=WAVEPOINT_HISTORY; /* in the ringbuffer. */
- }
- wavepoint->last_seen=jiffies; /* Add beacon to history */
- wavepoint->last_seq=seq;
- wavepoint->sigqual[wavepoint->qualptr++]=sigqual;
- wavepoint->qualptr %=WAVEPOINT_HISTORY;
- ptr=(wavepoint->qualptr-WAVEPOINT_FAST_HISTORY+WAVEPOINT_HISTORY)%WAVEPOINT_HISTORY;
-
- for(i=0;i<WAVEPOINT_FAST_HISTORY;i++) /* Update running averages */
- {
- average_fast+=wavepoint->sigqual[ptr++];
- ptr %=WAVEPOINT_HISTORY;
- }
-
- average_slow=average_fast;
- for(i=WAVEPOINT_FAST_HISTORY;i<WAVEPOINT_HISTORY;i++)
- {
- average_slow+=wavepoint->sigqual[ptr++];
- ptr %=WAVEPOINT_HISTORY;
- }
-
- wavepoint->average_fast=average_fast/WAVEPOINT_FAST_HISTORY;
- wavepoint->average_slow=average_slow/WAVEPOINT_HISTORY;
-}
-
-/* Perform a handover to a new WavePoint */
-static void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp)
-{
- unsigned int base = lp->dev->base_addr;
- mm_t m;
- unsigned long flags;
-
- if(wavepoint==lp->curr_point) /* Sanity check... */
- {
- wv_nwid_filter(!NWID_PROMISC,lp);
- return;
- }
-
-#ifdef WAVELAN_ROAMING_DEBUG
- printk(KERN_DEBUG "WaveLAN: Doing handover to %.4X, dev %s\n",wavepoint->nwid,lp->dev->name);
-#endif
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- m.w.mmw_netw_id_l = wavepoint->nwid & 0xFF;
- m.w.mmw_netw_id_h = (wavepoint->nwid & 0xFF00) >> 8;
-
- mmc_write(base, (char *)&m.w.mmw_netw_id_l - (char *)&m, (unsigned char *)&m.w.mmw_netw_id_l, 2);
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- wv_nwid_filter(!NWID_PROMISC,lp);
- lp->curr_point=wavepoint;
-}
-
-/* Called when a WavePoint beacon is received */
-static void wl_roam_gather(struct net_device * dev,
- u_char * hdr, /* Beacon header */
- u_char * stats) /* SNR, Signal quality
- of packet */
-{
- wavepoint_beacon *beacon= (wavepoint_beacon *)hdr; /* Rcvd. Beacon */
- unsigned short nwid=ntohs(beacon->nwid);
- unsigned short sigqual=stats[2] & MMR_SGNL_QUAL; /* SNR of beacon */
- wavepoint_history *wavepoint=NULL; /* WavePoint table entry */
- net_local *lp = netdev_priv(dev); /* Device info */
-
-#ifdef I_NEED_THIS_FEATURE
- /* Some people don't need this, some other may need it */
- nwid=nwid^ntohs(beacon->domain_id);
-#endif
-
-#if WAVELAN_ROAMING_DEBUG > 1
- printk(KERN_DEBUG "WaveLAN: beacon, dev %s:\n",dev->name);
- printk(KERN_DEBUG "Domain: %.4X NWID: %.4X SigQual=%d\n",ntohs(beacon->domain_id),nwid,sigqual);
-#endif
-
- lp->wavepoint_table.locked=1; /* <Mutex> */
-
- wavepoint=wl_roam_check(nwid,lp); /* Find WavePoint table entry */
- if(wavepoint==NULL) /* If no entry, Create a new one... */
- {
- wavepoint=wl_new_wavepoint(nwid,beacon->seq,lp);
- if(wavepoint==NULL)
- goto out;
- }
- if(lp->curr_point==NULL) /* If this is the only WavePoint, */
- wv_roam_handover(wavepoint, lp); /* Jump on it! */
-
- wl_update_history(wavepoint, sigqual, beacon->seq); /* Update SNR history
- stats. */
-
- if(lp->curr_point->average_slow < SEARCH_THRESH_LOW) /* If our current */
- if(!lp->cell_search) /* WavePoint is getting faint, */
- wv_nwid_filter(NWID_PROMISC,lp); /* start looking for a new one */
-
- if(wavepoint->average_slow >
- lp->curr_point->average_slow + WAVELAN_ROAMING_DELTA)
- wv_roam_handover(wavepoint, lp); /* Handover to a better WavePoint */
-
- if(lp->curr_point->average_slow > SEARCH_THRESH_HIGH) /* If our SNR is */
- if(lp->cell_search) /* getting better, drop out of cell search mode */
- wv_nwid_filter(!NWID_PROMISC,lp);
-
-out:
- lp->wavepoint_table.locked=0; /* </MUTEX> :-) */
-}
-
-/* Test this MAC frame a WavePoint beacon */
-static inline int WAVELAN_BEACON(unsigned char *data)
-{
- wavepoint_beacon *beacon= (wavepoint_beacon *)data;
- static const wavepoint_beacon beacon_template={0xaa,0xaa,0x03,0x08,0x00,0x0e,0x20,0x03,0x00};
-
- if(memcmp(beacon,&beacon_template,9)==0)
- return 1;
- else
- return 0;
-}
-#endif /* WAVELAN_ROAMING */
-
-/************************ I82593 SUBROUTINES *************************/
-/*
- * Useful subroutines to manage the Ethernet controller
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to synchronously send a command to the i82593 chip.
- * Should be called with interrupts disabled.
- * (called by wv_packet_write(), wv_ru_stop(), wv_ru_start(),
- * wv_82593_config() & wv_diag())
- */
-static int
-wv_82593_cmd(struct net_device * dev,
- char * str,
- int cmd,
- int result)
-{
- unsigned int base = dev->base_addr;
- int status;
- int wait_completed;
- long spin;
-
- /* Spin until the chip finishes executing its current command (if any) */
- spin = 1000;
- do
- {
- /* Time calibration of the loop */
- udelay(10);
-
- /* Read the interrupt register */
- outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
- status = inb(LCSR(base));
- }
- while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
-
- /* If the interrupt hasn't been posted */
- if (spin < 0) {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "wv_82593_cmd: %s timeout (previous command), status 0x%02x\n",
- str, status);
-#endif
- return(FALSE);
- }
-
- /* Issue the command to the controller */
- outb(cmd, LCCR(base));
-
- /* If we don't have to check the result of the command
- * Note : this mean that the irq handler will deal with that */
- if(result == SR0_NO_RESULT)
- return(TRUE);
-
- /* We are waiting for command completion */
- wait_completed = TRUE;
-
- /* Busy wait while the LAN controller executes the command. */
- spin = 1000;
- do
- {
- /* Time calibration of the loop */
- udelay(10);
-
- /* Read the interrupt register */
- outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
- status = inb(LCSR(base));
-
- /* Check if there was an interrupt posted */
- if((status & SR0_INTERRUPT))
- {
- /* Acknowledge the interrupt */
- outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
-
- /* Check if interrupt is a command completion */
- if(((status & SR0_BOTH_RX_TX) != SR0_BOTH_RX_TX) &&
- ((status & SR0_BOTH_RX_TX) != 0x0) &&
- !(status & SR0_RECEPTION))
- {
- /* Signal command completion */
- wait_completed = FALSE;
- }
- else
- {
- /* Note : Rx interrupts will be handled later, because we can
- * handle multiple Rx packets at once */
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_INFO "wv_82593_cmd: not our interrupt\n");
-#endif
- }
- }
- }
- while(wait_completed && (spin-- > 0));
-
- /* If the interrupt hasn't be posted */
- if(wait_completed)
- {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "wv_82593_cmd: %s timeout, status 0x%02x\n",
- str, status);
-#endif
- return(FALSE);
- }
-
- /* Check the return code returned by the card (see above) against
- * the expected return code provided by the caller */
- if((status & SR0_EVENT_MASK) != result)
- {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "wv_82593_cmd: %s failed, status = 0x%x\n",
- str, status);
-#endif
- return(FALSE);
- }
-
- return(TRUE);
-} /* wv_82593_cmd */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does a 593 op-code number 7, and obtains the diagnose
- * status for the WaveLAN.
- */
-static inline int
-wv_diag(struct net_device * dev)
-{
- return(wv_82593_cmd(dev, "wv_diag(): diagnose",
- OP0_DIAGNOSE, SR0_DIAGNOSE_PASSED));
-} /* wv_diag */
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to read len bytes from the i82593's ring buffer, starting at
- * chip address addr. The results read from the chip are stored in buf.
- * The return value is the address to use for next the call.
- */
-static int
-read_ringbuf(struct net_device * dev,
- int addr,
- char * buf,
- int len)
-{
- unsigned int base = dev->base_addr;
- int ring_ptr = addr;
- int chunk_len;
- char * buf_ptr = buf;
-
- /* Get all the buffer */
- while(len > 0)
- {
- /* Position the Program I/O Register at the ring buffer pointer */
- outb(ring_ptr & 0xff, PIORL(base));
- outb(((ring_ptr >> 8) & PIORH_MASK), PIORH(base));
-
- /* First, determine how much we can read without wrapping around the
- ring buffer */
- if((addr + len) < (RX_BASE + RX_SIZE))
- chunk_len = len;
- else
- chunk_len = RX_BASE + RX_SIZE - addr;
- insb(PIOP(base), buf_ptr, chunk_len);
- buf_ptr += chunk_len;
- len -= chunk_len;
- ring_ptr = (ring_ptr - RX_BASE + chunk_len) % RX_SIZE + RX_BASE;
- }
- return(ring_ptr);
-} /* read_ringbuf */
-
-/*------------------------------------------------------------------*/
-/*
- * Reconfigure the i82593, or at least ask for it...
- * Because wv_82593_config use the transmission buffer, we must do it
- * when we are sure that there is no transmission, so we do it now
- * or in wavelan_packet_xmit() (I can't find any better place,
- * wavelan_interrupt is not an option...), so you may experience
- * some delay sometime...
- */
-static void
-wv_82593_reconfig(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
- struct pcmcia_device * link = lp->link;
- unsigned long flags;
-
- /* Arm the flag, will be cleard in wv_82593_config() */
- lp->reconfig_82593 = TRUE;
-
- /* Check if we can do it now ! */
- if((link->open) && (netif_running(dev)) && !(netif_queue_stopped(dev)))
- {
- spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
- wv_82593_config(dev);
- spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
- }
- else
- {
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG
- "%s: wv_82593_reconfig(): delayed (state = %lX, link = %d)\n",
- dev->name, dev->state, link->open);
-#endif
- }
-}
-
-/********************* DEBUG & INFO SUBROUTINES *********************/
-/*
- * This routines are used in the code to show debug informations.
- * Most of the time, it dump the content of hardware structures...
- */
-
-#ifdef DEBUG_PSA_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted contents of the Parameter Storage Area.
- */
-static void
-wv_psa_show(psa_t * p)
-{
- printk(KERN_DEBUG "##### wavelan psa contents: #####\n");
- printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
- p->psa_io_base_addr_1,
- p->psa_io_base_addr_2,
- p->psa_io_base_addr_3,
- p->psa_io_base_addr_4);
- printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
- p->psa_rem_boot_addr_1,
- p->psa_rem_boot_addr_2,
- p->psa_rem_boot_addr_3);
- printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
- printk("psa_int_req_no: %d\n", p->psa_int_req_no);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
- printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
- printk(KERN_DEBUG "psa_univ_local_sel: %d, ", p->psa_univ_local_sel);
- printk("psa_comp_number: %d, ", p->psa_comp_number);
- printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
- printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
- p->psa_feature_select);
- printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
- printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
- printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
- printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0], p->psa_nwid[1]);
- printk("psa_nwid_select: %d\n", p->psa_nwid_select);
- printk(KERN_DEBUG "psa_encryption_select: %d, ", p->psa_encryption_select);
- printk("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
- p->psa_encryption_key[0],
- p->psa_encryption_key[1],
- p->psa_encryption_key[2],
- p->psa_encryption_key[3],
- p->psa_encryption_key[4],
- p->psa_encryption_key[5],
- p->psa_encryption_key[6],
- p->psa_encryption_key[7]);
- printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
- printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
- p->psa_call_code[0]);
- printk("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
- p->psa_call_code[0],
- p->psa_call_code[1],
- p->psa_call_code[2],
- p->psa_call_code[3],
- p->psa_call_code[4],
- p->psa_call_code[5],
- p->psa_call_code[6],
- p->psa_call_code[7]);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
- p->psa_reserved[0],
- p->psa_reserved[1]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
- printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
- printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
-} /* wv_psa_show */
-#endif /* DEBUG_PSA_SHOW */
-
-#ifdef DEBUG_MMC_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the Modem Management Controller.
- * This function need to be completed...
- */
-static void
-wv_mmc_show(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- mmr_t m;
-
- /* Basic check */
- if(hasr_read(base) & HASR_NO_CLK)
- {
- printk(KERN_WARNING "%s: wv_mmc_show: modem not connected\n",
- dev->name);
- return;
- }
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Read the mmc */
- mmc_out(base, mmwoff(0, mmw_freeze), 1);
- mmc_read(base, 0, (u_char *)&m, sizeof(m));
- mmc_out(base, mmwoff(0, mmw_freeze), 0);
-
- /* Don't forget to update statistics */
- lp->wstats.discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- printk(KERN_DEBUG "##### wavelan modem status registers: #####\n");
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
- m.mmr_unused0[0],
- m.mmr_unused0[1],
- m.mmr_unused0[2],
- m.mmr_unused0[3],
- m.mmr_unused0[4],
- m.mmr_unused0[5],
- m.mmr_unused0[6],
- m.mmr_unused0[7]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
- m.mmr_des_avail, m.mmr_des_status);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
- m.mmr_unused1[0],
- m.mmr_unused1[1],
- m.mmr_unused1[2],
- m.mmr_unused1[3],
- m.mmr_unused1[4]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
- m.mmr_dce_status,
- (m.mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ? "energy detected,":"",
- (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
- "loop test indicated," : "",
- (m.mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ? "transmitter on," : "",
- (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
- "jabber timer expired," : "");
- printk(KERN_DEBUG "Dsp ID: %02X\n",
- m.mmr_dsp_id);
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
- m.mmr_unused2[0],
- m.mmr_unused2[1]);
-#endif /* DEBUG_SHOW_UNUSED */
- printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
- (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
- (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
- printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
- m.mmr_thr_pre_set & MMR_THR_PRE_SET,
- (m.mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" : "below");
- printk(KERN_DEBUG "signal_lvl: %d [%s], ",
- m.mmr_signal_lvl & MMR_SIGNAL_LVL,
- (m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" : "no new msg");
- printk("silence_lvl: %d [%s], ", m.mmr_silence_lvl & MMR_SILENCE_LVL,
- (m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" : "no new update");
- printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
- (m.mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" : "Antenna 0");
-#ifdef DEBUG_SHOW_UNUSED
- printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
-#endif /* DEBUG_SHOW_UNUSED */
-} /* wv_mmc_show */
-#endif /* DEBUG_MMC_SHOW */
-
-#ifdef DEBUG_I82593_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the i82593's receive unit.
- */
-static void
-wv_ru_show(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
-
- printk(KERN_DEBUG "##### wavelan i82593 receiver status: #####\n");
- printk(KERN_DEBUG "ru: rfp %d stop %d", lp->rfp, lp->stop);
- /*
- * Not implemented yet...
- */
- printk("\n");
-} /* wv_ru_show */
-#endif /* DEBUG_I82593_SHOW */
-
-#ifdef DEBUG_DEVICE_SHOW
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the WaveLAN PCMCIA device driver.
- */
-static void
-wv_dev_show(struct net_device * dev)
-{
- printk(KERN_DEBUG "dev:");
- printk(" state=%lX,", dev->state);
- printk(" trans_start=%ld,", dev->trans_start);
- printk(" flags=0x%x,", dev->flags);
- printk("\n");
-} /* wv_dev_show */
-
-/*------------------------------------------------------------------*/
-/*
- * Print the formatted status of the WaveLAN PCMCIA device driver's
- * private information.
- */
-static void
-wv_local_show(struct net_device * dev)
-{
- net_local *lp = netdev_priv(dev);
-
- printk(KERN_DEBUG "local:");
- /*
- * Not implemented yet...
- */
- printk("\n");
-} /* wv_local_show */
-#endif /* DEBUG_DEVICE_SHOW */
-
-#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
-/*------------------------------------------------------------------*/
-/*
- * Dump packet header (and content if necessary) on the screen
- */
-static void
-wv_packet_info(u_char * p, /* Packet to dump */
- int length, /* Length of the packet */
- char * msg1, /* Name of the device */
- char * msg2) /* Name of the function */
-{
- int i;
- int maxi;
-
- printk(KERN_DEBUG "%s: %s(): dest %pM, length %d\n",
- msg1, msg2, p, length);
- printk(KERN_DEBUG "%s: %s(): src %pM, type 0x%02X%02X\n",
- msg1, msg2, &p[6], p[12], p[13]);
-
-#ifdef DEBUG_PACKET_DUMP
-
- printk(KERN_DEBUG "data=\"");
-
- if((maxi = length) > DEBUG_PACKET_DUMP)
- maxi = DEBUG_PACKET_DUMP;
- for(i = 14; i < maxi; i++)
- if(p[i] >= ' ' && p[i] <= '~')
- printk(" %c", p[i]);
- else
- printk("%02X", p[i]);
- if(maxi < length)
- printk("..");
- printk("\"\n");
- printk(KERN_DEBUG "\n");
-#endif /* DEBUG_PACKET_DUMP */
-}
-#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
-
-/*------------------------------------------------------------------*/
-/*
- * This is the information which is displayed by the driver at startup
- * There is a lot of flag to configure it at your will...
- */
-static void
-wv_init_info(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- psa_t psa;
-
- /* Read the parameter storage area */
- psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
-
-#ifdef DEBUG_PSA_SHOW
- wv_psa_show(&psa);
-#endif
-#ifdef DEBUG_MMC_SHOW
- wv_mmc_show(dev);
-#endif
-#ifdef DEBUG_I82593_SHOW
- wv_ru_show(dev);
-#endif
-
-#ifdef DEBUG_BASIC_SHOW
- /* Now, let's go for the basic stuff */
- printk(KERN_NOTICE "%s: WaveLAN: port %#x, irq %d, hw_addr %pM",
- dev->name, base, dev->irq, dev->dev_addr);
-
- /* Print current network id */
- if(psa.psa_nwid_select)
- printk(", nwid 0x%02X-%02X", psa.psa_nwid[0], psa.psa_nwid[1]);
- else
- printk(", nwid off");
-
- /* If 2.00 card */
- if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
- {
- unsigned short freq;
-
- /* Ask the EEprom to read the frequency from the first area */
- fee_read(base, 0x00 /* 1st area - frequency... */,
- &freq, 1);
-
- /* Print frequency */
- printk(", 2.00, %ld", (freq >> 6) + 2400L);
-
- /* Hack !!! */
- if(freq & 0x20)
- printk(".5");
- }
- else
- {
- printk(", PCMCIA, ");
- switch (psa.psa_subband)
- {
- case PSA_SUBBAND_915:
- printk("915");
- break;
- case PSA_SUBBAND_2425:
- printk("2425");
- break;
- case PSA_SUBBAND_2460:
- printk("2460");
- break;
- case PSA_SUBBAND_2484:
- printk("2484");
- break;
- case PSA_SUBBAND_2430_5:
- printk("2430.5");
- break;
- default:
- printk("unknown");
- }
- }
-
- printk(" MHz\n");
-#endif /* DEBUG_BASIC_SHOW */
-
-#ifdef DEBUG_VERSION_SHOW
- /* Print version information */
- printk(KERN_NOTICE "%s", version);
-#endif
-} /* wv_init_info */
-
-/********************* IOCTL, STATS & RECONFIG *********************/
-/*
- * We found here routines that are called by Linux on differents
- * occasions after the configuration and not for transmitting data
- * These may be called when the user use ifconfig, /proc/net/dev
- * or wireless extensions
- */
-
-
-/*------------------------------------------------------------------*/
-/*
- * Set or clear the multicast filter for this adaptor.
- * num_addrs == -1 Promiscuous mode, receive all packets
- * num_addrs == 0 Normal mode, clear multicast list
- * num_addrs > 0 Multicast mode, receive normal and MC packets,
- * and do best-effort filtering.
- */
-
-static void
-wavelan_set_multicast_list(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n", dev->name);
-#endif
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
- dev->name, dev->flags, dev->mc_count);
-#endif
-
- if(dev->flags & IFF_PROMISC)
- {
- /*
- * Enable promiscuous mode: receive all packets.
- */
- if(!lp->promiscuous)
- {
- lp->promiscuous = 1;
- lp->allmulticast = 0;
- lp->mc_count = 0;
-
- wv_82593_reconfig(dev);
- }
- }
- else
- /* If all multicast addresses
- * or too much multicast addresses for the hardware filter */
- if((dev->flags & IFF_ALLMULTI) ||
- (dev->mc_count > I82593_MAX_MULTICAST_ADDRESSES))
- {
- /*
- * Disable promiscuous mode, but active the all multicast mode
- */
- if(!lp->allmulticast)
- {
- lp->promiscuous = 0;
- lp->allmulticast = 1;
- lp->mc_count = 0;
-
- wv_82593_reconfig(dev);
- }
- }
- else
- /* If there is some multicast addresses to send */
- if(dev->mc_list != (struct dev_mc_list *) NULL)
- {
- /*
- * Disable promiscuous mode, but receive all packets
- * in multicast list
- */
-#ifdef MULTICAST_AVOID
- if(lp->promiscuous || lp->allmulticast ||
- (dev->mc_count != lp->mc_count))
-#endif
- {
- lp->promiscuous = 0;
- lp->allmulticast = 0;
- lp->mc_count = dev->mc_count;
-
- wv_82593_reconfig(dev);
- }
- }
- else
- {
- /*
- * Switch to normal mode: disable promiscuous mode and
- * clear the multicast list.
- */
- if(lp->promiscuous || lp->mc_count == 0)
- {
- lp->promiscuous = 0;
- lp->allmulticast = 0;
- lp->mc_count = 0;
-
- wv_82593_reconfig(dev);
- }
- }
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This function doesn't exist...
- * (Note : it was a nice way to test the reconfigure stuff...)
- */
-#ifdef SET_MAC_ADDRESS
-static int
-wavelan_set_mac_address(struct net_device * dev,
- void * addr)
-{
- struct sockaddr * mac = addr;
-
- /* Copy the address */
- memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
-
- /* Reconfig the beast */
- wv_82593_reconfig(dev);
-
- return 0;
-}
-#endif /* SET_MAC_ADDRESS */
-
-
-/*------------------------------------------------------------------*/
-/*
- * Frequency setting (for hardware able of it)
- * It's a bit complicated and you don't really want to look into it...
- */
-static int
-wv_set_frequency(u_long base, /* i/o port of the card */
- iw_freq * frequency)
-{
- const int BAND_NUM = 10; /* Number of bands */
- long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
-#ifdef DEBUG_IOCTL_INFO
- int i;
-#endif
-
- /* Setting by frequency */
- /* Theoritically, you may set any frequency between
- * the two limits with a 0.5 MHz precision. In practice,
- * I don't want you to have trouble with local
- * regulations... */
- if((frequency->e == 1) &&
- (frequency->m >= (int) 2.412e8) && (frequency->m <= (int) 2.487e8))
- {
- freq = ((frequency->m / 10000) - 24000L) / 5;
- }
-
- /* Setting by channel (same as wfreqsel) */
- /* Warning : each channel is 22MHz wide, so some of the channels
- * will interfere... */
- if((frequency->e == 0) &&
- (frequency->m >= 0) && (frequency->m < BAND_NUM))
- {
- /* Get frequency offset. */
- freq = channel_bands[frequency->m] >> 1;
- }
-
- /* Verify if the frequency is allowed */
- if(freq != 0L)
- {
- u_short table[10]; /* Authorized frequency table */
-
- /* Read the frequency table */
- fee_read(base, 0x71 /* frequency table */,
- table, 10);
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "Frequency table :");
- for(i = 0; i < 10; i++)
- {
- printk(" %04X",
- table[i]);
- }
- printk("\n");
-#endif
-
- /* Look in the table if the frequency is allowed */
- if(!(table[9 - ((freq - 24) / 16)] &
- (1 << ((freq - 24) % 16))))
- return -EINVAL; /* not allowed */
- }
- else
- return -EINVAL;
-
- /* If we get a usable frequency */
- if(freq != 0L)
- {
- unsigned short area[16];
- unsigned short dac[2];
- unsigned short area_verify[16];
- unsigned short dac_verify[2];
- /* Corresponding gain (in the power adjust value table)
- * see AT&T Wavelan Data Manual, REF 407-024689/E, page 3-8
- * & WCIN062D.DOC, page 6.2.9 */
- unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
- int power_band = 0; /* Selected band */
- unsigned short power_adjust; /* Correct value */
-
- /* Search for the gain */
- power_band = 0;
- while((freq > power_limit[power_band]) &&
- (power_limit[++power_band] != 0))
- ;
-
- /* Read the first area */
- fee_read(base, 0x00,
- area, 16);
-
- /* Read the DAC */
- fee_read(base, 0x60,
- dac, 2);
-
- /* Read the new power adjust value */
- fee_read(base, 0x6B - (power_band >> 1),
- &power_adjust, 1);
- if(power_band & 0x1)
- power_adjust >>= 8;
- else
- power_adjust &= 0xFF;
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
- for(i = 0; i < 16; i++)
- {
- printk(" %04X",
- area[i]);
- }
- printk("\n");
-
- printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
- dac[0], dac[1]);
-#endif
-
- /* Frequency offset (for info only...) */
- area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
-
- /* Receiver Principle main divider coefficient */
- area[3] = (freq >> 1) + 2400L - 352L;
- area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
-
- /* Transmitter Main divider coefficient */
- area[13] = (freq >> 1) + 2400L;
- area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
-
- /* Others part of the area are flags, bit streams or unused... */
-
- /* Set the value in the DAC */
- dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
- dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
-
- /* Write the first area */
- fee_write(base, 0x00,
- area, 16);
-
- /* Write the DAC */
- fee_write(base, 0x60,
- dac, 2);
-
- /* We now should verify here that the EEprom writing was ok */
-
- /* ReRead the first area */
- fee_read(base, 0x00,
- area_verify, 16);
-
- /* ReRead the DAC */
- fee_read(base, 0x60,
- dac_verify, 2);
-
- /* Compare */
- if(memcmp(area, area_verify, 16 * 2) ||
- memcmp(dac, dac_verify, 2 * 2))
- {
-#ifdef DEBUG_IOCTL_ERROR
- printk(KERN_INFO "Wavelan: wv_set_frequency : unable to write new frequency to EEprom (?)\n");
-#endif
- return -EOPNOTSUPP;
- }
-
- /* We must download the frequency parameters to the
- * synthetisers (from the EEprom - area 1)
- * Note : as the EEprom is auto decremented, we set the end
- * if the area... */
- mmc_out(base, mmwoff(0, mmw_fee_addr), 0x0F);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
-
- /* Wait until the download is finished */
- fee_wait(base, 100, 100);
-
- /* We must now download the power adjust value (gain) to
- * the synthetisers (from the EEprom - area 7 - DAC) */
- mmc_out(base, mmwoff(0, mmw_fee_addr), 0x61);
- mmc_out(base, mmwoff(0, mmw_fee_ctrl),
- MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
-
- /* Wait until the download is finished */
- fee_wait(base, 100, 100);
-
-#ifdef DEBUG_IOCTL_INFO
- /* Verification of what we have done... */
-
- printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
- for(i = 0; i < 16; i++)
- {
- printk(" %04X",
- area_verify[i]);
- }
- printk("\n");
-
- printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
- dac_verify[0], dac_verify[1]);
-#endif
-
- return 0;
- }
- else
- return -EINVAL; /* Bah, never get there... */
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Give the list of available frequencies
- */
-static int
-wv_frequency_list(u_long base, /* i/o port of the card */
- iw_freq * list, /* List of frequency to fill */
- int max) /* Maximum number of frequencies */
-{
- u_short table[10]; /* Authorized frequency table */
- long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
- int i; /* index in the table */
- const int BAND_NUM = 10; /* Number of bands */
- int c = 0; /* Channel number */
-
- /* Read the frequency table */
- fee_read(base, 0x71 /* frequency table */,
- table, 10);
-
- /* Look all frequencies */
- i = 0;
- for(freq = 0; freq < 150; freq++)
- /* Look in the table if the frequency is allowed */
- if(table[9 - (freq / 16)] & (1 << (freq % 16)))
- {
- /* Compute approximate channel number */
- while((((channel_bands[c] >> 1) - 24) < freq) &&
- (c < BAND_NUM))
- c++;
- list[i].i = c; /* Set the list index */
-
- /* put in the list */
- list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
- list[i++].e = 1;
-
- /* Check number */
- if(i >= max)
- return(i);
- }
-
- return(i);
-}
-
-#ifdef IW_WIRELESS_SPY
-/*------------------------------------------------------------------*/
-/*
- * Gather wireless spy statistics : for each packet, compare the source
- * address with out list, and if match, get the stats...
- * Sorry, but this function really need wireless extensions...
- */
-static inline void
-wl_spy_gather(struct net_device * dev,
- u_char * mac, /* MAC address */
- u_char * stats) /* Statistics to gather */
-{
- struct iw_quality wstats;
-
- wstats.qual = stats[2] & MMR_SGNL_QUAL;
- wstats.level = stats[0] & MMR_SIGNAL_LVL;
- wstats.noise = stats[1] & MMR_SILENCE_LVL;
- wstats.updated = 0x7;
-
- /* Update spy records */
- wireless_spy_update(dev, mac, &wstats);
-}
-#endif /* IW_WIRELESS_SPY */
-
-#ifdef HISTOGRAM
-/*------------------------------------------------------------------*/
-/*
- * This function calculate an histogram on the signal level.
- * As the noise is quite constant, it's like doing it on the SNR.
- * We have defined a set of interval (lp->his_range), and each time
- * the level goes in that interval, we increment the count (lp->his_sum).
- * With this histogram you may detect if one wavelan is really weak,
- * or you may also calculate the mean and standard deviation of the level...
- */
-static inline void
-wl_his_gather(struct net_device * dev,
- u_char * stats) /* Statistics to gather */
-{
- net_local * lp = netdev_priv(dev);
- u_char level = stats[0] & MMR_SIGNAL_LVL;
- int i;
-
- /* Find the correct interval */
- i = 0;
- while((i < (lp->his_number - 1)) && (level >= lp->his_range[i++]))
- ;
-
- /* Increment interval counter */
- (lp->his_sum[i])++;
-}
-#endif /* HISTOGRAM */
-
-static void wl_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
- strncpy(info->driver, "wavelan_cs", sizeof(info->driver)-1);
-}
-
-static const struct ethtool_ops ops = {
- .get_drvinfo = wl_get_drvinfo
-};
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get protocol name
- */
-static int wavelan_get_name(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- strcpy(wrqu->name, "WaveLAN");
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set NWID
- */
-static int wavelan_set_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- mm_t m;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Set NWID in WaveLAN. */
- if (!wrqu->nwid.disabled) {
- /* Set NWID in psa */
- psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
- psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
- psa.psa_nwid_select = 0x01;
- psa_write(dev,
- (char *) psa.psa_nwid - (char *) &psa,
- (unsigned char *) psa.psa_nwid, 3);
-
- /* Set NWID in mmc. */
- m.w.mmw_netw_id_l = psa.psa_nwid[1];
- m.w.mmw_netw_id_h = psa.psa_nwid[0];
- mmc_write(base,
- (char *) &m.w.mmw_netw_id_l -
- (char *) &m,
- (unsigned char *) &m.w.mmw_netw_id_l, 2);
- mmc_out(base, mmwoff(0, mmw_loopt_sel), 0x00);
- } else {
- /* Disable NWID in the psa. */
- psa.psa_nwid_select = 0x00;
- psa_write(dev,
- (char *) &psa.psa_nwid_select -
- (char *) &psa,
- (unsigned char *) &psa.psa_nwid_select,
- 1);
-
- /* Disable NWID in the mmc (no filtering). */
- mmc_out(base, mmwoff(0, mmw_loopt_sel),
- MMW_LOOPT_SEL_DIS_NWID);
- }
- /* update the Wavelan checksum */
- update_psa_checksum(dev);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get NWID
- */
-static int wavelan_get_nwid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Read the NWID. */
- psa_read(dev,
- (char *) psa.psa_nwid - (char *) &psa,
- (unsigned char *) psa.psa_nwid, 3);
- wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
- wrqu->nwid.disabled = !(psa.psa_nwid_select);
- wrqu->nwid.fixed = 1; /* Superfluous */
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set frequency
- */
-static int wavelan_set_freq(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
- int ret;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
- if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
- ret = wv_set_frequency(base, &(wrqu->freq));
- else
- ret = -EOPNOTSUPP;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get frequency
- */
-static int wavelan_get_freq(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
- * Does it work for everybody, especially old cards? */
- if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- unsigned short freq;
-
- /* Ask the EEPROM to read the frequency from the first area. */
- fee_read(base, 0x00, &freq, 1);
- wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
- wrqu->freq.e = 1;
- } else {
- psa_read(dev,
- (char *) &psa.psa_subband - (char *) &psa,
- (unsigned char *) &psa.psa_subband, 1);
-
- if (psa.psa_subband <= 4) {
- wrqu->freq.m = fixed_bands[psa.psa_subband];
- wrqu->freq.e = (psa.psa_subband != 0);
- } else
- ret = -EOPNOTSUPP;
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set level threshold
- */
-static int wavelan_set_sens(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Set the level threshold. */
- /* We should complain loudly if wrqu->sens.fixed = 0, because we
- * can't set auto mode... */
- psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
- psa_write(dev,
- (char *) &psa.psa_thr_pre_set - (char *) &psa,
- (unsigned char *) &psa.psa_thr_pre_set, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev);
- mmc_out(base, mmwoff(0, mmw_thr_pre_set),
- psa.psa_thr_pre_set);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get level threshold
- */
-static int wavelan_get_sens(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Read the level threshold. */
- psa_read(dev,
- (char *) &psa.psa_thr_pre_set - (char *) &psa,
- (unsigned char *) &psa.psa_thr_pre_set, 1);
- wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
- wrqu->sens.fixed = 1;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set encryption key
- */
-static int wavelan_set_encode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
- psa_t psa;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check if capable of encryption */
- if (!mmc_encr(base)) {
- ret = -EOPNOTSUPP;
- }
-
- /* Check the size of the key */
- if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
- ret = -EINVAL;
- }
-
- if(!ret) {
- /* Basic checking... */
- if (wrqu->encoding.length == 8) {
- /* Copy the key in the driver */
- memcpy(psa.psa_encryption_key, extra,
- wrqu->encoding.length);
- psa.psa_encryption_select = 1;
-
- psa_write(dev,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 8 + 1);
-
- mmc_out(base, mmwoff(0, mmw_encr_enable),
- MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
- mmc_write(base, mmwoff(0, mmw_encr_key),
- (unsigned char *) &psa.
- psa_encryption_key, 8);
- }
-
- /* disable encryption */
- if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
- psa.psa_encryption_select = 0;
- psa_write(dev,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 1);
-
- mmc_out(base, mmwoff(0, mmw_encr_enable), 0);
- }
- /* update the Wavelan checksum */
- update_psa_checksum(dev);
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get encryption key
- */
-static int wavelan_get_encode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check if encryption is available */
- if (!mmc_encr(base)) {
- ret = -EOPNOTSUPP;
- } else {
- /* Read the encryption key */
- psa_read(dev,
- (char *) &psa.psa_encryption_select -
- (char *) &psa,
- (unsigned char *) &psa.
- psa_encryption_select, 1 + 8);
-
- /* encryption is enabled ? */
- if (psa.psa_encryption_select)
- wrqu->encoding.flags = IW_ENCODE_ENABLED;
- else
- wrqu->encoding.flags = IW_ENCODE_DISABLED;
- wrqu->encoding.flags |= mmc_encr(base);
-
- /* Copy the key to the user buffer */
- wrqu->encoding.length = 8;
- memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-#ifdef WAVELAN_ROAMING_EXT
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set ESSID (domain)
- */
-static int wavelan_set_essid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check if disable */
- if(wrqu->data.flags == 0)
- lp->filter_domains = 0;
- else {
- char essid[IW_ESSID_MAX_SIZE + 1];
- char * endp;
-
- /* Terminate the string */
- memcpy(essid, extra, wrqu->data.length);
- essid[IW_ESSID_MAX_SIZE] = '\0';
-
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "SetEssid : ``%s''\n", essid);
-#endif /* DEBUG_IOCTL_INFO */
-
- /* Convert to a number (note : Wavelan specific) */
- lp->domain_id = simple_strtoul(essid, &endp, 16);
- /* Has it worked ? */
- if(endp > essid)
- lp->filter_domains = 1;
- else {
- lp->filter_domains = 0;
- ret = -EINVAL;
- }
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get ESSID (domain)
- */
-static int wavelan_get_essid(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
-
- /* Is the domain ID active ? */
- wrqu->data.flags = lp->filter_domains;
-
- /* Copy Domain ID into a string (Wavelan specific) */
- /* Sound crazy, be we can't have a snprintf in the kernel !!! */
- sprintf(extra, "%lX", lp->domain_id);
- extra[IW_ESSID_MAX_SIZE] = '\0';
-
- /* Set the length */
- wrqu->data.length = strlen(extra);
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set AP address
- */
-static int wavelan_set_wap(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
-#ifdef DEBUG_IOCTL_INFO
- printk(KERN_DEBUG "Set AP to : %pM\n", wrqu->ap_addr.sa_data);
-#endif /* DEBUG_IOCTL_INFO */
-
- return -EOPNOTSUPP;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get AP address
- */
-static int wavelan_get_wap(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- /* Should get the real McCoy instead of own Ethernet address */
- memcpy(wrqu->ap_addr.sa_data, dev->dev_addr, WAVELAN_ADDR_SIZE);
- wrqu->ap_addr.sa_family = ARPHRD_ETHER;
-
- return -EOPNOTSUPP;
-}
-#endif /* WAVELAN_ROAMING_EXT */
-
-#ifdef WAVELAN_ROAMING
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : set mode
- */
-static int wavelan_set_mode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
- int ret = 0;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Check mode */
- switch(wrqu->mode) {
- case IW_MODE_ADHOC:
- if(do_roaming) {
- wv_roam_cleanup(dev);
- do_roaming = 0;
- }
- break;
- case IW_MODE_INFRA:
- if(!do_roaming) {
- wv_roam_init(dev);
- do_roaming = 1;
- }
- break;
- default:
- ret = -EINVAL;
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get mode
- */
-static int wavelan_get_mode(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- if(do_roaming)
- wrqu->mode = IW_MODE_INFRA;
- else
- wrqu->mode = IW_MODE_ADHOC;
-
- return 0;
-}
-#endif /* WAVELAN_ROAMING */
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Handler : get range info
- */
-static int wavelan_get_range(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- struct iw_range *range = (struct iw_range *) extra;
- unsigned long flags;
- int ret = 0;
-
- /* Set the length (very important for backward compatibility) */
- wrqu->data.length = sizeof(struct iw_range);
-
- /* Set all the info we don't care or don't know about to zero */
- memset(range, 0, sizeof(struct iw_range));
-
- /* Set the Wireless Extension versions */
- range->we_version_compiled = WIRELESS_EXT;
- range->we_version_source = 9;
-
- /* Set information in the range struct. */
- range->throughput = 1.4 * 1000 * 1000; /* don't argue on this ! */
- range->min_nwid = 0x0000;
- range->max_nwid = 0xFFFF;
-
- range->sensitivity = 0x3F;
- range->max_qual.qual = MMR_SGNL_QUAL;
- range->max_qual.level = MMR_SIGNAL_LVL;
- range->max_qual.noise = MMR_SILENCE_LVL;
- range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
- /* Need to get better values for those two */
- range->avg_qual.level = 30;
- range->avg_qual.noise = 8;
-
- range->num_bitrates = 1;
- range->bitrate[0] = 2000000; /* 2 Mb/s */
-
- /* Event capability (kernel + driver) */
- range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
- IW_EVENT_CAPA_MASK(0x8B04) |
- IW_EVENT_CAPA_MASK(0x8B06));
- range->event_capa[1] = IW_EVENT_CAPA_K_1;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
- if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
- range->num_channels = 10;
- range->num_frequency = wv_frequency_list(base, range->freq,
- IW_MAX_FREQUENCIES);
- } else
- range->num_channels = range->num_frequency = 0;
-
- /* Encryption supported ? */
- if (mmc_encr(base)) {
- range->encoding_size[0] = 8; /* DES = 64 bits key */
- range->num_encoding_sizes = 1;
- range->max_encoding_tokens = 1; /* Only one key possible */
- } else {
- range->num_encoding_sizes = 0;
- range->max_encoding_tokens = 0;
- }
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return ret;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : set quality threshold
- */
-static int wavelan_set_qthr(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- unsigned int base = dev->base_addr;
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- psa.psa_quality_thr = *(extra) & 0x0F;
- psa_write(dev,
- (char *) &psa.psa_quality_thr - (char *) &psa,
- (unsigned char *) &psa.psa_quality_thr, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev);
- mmc_out(base, mmwoff(0, mmw_quality_thr),
- psa.psa_quality_thr);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : get quality threshold
- */
-static int wavelan_get_qthr(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- psa_t psa;
- unsigned long flags;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- psa_read(dev,
- (char *) &psa.psa_quality_thr - (char *) &psa,
- (unsigned char *) &psa.psa_quality_thr, 1);
- *(extra) = psa.psa_quality_thr & 0x0F;
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return 0;
-}
-
-#ifdef WAVELAN_ROAMING
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : set roaming
- */
-static int wavelan_set_roam(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
- unsigned long flags;
-
- /* Disable interrupts and save flags. */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Note : should check if user == root */
- if(do_roaming && (*extra)==0)
- wv_roam_cleanup(dev);
- else if(do_roaming==0 && (*extra)!=0)
- wv_roam_init(dev);
-
- do_roaming = (*extra);
-
- /* Enable interrupts and restore flags. */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : get quality threshold
- */
-static int wavelan_get_roam(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- *(extra) = do_roaming;
-
- return 0;
-}
-#endif /* WAVELAN_ROAMING */
-
-#ifdef HISTOGRAM
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : set histogram
- */
-static int wavelan_set_histo(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
-
- /* Check the number of intervals. */
- if (wrqu->data.length > 16) {
- return(-E2BIG);
- }
-
- /* Disable histo while we copy the addresses.
- * As we don't disable interrupts, we need to do this */
- lp->his_number = 0;
-
- /* Are there ranges to copy? */
- if (wrqu->data.length > 0) {
- /* Copy interval ranges to the driver */
- memcpy(lp->his_range, extra, wrqu->data.length);
-
- {
- int i;
- printk(KERN_DEBUG "Histo :");
- for(i = 0; i < wrqu->data.length; i++)
- printk(" %d", lp->his_range[i]);
- printk("\n");
- }
-
- /* Reset result structure. */
- memset(lp->his_sum, 0x00, sizeof(long) * 16);
- }
-
- /* Now we can set the number of ranges */
- lp->his_number = wrqu->data.length;
-
- return(0);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Wireless Private Handler : get histogram
- */
-static int wavelan_get_histo(struct net_device *dev,
- struct iw_request_info *info,
- union iwreq_data *wrqu,
- char *extra)
-{
- net_local *lp = netdev_priv(dev);
-
- /* Set the number of intervals. */
- wrqu->data.length = lp->his_number;
-
- /* Give back the distribution statistics */
- if(lp->his_number > 0)
- memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
-
- return(0);
-}
-#endif /* HISTOGRAM */
-
-/*------------------------------------------------------------------*/
-/*
- * Structures to export the Wireless Handlers
- */
-
-static const struct iw_priv_args wavelan_private_args[] = {
-/*{ cmd, set_args, get_args, name } */
- { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
- { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
- { SIOCSIPROAM, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setroam" },
- { SIOCGIPROAM, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getroam" },
- { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
- { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
-};
-
-static const iw_handler wavelan_handler[] =
-{
- NULL, /* SIOCSIWNAME */
- wavelan_get_name, /* SIOCGIWNAME */
- wavelan_set_nwid, /* SIOCSIWNWID */
- wavelan_get_nwid, /* SIOCGIWNWID */
- wavelan_set_freq, /* SIOCSIWFREQ */
- wavelan_get_freq, /* SIOCGIWFREQ */
-#ifdef WAVELAN_ROAMING
- wavelan_set_mode, /* SIOCSIWMODE */
- wavelan_get_mode, /* SIOCGIWMODE */
-#else /* WAVELAN_ROAMING */
- NULL, /* SIOCSIWMODE */
- NULL, /* SIOCGIWMODE */
-#endif /* WAVELAN_ROAMING */
- wavelan_set_sens, /* SIOCSIWSENS */
- wavelan_get_sens, /* SIOCGIWSENS */
- NULL, /* SIOCSIWRANGE */
- wavelan_get_range, /* SIOCGIWRANGE */
- NULL, /* SIOCSIWPRIV */
- NULL, /* SIOCGIWPRIV */
- NULL, /* SIOCSIWSTATS */
- NULL, /* SIOCGIWSTATS */
- iw_handler_set_spy, /* SIOCSIWSPY */
- iw_handler_get_spy, /* SIOCGIWSPY */
- iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
- iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
-#ifdef WAVELAN_ROAMING_EXT
- wavelan_set_wap, /* SIOCSIWAP */
- wavelan_get_wap, /* SIOCGIWAP */
- NULL, /* -- hole -- */
- NULL, /* SIOCGIWAPLIST */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- wavelan_set_essid, /* SIOCSIWESSID */
- wavelan_get_essid, /* SIOCGIWESSID */
-#else /* WAVELAN_ROAMING_EXT */
- NULL, /* SIOCSIWAP */
- NULL, /* SIOCGIWAP */
- NULL, /* -- hole -- */
- NULL, /* SIOCGIWAPLIST */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWESSID */
- NULL, /* SIOCGIWESSID */
-#endif /* WAVELAN_ROAMING_EXT */
- NULL, /* SIOCSIWNICKN */
- NULL, /* SIOCGIWNICKN */
- NULL, /* -- hole -- */
- NULL, /* -- hole -- */
- NULL, /* SIOCSIWRATE */
- NULL, /* SIOCGIWRATE */
- NULL, /* SIOCSIWRTS */
- NULL, /* SIOCGIWRTS */
- NULL, /* SIOCSIWFRAG */
- NULL, /* SIOCGIWFRAG */
- NULL, /* SIOCSIWTXPOW */
- NULL, /* SIOCGIWTXPOW */
- NULL, /* SIOCSIWRETRY */
- NULL, /* SIOCGIWRETRY */
- wavelan_set_encode, /* SIOCSIWENCODE */
- wavelan_get_encode, /* SIOCGIWENCODE */
-};
-
-static const iw_handler wavelan_private_handler[] =
-{
- wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
- wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
-#ifdef WAVELAN_ROAMING
- wavelan_set_roam, /* SIOCIWFIRSTPRIV + 2 */
- wavelan_get_roam, /* SIOCIWFIRSTPRIV + 3 */
-#else /* WAVELAN_ROAMING */
- NULL, /* SIOCIWFIRSTPRIV + 2 */
- NULL, /* SIOCIWFIRSTPRIV + 3 */
-#endif /* WAVELAN_ROAMING */
-#ifdef HISTOGRAM
- wavelan_set_histo, /* SIOCIWFIRSTPRIV + 4 */
- wavelan_get_histo, /* SIOCIWFIRSTPRIV + 5 */
-#endif /* HISTOGRAM */
-};
-
-static const struct iw_handler_def wavelan_handler_def =
-{
- .num_standard = ARRAY_SIZE(wavelan_handler),
- .num_private = ARRAY_SIZE(wavelan_private_handler),
- .num_private_args = ARRAY_SIZE(wavelan_private_args),
- .standard = wavelan_handler,
- .private = wavelan_private_handler,
- .private_args = wavelan_private_args,
- .get_wireless_stats = wavelan_get_wireless_stats,
-};
-
-/*------------------------------------------------------------------*/
-/*
- * Get wireless statistics
- * Called by /proc/net/wireless...
- */
-static iw_stats *
-wavelan_get_wireless_stats(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- mmr_t m;
- iw_stats * wstats;
- unsigned long flags;
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n", dev->name);
-#endif
-
- /* Disable interrupts & save flags */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- wstats = &lp->wstats;
-
- /* Get data from the mmc */
- mmc_out(base, mmwoff(0, mmw_freeze), 1);
-
- mmc_read(base, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
- mmc_read(base, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, 2);
- mmc_read(base, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set, 4);
-
- mmc_out(base, mmwoff(0, mmw_freeze), 0);
-
- /* Copy data to wireless stuff */
- wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
- wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
- wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
- wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
- wstats->qual.updated = (((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7) |
- ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6) |
- ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
- wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
- wstats->discard.code = 0L;
- wstats->discard.misc = 0L;
-
- /* ReEnable interrupts & restore flags */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_IOCTL_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n", dev->name);
-#endif
- return &lp->wstats;
-}
-
-/************************* PACKET RECEPTION *************************/
-/*
- * This part deal with receiving the packets.
- * The interrupt handler get an interrupt when a packet has been
- * successfully received and called this part...
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Calculate the starting address of the frame pointed to by the receive
- * frame pointer and verify that the frame seem correct
- * (called by wv_packet_rcv())
- */
-static int
-wv_start_of_frame(struct net_device * dev,
- int rfp, /* end of frame */
- int wrap) /* start of buffer */
-{
- unsigned int base = dev->base_addr;
- int rp;
- int len;
-
- rp = (rfp - 5 + RX_SIZE) % RX_SIZE;
- outb(rp & 0xff, PIORL(base));
- outb(((rp >> 8) & PIORH_MASK), PIORH(base));
- len = inb(PIOP(base));
- len |= inb(PIOP(base)) << 8;
-
- /* Sanity checks on size */
- /* Frame too big */
- if(len > MAXDATAZ + 100)
- {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO "%s: wv_start_of_frame: Received frame too large, rfp %d len 0x%x\n",
- dev->name, rfp, len);
-#endif
- return(-1);
- }
-
- /* Frame too short */
- if(len < 7)
- {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO "%s: wv_start_of_frame: Received null frame, rfp %d len 0x%x\n",
- dev->name, rfp, len);
-#endif
- return(-1);
- }
-
- /* Wrap around buffer */
- if(len > ((wrap - (rfp - len) + RX_SIZE) % RX_SIZE)) /* magic formula ! */
- {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO "%s: wv_start_of_frame: wrap around buffer, wrap %d rfp %d len 0x%x\n",
- dev->name, wrap, rfp, len);
-#endif
- return(-1);
- }
-
- return((rp - len + RX_SIZE) % RX_SIZE);
-} /* wv_start_of_frame */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does the actual copy of data (including the ethernet
- * header structure) from the WaveLAN card to an sk_buff chain that
- * will be passed up to the network interface layer. NOTE: We
- * currently don't handle trailer protocols (neither does the rest of
- * the network interface), so if that is needed, it will (at least in
- * part) be added here. The contents of the receive ring buffer are
- * copied to a message chain that is then passed to the kernel.
- *
- * Note: if any errors occur, the packet is "dropped on the floor"
- * (called by wv_packet_rcv())
- */
-static void
-wv_packet_read(struct net_device * dev,
- int fd_p,
- int sksize)
-{
- net_local * lp = netdev_priv(dev);
- struct sk_buff * skb;
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
- dev->name, fd_p, sksize);
-#endif
-
- /* Allocate some buffer for the new packet */
- if((skb = dev_alloc_skb(sksize+2)) == (struct sk_buff *) NULL)
- {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC)\n",
- dev->name, sksize);
-#endif
- dev->stats.rx_dropped++;
- /*
- * Not only do we want to return here, but we also need to drop the
- * packet on the floor to clear the interrupt.
- */
- return;
- }
-
- skb_reserve(skb, 2);
- fd_p = read_ringbuf(dev, fd_p, (char *) skb_put(skb, sksize), sksize);
- skb->protocol = eth_type_trans(skb, dev);
-
-#ifdef DEBUG_RX_INFO
- wv_packet_info(skb_mac_header(skb), sksize, dev->name, "wv_packet_read");
-#endif /* DEBUG_RX_INFO */
-
- /* Statistics gathering & stuff associated.
- * It seem a bit messy with all the define, but it's really simple... */
- if(
-#ifdef IW_WIRELESS_SPY
- (lp->spy_data.spy_number > 0) ||
-#endif /* IW_WIRELESS_SPY */
-#ifdef HISTOGRAM
- (lp->his_number > 0) ||
-#endif /* HISTOGRAM */
-#ifdef WAVELAN_ROAMING
- (do_roaming) ||
-#endif /* WAVELAN_ROAMING */
- 0)
- {
- u_char stats[3]; /* Signal level, Noise level, Signal quality */
-
- /* read signal level, silence level and signal quality bytes */
- fd_p = read_ringbuf(dev, (fd_p + 4) % RX_SIZE + RX_BASE,
- stats, 3);
-#ifdef DEBUG_RX_INFO
- printk(KERN_DEBUG "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
- dev->name, stats[0] & 0x3F, stats[1] & 0x3F, stats[2] & 0x0F);
-#endif
-
-#ifdef WAVELAN_ROAMING
- if(do_roaming)
- if(WAVELAN_BEACON(skb->data))
- wl_roam_gather(dev, skb->data, stats);
-#endif /* WAVELAN_ROAMING */
-
-#ifdef WIRELESS_SPY
- wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE, stats);
-#endif /* WIRELESS_SPY */
-#ifdef HISTOGRAM
- wl_his_gather(dev, stats);
-#endif /* HISTOGRAM */
- }
-
- /*
- * Hand the packet to the Network Module
- */
- netif_rx(skb);
-
- /* Keep stats up to date */
- dev->stats.rx_packets++;
- dev->stats.rx_bytes += sksize;
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
-#endif
- return;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine is called by the interrupt handler to initiate a
- * packet transfer from the card to the network interface layer above
- * this driver. This routine checks if a buffer has been successfully
- * received by the WaveLAN card. If so, the routine wv_packet_read is
- * called to do the actual transfer of the card's data including the
- * ethernet header into a packet consisting of an sk_buff chain.
- * (called by wavelan_interrupt())
- * Note : the spinlock is already grabbed for us and irq are disabled.
- */
-static void
-wv_packet_rcv(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- int newrfp;
- int rp;
- int len;
- int f_start;
- int status;
- int i593_rfp;
- int stat_ptr;
- u_char c[4];
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: ->wv_packet_rcv()\n", dev->name);
-#endif
-
- /* Get the new receive frame pointer from the i82593 chip */
- outb(CR0_STATUS_2 | OP0_NOP, LCCR(base));
- i593_rfp = inb(LCSR(base));
- i593_rfp |= inb(LCSR(base)) << 8;
- i593_rfp %= RX_SIZE;
-
- /* Get the new receive frame pointer from the WaveLAN card.
- * It is 3 bytes more than the increment of the i82593 receive
- * frame pointer, for each packet. This is because it includes the
- * 3 roaming bytes added by the mmc.
- */
- newrfp = inb(RPLL(base));
- newrfp |= inb(RPLH(base)) << 8;
- newrfp %= RX_SIZE;
-
-#ifdef DEBUG_RX_INFO
- printk(KERN_DEBUG "%s: wv_packet_rcv(): i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
- dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
-#endif
-
-#ifdef DEBUG_RX_ERROR
- /* If no new frame pointer... */
- if(lp->overrunning || newrfp == lp->rfp)
- printk(KERN_INFO "%s: wv_packet_rcv(): no new frame: i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
- dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
-#endif
-
- /* Read all frames (packets) received */
- while(newrfp != lp->rfp)
- {
- /* A frame is composed of the packet, followed by a status word,
- * the length of the frame (word) and the mmc info (SNR & qual).
- * It's because the length is at the end that we can only scan
- * frames backward. */
-
- /* Find the first frame by skipping backwards over the frames */
- rp = newrfp; /* End of last frame */
- while(((f_start = wv_start_of_frame(dev, rp, newrfp)) != lp->rfp) &&
- (f_start != -1))
- rp = f_start;
-
- /* If we had a problem */
- if(f_start == -1)
- {
-#ifdef DEBUG_RX_ERROR
- printk(KERN_INFO "wavelan_cs: cannot find start of frame ");
- printk(" i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
- i593_rfp, lp->stop, newrfp, lp->rfp);
-#endif
- lp->rfp = rp; /* Get to the last usable frame */
- continue;
- }
-
- /* f_start point to the beggining of the first frame received
- * and rp to the beggining of the next one */
-
- /* Read status & length of the frame */
- stat_ptr = (rp - 7 + RX_SIZE) % RX_SIZE;
- stat_ptr = read_ringbuf(dev, stat_ptr, c, 4);
- status = c[0] | (c[1] << 8);
- len = c[2] | (c[3] << 8);
-
- /* Check status */
- if((status & RX_RCV_OK) != RX_RCV_OK)
- {
- dev->stats.rx_errors++;
- if(status & RX_NO_SFD)
- dev->stats.rx_frame_errors++;
- if(status & RX_CRC_ERR)
- dev->stats.rx_crc_errors++;
- if(status & RX_OVRRUN)
- dev->stats.rx_over_errors++;
-
-#ifdef DEBUG_RX_FAIL
- printk(KERN_DEBUG "%s: wv_packet_rcv(): packet not received ok, status = 0x%x\n",
- dev->name, status);
-#endif
- }
- else
- /* Read the packet and transmit to Linux */
- wv_packet_read(dev, f_start, len - 2);
-
- /* One frame has been processed, skip it */
- lp->rfp = rp;
- }
-
- /*
- * Update the frame stop register, but set it to less than
- * the full 8K to allow space for 3 bytes of signal strength
- * per packet.
- */
- lp->stop = (i593_rfp + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
- outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
- outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
- outb(OP1_SWIT_TO_PORT_0, LCCR(base));
-
-#ifdef DEBUG_RX_TRACE
- printk(KERN_DEBUG "%s: <-wv_packet_rcv()\n", dev->name);
-#endif
-}
-
-/*********************** PACKET TRANSMISSION ***********************/
-/*
- * This part deal with sending packet through the wavelan
- * We copy the packet to the send buffer and then issue the send
- * command to the i82593. The result of this operation will be
- * checked in wavelan_interrupt()
- */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine fills in the appropriate registers and memory
- * locations on the WaveLAN card and starts the card off on
- * the transmit.
- * (called in wavelan_packet_xmit())
- */
-static void
-wv_packet_write(struct net_device * dev,
- void * buf,
- short length)
-{
- net_local * lp = netdev_priv(dev);
- unsigned int base = dev->base_addr;
- unsigned long flags;
- int clen = length;
- register u_short xmtdata_base = TX_BASE;
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name, length);
-#endif
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Write the length of data buffer followed by the buffer */
- outb(xmtdata_base & 0xff, PIORL(base));
- outb(((xmtdata_base >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
- outb(clen & 0xff, PIOP(base)); /* lsb */
- outb(clen >> 8, PIOP(base)); /* msb */
-
- /* Send the data */
- outsb(PIOP(base), buf, clen);
-
- /* Indicate end of transmit chain */
- outb(OP0_NOP, PIOP(base));
- /* josullvn@cs.cmu.edu: need to send a second NOP for alignment... */
- outb(OP0_NOP, PIOP(base));
-
- /* Reset the transmit DMA pointer */
- hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
- hacr_write(base, HACR_DEFAULT);
- /* Send the transmit command */
- wv_82593_cmd(dev, "wv_packet_write(): transmit",
- OP0_TRANSMIT, SR0_NO_RESULT);
-
- /* Make sure the watchdog will keep quiet for a while */
- dev->trans_start = jiffies;
-
- /* Keep stats up to date */
- dev->stats.tx_bytes += length;
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_TX_INFO
- wv_packet_info((u_char *) buf, length, dev->name, "wv_packet_write");
-#endif /* DEBUG_TX_INFO */
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine is called when we want to send a packet (NET3 callback)
- * In this routine, we check if the harware is ready to accept
- * the packet. We also prevent reentrance. Then, we call the function
- * to send the packet...
- */
-static netdev_tx_t
-wavelan_packet_xmit(struct sk_buff * skb,
- struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
- unsigned long flags;
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
- (unsigned) skb);
-#endif
-
- /*
- * Block a timer-based transmit from overlapping a previous transmit.
- * In other words, prevent reentering this routine.
- */
- netif_stop_queue(dev);
-
- /* If somebody has asked to reconfigure the controller,
- * we can do it now */
- if(lp->reconfig_82593)
- {
- spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
- wv_82593_config(dev);
- spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
- /* Note : the configure procedure was totally synchronous,
- * so the Tx buffer is now free */
- }
-
- /* Check if we need some padding */
- /* Note : on wireless the propagation time is in the order of 1us,
- * and we don't have the Ethernet specific requirement of beeing
- * able to detect collisions, therefore in theory we don't really
- * need to pad. Jean II */
- if (skb_padto(skb, ETH_ZLEN))
- return NETDEV_TX_OK;
-
- wv_packet_write(dev, skb->data, skb->len);
-
- dev_kfree_skb(skb);
-
-#ifdef DEBUG_TX_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
-#endif
- return NETDEV_TX_OK;
-}
-
-/********************** HARDWARE CONFIGURATION **********************/
-/*
- * This part do the real job of starting and configuring the hardware.
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to initialize the Modem Management Controller.
- * (called by wv_hw_config())
- */
-static int
-wv_mmc_init(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- psa_t psa;
- mmw_t m;
- int configured;
- int i; /* Loop counter */
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
-#endif
-
- /* Read the parameter storage area */
- psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
-
- /*
- * Check the first three octets of the MAC addr for the manufacturer's code.
- * Note: If you get the error message below, you've got a
- * non-NCR/AT&T/Lucent PCMCIA cards, see wavelan_cs.h for detail on
- * how to configure your card...
- */
- for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
- if ((psa.psa_univ_mac_addr[0] == MAC_ADDRESSES[i][0]) &&
- (psa.psa_univ_mac_addr[1] == MAC_ADDRESSES[i][1]) &&
- (psa.psa_univ_mac_addr[2] == MAC_ADDRESSES[i][2]))
- break;
-
- /* If we have not found it... */
- if (i == ARRAY_SIZE(MAC_ADDRESSES))
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_WARNING "%s: wv_mmc_init(): Invalid MAC address: %02X:%02X:%02X:...\n",
- dev->name, psa.psa_univ_mac_addr[0],
- psa.psa_univ_mac_addr[1], psa.psa_univ_mac_addr[2]);
-#endif
- return FALSE;
- }
-
- /* Get the MAC address */
- memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
-
-#ifdef USE_PSA_CONFIG
- configured = psa.psa_conf_status & 1;
-#else
- configured = 0;
-#endif
-
- /* Is the PSA is not configured */
- if(!configured)
- {
- /* User will be able to configure NWID after (with iwconfig) */
- psa.psa_nwid[0] = 0;
- psa.psa_nwid[1] = 0;
-
- /* As NWID is not set : no NWID checking */
- psa.psa_nwid_select = 0;
-
- /* Disable encryption */
- psa.psa_encryption_select = 0;
-
- /* Set to standard values
- * 0x04 for AT,
- * 0x01 for MCA,
- * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
- */
- if (psa.psa_comp_number & 1)
- psa.psa_thr_pre_set = 0x01;
- else
- psa.psa_thr_pre_set = 0x04;
- psa.psa_quality_thr = 0x03;
-
- /* It is configured */
- psa.psa_conf_status |= 1;
-
-#ifdef USE_PSA_CONFIG
- /* Write the psa */
- psa_write(dev, (char *)psa.psa_nwid - (char *)&psa,
- (unsigned char *)psa.psa_nwid, 4);
- psa_write(dev, (char *)&psa.psa_thr_pre_set - (char *)&psa,
- (unsigned char *)&psa.psa_thr_pre_set, 1);
- psa_write(dev, (char *)&psa.psa_quality_thr - (char *)&psa,
- (unsigned char *)&psa.psa_quality_thr, 1);
- psa_write(dev, (char *)&psa.psa_conf_status - (char *)&psa,
- (unsigned char *)&psa.psa_conf_status, 1);
- /* update the Wavelan checksum */
- update_psa_checksum(dev);
-#endif /* USE_PSA_CONFIG */
- }
-
- /* Zero the mmc structure */
- memset(&m, 0x00, sizeof(m));
-
- /* Copy PSA info to the mmc */
- m.mmw_netw_id_l = psa.psa_nwid[1];
- m.mmw_netw_id_h = psa.psa_nwid[0];
-
- if(psa.psa_nwid_select & 1)
- m.mmw_loopt_sel = 0x00;
- else
- m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
-
- memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
- sizeof(m.mmw_encr_key));
-
- if(psa.psa_encryption_select)
- m.mmw_encr_enable = MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
- else
- m.mmw_encr_enable = 0;
-
- m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
- m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
-
- /*
- * Set default modem control parameters.
- * See NCR document 407-0024326 Rev. A.
- */
- m.mmw_jabber_enable = 0x01;
- m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
- m.mmw_ifs = 0x20;
- m.mmw_mod_delay = 0x04;
- m.mmw_jam_time = 0x38;
-
- m.mmw_des_io_invert = 0;
- m.mmw_freeze = 0;
- m.mmw_decay_prm = 0;
- m.mmw_decay_updat_prm = 0;
-
- /* Write all info to mmc */
- mmc_write(base, 0, (u_char *)&m, sizeof(m));
-
- /* The following code start the modem of the 2.00 frequency
- * selectable cards at power on. It's not strictly needed for the
- * following boots...
- * The original patch was by Joe Finney for the PCMCIA driver, but
- * I've cleaned it a bit and add documentation.
- * Thanks to Loeke Brederveld from Lucent for the info.
- */
-
- /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
- * (does it work for everybody ? - especially old cards...) */
- /* Note : WFREQSEL verify that it is able to read from EEprom
- * a sensible frequency (address 0x00) + that MMR_FEE_STATUS_ID
- * is 0xA (Xilinx version) or 0xB (Ariadne version).
- * My test is more crude but do work... */
- if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
- (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
- {
- /* We must download the frequency parameters to the
- * synthetisers (from the EEprom - area 1)
- * Note : as the EEprom is auto decremented, we set the end
- * if the area... */
- m.mmw_fee_addr = 0x0F;
- m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
- mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
- (unsigned char *)&m.mmw_fee_ctrl, 2);
-
- /* Wait until the download is finished */
- fee_wait(base, 100, 100);
-
-#ifdef DEBUG_CONFIG_INFO
- /* The frequency was in the last word downloaded... */
- mmc_read(base, (char *)&m.mmw_fee_data_l - (char *)&m,
- (unsigned char *)&m.mmw_fee_data_l, 2);
-
- /* Print some info for the user */
- printk(KERN_DEBUG "%s: Wavelan 2.00 recognised (frequency select) : Current frequency = %ld\n",
- dev->name,
- ((m.mmw_fee_data_h << 4) |
- (m.mmw_fee_data_l >> 4)) * 5 / 2 + 24000L);
-#endif
-
- /* We must now download the power adjust value (gain) to
- * the synthetisers (from the EEprom - area 7 - DAC) */
- m.mmw_fee_addr = 0x61;
- m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
- mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
- (unsigned char *)&m.mmw_fee_ctrl, 2);
-
- /* Wait until the download is finished */
- } /* if 2.00 card */
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
-#endif
- return TRUE;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Routine to gracefully turn off reception, and wait for any commands
- * to complete.
- * (called in wv_ru_start() and wavelan_close() and wavelan_event())
- */
-static int
-wv_ru_stop(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- unsigned long flags;
- int status;
- int spin;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_ru_stop()\n", dev->name);
-#endif
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* First, send the LAN controller a stop receive command */
- wv_82593_cmd(dev, "wv_graceful_shutdown(): stop-rcv",
- OP0_STOP_RCV, SR0_NO_RESULT);
-
- /* Then, spin until the receive unit goes idle */
- spin = 300;
- do
- {
- udelay(10);
- outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
- status = inb(LCSR(base));
- }
- while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_IDLE) && (spin-- > 0));
-
- /* Now, spin until the chip finishes executing its current command */
- do
- {
- udelay(10);
- outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
- status = inb(LCSR(base));
- }
- while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- /* If there was a problem */
- if(spin <= 0)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_INFO "%s: wv_ru_stop(): The chip doesn't want to stop...\n",
- dev->name);
-#endif
- return FALSE;
- }
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_ru_stop()\n", dev->name);
-#endif
- return TRUE;
-} /* wv_ru_stop */
-
-/*------------------------------------------------------------------*/
-/*
- * This routine starts the receive unit running. First, it checks if
- * the card is actually ready. Then the card is instructed to receive
- * packets again.
- * (called in wv_hw_reset() & wavelan_open())
- */
-static int
-wv_ru_start(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- unsigned long flags;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
-#endif
-
- /*
- * We need to start from a quiescent state. To do so, we could check
- * if the card is already running, but instead we just try to shut
- * it down. First, we disable reception (in case it was already enabled).
- */
- if(!wv_ru_stop(dev))
- return FALSE;
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Now we know that no command is being executed. */
-
- /* Set the receive frame pointer and stop pointer */
- lp->rfp = 0;
- outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
-
- /* Reset ring management. This sets the receive frame pointer to 1 */
- outb(OP1_RESET_RING_MNGMT, LCCR(base));
-
-#if 0
- /* XXX the i82593 manual page 6-4 seems to indicate that the stop register
- should be set as below */
- /* outb(CR1_STOP_REG_UPDATE|((RX_SIZE - 0x40)>> RX_SIZE_SHIFT),LCCR(base));*/
-#elif 0
- /* but I set it 0 instead */
- lp->stop = 0;
-#else
- /* but I set it to 3 bytes per packet less than 8K */
- lp->stop = (0 + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
-#endif
- outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
- outb(OP1_INT_ENABLE, LCCR(base));
- outb(OP1_SWIT_TO_PORT_0, LCCR(base));
-
- /* Reset receive DMA pointer */
- hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
- hacr_write_slow(base, HACR_DEFAULT);
-
- /* Receive DMA on channel 1 */
- wv_82593_cmd(dev, "wv_ru_start(): rcv-enable",
- CR0_CHNL | OP0_RCV_ENABLE, SR0_NO_RESULT);
-
-#ifdef DEBUG_I82593_SHOW
- {
- int status;
- int opri;
- int spin = 10000;
-
- /* spin until the chip starts receiving */
- do
- {
- outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
- status = inb(LCSR(base));
- if(spin-- <= 0)
- break;
- }
- while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_ACTIVE) &&
- ((status & SR3_RCV_STATE_MASK) != SR3_RCV_READY));
- printk(KERN_DEBUG "rcv status is 0x%x [i:%d]\n",
- (status & SR3_RCV_STATE_MASK), i);
- }
-#endif
-
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
-#endif
- return TRUE;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This routine does a standard config of the WaveLAN controller (i82593).
- * In the ISA driver, this is integrated in wavelan_hardware_reset()
- * (called by wv_hw_config(), wv_82593_reconfig() & wavelan_packet_xmit())
- */
-static int
-wv_82593_config(struct net_device * dev)
-{
- unsigned int base = dev->base_addr;
- net_local * lp = netdev_priv(dev);
- struct i82593_conf_block cfblk;
- int ret = TRUE;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_82593_config()\n", dev->name);
-#endif
-
- /* Create & fill i82593 config block
- *
- * Now conform to Wavelan document WCIN085B
- */
- memset(&cfblk, 0x00, sizeof(struct i82593_conf_block));
- cfblk.d6mod = FALSE; /* Run in i82593 advanced mode */
- cfblk.fifo_limit = 5; /* = 56 B rx and 40 B tx fifo thresholds */
- cfblk.forgnesi = FALSE; /* 0=82C501, 1=AMD7992B compatibility */
- cfblk.fifo_32 = 1;
- cfblk.throttle_enb = FALSE;
- cfblk.contin = TRUE; /* enable continuous mode */
- cfblk.cntrxint = FALSE; /* enable continuous mode receive interrupts */
- cfblk.addr_len = WAVELAN_ADDR_SIZE;
- cfblk.acloc = TRUE; /* Disable source addr insertion by i82593 */
- cfblk.preamb_len = 0; /* 2 bytes preamble (SFD) */
- cfblk.loopback = FALSE;
- cfblk.lin_prio = 0; /* conform to 802.3 backoff algorithm */
- cfblk.exp_prio = 5; /* conform to 802.3 backoff algorithm */
- cfblk.bof_met = 1; /* conform to 802.3 backoff algorithm */
- cfblk.ifrm_spc = 0x20 >> 4; /* 32 bit times interframe spacing */
- cfblk.slottim_low = 0x20 >> 5; /* 32 bit times slot time */
- cfblk.slottim_hi = 0x0;
- cfblk.max_retr = 15;
- cfblk.prmisc = ((lp->promiscuous) ? TRUE: FALSE); /* Promiscuous mode */
- cfblk.bc_dis = FALSE; /* Enable broadcast reception */
- cfblk.crs_1 = TRUE; /* Transmit without carrier sense */
- cfblk.nocrc_ins = FALSE; /* i82593 generates CRC */
- cfblk.crc_1632 = FALSE; /* 32-bit Autodin-II CRC */
- cfblk.crs_cdt = FALSE; /* CD not to be interpreted as CS */
- cfblk.cs_filter = 0; /* CS is recognized immediately */
- cfblk.crs_src = FALSE; /* External carrier sense */
- cfblk.cd_filter = 0; /* CD is recognized immediately */
- cfblk.min_fr_len = ETH_ZLEN >> 2; /* Minimum frame length 64 bytes */
- cfblk.lng_typ = FALSE; /* Length field > 1500 = type field */
- cfblk.lng_fld = TRUE; /* Disable 802.3 length field check */
- cfblk.rxcrc_xf = TRUE; /* Don't transfer CRC to memory */
- cfblk.artx = TRUE; /* Disable automatic retransmission */
- cfblk.sarec = TRUE; /* Disable source addr trig of CD */
- cfblk.tx_jabber = TRUE; /* Disable jabber jam sequence */
- cfblk.hash_1 = FALSE; /* Use bits 0-5 in mc address hash */
- cfblk.lbpkpol = TRUE; /* Loopback pin active high */
- cfblk.fdx = FALSE; /* Disable full duplex operation */
- cfblk.dummy_6 = 0x3f; /* all ones */
- cfblk.mult_ia = FALSE; /* No multiple individual addresses */
- cfblk.dis_bof = FALSE; /* Disable the backoff algorithm ?! */
- cfblk.dummy_1 = TRUE; /* set to 1 */
- cfblk.tx_ifs_retrig = 3; /* Hmm... Disabled */
-#ifdef MULTICAST_ALL
- cfblk.mc_all = (lp->allmulticast ? TRUE: FALSE); /* Allow all multicasts */
-#else
- cfblk.mc_all = FALSE; /* No multicast all mode */
-#endif
- cfblk.rcv_mon = 0; /* Monitor mode disabled */
- cfblk.frag_acpt = TRUE; /* Do not accept fragments */
- cfblk.tstrttrs = FALSE; /* No start transmission threshold */
- cfblk.fretx = TRUE; /* FIFO automatic retransmission */
- cfblk.syncrqs = FALSE; /* Synchronous DRQ deassertion... */
- cfblk.sttlen = TRUE; /* 6 byte status registers */
- cfblk.rx_eop = TRUE; /* Signal EOP on packet reception */
- cfblk.tx_eop = TRUE; /* Signal EOP on packet transmission */
- cfblk.rbuf_size = RX_SIZE>>11; /* Set receive buffer size */
- cfblk.rcvstop = TRUE; /* Enable Receive Stop Register */
-
-#ifdef DEBUG_I82593_SHOW
- print_hex_dump(KERN_DEBUG, "wavelan_cs: config block: ", DUMP_PREFIX_NONE,
- 16, 1, &cfblk, sizeof(struct i82593_conf_block), false);
-#endif
-
- /* Copy the config block to the i82593 */
- outb(TX_BASE & 0xff, PIORL(base));
- outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
- outb(sizeof(struct i82593_conf_block) & 0xff, PIOP(base)); /* lsb */
- outb(sizeof(struct i82593_conf_block) >> 8, PIOP(base)); /* msb */
- outsb(PIOP(base), (char *) &cfblk, sizeof(struct i82593_conf_block));
-
- /* reset transmit DMA pointer */
- hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
- hacr_write(base, HACR_DEFAULT);
- if(!wv_82593_cmd(dev, "wv_82593_config(): configure",
- OP0_CONFIGURE, SR0_CONFIGURE_DONE))
- ret = FALSE;
-
- /* Initialize adapter's ethernet MAC address */
- outb(TX_BASE & 0xff, PIORL(base));
- outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
- outb(WAVELAN_ADDR_SIZE, PIOP(base)); /* byte count lsb */
- outb(0, PIOP(base)); /* byte count msb */
- outsb(PIOP(base), &dev->dev_addr[0], WAVELAN_ADDR_SIZE);
-
- /* reset transmit DMA pointer */
- hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
- hacr_write(base, HACR_DEFAULT);
- if(!wv_82593_cmd(dev, "wv_82593_config(): ia-setup",
- OP0_IA_SETUP, SR0_IA_SETUP_DONE))
- ret = FALSE;
-
-#ifdef WAVELAN_ROAMING
- /* If roaming is enabled, join the "Beacon Request" multicast group... */
- /* But only if it's not in there already! */
- if(do_roaming)
- dev_mc_add(dev,WAVELAN_BEACON_ADDRESS, WAVELAN_ADDR_SIZE, 1);
-#endif /* WAVELAN_ROAMING */
-
- /* If any multicast address to set */
- if(lp->mc_count)
- {
- struct dev_mc_list * dmi;
- int addrs_len = WAVELAN_ADDR_SIZE * lp->mc_count;
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG "%s: wv_hw_config(): set %d multicast addresses:\n",
- dev->name, lp->mc_count);
- for(dmi=dev->mc_list; dmi; dmi=dmi->next)
- printk(KERN_DEBUG " %pM\n", dmi->dmi_addr);
-#endif
-
- /* Initialize adapter's ethernet multicast addresses */
- outb(TX_BASE & 0xff, PIORL(base));
- outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
- outb(addrs_len & 0xff, PIOP(base)); /* byte count lsb */
- outb((addrs_len >> 8), PIOP(base)); /* byte count msb */
- for(dmi=dev->mc_list; dmi; dmi=dmi->next)
- outsb(PIOP(base), dmi->dmi_addr, dmi->dmi_addrlen);
-
- /* reset transmit DMA pointer */
- hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
- hacr_write(base, HACR_DEFAULT);
- if(!wv_82593_cmd(dev, "wv_82593_config(): mc-setup",
- OP0_MC_SETUP, SR0_MC_SETUP_DONE))
- ret = FALSE;
- lp->mc_count = dev->mc_count; /* remember to avoid repeated reset */
- }
-
- /* Job done, clear the flag */
- lp->reconfig_82593 = FALSE;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_82593_config()\n", dev->name);
-#endif
- return(ret);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Read the Access Configuration Register, perform a software reset,
- * and then re-enable the card's software.
- *
- * If I understand correctly : reset the pcmcia interface of the
- * wavelan.
- * (called by wv_config())
- */
-static int
-wv_pcmcia_reset(struct net_device * dev)
-{
- int i;
- conf_reg_t reg = { 0, CS_READ, CISREG_COR, 0 };
- struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_pcmcia_reset()\n", dev->name);
-#endif
-
- i = pcmcia_access_configuration_register(link, &reg);
- if (i != 0)
- {
- cs_error(link, AccessConfigurationRegister, i);
- return FALSE;
- }
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG "%s: wavelan_pcmcia_reset(): Config reg is 0x%x\n",
- dev->name, (u_int) reg.Value);
-#endif
-
- reg.Action = CS_WRITE;
- reg.Value = reg.Value | COR_SW_RESET;
- i = pcmcia_access_configuration_register(link, &reg);
- if (i != 0)
- {
- cs_error(link, AccessConfigurationRegister, i);
- return FALSE;
- }
-
- reg.Action = CS_WRITE;
- reg.Value = COR_LEVEL_IRQ | COR_CONFIG;
- i = pcmcia_access_configuration_register(link, &reg);
- if (i != 0)
- {
- cs_error(link, AccessConfigurationRegister, i);
- return FALSE;
- }
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_pcmcia_reset()\n", dev->name);
-#endif
- return TRUE;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * wavelan_hw_config() is called after a CARD_INSERTION event is
- * received, to configure the wavelan hardware.
- * Note that the reception will be enabled in wavelan->open(), so the
- * device is configured but idle...
- * Performs the following actions:
- * 1. A pcmcia software reset (using wv_pcmcia_reset())
- * 2. A power reset (reset DMA)
- * 3. Reset the LAN controller
- * 4. Initialize the radio modem (using wv_mmc_init)
- * 5. Configure LAN controller (using wv_82593_config)
- * 6. Perform a diagnostic on the LAN controller
- * (called by wavelan_event() & wv_hw_reset())
- */
-static int
-wv_hw_config(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
- unsigned int base = dev->base_addr;
- unsigned long flags;
- int ret = FALSE;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_hw_config()\n", dev->name);
-#endif
-
- /* compile-time check the sizes of structures */
- BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
- BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
- BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
-
- /* Reset the pcmcia interface */
- if(wv_pcmcia_reset(dev) == FALSE)
- return FALSE;
-
- /* Disable interrupts */
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Disguised goto ;-) */
- do
- {
- /* Power UP the module + reset the modem + reset host adapter
- * (in fact, reset DMA channels) */
- hacr_write_slow(base, HACR_RESET);
- hacr_write(base, HACR_DEFAULT);
-
- /* Check if the module has been powered up... */
- if(hasr_read(base) & HASR_NO_CLK)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_WARNING "%s: wv_hw_config(): modem not connected or not a wavelan card\n",
- dev->name);
-#endif
- break;
- }
-
- /* initialize the modem */
- if(wv_mmc_init(dev) == FALSE)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_WARNING "%s: wv_hw_config(): Can't configure the modem\n",
- dev->name);
-#endif
- break;
- }
-
- /* reset the LAN controller (i82593) */
- outb(OP0_RESET, LCCR(base));
- mdelay(1); /* A bit crude ! */
-
- /* Initialize the LAN controller */
- if(wv_82593_config(dev) == FALSE)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_INFO "%s: wv_hw_config(): i82593 init failed\n",
- dev->name);
-#endif
- break;
- }
-
- /* Diagnostic */
- if(wv_diag(dev) == FALSE)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_INFO "%s: wv_hw_config(): i82593 diagnostic failed\n",
- dev->name);
-#endif
- break;
- }
-
- /*
- * insert code for loopback test here
- */
-
- /* The device is now configured */
- lp->configured = 1;
- ret = TRUE;
- }
- while(0);
-
- /* Re-enable interrupts */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_hw_config()\n", dev->name);
-#endif
- return(ret);
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Totally reset the wavelan and restart it.
- * Performs the following actions:
- * 1. Call wv_hw_config()
- * 2. Start the LAN controller's receive unit
- * (called by wavelan_event(), wavelan_watchdog() and wavelan_open())
- */
-static void
-wv_hw_reset(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: ->wv_hw_reset()\n", dev->name);
-#endif
-
- lp->nresets++;
- lp->configured = 0;
-
- /* Call wv_hw_config() for most of the reset & init stuff */
- if(wv_hw_config(dev) == FALSE)
- return;
-
- /* start receive unit */
- wv_ru_start(dev);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
-#endif
-}
-
-/*------------------------------------------------------------------*/
-/*
- * wv_pcmcia_config() is called after a CARD_INSERTION event is
- * received, to configure the PCMCIA socket, and to make the ethernet
- * device available to the system.
- * (called by wavelan_event())
- */
-static int
-wv_pcmcia_config(struct pcmcia_device * link)
-{
- struct net_device * dev = (struct net_device *) link->priv;
- int i;
- win_req_t req;
- memreq_t mem;
- net_local * lp = netdev_priv(dev);
-
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "->wv_pcmcia_config(0x%p)\n", link);
-#endif
-
- do
- {
- i = pcmcia_request_io(link, &link->io);
- if (i != 0)
- {
- cs_error(link, RequestIO, i);
- break;
- }
-
- /*
- * Now allocate an interrupt line. Note that this does not
- * actually assign a handler to the interrupt.
- */
- i = pcmcia_request_irq(link, &link->irq);
- if (i != 0)
- {
- cs_error(link, RequestIRQ, i);
- break;
- }
-
- /*
- * This actually configures the PCMCIA socket -- setting up
- * the I/O windows and the interrupt mapping.
- */
- link->conf.ConfigIndex = 1;
- i = pcmcia_request_configuration(link, &link->conf);
- if (i != 0)
- {
- cs_error(link, RequestConfiguration, i);
- break;
- }
-
- /*
- * Allocate a small memory window. Note that the struct pcmcia_device
- * structure provides space for one window handle -- if your
- * device needs several windows, you'll need to keep track of
- * the handles in your private data structure, link->priv.
- */
- req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
- req.Base = req.Size = 0;
- req.AccessSpeed = mem_speed;
- i = pcmcia_request_window(&link, &req, &link->win);
- if (i != 0)
- {
- cs_error(link, RequestWindow, i);
- break;
- }
-
- lp->mem = ioremap(req.Base, req.Size);
- dev->mem_start = (u_long)lp->mem;
- dev->mem_end = dev->mem_start + req.Size;
-
- mem.CardOffset = 0; mem.Page = 0;
- i = pcmcia_map_mem_page(link->win, &mem);
- if (i != 0)
- {
- cs_error(link, MapMemPage, i);
- break;
- }
-
- /* Feed device with this info... */
- dev->irq = link->irq.AssignedIRQ;
- dev->base_addr = link->io.BasePort1;
- netif_start_queue(dev);
-
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG "wv_pcmcia_config: MEMSTART %p IRQ %d IOPORT 0x%x\n",
- lp->mem, dev->irq, (u_int) dev->base_addr);
-#endif
-
- SET_NETDEV_DEV(dev, &handle_to_dev(link));
- i = register_netdev(dev);
- if(i != 0)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_INFO "wv_pcmcia_config(): register_netdev() failed\n");
-#endif
- break;
- }
- }
- while(0); /* Humm... Disguised goto !!! */
-
- /* If any step failed, release any partially configured state */
- if(i != 0)
- {
- wv_pcmcia_release(link);
- return FALSE;
- }
-
- strcpy(((net_local *) netdev_priv(dev))->node.dev_name, dev->name);
- link->dev_node = &((net_local *) netdev_priv(dev))->node;
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "<-wv_pcmcia_config()\n");
-#endif
- return TRUE;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * After a card is removed, wv_pcmcia_release() will unregister the net
- * device, and release the PCMCIA configuration. If the device is
- * still open, this will be postponed until it is closed.
- */
-static void
-wv_pcmcia_release(struct pcmcia_device *link)
-{
- struct net_device * dev = (struct net_device *) link->priv;
- net_local * lp = netdev_priv(dev);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: -> wv_pcmcia_release(0x%p)\n", dev->name, link);
-#endif
-
- iounmap(lp->mem);
- pcmcia_disable_device(link);
-
-#ifdef DEBUG_CONFIG_TRACE
- printk(KERN_DEBUG "%s: <- wv_pcmcia_release()\n", dev->name);
-#endif
-}
-
-/************************ INTERRUPT HANDLING ************************/
-
-/*
- * This function is the interrupt handler for the WaveLAN card. This
- * routine will be called whenever:
- * 1. A packet is received.
- * 2. A packet has successfully been transferred and the unit is
- * ready to transmit another packet.
- * 3. A command has completed execution.
- */
-static irqreturn_t
-wavelan_interrupt(int irq,
- void * dev_id)
-{
- struct net_device * dev = dev_id;
- net_local * lp;
- unsigned int base;
- int status0;
- u_int tx_status;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
-#endif
-
- lp = netdev_priv(dev);
- base = dev->base_addr;
-
-#ifdef DEBUG_INTERRUPT_INFO
- /* Check state of our spinlock (it should be cleared) */
- if(spin_is_locked(&lp->spinlock))
- printk(KERN_DEBUG
- "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
- dev->name);
-#endif
-
- /* Prevent reentrancy. We need to do that because we may have
- * multiple interrupt handler running concurently.
- * It is safe because interrupts are disabled before aquiring
- * the spinlock. */
- spin_lock(&lp->spinlock);
-
- /* Treat all pending interrupts */
- while(1)
- {
- /* ---------------- INTERRUPT CHECKING ---------------- */
- /*
- * Look for the interrupt and verify the validity
- */
- outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
- status0 = inb(LCSR(base));
-
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG "status0 0x%x [%s => 0x%x]", status0,
- (status0&SR0_INTERRUPT)?"int":"no int",status0&~SR0_INTERRUPT);
- if(status0&SR0_INTERRUPT)
- {
- printk(" [%s => %d]\n", (status0 & SR0_CHNL) ? "chnl" :
- ((status0 & SR0_EXECUTION) ? "cmd" :
- ((status0 & SR0_RECEPTION) ? "recv" : "unknown")),
- (status0 & SR0_EVENT_MASK));
- }
- else
- printk("\n");
-#endif
-
- /* Return if no actual interrupt from i82593 (normal exit) */
- if(!(status0 & SR0_INTERRUPT))
- break;
-
- /* If interrupt is both Rx and Tx or none...
- * This code in fact is there to catch the spurious interrupt
- * when you remove the wavelan pcmcia card from the socket */
- if(((status0 & SR0_BOTH_RX_TX) == SR0_BOTH_RX_TX) ||
- ((status0 & SR0_BOTH_RX_TX) == 0x0))
- {
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_INFO "%s: wv_interrupt(): bogus interrupt (or from dead card) : %X\n",
- dev->name, status0);
-#endif
- /* Acknowledge the interrupt */
- outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
- break;
- }
-
- /* ----------------- RECEIVING PACKET ----------------- */
- /*
- * When the wavelan signal the reception of a new packet,
- * we call wv_packet_rcv() to copy if from the buffer and
- * send it to NET3
- */
- if(status0 & SR0_RECEPTION)
- {
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG "%s: wv_interrupt(): receive\n", dev->name);
-#endif
-
- if((status0 & SR0_EVENT_MASK) == SR0_STOP_REG_HIT)
- {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "%s: wv_interrupt(): receive buffer overflow\n",
- dev->name);
-#endif
- dev->stats.rx_over_errors++;
- lp->overrunning = 1;
- }
-
- /* Get the packet */
- wv_packet_rcv(dev);
- lp->overrunning = 0;
-
- /* Acknowledge the interrupt */
- outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
- continue;
- }
-
- /* ---------------- COMMAND COMPLETION ---------------- */
- /*
- * Interrupts issued when the i82593 has completed a command.
- * Most likely : transmission done
- */
-
- /* If a transmission has been done */
- if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_DONE ||
- (status0 & SR0_EVENT_MASK) == SR0_RETRANSMIT_DONE ||
- (status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
- {
-#ifdef DEBUG_TX_ERROR
- if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
- printk(KERN_INFO "%s: wv_interrupt(): packet transmitted without CRC.\n",
- dev->name);
-#endif
-
- /* Get transmission status */
- tx_status = inb(LCSR(base));
- tx_status |= (inb(LCSR(base)) << 8);
-#ifdef DEBUG_INTERRUPT_INFO
- printk(KERN_DEBUG "%s: wv_interrupt(): transmission done\n",
- dev->name);
- {
- u_int rcv_bytes;
- u_char status3;
- rcv_bytes = inb(LCSR(base));
- rcv_bytes |= (inb(LCSR(base)) << 8);
- status3 = inb(LCSR(base));
- printk(KERN_DEBUG "tx_status 0x%02x rcv_bytes 0x%02x status3 0x%x\n",
- tx_status, rcv_bytes, (u_int) status3);
- }
-#endif
- /* Check for possible errors */
- if((tx_status & TX_OK) != TX_OK)
- {
- dev->stats.tx_errors++;
-
- if(tx_status & TX_FRTL)
- {
-#ifdef DEBUG_TX_ERROR
- printk(KERN_INFO "%s: wv_interrupt(): frame too long\n",
- dev->name);
-#endif
- }
- if(tx_status & TX_UND_RUN)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): DMA underrun\n",
- dev->name);
-#endif
- dev->stats.tx_aborted_errors++;
- }
- if(tx_status & TX_LOST_CTS)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): no CTS\n", dev->name);
-#endif
- dev->stats.tx_carrier_errors++;
- }
- if(tx_status & TX_LOST_CRS)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): no carrier\n",
- dev->name);
-#endif
- dev->stats.tx_carrier_errors++;
- }
- if(tx_status & TX_HRT_BEAT)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): heart beat\n", dev->name);
-#endif
- dev->stats.tx_heartbeat_errors++;
- }
- if(tx_status & TX_DEFER)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): channel jammed\n",
- dev->name);
-#endif
- }
- /* Ignore late collisions since they're more likely to happen
- * here (the WaveLAN design prevents the LAN controller from
- * receiving while it is transmitting). We take action only when
- * the maximum retransmit attempts is exceeded.
- */
- if(tx_status & TX_COLL)
- {
- if(tx_status & TX_MAX_COL)
- {
-#ifdef DEBUG_TX_FAIL
- printk(KERN_DEBUG "%s: wv_interrupt(): channel congestion\n",
- dev->name);
-#endif
- if(!(tx_status & TX_NCOL_MASK))
- {
- dev->stats.collisions += 0x10;
- }
- }
- }
- } /* if(!(tx_status & TX_OK)) */
-
- dev->stats.collisions += (tx_status & TX_NCOL_MASK);
- dev->stats.tx_packets++;
-
- netif_wake_queue(dev);
- outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
- }
- else /* if interrupt = transmit done or retransmit done */
- {
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "wavelan_cs: unknown interrupt, status0 = %02x\n",
- status0);
-#endif
- outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
- }
- } /* while(1) */
-
- spin_unlock(&lp->spinlock);
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
-#endif
-
- /* We always return IRQ_HANDLED, because we will receive empty
- * interrupts under normal operations. Anyway, it doesn't matter
- * as we are dealing with an ISA interrupt that can't be shared.
- *
- * Explanation : under heavy receive, the following happens :
- * ->wavelan_interrupt()
- * (status0 & SR0_INTERRUPT) != 0
- * ->wv_packet_rcv()
- * (status0 & SR0_INTERRUPT) != 0
- * ->wv_packet_rcv()
- * (status0 & SR0_INTERRUPT) == 0 // i.e. no more event
- * <-wavelan_interrupt()
- * ->wavelan_interrupt()
- * (status0 & SR0_INTERRUPT) == 0 // i.e. empty interrupt
- * <-wavelan_interrupt()
- * Jean II */
- return IRQ_HANDLED;
-} /* wv_interrupt */
-
-/*------------------------------------------------------------------*/
-/*
- * Watchdog: when we start a transmission, a timer is set for us in the
- * kernel. If the transmission completes, this timer is disabled. If
- * the timer expires, we are called and we try to unlock the hardware.
- *
- * Note : This watchdog is move clever than the one in the ISA driver,
- * because it try to abort the current command before reseting
- * everything...
- * On the other hand, it's a bit simpler, because we don't have to
- * deal with the multiple Tx buffers...
- */
-static void
-wavelan_watchdog(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
- unsigned int base = dev->base_addr;
- unsigned long flags;
- int aborted = FALSE;
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
-#endif
-
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
- dev->name);
-#endif
-
- spin_lock_irqsave(&lp->spinlock, flags);
-
- /* Ask to abort the current command */
- outb(OP0_ABORT, LCCR(base));
-
- /* Wait for the end of the command (a bit hackish) */
- if(wv_82593_cmd(dev, "wavelan_watchdog(): abort",
- OP0_NOP | CR0_STATUS_3, SR0_EXECUTION_ABORTED))
- aborted = TRUE;
-
- /* Release spinlock here so that wv_hw_reset() can grab it */
- spin_unlock_irqrestore(&lp->spinlock, flags);
-
- /* Check if we were successful in aborting it */
- if(!aborted)
- {
- /* It seem that it wasn't enough */
-#ifdef DEBUG_INTERRUPT_ERROR
- printk(KERN_INFO "%s: wavelan_watchdog: abort failed, trying reset\n",
- dev->name);
-#endif
- wv_hw_reset(dev);
- }
-
-#ifdef DEBUG_PSA_SHOW
- {
- psa_t psa;
- psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
- wv_psa_show(&psa);
- }
-#endif
-#ifdef DEBUG_MMC_SHOW
- wv_mmc_show(dev);
-#endif
-#ifdef DEBUG_I82593_SHOW
- wv_ru_show(dev);
-#endif
-
- /* We are no more waiting for something... */
- netif_wake_queue(dev);
-
-#ifdef DEBUG_INTERRUPT_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
-#endif
-}
-
-/********************* CONFIGURATION CALLBACKS *********************/
-/*
- * Here are the functions called by the pcmcia package (cardmgr) and
- * linux networking (NET3) for initialization, configuration and
- * deinstallations of the Wavelan Pcmcia Hardware.
- */
-
-/*------------------------------------------------------------------*/
-/*
- * Configure and start up the WaveLAN PCMCIA adaptor.
- * Called by NET3 when it "open" the device.
- */
-static int
-wavelan_open(struct net_device * dev)
-{
- net_local * lp = netdev_priv(dev);
- struct pcmcia_device * link = lp->link;
- unsigned int base = dev->base_addr;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
- (unsigned int) dev);
-#endif
-
- /* Check if the modem is powered up (wavelan_close() power it down */
- if(hasr_read(base) & HASR_NO_CLK)
- {
- /* Power up (power up time is 250us) */
- hacr_write(base, HACR_DEFAULT);
-
- /* Check if the module has been powered up... */
- if(hasr_read(base) & HASR_NO_CLK)
- {
-#ifdef DEBUG_CONFIG_ERRORS
- printk(KERN_WARNING "%s: wavelan_open(): modem not connected\n",
- dev->name);
-#endif
- return FALSE;
- }
- }
-
- /* Start reception and declare the driver ready */
- if(!lp->configured)
- return FALSE;
- if(!wv_ru_start(dev))
- wv_hw_reset(dev); /* If problem : reset */
- netif_start_queue(dev);
-
- /* Mark the device as used */
- link->open++;
-
-#ifdef WAVELAN_ROAMING
- if(do_roaming)
- wv_roam_init(dev);
-#endif /* WAVELAN_ROAMING */
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
-#endif
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * Shutdown the WaveLAN PCMCIA adaptor.
- * Called by NET3 when it "close" the device.
- */
-static int
-wavelan_close(struct net_device * dev)
-{
- struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
- unsigned int base = dev->base_addr;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
- (unsigned int) dev);
-#endif
-
- /* If the device isn't open, then nothing to do */
- if(!link->open)
- {
-#ifdef DEBUG_CONFIG_INFO
- printk(KERN_DEBUG "%s: wavelan_close(): device not open\n", dev->name);
-#endif
- return 0;
- }
-
-#ifdef WAVELAN_ROAMING
- /* Cleanup of roaming stuff... */
- if(do_roaming)
- wv_roam_cleanup(dev);
-#endif /* WAVELAN_ROAMING */
-
- link->open--;
-
- /* If the card is still present */
- if(netif_running(dev))
- {
- netif_stop_queue(dev);
-
- /* Stop receiving new messages and wait end of transmission */
- wv_ru_stop(dev);
-
- /* Power down the module */
- hacr_write(base, HACR_DEFAULT & (~HACR_PWR_STAT));
- }
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
-#endif
- return 0;
-}
-
-static const struct net_device_ops wavelan_netdev_ops = {
- .ndo_open = wavelan_open,
- .ndo_stop = wavelan_close,
- .ndo_start_xmit = wavelan_packet_xmit,
- .ndo_set_multicast_list = wavelan_set_multicast_list,
-#ifdef SET_MAC_ADDRESS
- .ndo_set_mac_address = wavelan_set_mac_address,
-#endif
- .ndo_tx_timeout = wavelan_watchdog,
- .ndo_change_mtu = eth_change_mtu,
- .ndo_validate_addr = eth_validate_addr,
-};
-
-/*------------------------------------------------------------------*/
-/*
- * wavelan_attach() creates an "instance" of the driver, allocating
- * local data structures for one device (one interface). The device
- * is registered with Card Services.
- *
- * The dev_link structure is initialized, but we don't actually
- * configure the card at this point -- we wait until we receive a
- * card insertion event.
- */
-static int
-wavelan_probe(struct pcmcia_device *p_dev)
-{
- struct net_device * dev; /* Interface generic data */
- net_local * lp; /* Interface specific data */
- int ret;
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "-> wavelan_attach()\n");
-#endif
-
- /* The io structure describes IO port mapping */
- p_dev->io.NumPorts1 = 8;
- p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
- p_dev->io.IOAddrLines = 3;
-
- /* Interrupt setup */
- p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT;
- p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
- p_dev->irq.Handler = wavelan_interrupt;
-
- /* General socket configuration */
- p_dev->conf.Attributes = CONF_ENABLE_IRQ;
- p_dev->conf.IntType = INT_MEMORY_AND_IO;
-
- /* Allocate the generic data structure */
- dev = alloc_etherdev(sizeof(net_local));
- if (!dev)
- return -ENOMEM;
-
- p_dev->priv = p_dev->irq.Instance = dev;
-
- lp = netdev_priv(dev);
-
- /* Init specific data */
- lp->configured = 0;
- lp->reconfig_82593 = FALSE;
- lp->nresets = 0;
- /* Multicast stuff */
- lp->promiscuous = 0;
- lp->allmulticast = 0;
- lp->mc_count = 0;
-
- /* Init spinlock */
- spin_lock_init(&lp->spinlock);
-
- /* back links */
- lp->dev = dev;
-
- /* wavelan NET3 callbacks */
- dev->netdev_ops = &wavelan_netdev_ops;
- dev->watchdog_timeo = WATCHDOG_JIFFIES;
- SET_ETHTOOL_OPS(dev, &ops);
-
- dev->wireless_handlers = &wavelan_handler_def;
- lp->wireless_data.spy_data = &lp->spy_data;
- dev->wireless_data = &lp->wireless_data;
-
- /* Other specific data */
- dev->mtu = WAVELAN_MTU;
-
- ret = wv_pcmcia_config(p_dev);
- if (ret)
- return ret;
-
- ret = wv_hw_config(dev);
- if (ret) {
- dev->irq = 0;
- pcmcia_disable_device(p_dev);
- return ret;
- }
-
- wv_init_info(dev);
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "<- wavelan_attach()\n");
-#endif
-
- return 0;
-}
-
-/*------------------------------------------------------------------*/
-/*
- * This deletes a driver "instance". The device is de-registered with
- * Card Services. If it has been released, all local data structures
- * are freed. Otherwise, the structures will be freed when the device
- * is released.
- */
-static void
-wavelan_detach(struct pcmcia_device *link)
-{
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "-> wavelan_detach(0x%p)\n", link);
-#endif
-
- /* Some others haven't done their job : give them another chance */
- wv_pcmcia_release(link);
-
- /* Free pieces */
- if(link->priv)
- {
- struct net_device * dev = (struct net_device *) link->priv;
-
- /* Remove ourselves from the kernel list of ethernet devices */
- /* Warning : can't be called from interrupt, timer or wavelan_close() */
- if (link->dev_node)
- unregister_netdev(dev);
- link->dev_node = NULL;
- ((net_local *)netdev_priv(dev))->link = NULL;
- ((net_local *)netdev_priv(dev))->dev = NULL;
- free_netdev(dev);
- }
-
-#ifdef DEBUG_CALLBACK_TRACE
- printk(KERN_DEBUG "<- wavelan_detach()\n");
-#endif
-}
-
-static int wavelan_suspend(struct pcmcia_device *link)
-{
- struct net_device * dev = (struct net_device *) link->priv;
-
- /* NB: wavelan_close will be called, but too late, so we are
- * obliged to close nicely the wavelan here. David, could you
- * close the device before suspending them ? And, by the way,
- * could you, on resume, add a "route add -net ..." after the
- * ifconfig up ? Thanks... */
-
- /* Stop receiving new messages and wait end of transmission */
- wv_ru_stop(dev);
-
- if (link->open)
- netif_device_detach(dev);
-
- /* Power down the module */
- hacr_write(dev->base_addr, HACR_DEFAULT & (~HACR_PWR_STAT));
-
- return 0;
-}
-
-static int wavelan_resume(struct pcmcia_device *link)
-{
- struct net_device * dev = (struct net_device *) link->priv;
-
- if (link->open) {
- wv_hw_reset(dev);
- netif_device_attach(dev);
- }
-
- return 0;
-}
-
-
-static struct pcmcia_device_id wavelan_ids[] = {
- PCMCIA_DEVICE_PROD_ID12("AT&T","WaveLAN/PCMCIA", 0xe7c5affd, 0x1bc50975),
- PCMCIA_DEVICE_PROD_ID12("Digital", "RoamAbout/DS", 0x9999ab35, 0x00d05e06),
- PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/PCMCIA", 0x23eb9949, 0x1bc50975),
- PCMCIA_DEVICE_PROD_ID12("NCR", "WaveLAN/PCMCIA", 0x24358cd4, 0x1bc50975),
- PCMCIA_DEVICE_NULL,
-};
-MODULE_DEVICE_TABLE(pcmcia, wavelan_ids);
-
-static struct pcmcia_driver wavelan_driver = {
- .owner = THIS_MODULE,
- .drv = {
- .name = "wavelan_cs",
- },
- .probe = wavelan_probe,
- .remove = wavelan_detach,
- .id_table = wavelan_ids,
- .suspend = wavelan_suspend,
- .resume = wavelan_resume,
-};
-
-static int __init
-init_wavelan_cs(void)
-{
- return pcmcia_register_driver(&wavelan_driver);
-}
-
-static void __exit
-exit_wavelan_cs(void)
-{
- pcmcia_unregister_driver(&wavelan_driver);
-}
-
-module_init(init_wavelan_cs);
-module_exit(exit_wavelan_cs);
diff --git a/drivers/net/wireless/wavelan_cs.h b/drivers/net/wireless/wavelan_cs.h
deleted file mode 100644
index 2e4bfe4147c..00000000000
--- a/drivers/net/wireless/wavelan_cs.h
+++ /dev/null
@@ -1,386 +0,0 @@
-/*
- * Wavelan Pcmcia driver
- *
- * Jean II - HPLB '96
- *
- * Reorganization and extension of the driver.
- * Original copyright follow. See wavelan_cs.h for details.
- *
- * This file contain the declarations of the Wavelan hardware. Note that
- * the Pcmcia Wavelan include a i82593 controller (see definitions in
- * file i82593.h).
- *
- * The main difference between the pcmcia hardware and the ISA one is
- * the Ethernet Controller (i82593 instead of i82586). The i82593 allow
- * only one send buffer. The PSA (Parameter Storage Area : EEprom for
- * permanent storage of various info) is memory mapped, but not the
- * MMI (Modem Management Interface).
- */
-
-/*
- * Definitions for the AT&T GIS (formerly NCR) WaveLAN PCMCIA card:
- * An Ethernet-like radio transceiver controlled by an Intel 82593
- * coprocessor.
- *
- *
- ****************************************************************************
- * Copyright 1995
- * Anthony D. Joseph
- * Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this program
- * for any purpose and without fee is hereby granted, provided
- * that this copyright and permission notice appear on all copies
- * and supporting documentation, the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * program without specific prior permission, and notice be given
- * in supporting documentation that copying and distribution is
- * by permission of M.I.T. M.I.T. makes no representations about
- * the suitability of this software for any purpose. It is pro-
- * vided "as is" without express or implied warranty.
- ****************************************************************************
- *
- *
- * Credits:
- * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht for
- * providing extremely useful information about WaveLAN PCMCIA hardware
- *
- * This driver is based upon several other drivers, in particular:
- * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
- * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
- * Anders Klemets' PCMCIA WaveLAN adapter driver
- * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
- */
-
-#ifndef _WAVELAN_CS_H
-#define _WAVELAN_CS_H
-
-/************************** MAGIC NUMBERS ***************************/
-
-/* The detection of the wavelan card is made by reading the MAC address
- * from the card and checking it. If you have a non AT&T product (OEM,
- * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this
- * part to accommodate your hardware...
- */
-static const unsigned char MAC_ADDRESSES[][3] =
-{
- { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */
- { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */
- { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
- { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
- /* Add your card here and send me the patch ! */
-};
-
-/*
- * Constants used to convert channels to frequencies
- */
-
-/* Frequency available in the 2.0 modem, in units of 250 kHz
- * (as read in the offset register of the dac area).
- * Used to map channel numbers used by `wfreqsel' to frequencies
- */
-static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
- 0xD0, 0xF0, 0xF8, 0x150 };
-
-/* Frequencies of the 1.0 modem (fixed frequencies).
- * Use to map the PSA `subband' to a frequency
- * Note : all frequencies apart from the first one need to be multiplied by 10
- */
-static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
-
-
-/*************************** PC INTERFACE ****************************/
-
-/* WaveLAN host interface definitions */
-
-#define LCCR(base) (base) /* LAN Controller Command Register */
-#define LCSR(base) (base) /* LAN Controller Status Register */
-#define HACR(base) (base+0x1) /* Host Adapter Command Register */
-#define HASR(base) (base+0x1) /* Host Adapter Status Register */
-#define PIORL(base) (base+0x2) /* Program I/O Register Low */
-#define RPLL(base) (base+0x2) /* Receive Pointer Latched Low */
-#define PIORH(base) (base+0x3) /* Program I/O Register High */
-#define RPLH(base) (base+0x3) /* Receive Pointer Latched High */
-#define PIOP(base) (base+0x4) /* Program I/O Port */
-#define MMR(base) (base+0x6) /* MMI Address Register */
-#define MMD(base) (base+0x7) /* MMI Data Register */
-
-/* Host Adaptor Command Register bit definitions */
-
-#define HACR_LOF (1 << 3) /* Lock Out Flag, toggle every 250ms */
-#define HACR_PWR_STAT (1 << 4) /* Power State, 1=active, 0=sleep */
-#define HACR_TX_DMA_RESET (1 << 5) /* Reset transmit DMA ptr on high */
-#define HACR_RX_DMA_RESET (1 << 6) /* Reset receive DMA ptr on high */
-#define HACR_ROM_WEN (1 << 7) /* EEPROM write enabled when true */
-
-#define HACR_RESET (HACR_TX_DMA_RESET | HACR_RX_DMA_RESET)
-#define HACR_DEFAULT (HACR_PWR_STAT)
-
-/* Host Adapter Status Register bit definitions */
-
-#define HASR_MMI_BUSY (1 << 2) /* MMI is busy when true */
-#define HASR_LOF (1 << 3) /* Lock out flag status */
-#define HASR_NO_CLK (1 << 4) /* active when modem not connected */
-
-/* Miscellaneous bit definitions */
-
-#define PIORH_SEL_TX (1 << 5) /* PIOR points to 0=rx/1=tx buffer */
-#define MMR_MMI_WR (1 << 0) /* Next MMI cycle is 0=read, 1=write */
-#define PIORH_MASK 0x1f /* only low 5 bits are significant */
-#define RPLH_MASK 0x1f /* only low 5 bits are significant */
-#define MMI_ADDR_MASK 0x7e /* Bits 1-6 of MMR are significant */
-
-/* Attribute Memory map */
-
-#define CIS_ADDR 0x0000 /* Card Information Status Register */
-#define PSA_ADDR 0x0e00 /* Parameter Storage Area address */
-#define EEPROM_ADDR 0x1000 /* EEPROM address (unused ?) */
-#define COR_ADDR 0x4000 /* Configuration Option Register */
-
-/* Configuration Option Register bit definitions */
-
-#define COR_CONFIG (1 << 0) /* Config Index, 0 when unconfigured */
-#define COR_SW_RESET (1 << 7) /* Software Reset on true */
-#define COR_LEVEL_IRQ (1 << 6) /* Level IRQ */
-
-/* Local Memory map */
-
-#define RX_BASE 0x0000 /* Receive memory, 8 kB */
-#define TX_BASE 0x2000 /* Transmit memory, 2 kB */
-#define UNUSED_BASE 0x2800 /* Unused, 22 kB */
-#define RX_SIZE (TX_BASE-RX_BASE) /* Size of receive area */
-#define RX_SIZE_SHIFT 6 /* Bits to shift in stop register */
-
-#define TRUE 1
-#define FALSE 0
-
-#define MOD_ENAL 1
-#define MOD_PROM 2
-
-/* Size of a MAC address */
-#define WAVELAN_ADDR_SIZE 6
-
-/* Maximum size of Wavelan packet */
-#define WAVELAN_MTU 1500
-
-#define MAXDATAZ (6 + 6 + 2 + WAVELAN_MTU)
-
-/********************** PARAMETER STORAGE AREA **********************/
-
-/*
- * Parameter Storage Area (PSA).
- */
-typedef struct psa_t psa_t;
-struct psa_t
-{
- /* For the PCMCIA Adapter, locations 0x00-0x0F are unused and fixed at 00 */
- unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
- unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
- unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
- unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
- unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
- unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
- unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
- unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
- unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
- unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
-
- unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
- unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
- unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
-#define PSA_UNIVERSAL 0 /* Universal (factory) */
-#define PSA_LOCAL 1 /* Local */
- unsigned char psa_comp_number; /* [0x1D] Compatability Number: */
-#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
-#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
-#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
-#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
-#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
- unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
- unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
-#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
- unsigned char psa_subband; /* [0x20] Subband */
-#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
-#define PSA_SUBBAND_2425 1 /* 2425 MHz */
-#define PSA_SUBBAND_2460 2 /* 2460 MHz */
-#define PSA_SUBBAND_2484 3 /* 2484 MHz */
-#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
- unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
- unsigned char psa_mod_delay; /* [0x22] Modem Delay ??? (reserved) */
- unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
- unsigned char psa_nwid_select; /* [0x25] Network ID Select On Off */
- unsigned char psa_encryption_select; /* [0x26] Encryption On Off */
- unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
- unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
- unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
- unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
- unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
- unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
- unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
- unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
-};
-
-/* Size for structure checking (if padding is correct) */
-#define PSA_SIZE 64
-
-/* Calculate offset of a field in the above structure
- * Warning : only even addresses are used */
-#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
-
-/******************** MODEM MANAGEMENT INTERFACE ********************/
-
-/*
- * Modem Management Controller (MMC) write structure.
- */
-typedef struct mmw_t mmw_t;
-struct mmw_t
-{
- unsigned char mmw_encr_key[8]; /* encryption key */
- unsigned char mmw_encr_enable; /* enable/disable encryption */
-#define MMW_ENCR_ENABLE_MODE 0x02 /* Mode of security option */
-#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option */
- unsigned char mmw_unused0[1]; /* unused */
- unsigned char mmw_des_io_invert; /* Encryption option */
-#define MMW_DES_IO_INVERT_RES 0x0F /* Reserved */
-#define MMW_DES_IO_INVERT_CTRL 0xF0 /* Control ??? (set to 0) */
- unsigned char mmw_unused1[5]; /* unused */
- unsigned char mmw_loopt_sel; /* looptest selection */
-#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* disable NWID filtering */
-#define MMW_LOOPT_SEL_INT 0x20 /* activate Attention Request */
-#define MMW_LOOPT_SEL_LS 0x10 /* looptest w/o collision avoidance */
-#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
-#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
-#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
-#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
- unsigned char mmw_jabber_enable; /* jabber timer enable */
- /* Abort transmissions > 200 ms */
- unsigned char mmw_freeze; /* freeze / unfreeeze signal level */
- /* 0 : signal level & qual updated for every new message, 1 : frozen */
- unsigned char mmw_anten_sel; /* antenna selection */
-#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
-#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
- unsigned char mmw_ifs; /* inter frame spacing */
- /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
- unsigned char mmw_mod_delay; /* modem delay (synchro) */
- unsigned char mmw_jam_time; /* jamming time (after collision) */
- unsigned char mmw_unused2[1]; /* unused */
- unsigned char mmw_thr_pre_set; /* level threshold preset */
- /* Discard all packet with signal < this value (4) */
- unsigned char mmw_decay_prm; /* decay parameters */
- unsigned char mmw_decay_updat_prm; /* decay update parameterz */
- unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
- /* Discard all packet with quality < this value (3) */
- unsigned char mmw_netw_id_l; /* NWID low order byte */
- unsigned char mmw_netw_id_h; /* NWID high order byte */
- /* Network ID or Domain : create virtual net on the air */
-
- /* 2.0 Hardware extension - frequency selection support */
- unsigned char mmw_mode_select; /* for analog tests (set to 0) */
- unsigned char mmw_unused3[1]; /* unused */
- unsigned char mmw_fee_ctrl; /* frequency eeprom control */
-#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions */
-#define MMW_FEE_CTRL_DWLD 0x08 /* Download eeprom to mmc */
-#define MMW_FEE_CTRL_CMD 0x07 /* EEprom commands : */
-#define MMW_FEE_CTRL_READ 0x06 /* Read */
-#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
-#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address */
-#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses */
-#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
-#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
-#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
-#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers */
-#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write addr in protect register */
-#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
- /* Never issue this command (PRDS) : it's irreversible !!! */
-
- unsigned char mmw_fee_addr; /* EEprom address */
-#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel */
-#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
-#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
-#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
-#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
-#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
-
- unsigned char mmw_fee_data_l; /* Write data to EEprom */
- unsigned char mmw_fee_data_h; /* high octet */
- unsigned char mmw_ext_ant; /* Setting for external antenna */
-#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
-#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
-#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
-#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
-#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
-} __attribute__((packed));
-
-/* Size for structure checking (if padding is correct) */
-#define MMW_SIZE 37
-
-/* Calculate offset of a field in the above structure */
-#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
-
-
-/*
- * Modem Management Controller (MMC) read structure.
- */
-typedef struct mmr_t mmr_t;
-struct mmr_t
-{
- unsigned char mmr_unused0[8]; /* unused */
- unsigned char mmr_des_status; /* encryption status */
- unsigned char mmr_des_avail; /* encryption available (0x55 read) */
-#define MMR_DES_AVAIL_DES 0x55 /* DES available */
-#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
- unsigned char mmr_des_io_invert; /* des I/O invert register */
- unsigned char mmr_unused1[5]; /* unused */
- unsigned char mmr_dce_status; /* DCE status */
-#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
-#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
-#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
-#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
-#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
- unsigned char mmr_dsp_id; /* DSP id (AA = Daedalus rev A) */
- unsigned char mmr_unused2[2]; /* unused */
- unsigned char mmr_correct_nwid_l; /* # of correct NWID's rxd (low) */
- unsigned char mmr_correct_nwid_h; /* # of correct NWID's rxd (high) */
- /* Warning : Read high order octet first !!! */
- unsigned char mmr_wrong_nwid_l; /* # of wrong NWID's rxd (low) */
- unsigned char mmr_wrong_nwid_h; /* # of wrong NWID's rxd (high) */
- unsigned char mmr_thr_pre_set; /* level threshold preset */
-#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
-#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
- unsigned char mmr_signal_lvl; /* signal level */
-#define MMR_SIGNAL_LVL 0x3F /* signal level */
-#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
- unsigned char mmr_silence_lvl; /* silence level (noise) */
-#define MMR_SILENCE_LVL 0x3F /* silence level */
-#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
- unsigned char mmr_sgnl_qual; /* signal quality */
-#define MMR_SGNL_QUAL 0x0F /* signal quality */
-#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
- unsigned char mmr_netw_id_l; /* NWID low order byte ??? */
- unsigned char mmr_unused3[3]; /* unused */
-
- /* 2.0 Hardware extension - frequency selection support */
- unsigned char mmr_fee_status; /* Status of frequency eeprom */
-#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision id */
-#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
-#define MMR_FEE_STATUS_BUSY 0x04 /* EEprom busy */
- unsigned char mmr_unused4[1]; /* unused */
- unsigned char mmr_fee_data_l; /* Read data from eeprom (low) */
- unsigned char mmr_fee_data_h; /* Read data from eeprom (high) */
-};
-
-/* Size for structure checking (if padding is correct) */
-#define MMR_SIZE 36
-
-/* Calculate offset of a field in the above structure */
-#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
-
-
-/* Make the two above structures one */
-typedef union mm_t
-{
- struct mmw_t w; /* Write to the mmc */
- struct mmr_t r; /* Read from the mmc */
-} mm_t;
-
-#endif /* _WAVELAN_CS_H */
diff --git a/drivers/net/wireless/wavelan_cs.p.h b/drivers/net/wireless/wavelan_cs.p.h
deleted file mode 100644
index 81d91531c4f..00000000000
--- a/drivers/net/wireless/wavelan_cs.p.h
+++ /dev/null
@@ -1,766 +0,0 @@
-/*
- * Wavelan Pcmcia driver
- *
- * Jean II - HPLB '96
- *
- * Reorganisation and extension of the driver.
- *
- * This file contain all definition and declarations necessary for the
- * wavelan pcmcia driver. This file is a private header, so it should
- * be included only on wavelan_cs.c !!!
- */
-
-#ifndef WAVELAN_CS_P_H
-#define WAVELAN_CS_P_H
-
-/************************** DOCUMENTATION **************************/
-/*
- * This driver provide a Linux interface to the Wavelan Pcmcia hardware
- * The Wavelan is a product of Lucent (http://www.wavelan.com/).
- * This division was formerly part of NCR and then AT&T.
- * Wavelan are also distributed by DEC (RoamAbout DS)...
- *
- * To know how to use this driver, read the PCMCIA HOWTO.
- * If you want to exploit the many other fonctionalities, look comments
- * in the code...
- *
- * This driver is the result of the effort of many peoples (see below).
- */
-
-/* ------------------------ SPECIFIC NOTES ------------------------ */
-/*
- * Web page
- * --------
- * I try to maintain a web page with the Wireless LAN Howto at :
- * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
- *
- * SMP
- * ---
- * We now are SMP compliant (I eventually fixed the remaining bugs).
- * The driver has been tested on a dual P6-150 and survived my usual
- * set of torture tests.
- * Anyway, I spent enough time chasing interrupt re-entrancy during
- * errors or reconfigure, and I designed the locked/unlocked sections
- * of the driver with great care, and with the recent addition of
- * the spinlock (thanks to the new API), we should be quite close to
- * the truth.
- * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
- * but better safe than sorry (especially at 2 Mb/s ;-).
- *
- * I have also looked into disabling only our interrupt on the card
- * (via HACR) instead of all interrupts in the processor (via cli),
- * so that other driver are not impacted, and it look like it's
- * possible, but it's very tricky to do right (full of races). As
- * the gain would be mostly for SMP systems, it can wait...
- *
- * Debugging and options
- * ---------------------
- * You will find below a set of '#define" allowing a very fine control
- * on the driver behaviour and the debug messages printed.
- * The main options are :
- * o WAVELAN_ROAMING, for the experimental roaming support.
- * o SET_PSA_CRC, to have your card correctly recognised by
- * an access point and the Point-to-Point diagnostic tool.
- * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
- * (otherwise we always start afresh with some defaults)
- *
- * wavelan_cs.o is darn too big
- * -------------------------
- * That's true ! There is a very simple way to reduce the driver
- * object by 33% (yes !). Comment out the following line :
- * #include <linux/wireless.h>
- * Other compile options can also reduce the size of it...
- *
- * MAC address and hardware detection :
- * ----------------------------------
- * The detection code of the wavelan chech that the first 3
- * octets of the MAC address fit the company code. This type of
- * detection work well for AT&T cards (because the AT&T code is
- * hardcoded in wavelan_cs.h), but of course will fail for other
- * manufacturer.
- *
- * If you are sure that your card is derived from the wavelan,
- * here is the way to configure it :
- * 1) Get your MAC address
- * a) With your card utilities (wfreqsel, instconf, ...)
- * b) With the driver :
- * o compile the kernel with DEBUG_CONFIG_INFO enabled
- * o Boot and look the card messages
- * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan_cs.h)
- * 3) Compile & verify
- * 4) Send me the MAC code - I will include it in the next version...
- *
- */
-
-/* --------------------- WIRELESS EXTENSIONS --------------------- */
-/*
- * This driver is the first one to support "wireless extensions".
- * This set of extensions provide you some way to control the wireless
- * caracteristics of the hardware in a standard way and support for
- * applications for taking advantage of it (like Mobile IP).
- *
- * It might be a good idea as well to fetch the wireless tools to
- * configure the device and play a bit.
- */
-
-/* ---------------------------- FILES ---------------------------- */
-/*
- * wavelan_cs.c : The actual code for the driver - C functions
- *
- * wavelan_cs.p.h : Private header : local types / vars for the driver
- *
- * wavelan_cs.h : Description of the hardware interface & structs
- *
- * i82593.h : Description if the Ethernet controller
- */
-
-/* --------------------------- HISTORY --------------------------- */
-/*
- * The history of the Wavelan drivers is as complicated as history of
- * the Wavelan itself (NCR -> AT&T -> Lucent).
- *
- * All started with Anders Klemets <klemets@paul.rutgers.edu>,
- * writing a Wavelan ISA driver for the MACH microkernel. Girish
- * Welling <welling@paul.rutgers.edu> had also worked on it.
- * Keith Moore modify this for the Pcmcia hardware.
- *
- * Robert Morris <rtm@das.harvard.edu> port these two drivers to BSDI
- * and add specific Pcmcia support (there is currently no equivalent
- * of the PCMCIA package under BSD...).
- *
- * Jim Binkley <jrb@cs.pdx.edu> port both BSDI drivers to FreeBSD.
- *
- * Bruce Janson <bruce@cs.usyd.edu.au> port the BSDI ISA driver to Linux.
- *
- * Anthony D. Joseph <adj@lcs.mit.edu> started modify Bruce driver
- * (with help of the BSDI PCMCIA driver) for PCMCIA.
- * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished is work.
- * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
- * correctly 2.00 cards (2.4 GHz with frequency selection).
- * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
- * Pcmcia package (+ bug corrections).
- *
- * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
- * patchs to the Pcmcia driver. After, I added code in the ISA driver
- * for Wireless Extensions and full support of frequency selection
- * cards. Now, I'm doing the same to the Pcmcia driver + some
- * reorganisation.
- * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
- * much needed informations on the Wavelan hardware.
- */
-
-/* By the way : for the copyright & legal stuff :
- * Almost everybody wrote code under GNU or BSD license (or alike),
- * and want that their original copyright remain somewhere in the
- * code (for myself, I go with the GPL).
- * Nobody want to take responsibility for anything, except the fame...
- */
-
-/* --------------------------- CREDITS --------------------------- */
-/*
- * Credits:
- * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht and
- * Loeke Brederveld of Lucent for providing extremely useful
- * information about WaveLAN PCMCIA hardware
- *
- * This driver is based upon several other drivers, in particular:
- * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
- * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
- * Anders Klemets' PCMCIA WaveLAN adapter driver
- * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
- *
- * Additional Credits:
- *
- * This software was originally developed under Linux 1.2.3
- * (Slackware 2.0 distribution).
- * And then under Linux 2.0.x (Debian 1.1 -> 2.2 - pcmcia 2.8.18+)
- * with an HP OmniBook 4000 and then a 5500.
- *
- * It is based on other device drivers and information either written
- * or supplied by:
- * James Ashton (jaa101@syseng.anu.edu.au),
- * Ajay Bakre (bakre@paul.rutgers.edu),
- * Donald Becker (becker@super.org),
- * Jim Binkley <jrb@cs.pdx.edu>,
- * Loeke Brederveld <lbrederv@wavelan.com>,
- * Allan Creighton (allanc@cs.su.oz.au),
- * Brent Elphick <belphick@uwaterloo.ca>,
- * Joe Finney <joe@comp.lancs.ac.uk>,
- * Matthew Geier (matthew@cs.su.oz.au),
- * Remo di Giovanni (remo@cs.su.oz.au),
- * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
- * David Hinds <dahinds@users.sourceforge.net>,
- * Jan Hoogendoorn (c/o marteijn@lucent.com),
- * Bruce Janson <bruce@cs.usyd.edu.au>,
- * Anthony D. Joseph <adj@lcs.mit.edu>,
- * Anders Klemets (klemets@paul.rutgers.edu),
- * Yunzhou Li <yunzhou@strat.iol.unh.edu>,
- * Marc Meertens (mmeertens@lucent.com),
- * Keith Moore,
- * Robert Morris (rtm@das.harvard.edu),
- * Ian Parkin (ian@cs.su.oz.au),
- * John Rosenberg (johnr@cs.su.oz.au),
- * George Rossi (george@phm.gov.au),
- * Arthur Scott (arthur@cs.su.oz.au),
- * Stanislav Sinyagin <stas@isf.ru>
- * Peter Storey,
- * Jean Tourrilhes <jt@hpl.hp.com>,
- * Girish Welling (welling@paul.rutgers.edu)
- * Clark Woodworth <clark@hiway1.exit109.com>
- * Yongguang Zhang <ygz@isl.hrl.hac.com>...
- */
-
-/* ------------------------- IMPROVEMENTS ------------------------- */
-/*
- * I proudly present :
- *
- * Changes made in 2.8.22 :
- * ----------------------
- * - improved wv_set_multicast_list
- * - catch spurious interrupt
- * - correct release of the device
- *
- * Changes mades in release :
- * ------------------------
- * - Reorganisation of the code, function name change
- * - Creation of private header (wavelan_cs.h)
- * - Reorganised debug messages
- * - More comments, history, ...
- * - Configure earlier (in "insert" instead of "open")
- * and do things only once
- * - mmc_init : configure the PSA if not done
- * - mmc_init : 2.00 detection better code for 2.00 init
- * - better info at startup
- * - Correct a HUGE bug (volatile & uncalibrated busy loop)
- * in wv_82593_cmd => config speedup
- * - Stop receiving & power down on close (and power up on open)
- * use "ifconfig down" & "ifconfig up ; route add -net ..."
- * - Send packets : add watchdog instead of pooling
- * - Receive : check frame wrap around & try to recover some frames
- * - wavelan_set_multicast_list : avoid reset
- * - add wireless extensions (ioctl & get_wireless_stats)
- * get/set nwid/frequency on fly, info for /proc/net/wireless
- * - Suppress useless stuff from lp (net_local), but add link
- * - More inlines
- * - Lot of others minor details & cleanups
- *
- * Changes made in second release :
- * ------------------------------
- * - Optimise wv_85893_reconfig stuff, fix potential problems
- * - Change error values for ioctl
- * - Non blocking wv_ru_stop() + call wv_reset() in case of problems
- * - Remove development printk from wavelan_watchdog()
- * - Remove of the watchdog to wavelan_close instead of wavelan_release
- * fix potential problems...
- * - Start debugging suspend stuff (but it's still a bit weird)
- * - Debug & optimize dump header/packet in Rx & Tx (debug)
- * - Use "readb" and "writeb" to be kernel 2.1 compliant
- * - Better handling of bogus interrupts
- * - Wireless extension : SETSPY and GETSPY
- * - Remove old stuff (stats - for those needing it, just ask me...)
- * - Make wireless extensions optional
- *
- * Changes made in third release :
- * -----------------------------
- * - cleanups & typos
- * - modif wireless ext (spy -> only one pointer)
- * - new private ioctl to set/get quality & level threshold
- * - Init : correct default value of level threshold for pcmcia
- * - kill watchdog in hw_reset
- * - more 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
- * - Add message level (debug stuff in /var/adm/debug & errors not
- * displayed at console and still in /var/adm/messages)
- *
- * Changes made in fourth release :
- * ------------------------------
- * - multicast support (yes !) thanks to Yongguang Zhang.
- *
- * Changes made in fifth release (2.9.0) :
- * -------------------------------------
- * - Revisited multicast code (it was mostly wrong).
- * - protect code in wv_82593_reconfig with dev->tbusy (oups !)
- *
- * Changes made in sixth release (2.9.1a) :
- * --------------------------------------
- * - Change the detection code for multi manufacturer code support
- * - Correct bug (hang kernel) in init when we were "rejecting" a card
- *
- * Changes made in seventh release (2.9.1b) :
- * ----------------------------------------
- * - Update to wireless extensions changes
- * - Silly bug in card initial configuration (psa_conf_status)
- *
- * Changes made in eigth release :
- * -----------------------------
- * - Small bug in debug code (probably not the last one...)
- * - 1.2.13 support (thanks to Clark Woodworth)
- *
- * Changes made for release in 2.9.2b :
- * ----------------------------------
- * - Level threshold is now a standard wireless extension (version 4 !)
- * - modules parameters types for kernel > 2.1.17
- * - updated man page
- * - Others cleanup from David Hinds
- *
- * Changes made for release in 2.9.5 :
- * ---------------------------------
- * - byte count stats (courtesy of David Hinds)
- * - Remove dev_tint stuff (courtesy of David Hinds)
- * - Others cleanup from David Hinds
- * - Encryption setting from Brent Elphick (thanks a lot !)
- * - 'base' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
- *
- * Changes made for release in 2.9.6 :
- * ---------------------------------
- * - fix bug : no longuer disable watchdog in case of bogus interrupt
- * - increase timeout in config code for picky hardware
- * - mask unused bits in status (Wireless Extensions)
- *
- * Changes integrated by Justin Seger <jseger@MIT.EDU> & David Hinds :
- * -----------------------------------------------------------------
- * - Roaming "hack" from Joe Finney <joe@comp.lancs.ac.uk>
- * - PSA CRC code from Bob Gray <rgray@bald.cs.dartmouth.edu>
- * - Better initialisation of the i82593 controller
- * from Joseph K. O'Sullivan <josullvn+@cs.cmu.edu>
- *
- * Changes made for release in 3.0.10 :
- * ----------------------------------
- * - Fix eject "hang" of the driver under 2.2.X :
- * o create wv_flush_stale_links()
- * o Rename wavelan_release to wv_pcmcia_release & move up
- * o move unregister_netdev to wavelan_detach()
- * o wavelan_release() no longer call wavelan_detach()
- * o Suppress "release" timer
- * o Other cleanups & fixes
- * - New MAC address in the probe
- * - Reorg PSA_CRC code (endian neutral & cleaner)
- * - Correct initialisation of the i82593 from Lucent manual
- * - Put back the watchdog, with larger timeout
- * - TRANSMIT_NO_CRC is a "normal" error, so recover from it
- * from Derrick J Brashear <shadow@dementia.org>
- * - Better handling of TX and RX normal failure conditions
- * - #ifdef out all the roaming code
- * - Add ESSID & "AP current address" ioctl stubs
- * - General cleanup of the code
- *
- * Changes made for release in 3.0.13 :
- * ----------------------------------
- * - Re-enable compilation of roaming code by default, but with
- * do_roaming = 0
- * - Nuke `nwid=nwid^ntohs(beacon->domain_id)' in wl_roam_gather
- * at the demand of John Carol Langford <jcl@gs176.sp.cs.cmu.edu>
- * - Introduced WAVELAN_ROAMING_EXT for incomplete ESSID stuff.
- *
- * Changes made for release in 3.0.15 :
- * ----------------------------------
- * - Change e-mail and web page addresses
- * - Watchdog timer is now correctly expressed in HZ, not in jiffies
- * - Add channel number to the list of frequencies in range
- * - Add the (short) list of bit-rates in range
- * - Developp a new sensitivity... (sens.value & sens.fixed)
- *
- * Changes made for release in 3.1.2 :
- * ---------------------------------
- * - Fix check for root permission (break instead of exit)
- * - New nwid & encoding setting (Wireless Extension 9)
- *
- * Changes made for release in 3.1.12 :
- * ----------------------------------
- * - reworked wv_82593_cmd to avoid using the IRQ handler and doing
- * ugly things with interrupts.
- * - Add IRQ protection in 82593_config/ru_start/ru_stop/watchdog
- * - Update to new network API (softnet - 2.3.43) :
- * o replace dev->tbusy (David + me)
- * o replace dev->tstart (David + me)
- * o remove dev->interrupt (David)
- * o add SMP locking via spinlock in splxx (me)
- * o add spinlock in interrupt handler (me)
- * o use kernel watchdog instead of ours (me)
- * o verify that all the changes make sense and work (me)
- * - Re-sync kernel/pcmcia versions (not much actually)
- * - A few other cleanups (David & me)...
- *
- * Changes made for release in 3.1.22 :
- * ----------------------------------
- * - Check that SMP works, remove annoying log message
- *
- * Changes made for release in 3.1.24 :
- * ----------------------------------
- * - Fix unfrequent card lockup when watchdog was reseting the hardware :
- * o control first busy loop in wv_82593_cmd()
- * o Extend spinlock protection in wv_hw_config()
- *
- * Changes made for release in 3.1.33 :
- * ----------------------------------
- * - Optional use new driver API for Wireless Extensions :
- * o got rid of wavelan_ioctl()
- * o use a bunch of iw_handler instead
- *
- * Changes made for release in 3.2.1 :
- * ---------------------------------
- * - Set dev->trans_start to avoid filling the logs
- * (and generating useless abort commands)
- * - Avoid deadlocks in mmc_out()/mmc_in()
- *
- * Wishes & dreams:
- * ----------------
- * - Cleanup and integrate the roaming code
- * (std debug, set DomainID, decay avg and co...)
- */
-
-/***************************** INCLUDES *****************************/
-
-/* Linux headers that we need */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-#include <linux/in.h>
-#include <linux/delay.h>
-#include <linux/bitops.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/system.h>
-
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/if_arp.h>
-#include <linux/ioport.h>
-#include <linux/fcntl.h>
-#include <linux/ethtool.h>
-#include <linux/wireless.h> /* Wireless extensions */
-#include <net/iw_handler.h> /* New driver API */
-
-/* Pcmcia headers that we need */
-#include <pcmcia/cs_types.h>
-#include <pcmcia/cs.h>
-#include <pcmcia/cistpl.h>
-#include <pcmcia/cisreg.h>
-#include <pcmcia/ds.h>
-
-/* Wavelan declarations */
-#include "i82593.h" /* Definitions for the Intel chip */
-
-#include "wavelan_cs.h" /* Others bits of the hardware */
-
-/************************** DRIVER OPTIONS **************************/
-/*
- * `#define' or `#undef' the following constant to change the behaviour
- * of the driver...
- */
-#define WAVELAN_ROAMING /* Include experimental roaming code */
-#undef WAVELAN_ROAMING_EXT /* Enable roaming wireless extensions */
-#undef SET_PSA_CRC /* Set the CRC in PSA (slower) */
-#define USE_PSA_CONFIG /* Use info from the PSA */
-#undef EEPROM_IS_PROTECTED /* Doesn't seem to be necessary */
-#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical) */
-#undef SET_MAC_ADDRESS /* Experimental */
-
-/* Warning : these stuff will slow down the driver... */
-#define WIRELESS_SPY /* Enable spying addresses */
-#undef HISTOGRAM /* Enable histogram of sig level... */
-
-/****************************** DEBUG ******************************/
-
-#undef DEBUG_MODULE_TRACE /* Module insertion/removal */
-#undef DEBUG_CALLBACK_TRACE /* Calls made by Linux */
-#undef DEBUG_INTERRUPT_TRACE /* Calls to handler */
-#undef DEBUG_INTERRUPT_INFO /* type of interrupt & so on */
-#define DEBUG_INTERRUPT_ERROR /* problems */
-#undef DEBUG_CONFIG_TRACE /* Trace the config functions */
-#undef DEBUG_CONFIG_INFO /* What's going on... */
-#define DEBUG_CONFIG_ERRORS /* Errors on configuration */
-#undef DEBUG_TX_TRACE /* Transmission calls */
-#undef DEBUG_TX_INFO /* Header of the transmitted packet */
-#undef DEBUG_TX_FAIL /* Normal failure conditions */
-#define DEBUG_TX_ERROR /* Unexpected conditions */
-#undef DEBUG_RX_TRACE /* Transmission calls */
-#undef DEBUG_RX_INFO /* Header of the transmitted packet */
-#undef DEBUG_RX_FAIL /* Normal failure conditions */
-#define DEBUG_RX_ERROR /* Unexpected conditions */
-#undef DEBUG_PACKET_DUMP /* Dump packet on the screen */
-#undef DEBUG_IOCTL_TRACE /* Misc call by Linux */
-#undef DEBUG_IOCTL_INFO /* Various debug info */
-#define DEBUG_IOCTL_ERROR /* What's going wrong */
-#define DEBUG_BASIC_SHOW /* Show basic startup info */
-#undef DEBUG_VERSION_SHOW /* Print version info */
-#undef DEBUG_PSA_SHOW /* Dump psa to screen */
-#undef DEBUG_MMC_SHOW /* Dump mmc to screen */
-#undef DEBUG_SHOW_UNUSED /* Show also unused fields */
-#undef DEBUG_I82593_SHOW /* Show i82593 status */
-#undef DEBUG_DEVICE_SHOW /* Show device parameters */
-
-/************************ CONSTANTS & MACROS ************************/
-
-#ifdef DEBUG_VERSION_SHOW
-static const char *version = "wavelan_cs.c : v24 (SMP + wireless extensions) 11/1/02\n";
-#endif
-
-/* Watchdog temporisation */
-#define WATCHDOG_JIFFIES (256*HZ/100)
-
-/* Fix a bug in some old wireless extension definitions */
-#ifndef IW_ESSID_MAX_SIZE
-#define IW_ESSID_MAX_SIZE 32
-#endif
-
-/* ------------------------ PRIVATE IOCTL ------------------------ */
-
-#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
-#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
-#define SIOCSIPROAM SIOCIWFIRSTPRIV + 2 /* Set roaming state */
-#define SIOCGIPROAM SIOCIWFIRSTPRIV + 3 /* Get roaming state */
-
-#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 4 /* Set histogram ranges */
-#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 5 /* Get histogram values */
-
-/*************************** WaveLAN Roaming **************************/
-#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
-
-#define WAVELAN_ROAMING_DEBUG 0 /* 1 = Trace of handover decisions */
- /* 2 = Info on each beacon rcvd... */
-#define MAX_WAVEPOINTS 7 /* Max visible at one time */
-#define WAVEPOINT_HISTORY 5 /* SNR sample history slow search */
-#define WAVEPOINT_FAST_HISTORY 2 /* SNR sample history fast search */
-#define SEARCH_THRESH_LOW 10 /* SNR to enter cell search */
-#define SEARCH_THRESH_HIGH 13 /* SNR to leave cell search */
-#define WAVELAN_ROAMING_DELTA 1 /* Hysteresis value (+/- SNR) */
-#define CELL_TIMEOUT 2*HZ /* in jiffies */
-
-#define FAST_CELL_SEARCH 1 /* Boolean values... */
-#define NWID_PROMISC 1 /* for code clarity. */
-
-typedef struct wavepoint_beacon
-{
- unsigned char dsap, /* Unused */
- ssap, /* Unused */
- ctrl, /* Unused */
- O,U,I, /* Unused */
- spec_id1, /* Unused */
- spec_id2, /* Unused */
- pdu_type, /* Unused */
- seq; /* WavePoint beacon sequence number */
- __be16 domain_id, /* WavePoint Domain ID */
- nwid; /* WavePoint NWID */
-} wavepoint_beacon;
-
-typedef struct wavepoint_history
-{
- unsigned short nwid; /* WavePoint's NWID */
- int average_slow; /* SNR running average */
- int average_fast; /* SNR running average */
- unsigned char sigqual[WAVEPOINT_HISTORY]; /* Ringbuffer of recent SNR's */
- unsigned char qualptr; /* Index into ringbuffer */
- unsigned char last_seq; /* Last seq. no seen for WavePoint */
- struct wavepoint_history *next; /* Next WavePoint in table */
- struct wavepoint_history *prev; /* Previous WavePoint in table */
- unsigned long last_seen; /* Time of last beacon recvd, jiffies */
-} wavepoint_history;
-
-struct wavepoint_table
-{
- wavepoint_history *head; /* Start of ringbuffer */
- int num_wavepoints; /* No. of WavePoints visible */
- unsigned char locked; /* Table lock */
-};
-
-#endif /* WAVELAN_ROAMING */
-
-/****************************** TYPES ******************************/
-
-/* Shortcuts */
-typedef struct iw_statistics iw_stats;
-typedef struct iw_quality iw_qual;
-typedef struct iw_freq iw_freq;
-typedef struct net_local net_local;
-typedef struct timer_list timer_list;
-
-/* Basic types */
-typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
-
-/*
- * Static specific data for the interface.
- *
- * For each network interface, Linux keep data in two structure. "device"
- * keep the generic data (same format for everybody) and "net_local" keep
- * the additional specific data.
- */
-struct net_local
-{
- dev_node_t node; /* ???? What is this stuff ???? */
- struct net_device * dev; /* Reverse link... */
- spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
- struct pcmcia_device * link; /* pcmcia structure */
- int nresets; /* Number of hw resets */
- u_char configured; /* If it is configured */
- u_char reconfig_82593; /* Need to reconfigure the controller */
- u_char promiscuous; /* Promiscuous mode */
- u_char allmulticast; /* All Multicast mode */
- int mc_count; /* Number of multicast addresses */
-
- int stop; /* Current i82593 Stop Hit Register */
- int rfp; /* Last DMA machine receive pointer */
- int overrunning; /* Receiver overrun flag */
-
- iw_stats wstats; /* Wireless specific stats */
-
- struct iw_spy_data spy_data;
- struct iw_public_data wireless_data;
-
-#ifdef HISTOGRAM
- int his_number; /* Number of intervals */
- u_char his_range[16]; /* Boundaries of interval ]n-1; n] */
- u_long his_sum[16]; /* Sum in interval */
-#endif /* HISTOGRAM */
-#ifdef WAVELAN_ROAMING
- u_long domain_id; /* Domain ID we lock on for roaming */
- int filter_domains; /* Check Domain ID of beacon found */
- struct wavepoint_table wavepoint_table; /* Table of visible WavePoints*/
- wavepoint_history * curr_point; /* Current wavepoint */
- int cell_search; /* Searching for new cell? */
- struct timer_list cell_timer; /* Garbage collection */
-#endif /* WAVELAN_ROAMING */
- void __iomem *mem;
-};
-
-/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
-static inline u_char /* data */
- hasr_read(u_long); /* Read the host interface : base address */
-static void
- hacr_write(u_long, /* Write to host interface : base address */
- u_char), /* data */
- hacr_write_slow(u_long,
- u_char);
-static void
- psa_read(struct net_device *, /* Read the Parameter Storage Area */
- int, /* offset in PSA */
- u_char *, /* buffer to fill */
- int), /* size to read */
- psa_write(struct net_device *, /* Write to the PSA */
- int, /* Offset in psa */
- u_char *, /* Buffer in memory */
- int); /* Length of buffer */
-static void
- mmc_out(u_long, /* Write 1 byte to the Modem Manag Control */
- u_short,
- u_char),
- mmc_write(u_long, /* Write n bytes to the MMC */
- u_char,
- u_char *,
- int);
-static u_char /* Read 1 byte from the MMC */
- mmc_in(u_long,
- u_short);
-static void
- mmc_read(u_long, /* Read n bytes from the MMC */
- u_char,
- u_char *,
- int),
- fee_wait(u_long, /* Wait for frequency EEprom : base address */
- int, /* Base delay to wait for */
- int); /* Number of time to wait */
-static void
- fee_read(u_long, /* Read the frequency EEprom : base address */
- u_short, /* destination offset */
- u_short *, /* data buffer */
- int); /* number of registers */
-/* ---------------------- I82593 SUBROUTINES ----------------------- */
-static int
- wv_82593_cmd(struct net_device *, /* synchronously send a command to i82593 */
- char *,
- int,
- int);
-static inline int
- wv_diag(struct net_device *); /* Diagnostique the i82593 */
-static int
- read_ringbuf(struct net_device *, /* Read a receive buffer */
- int,
- char *,
- int);
-static void
- wv_82593_reconfig(struct net_device *); /* Reconfigure the controller */
-/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
-static void
- wv_init_info(struct net_device *); /* display startup info */
-/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
-static iw_stats *
- wavelan_get_wireless_stats(struct net_device *);
-/* ----------------------- PACKET RECEPTION ----------------------- */
-static int
- wv_start_of_frame(struct net_device *, /* Seek beggining of current frame */
- int, /* end of frame */
- int); /* start of buffer */
-static void
- wv_packet_read(struct net_device *, /* Read a packet from a frame */
- int,
- int),
- wv_packet_rcv(struct net_device *); /* Read all packets waiting */
-/* --------------------- PACKET TRANSMISSION --------------------- */
-static void
- wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer */
- void *,
- short);
-static netdev_tx_t
- wavelan_packet_xmit(struct sk_buff *, /* Send a packet */
- struct net_device *);
-/* -------------------- HARDWARE CONFIGURATION -------------------- */
-static int
- wv_mmc_init(struct net_device *); /* Initialize the modem */
-static int
- wv_ru_stop(struct net_device *), /* Stop the i82593 receiver unit */
- wv_ru_start(struct net_device *); /* Start the i82593 receiver unit */
-static int
- wv_82593_config(struct net_device *); /* Configure the i82593 */
-static int
- wv_pcmcia_reset(struct net_device *); /* Reset the pcmcia interface */
-static int
- wv_hw_config(struct net_device *); /* Reset & configure the whole hardware */
-static void
- wv_hw_reset(struct net_device *); /* Same, + start receiver unit */
-static int
- wv_pcmcia_config(struct pcmcia_device *); /* Configure the pcmcia interface */
-static void
- wv_pcmcia_release(struct pcmcia_device *);/* Remove a device */
-/* ---------------------- INTERRUPT HANDLING ---------------------- */
-static irqreturn_t
- wavelan_interrupt(int, /* Interrupt handler */
- void *);
-static void
- wavelan_watchdog(struct net_device *); /* Transmission watchdog */
-/* ------------------- CONFIGURATION CALLBACKS ------------------- */
-static int
- wavelan_open(struct net_device *), /* Open the device */
- wavelan_close(struct net_device *); /* Close the device */
-static void
- wavelan_detach(struct pcmcia_device *p_dev); /* Destroy a removed device */
-
-/**************************** VARIABLES ****************************/
-
-/*
- * Parameters that can be set with 'insmod'
- * The exact syntax is 'insmod wavelan_cs.o <var>=<value>'
- */
-
-/* Shared memory speed, in ns */
-static int mem_speed = 0;
-
-/* New module interface */
-module_param(mem_speed, int, 0);
-
-#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
-/* Enable roaming mode ? No ! Please keep this to 0 */
-static int do_roaming = 0;
-module_param(do_roaming, bool, 0);
-#endif /* WAVELAN_ROAMING */
-
-MODULE_LICENSE("GPL");
-
-#endif /* WAVELAN_CS_P_H */
-
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
index 88060e11754..785e0244e30 100644
--- a/drivers/net/wireless/wl12xx/Kconfig
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -1,6 +1,6 @@
menuconfig WL12XX
tristate "TI wl12xx driver support"
- depends on MAC80211 && WLAN_80211 && EXPERIMENTAL
+ depends on MAC80211 && EXPERIMENTAL
---help---
This will enable TI wl12xx driver support. The drivers make
use of the mac80211 stack.
@@ -42,6 +42,7 @@ config WL1251_SDIO
config WL1271
tristate "TI wl1271 support"
depends on WL12XX && SPI_MASTER && GENERIC_HARDIRQS
+ depends on INET
select FW_LOADER
select CRC7
---help---
diff --git a/drivers/net/wireless/wl12xx/wl1251_main.c b/drivers/net/wireless/wl12xx/wl1251_main.c
index 48b0bfd6c55..da3bf1cebc0 100644
--- a/drivers/net/wireless/wl12xx/wl1251_main.c
+++ b/drivers/net/wireless/wl12xx/wl1251_main.c
@@ -1311,7 +1311,8 @@ int wl1251_init_ieee80211(struct wl1251 *wl)
wl->hw->channel_change_time = 10000;
wl->hw->flags = IEEE80211_HW_SIGNAL_DBM |
- IEEE80211_HW_NOISE_DBM;
+ IEEE80211_HW_NOISE_DBM |
+ IEEE80211_HW_SUPPORTS_PS;
wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
wl->hw->wiphy->max_scan_ssids = 1;
diff --git a/drivers/net/wireless/wl12xx/wl1271.h b/drivers/net/wireless/wl12xx/wl1271.h
index 566f1521ec2..94359b1a861 100644
--- a/drivers/net/wireless/wl12xx/wl1271.h
+++ b/drivers/net/wireless/wl12xx/wl1271.h
@@ -417,6 +417,9 @@ struct wl1271 {
/* PSM mode requested */
bool psm_requested;
+ /* retry counter for PSM entries */
+ u8 psm_entry_retry;
+
/* in dBm */
int power_level;
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.c b/drivers/net/wireless/wl12xx/wl1271_acx.c
index bf5a8680a46..5cc89bbdac7 100644
--- a/drivers/net/wireless/wl12xx/wl1271_acx.c
+++ b/drivers/net/wireless/wl12xx/wl1271_acx.c
@@ -141,7 +141,7 @@ int wl1271_acx_tx_power(struct wl1271 *wl, int power)
* calibration, to avoid distortions
*/
/* acx->current_tx_power = power * 10; */
- acx->current_tx_power = 70;
+ acx->current_tx_power = 120;
ret = wl1271_cmd_configure(wl, DOT11_CUR_TX_PWR, acx, sizeof(*acx));
if (ret < 0) {
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.c b/drivers/net/wireless/wl12xx/wl1271_boot.c
index ba4a2b4f0f5..b7c96454cca 100644
--- a/drivers/net/wireless/wl12xx/wl1271_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1271_boot.c
@@ -380,7 +380,7 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
}
}
- if (loop >= INIT_LOOP) {
+ if (loop > INIT_LOOP) {
wl1271_error("timeout waiting for the hardware to "
"complete initialization");
return -EIO;
@@ -407,7 +407,8 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
/* unmask required mbox events */
wl->event_mask = BSS_LOSE_EVENT_ID |
- SCAN_COMPLETE_EVENT_ID;
+ SCAN_COMPLETE_EVENT_ID |
+ PS_REPORT_EVENT_ID;
ret = wl1271_event_unmask(wl);
if (ret < 0) {
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.c b/drivers/net/wireless/wl12xx/wl1271_cmd.c
index 0666328ce9a..990eb01b4c7 100644
--- a/drivers/net/wireless/wl12xx/wl1271_cmd.c
+++ b/drivers/net/wireless/wl12xx/wl1271_cmd.c
@@ -42,12 +42,14 @@
* @buf: buffer containing the command, must work with dma
* @len: length of the buffer
*/
-int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len)
+int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
+ size_t res_len)
{
struct wl1271_cmd_header *cmd;
unsigned long timeout;
u32 intr;
int ret = 0;
+ u16 status;
cmd = buf;
cmd->id = cpu_to_le16(id);
@@ -74,6 +76,17 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len)
intr = wl1271_spi_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
}
+ /* read back the status code of the command */
+ if (res_len == 0)
+ res_len = sizeof(struct wl1271_cmd_header);
+ wl1271_spi_read(wl, wl->cmd_box_addr, cmd, res_len, false);
+
+ status = le16_to_cpu(cmd->status);
+ if (status != CMD_STATUS_SUCCESS) {
+ wl1271_error("command execute failure %d", status);
+ ret = -EIO;
+ }
+
wl1271_spi_write32(wl, ACX_REG_INTERRUPT_ACK,
WL1271_ACX_INTR_CMD_COMPLETE);
@@ -262,7 +275,7 @@ int wl1271_cmd_join(struct wl1271 *wl)
wl->tx_security_seq_16 = 0;
wl->tx_security_seq_32 = 0;
- ret = wl1271_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join));
+ ret = wl1271_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join), 0);
if (ret < 0) {
wl1271_error("failed to initiate cmd join");
goto out_free;
@@ -294,35 +307,21 @@ out:
int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer)
{
int ret;
+ size_t res_len = 0;
wl1271_debug(DEBUG_CMD, "cmd test");
- ret = wl1271_cmd_send(wl, CMD_TEST, buf, buf_len);
+ if (answer)
+ res_len = buf_len;
+
+ ret = wl1271_cmd_send(wl, CMD_TEST, buf, buf_len, res_len);
if (ret < 0) {
wl1271_warning("TEST command failed");
return ret;
}
- if (answer) {
- struct wl1271_command *cmd_answer;
- u16 status;
-
- /*
- * The test command got in, we can read the answer.
- * The answer would be a wl1271_command, where the
- * parameter array contains the actual answer.
- */
- wl1271_spi_read(wl, wl->cmd_box_addr, buf, buf_len, false);
-
- cmd_answer = buf;
- status = le16_to_cpu(cmd_answer->header.status);
-
- if (status != CMD_STATUS_SUCCESS)
- wl1271_error("TEST command answer error: %d", status);
- }
-
- return 0;
+ return ret;
}
/**
@@ -345,21 +344,10 @@ int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len)
/* payload length, does not include any headers */
acx->len = cpu_to_le16(len - sizeof(*acx));
- ret = wl1271_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx));
- if (ret < 0) {
+ ret = wl1271_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx), len);
+ if (ret < 0)
wl1271_error("INTERROGATE command failed");
- goto out;
- }
- /* the interrogate command got in, we can read the answer */
- wl1271_spi_read(wl, wl->cmd_box_addr, buf, len, false);
-
- acx = buf;
- if (le16_to_cpu(acx->cmd.status) != CMD_STATUS_SUCCESS)
- wl1271_error("INTERROGATE command error: %d",
- le16_to_cpu(acx->cmd.status));
-
-out:
return ret;
}
@@ -383,7 +371,7 @@ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len)
/* payload length, does not include any headers */
acx->len = cpu_to_le16(len - sizeof(*acx));
- ret = wl1271_cmd_send(wl, CMD_CONFIGURE, acx, len);
+ ret = wl1271_cmd_send(wl, CMD_CONFIGURE, acx, len, 0);
if (ret < 0) {
wl1271_warning("CONFIGURE command NOK");
return ret;
@@ -416,7 +404,7 @@ int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable)
cmd_tx = CMD_DISABLE_TX;
}
- ret = wl1271_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_error("rx %s cmd for channel %d failed",
enable ? "start" : "stop", channel);
@@ -426,7 +414,7 @@ int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable)
wl1271_debug(DEBUG_BOOT, "rx %s cmd channel %d",
enable ? "start" : "stop", channel);
- ret = wl1271_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_error("tx %s cmd for channel %d failed",
enable ? "start" : "stop", channel);
@@ -468,7 +456,7 @@ int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode)
ps_params->null_data_rate = cpu_to_le32(1); /* 1 Mbps */
ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params,
- sizeof(*ps_params));
+ sizeof(*ps_params), 0);
if (ret < 0) {
wl1271_error("cmd set_ps_mode failed");
goto out;
@@ -499,19 +487,14 @@ int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer,
cmd->addr = cpu_to_le32(addr);
cmd->size = cpu_to_le32(len);
- ret = wl1271_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd),
+ sizeof(*cmd));
if (ret < 0) {
wl1271_error("read memory command failed: %d", ret);
goto out;
}
- /* the read command got in, we can now read the answer */
- wl1271_spi_read(wl, wl->cmd_box_addr, cmd, sizeof(*cmd), false);
-
- if (le16_to_cpu(cmd->header.status) != CMD_STATUS_SUCCESS)
- wl1271_error("error in read command result: %d",
- le16_to_cpu(cmd->header.status));
-
+ /* the read command got in */
memcpy(answer, cmd->value, len);
out:
@@ -613,7 +596,7 @@ int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
trigger->timeout = 0;
ret = wl1271_cmd_send(wl, CMD_TRIGGER_SCAN_TO, trigger,
- sizeof(*trigger));
+ sizeof(*trigger), 0);
if (ret < 0) {
wl1271_error("trigger scan to failed for hw scan");
goto out;
@@ -636,20 +619,10 @@ int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
}
}
- ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params));
+ ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params), 0);
if (ret < 0) {
wl1271_error("SCAN failed");
- goto out;
- }
-
- wl1271_spi_read(wl, wl->cmd_box_addr, params, sizeof(*params),
- false);
-
- if (le16_to_cpu(params->header.status) != CMD_STATUS_SUCCESS) {
- wl1271_error("Scan command error: %d",
- le16_to_cpu(params->header.status));
wl->scanning = false;
- ret = -EIO;
goto out;
}
@@ -684,7 +657,7 @@ int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id,
if (buf)
memcpy(cmd->template_data, buf, buf_len);
- ret = wl1271_cmd_send(wl, CMD_SET_TEMPLATE, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, CMD_SET_TEMPLATE, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_warning("cmd set_template failed: %d", ret);
goto out_free;
@@ -863,7 +836,7 @@ int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id)
cmd->key_action = cpu_to_le16(KEY_SET_ID);
cmd->key_type = KEY_WEP;
- ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_warning("cmd set_default_wep_key failed: %d", ret);
goto out;
@@ -920,7 +893,7 @@ int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
wl1271_dump(DEBUG_CRYPT, "TARGET KEY: ", cmd, sizeof(*cmd));
- ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_warning("could not set keys");
goto out;
@@ -950,7 +923,7 @@ int wl1271_cmd_disconnect(struct wl1271 *wl)
/* disconnect reason is not used in immediate disconnections */
cmd->type = DISCONNECT_IMMEDIATE;
- ret = wl1271_cmd_send(wl, CMD_DISCONNECT, cmd, sizeof(*cmd));
+ ret = wl1271_cmd_send(wl, CMD_DISCONNECT, cmd, sizeof(*cmd), 0);
if (ret < 0) {
wl1271_error("failed to send disconnect command");
goto out_free;
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.h b/drivers/net/wireless/wl12xx/wl1271_cmd.h
index 174b8209dbf..9d7061b3c8a 100644
--- a/drivers/net/wireless/wl12xx/wl1271_cmd.h
+++ b/drivers/net/wireless/wl12xx/wl1271_cmd.h
@@ -29,7 +29,8 @@
struct acx_header;
-int wl1271_cmd_send(struct wl1271 *wl, u16 type, void *buf, size_t buf_len);
+int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
+ size_t res_len);
int wl1271_cmd_join(struct wl1271 *wl);
int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer);
int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len);
diff --git a/drivers/net/wireless/wl12xx/wl1271_conf.h b/drivers/net/wireless/wl12xx/wl1271_conf.h
index 061d47520a3..565373ede26 100644
--- a/drivers/net/wireless/wl12xx/wl1271_conf.h
+++ b/drivers/net/wireless/wl12xx/wl1271_conf.h
@@ -712,6 +712,14 @@ struct conf_conn_settings {
* Range 0 - 255
*/
u8 bet_max_consecutive;
+
+ /*
+ * Specifies the maximum number of times to try PSM entry if it fails
+ * (if sending the appropriate null-func message fails.)
+ *
+ * Range 0 - 255
+ */
+ u8 psm_entry_retries;
};
#define CONF_SR_ERR_TBL_MAX_VALUES 14
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.c b/drivers/net/wireless/wl12xx/wl1271_event.c
index 31d396ba918..e135d894b42 100644
--- a/drivers/net/wireless/wl12xx/wl1271_event.c
+++ b/drivers/net/wireless/wl12xx/wl1271_event.c
@@ -68,6 +68,40 @@ static int wl1271_event_scan_complete(struct wl1271 *wl,
return 0;
}
+static int wl1271_event_ps_report(struct wl1271 *wl,
+ struct event_mailbox *mbox,
+ bool *beacon_loss)
+{
+ int ret = 0;
+
+ wl1271_debug(DEBUG_EVENT, "ps_status: 0x%x", mbox->ps_status);
+
+ switch (mbox->ps_status) {
+ case EVENT_ENTER_POWER_SAVE_FAIL:
+ if (wl->psm_entry_retry < wl->conf.conn.psm_entry_retries) {
+ wl->psm_entry_retry++;
+ wl1271_error("PSM entry failed, retrying %d\n",
+ wl->psm_entry_retry);
+ ret = wl1271_ps_set_mode(wl, STATION_POWER_SAVE_MODE);
+ } else {
+ wl->psm_entry_retry = 0;
+ *beacon_loss = true;
+ }
+ break;
+ case EVENT_ENTER_POWER_SAVE_SUCCESS:
+ wl->psm_entry_retry = 0;
+ break;
+ case EVENT_EXIT_POWER_SAVE_FAIL:
+ wl1271_info("PSM exit failed");
+ break;
+ case EVENT_EXIT_POWER_SAVE_SUCCESS:
+ default:
+ break;
+ }
+
+ return ret;
+}
+
static void wl1271_event_mbox_dump(struct event_mailbox *mbox)
{
wl1271_debug(DEBUG_EVENT, "MBOX DUMP:");
@@ -79,6 +113,7 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)
{
int ret;
u32 vector;
+ bool beacon_loss = false;
wl1271_event_mbox_dump(mbox);
@@ -101,7 +136,25 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)
wl1271_debug(DEBUG_EVENT, "BSS_LOSE_EVENT");
/* indicate to the stack, that beacons have been lost */
+ beacon_loss = true;
+ }
+
+ if (vector & PS_REPORT_EVENT_ID) {
+ wl1271_debug(DEBUG_EVENT, "PS_REPORT_EVENT");
+ ret = wl1271_event_ps_report(wl, mbox, &beacon_loss);
+ if (ret < 0)
+ return ret;
+ }
+
+ if (beacon_loss) {
+ /* Obviously, it's dangerous to release the mutex while
+ we are holding many of the variables in the wl struct.
+ That's why it's done last in the function, and care must
+ be taken that nothing more is done after this function
+ returns. */
+ mutex_unlock(&wl->mutex);
ieee80211_beacon_loss(wl->vif);
+ mutex_lock(&wl->mutex);
}
return 0;
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.h b/drivers/net/wireless/wl12xx/wl1271_event.h
index 3ab53d331f1..4e3f55ebb1a 100644
--- a/drivers/net/wireless/wl12xx/wl1271_event.h
+++ b/drivers/net/wireless/wl12xx/wl1271_event.h
@@ -63,6 +63,13 @@ enum {
EVENT_MBOX_ALL_EVENT_ID = 0x7fffffff,
};
+enum {
+ EVENT_ENTER_POWER_SAVE_FAIL = 0,
+ EVENT_ENTER_POWER_SAVE_SUCCESS,
+ EVENT_EXIT_POWER_SAVE_FAIL,
+ EVENT_EXIT_POWER_SAVE_SUCCESS,
+};
+
struct event_debug_report {
u8 debug_event_id;
u8 num_params;
diff --git a/drivers/net/wireless/wl12xx/wl1271_init.c b/drivers/net/wireless/wl12xx/wl1271_init.c
index 417b4152feb..7c2017f480e 100644
--- a/drivers/net/wireless/wl12xx/wl1271_init.c
+++ b/drivers/net/wireless/wl12xx/wl1271_init.c
@@ -303,12 +303,15 @@ int wl1271_hw_init(struct wl1271 *wl)
{
int ret;
+ /* FIXME: the following parameter setting functions return error
+ * codes - the reason is so far unknown. The -EIO is therefore
+ * ignored for the time being. */
ret = wl1271_init_general_parms(wl);
- if (ret < 0)
+ if (ret < 0 && ret != -EIO)
return ret;
ret = wl1271_init_radio_parms(wl);
- if (ret < 0)
+ if (ret < 0 && ret != -EIO)
return ret;
/* Template settings */
diff --git a/drivers/net/wireless/wl12xx/wl1271_main.c b/drivers/net/wireless/wl12xx/wl1271_main.c
index 86132bb0078..d2149fcd3cf 100644
--- a/drivers/net/wireless/wl12xx/wl1271_main.c
+++ b/drivers/net/wireless/wl12xx/wl1271_main.c
@@ -222,7 +222,8 @@ static struct conf_drv_settings default_conf = {
.snr_pkt_avg_weight = 10
},
.bet_enable = CONF_BET_MODE_ENABLE,
- .bet_max_consecutive = 100
+ .bet_max_consecutive = 100,
+ .psm_entry_retries = 3
},
.init = {
.sr_err_tbl = {
@@ -973,6 +974,7 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)
wl->rx_counter = 0;
wl->elp = false;
wl->psm = 0;
+ wl->psm_entry_retry = 0;
wl->tx_queue_stopped = false;
wl->power_level = WL1271_DEFAULT_POWER_LEVEL;
wl->tx_blocks_available = 0;
@@ -1067,11 +1069,11 @@ static int wl1271_op_config_interface(struct ieee80211_hw *hw,
ret = wl1271_cmd_join(wl);
if (ret < 0)
goto out_sleep;
- }
- ret = wl1271_cmd_build_null_data(wl);
- if (ret < 0)
- goto out_sleep;
+ ret = wl1271_cmd_build_null_data(wl);
+ if (ret < 0)
+ goto out_sleep;
+ }
wl->ssid_len = conf->ssid_len;
if (wl->ssid_len)
@@ -1137,10 +1139,6 @@ static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed)
wl->channel = channel;
}
- ret = wl1271_cmd_build_null_data(wl);
- if (ret < 0)
- goto out_sleep;
-
if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) {
wl1271_info("psm enabled");
@@ -1165,7 +1163,7 @@ static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed)
if (conf->power_level != wl->power_level) {
ret = wl1271_acx_tx_power(wl, conf->power_level);
if (ret < 0)
- goto out;
+ goto out_sleep;
wl->power_level = conf->power_level;
}
@@ -1826,6 +1824,7 @@ static int __devinit wl1271_probe(struct spi_device *spi)
wl->elp = false;
wl->psm = 0;
wl->psm_requested = false;
+ wl->psm_entry_retry = 0;
wl->tx_queue_stopped = false;
wl->power_level = WL1271_DEFAULT_POWER_LEVEL;
wl->basic_rate_set = WL1271_DEFAULT_BASIC_RATE_SET;
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.c b/drivers/net/wireless/wl12xx/wl1271_rx.c
index 37d81ab6acc..ca645f38109 100644
--- a/drivers/net/wireless/wl12xx/wl1271_rx.c
+++ b/drivers/net/wireless/wl12xx/wl1271_rx.c
@@ -159,7 +159,7 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
u8 *buf;
u8 beacon = 0;
- skb = dev_alloc_skb(length);
+ skb = __dev_alloc_skb(length, GFP_KERNEL);
if (!skb) {
wl1271_error("Couldn't allocate RX frame");
return;
diff --git a/drivers/net/wireless/zd1211rw/Kconfig b/drivers/net/wireless/zd1211rw/Kconfig
index 74b31eafe72..5f809695f71 100644
--- a/drivers/net/wireless/zd1211rw/Kconfig
+++ b/drivers/net/wireless/zd1211rw/Kconfig
@@ -1,6 +1,6 @@
config ZD1211RW
tristate "ZyDAS ZD1211/ZD1211B USB-wireless support"
- depends on USB && MAC80211 && WLAN_80211 && EXPERIMENTAL
+ depends on USB && MAC80211 && EXPERIMENTAL
select FW_LOADER
---help---
This is an experimental driver for the ZyDAS ZD1211/ZD1211B wireless