diff options
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 47 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/bfin_5xx.c | 282 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_core.c | 14 | ||||
-rw-r--r-- | drivers/serial/crisv10.c | 79 | ||||
-rw-r--r-- | drivers/serial/crisv10.h | 2 | ||||
-rw-r--r-- | drivers/serial/jsm/jsm_neo.c | 14 | ||||
-rw-r--r-- | drivers/serial/jsm/jsm_tty.c | 19 | ||||
-rw-r--r-- | drivers/serial/pmac_zilog.c | 15 |
9 files changed, 318 insertions, 155 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 07c03b9eb12..0328fd4006e 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -533,6 +533,13 @@ config SERIAL_S3C6400 Serial port support for the Samsung S3C6400 and S3C6410 SoCs +config SERIAL_MAX3100 + tristate "MAX3100 support" + depends on SPI + select SERIAL_CORE + help + MAX3100 chip support + config SERIAL_DZ bool "DECstation DZ serial driver" depends on MACH_DECSTATION && 32BIT @@ -700,7 +707,7 @@ choice config SERIAL_BFIN_DMA bool "DMA mode" - depends on !DMA_UNCACHED_NONE && !KGDB_UART + depends on !DMA_UNCACHED_NONE && KGDB_SERIAL_CONSOLE=n help This driver works under DMA mode. If this option is selected, the blackfin simple dma driver is also enabled. @@ -727,19 +734,19 @@ config BFIN_UART0_CTSRTS config UART0_CTS_PIN int "UART0 CTS pin" - depends on BFIN_UART0_CTSRTS + depends on BFIN_UART0_CTSRTS && !BF548 default 23 help The default pin is GPIO_GP7. - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART0_RTS_PIN int "UART0 RTS pin" - depends on BFIN_UART0_CTSRTS + depends on BFIN_UART0_CTSRTS && !BF548 default 22 help The default pin is GPIO_GP6. - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART1 bool "Enable UART1" @@ -756,17 +763,17 @@ config BFIN_UART1_CTSRTS config UART1_CTS_PIN int "UART1 CTS pin" - depends on BFIN_UART1_CTSRTS && !BF54x + depends on BFIN_UART1_CTSRTS && !BF548 default -1 help - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART1_RTS_PIN int "UART1 RTS pin" - depends on BFIN_UART1_CTSRTS && !BF54x + depends on BFIN_UART1_CTSRTS && !BF548 default -1 help - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART2 bool "Enable UART2" @@ -783,17 +790,17 @@ config BFIN_UART2_CTSRTS config UART2_CTS_PIN int "UART2 CTS pin" - depends on BFIN_UART2_CTSRTS + depends on BFIN_UART2_CTSRTS && !BF548 default -1 help - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART2_RTS_PIN int "UART2 RTS pin" - depends on BFIN_UART2_CTSRTS + depends on BFIN_UART2_CTSRTS && !BF548 default -1 help - Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART3 bool "Enable UART3" @@ -808,6 +815,20 @@ config BFIN_UART3_CTSRTS Enable hardware flow control in the driver. Using GPIO emulate the CTS/RTS signal. +config UART3_CTS_PIN + int "UART3 CTS pin" + depends on BFIN_UART3_CTSRTS && !BF548 + default -1 + help + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. + +config UART3_RTS_PIN + int "UART3 RTS pin" + depends on BFIN_UART3_CTSRTS && !BF548 + default -1 + help + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. + config SERIAL_IMX bool "IMX serial port support" depends on ARM && (ARCH_IMX || ARCH_MXC) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 8844c0a0392..d438eb2a73d 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,6 +43,7 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o +obj-$(CONFIG_SERIAL_MAX3100) += max3100.o obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o obj-$(CONFIG_SERIAL_MUX) += mux.o obj-$(CONFIG_SERIAL_68328) += 68328serial.o diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index f9b5a72e261..18ba812a4f8 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c @@ -63,7 +63,6 @@ static int kgdboc_break_enabled; #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT) #define DMA_RX_FLUSH_JIFFIES (HZ / 50) -#define CTS_CHECK_JIFFIES (HZ / 50) #ifdef CONFIG_SERIAL_BFIN_DMA static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); @@ -71,10 +70,65 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); static void bfin_serial_tx_chars(struct bfin_serial_port *uart); #endif -static void bfin_serial_mctrl_check(struct bfin_serial_port *uart); - static void bfin_serial_reset_irda(struct uart_port *port); +#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ + defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) +static unsigned int bfin_serial_get_mctrl(struct uart_port *port) +{ + struct bfin_serial_port *uart = (struct bfin_serial_port *)port; + if (uart->cts_pin < 0) + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; + + /* CTS PIN is negative assertive. */ + if (UART_GET_CTS(uart)) + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; + else + return TIOCM_DSR | TIOCM_CAR; +} + +static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + struct bfin_serial_port *uart = (struct bfin_serial_port *)port; + if (uart->rts_pin < 0) + return; + + /* RTS PIN is negative assertive. */ + if (mctrl & TIOCM_RTS) + UART_ENABLE_RTS(uart); + else + UART_DISABLE_RTS(uart); +} + +/* + * Handle any change of modem status signal. + */ +static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id) +{ + struct bfin_serial_port *uart = dev_id; + unsigned int status; + + status = bfin_serial_get_mctrl(&uart->port); + uart_handle_cts_change(&uart->port, status & TIOCM_CTS); +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + uart->scts = 1; + UART_CLEAR_SCTS(uart); + UART_CLEAR_IER(uart, EDSSI); +#endif + + return IRQ_HANDLED; +} +#else +static unsigned int bfin_serial_get_mctrl(struct uart_port *port) +{ + return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; +} + +static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ +} +#endif + /* * interrupts are disabled on entry */ @@ -111,6 +165,13 @@ static void bfin_serial_start_tx(struct uart_port *port) struct bfin_serial_port *uart = (struct bfin_serial_port *)port; struct tty_struct *tty = uart->port.info->port.tty; +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { + uart->scts = 0; + uart_handle_cts_change(&uart->port, uart->scts); + } +#endif + /* * To avoid losting RX interrupt, we reset IR function * before sending data. @@ -264,12 +325,6 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart) { struct circ_buf *xmit = &uart->port.info->xmit; - /* - * Check the modem control lines before - * transmitting anything. - */ - bfin_serial_mctrl_check(uart); - if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { #ifdef CONFIG_BF54x /* Clear TFI bit */ @@ -312,6 +367,12 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id) { struct bfin_serial_port *uart = dev_id; +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { + uart->scts = 0; + uart_handle_cts_change(&uart->port, uart->scts); + } +#endif spin_lock(&uart->port.lock); if (UART_GET_LSR(uart) & THRE) bfin_serial_tx_chars(uart); @@ -328,12 +389,6 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) uart->tx_done = 0; - /* - * Check the modem control lines before - * transmitting anything. - */ - bfin_serial_mctrl_check(uart); - if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { uart->tx_count = 0; uart->tx_done = 1; @@ -448,6 +503,13 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) struct bfin_serial_port *uart = dev_id; struct circ_buf *xmit = &uart->port.info->xmit; +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { + uart->scts = 0; + uart_handle_cts_change(&uart->port, uart->scts); + } +#endif + spin_lock(&uart->port.lock); if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { disable_dma(uart->tx_dma_channel); @@ -496,61 +558,6 @@ static unsigned int bfin_serial_tx_empty(struct uart_port *port) return 0; } -static unsigned int bfin_serial_get_mctrl(struct uart_port *port) -{ -#ifdef CONFIG_SERIAL_BFIN_CTSRTS - struct bfin_serial_port *uart = (struct bfin_serial_port *)port; - if (uart->cts_pin < 0) - return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; - - if (UART_GET_CTS(uart)) - return TIOCM_DSR | TIOCM_CAR; - else -#endif - return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; -} - -static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) -{ -#ifdef CONFIG_SERIAL_BFIN_CTSRTS - struct bfin_serial_port *uart = (struct bfin_serial_port *)port; - if (uart->rts_pin < 0) - return; - - if (mctrl & TIOCM_RTS) - UART_CLEAR_RTS(uart); - else - UART_SET_RTS(uart); -#endif -} - -/* - * Handle any change of modem status signal since we were last called. - */ -static void bfin_serial_mctrl_check(struct bfin_serial_port *uart) -{ -#ifdef CONFIG_SERIAL_BFIN_CTSRTS - unsigned int status; - struct uart_info *info = uart->port.info; - struct tty_struct *tty = info->port.tty; - - status = bfin_serial_get_mctrl(&uart->port); - uart_handle_cts_change(&uart->port, status & TIOCM_CTS); - if (!(status & TIOCM_CTS)) { - tty->hw_stopped = 1; - uart->cts_timer.data = (unsigned long)(uart); - uart->cts_timer.function = (void *)bfin_serial_mctrl_check; - uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES; - add_timer(&(uart->cts_timer)); - } else { - tty->hw_stopped = 0; - } -#endif -} - -/* - * Interrupts are always disabled. - */ static void bfin_serial_break_ctl(struct uart_port *port, int break_state) { struct bfin_serial_port *uart = (struct bfin_serial_port *)port; @@ -606,7 +613,7 @@ static int bfin_serial_startup(struct uart_port *port) uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; add_timer(&(uart->rx_dma_timer)); #else -#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ +# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled) kgdboc_break_enabled = 0; @@ -661,11 +668,50 @@ static int bfin_serial_startup(struct uart_port *port) } } # endif -#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ +# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) } # endif #endif + +#ifdef CONFIG_SERIAL_BFIN_CTSRTS + if (uart->cts_pin >= 0) { + if (request_irq(gpio_to_irq(uart->cts_pin), + bfin_serial_mctrl_cts_int, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_DISABLED, "BFIN_UART_CTS", uart)) { + uart->cts_pin = -1; + pr_info("Unable to attach BlackFin UART CTS interrupt.\ + So, disable it.\n"); + } + } + if (uart->rts_pin >= 0) { + gpio_request(uart->rts_pin, DRIVER_NAME); + gpio_direction_output(uart->rts_pin, 0); + } +#endif +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + if (request_irq(uart->status_irq, + bfin_serial_mctrl_cts_int, + IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) { + pr_info("Unable to attach BlackFin UART Modem \ + Status interrupt.\n"); + } + + if (uart->cts_pin >= 0) { + gpio_request(uart->cts_pin, DRIVER_NAME); + gpio_direction_output(uart->cts_pin, 1); + } + if (uart->rts_pin >= 0) { + gpio_request(uart->rts_pin, DRIVER_NAME); + gpio_direction_output(uart->rts_pin, 0); + } + + /* CTS RTS PINs are negative assertive. */ + UART_PUT_MCR(uart, ACTS); + UART_SET_IER(uart, EDSSI); +#endif + UART_SET_IER(uart, ERBFI); return 0; } @@ -699,6 +745,21 @@ static void bfin_serial_shutdown(struct uart_port *port) free_irq(uart->port.irq, uart); free_irq(uart->port.irq+1, uart); #endif + +#ifdef CONFIG_SERIAL_BFIN_CTSRTS + if (uart->cts_pin >= 0) + free_irq(gpio_to_irq(uart->cts_pin), uart); + if (uart->rts_pin >= 0) + gpio_free(uart->rts_pin); +#endif +#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS + if (uart->cts_pin >= 0) + gpio_free(uart->cts_pin); + if (uart->rts_pin >= 0) + gpio_free(uart->rts_pin); + if (UART_GET_IER(uart) && EDSSI) + free_irq(uart->status_irq, uart); +#endif } static void @@ -864,6 +925,20 @@ static void bfin_serial_set_ldisc(struct uart_port *port) } } +static void bfin_serial_reset_irda(struct uart_port *port) +{ + int line = port->line; + unsigned short val; + + val = UART_GET_GCTL(&bfin_serial_ports[line]); + val &= ~(IREN | RPOLC); + UART_PUT_GCTL(&bfin_serial_ports[line], val); + SSYNC(); + val |= (IREN | RPOLC); + UART_PUT_GCTL(&bfin_serial_ports[line], val); + SSYNC(); +} + #ifdef CONFIG_CONSOLE_POLL static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr) { @@ -909,20 +984,6 @@ static int bfin_kgdboc_port_startup(struct uart_port *port) } #endif -static void bfin_serial_reset_irda(struct uart_port *port) -{ - int line = port->line; - unsigned short val; - - val = UART_GET_GCTL(&bfin_serial_ports[line]); - val &= ~(IREN | RPOLC); - UART_PUT_GCTL(&bfin_serial_ports[line], val); - SSYNC(); - val |= (IREN | RPOLC); - UART_PUT_GCTL(&bfin_serial_ports[line], val); - SSYNC(); -} - static struct uart_ops bfin_serial_pops = { .tx_empty = bfin_serial_tx_empty, .set_mctrl = bfin_serial_set_mctrl, @@ -952,6 +1013,39 @@ static struct uart_ops bfin_serial_pops = { #endif }; +static void __init bfin_serial_hw_init(void) +{ +#ifdef CONFIG_SERIAL_BFIN_UART0 + peripheral_request(P_UART0_TX, DRIVER_NAME); + peripheral_request(P_UART0_RX, DRIVER_NAME); +#endif + +#ifdef CONFIG_SERIAL_BFIN_UART1 + peripheral_request(P_UART1_TX, DRIVER_NAME); + peripheral_request(P_UART1_RX, DRIVER_NAME); + +# if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x) + peripheral_request(P_UART1_RTS, DRIVER_NAME); + peripheral_request(P_UART1_CTS, DRIVER_NAME); +# endif +#endif + +#ifdef CONFIG_SERIAL_BFIN_UART2 + peripheral_request(P_UART2_TX, DRIVER_NAME); + peripheral_request(P_UART2_RX, DRIVER_NAME); +#endif + +#ifdef CONFIG_SERIAL_BFIN_UART3 + peripheral_request(P_UART3_TX, DRIVER_NAME); + peripheral_request(P_UART3_RX, DRIVER_NAME); + +# if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x) + peripheral_request(P_UART3_RTS, DRIVER_NAME); + peripheral_request(P_UART3_CTS, DRIVER_NAME); +# endif +#endif +} + static void __init bfin_serial_init_ports(void) { static int first = 1; @@ -961,6 +1055,8 @@ static void __init bfin_serial_init_ports(void) return; first = 0; + bfin_serial_hw_init(); + for (i = 0; i < nr_active_ports; i++) { bfin_serial_ports[i].port.uartclk = get_sclk(); bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE; @@ -973,6 +1069,8 @@ static void __init bfin_serial_init_ports(void) bfin_serial_resource[i].uart_base_addr; bfin_serial_ports[i].port.irq = bfin_serial_resource[i].uart_irq; + bfin_serial_ports[i].status_irq = + bfin_serial_resource[i].uart_status_irq; bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF; #ifdef CONFIG_SERIAL_BFIN_DMA bfin_serial_ports[i].tx_done = 1; @@ -983,16 +1081,14 @@ static void __init bfin_serial_init_ports(void) bfin_serial_resource[i].uart_rx_dma_channel; init_timer(&(bfin_serial_ports[i].rx_dma_timer)); #endif -#ifdef CONFIG_SERIAL_BFIN_CTSRTS - init_timer(&(bfin_serial_ports[i].cts_timer)); +#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ + defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) bfin_serial_ports[i].cts_pin = bfin_serial_resource[i].uart_cts_pin; bfin_serial_ports[i].rts_pin = bfin_serial_resource[i].uart_rts_pin; #endif - bfin_serial_hw_init(&bfin_serial_ports[i]); } - } #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) @@ -1049,7 +1145,8 @@ bfin_serial_console_setup(struct console *co, char *options) int baud = 57600; int bits = 8; int parity = 'n'; -# ifdef CONFIG_SERIAL_BFIN_CTSRTS +# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ + defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) int flow = 'r'; # else int flow = 'n'; @@ -1246,7 +1343,8 @@ static int bfin_serial_remove(struct platform_device *dev) continue; uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port); bfin_serial_ports[i].port.dev = NULL; -#ifdef CONFIG_SERIAL_BFIN_CTSRTS +#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ + defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) gpio_free(bfin_serial_ports[i].cts_pin); gpio_free(bfin_serial_ports[i].rts_pin); #endif diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index 5c6ef51da27..f8df0681e16 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c @@ -1106,6 +1106,10 @@ static int cpm_uart_init_port(struct device_node *np, for (i = 0; i < NUM_GPIOS; i++) pinfo->gpios[i] = of_get_gpio(np, i); +#ifdef CONFIG_PPC_EARLY_DEBUG_CPM + udbg_putc = NULL; +#endif + return cpm_uart_request_port(&pinfo->port); out_pram: @@ -1255,10 +1259,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) baud = 9600; } -#ifdef CONFIG_PPC_EARLY_DEBUG_CPM - udbg_putc = NULL; -#endif - if (IS_SMC(pinfo)) { out_be16(&pinfo->smcup->smc_brkcr, 0); cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX); @@ -1339,13 +1339,13 @@ static int __devinit cpm_uart_probe(struct of_device *ofdev, dev_set_drvdata(&ofdev->dev, pinfo); + /* initialize the device pointer for the port */ + pinfo->port.dev = &ofdev->dev; + ret = cpm_uart_init_port(ofdev->node, pinfo); if (ret) return ret; - /* initialize the device pointer for the port */ - pinfo->port.dev = &ofdev->dev; - return uart_add_one_port(&cpm_reg, &pinfo->port); } diff --git a/drivers/serial/crisv10.c b/drivers/serial/crisv10.c index e642c22c80e..7ba7d70f04d 100644 --- a/drivers/serial/crisv10.c +++ b/drivers/serial/crisv10.c @@ -1391,7 +1391,7 @@ static inline void e100_disable_rx_irq(struct e100_serial *info) #if defined(CONFIG_ETRAX_RS485) /* Enable RS-485 mode on selected port. This is UGLY. */ static int -e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r) +e100_enable_rs485(struct tty_struct *tty, struct serial_rs485 *r) { struct e100_serial * info = (struct e100_serial *)tty->driver_data; @@ -1409,13 +1409,11 @@ e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r) CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1); #endif - info->rs485.rts_on_send = 0x01 & r->rts_on_send; - info->rs485.rts_after_sent = 0x01 & r->rts_after_sent; + info->rs485.flags = r->flags; if (r->delay_rts_before_send >= 1000) info->rs485.delay_rts_before_send = 1000; else info->rs485.delay_rts_before_send = r->delay_rts_before_send; - info->rs485.enabled = r->enabled; /* printk("rts: on send = %i, after = %i, enabled = %i", info->rs485.rts_on_send, info->rs485.rts_after_sent, @@ -1430,17 +1428,18 @@ e100_write_rs485(struct tty_struct *tty, const unsigned char *buf, int count) { struct e100_serial * info = (struct e100_serial *)tty->driver_data; - int old_enabled = info->rs485.enabled; + int old_value = (info->rs485.flags) & SER_RS485_ENABLED; /* rs485 is always implicitly enabled if we're using the ioctl() - * but it doesn't have to be set in the rs485_control + * but it doesn't have to be set in the serial_rs485 * (to be backward compatible with old apps) * So we store, set and restore it. */ - info->rs485.enabled = 1; + info->rs485.flags |= SER_RS485_ENABLED; /* rs_write now deals with RS485 if enabled */ count = rs_write(tty, buf, count); - info->rs485.enabled = old_enabled; + if (!old_value) + info->rs485.flags &= ~(SER_RS485_ENABLED); return count; } @@ -1451,7 +1450,7 @@ static void rs485_toggle_rts_timer_function(unsigned long data) struct e100_serial *info = (struct e100_serial *)data; fast_timers_rs485[info->line].function = NULL; - e100_rts(info, info->rs485.rts_after_sent); + e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND)); #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) e100_enable_rx(info); e100_enable_rx_irq(info); @@ -1647,7 +1646,7 @@ transmit_chars_dma(struct e100_serial *info) info->tr_running = 0; #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER) - if (info->rs485.enabled) { + if (info->rs485.flags & SER_RS485_ENABLED) { /* Set a short timer to toggle RTS */ start_one_shot_timer(&fast_timers_rs485[info->line], rs485_toggle_rts_timer_function, @@ -2577,7 +2576,7 @@ static void handle_ser_tx_interrupt(struct e100_serial *info) info->icount.tx++; if (info->xmit.head == info->xmit.tail) { #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER) - if (info->rs485.enabled) { + if (info->rs485.flags & SER_RS485_ENABLED) { /* Set a short timer to toggle RTS */ start_one_shot_timer(&fast_timers_rs485[info->line], rs485_toggle_rts_timer_function, @@ -3218,7 +3217,7 @@ rs_write(struct tty_struct *tty, #if defined(CONFIG_ETRAX_RS485) struct e100_serial *info = (struct e100_serial *)tty->driver_data; - if (info->rs485.enabled) + if (info->rs485.flags & SER_RS485_ENABLED) { /* If we are in RS-485 mode, we need to toggle RTS and disable * the receiver before initiating a DMA transfer @@ -3228,7 +3227,7 @@ rs_write(struct tty_struct *tty, fast_timers_rs485[info->line].function = NULL; del_fast_timer(&fast_timers_rs485[info->line]); #endif - e100_rts(info, info->rs485.rts_on_send); + e100_rts(info, (info->rs485.flags & SER_RS485_RTS_ON_SEND)); #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) e100_disable_rx(info); e100_enable_rx_irq(info); @@ -3242,7 +3241,7 @@ rs_write(struct tty_struct *tty, count = rs_raw_write(tty, buf, count); #if defined(CONFIG_ETRAX_RS485) - if (info->rs485.enabled) + if (info->rs485.flags & SER_RS485_ENABLED) { unsigned int val; /* If we are in RS-485 mode the following has to be done: @@ -3263,7 +3262,7 @@ rs_write(struct tty_struct *tty, get_lsr_info(info, &val); }while (!(val & TIOCSER_TEMT)); - e100_rts(info, info->rs485.rts_after_sent); + e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND)); #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER) e100_enable_rx(info); @@ -3678,14 +3677,52 @@ rs_ioctl(struct tty_struct *tty, struct file * file, #if defined(CONFIG_ETRAX_RS485) case TIOCSERSETRS485: { + /* In this ioctl we still use the old structure + * rs485_control for backward compatibility + * (if we use serial_rs485, then old user-level code + * wouldn't work anymore...). + * The use of this ioctl is deprecated: use TIOCSRS485 + * instead.*/ struct rs485_control rs485ctrl; + struct serial_rs485 rs485data; + printk(KERN_DEBUG "The use of this ioctl is deprecated. Use TIOCSRS485 instead\n"); if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg, sizeof(rs485ctrl))) return -EFAULT; - return e100_enable_rs485(tty, &rs485ctrl); + rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send; + rs485data.flags = 0; + if (rs485ctrl.enabled) + rs485data.flags |= SER_RS485_ENABLED; + else + rs485data.flags &= ~(SER_RS485_ENABLED); + + if (rs485ctrl.rts_on_send) + rs485data.flags |= SER_RS485_RTS_ON_SEND; + else + rs485data.flags &= ~(SER_RS485_RTS_ON_SEND); + + if (rs485ctrl.rts_after_sent) + rs485data.flags |= SER_RS485_RTS_AFTER_SEND; + else + rs485data.flags &= ~(SER_RS485_RTS_AFTER_SEND); + + return e100_enable_rs485(tty, &rs485data); } + case TIOCSRS485: + { + /* This is the new version of TIOCSRS485, with new + * data structure serial_rs485 */ + struct serial_rs485 rs485data; + if (copy_from_user(&rs485data, (struct rs485_control *)arg, + sizeof(rs485data))) + return -EFAULT; + + return e100_enable_rs485(tty, &rs485data); + } + + case TIOCSERWRRS485: { struct rs485_write rs485wr; @@ -3827,8 +3864,8 @@ rs_close(struct tty_struct *tty, struct file * filp) /* port closed */ #if defined(CONFIG_ETRAX_RS485) - if (info->rs485.enabled) { - info->rs485.enabled = 0; + if (info->rs485.flags & SER_RS485_ENABLED) { + info->rs485.flags &= ~(SER_RS485_ENABLED); #if defined(CONFIG_ETRAX_RS485_ON_PA) *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit); #endif @@ -4493,10 +4530,10 @@ rs_init(void) #if defined(CONFIG_ETRAX_RS485) /* Set sane defaults */ - info->rs485.rts_on_send = 0; - info->rs485.rts_after_sent = 1; + info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND); + info->rs485.flags |= SER_RS485_RTS_AFTER_SEND; info->rs485.delay_rts_before_send = 0; - info->rs485.enabled = 0; + info->rs485.flags &= ~(SER_RS485_ENABLED); #endif INIT_WORK(&info->work, do_softint); diff --git a/drivers/serial/crisv10.h b/drivers/serial/crisv10.h index f36a729280b..ea0beb46a10 100644 --- a/drivers/serial/crisv10.h +++ b/drivers/serial/crisv10.h @@ -125,7 +125,7 @@ struct e100_serial { int errorcode; #ifdef CONFIG_ETRAX_RS485 - struct rs485_control rs485; /* RS-485 support */ + struct serial_rs485 rs485; /* RS-485 support */ #endif }; diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c index e6390d02363..9dadaa11d26 100644 --- a/drivers/serial/jsm/jsm_neo.c +++ b/drivers/serial/jsm/jsm_neo.c @@ -533,7 +533,6 @@ static void neo_copy_data_from_queue_to_uart(struct jsm_channel *ch) if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) return; - len_written = 0; n = UART_17158_TX_FIFOSIZE - ch->ch_t_tlevel; /* cache head and tail of queue */ @@ -619,14 +618,10 @@ static void neo_parse_modem(struct jsm_channel *ch, u8 signals) /* Make the UART raise any of the output signals we want up */ static void neo_assert_modem_signals(struct jsm_channel *ch) { - u8 out; - if (!ch) return; - out = ch->ch_mostat; - - writeb(out, &ch->ch_neo_uart->mcr); + writeb(ch->ch_mostat, &ch->ch_neo_uart->mcr); /* flush write operation */ neo_pci_posting_flush(ch->ch_bd); @@ -936,10 +931,9 @@ static inline void neo_parse_lsr(struct jsm_board *brd, u32 port) static void neo_param(struct jsm_channel *ch) { u8 lcr = 0; - u8 uart_lcr = 0; - u8 ier = 0; - u32 baud = 9600; - int quot = 0; + u8 uart_lcr, ier; + u32 baud; + int quot; struct jsm_board *bd; bd = ch->ch_bd; diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c index 330696309f7..31496dc0a0d 100644 --- a/drivers/serial/jsm/jsm_tty.c +++ b/drivers/serial/jsm/jsm_tty.c @@ -183,7 +183,6 @@ static void jsm_tty_break(struct uart_port *port, int break_state) static int jsm_tty_open(struct uart_port *port) { struct jsm_board *brd; - int rc = 0; struct jsm_channel *channel = (struct jsm_channel *)port; struct ktermios *termios; @@ -265,7 +264,7 @@ static int jsm_tty_open(struct uart_port *port) channel->ch_open_count++; jsm_printk(OPEN, INFO, &channel->ch_bd->pci_dev, "finish\n"); - return rc; + return 0; } static void jsm_tty_close(struct uart_port *port) @@ -748,7 +747,7 @@ static void jsm_carrier(struct jsm_channel *ch) void jsm_check_queue_flow_control(struct jsm_channel *ch) { struct board_ops *bd_ops = ch->ch_bd->bd_ops; - int qleft = 0; + int qleft; /* Store how much space we have left in the queue */ if ((qleft = ch->ch_r_tail - ch->ch_r_head - 1) < 0) @@ -834,7 +833,7 @@ void jsm_check_queue_flow_control(struct jsm_channel *ch) */ int jsm_tty_write(struct uart_port *port) { - int bufcount = 0, n = 0; + int bufcount; int data_count = 0,data_count1 =0; u16 head; u16 tail; @@ -850,14 +849,12 @@ int jsm_tty_write(struct uart_port *port) if ((bufcount = tail - head - 1) < 0) bufcount += WQUEUESIZE; - n = bufcount; - - n = min(n, 56); + bufcount = min(bufcount, 56); remain = WQUEUESIZE - head; data_count = 0; - if (n >= remain) { - n -= remain; + if (bufcount >= remain) { + bufcount -= remain; while ((port->info->xmit.head != temp_tail) && (data_count < remain)) { channel->ch_wqueue[head++] = @@ -871,8 +868,8 @@ int jsm_tty_write(struct uart_port *port) } data_count1 = 0; - if (n > 0) { - remain = n; + if (bufcount > 0) { + remain = bufcount; while ((port->info->xmit.head != temp_tail) && (data_count1 < remain)) { channel->ch_wqueue[head++] = diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c index ad348850401..9c1243fbd51 100644 --- a/drivers/serial/pmac_zilog.c +++ b/drivers/serial/pmac_zilog.c @@ -1538,6 +1538,21 @@ no_dma: uap->port.type = PORT_PMAC_ZILOG; uap->port.flags = 0; + /* + * Fixup for the port on Gatwick for which the device-tree has + * missing interrupts. Normally, the macio_dev would contain + * fixed up interrupt info, but we use the device-tree directly + * here due to early probing so we need the fixup too. + */ + if (uap->port.irq == NO_IRQ && + np->parent && np->parent->parent && + of_device_is_compatible(np->parent->parent, "gatwick")) { + /* IRQs on gatwick are offset by 64 */ + uap->port.irq = irq_create_mapping(NULL, 64 + 15); + uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4); + uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5); + } + /* Setup some valid baud rate information in the register * shadows so we don't write crap there before baud rate is * first initialized. |