diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/input/misc/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/input/misc/Makefile | 1 | ||||
| -rw-r--r-- | drivers/input/misc/pcf50606-input.c | 138 | ||||
| -rw-r--r-- | drivers/mfd/Kconfig | 16 | ||||
| -rw-r--r-- | drivers/mfd/Makefile | 4 | ||||
| -rw-r--r-- | drivers/mfd/pcf50606-adc.c | 278 | ||||
| -rw-r--r-- | drivers/mfd/pcf50606-core.c | 681 | ||||
| -rw-r--r-- | drivers/mtd/nand/s3c2410.c | 2 | ||||
| -rw-r--r-- | drivers/power/Kconfig | 6 | ||||
| -rw-r--r-- | drivers/power/Makefile | 1 | ||||
| -rw-r--r-- | drivers/power/pcf50606-charger.c | 237 | ||||
| -rw-r--r-- | drivers/regulator/Kconfig | 6 | ||||
| -rw-r--r-- | drivers/regulator/Makefile | 1 | ||||
| -rw-r--r-- | drivers/regulator/pcf50606-regulator.c | 358 | ||||
| -rw-r--r-- | drivers/rtc/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/rtc/Makefile | 1 | ||||
| -rw-r--r-- | drivers/rtc/rtc-pcf50606.c | 341 | ||||
| -rw-r--r-- | drivers/serial/samsung.c | 19 | ||||
| -rw-r--r-- | drivers/video/backlight/Kconfig | 14 | ||||
| -rw-r--r-- | drivers/video/backlight/Makefile | 1 | ||||
| -rw-r--r-- | drivers/video/backlight/jbt6k74.c | 885 | ||||
| -rw-r--r-- | drivers/watchdog/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/watchdog/Makefile | 1 | ||||
| -rw-r--r-- | drivers/watchdog/pcf50606_wdt.c | 216 |
24 files changed, 3227 insertions, 1 deletions
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 1acfa3a05aa..558b73f0100 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -237,6 +237,13 @@ config INPUT_PCF50633_PMU Say Y to include support for delivering PMU events via input layer on NXP PCF50633. +config INPUT_PCF50606_PMU + tristate "PCF50606 PMU events" + depends on MFD_PCF50606 + help + Say Y to include support for delivering PMU events via input + layer on NXP PCF50606. + config INPUT_GPIO_ROTARY_ENCODER tristate "Rotary encoders connected to GPIO pins" depends on GPIOLIB && GENERIC_GPIO diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 0d979fd4cd5..730857b6674 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o +obj-$(CONFIG_INPUT_PCF50606_PMU) += pcf50606-input.o obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o obj-$(CONFIG_INPUT_POWERMATE) += powermate.o obj-$(CONFIG_INPUT_RB532_BUTTON) += rb532_button.o diff --git a/drivers/input/misc/pcf50606-input.c b/drivers/input/misc/pcf50606-input.c new file mode 100644 index 00000000000..da78fb92fbc --- /dev/null +++ b/drivers/input/misc/pcf50606-input.c @@ -0,0 +1,138 @@ +/* Philips PCF50606 Input Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte, Matt Hsu, Andy Green and Werner Almesberger + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/input.h> + +#include <linux/mfd/pcf50606/core.h> + +#define PCF50606_OOCS_ONKEY 0x01 +#define PCF50606_OOCS_EXTON 0x02 + +#define PCF50606_OOCC2_ONKEYDB_NONE 0x00 +#define PCF50606_OOCC2_ONKEYDB_14ms 0x01 +#define PCF50606_OOCC2_ONKEYDB_62ms 0x02 +#define PCF50606_OOCC2_ONKEYDB_500ms 0x03 +#define PCF50606_OOCC2_EXTONDB_NONE 0x00 +#define PCF50606_OOCC2_EXTONDB_14ms 0x04 +#define PCF50606_OOCC2_EXTONDB_62ms 0x08 +#define PCF50606_OOCC2_EXTONDB_500ms 0x0c + +#define PCF50606_REG_OOCS 0x01 + +struct pcf50606_input { + struct pcf50606 *pcf; + struct input_dev *input_dev; +}; + +static void +pcf50606_input_irq(int irq, void *data) +{ + struct pcf50606_input *input; + int onkey_released; + + input = data; + onkey_released = pcf50606_reg_read(input->pcf, PCF50606_REG_OOCS) & + PCF50606_OOCS_ONKEY; + + if (irq == PCF50606_IRQ_ONKEYF && !onkey_released) + input_report_key(input->input_dev, KEY_POWER, 1); + else if (irq == PCF50606_IRQ_ONKEYR && onkey_released) + input_report_key(input->input_dev, KEY_POWER, 0); + + input_sync(input->input_dev); +} + +static int __devinit pcf50606_input_probe(struct platform_device *pdev) +{ + struct pcf50606_input *input; + struct input_dev *input_dev; + int ret; + + input = kzalloc(sizeof(*input), GFP_KERNEL); + if (!input) + return -ENOMEM; + + input_dev = input_allocate_device(); + if (!input_dev) { + kfree(input); + return -ENOMEM; + } + + platform_set_drvdata(pdev, input); + input->pcf = dev_to_pcf50606(pdev->dev.parent); + input->input_dev = input_dev; + + input_dev->name = "PCF50606 PMU events"; + input_dev->id.bustype = BUS_I2C; + input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR); + set_bit(KEY_POWER, input_dev->keybit); + + ret = input_register_device(input_dev); + if (ret) { + input_free_device(input_dev); + kfree(input); + return ret; + } + pcf50606_register_irq(input->pcf, PCF50606_IRQ_ONKEYR, + pcf50606_input_irq, input); + pcf50606_register_irq(input->pcf, PCF50606_IRQ_ONKEYF, + pcf50606_input_irq, input); + + return 0; +} + +static int __devexit pcf50606_input_remove(struct platform_device *pdev) +{ + struct pcf50606_input *input = platform_get_drvdata(pdev); + + input_unregister_device(input->input_dev); + pcf50606_free_irq(input->pcf, PCF50606_IRQ_ONKEYR); + pcf50606_free_irq(input->pcf, PCF50606_IRQ_ONKEYF); + + kfree(input); + + return 0; +} + +static struct platform_driver pcf50606_input_driver = { + .driver = { + .name = "pcf50606-input", + }, + .probe = pcf50606_input_probe, + .remove = __devexit_p(pcf50606_input_remove), +}; + +static int __init pcf50606_input_init(void) +{ + return platform_driver_register(&pcf50606_input_driver); +} +module_init(pcf50606_input_init); + +static void __exit pcf50606_input_exit(void) +{ + platform_driver_unregister(&pcf50606_input_driver); +} +module_exit(pcf50606_input_exit); + +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_DESCRIPTION("PCF50606 input driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pcf50606-input"); diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 491ac0f800d..aa167dde4b7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -263,6 +263,22 @@ config EZX_PCAP This enables the PCAP ASIC present on EZX Phones. This is needed for MMC, TouchScreen, Sound, USB, etc.. +config MFD_PCF50606 + tristate "Support for NXP PCF50606" + depends on I2C + help + Say yes here if you have NXP PCF50606 chip on your board. + This core driver provides register access and IRQ handling + facilities, and registers devices for the various functions + so that function-specific drivers can bind to them. + +config PCF50606_ADC + tristate "Support for NXP PCF50606 ADC" + depends on MFD_PCF50606 + help + Say yes here if you want to include support for ADC in the + NXP PCF50606 chip. + endmenu menu "Multimedia Capabilities Port drivers" diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 6f8a9a1af20..b02f8362ee7 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -44,3 +44,7 @@ obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o obj-$(CONFIG_AB3100_CORE) += ab3100-core.o + +obj-$(CONFIG_MFD_PCF50606) += pcf50606-core.o +obj-$(CONFIG_PCF50606_ADC) += pcf50606-adc.o + diff --git a/drivers/mfd/pcf50606-adc.c b/drivers/mfd/pcf50606-adc.c new file mode 100644 index 00000000000..f6ffd0b146d --- /dev/null +++ b/drivers/mfd/pcf50606-adc.c @@ -0,0 +1,278 @@ +/* Philips PCF50606 ADC Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte, Andy Green, Werner Almesberger and Matt Hsu + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * NOTE: This driver does not yet support subtractive ADC mode, which means + * you can do only one measurement per read request. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/completion.h> + +#include <linux/mfd/pcf50606/core.h> +#include <linux/mfd/pcf50606/adc.h> + +struct pcf50606_adc_request { + int mux; + int result; + void (*callback)(struct pcf50606 *, void *, int); + void *callback_param; + + /* Used in case of sync requests */ + struct completion completion; + +}; + +/* code expects this to be a power of two */ +#define PCF50606_MAX_ADC_FIFO_DEPTH 8 + +struct pcf50606_adc { + struct pcf50606 *pcf; + + /* Private stuff */ + struct pcf50606_adc_request *queue[PCF50606_MAX_ADC_FIFO_DEPTH]; + unsigned int queue_head; + unsigned int queue_tail; + struct mutex queue_mutex; +}; + +static inline struct pcf50606_adc *pcf50606_to_adc(struct pcf50606 *pcf) +{ + return platform_get_drvdata(pcf->adc_pdev); +} + +static void adc_setup(struct pcf50606 *pcf, int channel) +{ + channel &= PCF50606_ADCC2_ADCMUX_MASK; + + /* start ADC conversion of selected channel */ + pcf50606_reg_write(pcf, PCF50606_REG_ADCC2, channel | + PCF50606_ADCC2_ADCSTART | PCF50606_ADCC2_RES_10BIT); + +} + +static void trigger_next_adc_job_if_any(struct pcf50606 *pcf) +{ + struct pcf50606_adc *adc = pcf50606_to_adc(pcf); + unsigned int head; + + mutex_lock(&adc->queue_mutex); + + head = adc->queue_head; + + if (!adc->queue[head]) + goto out; + + adc_setup(pcf, adc->queue[head]->mux); +out: + mutex_unlock(&adc->queue_mutex); +} + +static int +adc_enqueue_request(struct pcf50606 *pcf, struct pcf50606_adc_request *req) +{ + struct pcf50606_adc *adc = pcf50606_to_adc(pcf); + unsigned int tail; + + mutex_lock(&adc->queue_mutex); + tail = adc->queue_tail; + + if (adc->queue[tail]) { + mutex_unlock(&adc->queue_mutex); + return -EBUSY; + } + + adc->queue[tail] = req; + + adc->queue_tail = + (tail + 1) & (PCF50606_MAX_ADC_FIFO_DEPTH - 1); + + mutex_unlock(&adc->queue_mutex); + + trigger_next_adc_job_if_any(pcf); + + return 0; +} + +static void +pcf50606_adc_sync_read_callback(struct pcf50606 *pcf, void *param, int result) +{ + struct pcf50606_adc_request *req; + + /*We know here that the passed param is an adc_request object */ + req = (struct pcf50606_adc_request *)param; + + req->result = result; + complete(&req->completion); +} + +int pcf50606_adc_sync_read(struct pcf50606 *pcf, int mux) +{ + + struct pcf50606_adc_request *req; + int result; + + /* req is freed when the result is ready, in irq handler*/ + req = kzalloc(sizeof(*req), GFP_KERNEL); + if (!req) + return -ENOMEM; + + req->mux = mux; + req->callback = pcf50606_adc_sync_read_callback; + req->callback_param = req; + init_completion(&req->completion); + + adc_enqueue_request(pcf, req); + + if (wait_for_completion_timeout(&req->completion, 5 * HZ) == 5 * HZ) { + dev_err(pcf->dev, "ADC read timed out \n"); + } + + result = req->result; + + return result; +} +EXPORT_SYMBOL_GPL(pcf50606_adc_sync_read); + +int pcf50606_adc_async_read(struct pcf50606 *pcf, int mux, + void (*callback)(struct pcf50606 *, void *, int), + void *callback_param) +{ + struct pcf50606_adc_request *req; + + /* req is freed when the result is ready, in pcf50606_work*/ + req = kmalloc(sizeof(*req), GFP_KERNEL); + if (!req) + return -ENOMEM; + + req->mux = mux; + req->callback = callback; + req->callback_param = callback_param; + + adc_enqueue_request(pcf, req); + + return 0; +} +EXPORT_SYMBOL_GPL(pcf50606_adc_async_read); + +static int adc_result(struct pcf50606 *pcf) +{ + int ret = (pcf50606_reg_read(pcf, PCF50606_REG_ADCS1) << 2) | + (pcf50606_reg_read(pcf, PCF50606_REG_ADCS2) & 0x03); + + dev_dbg(pcf->dev, "adc result = %d\n", ret); + + return ret; +} + +static void pcf50606_adc_irq(int irq, void *data) +{ + struct pcf50606_adc *adc = data; + struct pcf50606 *pcf = adc->pcf; + struct pcf50606_adc_request *req; + unsigned int head; + + mutex_lock(&adc->queue_mutex); + head = adc->queue_head; + + req = adc->queue[head]; + if (WARN_ON(!req)) { + dev_err(pcf->dev, "pcf50606-adc irq: ADC queue empty!\n"); + mutex_unlock(&adc->queue_mutex); + return; + } + + adc->queue[head] = NULL; + adc->queue_head = (head + 1) & (PCF50606_MAX_ADC_FIFO_DEPTH - 1); + + mutex_unlock(&adc->queue_mutex); + + req->callback(pcf, req->callback_param, adc_result(pcf)); + kfree(req); + + trigger_next_adc_job_if_any(pcf); +} + +static int __devinit pcf50606_adc_probe(struct platform_device *pdev) +{ + struct pcf50606_adc *adc; + + adc = kzalloc(sizeof(*adc), GFP_KERNEL); + if (!adc) + return -ENOMEM; + + adc->pcf = dev_to_pcf50606(pdev->dev.parent); + platform_set_drvdata(pdev, adc); + + pcf50606_register_irq(adc->pcf, PCF50606_IRQ_ADCRDY, + pcf50606_adc_irq, adc); + + mutex_init(&adc->queue_mutex); + + return 0; +} + +static int __devexit pcf50606_adc_remove(struct platform_device *pdev) +{ + struct pcf50606_adc *adc = platform_get_drvdata(pdev); + unsigned int i; + unsigned int head; + + pcf50606_free_irq(adc->pcf, PCF50606_IRQ_ADCRDY); + + mutex_lock(&adc->queue_mutex); + head = adc->queue_head; + + if (WARN_ON(adc->queue[head])) + dev_err(adc->pcf->dev, + "adc driver removed with request pending\n"); + + for (i = 0; i < PCF50606_MAX_ADC_FIFO_DEPTH; i++) + kfree(adc->queue[i]); + + mutex_unlock(&adc->queue_mutex); + kfree(adc); + + return 0; +} + +struct platform_driver pcf50606_adc_driver = { + .driver = { + .name = "pcf50606-adc", + .owner = THIS_MODULE, + }, + .probe = pcf50606_adc_probe, + .remove = __devexit_p(pcf50606_adc_remove), +}; + +static int __init pcf50606_adc_init(void) +{ + return platform_driver_register(&pcf50606_adc_driver); +} +module_init(pcf50606_adc_init); + +static void __exit pcf50606_adc_exit(void) +{ + platform_driver_unregister(&pcf50606_adc_driver); +} +module_exit(pcf50606_adc_exit); + +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_DESCRIPTION("PCF50606 adc driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pcf50606-adc"); + diff --git a/drivers/mfd/pcf50606-core.c b/drivers/mfd/pcf50606-core.c new file mode 100644 index 00000000000..d610ff9346e --- /dev/null +++ b/drivers/mfd/pcf50606-core.c @@ -0,0 +1,681 @@ +/* Philips PCF50606 Power Management Unit (PMU) driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Harald Welte <laforge@openmoko.org> + * Matt Hsu <matt@openmoko.org> + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + */ +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/sysfs.h> +#include <linux/device.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/workqueue.h> +#include <linux/platform_device.h> +#include <linux/i2c.h> +#include <linux/irq.h> +#include <linux/device.h> +#include <linux/module.h> + +#include <linux/mfd/pcf50606/core.h> + +static int __pcf50606_read(struct pcf50606 *pcf, uint8_t reg, int num, uint8_t *data) +{ + int ret; + + ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg, + num, data); + if (ret < 0) + dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg); + + return ret; +} + +static int __pcf50606_write(struct pcf50606 *pcf, uint8_t reg, int num, uint8_t *data) +{ + int ret; + + ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg, + num, data); + if (ret < 0) + dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg); + + return ret; + +} + +/* Read a block of upto 32 regs */ +int pcf50606_read_block(struct pcf50606 *pcf, uint8_t reg, + int nr_regs, uint8_t *data) +{ + int ret; + + mutex_lock(&pcf->lock); + ret = __pcf50606_read(pcf, reg, nr_regs, data); + mutex_unlock(&pcf->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pcf50606_read_block); + +/* Write a block of upto 32 regs */ +int pcf50606_write_block(struct pcf50606 *pcf , uint8_t reg, + int nr_regs, uint8_t *data) +{ + int ret; + + mutex_lock(&pcf->lock); + ret = __pcf50606_write(pcf, reg, nr_regs, data); + mutex_unlock(&pcf->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pcf50606_write_block); + +uint8_t pcf50606_reg_read(struct pcf50606 *pcf, uint8_t reg) +{ + uint8_t val; + + mutex_lock(&pcf->lock); + __pcf50606_read(pcf, reg, 1, &val); + mutex_unlock(&pcf->lock); + + return val; +} +EXPORT_SYMBOL_GPL(pcf50606_reg_read); + +int pcf50606_reg_write(struct pcf50606 *pcf, uint8_t reg, uint8_t val) +{ + int ret; + + mutex_lock(&pcf->lock); + ret = __pcf50606_write(pcf, reg, 1, &val); + mutex_unlock(&pcf->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pcf50606_reg_write); + +int pcf50606_reg_set_bit_mask(struct pcf50606 *pcf, uint8_t reg, uint8_t mask, uint8_t val) +{ + int ret; + uint8_t tmp; + + val &= mask; + + mutex_lock(&pcf->lock); + ret = __pcf50606_read(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + tmp &= ~mask; + tmp |= val; + ret = __pcf50606_write(pcf, reg, 1, &tmp); + +out: + mutex_unlock(&pcf->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pcf50606_reg_set_bit_mask); + +int pcf50606_reg_clear_bits(struct pcf50606 *pcf, uint8_t reg, uint8_t val) +{ + int ret; + uint8_t tmp; + + mutex_lock(&pcf->lock); + ret = __pcf50606_read(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + tmp &= ~val; + ret = __pcf50606_write(pcf, reg, 1, &tmp); + +out: + mutex_unlock(&pcf->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pcf50606_reg_clear_bits); + +/* sysfs attributes */ +static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pcf50606 *pcf = dev_get_drvdata(dev); + uint8_t dump[16]; + int n, n1, idx = 0; + char *buf1 = buf; + static uint8_t address_no_read[] = { /* must be ascending */ + PCF50606_REG_INT1, + PCF50606_REG_INT2, + PCF50606_REG_INT3, + 0 /* terminator */ + }; + + for (n = 0; n < 256; n += sizeof(dump)) { + for (n1 = 0; n1 < sizeof(dump); n1++) + if (n == address_no_read[idx]) { + idx++; + dump[n1] = 0x00; + } else + dump[n1] = pcf50606_reg_read(pcf, n + n1); + + hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0); + buf1 += strlen(buf1); + *buf1++ = '\n'; + *buf1 = '\0'; + } + + return buf1 - buf; +} +static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL); + +static ssize_t show_resume_reason(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pcf50606 *pcf = dev_get_drvdata(dev); + int n; + + n = sprintf(buf, "%02x%02x%02x\n", + pcf->resume_reason[0], + pcf->resume_reason[1], + pcf->resume_reason[2]); + + return n; +} +static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL); + +static struct attribute *pcf_sysfs_entries[] = { + &dev_attr_dump_regs.attr, + &dev_attr_resume_reason.attr, + NULL, +}; + +static struct attribute_group pcf_attr_group = { + .name = NULL, /* put in device directory */ + .attrs = pcf_sysfs_entries, +}; + +int pcf50606_register_irq(struct pcf50606 *pcf, int irq, + void (*handler) (int, void *), void *data) +{ + if (irq < 0 || irq > PCF50606_NUM_IRQ || !handler) + return -EINVAL; + + if (WARN_ON(pcf->irq_handler[irq].handler)) + return -EBUSY; + + mutex_lock(&pcf->lock); + pcf->irq_handler[irq].handler = handler; + pcf->irq_handler[irq].data = data; + mutex_unlock(&pcf->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(pcf50606_register_irq); + +int pcf50606_free_irq(struct pcf50606 *pcf, int irq) +{ + if (irq < 0 || irq > PCF50606_NUM_IRQ) + return -EINVAL; + + mutex_lock(&pcf->lock); + pcf->irq_handler[irq].handler = NULL; + mutex_unlock(&pcf->lock); + + return 0; +} +EXPORT_SYMBOL_GPL(pcf50606_free_irq); + +static int __pcf50606_irq_mask_set(struct pcf50606 *pcf, int irq, uint8_t mask) +{ + uint8_t reg, bits, tmp; + int ret = 0, idx; + + idx = irq >> 3; + reg = PCF50606_REG_INT1M + idx; + bits = 1 << (irq & 0x07); + + mutex_lock(&pcf->lock); + + if (mask) { + ret = __pcf50606_read(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + tmp |= bits; + + ret = __pcf50606_write(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + pcf->mask_regs[idx] &= ~bits; + pcf->mask_regs[idx] |= bits; + } else { + ret = __pcf50606_read(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + tmp &= ~bits; + + ret = __pcf50606_write(pcf, reg, 1, &tmp); + if (ret < 0) + goto out; + + pcf->mask_regs[idx] &= ~bits; + } +out: + mutex_unlock(&pcf->lock); + + return ret; +} + +int pcf50606_irq_mask(struct pcf50606 *pcf, int irq) +{ + dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); + + return __pcf50606_irq_mask_set(pcf, irq, 1); +} +EXPORT_SYMBOL_GPL(pcf50606_irq_mask); + +int pcf50606_irq_unmask(struct pcf50606 *pcf, int irq) +{ + dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); + + return __pcf50606_irq_mask_set(pcf, irq, 0); +} +EXPORT_SYMBOL_GPL(pcf50606_irq_unmask); + +int pcf50606_irq_mask_get(struct pcf50606 *pcf, int irq) +{ + uint8_t reg, bits; + + reg = (irq / 8); + bits = (1 << (irq % 8)); + + return pcf->mask_regs[reg] & bits; +} +EXPORT_SYMBOL_GPL(pcf50606_irq_mask_get); + +static void pcf50606_irq_call_handler(struct pcf50606 *pcf, + int irq) +{ + if (pcf->irq_handler[irq].handler) + pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); +} + +#define PCF50606_ONKEY1S_TIMEOUT 8 + +#define PCF50606_REG_MBCS1 0x2c + +static void pcf50606_irq_worker(struct work_struct *work) +{ + int ret; + struct pcf50606 *pcf; + uint8_t pcf_int[3], charger_status; + size_t i, j; + + pcf = container_of(work, struct pcf50606, irq_work); + + /* Read the 3 INT regs in one transaction */ + ret = pcf50606_read_block(pcf, PCF50606_REG_INT1, + ARRAY_SIZE(pcf_int), pcf_int); + if (ret != ARRAY_SIZE(pcf_int)) { + dev_err(pcf->dev, "Error reading INT registers\n"); + + /* + * If this doesn't ACK the interrupt to the chip, we'll be + * called once again as we're level triggered. + */ + goto out; + } + + /* We immediately read the charger status. We thus make sure + * only one of CHGINS/CHGRM interrupt handlers are called */ + if (pcf_int[1] & (PCF50606_INT2_CHGINS | PCF50606_INT2_CHGRM)) { + charger_status = pcf50606_reg_read(pcf, PCF50606_REG_MBCS1); + if (charger_status & (0x1 << 4)) + pcf_int[1] &= ~PCF50606_INT2_CHGRM; + else + pcf_int[1] &= ~PCF50606_INT2_CHGINS; + } + + dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x\n", + pcf_int[0], pcf_int[1], pcf_int[2]); + + /* Some revisions of the chip don't have a 8s standby mode on + * ONKEY1S press. We try to manually do it in such cases. */ + if (pcf_int[0] & PCF50606_INT1_SECOND && pcf->onkey1s_held) { + dev_info(pcf->dev, "ONKEY1S held for %d secs\n", + pcf->onkey1s_held); + if (pcf->onkey1s_held++ == PCF50606_ONKEY1S_TIMEOUT) + if (pcf->pdata->force_shutdown) + pcf->pdata->force_shutdown(pcf); + } + + if (pcf_int[0] & PCF50606_INT1_ONKEY1S) { + dev_info(pcf->dev, "ONKEY1S held\n"); + pcf->onkey1s_held = 1 ; + + /* Unmask IRQ_SECOND */ + pcf50606_reg_clear_bits(pcf, PCF50606_REG_INT1M, + PCF50606_INT1_SECOND); + + /* Unmask IRQ_ONKEYF */ + pcf50606_reg_clear_bits(pcf, PCF50606_REG_INT1M, + PCF50606_INT1_ONKEYF); + } + + if ((pcf_int[0] & PCF50606_INT1_ONKEYR) && pcf->onkey1s_held) { + pcf->onkey1s_held = 0; + + /* Mask SECOND and ONKEYF interrupts */ + if (pcf->mask_regs[0] & PCF50606_INT1_SECOND) + pcf50606_reg_set_bit_mask(pcf, + PCF50606_REG_INT1M, + PCF50606_INT1_SECOND, + PCF50606_INT1_SECOND); + + if (pcf->mask_regs[0] & PCF50606_INT1_ONKEYF) + pcf50606_reg_set_bit_mask(pcf, + PCF50606_REG_INT1M, + PCF50606_INT1_ONKEYF, + PCF50606_INT1_ONKEYF); + } + + /* Have we just resumed ? */ + if (pcf->is_suspended) { + + pcf->is_suspended = 0; + + /* Set the resume reason filtering out non resumers */ + for (i = 0; i < ARRAY_SIZE(pcf_int); i++) + pcf->resume_reason[i] = pcf_int[i] & + pcf->pdata->resumers[i]; + + /* Make sure we don't pass on ONKEY events to + * userspace now */ + pcf_int[1] &= ~(PCF50606_INT1_ONKEYR | PCF50606_INT1_ONKEYF); + } + + for (i = 0; i < ARRAY_SIZE(pcf_int); i++) { + /* Unset masked interrupts */ + pcf_int[i] &= ~pcf->mask_regs[i]; + + for (j = 0; j < 8 ; j++) + if (pcf_int[i] & (1 << j)) + pcf50606_irq_call_handler(pcf, (i * 8) + j); + } + +out: + put_device(pcf->dev); + enable_irq(pcf->irq); +} + +static irqreturn_t pcf50606_irq(int irq, void *data) +{ + struct pcf50606 *pcf = data; + + get_device(pcf->dev); + disable_irq_nosync(pcf->irq); + schedule_work(&pcf->irq_work); + + return IRQ_HANDLED; +} + +static void +pcf50606_client_dev_register(struct pcf50606 *pcf, const char *name, + struct platform_device **pdev) +{ + int ret; + + *pdev = platform_device_alloc(name, -1); + if (!*pdev) { + dev_err(pcf->dev, "Falied to allocate %s\n", name); + return; + } + + (*pdev)->dev.parent = pcf->dev; + + ret = platform_device_add(*pdev); + if (ret) { + dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret); + platform_device_put(*pdev); + *pdev = NULL; + } +} + +#ifdef CONFIG_PM +static int pcf50606_suspend(struct i2c_client *client, pm_message_t state) +{ + int ret; + struct pcf50606 *pcf; + size_t i; + uint8_t res[3]; + + pcf = i2c_get_clientdata(client); + + /* Make sure our interrupt handlers are not called + * henceforth */ + disable_irq(pcf->irq); + + /* Make sure that any running IRQ worker has quit */ + cancel_work_sync(&pcf->irq_work); + + /* Save the masks */ + ret = pcf50606_read_block(pcf, PCF50606_REG_INT1M, + ARRAY_SIZE(pcf->suspend_irq_masks), + pcf->suspend_irq_masks); + if (ret < 0) { + dev_err(pcf->dev, "error saving irq masks\n"); + goto out; + } + + /* Write wakeup irq masks */ + for (i = 0; i < ARRAY_SIZE(res); i++) + res[i] = ~pcf->pdata->resumers[i]; + + ret = pcf50606_write_block(pcf, PCF50606_REG_INT1M, + ARRAY_SIZE(res), &res[0]); + if (ret < 0) { + dev_err(pcf->dev, "error writing wakeup irq masks\n"); + goto out; + } + + pcf->is_suspended = 1; + +out: + return ret; +} + +static int pcf50606_resume(struct i2c_client *client) +{ + struct pcf50606 *pcf; + int ret; + + pcf = i2c_get_clientdata(client); + + /* Write the saved mask registers */ + ret = pcf50606_write_block(pcf, PCF50606_REG_INT1M, + ARRAY_SIZE(pcf->suspend_irq_masks), + pcf->suspend_irq_masks); + if (ret < 0) + dev_err(pcf->dev, "Error restoring saved suspend masks\n"); + + get_device(pcf->dev); + + /* + * Clear any pending interrupts and set resume reason if any. + * This will leave with enable_irq() + */ + pcf50606_irq_worker(&pcf->irq_work); + + return 0; +} +#else +#define pcf50606_suspend NULL +#define pcf50606_resume NULL +#endif + +static int pcf50606_probe(struct i2c_client *client, + const struct i2c_device_id *ids) +{ + int ret; + struct pcf50606 *pcf; + struct pcf50606_platform_data *pdata = client->dev.platform_data; + int i; + uint8_t version, variant; + + if (!client->irq) { + dev_err(&client->dev, "Missing IRQ\n"); + return -ENOENT; + } + + pcf = kzalloc(sizeof(*pcf), GFP_KERNEL); + if (!pcf) + return -ENOMEM; + + pcf->pdata = pdata; + + mutex_init(&pcf->lock); + + i2c_set_clientdata(client, pcf); + pcf->dev = &client->dev; + pcf->i2c_client = client; + pcf->irq = client->irq; + + INIT_WORK(&pcf->irq_work, pcf50606_irq_worker); + + version = pcf50606_reg_read(pcf, 0); + variant = pcf50606_reg_read(pcf, 1); + + /* This test is always false, FIX it */ + if (version < 0 || variant < 0) { + dev_err(pcf->dev, "Unable to probe pcf50606\n"); + ret = -ENODEV; + goto err; + } + + dev_info(pcf->dev, "Probed device version %d variant %d\n", + version, variant); + /* Enable all inteerupts except RTC SECOND */ + pcf->mask_regs[0] = 0x40; + pcf50606_reg_write(pcf, PCF50606_REG_INT1M, pcf->mask_regs[0]); + pcf50606_reg_write(pcf, PCF50606_REG_INT2M, 0x00); + pcf50606_reg_write(pcf, PCF50606_REG_INT3M, 0x00); + + ret = request_irq(client->irq, pcf50606_irq, + IRQF_TRIGGER_LOW, "pcf50606", pcf); + + if (ret) { + dev_err(pcf->dev, "Failed to request IRQ %d\n", ret); + goto err; + } + + pcf50606_client_dev_register(pcf, "pcf50606-input", + &pcf->input_pdev); + pcf50606_client_dev_register(pcf, "pcf50606-rtc", + &pcf->rtc_pdev); + pcf50606_client_dev_register(pcf, "pcf50606-mbc", + &pcf->mbc_pdev); + pcf50606_client_dev_register(pcf, "pcf50606-adc", + &pcf->adc_pdev); + pcf50606_client_dev_register(pcf, "pcf50606-wdt", + &pcf->wdt_pdev); + for (i = 0; i < PCF50606_NUM_REGULATORS; i++) { + struct platform_device *pdev; + + pdev = platform_device_alloc("pcf50606-regltr", i); + if (!pdev) { + dev_err(pcf->dev, "Cannot create regulator %d\n", i); + continue; + } + + pdev->dev.parent = pcf->dev; + platform_device_add_data(pdev, &pdata->reg_init_data[i], + sizeof(pdata->reg_init_data[i])); + pcf->regulator_pdev[i] = pdev; + + platform_device_add(pdev); + } + + if (enable_irq_wake(client->irq) < 0) + dev_info(pcf->dev, "IRQ %u cannot be enabled as wake-up source" + "in this hardware revision\n", client->irq); + + ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group); + if (ret) + dev_info(pcf->dev, "error creating sysfs entries\n"); + + if (pdata->probe_done) + pdata->probe_done(pcf); + + return 0; + +err: + i2c_set_clientdata(client, NULL); + kfree(pcf); + return ret; +} + +static int pcf50606_remove(struct i2c_client *client) +{ + struct pcf50606 *pcf = i2c_get_clientdata(client); + unsigned int i; + + free_irq(pcf->irq, pcf); + + platform_device_unregister(pcf->input_pdev); + platform_device_unregister(pcf->rtc_pdev); + platform_device_unregister(pcf->mbc_pdev); + platform_device_unregister(pcf->adc_pdev); + + for (i = 0; i < PCF50606_NUM_REGULATORS; i++) + platform_device_unregister(pcf->regulator_pdev[i]); + + i2c_set_clientdata(client, NULL); + kfree(pcf); + + return 0; +} + +static struct i2c_device_id pcf50606_id_table[] = { + {"pcf50606", 0x08}, +}; + +static struct i2c_driver pcf50606_driver = { + .driver = { + .name = "pcf50606", + }, + .id_table = pcf50606_id_table, + .probe = pcf50606_probe, + .remove = pcf50606_remove, + .suspend = pcf50606_suspend, + .resume = pcf50606_resume, +}; + +static int __init pcf50606_init(void) +{ + return i2c_add_driver(&pcf50606_driver); +} +module_init(pcf50606_init); + +static void pcf50606_exit(void) +{ + i2c_del_driver(&pcf50606_driver); +} +module_exit(pcf50606_exit); + +MODULE_DESCRIPTION("I2C chip driver for NXP PCF50606 PMU"); +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 11dc7e69c4f..7dc854c3fd8 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c @@ -816,7 +816,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, nmtd->mtd.owner = THIS_MODULE; nmtd->set = set; - if (hardware_ecc) { + if (!(info->platform && info->platform->software_ecc) && hardware_ecc) { chip->ecc.calculate = s3c2410_nand_calculate_ecc; chip->ecc.correct = s3c2410_nand_correct_data; chip->ecc.mode = NAND_ECC_HW; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index bdbc4f73fcd..60a0813936d 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -103,4 +103,10 @@ config CHARGER_PCF50633 help Say Y to include support for NXP PCF50633 Main Battery Charger. +config CHARGER_PCF50606 + tristate "Support for NXP PCF50606 MBC" + depends on MFD_PCF50606 + help + Say Y to include support for NXP PCF50606 Battery Charger. + endif # POWER_SUPPLY diff --git a/drivers/power/Makefile b/drivers/power/Makefile index 380d17c9ae2..5e992240d61 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o +obj-$(CONFIG_CHARGER_PCF50606) += pcf50606-charger.o diff --git a/drivers/power/pcf50606-charger.c b/drivers/power/pcf50606-charger.c new file mode 100644 index 00000000000..a35b671061b --- /dev/null +++ b/drivers/power/pcf50606-charger.c @@ -0,0 +1,237 @@ +/* NXP PCF50606 Main Battery Charger Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte, Andy Green and Werner Almesberger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/types.h> +#include <linux/device.h> +#include <linux/sysfs.h> +#include <linux/platform_device.h> +#include <linux/power_supply.h> + +#include <linux/mfd/pcf50606/core.h> +#include <linux/mfd/pcf50606/mbc.h> + +struct pcf50606_mbc { + struct pcf50606 *pcf; + + int charger_online; + struct power_supply charger; +}; + +int pcf50606_charge_fast(struct pcf50606 *pcf, int on) +{ + struct pcf50606_mbc *mbc = platform_get_drvdata(pcf->mbc_pdev); + + /* + * This is a fix to work around boot-time ordering problems if + * the s3c2410_udc is initialized before the pcf50606 mbc is + * ready. + */ + if (!mbc) + return -ENODEV; + + if (on) { + pcf50606_reg_set_bit_mask(pcf, PCF50606_REG_MBCC1, + PCF50606_MBCC1_AUTOFST, + PCF50606_MBCC1_AUTOFST);\ + mbc->charger_online = 1; + } else { + /* disable automatic fast-charge */ + pcf50606_reg_clear_bits(pcf, PCF50606_REG_MBCC1, + PCF50606_MBCC1_AUTOFST); + /* switch to idle mode to abort existing charge process */ + pcf50606_reg_set_bit_mask(pcf, PCF50606_REG_MBCC1, + PCF50606_MBCC1_CHGMOD_MASK, + PCF50606_MBCC1_CHGMOD_IDLE); + mbc->charger_online = 0; + } + + return 0; +} +EXPORT_SYMBOL_GPL(pcf50606_charge_fast); + +static ssize_t +show_charge_mode(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct pcf50606_mbc *mbc = dev_get_drvdata(dev); + + uint8_t charge_mode = pcf50606_reg_read(mbc->pcf, PCF50606_REG_MBCC1); + charge_mode &= PCF50606_MBCC1_CHGMOD_MASK; + + return sprintf(buf, "%d\n", charge_mode); +} + +static ssize_t set_charge_mode(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct pcf50606_mbc *mbc = dev_get_drvdata(dev); + uint8_t mbcc1 = pcf50606_reg_read(mbc->pcf, PCF50606_REG_MBCC1); + + mbcc1 &= ~PCF50606_MBCC1_CHGMOD_MASK; + + if (!strcmp(buf, "qualification")) + mbcc1 |= PCF50606_MBCC1_CHGMOD_QUAL; + else if (!strcmp(buf, "pre")) + mbcc1 |= PCF50606_MBCC1_CHGMOD_PRE; + else if (!strcmp(buf, "trickle")) + mbcc1 |= PCF50606_MBCC1_CHGMOD_TRICKLE; + else if (!strcmp(buf, "fast_cccv")) + mbcc1 |= PCF50606_MBCC1_CHGMOD_FAST_CCCV; + /* We don't allow the other fast modes for security reasons */ + else if (!strcmp(buf, "idle")) + mbcc1 |= PCF50606_MBCC1_CHGMOD_IDLE; + else + return -EINVAL; + + pcf50606_reg_write(mbc->pcf, PCF50606_REG_MBCC1, mbcc1); + + return count; +} + +static DEVICE_ATTR(charge_mode, S_IRUGO, show_charge_mode, set_charge_mode); + +static void +pcf50606_mbc_irq_handler(int irq, void *data) +{ + struct pcf50606_mbc *mbc = data; + + power_supply_changed(&mbc->charger); + + if (mbc->pcf->pdata->mbc_event_callback) + mbc->pcf->pdata->mbc_event_callback(mbc->pcf, irq); +} + +static int charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct pcf50606_mbc *mbc = container_of(psy, struct pcf50606_mbc, charger); + int ret = 0; + + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: + val->intval = mbc->charger_online; + break; + default: + ret = -EINVAL; + break; + } + return ret; +} + +static enum power_supply_property power_props[] = { + POWER_SUPPLY_PROP_ONLINE, +}; + +static const uint8_t mbc_irq_handlers[] = { + PCF50606_IRQ_CHGINS, + PCF50606_IRQ_CHGRM, + PCF50606_IRQ_CHGFOK, + PCF50606_IRQ_CHGERR, + PCF50606_IRQ_CHGFRDY, + PCF50606_IRQ_CHGPROT, +}; + +static int __devinit pcf50606_mbc_probe(struct platform_device *pdev) +{ + struct pcf50606_mbc *mbc; + int ret; + size_t i; + uint8_t oocs; + + mbc = kzalloc(sizeof(*mbc), GFP_KERNEL); + if (!mbc) + return -ENOMEM; + + mbc->pcf = dev_to_pcf50606(pdev->dev.parent); + + mbc->charger.name = "charger"; + mbc->charger.type = POWER_SUPPLY_TYPE_MAINS; + mbc->charger.properties = power_props; + mbc->charger.num_properties = ARRAY_SIZE(power_props); + mbc->charger.get_property = &charger_get_property; + mbc->charger.supplied_to = mbc->pcf->pdata->batteries; + mbc->charger.num_supplicants = mbc->pcf->pdata->num_batteries; + + ret = power_supply_register(&pdev->dev, &mbc->charger); + if (ret) { + dev_err(mbc->pcf->dev, "failed to register charger\n"); + kfree(mbc); + return ret; + } + + /* Set up IRQ handlers */ + for (i = 0; i < ARRAY_SIZE(mbc_irq_handlers); i++) + pcf50606_register_irq(mbc->pcf, mbc_irq_handlers[i], + pcf50606_mbc_irq_handler, mbc); + + ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_charge_mode.attr); + if (ret) + dev_err(mbc->pcf->dev, "failed to create sysfs entries\n"); + + oocs = pcf50606_reg_read(mbc->pcf, PCF50606_REG_OOCS); + if (oocs & PCF50606_OOCS_CHGOK) + pcf50606_mbc_irq_handler(PCF50606_IRQ_CHGINS, mbc); + + platform_set_drvdata(pdev, mbc); + + return 0; +} + +static int __devexit pcf50606_mbc_remove(struct platform_device *pdev) +{ + struct pcf50606_mbc *mbc = platform_get_drvdata(pdev); + size_t i; + + /* Remove IRQ handlers */ + for (i = 0; i < ARRAY_SIZE(mbc_irq_handlers); i++) + pcf50606_free_irq(mbc->pcf, mbc_irq_handlers[i]); + + power_supply_unregister(&mbc->charger); + + platform_set_drvdata(pdev, NULL); + kfree(mbc); + + return 0; +} + +static struct platform_driver pcf50606_mbc_driver = { + .driver = { + .name = "pcf50606-mbc", + .owner = THIS_MODULE, + }, + .probe = pcf50606_mbc_probe, + .remove = __devexit_p(pcf50606_mbc_remove), +}; + +static int __init pcf50606_mbc_init(void) +{ + return platform_driver_register(&pcf50606_mbc_driver); +} +module_init(pcf50606_mbc_init); + +static void __exit pcf50606_mbc_exit(void) +{ + platform_driver_unregister(&pcf50606_mbc_driver); +} +module_exit(pcf50606_mbc_exit); + +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_DESCRIPTION("PCF50606 mbc driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pcf50606-mbc"); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index f4317798e47..29f34a4de25 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -117,4 +117,10 @@ config REGULATOR_LP3971 Say Y here to support the voltage regulators and convertors on National Semiconductors LP3971 PMIC +config REGULATOR_PCF50606 + bool "PCF50606 regulator driver" + depends on MFD_PCF50606 + help + Say Y here to support the voltage regulators and convertors + on PCF50606 endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 4d762c4cccf..ac5b42ae95c 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o obj-$(CONFIG_REGULATOR_DA903X) += da903x.o obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o +obj-$(CONFIG_REGULATOR_PCF50606) += pcf50606-regulator.o ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG diff --git a/drivers/regulator/pcf50606-regulator.c b/drivers/regulator/pcf50606-regulator.c new file mode 100644 index 00000000000..ae3193f3104 --- /dev/null +++ b/drivers/regulator/pcf50606-regulator.c @@ -0,0 +1,358 @@ +/* NXP PCF50606 PMIC Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte and Andy Green and Werner Almesberger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/platform_device.h> + +#include <linux/mfd/pcf50606/core.h> +#include <linux/mfd/pcf50606/pmic.h> + +#define PCF50606_REGULATOR(_name, _id) \ + { \ + .name = _name, \ + .id = _id, \ + .ops = &pcf50606_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static const uint8_t pcf50606_regulator_registers[PCF50606_NUM_REGULATORS] = { + [PCF50606_REGULATOR_DCD] = PCF50606_REG_DCDC1, + [PCF50606_REGULATOR_DCDE] = PCF50606_REG_DCDEC1, + [PCF50606_REGULATOR_DCUD] = PCF50606_REG_DCUDC1, + [PCF50606_REGULATOR_D1REG] = PCF50606_REG_D1REGC1, + [PCF50606_REGULATOR_D2REG] = PCF50606_REG_D2REGC1, + [PCF50606_REGULATOR_D3REG] = PCF50606_REG_D3REGC1, + [PCF50606_REGULATOR_LPREG] = PCF50606_REG_LPREGC1, + [PCF50606_REGULATOR_IOREG] = PCF50606_REG_IOREGC, +}; + +static uint8_t dcudc_voltage(unsigned int millivolts) +{ + if (millivolts <= 900) + return 0; + else if (millivolts <= 3300) + return (millivolts - 900) / 300; + else if (millivolts < 4000) + return 0x0f; + else if (millivolts <= 5500) + return (millivolts - 4000) / 100; + + return 0x1f; +} + +static unsigned int dcudc_2voltage(uint8_t bits) +{ + bits &= 0x1f; + if (bits < 0x08) + return 900 + bits * 300; + else if (bits < 0x10) + return 3300; + else + return 4000 + (bits & 0xf) * 100; +} + +static uint8_t dcdec_voltage(unsigned int millivolts) +{ + if (millivolts < 900) + return 0; + else if (millivolts > 3300) + return 0x0f; + + return (millivolts - 900) / 300; +} + +static unsigned int dcdec_2voltage(uint8_t bits) +{ + bits &= 0x0f; + return 900 + bits * 300; +} + +static uint8_t dcdc_voltage(unsigned int millivolts) +{ + if (millivolts < 900) + return 0; + else if (millivolts > 3600) + return 0x1f; + + if (millivolts < 1500) + return (millivolts - 900) / 25; + else + return 0x18 + (millivolts - 1500) / 300; +} + +static unsigned int dcdc_2voltage(uint8_t bits) +{ + bits &= 0x1f; + if ((bits & 0x18) == 0x18) + return 1500 + ((bits & 0x7) * 300); + else + return 900 + (bits * 25); +} + +static uint8_t dx_voltage(unsigned int millivolts) +{ + if (millivolts < 900) + return 0; + else if (millivolts > 3300) + return 0x18; + + return (millivolts - 900) / 100; +} + +static unsigned int dx_2voltage(uint8_t bits) +{ + bits &= 0x1f; + return 900 + (bits * 100); +} + +static int pcf50606_regulator_set_voltage(struct regulator_dev *rdev, + int min_uV, int max_uV) +{ + struct pcf50606 *pcf; + int regulator_id, millivolts; + uint8_t volt_bits, regnr; + + pcf = rdev_get_drvdata(rdev); + + regulator_id = rdev_get_id(rdev); + + millivolts = min_uV / 1000; + + switch (regulator_id) { + case PCF50606_REGULATOR_DCD: + volt_bits = dcdc_voltage(millivolts); + regnr = PCF50606_REG_DCDC1; + break; + case PCF50606_REGULATOR_DCDE: + volt_bits = dcdec_voltage(millivolts); + regnr = PCF50606_REG_DCDEC1; + break; + case PCF50606_REGULATOR_DCUD: + volt_bits = dcudc_voltage(millivolts); + regnr = PCF50606_REG_DCUDC1; + break; + case PCF50606_REGULATOR_D1REG: + case PCF50606_REGULATOR_D2REG: + case PCF50606_REGULATOR_D3REG: + regnr = PCF50606_REG_D1REGC1 + + (regulator_id - PCF50606_REGULATOR_D1REG); + volt_bits = dx_voltage(millivolts); + break; + case PCF50606_REGULATOR_LPREG: + volt_bits = dx_voltage(millivolts); + regnr = PCF50606_REG_LPREGC1; + break; + case PCF50606_REGULATOR_IOREG: + if (millivolts < 1800) + return -EINVAL; + volt_bits = dx_voltage(millivolts); + regnr = PCF50606_REG_IOREGC; + break; + default: + return -EINVAL; + } + + return pcf50606_reg_set_bit_mask(pcf, regnr, 0x1f, volt_bits); +} + +static int pcf50606_regulator_get_voltage(struct regulator_dev *rdev) +{ + struct pcf50606 *pcf; + uint8_t volt_bits, regnr; + int regulator_id; + int voltage; + + pcf = rdev_get_drvdata(rdev); + + regulator_id = rdev_get_id(rdev); + + switch (regulator_id) { + case PCF50606_REGULATOR_DCD: + volt_bits = pcf50606_reg_read(pcf, PCF50606_REG_DCDC1) & 0x1f; + voltage = dcdc_2voltage(volt_bits); + break; + case PCF50606_REGULATOR_DCDE: + volt_bits = pcf50606_reg_read(pcf, PCF50606_REG_DCDEC1) & 0x0f; + voltage = dcdec_2voltage(volt_bits); + break; + case PCF50606_REGULATOR_DCUD: + volt_bits = pcf50606_reg_read(pcf, PCF50606_REG_DCUDC1) & 0x1f; + voltage = dcudc_2voltage(volt_bits); + break; + case PCF50606_REGULATOR_D1REG: + case PCF50606_REGULATOR_D2REG: + case PCF50606_REGULATOR_D3REG: + regnr = PCF50606_REG_D1REGC1 + (regulator_id - PCF50606_REGULATOR_D1REG); + volt_bits = pcf50606_reg_read(pcf, regnr) & 0x1f; + if (volt_bits > 0x18) + volt_bits = 0x18; + voltage = dx_2voltage(volt_bits); + break; + case PCF50606_REGULATOR_LPREG: + volt_bits = pcf50606_reg_read(pcf, PCF50606_REG_LPREGC1) & 0x1f; + if (volt_bits > 0x18) + volt_bits = 0x18; + voltage = dx_2voltage(volt_bits); + break; + case PCF50606_REGULATOR_IOREG: + volt_bits = pcf50606_reg_read(pcf, PCF50606_REG_IOREGC) & 0x1f; + if (volt_bits > 0x18) + volt_bits = 0x18; + voltage = dx_2voltage(volt_bits); + break; + default: + return -EINVAL; + } + + return voltage * 1000; +} + +static int pcf50606_regulator_enable(struct regulator_dev *rdev) +{ + struct pcf50606 *pcf = rdev_get_drvdata(rdev); + int regulator_id; + uint8_t regnr; + + regulator_id = rdev_get_id(rdev); + + regnr = pcf50606_regulator_registers[regulator_id]; + + return pcf50606_reg_set_bit_mask(pcf, regnr, 0xe0, 0xe0); +} + +static int pcf50606_regulator_disable(struct regulator_dev *rdev) +{ + struct pcf50606 *pcf = rdev_get_drvdata(rdev); + int regulator_id; + uint8_t regnr; + + regulator_id = rdev_get_id(rdev); + + /* IOREG cannot be powered off since it powers the PMU I2C */ + if (regulator_id == PCF50606_REGULATOR_IOREG) + return -EINVAL; + + regnr = pcf50606_regulator_registers[regulator_id]; + + return pcf50606_reg_set_bit_mask(pcf, regnr, 0xe0, 0); +} + +static int pcf50606_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct pcf50606 *pcf = rdev_get_drvdata(rdev); + int regulator_id = rdev_get_id(rdev); + uint8_t regnr, val; + + regulator_id = rdev_get_id(rdev); + + /* the *ENA register is always one after the *OUT register */ + regnr = pcf50606_regulator_registers[regulator_id]; + val = (pcf50606_reg_read(pcf, regnr) & 0xe0) >> 5; + + /* PWREN1 = 1, PWREN2 = 1, see table 16 of datasheet */ + if (val == 0 || val == 5) + return 0; + + return 1; +} + +static struct regulator_ops pcf50606_regulator_ops = { + .set_voltage = pcf50606_regulator_set_voltage, + .get_voltage = pcf50606_regulator_get_voltage, + .enable = pcf50606_regulator_enable, + .disable = pcf50606_regulator_disable, + .is_enabled = pcf50606_regulator_is_enabled, +}; + +static struct regulator_desc regulators[] = { + [PCF50606_REGULATOR_DCD] = + PCF50606_REGULATOR("dcd", PCF50606_REGULATOR_DCD), + [PCF50606_REGULATOR_DCDE] = + PCF50606_REGULATOR("dcde", PCF50606_REGULATOR_DCDE), + [PCF50606_REGULATOR_DCUD] = + PCF50606_REGULATOR("dcud", PCF50606_REGULATOR_DCUD), + [PCF50606_REGULATOR_D1REG] = + PCF50606_REGULATOR("d1reg", PCF50606_REGULATOR_D1REG), + [PCF50606_REGULATOR_D2REG] = + PCF50606_REGULATOR("d2reg", PCF50606_REGULATOR_D2REG), + [PCF50606_REGULATOR_D3REG] = + PCF50606_REGULATOR("d3reg", PCF50606_REGULATOR_D3REG), + [PCF50606_REGULATOR_LPREG] = + PCF50606_REGULATOR("lpreg", PCF50606_REGULATOR_LPREG), + [PCF50606_REGULATOR_IOREG] = + PCF50606_REGULATOR("ioreg", PCF50606_REGULATOR_IOREG), +}; + +static int __devinit pcf50606_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + struct pcf50606 *pcf; + + pcf = dev_to_pcf50606(pdev->dev.parent); + + rdev = regulator_register(®ulators[pdev->id], &pdev->dev, + pdev->dev.platform_data, pcf); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + platform_set_drvdata(pdev, rdev); + + if (pcf->pdata->regulator_registered) + pcf->pdata->regulator_registered(pcf, pdev->id); + + return 0; +} + +static int __devexit pcf50606_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + platform_set_drvdata(pdev, NULL); + regulator_unregister(rdev); + + return 0; +} + +static struct platform_driver pcf50606_regulator_driver = { + .driver = { + .name = "pcf50606-regltr", + .owner = THIS_MODULE, + }, + .probe = pcf50606_regulator_probe, + .remove = __devexit_p(pcf50606_regulator_remove), +}; + +static int __init pcf50606_regulator_init(void) +{ + return platform_driver_register(&pcf50606_regulator_driver); +} +module_init(pcf50606_regulator_init); + +static void __exit pcf50606_regulator_exit(void) +{ + platform_driver_unregister(&pcf50606_regulator_driver); +} +module_exit(pcf50606_regulator_exit); + +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_DESCRIPTION("PCF50606 regulator driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pcf50606-regulator"); diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 81adbdbd504..7e0a1a4763e 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -535,6 +535,13 @@ config RTC_DRV_PCF50633 If you say yes here you get support for the RTC subsystem of the NXP PCF50633 used in embedded systems. +config RTC_DRV_PCF50606 + depends on MFD_PCF50606 + tristate "NXP PCF50606 RTC" + help + If you say yes here you get support for the RTC subsystem of the + NXP PCF50606 used in embedded systems. + comment "on-CPU RTC drivers" config RTC_DRV_OMAP diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 3c0f2b2ac92..8082cbfcfa5 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -77,4 +77,5 @@ obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o +obj-$(CONFIG_RTC_DRV_PCF50606) += rtc-pcf50606.o obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o diff --git a/drivers/rtc/rtc-pcf50606.c b/drivers/rtc/rtc-pcf50606.c new file mode 100644 index 00000000000..5004987100d --- /dev/null +++ b/drivers/rtc/rtc-pcf50606.c @@ -0,0 +1,341 @@ +/* NXP PCF50606 RTC Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte, Andy Green and Werner Almesberger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/rtc.h> +#include <linux/bcd.h> +#include <linux/err.h> + +#include <linux/mfd/pcf50606/core.h> + +#define PCF50606_REG_RTCSC 0x0a /* Second */ +#define PCF50606_REG_RTCMN 0x0b /* Minute */ +#define PCF50606_REG_RTCHR 0x0c /* Hour */ +#define PCF50606_REG_RTCWD 0x0d /* Weekday */ +#define PCF50606_REG_RTCDT 0x0e /* Day */ +#define PCF50606_REG_RTCMT 0x0f /* Month */ +#define PCF50606_REG_RTCYR 0x10 /* Year */ +#define PCF50606_REG_RTCSCA 0x11 /* Alarm Second */ +#define PCF50606_REG_RTCMNA 0x12 /* Alarm Minute */ +#define PCF50606_REG_RTCHRA 0x13 /* Alarm Hour */ +#define PCF50606_REG_RTCWDA 0x14 /* Alarm Weekday */ +#define PCF50606_REG_RTCDTA 0x15 /* Alarm Day */ +#define PCF50606_REG_RTCMTA 0x16 /* Alarm Month */ +#define PCF50606_REG_RTCYRA 0x17 /* Alarm Year */ + +enum pcf50606_time_indexes { + PCF50606_TI_SEC, + PCF50606_TI_MIN, + PCF50606_TI_HOUR, + PCF50606_TI_WKDAY, + PCF50606_TI_DAY, + PCF50606_TI_MONTH, + PCF50606_TI_YEAR, + PCF50606_TI_EXTENT /* always last */ +}; + +struct pcf50606_time { + uint8_t time[PCF50606_TI_EXTENT]; +}; + +struct pcf50606_rtc { + int alarm_enabled; + int second_enabled; + int alarm_pending; + + struct pcf50606 *pcf; + struct rtc_device *rtc_dev; +}; + +static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50606_time *pcf) +{ + rtc->tm_sec = bcd2bin(pcf->time[PCF50606_TI_SEC]); + rtc->tm_min = bcd2bin(pcf->time[PCF50606_TI_MIN]); + rtc->tm_hour = bcd2bin(pcf->time[PCF50606_TI_HOUR]); + rtc->tm_wday = bcd2bin(pcf->time[PCF50606_TI_WKDAY]); + rtc->tm_mday = bcd2bin(pcf->time[PCF50606_TI_DAY]); + rtc->tm_mon = bcd2bin(pcf->time[PCF50606_TI_MONTH]) - 1; + rtc->tm_year = bcd2bin(pcf->time[PCF50606_TI_YEAR]) + 100; +} + +static void rtc2pcf_time(struct pcf50606_time *pcf, struct rtc_time *rtc) +{ + pcf->time[PCF50606_TI_SEC] = bin2bcd(rtc->tm_sec); + pcf->time[PCF50606_TI_MIN] = bin2bcd(rtc->tm_min); + pcf->time[PCF50606_TI_HOUR] = bin2bcd(rtc->tm_hour); + pcf->time[PCF50606_TI_WKDAY] = bin2bcd(rtc->tm_wday); + pcf->time[PCF50606_TI_DAY] = bin2bcd(rtc->tm_mday); + pcf->time[PCF50606_TI_MONTH] = bin2bcd(rtc->tm_mon + 1); + pcf->time[PCF50606_TI_YEAR] = bin2bcd(rtc->tm_year % 100); +} + +static int +pcf50606_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) +{ + struct pcf50606_rtc *rtc = dev_get_drvdata(dev); + + switch (cmd) { + case RTC_AIE_OFF: + rtc->alarm_enabled = 0; + pcf50606_irq_mask(rtc->pcf, PCF50606_IRQ_ALARM); + return 0; + case RTC_AIE_ON: + rtc->alarm_enabled = 1; + pcf50606_irq_unmask(rtc->pcf, PCF50606_IRQ_ALARM); + return 0; + case RTC_UIE_OFF: + rtc->second_enabled = 0; + pcf50606_irq_mask(rtc->pcf, PCF50606_IRQ_SECOND); + return 0; + case RTC_UIE_ON: + rtc->second_enabled = 1; + pcf50606_irq_unmask(rtc->pcf, PCF50606_IRQ_SECOND); + return 0; + } + + return -ENOIOCTLCMD; +} + +static int pcf50606_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct pcf50606_rtc *rtc; + struct pcf50606_time pcf_tm; + int ret; + + rtc = dev_get_drvdata(dev); + + ret = pcf50606_read_block(rtc->pcf, PCF50606_REG_RTCSC, + PCF50606_TI_EXTENT, + &pcf_tm.time[0]); + if (ret != PCF50606_TI_EXTENT) { + dev_err(dev, "Failed to read time\n"); + return -EIO; + } + + dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", + pcf_tm.time[PCF50606_TI_DAY], + pcf_tm.time[PCF50606_TI_MONTH], + pcf_tm.time[PCF50606_TI_YEAR], + pcf_tm.time[PCF50606_TI_HOUR], + pcf_tm.time[PCF50606_TI_MIN], + pcf_tm.time[PCF50606_TI_SEC]); + + pcf2rtc_time(tm, &pcf_tm); + + dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n", + tm->tm_mday, tm->tm_mon, tm->tm_year, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + return rtc_valid_tm(tm); +} + +static int pcf50606_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct pcf50606_rtc *rtc; + struct pcf50606_time pcf_tm; + int second_masked, alarm_masked, ret = 0; + + rtc = dev_get_drvdata(dev); + + dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n", + tm->tm_mday, tm->tm_mon, tm->tm_year, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + rtc2pcf_time(&pcf_tm, tm); + + dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n", + pcf_tm.time[PCF50606_TI_DAY], + pcf_tm.time[PCF50606_TI_MONTH], + pcf_tm.time[PCF50606_TI_YEAR], + pcf_tm.time[PCF50606_TI_HOUR], + pcf_tm.time[PCF50606_TI_MIN], + pcf_tm.time[PCF50606_TI_SEC]); + + + second_masked = pcf50606_irq_mask_get(rtc->pcf, PCF50606_IRQ_SECOND); + alarm_masked = pcf50606_irq_mask_get(rtc->pcf, PCF50606_IRQ_ALARM); + + if (!second_masked) + pcf50606_irq_mask(rtc->pcf, PCF50606_IRQ_SECOND); + if (!alarm_masked) + pcf50606_irq_mask(rtc->pcf, PCF50606_IRQ_ALARM); + + /* Returns 0 on success */ + ret = pcf50606_write_block(rtc->pcf, PCF50606_REG_RTCSC, + PCF50606_TI_EXTENT, + &pcf_tm.time[0]); + + if (!second_masked) + pcf50606_irq_unmask(rtc->pcf, PCF50606_IRQ_SECOND); + if (!alarm_masked) + pcf50606_irq_unmask(rtc->pcf, PCF50606_IRQ_ALARM); + + return ret; +} + +static int pcf50606_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct pcf50606_rtc *rtc; + struct pcf50606_time pcf_tm; + int ret = 0; + + rtc = dev_get_drvdata(dev); + + alrm->enabled = rtc->alarm_enabled; + alrm->pending = rtc->alarm_pending; + + ret = pcf50606_read_block(rtc->pcf, PCF50606_REG_RTCSCA, + PCF50606_TI_EXTENT, &pcf_tm.time[0]); + if (ret != PCF50606_TI_EXTENT) { + dev_err(dev, "Failed to read time\n"); + return -EIO; + } + + pcf2rtc_time(&alrm->time, &pcf_tm); + + return rtc_valid_tm(&alrm->time); +} + +static int pcf50606_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct pcf50606_rtc *rtc; + struct pcf50606_time pcf_tm; + int alarm_masked, ret = 0; + + rtc = dev_get_drvdata(dev); + + rtc2pcf_time(&pcf_tm, &alrm->time); + + /* do like mktime does and ignore tm_wday */ + pcf_tm.time[PCF50606_TI_WKDAY] = 7; + + alarm_masked = pcf50606_irq_mask_get(rtc->pcf, PCF50606_IRQ_ALARM); + + /* disable alarm interrupt */ + if (!alarm_masked) + pcf50606_irq_mask(rtc->pcf, PCF50606_IRQ_ALARM); + + /* Returns 0 on success */ + ret = pcf50606_write_block(rtc->pcf, PCF50606_REG_RTCSCA, + PCF50606_TI_EXTENT, &pcf_tm.time[0]); + + if (!alrm->enabled) + rtc->alarm_pending = 0; + + if (!alarm_masked || alrm->enabled) + pcf50606_irq_unmask(rtc->pcf, PCF50606_IRQ_ALARM); + rtc->alarm_enabled = alrm->enabled; + + return ret; +} + +static struct rtc_class_ops pcf50606_rtc_ops = { + .ioctl = pcf50606_rtc_ioctl, + .read_time = pcf50606_rtc_read_time, + .set_time = pcf50606_rtc_set_time, + .read_alarm = pcf50606_rtc_read_alarm, + .set_alarm = pcf50606_rtc_set_alarm, +}; + +static void pcf50606_rtc_irq(int irq, void *data) +{ + struct pcf50606_rtc *rtc = data; + + switch (irq) { + case PCF50606_IRQ_ALARM: + rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); + rtc->alarm_pending = 1; + break; + case PCF50606_IRQ_SECOND: + rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); + break; + } +} + +static int __devinit pcf50606_rtc_probe(struct platform_device *pdev) +{ + struct pcf50606_rtc *rtc; + + rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); + if (!rtc) + return -ENOMEM; + + rtc->pcf = dev_to_pcf50606(pdev->dev.parent); + platform_set_drvdata(pdev, rtc); + rtc->rtc_dev = rtc_device_register("pcf50606-rtc", &pdev->dev, + &pcf50606_rtc_ops, THIS_MODULE); + + if (IS_ERR(rtc->rtc_dev)) { + kfree(rtc); + return PTR_ERR(rtc->rtc_dev); + } + + pcf50606_register_irq(rtc->pcf, PCF50606_IRQ_ALARM, + pcf50606_rtc_irq, rtc); + pcf50606_register_irq(rtc->pcf, PCF50606_IRQ_SECOND, + pcf50606_rtc_irq, rtc); + + return 0; +} + + +static int __devexit pcf50606_rtc_remove(struct platform_device *pdev) +{ + struct pcf50606_rtc *rtc; + + rtc = platform_get_drvdata(pdev); + + rtc_device_unregister(rtc->rtc_dev); + + pcf50606_free_irq(rtc->pcf, PCF50606_IRQ_ALARM); + pcf50606_free_irq(rtc->pcf, PCF50606_IRQ_SECOND); + + platform_set_drvdata(pdev, NULL); + kfree(rtc); + + return 0; +} + + +static struct platform_driver pcf50606_rtc_driver = { + .driver = { + .name = "pcf50606-rtc", + .owner = THIS_MODULE, + }, + .probe = pcf50606_rtc_probe, + .remove = __devexit_p(pcf50606_rtc_remove), +}; + +static int __init pcf50606_rtc_init(void) +{ + return platform_driver_register(&pcf50606_rtc_driver); +} +module_init(pcf50606_rtc_init); + +static void __exit pcf50606_rtc_exit(void) +{ + platform_driver_unregister(&pcf50606_rtc_driver); +} +module_exit(pcf50606_rtc_exit); + +MODULE_DESCRIPTION("PCF50606 RTC driver"); +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_LICENSE("GPL"); + diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index c8851a0db63..7d0616495bf 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c @@ -1263,6 +1263,13 @@ module_exit(s3c24xx_serial_modexit); #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE static struct uart_port *cons_uart; +static int cons_silenced; + +void s3c24xx_serial_console_set_silence(int silenced) +{ + cons_silenced = silenced; +} +EXPORT_SYMBOL(s3c24xx_serial_console_set_silence); static int s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon) @@ -1287,9 +1294,21 @@ static void s3c24xx_serial_console_putchar(struct uart_port *port, int ch) { unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); + unsigned int umcon = rd_regl(cons_uart, S3C2410_UMCON); + + if (cons_silenced) + return; + + /* If auto HW flow control enabled, temporarily turn it off */ + if (umcon & S3C2410_UMCOM_AFC) + wr_regl(port, S3C2410_UMCON, (umcon & !S3C2410_UMCOM_AFC)); + while (!s3c24xx_serial_console_txrdy(port, ufcon)) barrier(); wr_regb(cons_uart, S3C2410_UTXH, ch); + + if (umcon & S3C2410_UMCOM_AFC) + wr_regl(port, S3C2410_UMCON, umcon); } static void diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index f9d19be0554..0eb77333c83 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -93,6 +93,20 @@ config LCD_HP700 If you have an HP Jornada 700 series handheld (710/720/728) say Y to enable LCD control driver. +config LCD_JBT6K74 + tristate "TPO JBT6K74-AS TFT display ASIC control interface" + depends on SPI_MASTER && SYSFS && LCD_CLASS_DEVICE + help + SPI driver for the control interface of TFT panels containing + the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1 + TFT diplay module used in the Openmoko Freerunner GSM phone. + + The control interface is required for display operation, as it + controls power management, display timing and gamma calibration. + + This driver can also be build as a module, if so it will be called + jbt6k74. + # # Backlight # diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 4eb178c1d68..13db30f415f 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o obj-$(CONFIG_LCD_TDO24M) += tdo24m.o obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o +obj-$(CONFIG_LCD_JBT6K74) += jbt6k74.o obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o diff --git a/drivers/video/backlight/jbt6k74.c b/drivers/video/backlight/jbt6k74.c new file mode 100644 index 00000000000..b1aacb7ebcd --- /dev/null +++ b/drivers/video/backlight/jbt6k74.c @@ -0,0 +1,885 @@ +/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC + * + * Copyright (C) 2006-2007 by Openmoko, Inc. + * Author: Harald Welte <laforge@openmoko.org>, + * Stefan Schmidt <stefan@openmoko.org> + * Copyright (C) 2008 by Harald Welte <laforge@openmoko.org> + * Copyright (C) 2009 by Lars-Peter Clausen <lars@metafoo.de> + * All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/workqueue.h> +#include <linux/jbt6k74.h> +#include <linux/fb.h> +#include <linux/lcd.h> +#include <linux/time.h> +#include <linux/regulator/consumer.h> +#include <linux/gpio.h> + +enum jbt_register { + JBT_REG_SLEEP_IN = 0x10, + JBT_REG_SLEEP_OUT = 0x11, + + JBT_REG_DISPLAY_OFF = 0x28, + JBT_REG_DISPLAY_ON = 0x29, + + JBT_REG_RGB_FORMAT = 0x3a, + JBT_REG_QUAD_RATE = 0x3b, + + JBT_REG_POWER_ON_OFF = 0xb0, + JBT_REG_BOOSTER_OP = 0xb1, + JBT_REG_BOOSTER_MODE = 0xb2, + JBT_REG_BOOSTER_FREQ = 0xb3, + JBT_REG_OPAMP_SYSCLK = 0xb4, + JBT_REG_VSC_VOLTAGE = 0xb5, + JBT_REG_VCOM_VOLTAGE = 0xb6, + JBT_REG_EXT_DISPL = 0xb7, + JBT_REG_OUTPUT_CONTROL = 0xb8, + JBT_REG_DCCLK_DCEV = 0xb9, + JBT_REG_DISPLAY_MODE1 = 0xba, + JBT_REG_DISPLAY_MODE2 = 0xbb, + JBT_REG_DISPLAY_MODE = 0xbc, + JBT_REG_ASW_SLEW = 0xbd, + JBT_REG_DUMMY_DISPLAY = 0xbe, + JBT_REG_DRIVE_SYSTEM = 0xbf, + + JBT_REG_SLEEP_OUT_FR_A = 0xc0, + JBT_REG_SLEEP_OUT_FR_B = 0xc1, + JBT_REG_SLEEP_OUT_FR_C = 0xc2, + JBT_REG_SLEEP_IN_LCCNT_D = 0xc3, + JBT_REG_SLEEP_IN_LCCNT_E = 0xc4, + JBT_REG_SLEEP_IN_LCCNT_F = 0xc5, + JBT_REG_SLEEP_IN_LCCNT_G = 0xc6, + + JBT_REG_GAMMA1_FINE_1 = 0xc7, + JBT_REG_GAMMA1_FINE_2 = 0xc8, + JBT_REG_GAMMA1_INCLINATION = 0xc9, + JBT_REG_GAMMA1_BLUE_OFFSET = 0xca, + + /* VGA */ + JBT_REG_BLANK_CONTROL = 0xcf, + JBT_REG_BLANK_TH_TV = 0xd0, + JBT_REG_CKV_ON_OFF = 0xd1, + JBT_REG_CKV_1_2 = 0xd2, + JBT_REG_OEV_TIMING = 0xd3, + JBT_REG_ASW_TIMING_1 = 0xd4, + JBT_REG_ASW_TIMING_2 = 0xd5, + + /* QVGA */ + JBT_REG_BLANK_CONTROL_QVGA = 0xd6, + JBT_REG_BLANK_TH_TV_QVGA = 0xd7, + JBT_REG_CKV_ON_OFF_QVGA = 0xd8, + JBT_REG_CKV_1_2_QVGA = 0xd9, + JBT_REG_OEV_TIMING_QVGA = 0xde, + JBT_REG_ASW_TIMING_1_QVGA = 0xdf, + JBT_REG_ASW_TIMING_2_QVGA = 0xe0, + + + JBT_REG_HCLOCK_VGA = 0xec, + JBT_REG_HCLOCK_QVGA = 0xed, +}; + +enum jbt_resolution { + JBT_RESOLUTION_VGA, + JBT_RESOLUTION_QVGA, +}; + +enum jbt_power_mode { + JBT_POWER_MODE_DEEP_STANDBY, + JBT_POWER_MODE_SLEEP, + JBT_POWER_MODE_NORMAL, +}; + +static const char *jbt_power_mode_names[] = { + [JBT_POWER_MODE_DEEP_STANDBY] = "deep-standby", + [JBT_POWER_MODE_SLEEP] = "sleep", + [JBT_POWER_MODE_NORMAL] = "normal", +}; + +static const char *jbt_resolution_names[] = { + [JBT_RESOLUTION_VGA] = "vga", + [JBT_RESOLUTION_QVGA] = "qvga", +}; + +struct jbt_info { + struct mutex lock; /* protects this structure */ + enum jbt_resolution resolution; + enum jbt_power_mode power_mode; + enum jbt_power_mode suspend_mode; + int suspended; + + struct spi_device *spi; + struct lcd_device *lcd_dev; + + unsigned long next_sleep; + struct delayed_work blank_work; + int blank_mode; + struct regulator_bulk_data supplies[2]; + uint16_t tx_buf[3]; + uint16_t reg_cache[0xEE]; +}; + +#define JBT_COMMAND 0x000 +#define JBT_DATA 0x100 + +static int jbt_reg_write_nodata(struct jbt_info *jbt, uint8_t reg) +{ + int ret; + + jbt->tx_buf[0] = JBT_COMMAND | reg; + ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf, + sizeof(uint16_t)); + if (ret == 0) + jbt->reg_cache[reg] = 0; + else + dev_err(&jbt->spi->dev, "Write failed: %d\n", ret); + + return ret; +} + + +static int jbt_reg_write(struct jbt_info *jbt, uint8_t reg, uint8_t data) +{ + int ret; + + jbt->tx_buf[0] = JBT_COMMAND | reg; + jbt->tx_buf[1] = JBT_DATA | data; + ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf, + 2*sizeof(uint16_t)); + if (ret == 0) + jbt->reg_cache[reg] = data; + else + dev_err(&jbt->spi->dev, "Write failed: %d\n", ret); + + return ret; +} + +static int jbt_reg_write16(struct jbt_info *jbt, uint8_t reg, uint16_t data) +{ + int ret; + + jbt->tx_buf[0] = JBT_COMMAND | reg; + jbt->tx_buf[1] = JBT_DATA | (data >> 8); + jbt->tx_buf[2] = JBT_DATA | (data & 0xff); + + ret = spi_write(jbt->spi, (uint8_t *)jbt->tx_buf, + 3*sizeof(uint16_t)); + if (ret == 0) + jbt->reg_cache[reg] = data; + else + dev_err(&jbt->spi->dev, "Write failed: %d\n", ret); + + return ret; +} + +static int jbt_init_regs(struct jbt_info *jbt) +{ + int ret; + + dev_dbg(&jbt->spi->dev, "entering %cVGA mode\n", + jbt->resolution == JBT_RESOLUTION_QVGA ? 'Q' : ' '); + + ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01); + ret |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00); + ret |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60); + ret |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10); + ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56); + ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33); + ret |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11); + ret |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02); + ret |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b); + ret |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40); + ret |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03); + ret |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04); + /* + * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement + * to avoid red / blue flicker + */ + ret |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x00 | (1 << 5)); + ret |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00); + + ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11); + ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11); + ret |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11); + ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040); + ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0); + ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020); + ret |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0); + + ret |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533); + ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00); + ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00); + ret |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00); + + if (jbt->resolution != JBT_RESOLUTION_QVGA) { + ret |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0); + ret |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02); + ret |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804); + + ret |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01); + ret |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000); + + ret |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e); + ret |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4); + ret |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e); + } else { + ret |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff); + ret |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02); + ret |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804); + + ret |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01); + ret |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008); + + ret |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a); + ret |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19); + ret |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a); + } + + return ret ? -EIO : 0; +} + +static int jbt_standby_to_sleep(struct jbt_info *jbt) +{ + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(jbt->supplies), jbt->supplies); + + /* three times command zero */ + ret |= jbt_reg_write_nodata(jbt, 0x00); + mdelay(1); + ret |= jbt_reg_write_nodata(jbt, 0x00); + mdelay(1); + ret |= jbt_reg_write_nodata(jbt, 0x00); + mdelay(1); + + /* deep standby out */ + ret |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x11); + mdelay(1); + ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x28); + + /* (re)initialize register set */ + ret |= jbt_init_regs(jbt); + + return ret ? -EIO : 0; +} + +static int jbt_sleep_to_normal(struct jbt_info *jbt) +{ + int ret; + + /* Make sure we are 120 ms after SLEEP_OUT */ + if (time_before(jiffies, jbt->next_sleep)) + mdelay(jiffies_to_msecs(jbt->next_sleep - jiffies)); + + if (jbt->resolution == JBT_RESOLUTION_VGA) { + /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */ + ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80); + + /* Quad mode off */ + ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00); + } else { + /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */ + ret = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81); + + /* Quad mode on */ + ret |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22); + } + + /* AVDD on, XVDD on */ + ret |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16); + + /* Output control */ + ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xdff9); + + /* Turn on display */ + ret |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON); + + /* Sleep mode off */ + ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT); + jbt->next_sleep = jiffies + msecs_to_jiffies(120); + + /* Allow the booster and display controller to restart stably */ + mdelay(5); + + return ret ? -EIO : 0; +} + +static int jbt_normal_to_sleep(struct jbt_info *jbt) +{ + int ret; + + /* Make sure we are 120 ms after SLEEP_OUT */ + while (time_before(jiffies, jbt->next_sleep)) + cpu_relax(); + + ret = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF); + ret |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8000 | 1 << 3); + ret |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN); + jbt->next_sleep = jiffies + msecs_to_jiffies(120); + + /* Allow the internal circuits to stop automatically */ + mdelay(5); + + return ret ? -EIO : 0; +} + +static int jbt_sleep_to_standby(struct jbt_info *jbt) +{ + int ret; + ret = jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00); + ret |= regulator_bulk_disable(ARRAY_SIZE(jbt->supplies), jbt->supplies); + + return ret; +} + +static int jbt6k74_enter_power_mode(struct jbt_info *jbt, + enum jbt_power_mode new_mode) +{ + struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data; + int ret = -EINVAL; + + dev_dbg(&jbt->spi->dev, "entering (old_state=%s, new_state=%s)\n", + jbt_power_mode_names[jbt->power_mode], + jbt_power_mode_names[new_mode]); + + mutex_lock(&jbt->lock); + + if (jbt->suspended) { + switch (new_mode) { + case JBT_POWER_MODE_DEEP_STANDBY: + case JBT_POWER_MODE_SLEEP: + case JBT_POWER_MODE_NORMAL: + ret = 0; + jbt->suspend_mode = new_mode; + break; + default: + break; + } + } else if (new_mode == JBT_POWER_MODE_NORMAL && + pdata->enable_pixel_clock) { + pdata->enable_pixel_clock(&jbt->spi->dev, 1); + } + + switch (jbt->power_mode) { + case JBT_POWER_MODE_DEEP_STANDBY: + switch (new_mode) { + case JBT_POWER_MODE_DEEP_STANDBY: + ret = 0; + break; + case JBT_POWER_MODE_SLEEP: + ret = jbt_standby_to_sleep(jbt); + break; + case JBT_POWER_MODE_NORMAL: + /* first transition into sleep */ + ret = jbt_standby_to_sleep(jbt); + /* then transition into normal */ + ret |= jbt_sleep_to_normal(jbt); + break; + } + break; + case JBT_POWER_MODE_SLEEP: + switch (new_mode) { + case JBT_POWER_MODE_SLEEP: + ret = 0; + break; + case JBT_POWER_MODE_DEEP_STANDBY: + ret = jbt_sleep_to_standby(jbt); + break; + case JBT_POWER_MODE_NORMAL: + ret = jbt_sleep_to_normal(jbt); + break; + } + break; + case JBT_POWER_MODE_NORMAL: + switch (new_mode) { + case JBT_POWER_MODE_NORMAL: + ret = 0; + break; + case JBT_POWER_MODE_DEEP_STANDBY: + /* first transition into sleep */ + ret = jbt_normal_to_sleep(jbt); + /* then transition into deep standby */ + ret |= jbt_sleep_to_standby(jbt); + break; + case JBT_POWER_MODE_SLEEP: + ret = jbt_normal_to_sleep(jbt); + break; + } + } + + if (ret == 0) { + jbt->power_mode = new_mode; + if (new_mode != JBT_POWER_MODE_NORMAL && + pdata->enable_pixel_clock) + pdata->enable_pixel_clock(&jbt->spi->dev, 0); + } else { + dev_err(&jbt->spi->dev, "Failed enter state '%s')\n", + jbt_power_mode_names[new_mode]); + } + + mutex_unlock(&jbt->lock); + + return ret; +} + +static int jbt6k74_set_resolution(struct jbt_info *jbt, + enum jbt_resolution new_resolution) +{ + int ret = 0; + enum jbt_resolution old_resolution; + + mutex_lock(&jbt->lock); + + if (jbt->resolution == new_resolution) + goto out_unlock; + + old_resolution = jbt->resolution; + jbt->resolution = new_resolution; + + if (jbt->power_mode == JBT_POWER_MODE_NORMAL) { + + /* first transition into sleep */ + ret = jbt_normal_to_sleep(jbt); + ret |= jbt_sleep_to_normal(jbt); + + if (ret) { + jbt->resolution = old_resolution; + dev_err(&jbt->spi->dev, "Failed to set resolution '%s')\n", + jbt_resolution_names[new_resolution]); + } + } + +out_unlock: + mutex_unlock(&jbt->lock); + + return ret; +} + +static ssize_t resolution_read(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct jbt_info *jbt = dev_get_drvdata(dev); + + if (jbt->resolution >= ARRAY_SIZE(jbt_resolution_names)) + return -EIO; + + return sprintf(buf, "%s\n", jbt_resolution_names[jbt->resolution]); +} + +static ssize_t resolution_write(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct jbt_info *jbt = dev_get_drvdata(dev); + int i, ret; + + for (i = 0; i < ARRAY_SIZE(jbt_resolution_names); i++) { + if (!strncmp(buf, jbt_resolution_names[i], + strlen(jbt_resolution_names[i]))) { + ret = jbt6k74_set_resolution(jbt, i); + if (ret) + return ret; + return count; + } + } + + return -EINVAL; +} + +static DEVICE_ATTR(resolution, 0644, resolution_read, resolution_write); + +static int reg_by_string(const char *name) +{ + if (!strcmp(name, "gamma_fine1")) + return JBT_REG_GAMMA1_FINE_1; + else if (!strcmp(name, "gamma_fine2")) + return JBT_REG_GAMMA1_FINE_2; + else if (!strcmp(name, "gamma_inclination")) + return JBT_REG_GAMMA1_INCLINATION; + else + return JBT_REG_GAMMA1_BLUE_OFFSET; +} + +static ssize_t gamma_read(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct jbt_info *jbt = dev_get_drvdata(dev); + int reg = reg_by_string(attr->attr.name); + uint16_t val; + + mutex_lock(&jbt->lock); + val = jbt->reg_cache[reg]; + mutex_unlock(&jbt->lock); + + return sprintf(buf, "0x%04x\n", val); +} + +static ssize_t gamma_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + struct jbt_info *jbt = dev_get_drvdata(dev); + int reg = reg_by_string(attr->attr.name); + unsigned long val; + + ret = strict_strtoul(buf, 10, &val); + if (ret) + return ret; + + mutex_lock(&jbt->lock); + jbt_reg_write(jbt, reg, val & 0xff); + mutex_unlock(&jbt->lock); + + return count; +} + +static ssize_t reset_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + struct jbt_info *jbt = dev_get_drvdata(dev); + struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data; + enum jbt_power_mode old_power_mode = jbt->power_mode; + + mutex_lock(&jbt->lock); + + if (gpio_is_valid(pdata->gpio_reset)) { + /* hard reset the jbt6k74 */ + gpio_set_value_cansleep(pdata->gpio_reset, 0); + mdelay(120); + gpio_set_value_cansleep(pdata->gpio_reset, 1); + mdelay(120); + } + + ret = jbt_reg_write_nodata(jbt, 0x01); + if (ret < 0) + dev_err(&jbt->spi->dev, "cannot soft reset\n"); + mdelay(120); + + mutex_unlock(&jbt->lock); + + jbt->power_mode = JBT_POWER_MODE_DEEP_STANDBY; + jbt6k74_enter_power_mode(jbt, old_power_mode); + + return count; +} + +static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write); +static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write); +static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write); +static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write); +static DEVICE_ATTR(reset, 0600, NULL, reset_write); + +static struct attribute *jbt_sysfs_entries[] = { + &dev_attr_resolution.attr, + &dev_attr_gamma_fine1.attr, + &dev_attr_gamma_fine2.attr, + &dev_attr_gamma_inclination.attr, + &dev_attr_gamma_blue_offset.attr, + &dev_attr_reset.attr, + NULL, +}; + +static struct attribute_group jbt_attr_group = { + .name = NULL, + .attrs = jbt_sysfs_entries, +}; + +/* FIXME: This in an ugly hack to delay display blanking. + When the jbt is in sleep mode it displays an all white screen and thus one + will a see a short flash. + By delaying the blanking we will give the backlight a chance to turn off and + thus avoid getting the flash */ +static void jbt_blank_worker(struct work_struct *work) +{ + struct jbt_info *jbt = container_of(work, struct jbt_info, + blank_work.work); + + switch (jbt->blank_mode) { + case FB_BLANK_NORMAL: + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_SLEEP); + break; + case FB_BLANK_POWERDOWN: + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_DEEP_STANDBY); + break; + default: + break; + } +} + +static int jbt6k74_set_mode(struct lcd_device *ld, struct fb_videomode *m) +{ + int ret = -EINVAL; + struct jbt_info *jbt = dev_get_drvdata(&ld->dev); + + if (m->xres == 240 && m->yres == 320) { + ret = jbt6k74_set_resolution(jbt, JBT_RESOLUTION_QVGA); + } else if (m->xres == 480 && m->yres == 640) { + ret = jbt6k74_set_resolution(jbt, JBT_RESOLUTION_VGA); + } else { + dev_err(&jbt->spi->dev, "Unknown resolution.\n"); + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_SLEEP); + } + + return ret; +} + +static int jbt6k74_set_power(struct lcd_device *ld, int power) +{ + int ret = -EINVAL; + struct jbt_info *jbt = dev_get_drvdata(&ld->dev); + + jbt->blank_mode = power; + cancel_rearming_delayed_work(&jbt->blank_work); + + switch (power) { + case FB_BLANK_UNBLANK: + dev_dbg(&jbt->spi->dev, "unblank\n"); + ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL); + break; + case FB_BLANK_NORMAL: + dev_dbg(&jbt->spi->dev, "blank\n"); + ret = schedule_delayed_work(&jbt->blank_work, HZ); + break; + case FB_BLANK_POWERDOWN: + dev_dbg(&jbt->spi->dev, "powerdown\n"); + ret = schedule_delayed_work(&jbt->blank_work, HZ); + break; + default: + break; + } + + return ret; +} + +static int jbt6k74_get_power(struct lcd_device *ld) +{ + struct jbt_info *jbt = dev_get_drvdata(&ld->dev); + + switch (jbt->power_mode) { + case JBT_POWER_MODE_NORMAL: + return FB_BLANK_UNBLANK; + case JBT_POWER_MODE_SLEEP: + return FB_BLANK_NORMAL; + default: + return JBT_POWER_MODE_DEEP_STANDBY; + } +} + +struct lcd_ops jbt6k74_lcd_ops = { + .set_power = jbt6k74_set_power, + .get_power = jbt6k74_get_power, + .set_mode = jbt6k74_set_mode, +}; + +/* linux device model infrastructure */ + +static int __devinit jbt_probe(struct spi_device *spi) +{ + int ret; + struct jbt_info *jbt; + struct jbt6k74_platform_data *pdata = spi->dev.platform_data; + + /* the controller doesn't have a MISO pin; we can't do detection */ + + spi->mode = SPI_CPOL | SPI_CPHA; + spi->bits_per_word = 9; + + ret = spi_setup(spi); + if (ret < 0) { + dev_err(&spi->dev, + "Failed to setup spi\n"); + return ret; + } + + jbt = kzalloc(sizeof(*jbt), GFP_KERNEL); + if (!jbt) + return -ENOMEM; + + jbt->spi = spi; + + jbt->lcd_dev = lcd_device_register("jbt6k74-lcd", &spi->dev, jbt, + &jbt6k74_lcd_ops); + + if (IS_ERR(jbt->lcd_dev)) { + ret = PTR_ERR(jbt->lcd_dev); + goto err_free_drvdata; + } + + INIT_DELAYED_WORK(&jbt->blank_work, jbt_blank_worker); + + jbt->resolution = JBT_RESOLUTION_VGA; + jbt->power_mode = JBT_POWER_MODE_DEEP_STANDBY; + jbt->next_sleep = jiffies + msecs_to_jiffies(120); + mutex_init(&jbt->lock); + + dev_set_drvdata(&spi->dev, jbt); + + jbt->supplies[0].supply = "VDC"; + jbt->supplies[1].supply = "VDDIO"; + + ret = regulator_bulk_get(NULL, ARRAY_SIZE(jbt->supplies), + jbt->supplies); + if (ret) { + dev_err(&spi->dev, "Failed to power get supplies: %d\n", ret); + goto err_unregister_lcd; + } + + if (gpio_is_valid(pdata->gpio_reset)) { + ret = gpio_request(pdata->gpio_reset, "jbt6k74 reset"); + if (ret) { + dev_err(&spi->dev, "Failed to request reset gpio: %d\n", + ret); + goto err_free_supplies; + } + + ret = gpio_direction_output(pdata->gpio_reset, 1); + if (ret) { + dev_err(&spi->dev, "Failed to set reset gpio direction: %d\n", + ret); + goto err_gpio_free; + } + } + + ret = jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL); + if (ret < 0) { + dev_err(&spi->dev, "cannot enter NORMAL state\n"); + goto err_gpio_free; + } + + ret = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group); + if (ret < 0) { + dev_err(&spi->dev, "cannot create sysfs group\n"); + goto err_standby; + } + + + if (pdata->probe_completed) + (pdata->probe_completed)(&spi->dev); + + return 0; + +err_standby: + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_DEEP_STANDBY); +err_gpio_free: + gpio_free(pdata->gpio_reset); +err_free_supplies: + regulator_bulk_free(ARRAY_SIZE(jbt->supplies), jbt->supplies); +err_unregister_lcd: + lcd_device_unregister(jbt->lcd_dev); +err_free_drvdata: + dev_set_drvdata(&spi->dev, NULL); + kfree(jbt); + + return ret; +} + +static int __devexit jbt_remove(struct spi_device *spi) +{ + struct jbt_info *jbt = dev_get_drvdata(&spi->dev); + struct jbt6k74_platform_data *pdata = jbt->spi->dev.platform_data; + + /* We don't want to switch off the display in case the user + * accidentially unloads the module (whose use count normally is 0) */ + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_NORMAL); + + sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group); + + if (gpio_is_valid(pdata->gpio_reset)) + gpio_free(pdata->gpio_reset); + + lcd_device_unregister(jbt->lcd_dev); + + dev_set_drvdata(&spi->dev, NULL); + + regulator_bulk_free(ARRAY_SIZE(jbt->supplies), jbt->supplies); + kfree(jbt); + + return 0; +} + +#ifdef CONFIG_PM +static int jbt_suspend(struct spi_device *spi, pm_message_t state) +{ + struct jbt_info *jbt = dev_get_drvdata(&spi->dev); + + jbt->suspend_mode = jbt->power_mode; + + jbt6k74_enter_power_mode(jbt, JBT_POWER_MODE_DEEP_STANDBY); + jbt->suspended = 1; + + dev_info(&spi->dev, "suspended\n"); + + return 0; +} + +int jbt6k74_resume(struct spi_device *spi) +{ + struct jbt_info *jbt = dev_get_drvdata(&spi->dev); + dev_info(&spi->dev, "starting resume: %d\n", jbt->suspend_mode); + + mdelay(20); + + jbt->suspended = 0; + jbt6k74_enter_power_mode(jbt, jbt->suspend_mode); + + dev_info(&spi->dev, "resumed: %d\n", jbt->suspend_mode); + + return 0; +} +EXPORT_SYMBOL_GPL(jbt6k74_resume); + +#else +#define jbt_suspend NULL +#define jbt6k74_resume NULL +#endif + +static struct spi_driver jbt6k74_driver = { + .driver = { + .name = "jbt6k74", + .owner = THIS_MODULE, + }, + + .probe = jbt_probe, + .remove = __devexit_p(jbt_remove), + .suspend = jbt_suspend, + .resume = jbt6k74_resume, +}; + +static int __init jbt_init(void) +{ + return spi_register_driver(&jbt6k74_driver); +} +module_init(jbt_init); + +static void __exit jbt_exit(void) +{ + spi_unregister_driver(&jbt6k74_driver); +} +module_exit(jbt_exit); + +MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface"); +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index b1ccc04f3c9..618cc10acc6 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -154,6 +154,13 @@ config S3C2410_WATCHDOG The driver can be built as a module by choosing M, and will be called s3c2410_wdt +config PCF50606_WATCHDOG + depends on MFD_PCF50606 + tristate "Philips PCF50606 watchdog" + help + If you say yes here you get support for the Philips PCF50606 + PMU's watchdog. + config SA1100_WATCHDOG tristate "SA1100/PXA2xx watchdog" depends on ARCH_SA1100 || ARCH_PXA diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 3d774294a2b..638e1c1d743 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o obj-$(CONFIG_S3C2410_WATCHDOG) += s3c2410_wdt.o +obj-$(CONFIG_PCF50606_WATCHDOG) += pcf50606_wdt.o obj-$(CONFIG_SA1100_WATCHDOG) += sa1100_wdt.o obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o diff --git a/drivers/watchdog/pcf50606_wdt.c b/drivers/watchdog/pcf50606_wdt.c new file mode 100644 index 00000000000..6a53c664b21 --- /dev/null +++ b/drivers/watchdog/pcf50606_wdt.c @@ -0,0 +1,216 @@ +/* Philips PCF50606 Watchdog Timer Driver + * + * (C) 2006-2008 by Openmoko, Inc. + * Author: Balaji Rao <balajirrao@openmoko.org> + * All rights reserved. + * + * Broken down from monstrous PCF50606 driver mainly by + * Harald Welte, Matt Hsu, Andy Green and Werner Almesberger + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/device.h> +#include <linux/rtc.h> +#include <linux/bcd.h> +#include <linux/err.h> +#include <linux/miscdevice.h> +#include <linux/watchdog.h> +#include <linux/platform_device.h> + +#include <linux/mfd/pcf50606/core.h> + +static struct pcf50606 *pcf = NULL; +static unsigned long wdt_status; + +#define WDT_IN_USE 0 +#define WDT_OK_TO_CLOSE 1 +#define WDT_REGION_INITED 2 +#define WDT_DEVICE_INITED 3 + +static int allow_close; +#define CLOSE_STATE_NOT 0x0000 +#define CLOSE_STATE_ALLOW 0x2342 + +#define PCF50606_REG_OOCC1 0x08 +#define PCF50606_REG_OOCS 0x01 + +#define PCF50606_OOCS_WDTEXP 0x80 +#define PCF50606_OOCC1_WDTRST 0x08 + +static void pcf50606_wdt_start(void) +{ + pcf50606_reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, PCF50606_OOCC1_WDTRST, + PCF50606_OOCC1_WDTRST); +} + +static void pcf50606_wdt_stop(void) +{ + pcf50606_reg_clear_bits(pcf, PCF50606_REG_OOCS, PCF50606_OOCS_WDTEXP); +} + +static void pcf50606_wdt_keepalive(void) +{ + pcf50606_wdt_start(); +} + +static int pcf50606_wdt_open(struct inode *inode, struct file *file) +{ + if (test_and_set_bit(WDT_IN_USE, &wdt_status)) + return -EBUSY; + + pcf50606_wdt_start(); + + return nonseekable_open(inode, file); +} + +static int pcf50606_wdt_release(struct inode *inode, struct file *file) +{ + if (allow_close == CLOSE_STATE_ALLOW) + pcf50606_wdt_stop(); + else { + printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n"); + pcf50606_wdt_keepalive(); + } + + allow_close = CLOSE_STATE_NOT; + clear_bit(WDT_IN_USE, &wdt_status); + + return 0; +} + +static ssize_t pcf50606_wdt_write(struct file *file, const char __user *data, + size_t len, loff_t *ppos) +{ + if (len) { + size_t i; + + for (i = 0; i != len; i++) { + char c; + if (get_user(c, data + i)) + return -EFAULT; + if (c == 'V') + allow_close = CLOSE_STATE_ALLOW; + } + pcf50606_wdt_keepalive(); + } + + return len; +} + +static struct watchdog_info pcf50606_wdt_ident = { + .options = WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = "PCF50606 Watchdog", +}; + +static int pcf50606_wdt_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + void __user *argp = (void __user *)arg; + int __user *p = argp; + + switch (cmd) { + case WDIOC_GETSUPPORT: + return copy_to_user(argp, &pcf50606_wdt_ident, + sizeof(pcf50606_wdt_ident)) ? -EFAULT : 0; + break; + case WDIOC_GETSTATUS: + case WDIOC_GETBOOTSTATUS: + return put_user(0, p); + case WDIOC_KEEPALIVE: + pcf50606_wdt_keepalive(); + return 0; + case WDIOC_GETTIMEOUT: + return put_user(8, p); + default: + return -ENOIOCTLCMD; + } +} + +static struct file_operations pcf50606_wdt_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .write = &pcf50606_wdt_write, + .ioctl = &pcf50606_wdt_ioctl, + .open = &pcf50606_wdt_open, + .release = &pcf50606_wdt_release, +}; + +static struct miscdevice pcf50606_wdt_miscdev = { + .minor = WATCHDOG_MINOR, + .name = "watchdog", + .fops = &pcf50606_wdt_fops, +}; + +static void pcf50606_wdt_irq(int irq, void *unused) +{ + pcf50606_reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, + PCF50606_OOCC1_WDTRST, + PCF50606_OOCC1_WDTRST); +} + +int __init pcf50606_wdt_probe(struct platform_device *pdev) +{ + int err; + + if (pcf) { + dev_err(pcf->dev, "Only one instance of WDT supported\n"); + return -ENODEV; + } + + pcf = dev_to_pcf50606(pdev->dev.parent); + + err = misc_register(&pcf50606_wdt_miscdev); + if (err) { + dev_err(&pdev->dev, "cannot register miscdev on " + "minor=%d (%d)\n", WATCHDOG_MINOR, err); + return err; + } + set_bit(WDT_DEVICE_INITED, &wdt_status); + + pcf50606_register_irq(pcf, PCF50606_IRQ_CHGWD10S, pcf50606_wdt_irq, NULL); + + return 0; +} + +static int __devexit pcf50606_wdt_remove(struct platform_device *pdev) +{ + pcf50606_free_irq(pcf, PCF50606_IRQ_CHGWD10S); + misc_deregister(&pcf50606_wdt_miscdev); + pcf = NULL; + + return 0; +} + +struct platform_driver pcf50606_wdt_driver = { + .driver = { + .name = "pcf50606-wdt", + }, + .probe = pcf50606_wdt_probe, + .remove = __devexit_p(pcf50606_wdt_remove), +}; + +static int __init pcf50606_wdt_init(void) +{ + return platform_driver_register(&pcf50606_wdt_driver); +} +module_init(pcf50606_wdt_init); + +static void __exit pcf50606_wdt_exit(void) +{ + platform_driver_unregister(&pcf50606_wdt_driver); +} +module_exit(pcf50606_wdt_exit); + +MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>"); +MODULE_DESCRIPTION("PCF50606 wdt driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pcf50606-wdt"); + |