diff options
Diffstat (limited to 'include/asm-arm/arch-pxa')
| -rw-r--r-- | include/asm-arm/arch-pxa/idp.h | 10 | ||||
| -rw-r--r-- | include/asm-arm/arch-pxa/pcm990_baseboard.h | 14 |
2 files changed, 12 insertions, 12 deletions
diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h index b6952534a4e..21aa8ac35c1 100644 --- a/include/asm-arm/arch-pxa/idp.h +++ b/include/asm-arm/arch-pxa/idp.h @@ -138,18 +138,18 @@ #define TOUCH_PANEL_IRQ IRQ_GPIO(5) #define IDE_IRQ IRQ_GPIO(21) -#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING +#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING #define ETHERNET_IRQ IRQ_GPIO(4) -#define ETHERNET_IRQ_EDGE IRQT_RISING +#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define IDE_IRQ_EDGE IRQT_RISING +#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCMCIA_S0_CD_VALID IRQ_GPIO(7) -#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE +#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH #define PCMCIA_S1_CD_VALID IRQ_GPIO(8) -#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE +#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH #define PCMCIA_S0_RDYINT IRQ_GPIO(19) #define PCMCIA_S1_RDYINT IRQ_GPIO(22) diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h index b699d0d7bdb..2e201317906 100644 --- a/include/asm-arm/arch-pxa/pcm990_baseboard.h +++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h @@ -29,14 +29,14 @@ /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ #define PCM990_CTRL_INT_IRQ_GPIO 9 #define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) -#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING +#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ #define PCM990_CTRL_BASE 0xea000000 #define PCM990_CTRL_SIZE (1*1024*1024) #define PCM990_CTRL_PWR_IRQ_GPIO 14 #define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) -#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING +#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING /* visible CPLD (U7) registers */ #define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ @@ -133,7 +133,7 @@ */ #define PCM990_IDE_IRQ_GPIO 13 #define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) -#define PCM990_IDE_IRQ_EDGE IRQT_RISING +#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ #define PCM990_IDE_PLD_BASE 0xee000000 #define PCM990_IDE_PLD_SIZE (1*1024*1024) @@ -189,11 +189,11 @@ */ #define PCM990_CF_IRQ_GPIO 11 #define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) -#define PCM990_CF_IRQ_EDGE IRQT_RISING +#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CF_CD_GPIO 12 #define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) -#define PCM990_CF_CD_EDGE IRQT_RISING +#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ #define PCM990_CF_PLD_BASE 0xef000000 @@ -259,14 +259,14 @@ */ #define PCM990_AC97_IRQ_GPIO 10 #define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) -#define PCM990_AC97_IRQ_EDGE IRQT_RISING +#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING /* * MMC phyCORE */ #define PCM990_MMC0_IRQ_GPIO 9 #define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) -#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING +#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING /* * USB phyCore |