diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/fb.h | 42 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/irqs.h | 7 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpio.h | 10 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-power.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-s3c2412.h | 2 |
5 files changed, 47 insertions, 19 deletions
diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h index 93a58e7862b..5d0262601a7 100644 --- a/include/asm-arm/arch-s3c2410/fb.h +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -14,12 +14,6 @@ #include <asm/arch/regs-lcd.h> -struct s3c2410fb_val { - unsigned int defval; - unsigned int min; - unsigned int max; -}; - struct s3c2410fb_hw { unsigned long lcdcon1; unsigned long lcdcon2; @@ -28,23 +22,37 @@ struct s3c2410fb_hw { unsigned long lcdcon5; }; -struct s3c2410fb_mach_info { - unsigned char fixed_syncs; /* do not update sync/border */ - - /* LCD types */ - int type; +/* LCD description */ +struct s3c2410fb_display { + /* LCD type */ + unsigned type; /* Screen size */ - int width; - int height; + unsigned short width; + unsigned short height; /* Screen info */ - struct s3c2410fb_val xres; - struct s3c2410fb_val yres; - struct s3c2410fb_val bpp; + unsigned short xres; + unsigned short yres; + unsigned short bpp; + + unsigned pixclock; /* pixclock in picoseconds */ + unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ + unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ + unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ + unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ + unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ + unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ /* lcd configuration registers */ - struct s3c2410fb_hw regs; + unsigned long lcdcon5; +}; + +struct s3c2410fb_mach_info { + + struct s3c2410fb_display *displays; /* attached diplays info */ + unsigned num_displays; /* number of defined displays */ + unsigned default_display; /* GPIOs */ diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 3b49cd1c345..996f65488d2 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -112,6 +112,13 @@ #define IRQ_TC S3C2410_IRQSUB(9) #define IRQ_ADC S3C2410_IRQSUB(10) +/* extra irqs for s3c2412 */ + +#define IRQ_S3C2412_CFSDI S3C2410_IRQ(21) + +#define IRQ_S3C2412_SDI S3C2410_IRQSUB(13) +#define IRQ_S3C2412_CF S3C2410_IRQSUB(14) + /* extra irqs for s3c2440 */ #define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index dea578b8f7f..b693158b2d3 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -1140,10 +1140,16 @@ /* definitions for each pin bit */ #define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) -#define S3C2412_SLPCON_HI(x) ( 0x01 << ((x) * 2)) +#define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) #define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) -#define S3C2412_SLPCON_PDWN(x) ( 0x03 << ((x) * 2)) +#define S3C2412_SLPCON_PULL(x) ( 0x03 << ((x) * 2)) +#define S3C2412_SLPCON_EINT(x) ( 0x02 << ((x) * 2)) /* only IRQ pins */ #define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) +#define S3C2412_SLPCON_ALL_LOW (0x0) +#define S3C2412_SLPCON_ALL_HIGH (0x11111111 | 0x44444444) +#define S3C2412_SLPCON_ALL_IN (0x22222222 | 0x88888888) +#define S3C2412_SLPCON_ALL_PULL (0x33333333) + #endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h index 94ff96505b6..f79987be55e 100644 --- a/include/asm-arm/arch-s3c2410/regs-power.h +++ b/include/asm-arm/arch-s3c2410/regs-power.h @@ -18,6 +18,11 @@ #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) +#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) +#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) +#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) +#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) + #define S3C2412_PWRCFG_BATF_IGNORE (0<<0) #define S3C2412_PWRCFG_BATF_SLEEP (3<<0) #define S3C2412_PWRCFG_BATF_MASK (3<<0) diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h index 8ca6a3bc855..783b18f5bce 100644 --- a/include/asm-arm/arch-s3c2410/regs-s3c2412.h +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h @@ -17,5 +17,7 @@ #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) #define S3C2412_SWRST_RESET (0x533C2412) +/* see regs-power.h for the other registers in the power block. */ + #endif /* __ASM_ARCH_REGS_S3C2412_H */ |