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-rw-r--r--include/asm-arm/arch-pxa/irqs.h5
-rw-r--r--include/asm-arm/arch-pxa/magician.h49
-rw-r--r--include/asm-arm/arch-pxa/pxa3xx_nand.h18
-rw-r--r--include/asm-arm/arch-pxa/system.h2
-rw-r--r--include/asm-arm/arch-sa1100/ide.h6
-rw-r--r--include/asm-arm/plat-s3c/nand.h5
6 files changed, 32 insertions, 53 deletions
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index 50c77eacbd5..b6c8fe37768 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -239,7 +239,7 @@
/* ITE8152 irqs */
/* add IT8152 IRQs beyond BOARD_END */
#ifdef CONFIG_PCI_HOST_ITE8152
-#define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x))
+#define IT8152_IRQ(x) (IRQ_BOARD_END + (x))
/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
#define IT8152_LD_IRQ_COUNT 9
@@ -253,6 +253,9 @@
#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
+#if NR_IRQS < (IT8152_LAST_IRQ+1)
#undef NR_IRQS
#define NR_IRQS (IT8152_LAST_IRQ+1)
#endif
+
+#endif /* CONFIG_PCI_HOST_ITE8152 */
diff --git a/include/asm-arm/arch-pxa/magician.h b/include/asm-arm/arch-pxa/magician.h
index b34fd5683e2..169b374f992 100644
--- a/include/asm-arm/arch-pxa/magician.h
+++ b/include/asm-arm/arch-pxa/magician.h
@@ -13,7 +13,6 @@
#define _MAGICIAN_H_
#include <asm/arch/irqs.h>
-#include <asm/arch/pxa2xx-gpio.h>
/*
* PXA GPIOs
@@ -64,54 +63,6 @@
#define GPIO120_MAGICIAN_UNKNOWN 120
/*
- * PXA GPIO alternate function mode & direction
- */
-
-#define GPIO0_MAGICIAN_KEY_POWER_MD (0 | GPIO_IN)
-#define GPIO9_MAGICIAN_UNKNOWN_MD (9 | GPIO_IN)
-#define GPIO10_MAGICIAN_GSM_IRQ_MD (10 | GPIO_IN)
-#define GPIO11_MAGICIAN_GSM_OUT1_MD (11 | GPIO_OUT)
-#define GPIO13_MAGICIAN_CPLD_IRQ_MD (13 | GPIO_IN)
-#define GPIO18_MAGICIAN_UNKNOWN_MD (18 | GPIO_OUT)
-#define GPIO22_MAGICIAN_VIBRA_EN_MD (22 | GPIO_OUT)
-#define GPIO26_MAGICIAN_GSM_POWER_MD (26 | GPIO_OUT)
-#define GPIO27_MAGICIAN_USBC_PUEN_MD (27 | GPIO_OUT)
-#define GPIO30_MAGICIAN_nCHARGE_EN_MD (30 | GPIO_OUT)
-#define GPIO37_MAGICIAN_KEY_HANGUP_MD (37 | GPIO_OUT)
-#define GPIO38_MAGICIAN_KEY_CONTACTS_MD (38 | GPIO_OUT)
-#define GPIO40_MAGICIAN_GSM_OUT2_MD (40 | GPIO_OUT)
-#define GPIO48_MAGICIAN_UNKNOWN_MD (48 | GPIO_OUT)
-#define GPIO56_MAGICIAN_UNKNOWN_MD (56 | GPIO_OUT)
-#define GPIO57_MAGICIAN_CAM_RESET_MD (57 | GPIO_OUT)
-#define GPIO75_MAGICIAN_SAMSUNG_POWER_MD (75 | GPIO_OUT)
-#define GPIO83_MAGICIAN_nIR_EN_MD (83 | GPIO_OUT)
-#define GPIO86_MAGICIAN_GSM_RESET_MD (86 | GPIO_OUT)
-#define GPIO87_MAGICIAN_GSM_SELECT_MD (87 | GPIO_OUT)
-#define GPIO90_MAGICIAN_KEY_CALENDAR_MD (90 | GPIO_OUT)
-#define GPIO91_MAGICIAN_KEY_CAMERA_MD (91 | GPIO_OUT)
-#define GPIO93_MAGICIAN_KEY_UP_MD (93 | GPIO_IN)
-#define GPIO94_MAGICIAN_KEY_DOWN_MD (94 | GPIO_IN)
-#define GPIO95_MAGICIAN_KEY_LEFT_MD (95 | GPIO_IN)
-#define GPIO96_MAGICIAN_KEY_RIGHT_MD (96 | GPIO_IN)
-#define GPIO97_MAGICIAN_KEY_ENTER_MD (97 | GPIO_IN)
-#define GPIO98_MAGICIAN_KEY_RECORD_MD (98 | GPIO_IN)
-#define GPIO99_MAGICIAN_HEADPHONE_IN_MD (99 | GPIO_IN)
-#define GPIO100_MAGICIAN_KEY_VOL_UP_MD (100 | GPIO_IN)
-#define GPIO101_MAGICIAN_KEY_VOL_DOWN_MD (101 | GPIO_IN)
-#define GPIO102_MAGICIAN_KEY_PHONE_MD (102 | GPIO_IN)
-#define GPIO103_MAGICIAN_LED_KP_MD (103 | GPIO_OUT)
-#define GPIO104_MAGICIAN_LCD_POWER_1_MD (104 | GPIO_OUT)
-#define GPIO105_MAGICIAN_LCD_POWER_2_MD (105 | GPIO_OUT)
-#define GPIO106_MAGICIAN_LCD_POWER_3_MD (106 | GPIO_OUT)
-#define GPIO107_MAGICIAN_DS1WM_IRQ_MD (107 | GPIO_IN)
-#define GPIO108_MAGICIAN_GSM_READY_MD (108 | GPIO_IN)
-#define GPIO114_MAGICIAN_UNKNOWN_MD (114 | GPIO_OUT)
-#define GPIO115_MAGICIAN_nPEN_IRQ_MD (115 | GPIO_IN)
-#define GPIO116_MAGICIAN_nCAM_EN_MD (116 | GPIO_OUT)
-#define GPIO119_MAGICIAN_UNKNOWN_MD (119 | GPIO_OUT)
-#define GPIO120_MAGICIAN_UNKNOWN_MD (120 | GPIO_OUT)
-
-/*
* CPLD IRQs
*/
diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h
new file mode 100644
index 00000000000..81a8937486c
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa3xx_nand.h
@@ -0,0 +1,18 @@
+#ifndef __ASM_ARCH_PXA3XX_NAND_H
+#define __ASM_ARCH_PXA3XX_NAND_H
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+struct pxa3xx_nand_platform_data {
+
+ /* the data flash bus is shared between the Static Memory
+ * Controller and the Data Flash Controller, the arbiter
+ * controls the ownership of the bus
+ */
+ int enable_arbiter;
+
+ struct mtd_partition *parts;
+ unsigned int nr_parts;
+};
+#endif /* __ASM_ARCH_PXA3XX_NAND_H */
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h
index 1d56a3ef89f..a758a719180 100644
--- a/include/asm-arm/arch-pxa/system.h
+++ b/include/asm-arm/arch-pxa/system.h
@@ -22,6 +22,8 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
+ RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
if (mode == 's') {
/* Jump into ROM at address 0 */
cpu_reset(0);
diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h
index 98b10bcf9f1..b14cbda01dc 100644
--- a/include/asm-arm/arch-sa1100/ide.h
+++ b/include/asm-arm/arch-sa1100/ide.h
@@ -37,12 +37,12 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
memset(hw, 0, sizeof(*hw));
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
+ for (i = 0; i <= 7; i++) {
+ hw->io_ports_array[i] = reg;
reg += regincr;
}
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+ hw->io_ports.ctl_addr = ctrl_port;
if (irq)
*irq = 0;
diff --git a/include/asm-arm/plat-s3c/nand.h b/include/asm-arm/plat-s3c/nand.h
index 8816f7f9cee..ad6bbe90616 100644
--- a/include/asm-arm/plat-s3c/nand.h
+++ b/include/asm-arm/plat-s3c/nand.h
@@ -22,11 +22,14 @@
*/
struct s3c2410_nand_set {
+ unsigned int disable_ecc : 1;
+
int nr_chips;
int nr_partitions;
char *name;
int *nr_map;
struct mtd_partition *partitions;
+ struct nand_ecclayout *ecc_layout;
};
struct s3c2410_platform_nand {
@@ -36,6 +39,8 @@ struct s3c2410_platform_nand {
int twrph0; /* active time for nWE/nOE */
int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
+ unsigned int ignore_unset_ecc : 1;
+
int nr_sets;
struct s3c2410_nand_set *sets;
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-19 06:21:13 +0000