aboutsummaryrefslogtreecommitdiff
path: root/include/asm-blackfin/mach-bf561/cdefBF561.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-blackfin/mach-bf561/cdefBF561.h')
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 6e87ab269ff..73d4d65249c 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -83,9 +83,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
#define bfin_read_SWRST() bfin_read_SICA_SWRST()
-#define bfin_write_SWRST() bfin_write_SICA_SWRST()
+#define bfin_write_SWRST(val) bfin_write_SICA_SWRST(val)
#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
-#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
+#define bfin_write_SYSCR(val) bfin_write_SICA_SYSCR(val)
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)