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-rw-r--r--include/asm-ia64/pal.h10
-rw-r--r--include/asm-ia64/processor.h1
2 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 37e52a2836b..312109d7be9 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -78,6 +78,7 @@
#define PAL_VM_TR_READ 261 /* read contents of translation register */
#define PAL_GET_PSTATE 262 /* get the current P-state */
#define PAL_SET_PSTATE 263 /* set the P-state */
+#define PAL_BRAND_INFO 274 /* Processor branding information */
#ifndef __ASSEMBLY__
@@ -1133,6 +1134,15 @@ ia64_pal_set_pstate (u64 pstate_index)
return iprv.status;
}
+/* Processor branding information*/
+static inline s64
+ia64_pal_get_brand_info (char *brand_info)
+{
+ struct ia64_pal_retval iprv;
+ PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0);
+ return iprv.status;
+}
+
/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
* suspended, but cache and TLB coherency is maintained.
*/
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index b3bd58e8069..03100c4272c 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -164,6 +164,7 @@ struct cpuinfo_ia64 {
__u8 family;
__u8 archrev;
char vendor[16];
+ char *model_name;
#ifdef CONFIG_NUMA
struct ia64_node_data *node_data;