19 files changed, 145 insertions, 521 deletions
diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h
index 75390e0b40c..871c0d5cfc3 100644
--- a/include/asm-m68knommu/anchor.h
+++ b/include/asm-m68knommu/anchor.h
@@ -14,7 +14,7 @@
 /*
  *	Define basic addressing info.
  */
-#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407)
+#if defined(CONFIG_M5407C3)
 #define	COMEM_BASE	0xFFFF0000	/* Base of CO-MEM address space */
 #define	COMEM_IRQ	25		/* IRQ of anchor part */
 #else
@@ -96,7 +96,7 @@
  *	The PCI bus will be limited in what slots will actually be used.
  *	Define valid device numbers for different boards.
  */
-#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407)
+#if defined(CONFIG_M5407C3)
 #define	COMEM_MINDEV	14		/* Minimum valid DEVICE */
 #define	COMEM_MAXDEV	14		/* Maximum valid DEVICE */
 #define	COMEM_BRIDGEDEV	15		/* Slot bridge is in */
diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h
deleted file mode 100644
index 825f6e210f1..00000000000
--- a/include/asm-m68knommu/asm-offsets.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef __ASM_OFFSETS_H__
-#define __ASM_OFFSETS_H__
-/*
- * DO NOT MODIFY.
- *
- * This file was generated by arch/m68knommu/Makefile
- *
- */
-
-#define TASK_STATE 0 /* offsetof(struct task_struct, state) */
-#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */
-#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */
-#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */
-#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */
-#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */
-#define TASK_MM 92 /* offsetof(struct task_struct, mm) */
-#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */
-#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */
-#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */
-#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */
-#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */
-#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */
-#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */
-#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */
-#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */
-#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */
-#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */
-#define PT_D0 32 /* offsetof(struct pt_regs, d0) */
-#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */
-#define PT_D1 0 /* offsetof(struct pt_regs, d1) */
-#define PT_D2 4 /* offsetof(struct pt_regs, d2) */
-#define PT_D3 8 /* offsetof(struct pt_regs, d3) */
-#define PT_D4 12 /* offsetof(struct pt_regs, d4) */
-#define PT_D5 16 /* offsetof(struct pt_regs, d5) */
-#define PT_A0 20 /* offsetof(struct pt_regs, a0) */
-#define PT_A1 24 /* offsetof(struct pt_regs, a1) */
-#define PT_A2 28 /* offsetof(struct pt_regs, a2) */
-#define PT_PC 48 /* offsetof(struct pt_regs, pc) */
-#define PT_SR 46 /* offsetof(struct pt_regs, sr) */
-#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */
-#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */
-#define SIGSEGV 11 /* SIGSEGV */
-#define SEGV_MAPERR 196609 /* SEGV_MAPERR */
-#define SIGTRAP 5 /* SIGTRAP */
-#define TRAP_TRACE 196610 /* TRAP_TRACE */
-#define PT_PTRACED 1 /* PT_PTRACED */
-#define PT_DTRACE 2 /* PT_DTRACE */
-
-#endif
diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h
index b1957fba083..a83631ed8c8 100644
--- a/include/asm-m68knommu/atomic.h
+++ b/include/asm-m68knommu/atomic.h
@@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
 #define smp_mb__before_atomic_inc()    barrier()
 #define smp_mb__after_atomic_inc() barrier()
 
-extern __inline__ int atomic_add_return(int i, atomic_t * v)
+static inline int atomic_add_return(int i, atomic_t * v)
 {
 	unsigned long temp, flags;
 
@@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
 
 #define atomic_add_negative(a, v)	(atomic_add_return((a), (v)) < 0)
 
-extern __inline__ int atomic_sub_return(int i, atomic_t * v)
+static inline int atomic_sub_return(int i, atomic_t * v)
 {
 	unsigned long temp, flags;
 
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 1df3f666a28..6190f77b1e6 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -20,9 +20,14 @@
  */
 #define	MCF_MBAR	0x10000000
 #define	MCF_MBAR2	0x80000000
+#if defined(CONFIG_M520x)
+#define	MCF_IPSBAR	0xFC000000
+#else
 #define	MCF_IPSBAR	0x40000000
+#endif
 
-#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
+    defined(CONFIG_M520x)
 #undef MCF_MBAR
 #define	MCF_MBAR	MCF_IPSBAR
 #endif
@@ -78,7 +83,8 @@
  *	One some ColdFire family members the bus clock (used by internal
  *	peripherals) is not the same as the CPU clock.
  */
-#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x)
+#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
+    defined(CONFIG_M520x)
 #define	MCF_BUSCLK	(MCF_CLK / 2)
 #else
 #define	MCF_BUSCLK	MCF_CLK
diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h
index e3a97625467..04a20fd051c 100644
--- a/include/asm-m68knommu/delay.h
+++ b/include/asm-m68knommu/delay.h
@@ -8,7 +8,7 @@
 
 #include <asm/param.h>
 
-extern __inline__ void __delay(unsigned long loops)
+static inline void __delay(unsigned long loops)
 {
 #if defined(CONFIG_COLDFIRE)
 	/* The coldfire runs this loop at significantly different speeds
@@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops)
 
 extern unsigned long loops_per_jiffy;
 
-extern __inline__ void _udelay(unsigned long usecs)
+static inline void _udelay(unsigned long usecs)
 {
 #if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \
     defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \
diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h
deleted file mode 100644
index 836f0721ecf..00000000000
--- a/include/asm-m68knommu/ide.h
+++ /dev/null
@@ -1,437 +0,0 @@
-/****************************************************************************/
-/*
- *  linux/include/asm-m68knommu/ide.h
- *
- *  Copyright (C) 1994-1996  Linus Torvalds & authors
- *	Copyright (C) 2001       Lineo Inc., davidm@uclinux.org
- */
-/****************************************************************************/
-#ifndef _M68KNOMMU_IDE_H
-#define _M68KNOMMU_IDE_H
-
-#ifdef __KERNEL__
-/****************************************************************************/
-
-#include <linux/config.h>
-#include <linux/interrupt.h>
-
-#include <asm/setup.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
-/****************************************************************************/
-/*
- *	some coldfire specifics
- */
-
-#ifdef CONFIG_COLDFIRE
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-
-/*
- *	Save some space,  only have 1 interface
- */
-#define MAX_HWIFS		  1	/* we only have one interface for now */
-
-#ifdef CONFIG_SECUREEDGEMP3
-#define	MCFSIM_LOCALCS	  MCFSIM_CSCR4
-#else
-#define	MCFSIM_LOCALCS	  MCFSIM_CSCR6
-#endif
-
-#endif /* CONFIG_COLDFIRE */
-
-/****************************************************************************/
-/*
- *	Fix up things that may not have been provided
- */
-
-#ifndef MAX_HWIFS
-#define MAX_HWIFS	4	/* same as the other archs */
-#endif
-
-#undef SUPPORT_SLOW_DATA_PORTS
-#define SUPPORT_SLOW_DATA_PORTS 0
-
-#undef SUPPORT_VLB_SYNC
-#define SUPPORT_VLB_SYNC 0
-
-/* this definition is used only on startup .. */
-#undef HD_DATA
-#define HD_DATA NULL
-
-#define	DBGIDE(fmt,a...)
-// #define	DBGIDE(fmt,a...) printk(fmt, ##a)
-#define IDE_INLINE __inline__
-// #define IDE_INLINE
-
-/****************************************************************************/
-
-typedef union {
-	unsigned all			: 8;	/* all of the bits together */
-	struct {
-		unsigned bit7		: 1;	/* always 1 */
-		unsigned lba		: 1;	/* using LBA instead of CHS */
-		unsigned bit5		: 1;	/* always 1 */
-		unsigned unit		: 1;	/* drive select number, 0 or 1 */
-		unsigned head		: 4;	/* always zeros here */
-	} b;
-} select_t;
-
-/*
- *	our list of ports/irq's for different boards
- */
-
-static struct m68k_ide_defaults {
-	ide_ioreg_t	base;
-	int			irq;
-} m68k_ide_defaults[MAX_HWIFS] = {
-#if defined(CONFIG_SECUREEDGEMP3)
-	{ ((ide_ioreg_t)0x30800000), 29 },
-#elif defined(CONFIG_eLIA)
-	{ ((ide_ioreg_t)0x30c00000), 29 },
-#else
-	{ ((ide_ioreg_t)0x0), 0 }
-#endif
-};
-
-/****************************************************************************/
-
-static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
-{
-	int i;
-
-	for (i = 0; i < MAX_HWIFS; i++)
-		if (m68k_ide_defaults[i].base == base)
-			return(m68k_ide_defaults[i].irq);
-	return 0;
-}
-
-static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
-{
-	if (index >= 0 && index < MAX_HWIFS)
-		return(m68k_ide_defaults[index].base);
-	return 0;
-}
-
-
-/*
- * Set up a hw structure for a specified data port, control port and IRQ.
- * This should follow whatever the default interface uses.
- */
-static IDE_INLINE void ide_init_hwif_ports(
-	hw_regs_t *hw,
-	ide_ioreg_t data_port,
-	ide_ioreg_t ctrl_port,
-	int *irq)
-{
-	ide_ioreg_t reg = data_port;
-	int i;
-
-	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
-		hw->io_ports[i] = reg;
-		reg += 1;
-	}
-	if (ctrl_port) {
-		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
-	} else {
-		hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
-	}
-}
-
-#define ide_init_default_irq(base)	ide_default_irq(base)
-
-static IDE_INLINE int
-ide_request_irq(
-	unsigned int irq,
-	void (*handler)(int, void *, struct pt_regs *),
-	unsigned long flags,
-	const char *device,
-	void *dev_id)
-{
-#ifdef CONFIG_COLDFIRE
-	mcf_autovector(irq);
-#endif
-	return(request_irq(irq, handler, flags, device, dev_id));
-}
-
-
-static IDE_INLINE void
-ide_free_irq(unsigned int irq, void *dev_id)
-{
-	free_irq(irq, dev_id);
-}
-
-
-static IDE_INLINE void
-ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
-{
-}
-
-
-static IDE_INLINE void
-ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
-}
-
-
-static IDE_INLINE void
-ide_fix_driveid(struct hd_driveid *id)
-{
-#ifdef CONFIG_COLDFIRE
-	int i, n;
-	unsigned short *wp = (unsigned short *) id;
-	int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
-
-	/* Need to byte swap shorts,  but not char fields */
-	for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
-		if (avoid[n] == i) {
-			n++;
-			continue;
-		}
-		*wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
-	}
-	/* have to word swap the one 32 bit field */
-	id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
-				((id->lba_capacity >> 16) & 0xffff);
-#endif
-}
-
-
-static IDE_INLINE void
-ide_release_lock (int *ide_lock)
-{
-}
-
-
-static IDE_INLINE void
-ide_get_lock(
-	int *ide_lock,
-	void (*handler)(int, void *, struct pt_regs *),
-	void *data)
-{
-}
-
-
-#define ide_ack_intr(hwif) \
-	((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
-#define	ide__sti()	__sti()
-
-/****************************************************************************/
-/*
- *	System specific IO requirements
- */
-
-#ifdef CONFIG_COLDFIRE
-
-#ifdef CONFIG_SECUREEDGEMP3
-
-/* Replace standard IO functions for funky mapping of MP3 board */
-#undef outb
-#undef outb_p
-#undef inb
-#undef inb_p
-
-#define outb(v, a)          ide_outb(v, (unsigned long) (a))
-#define outb_p(v, a)        ide_outb(v, (unsigned long) (a))
-#define inb(a)              ide_inb((unsigned long) (a))
-#define inb_p(a)            ide_inb((unsigned long) (a))
-
-#define ADDR8_PTR(addr)		(((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
-#define ADDR16_PTR(addr)	(addr)
-#define ADDR32_PTR(addr)	(addr)
-#define SWAP8(w)			((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
-#define SWAP16(w)			(w)
-#define SWAP32(w)			(w)
-
-
-static IDE_INLINE void
-ide_outb(unsigned int val, unsigned int addr)
-{
-	volatile unsigned short	*rp;
-
-	DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
-	rp = (volatile unsigned short *) ADDR8_PTR(addr);
-	*rp = SWAP8(val);
-}
-
-
-static IDE_INLINE int
-ide_inb(unsigned int addr)
-{
-	volatile unsigned short	*rp, val;
-
-	DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
-	rp = (volatile unsigned short *) ADDR8_PTR(addr);
-	val = *rp;
-	return(SWAP8(val));
-}
-
-
-static IDE_INLINE void
-ide_outw(unsigned int val, unsigned int addr)
-{
-	volatile unsigned short	*rp;
-
-	DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
-	rp = (volatile unsigned short *) ADDR16_PTR(addr);
-	*rp = SWAP16(val);
-}
-
-static IDE_INLINE void
-ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
-{
-	volatile unsigned short	*rp, val;
-	unsigned short   	*buf;
-
-	DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
-	buf = (unsigned short *) vbuf;
-	rp = (volatile unsigned short *) ADDR16_PTR(addr);
-	for (; (len > 0); len--) {
-		val = *buf++;
-		*rp = SWAP16(val);
-	}
-}
-
-static IDE_INLINE int
-ide_inw(unsigned int addr)
-{
-	volatile unsigned short *rp, val;
-
-	DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
-	rp = (volatile unsigned short *) ADDR16_PTR(addr);
-	val = *rp;
-	return(SWAP16(val));
-}
-
-static IDE_INLINE void
-ide_insw(unsigned int addr, void *vbuf, unsigned long len)
-{
-	volatile unsigned short *rp;
-	unsigned short          w, *buf;
-
-	DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
-	buf = (unsigned short *) vbuf;
-	rp = (volatile unsigned short *) ADDR16_PTR(addr);
-	for (; (len > 0); len--) {
-		w = *rp;
-		*buf++ = SWAP16(w);
-	}
-}
-
-static IDE_INLINE void
-ide_insl(unsigned int addr, void *vbuf, unsigned long len)
-{
-	volatile unsigned long *rp;
-	unsigned long          w, *buf;
-
-	DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
-	buf = (unsigned long *) vbuf;
-	rp = (volatile unsigned long *) ADDR32_PTR(addr);
-	for (; (len > 0); len--) {
-		w = *rp;
-		*buf++ = SWAP32(w);
-	}
-}
-
-static IDE_INLINE void
-ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
-{
-	volatile unsigned long	*rp, val;
-	unsigned long   	*buf;
-
-	DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
-	buf = (unsigned long *) vbuf;
-	rp = (volatile unsigned long *) ADDR32_PTR(addr);
-	for (; (len > 0); len--) {
-		val = *buf++;
-		*rp = SWAP32(val);
-	}
-}
-
-#elif CONFIG_eLIA
-
-/* 8/16 bit acesses are controlled by flicking bits in the CS register */
-#define	ACCESS_MODE_16BIT()	\
-	*((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
-#define	ACCESS_MODE_8BIT()	\
-	*((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
-
-
-static IDE_INLINE void
-ide_outw(unsigned int val, unsigned int addr)
-{
-	ACCESS_MODE_16BIT();
-	outw(val, addr);
-	ACCESS_MODE_8BIT();
-}
-
-static IDE_INLINE void
-ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
-{
-	ACCESS_MODE_16BIT();
-	outsw(addr, vbuf, len);
-	ACCESS_MODE_8BIT();
-}
-
-static IDE_INLINE int
-ide_inw(unsigned int addr)
-{
-	int ret;
-
-	ACCESS_MODE_16BIT();
-	ret = inw(addr);
-	ACCESS_MODE_8BIT();
-	return(ret);
-}
-
-static IDE_INLINE void
-ide_insw(unsigned int addr, void *vbuf, unsigned long len)
-{
-	ACCESS_MODE_16BIT();
-	insw(addr, vbuf, len);
-	ACCESS_MODE_8BIT();
-}
-
-static IDE_INLINE void
-ide_insl(unsigned int addr, void *vbuf, unsigned long len)
-{
-	ACCESS_MODE_16BIT();
-	insl(addr, vbuf, len);
-	ACCESS_MODE_8BIT();
-}
-
-static IDE_INLINE void
-ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
-{
-	ACCESS_MODE_16BIT();
-	outsl(addr, vbuf, len);
-	ACCESS_MODE_8BIT();
-}
-
-#endif /* CONFIG_SECUREEDGEMP3 */
-
-#undef outw
-#undef outw_p
-#undef outsw
-#undef inw
-#undef inw_p
-#undef insw
-#undef insl
-#undef outsl
-
-#define	outw(v, a)	     ide_outw(v, (unsigned long) (a))
-#define	outw_p(v, a)     ide_outw(v, (unsigned long) (a))
-#define outsw(a, b, n)   ide_outsw((unsigned long) (a), b, n)
-#define	inw(a)	         ide_inw((unsigned long) (a))
-#define	inw_p(a)	     ide_inw((unsigned long) (a))
-#define insw(a, b, n)    ide_insw((unsigned long) (a), b, n)
-#define insl(a, b, n)    ide_insl((unsigned long) (a), b, n)
-#define outsl(a, b, n)   ide_outsl((unsigned long) (a), b, n)
-
-#endif CONFIG_COLDFIRE
-
-/****************************************************************************/
-#endif /* __KERNEL__ */
-#endif /* _M68KNOMMU_IDE_H */
-/****************************************************************************/
diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h
index 30fade4149b..e08f2ee4b4a 100644
--- a/include/asm-m68knommu/io.h
+++ b/include/asm-m68knommu/io.h
@@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
 extern void __iounmap(void *addr, unsigned long size);
 
-extern inline void *ioremap(unsigned long physaddr, unsigned long size)
+static inline void *ioremap(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 }
-extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 }
-extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
 }
-extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
 }
diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h
new file mode 100644
index 00000000000..6dc62869e62
--- /dev/null
+++ b/include/asm-m68knommu/m520xsim.h
@@ -0,0 +1,54 @@
+/****************************************************************************/
+
+/*
+ *  m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
+ *
+ *  (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
+ */
+
+/****************************************************************************/
+#ifndef m520xsim_h
+#define m520xsim_h
+/****************************************************************************/
+
+#include <linux/config.h>
+
+/*
+ *  Define the 5282 SIM register set addresses.
+ */
+#define MCFICM_INTC0        0x48000     /* Base for Interrupt Ctrl 0 */
+#define MCFINTC_IPRH        0x00        /* Interrupt pending 32-63 */
+#define MCFINTC_IPRL        0x04        /* Interrupt pending 1-31 */
+#define MCFINTC_IMRH        0x08        /* Interrupt mask 32-63 */
+#define MCFINTC_IMRL        0x0c        /* Interrupt mask 1-31 */
+#define MCFINTC_INTFRCH     0x10        /* Interrupt force 32-63 */
+#define MCFINTC_INTFRCL     0x14        /* Interrupt force 1-31 */
+#define MCFINTC_ICR0        0x40        /* Base ICR register */
+
+#define MCFINT_VECBASE      64
+#define MCFINT_UART0        26          /* Interrupt number for UART0 */
+#define MCFINT_UART1        27          /* Interrupt number for UART1 */
+#define MCFINT_UART2        28          /* Interrupt number for UART2 */
+#define MCFINT_QSPI         31          /* Interrupt number for QSPI */
+#define MCFINT_PIT1         4           /* Interrupt number for PIT1 (PIT0 in processor) */
+
+
+#define MCF_GPIO_PAR_UART                   (0xA4036)
+#define MCF_GPIO_PAR_FECI2C                 (0xA4033)
+#define MCF_GPIO_PAR_FEC                    (0xA4038)
+
+#define MCF_GPIO_PAR_UART_PAR_URXD0         (0x0001)
+#define MCF_GPIO_PAR_UART_PAR_UTXD0         (0x0002)
+
+#define MCF_GPIO_PAR_UART_PAR_URXD1         (0x0040)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1         (0x0080)
+
+#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)
+#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
+
+#define ICR_INTRCONF		0x05
+#define MCFPIT_IMR		MCFINTC_IMRL
+#define MCFPIT_IMR_IBIT	(1 << MCFINT_PIT1)
+
+/****************************************************************************/
+#endif  /* m520xsim_h */
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index b17cd920977..9cb40142183 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
 .endm
 #endif /* CONFIG_M5407 */
 
+#if defined(CONFIG_M520x)
+.macro CACHE_ENABLE
+	move.l	#0x01000000,%d0		/* invalidate whole cache */
+	movec	%d0,%CACR
+	nop
+	move.l	#0x0000c000,%d0		/* set SDRAM cached (write-thru) */
+	movec	%d0,%ACR0
+	move.l	#0x00000000,%d0		/* no other regions cached */
+	movec	%d0,%ACR1
+	move.l	#0x80400000,%d0		/* enable 8K instruction cache */
+	movec	%d0,%CACR
+	nop
+.endm
+#endif /* CONFIG_M520x */
 
 /****************************************************************************/
 #endif	/* __M68KNOMMU_MCFCACHE_H */
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
index 045875651e4..a71b1c8cb4f 100644
--- a/include/asm-m68knommu/mcfne.h
+++ b/include/asm-m68knommu/mcfne.h
@@ -35,7 +35,7 @@
  *	Define the basic hardware resources of NE2000 boards.
  */
 
-#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
+#if defined(CONFIG_ARN5206)
 #define NE2000_ADDR		0x40000300
 #define NE2000_ODDOFFSET	0x00010000
 #define	NE2000_IRQ_VECTOR	0xf0
@@ -44,7 +44,7 @@
 #define	NE2000_BYTE		volatile unsigned short
 #endif
 
-#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
+#if defined(CONFIG_M5206eC3)
 #define	NE2000_ADDR		0x40000300
 #define	NE2000_ODDOFFSET	0x00010000
 #define	NE2000_IRQ_VECTOR	0x1c
@@ -61,7 +61,7 @@
 #define	NE2000_BYTE		volatile unsigned char
 #endif
 
-#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
+#if defined(CONFIG_CFV240)
 #define NE2000_ADDR             0x40010000
 #define NE2000_ADDR1            0x40010001
 #define NE2000_ODDOFFSET        0x00000000
@@ -72,7 +72,7 @@
 #define	NE2000_BYTE		volatile unsigned char
 #endif
 
-#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA)
+#if defined(CONFIG_M5307C3)
 #define NE2000_ADDR		0x40000300
 #define NE2000_ODDOFFSET	0x00010000
 #define NE2000_IRQ_VECTOR	0x1b
@@ -114,7 +114,7 @@
 #define	RSWAP(w)		(((w) << 8) | ((w) >> 8))
 #endif
 
-#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH)
+#if defined(CONFIG_ARN5307)
 #define NE2000_ADDR		0xfe600300
 #define NE2000_ODDOFFSET	0x00010000
 #define NE2000_IRQ_VECTOR	0x1b
@@ -123,7 +123,7 @@
 #define	NE2000_BYTE		volatile unsigned short
 #endif
 
-#if defined(CONFIG_M5407)
+#if defined(CONFIG_M5407C3)
 #define NE2000_ADDR		0x40000300
 #define NE2000_ODDOFFSET	0x00010000
 #define NE2000_IRQ_VECTOR	0x1b
@@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
  *	Minor differences between the different board types.
  */
 
-#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
+#if defined(CONFIG_ARN5206)
 void ne2000_irqsetup(int irq)
 {
 	volatile unsigned char  *icrp;
@@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq)
 }
 #endif
 
-#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
+#if defined(CONFIG_M5206eC3)
 void ne2000_irqsetup(int irq)
 {
 	volatile unsigned char  *icrp;
@@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq)
 }
 #endif
 
-#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
+#if defined(CONFIG_CFV240)
 void ne2000_irqsetup(int irq)
 {
 	volatile unsigned char  *icrp;
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 4cc2e9fd6ad..a685f1b4540 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -14,13 +14,17 @@
 #include <linux/config.h>
 
 /*
- *	Get address specific defines for the 5270/5271 and 5280/5282.
+ *	Get address specific defines for the 5270/5271, 5280/5282, and 5208.
  */
+#if defined(CONFIG_M520x)
+#define	MCFPIT_BASE1		0x00080000	/* Base address of TIMER1 */
+#define	MCFPIT_BASE2		0x00084000	/* Base address of TIMER2 */
+#else
 #define	MCFPIT_BASE1		0x00150000	/* Base address of TIMER1 */
 #define	MCFPIT_BASE2		0x00160000	/* Base address of TIMER2 */
 #define	MCFPIT_BASE3		0x00170000	/* Base address of TIMER3 */
 #define	MCFPIT_BASE4		0x00180000	/* Base address of TIMER4 */
-
+#endif
 
 /*
  *	Define the PIT timer register set addresses.
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index b0c7736f7a9..81d74a31dc4 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -22,6 +22,8 @@
 #include <asm/m5204sim.h>
 #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
 #include <asm/m5206sim.h>
+#elif defined(CONFIG_M520x)
+#include <asm/m520xsim.h>
 #elif defined(CONFIG_M523x)
 #include <asm/m523xsim.h>
 #elif defined(CONFIG_M5249)
@@ -99,6 +101,19 @@
 #define	MCFSIM_IMR_MASKALL	0x3ffe		/* All intr sources */
 #endif
 
+/*
+ *	PIT interrupt settings, if not found in mXXXXsim.h file.
+ */
+#ifndef	ICR_INTRCONF
+#define	ICR_INTRCONF		0x2b            /* PIT1 level 5, priority 3 */
+#endif
+#ifndef	MCFPIT_IMR
+#define	MCFPIT_IMR		MCFINTC_IMRH
+#endif
+#ifndef	MCFPIT_IMR_IBIT
+#define	MCFPIT_IMR_IBIT		(1 << (MCFINT_PIT1 - 32))
+#endif
+
 
 #ifndef __ASSEMBLY__
 /*
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 9c1210613bc..b016fad8311 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -41,6 +41,10 @@
 #define MCFUART_BASE1		0x1c0           /* Base address of UART1 */
 #define MCFUART_BASE2		0x200           /* Base address of UART2 */
 #endif
+#elif defined(CONFIG_M520x)
+#define MCFUART_BASE1		0x60000		/* Base address of UART1 */
+#define MCFUART_BASE2		0x64000		/* Base address of UART2 */
+#define MCFUART_BASE3		0x68000		/* Base address of UART2 */
 #endif
 
 
diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h
index c425dd56815..6ceae103596 100644
--- a/include/asm-m68knommu/mcfwdebug.h
+++ b/include/asm-m68knommu/mcfwdebug.h
@@ -90,7 +90,7 @@
  * that the debug module instructions (2 longs) must be long word aligned and
  * some pointer fiddling is performed to ensure this.
  */
-extern inline void wdebug(int reg, unsigned long data) {
+static inline void wdebug(int reg, unsigned long data) {
 	unsigned short dbg_spc[6];
 	unsigned short *dbg;
 
diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h
index 9bc0fd49b8a..1e080eca9ca 100644
--- a/include/asm-m68knommu/mmu_context.h
+++ b/include/asm-m68knommu/mmu_context.h
@@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
 }
 
-extern inline int
+static inline int
 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
 	// mm->context = virt_to_phys(mm->pgd);
@@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str
 
 #define deactivate_mm(tsk,mm)	do { } while (0)
 
-extern inline void activate_mm(struct mm_struct *prev_mm,
+static inline void activate_mm(struct mm_struct *prev_mm,
 			       struct mm_struct *next_mm)
 {
 }
diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h
index 85a054e758b..ba393b1a023 100644
--- a/include/asm-m68knommu/processor.h
+++ b/include/asm-m68knommu/processor.h
@@ -21,7 +21,7 @@
 #include <asm/ptrace.h>
 #include <asm/current.h>
 
-extern inline unsigned long rdusp(void)
+static inline unsigned long rdusp(void)
 {
 #ifdef CONFIG_COLDFIRE
 	extern unsigned int sw_usp;
@@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void)
 #endif
 }
 
-extern inline void wrusp(unsigned long usp)
+static inline void wrusp(unsigned long usp)
 {
 #ifdef CONFIG_COLDFIRE
 	extern unsigned int sw_usp;
diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h
index 17aee15906a..5cc1fdd86f5 100644
--- a/include/asm-m68knommu/semaphore.h
+++ b/include/asm-m68knommu/semaphore.h
@@ -41,7 +41,7 @@ struct semaphore {
 #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
 #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
 
-extern inline void sema_init (struct semaphore *sem, int val)
+static inline void sema_init (struct semaphore *sem, int val)
 {
 	*sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
 }
@@ -73,7 +73,7 @@ extern spinlock_t semaphore_wake_lock;
  * "down_failed" is a special asm handler that calls the C
  * routine that actually waits. See arch/m68k/lib/semaphore.S
  */
-extern inline void down(struct semaphore * sem)
+static inline void down(struct semaphore * sem)
 {
 	might_sleep();
 	__asm__ __volatile__(
@@ -88,7 +88,7 @@ extern inline void down(struct semaphore * sem)
 		: "cc", "%a0", "%a1", "memory");
 }
 
-extern inline int down_interruptible(struct semaphore * sem)
+static inline int down_interruptible(struct semaphore * sem)
 {
 	int ret;
 
@@ -107,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem)
 	return(ret);
 }
 
-extern inline int down_trylock(struct semaphore * sem)
+static inline int down_trylock(struct semaphore * sem)
 {
 	register struct semaphore *sem1 __asm__ ("%a1") = sem;
 	register int result __asm__ ("%d0");
@@ -135,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem)
  * The default case (no contention) will result in NO
  * jumps for both down() and up().
  */
-extern inline void up(struct semaphore * sem)
+static inline void up(struct semaphore * sem)
 {
 	__asm__ __volatile__(
 		"| atomic up operation\n\t"
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 53cbbad0f13..6338afc850b 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new)
 	moveb #0x80, (%a0);		\
 	");				\
 })
+#elif defined(CONFIG_M520x)
+	/*
+	 * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register 
+	 * RCR), that when set, resets the MCF5208.
+	 */
+#define HARD_RESET_NOW() 		\
+({					\
+	unsigned char volatile *reset;	\
+	asm("move.w     #0x2700, %sr");	\
+	reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000));	\
+	while(1)			\
+		*reset |= 0x80;		\
+})
 #else
 #define HARD_RESET_NOW() ({		\
         asm("				\
diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h
index bf7004e1afe..de858db28b0 100644
--- a/include/asm-m68knommu/tlbflush.h
+++ b/include/asm-m68knommu/tlbflush.h
@@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm,
 	BUG();
 }
 
-extern inline void flush_tlb_kernel_page(unsigned long addr)
+static inline void flush_tlb_kernel_page(unsigned long addr)
 {
 	BUG();
 }
 
-extern inline void flush_tlb_pgtables(struct mm_struct *mm,
+static inline void flush_tlb_pgtables(struct mm_struct *mm,
 				      unsigned long start, unsigned long end)
 {
 	BUG();