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Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h21
1 files changed, 11 insertions, 10 deletions
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 3bdce9126f1..bf7701243d7 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -526,7 +526,7 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
/* Au1000 */
#ifdef CONFIG_SOC_AU1000
enum soc_au1000_ints {
- AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE,
+ AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1000_UART0_INT = AU1000_FIRST_INT,
AU1000_UART1_INT, /* au1000 */
AU1000_UART2_INT, /* au1000 */
@@ -605,7 +605,7 @@ enum soc_au1000_ints {
/* Au1500 */
#ifdef CONFIG_SOC_AU1500
enum soc_au1500_ints {
- AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE,
+ AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1500_UART0_INT = AU1500_FIRST_INT,
AU1000_PCI_INTA, /* au1500 */
AU1000_PCI_INTB, /* au1500 */
@@ -686,7 +686,7 @@ enum soc_au1500_ints {
/* Au1100 */
#ifdef CONFIG_SOC_AU1100
enum soc_au1100_ints {
- AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE,
+ AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1100_UART0_INT,
AU1100_UART1_INT,
AU1100_SD_INT,
@@ -761,7 +761,7 @@ enum soc_au1100_ints {
#ifdef CONFIG_SOC_AU1550
enum soc_au1550_ints {
- AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE,
+ AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1550_UART0_INT = AU1550_FIRST_INT,
AU1550_PCI_INTA,
AU1550_PCI_INTB,
@@ -851,7 +851,7 @@ enum soc_au1550_ints {
#ifdef CONFIG_SOC_AU1200
enum soc_au1200_ints {
- AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE,
+ AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1200_UART0_INT = AU1200_FIRST_INT,
AU1200_SWT_INT,
AU1200_SD_INT,
@@ -948,11 +948,12 @@ enum soc_au1200_ints {
#endif /* CONFIG_SOC_AU1200 */
-#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 0)
-#define AU1000_INTC0_INT_LAST (MIPS_CPU_IRQ_BASE + 31)
-#define AU1000_INTC1_INT_BASE (MIPS_CPU_IRQ_BASE + 32)
-#define AU1000_INTC1_INT_LAST (MIPS_CPU_IRQ_BASE + 63)
-#define AU1000_MAX_INTR (MIPS_CPU_IRQ_BASE + 63)
+#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 8)
+#define AU1000_INTC0_INT_LAST (AU1000_INTC0_INT_BASE + 31)
+#define AU1000_INTC1_INT_BASE (AU1000_INTC0_INT_BASE + 32)
+#define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31)
+
+#define AU1000_MAX_INTR AU1000_INTC1_INT_LAST
#define INTX 0xFF /* not valid */
/* Programmable Counters 0 and 1 */