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-rw-r--r--include/asm-mips/byteorder.h18
-rw-r--r--include/asm-mips/compat.h8
-rw-r--r--include/asm-mips/io.h82
-rw-r--r--include/asm-mips/linkage.h4
-rw-r--r--include/asm-mips/mach-cobalt/cobalt.h2
-rw-r--r--include/asm-mips/mach-generic/mangle-port.h36
-rw-r--r--include/asm-mips/mach-ip27/mangle-port.h9
-rw-r--r--include/asm-mips/mach-ip32/mangle-port.h9
-rw-r--r--include/asm-mips/mach-mips/cpu-feature-overrides.h4
-rw-r--r--include/asm-mips/mmu_context.h7
-rw-r--r--include/asm-mips/pgtable-32.h2
-rw-r--r--include/asm-mips/poll.h1
-rw-r--r--include/asm-mips/r4kcache.h1
-rw-r--r--include/asm-mips/signal.h20
-rw-r--r--include/asm-mips/sn/klconfig.h2
-rw-r--r--include/asm-mips/sn/mapped_kernel.h4
-rw-r--r--include/asm-mips/sn/sn0/hubio.h12
-rw-r--r--include/asm-mips/stackframe.h20
-rw-r--r--include/asm-mips/system.h8
-rw-r--r--include/asm-mips/termbits.h2
-rw-r--r--include/asm-mips/thread_info.h2
21 files changed, 136 insertions, 117 deletions
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index 584f8128fff..aefc02f16fd 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -39,6 +39,24 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
}
#define __arch__swab32(x) ___arch__swab32(x)
+#ifdef CONFIG_CPU_MIPS64_R2
+
+static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
+{
+ __asm__(
+ " dsbh %0, %1 \n"
+ " dshd %0, %0 \n"
+ " drotr %0, %0, 32 \n"
+ : "=r" (x)
+ : "r" (x));
+
+ return x;
+}
+
+#define __arch__swab64(x) ___arch__swab64(x)
+
+#endif /* CONFIG_CPU_MIPS64_R2 */
+
#endif /* CONFIG_CPU_MIPSR2 */
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h
index 35d2604fe69..0012bd804d2 100644
--- a/include/asm-mips/compat.h
+++ b/include/asm-mips/compat.h
@@ -128,17 +128,17 @@ typedef u32 compat_sigset_word;
*/
typedef u32 compat_uptr_t;
-static inline void *compat_ptr(compat_uptr_t uptr)
+static inline void __user *compat_ptr(compat_uptr_t uptr)
{
- return (void *)(long)uptr;
+ return (void __user *)(long)uptr;
}
-static inline void *compat_alloc_user_space(long len)
+static inline void __user *compat_alloc_user_space(long len)
{
struct pt_regs *regs = (struct pt_regs *)
((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1;
- return (void *) (regs->regs[29] - len);
+ return (void __user *) (regs->regs[29] - len);
}
#if defined (__MIPSEL__)
#define __COMPAT_ENDIAN_SWAP__ 1
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index ba1d7bbc15d..6b17eb9d79a 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -40,56 +40,13 @@
* hardware. An example use would be for flash memory that's used for
* execute in place.
*/
-# define __raw_ioswabb(x) (x)
-# define __raw_ioswabw(x) (x)
-# define __raw_ioswabl(x) (x)
-# define __raw_ioswabq(x) (x)
-# define ____raw_ioswabq(x) (x)
+# define __raw_ioswabb(a,x) (x)
+# define __raw_ioswabw(a,x) (x)
+# define __raw_ioswabl(a,x) (x)
+# define __raw_ioswabq(a,x) (x)
+# define ____raw_ioswabq(a,x) (x)
-/*
- * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
- * less sane hardware forces software to fiddle with this...
- *
- * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
- * you can't have the numerical value of data and byte addresses within
- * multibyte quantities both preserved at the same time. Hence two
- * variations of functions: non-prefixed ones that preserve the value
- * and prefixed ones that preserve byte addresses. The latters are
- * typically used for moving raw data between a peripheral and memory (cf.
- * string I/O functions), hence the "__mem_" prefix.
- */
-#if defined(CONFIG_SWAP_IO_SPACE)
-
-# define ioswabb(x) (x)
-# define __mem_ioswabb(x) (x)
-# ifdef CONFIG_SGI_IP22
-/*
- * IP22 seems braindead enough to swap 16bits values in hardware, but
- * not 32bits. Go figure... Can't tell without documentation.
- */
-# define ioswabw(x) (x)
-# define __mem_ioswabw(x) le16_to_cpu(x)
-# else
-# define ioswabw(x) le16_to_cpu(x)
-# define __mem_ioswabw(x) (x)
-# endif
-# define ioswabl(x) le32_to_cpu(x)
-# define __mem_ioswabl(x) (x)
-# define ioswabq(x) le64_to_cpu(x)
-# define __mem_ioswabq(x) (x)
-
-#else
-
-# define ioswabb(x) (x)
-# define __mem_ioswabb(x) (x)
-# define ioswabw(x) (x)
-# define __mem_ioswabw(x) cpu_to_le16(x)
-# define ioswabl(x) (x)
-# define __mem_ioswabl(x) cpu_to_le32(x)
-# define ioswabq(x) (x)
-# define __mem_ioswabq(x) cpu_to_le32(x)
-
-#endif
+/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
#define IO_SPACE_LIMIT 0xffff
@@ -346,7 +303,7 @@ static inline void pfx##write##bwlq(type val, \
\
__mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \
\
- __val = pfx##ioswab##bwlq(val); \
+ __val = pfx##ioswab##bwlq(__mem, val); \
\
if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \
*__mem = __val; \
@@ -401,7 +358,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
BUG(); \
} \
\
- return pfx##ioswab##bwlq(__val); \
+ return pfx##ioswab##bwlq(__mem, __val); \
}
#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \
@@ -411,10 +368,9 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \
volatile type *__addr; \
type __val; \
\
- port = __swizzle_addr_##bwlq(port); \
- __addr = (void *)(mips_io_port_base + port); \
+ __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
\
- __val = pfx##ioswab##bwlq(val); \
+ __val = pfx##ioswab##bwlq(__addr, val); \
\
/* Really, we want this to be atomic */ \
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
@@ -428,15 +384,14 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
volatile type *__addr; \
type __val; \
\
- port = __swizzle_addr_##bwlq(port); \
- __addr = (void *)(mips_io_port_base + port); \
+ __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \
\
BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
\
__val = *__addr; \
slow; \
\
- return pfx##ioswab##bwlq(__val); \
+ return pfx##ioswab##bwlq(__addr, __val); \
}
#define __BUILD_MEMORY_PFX(bus, bwlq, type) \
@@ -601,24 +556,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
*/
#define __ISA_IO_base ((char *)(isa_slot_offset))
-#define isa_readb(a) readb(__ISA_IO_base + (a))
-#define isa_readw(a) readw(__ISA_IO_base + (a))
-#define isa_readl(a) readl(__ISA_IO_base + (a))
-#define isa_readq(a) readq(__ISA_IO_base + (a))
-#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
-#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
-#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
-#define isa_writeq(q,a) writeq(q,__ISA_IO_base + (a))
-#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
-#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
-#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
-
/*
* We don't have csum_partial_copy_fromio() yet, so we cheat here and
* just copy it. The net code will then do the checksum later.
*/
#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len))
-#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(b),(c),(d))
/*
* check_signature - find BIOS signatures
diff --git a/include/asm-mips/linkage.h b/include/asm-mips/linkage.h
index 291c2d01c44..b6185d3cfe6 100644
--- a/include/asm-mips/linkage.h
+++ b/include/asm-mips/linkage.h
@@ -1,6 +1,8 @@
#ifndef __ASM_LINKAGE_H
#define __ASM_LINKAGE_H
-/* Nothing to see here... */
+#ifdef __ASSEMBLY__
+#include <asm/asm.h>
+#endif
#endif
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 78e1df2095f..b3c5ecbec03 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -113,4 +113,6 @@ do { \
# define COBALT_KEY_SELECT (1 << 7)
# define COBALT_KEY_MASK 0xfe
+#define COBALT_UART ((volatile unsigned char *) CKSEG1ADDR(0x1c800000))
+
#endif /* __ASM_COBALT_H */
diff --git a/include/asm-mips/mach-generic/mangle-port.h b/include/asm-mips/mach-generic/mangle-port.h
index 4a98d83b8ec..6e1b0c075de 100644
--- a/include/asm-mips/mach-generic/mangle-port.h
+++ b/include/asm-mips/mach-generic/mangle-port.h
@@ -13,4 +13,40 @@
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
+/*
+ * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
+ * less sane hardware forces software to fiddle with this...
+ *
+ * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
+ * you can't have the numerical value of data and byte addresses within
+ * multibyte quantities both preserved at the same time. Hence two
+ * variations of functions: non-prefixed ones that preserve the value
+ * and prefixed ones that preserve byte addresses. The latters are
+ * typically used for moving raw data between a peripheral and memory (cf.
+ * string I/O functions), hence the "__mem_" prefix.
+ */
+#if defined(CONFIG_SWAP_IO_SPACE)
+
+# define ioswabb(a,x) (x)
+# define __mem_ioswabb(a,x) (x)
+# define ioswabw(a,x) le16_to_cpu(x)
+# define __mem_ioswabw(a,x) (x)
+# define ioswabl(a,x) le32_to_cpu(x)
+# define __mem_ioswabl(a,x) (x)
+# define ioswabq(a,x) le64_to_cpu(x)
+# define __mem_ioswabq(a,x) (x)
+
+#else
+
+# define ioswabb(a,x) (x)
+# define __mem_ioswabb(a,x) (x)
+# define ioswabw(a,x) (x)
+# define __mem_ioswabw(a,x) cpu_to_le16(x)
+# define ioswabl(a,x) (x)
+# define __mem_ioswabl(a,x) cpu_to_le32(x)
+# define ioswabq(a,x) (x)
+# define __mem_ioswabq(a,x) cpu_to_le32(x)
+
+#endif
+
#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip27/mangle-port.h b/include/asm-mips/mach-ip27/mangle-port.h
index f76c4488045..d615312a451 100644
--- a/include/asm-mips/mach-ip27/mangle-port.h
+++ b/include/asm-mips/mach-ip27/mangle-port.h
@@ -13,4 +13,13 @@
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
+# define ioswabb(a,x) (x)
+# define __mem_ioswabb(a,x) (x)
+# define ioswabw(a,x) (x)
+# define __mem_ioswabw(a,x) cpu_to_le16(x)
+# define ioswabl(a,x) (x)
+# define __mem_ioswabl(a,x) cpu_to_le32(x)
+# define ioswabq(a,x) (x)
+# define __mem_ioswabq(a,x) cpu_to_le32(x)
+
#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip32/mangle-port.h b/include/asm-mips/mach-ip32/mangle-port.h
index 6e25b52ed8f..81320eb5532 100644
--- a/include/asm-mips/mach-ip32/mangle-port.h
+++ b/include/asm-mips/mach-ip32/mangle-port.h
@@ -14,4 +14,13 @@
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
+# define ioswabb(a,x) (x)
+# define __mem_ioswabb(a,x) (x)
+# define ioswabw(a,x) (x)
+# define __mem_ioswabw(a,x) cpu_to_le16(x)
+# define ioswabl(a,x) (x)
+# define __mem_ioswabl(a,x) cpu_to_le32(x)
+# define ioswabq(a,x) (x)
+# define __mem_ioswabq(a,x) cpu_to_le32(x)
+
#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 9f92aed1775..e06af6c86f8 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -29,7 +29,11 @@
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
+#ifdef CONFIG_CPU_HAS_LLSC
#define cpu_has_llsc 1
+#else
+#define cpu_has_llsc 0
+#endif
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 19cdf7642e6..61cf2258813 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -33,12 +33,7 @@ extern unsigned long pgd_current[];
write_c0_context((unsigned long) smp_processor_id() << 25); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
#endif
-#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
-#define TLBMISS_HANDLER_SETUP() \
- write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
- TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
-#endif
-#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
+#ifdef CONFIG_64BIT
#define TLBMISS_HANDLER_SETUP() \
write_c0_context((unsigned long) smp_processor_id() << 26); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 0cff64ce0fb..4d6bc45df59 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -206,7 +206,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
/* fixme */
#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
#define pgoff_to_pte(off) \
- ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)})
+ ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)})
#else
#define pte_to_pgoff(_pte) \
diff --git a/include/asm-mips/poll.h b/include/asm-mips/poll.h
index a000f1f789e..70881f8c5c5 100644
--- a/include/asm-mips/poll.h
+++ b/include/asm-mips/poll.h
@@ -17,6 +17,7 @@
/* These seem to be more or less nonstandard ... */
#define POLLMSG 0x0400
#define POLLREMOVE 0x1000
+#define POLLRDHUP 0x2000
struct pollfd {
int fd;
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 0bcb79a58ee..90c37470097 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -303,5 +303,6 @@ __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
/* blast_inv_dcache_range */
__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, )
#endif /* _ASM_R4KCACHE_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 6fe903e09c6..d8349e4b55e 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -147,16 +147,34 @@ struct k_sigaction {
/* IRIX compatible stack_t */
typedef struct sigaltstack {
- void *ss_sp;
+ void __user *ss_sp;
size_t ss_size;
int ss_flags;
} stack_t;
#ifdef __KERNEL__
#include <asm/sigcontext.h>
+#include <asm/siginfo.h>
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+struct pt_regs;
+extern void do_signal(struct pt_regs *regs);
+extern void do_signal32(struct pt_regs *regs);
+
+extern int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set);
+extern int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set, siginfo_t *info);
+
+extern int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set);
+extern int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set, siginfo_t *info);
+
+extern int setup_rt_frame_n32(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set, siginfo_t *info);
+
#endif /* __KERNEL__ */
#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index d028e28d623..9709ff701d9 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -99,7 +99,7 @@ typedef s32 klconf_off_t;
#define ENABLE_BOARD 0x01
#define FAILED_BOARD 0x02
#define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which
- are discovered twice. Use one of them */
+ are discovered twice. Use one of them */
#define VISITED_BOARD 0x08 /* Used for compact hub numbering. */
#define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */
#define GLOBAL_MASTER_IO6 0x20
diff --git a/include/asm-mips/sn/mapped_kernel.h b/include/asm-mips/sn/mapped_kernel.h
index 3a17846df84..59edb20f8ec 100644
--- a/include/asm-mips/sn/mapped_kernel.h
+++ b/include/asm-mips/sn/mapped_kernel.h
@@ -23,11 +23,7 @@
#include <linux/config.h>
#include <asm/addrspace.h>
-#ifdef CONFIG_BUILD_ELF64
#define REP_BASE CAC_BASE
-#else
-#define REP_BASE CKSEG0
-#endif
#ifdef CONFIG_MAPPED_KERNEL
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
index 80cf6a52ed3..f314da21b97 100644
--- a/include/asm-mips/sn/sn0/hubio.h
+++ b/include/asm-mips/sn/sn0/hubio.h
@@ -229,7 +229,7 @@ typedef union hubii_ilcsr_u {
icsr_llp_en: 1, /* LLP enable bit */
icsr_rsvd2: 1, /* reserver */
icsr_wrm_reset: 1, /* Warm reset bit */
- icsr_rsvd1: 2, /* Data ready offset */
+ icsr_rsvd1: 2, /* Data ready offset */
icsr_null_to: 6; /* Null timeout */
} icsr_fields_s;
@@ -274,9 +274,9 @@ typedef union io_perf_sel {
u64 perf_sel_reg;
struct {
u64 perf_rsvd : 48,
- perf_icct : 8,
- perf_ippr1 : 4,
- perf_ippr0 : 4;
+ perf_icct : 8,
+ perf_ippr1 : 4,
+ perf_ippr0 : 4;
} perf_sel_bits;
} io_perf_sel_t;
@@ -287,8 +287,8 @@ typedef union io_perf_cnt {
u64 perf_cnt;
struct {
u64 perf_rsvd1 : 32,
- perf_rsvd2 : 12,
- perf_cnt : 20;
+ perf_rsvd2 : 12,
+ perf_cnt : 20;
} perf_cnt_bits;
} io_perf_cnt_t;
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index a8919dcc93c..2acf3e844f0 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -63,17 +63,7 @@
addu k1, k0
LONG_L k1, %lo(kernelsp)(k1)
#endif
-#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
- MFC0 k1, CP0_CONTEXT
- dsra k1, 23
- lui k0, %hi(pgd_current)
- addiu k0, %lo(pgd_current)
- dsubu k1, k0
- lui k0, %hi(kernelsp)
- daddu k1, k0
- LONG_L k1, %lo(kernelsp)(k1)
-#endif
-#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
+#ifdef CONFIG_64BIT
MFC0 k1, CP0_CONTEXT
lui k0, %highest(kernelsp)
dsrl k1, 23
@@ -91,11 +81,7 @@
mfc0 \temp, CP0_CONTEXT
srl \temp, 23
#endif
-#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
- lw \temp, TI_CPU(gp)
- dsll \temp, 3
-#endif
-#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
+#ifdef CONFIG_64BIT
MFC0 \temp, CP0_CONTEXT
dsrl \temp, 23
#endif
@@ -103,7 +89,7 @@
.endm
#else
.macro get_saved_sp /* Uniprocessor variation */
-#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
+#ifdef CONFIG_64BIT
lui k1, %highest(kernelsp)
daddiu k1, %higher(kernelsp)
dsll k1, k1, 16
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index ddae9bae31a..4097fac5ac3 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -286,10 +286,10 @@ extern void __xchg_called_with_bad_pointer(void);
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
{
switch (size) {
- case 4:
- return __xchg_u32(ptr, x);
- case 8:
- return __xchg_u64(ptr, x);
+ case 4:
+ return __xchg_u32(ptr, x);
+ case 8:
+ return __xchg_u64(ptr, x);
}
__xchg_called_with_bad_pointer();
return x;
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index c29c65b7818..fa6d04dac56 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -77,7 +77,7 @@ struct termios {
#define IXANY 0004000 /* Any character will restart after stop. */
#define IXOFF 0010000 /* Enable start/stop input control. */
#define IMAXBEL 0020000 /* Ring bell when input queue is full. */
-#define IUTF8 0040000 /* Input is UTF8 */
+#define IUTF8 0040000 /* Input is UTF-8 */
/* c_oflag bits */
#define OPOST 0000001 /* Perform output processing. */
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index fa193f861e7..f8d97dafd2f 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -31,7 +31,7 @@ struct thread_info {
int preempt_count; /* 0 => preemptable, <0 => BUG */
mm_segment_t addr_limit; /* thread address space:
- 0-0xBFFFFFFF for user-thead
+ 0-0xBFFFFFFF for user-thead
0-0xFFFFFFFF for kernel-thread
*/
struct restart_block restart_block;
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 05:52:49 +0000