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Diffstat (limited to 'include/asm-ppc/ibm_ocp.h')
-rw-r--r--include/asm-ppc/ibm_ocp.h31
1 files changed, 30 insertions, 1 deletions
diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
index 8c61d93043a..6f10a25bd62 100644
--- a/include/asm-ppc/ibm_ocp.h
+++ b/include/asm-ppc/ibm_ocp.h
@@ -67,10 +67,13 @@ struct ocp_func_emac_data {
int phy_mode; /* PHY type or configurable mode */
u8 mac_addr[6]; /* EMAC mac address */
u32 phy_map; /* EMAC phy map */
+ u32 phy_feat_exc; /* Excluded PHY features */
};
/* Sysfs support */
#define OCP_SYSFS_EMAC_DATA() \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, rgmii_idx) \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, rgmii_mux) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_idx) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_mux) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_idx) \
@@ -78,9 +81,15 @@ OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_rx_chan) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_tx_chan) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, wol_irq) \
OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mdio_idx) \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, tah_idx) \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, phy_mode) \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "0x%08x\n", emac, phy_map) \
+OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "0x%08x\n", emac, phy_feat_exc)\
\
void ocp_show_emac_data(struct device *dev) \
{ \
+ device_create_file(dev, &dev_attr_emac_rgmii_idx); \
+ device_create_file(dev, &dev_attr_emac_rgmii_mux); \
device_create_file(dev, &dev_attr_emac_zmii_idx); \
device_create_file(dev, &dev_attr_emac_zmii_mux); \
device_create_file(dev, &dev_attr_emac_mal_idx); \
@@ -88,8 +97,25 @@ void ocp_show_emac_data(struct device *dev) \
device_create_file(dev, &dev_attr_emac_mal_tx_chan); \
device_create_file(dev, &dev_attr_emac_wol_irq); \
device_create_file(dev, &dev_attr_emac_mdio_idx); \
+ device_create_file(dev, &dev_attr_emac_tah_idx); \
+ device_create_file(dev, &dev_attr_emac_phy_mode); \
+ device_create_file(dev, &dev_attr_emac_phy_map); \
+ device_create_file(dev, &dev_attr_emac_phy_feat_exc); \
}
+/*
+ * PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
+ */
+#define PHY_MODE_NA 0
+#define PHY_MODE_MII 1
+#define PHY_MODE_RMII 2
+#define PHY_MODE_SMII 3
+#define PHY_MODE_RGMII 4
+#define PHY_MODE_TBI 5
+#define PHY_MODE_GMII 6
+#define PHY_MODE_RTBI 7
+#define PHY_MODE_SGMII 8
+
#ifdef CONFIG_40x
/*
* Helper function to copy MAC addresses from the bd_t to OCP EMAC
@@ -123,6 +149,7 @@ struct ocp_func_mal_data {
int txde_irq; /* TX Descriptor Error IRQ */
int rxde_irq; /* RX Descriptor Error IRQ */
int serr_irq; /* MAL System Error IRQ */
+ int dcr_base; /* MALx_CFG DCR number */
};
#define OCP_SYSFS_MAL_DATA() \
@@ -133,6 +160,7 @@ OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq) \
OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \
OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \
OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \
+OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, dcr_base) \
\
void ocp_show_mal_data(struct device *dev) \
{ \
@@ -143,6 +171,7 @@ void ocp_show_mal_data(struct device *dev) \
device_create_file(dev, &dev_attr_mal_txde_irq); \
device_create_file(dev, &dev_attr_mal_rxde_irq); \
device_create_file(dev, &dev_attr_mal_serr_irq); \
+ device_create_file(dev, &dev_attr_mal_dcr_base); \
}
/*
@@ -157,7 +186,7 @@ OCP_SYSFS_ADDTL(struct ocp_func_iic_data, "%d\n", iic, fast_mode) \
\
void ocp_show_iic_data(struct device *dev) \
{ \
- device_create_file(dev, &dev_attr_iic_fast_mode); \
+ device_create_file(dev, &dev_attr_iic_fast_mode); \
}
#endif /* __IBM_OCP_H__ */
#endif /* __KERNEL__ */