diff options
Diffstat (limited to 'include/linux/mfd/pcf50606/pmic.h')
-rw-r--r-- | include/linux/mfd/pcf50606/pmic.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/include/linux/mfd/pcf50606/pmic.h b/include/linux/mfd/pcf50606/pmic.h new file mode 100644 index 00000000000..3b17e738b8a --- /dev/null +++ b/include/linux/mfd/pcf50606/pmic.h @@ -0,0 +1,82 @@ +#ifndef __LINUX_MFD_PCF50606_PMIC_H +#define __LINUX_MFD_PCF50606_PMIC_H + +#include <linux/platform_device.h> + +#define PCF50606_REG_DCDC1 0x1b +#define PCF50606_REG_DCDC2 0x1c +#define PCF50606_REG_DCDC3 0x1d +#define PCF50606_REG_DCDC4 0x1e +#define PCF50606_REG_DCDEC1 0x1f +#define PCF50606_REG_DCDEC2 0x20 +#define PCF50606_REG_DCUDC1 0x21 +#define PCF50606_REG_DCUDC2 0x22 +#define PCF50606_REG_IOREGC 0x23 +#define PCF50606_REG_D1REGC1 0x24 +#define PCF50606_REG_D2REGC1 0x25 +#define PCF50606_REG_D3REGC1 0x26 +#define PCF50606_REG_LPREGC1 0x27 +#define PCF50606_REG_LPREGC2 0x28 + +/* used by PSSC, PWROKM, PWROKS, */ +enum pcf50606_regu { + PCF50606_REGU_DCD = 0x01, /* DCD in phase 2 */ + PCF50606_REGU_DCDE = 0x02, /* DCDE in phase 2 */ + PCF50606_REGU_DCUD = 0x04, /* DCDU in phase 2 */ + PCF50606_REGU_IO = 0x08, /* IO in phase 2 */ + PCF50606_REGU_D1 = 0x10, /* D1 in phase 2 */ + PCF50606_REGU_D2 = 0x20, /* D2 in phase 2 */ + PCF50606_REGU_D3 = 0x40, /* D3 in phase 2 */ + PCF50606_REGU_LP = 0x80, /* LP in phase 2 */ +}; + +enum pcf50606_reg_dcdc4 { + PCF50606_DCDC4_MODE_AUTO = 0x00, + PCF50606_DCDC4_MODE_PWM = 0x01, + PCF50606_DCDC4_MODE_PCF = 0x02, + PCF50606_DCDC4_OFF_FLOAT = 0x00, + PCF50606_DCDC4_OFF_BYPASS = 0x04, + PCF50606_DCDC4_OFF_PULLDOWN = 0x08, + PCF50606_DCDC4_CURLIM_500mA = 0x00, + PCF50606_DCDC4_CURLIM_750mA = 0x10, + PCF50606_DCDC4_CURLIM_1000mA = 0x20, + PCF50606_DCDC4_CURLIM_1250mA = 0x30, + PCF50606_DCDC4_TOGGLE = 0x40, + PCF50606_DCDC4_REGSEL_DCDC2 = 0x80, +}; + +enum pcf50606_reg_dcdec2 { + PCF50606_DCDEC2_MODE_AUTO = 0x00, + PCF50606_DCDEC2_MODE_PWM = 0x01, + PCF50606_DCDEC2_MODE_PCF = 0x02, + PCF50606_DCDEC2_OFF_FLOAT = 0x00, + PCF50606_DCDEC2_OFF_BYPASS = 0x04, +}; + +enum pcf50606_reg_dcudc2 { + PCF50606_DCUDC2_MODE_AUTO = 0x00, + PCF50606_DCUDC2_MODE_PWM = 0x01, + PCF50606_DCUDC2_MODE_PCF = 0x02, + PCF50606_DCUDC2_OFF_FLOAT = 0x00, + PCF50606_DCUDC2_OFF_BYPASS = 0x04, +}; + +enum pcf50606_regulator_id { + PCF50606_REGULATOR_DCD, + PCF50606_REGULATOR_DCDE, + PCF50606_REGULATOR_DCUD, + PCF50606_REGULATOR_D1REG, + PCF50606_REGULATOR_D2REG, + PCF50606_REGULATOR_D3REG, + PCF50606_REGULATOR_LPREG, + PCF50606_REGULATOR_IOREG, + + /* Always last */ + PCF50606_NUM_REGULATORS +}; + +struct pcf50606_pmic { + struct platform_device *pdev[PCF50606_NUM_REGULATORS]; +}; +#endif + |