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-rw-r--r--include/asm-avr32/arch-at32ap/at32ap700x.h49
-rw-r--r--include/asm-avr32/arch-at32ap/board.h121
-rw-r--r--include/asm-avr32/arch-at32ap/cpu.h35
-rw-r--r--include/asm-avr32/arch-at32ap/gpio.h45
-rw-r--r--include/asm-avr32/arch-at32ap/init.h18
-rw-r--r--include/asm-avr32/arch-at32ap/io.h39
-rw-r--r--include/asm-avr32/arch-at32ap/irq.h14
-rw-r--r--include/asm-avr32/arch-at32ap/pm.h51
-rw-r--r--include/asm-avr32/arch-at32ap/portmux.h29
-rw-r--r--include/asm-avr32/arch-at32ap/smc.h113
-rw-r--r--include/asm-avr32/arch-at32ap/sram.h30
-rw-r--r--include/asm-m68k/unistd.h8
-rw-r--r--include/linux/harrier_defs.h212
-rw-r--r--include/linux/pci.h11
-rw-r--r--include/linux/pci_ids.h2
-rw-r--r--include/linux/slub_def.h1
16 files changed, 15 insertions, 763 deletions
diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
deleted file mode 100644
index d18a3053be0..00000000000
--- a/include/asm-avr32/arch-at32ap/at32ap700x.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Pin definitions for AT32AP7000.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_AT32AP700X_H__
-#define __ASM_ARCH_AT32AP700X_H__
-
-#define GPIO_PERIPH_A 0
-#define GPIO_PERIPH_B 1
-
-/*
- * Pin numbers identifying specific GPIO pins on the chip. They can
- * also be converted to IRQ numbers by passing them through
- * gpio_to_irq().
- */
-#define GPIO_PIOA_BASE (0)
-#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
-#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
-#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
-#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
-
-#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
-#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
-#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
-#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
-#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
-
-
-/*
- * DMAC peripheral hardware handshaking interfaces, used with dw_dmac
- */
-#define DMAC_MCI_RX 0
-#define DMAC_MCI_TX 1
-#define DMAC_DAC_TX 2
-#define DMAC_AC97_A_RX 3
-#define DMAC_AC97_A_TX 4
-#define DMAC_AC97_B_RX 5
-#define DMAC_AC97_B_TX 6
-#define DMAC_DMAREQ_0 7
-#define DMAC_DMAREQ_1 8
-#define DMAC_DMAREQ_2 9
-#define DMAC_DMAREQ_3 10
-
-#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
deleted file mode 100644
index e60e9076544..00000000000
--- a/include/asm-avr32/arch-at32ap/board.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Platform data definitions.
- */
-#ifndef __ASM_ARCH_BOARD_H
-#define __ASM_ARCH_BOARD_H
-
-#include <linux/types.h>
-
-#define GPIO_PIN_NONE (-1)
-
-/*
- * Clock rates for various on-board oscillators. The number of entries
- * in this array is chip-dependent.
- */
-extern unsigned long at32_board_osc_rates[];
-
-/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
-void at32_add_system_devices(void);
-
-#define ATMEL_MAX_UART 4
-extern struct platform_device *atmel_default_console_device;
-
-struct atmel_uart_data {
- short use_dma_tx; /* use transmit DMA? */
- short use_dma_rx; /* use receive DMA? */
- void __iomem *regs; /* virtual base address, if any */
-};
-void at32_map_usart(unsigned int hw_id, unsigned int line);
-struct platform_device *at32_add_device_usart(unsigned int id);
-
-struct eth_platform_data {
- u32 phy_mask;
- u8 is_rmii;
-};
-struct platform_device *
-at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
-
-struct spi_board_info;
-struct platform_device *
-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
-
-struct atmel_lcdfb_info;
-struct platform_device *
-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
- unsigned long fbmem_start, unsigned long fbmem_len,
- unsigned int pin_config);
-
-struct usba_platform_data;
-struct platform_device *
-at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
-
-struct ide_platform_data {
- u8 cs;
-};
-struct platform_device *
-at32_add_device_ide(unsigned int id, unsigned int extint,
- struct ide_platform_data *data);
-
-/* mask says which PWM channels to mux */
-struct platform_device *at32_add_device_pwm(u32 mask);
-
-/* depending on what's hooked up, not all SSC pins will be used */
-#define ATMEL_SSC_TK 0x01
-#define ATMEL_SSC_TF 0x02
-#define ATMEL_SSC_TD 0x04
-#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
-
-#define ATMEL_SSC_RK 0x10
-#define ATMEL_SSC_RF 0x20
-#define ATMEL_SSC_RD 0x40
-#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
-
-struct platform_device *
-at32_add_device_ssc(unsigned int id, unsigned int flags);
-
-struct i2c_board_info;
-struct platform_device *at32_add_device_twi(unsigned int id,
- struct i2c_board_info *b,
- unsigned int n);
-
-struct mci_platform_data;
-struct platform_device *
-at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
-
-struct ac97c_platform_data {
- unsigned short dma_rx_periph_id;
- unsigned short dma_tx_periph_id;
- unsigned short dma_controller_id;
- int reset_pin;
-};
-struct platform_device *
-at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);
-
-struct platform_device *at32_add_device_abdac(unsigned int id);
-struct platform_device *at32_add_device_psif(unsigned int id);
-
-struct cf_platform_data {
- int detect_pin;
- int reset_pin;
- int vcc_pin;
- int ready_pin;
- u8 cs;
-};
-struct platform_device *
-at32_add_device_cf(unsigned int id, unsigned int extint,
- struct cf_platform_data *data);
-
-/* NAND / SmartMedia */
-struct atmel_nand_data {
- int enable_pin; /* chip enable */
- int det_pin; /* card detect */
- int rdy_pin; /* ready/busy */
- u8 ale; /* address line number connected to ALE */
- u8 cle; /* address line number connected to CLE */
- u8 bus_width_16; /* buswidth is 16 bit */
- struct mtd_partition *(*partition_info)(int size, int *num_partitions);
-};
-struct platform_device *
-at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);
-
-#endif /* __ASM_ARCH_BOARD_H */
diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
deleted file mode 100644
index 44d0bfa1f40..00000000000
--- a/include/asm-avr32/arch-at32ap/cpu.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * AVR32 and (fake) AT91 CPU identification
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_CPU_H
-#define __ASM_ARCH_CPU_H
-
-/*
- * Only AT32AP7000 is defined for now. We can identify the specific
- * chip at runtime, but I'm not sure if it's really worth it.
- */
-#ifdef CONFIG_CPU_AT32AP700X
-# define cpu_is_at32ap7000() (1)
-#else
-# define cpu_is_at32ap7000() (0)
-#endif
-
-/*
- * Since this is AVR32, we will never run on any AT91 CPU. But these
- * definitions may reduce clutter in common drivers.
- */
-#define cpu_is_at91rm9200() (0)
-#define cpu_is_at91sam9xe() (0)
-#define cpu_is_at91sam9260() (0)
-#define cpu_is_at91sam9261() (0)
-#define cpu_is_at91sam9263() (0)
-#define cpu_is_at91sam9rl() (0)
-#define cpu_is_at91cap9() (0)
-
-#endif /* __ASM_ARCH_CPU_H */
diff --git a/include/asm-avr32/arch-at32ap/gpio.h b/include/asm-avr32/arch-at32ap/gpio.h
deleted file mode 100644
index 0180f584ef0..00000000000
--- a/include/asm-avr32/arch-at32ap/gpio.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_GPIO_H
-#define __ASM_AVR32_ARCH_GPIO_H
-
-#include <linux/compiler.h>
-#include <asm/irq.h>
-
-
-/* Some GPIO chips can manage IRQs; some can't. The exact numbers can
- * be changed if needed, but for the moment they're not configurable.
- */
-#define ARCH_NR_GPIOS (NR_GPIO_IRQS + 2 * 32)
-
-
-/* Arch-neutral GPIO API, supporting both "native" and external GPIOs. */
-#include <asm-generic/gpio.h>
-
-static inline int gpio_get_value(unsigned int gpio)
-{
- return __gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned int gpio, int value)
-{
- __gpio_set_value(gpio, value);
-}
-
-static inline int gpio_cansleep(unsigned int gpio)
-{
- return __gpio_cansleep(gpio);
-}
-
-
-static inline int gpio_to_irq(unsigned int gpio)
-{
- if (gpio < NR_GPIO_IRQS)
- return gpio + GPIO_IRQ_BASE;
- return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned int irq)
-{
- return irq - GPIO_IRQ_BASE;
-}
-
-#endif /* __ASM_AVR32_ARCH_GPIO_H */
diff --git a/include/asm-avr32/arch-at32ap/init.h b/include/asm-avr32/arch-at32ap/init.h
deleted file mode 100644
index bc40e3d4615..00000000000
--- a/include/asm-avr32/arch-at32ap/init.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * AT32AP platform initialization calls.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_AT32AP_INIT_H__
-#define __ASM_AVR32_AT32AP_INIT_H__
-
-void setup_platform(void);
-void setup_board(void);
-
-void at32_setup_serial_console(unsigned int usart_id);
-
-#endif /* __ASM_AVR32_AT32AP_INIT_H__ */
diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
deleted file mode 100644
index 4ec6abc68ea..00000000000
--- a/include/asm-avr32/arch-at32ap/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
-#define __ASM_AVR32_ARCH_AT32AP_IO_H
-
-/* For "bizarre" halfword swapping */
-#include <linux/byteorder/swabb.h>
-
-#if defined(CONFIG_AP700X_32_BIT_SMC)
-# define __swizzle_addr_b(addr) (addr ^ 3UL)
-# define __swizzle_addr_w(addr) (addr ^ 2UL)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) (x)
-# define ioswabl(a, x) (x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) swab16(x)
-# define __mem_ioswabl(a, x) swab32(x)
-#elif defined(CONFIG_AP700X_16_BIT_SMC)
-# define __swizzle_addr_b(addr) (addr ^ 1UL)
-# define __swizzle_addr_w(addr) (addr)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) (x)
-# define ioswabl(a, x) swahw32(x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) swab16(x)
-# define __mem_ioswabl(a, x) swahb32(x)
-#else
-# define __swizzle_addr_b(addr) (addr)
-# define __swizzle_addr_w(addr) (addr)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) swab16(x)
-# define ioswabl(a, x) swab32(x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) (x)
-# define __mem_ioswabl(a, x) (x)
-#endif
-
-#endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */
diff --git a/include/asm-avr32/arch-at32ap/irq.h b/include/asm-avr32/arch-at32ap/irq.h
deleted file mode 100644
index 608e350368c..00000000000
--- a/include/asm-avr32/arch-at32ap/irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_IRQ_H
-#define __ASM_AVR32_ARCH_IRQ_H
-
-#define EIM_IRQ_BASE NR_INTERNAL_IRQS
-#define NR_EIM_IRQS 32
-#define AT32_EXTINT(n) (EIM_IRQ_BASE + (n))
-
-#define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS)
-#define NR_GPIO_CTLR (5 /*internal*/ + 1 /*external*/)
-#define NR_GPIO_IRQS (NR_GPIO_CTLR * 32)
-
-#define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS)
-
-#endif /* __ASM_AVR32_ARCH_IRQ_H */
diff --git a/include/asm-avr32/arch-at32ap/pm.h b/include/asm-avr32/arch-at32ap/pm.h
deleted file mode 100644
index 979b355b77b..00000000000
--- a/include/asm-avr32/arch-at32ap/pm.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * AVR32 AP Power Management.
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_ARCH_PM_H
-#define __ASM_AVR32_ARCH_PM_H
-
-/* Possible arguments to the "sleep" instruction */
-#define CPU_SLEEP_IDLE 0
-#define CPU_SLEEP_FROZEN 1
-#define CPU_SLEEP_STANDBY 2
-#define CPU_SLEEP_STOP 3
-#define CPU_SLEEP_STATIC 5
-
-#ifndef __ASSEMBLY__
-extern void cpu_enter_idle(void);
-extern void cpu_enter_standby(unsigned long sdramc_base);
-
-extern bool disable_idle_sleep;
-
-static inline void cpu_disable_idle_sleep(void)
-{
- disable_idle_sleep = true;
-}
-
-static inline void cpu_enable_idle_sleep(void)
-{
- disable_idle_sleep = false;
-}
-
-static inline void cpu_idle_sleep(void)
-{
- /*
- * If we're using the COUNT and COMPARE registers for
- * timekeeping, we can't use the IDLE state.
- */
- if (disable_idle_sleep)
- cpu_relax();
- else
- cpu_enter_idle();
-}
-
-void intc_set_suspend_handler(unsigned long offset);
-#endif
-
-#endif /* __ASM_AVR32_ARCH_PM_H */
diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
deleted file mode 100644
index b1abe6b4e4e..00000000000
--- a/include/asm-avr32/arch-at32ap/portmux.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * AT32 portmux interface.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PORTMUX_H__
-#define __ASM_ARCH_PORTMUX_H__
-
-/*
- * Set up pin multiplexing, called from board init only.
- *
- * The following flags determine the initial state of the pin.
- */
-#define AT32_GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */
-#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
-#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */
-#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */
-#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */
-
-void at32_select_periph(unsigned int pin, unsigned int periph,
- unsigned long flags);
-void at32_select_gpio(unsigned int pin, unsigned long flags);
-void at32_reserve_pin(unsigned int pin);
-
-#endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
deleted file mode 100644
index c98eea44a70..00000000000
--- a/include/asm-avr32/arch-at32ap/smc.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Static Memory Controller for AT32 chips
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * Inspired by the OMAP2 General-Purpose Memory Controller interface
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_AT32AP_SMC_H
-#define __ARCH_AT32AP_SMC_H
-
-/*
- * All timing parameters are in nanoseconds.
- */
-struct smc_timing {
- /* Delay from address valid to assertion of given strobe */
- int ncs_read_setup;
- int nrd_setup;
- int ncs_write_setup;
- int nwe_setup;
-
- /* Pulse length of given strobe */
- int ncs_read_pulse;
- int nrd_pulse;
- int ncs_write_pulse;
- int nwe_pulse;
-
- /* Total cycle length of given operation */
- int read_cycle;
- int write_cycle;
-
- /* Minimal recovery times, will extend cycle if needed */
- int ncs_read_recover;
- int nrd_recover;
- int ncs_write_recover;
- int nwe_recover;
-};
-
-/*
- * All timing parameters are in clock cycles.
- */
-struct smc_config {
-
- /* Delay from address valid to assertion of given strobe */
- u8 ncs_read_setup;
- u8 nrd_setup;
- u8 ncs_write_setup;
- u8 nwe_setup;
-
- /* Pulse length of given strobe */
- u8 ncs_read_pulse;
- u8 nrd_pulse;
- u8 ncs_write_pulse;
- u8 nwe_pulse;
-
- /* Total cycle length of given operation */
- u8 read_cycle;
- u8 write_cycle;
-
- /* Bus width in bytes */
- u8 bus_width;
-
- /*
- * 0: Data is sampled on rising edge of NCS
- * 1: Data is sampled on rising edge of NRD
- */
- unsigned int nrd_controlled:1;
-
- /*
- * 0: Data is driven on falling edge of NCS
- * 1: Data is driven on falling edge of NWR
- */
- unsigned int nwe_controlled:1;
-
- /*
- * 0: NWAIT is disabled
- * 1: Reserved
- * 2: NWAIT is frozen mode
- * 3: NWAIT in ready mode
- */
- unsigned int nwait_mode:2;
-
- /*
- * 0: Byte select access type
- * 1: Byte write access type
- */
- unsigned int byte_write:1;
-
- /*
- * Number of clock cycles before data is released after
- * the rising edge of the read controlling signal
- *
- * Total cycles from SMC is tdf_cycles + 1
- */
- unsigned int tdf_cycles:4;
-
- /*
- * 0: TDF optimization disabled
- * 1: TDF optimization enabled
- */
- unsigned int tdf_mode:1;
-};
-
-extern void smc_set_timing(struct smc_config *config,
- const struct smc_timing *timing);
-
-extern int smc_set_configuration(int cs, const struct smc_config *config);
-extern struct smc_config *smc_get_configuration(int cs);
-
-#endif /* __ARCH_AT32AP_SMC_H */
diff --git a/include/asm-avr32/arch-at32ap/sram.h b/include/asm-avr32/arch-at32ap/sram.h
deleted file mode 100644
index 4838dae7601..00000000000
--- a/include/asm-avr32/arch-at32ap/sram.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Simple SRAM allocator
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_ARCH_SRAM_H
-#define __ASM_AVR32_ARCH_SRAM_H
-
-#include <linux/genalloc.h>
-
-extern struct gen_pool *sram_pool;
-
-static inline unsigned long sram_alloc(size_t len)
-{
- if (!sram_pool)
- return 0UL;
-
- return gen_pool_alloc(sram_pool, len);
-}
-
-static inline void sram_free(unsigned long addr, size_t len)
-{
- return gen_pool_free(sram_pool, addr, len);
-}
-
-#endif /* __ASM_AVR32_ARCH_SRAM_H */
diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h
index e72ba563f10..965abb8bc7f 100644
--- a/include/asm-m68k/unistd.h
+++ b/include/asm-m68k/unistd.h
@@ -325,10 +325,16 @@
#define __NR_fallocate 320
#define __NR_timerfd_settime 321
#define __NR_timerfd_gettime 322
+#define __NR_signalfd4 323
+#define __NR_eventfd2 324
+#define __NR_epoll_create1 325
+#define __NR_dup3 326
+#define __NR_pipe2 327
+#define __NR_inotify_init1 328
#ifdef __KERNEL__
-#define NR_syscalls 323
+#define NR_syscalls 329
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
diff --git a/include/linux/harrier_defs.h b/include/linux/harrier_defs.h
deleted file mode 100644
index efef11db790..00000000000
--- a/include/linux/harrier_defs.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * include/linux/harrier_defs.h
- *
- * Definitions for Motorola MCG Harrier North Bridge & Memory controller
- *
- * Author: Dale Farnsworth
- * dale.farnsworth@mvista.com
- *
- * Extracted from asm-ppc/harrier.h by:
- * Randy Vinson
- * rvinson@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASMPPC_HARRIER_DEFS_H
-#define __ASMPPC_HARRIER_DEFS_H
-
-#define HARRIER_DEFAULT_XCSR_BASE 0xfeff0000
-
-#define HARRIER_VEND_DEV_ID 0x1057480b
-
-#define HARRIER_VENI_OFF 0x00
-
-#define HARRIER_REVI_OFF 0x05
-#define HARRIER_UCTL_OFF 0xd0
-#define HARRIER_XTAL64_MASK 0x02
-
-#define HARRIER_MISC_CSR_OFF 0x1c
-#define HARRIER_RSTOUT 0x01000000
-#define HARRIER_SYSCON 0x08000000
-#define HARRIER_EREADY 0x10000000
-#define HARRIER_ERDYS 0x20000000
-
-/* Function exception registers */
-#define HARRIER_FEEN_OFF 0x40 /* enable */
-#define HARRIER_FEST_OFF 0x44 /* status */
-#define HARRIER_FEMA_OFF 0x48 /* mask */
-#define HARRIER_FECL_OFF 0x4c /* clear */
-
-#define HARRIER_FE_DMA 0x80
-#define HARRIER_FE_MIDB 0x40
-#define HARRIER_FE_MIM0 0x20
-#define HARRIER_FE_MIM1 0x10
-#define HARRIER_FE_MIP 0x08
-#define HARRIER_FE_UA0 0x04
-#define HARRIER_FE_UA1 0x02
-#define HARRIER_FE_ABT 0x01
-
-#define HARRIER_SERIAL_0_OFF 0xc0
-
-#define HARRIER_MBAR_OFF 0xe0
-#define HARRIER_MBAR_MSK 0xfffc0000
-#define HARRIER_MPIC_CSR_OFF 0xe4
-#define HARRIER_MPIC_OPI_ENABLE 0x40
-#define HARRIER_MPIC_IFEVP_OFF 0x10200
-#define HARRIER_MPIC_IFEVP_VECT_MSK 0xff
-#define HARRIER_MPIC_IFEDE_OFF 0x10210
-
-/*
- * Define the Memory Controller register offsets.
- */
-#define HARRIER_SDBA_OFF 0x110
-#define HARRIER_SDBB_OFF 0x114
-#define HARRIER_SDBC_OFF 0x118
-#define HARRIER_SDBD_OFF 0x11c
-#define HARRIER_SDBE_OFF 0x120
-#define HARRIER_SDBF_OFF 0x124
-#define HARRIER_SDBG_OFF 0x128
-#define HARRIER_SDBH_OFF 0x12c
-
-#define HARRIER_SDB_ENABLE 0x00000100
-#define HARRIER_SDB_SIZE_MASK 0xf
-#define HARRIER_SDB_SIZE_SHIFT 16
-#define HARRIER_SDB_BASE_MASK 0xff
-#define HARRIER_SDB_BASE_SHIFT 24
-
-/*
- * Define outbound register offsets.
- */
-#define HARRIER_OTAD0_OFF 0x220
-#define HARRIER_OTOF0_OFF 0x224
-#define HARRIER_OTAD1_OFF 0x228
-#define HARRIER_OTOF1_OFF 0x22c
-#define HARRIER_OTAD2_OFF 0x230
-#define HARRIER_OTOF2_OFF 0x234
-#define HARRIER_OTAD3_OFF 0x238
-#define HARRIER_OTOF3_OFF 0x23c
-
-#define HARRIER_OTADX_START_MSK 0xffff0000UL
-#define HARRIER_OTADX_END_MSK 0x0000ffffUL
-
-#define HARRIER_OTOFX_OFF_MSK 0xffff0000UL
-#define HARRIER_OTOFX_ENA 0x80UL
-#define HARRIER_OTOFX_WPE 0x10UL
-#define HARRIER_OTOFX_SGE 0x08UL
-#define HARRIER_OTOFX_RAE 0x04UL
-#define HARRIER_OTOFX_MEM 0x02UL
-#define HARRIER_OTOFX_IOM 0x01UL
-
-/*
- * Define generic message passing register offsets
- */
-/* Mirrored registers (visible from both PowerPC and PCI space) */
-#define HARRIER_XCSR_MP_BASE_OFF 0x290 /* base offset in XCSR space */
-#define HARRIER_PMEP_MP_BASE_OFF 0x100 /* base offset in PMEM space */
-#define HARRIER_MGOM0_OFF 0x00 /* outbound msg 0 */
-#define HARRIER_MGOM1_OFF 0x04 /* outbound msg 1 */
-#define HARRIER_MGOD_OFF 0x08 /* outbound doorbells */
-
-#define HARRIER_MGIM0_OFF 0x10 /* inbound msg 0 */
-#define HARRIER_MGIM1_OFF 0x14 /* inbound msg 1 */
-#define HARRIER_MGID_OFF 0x18 /* inbound doorbells */
-
-/* PowerPC-only registers */
-#define HARRIER_MGIDM_OFF 0x20 /* inbound doorbell mask */
-
-/* PCI-only registers */
-#define HARRIER_PMEP_MGST_OFF 0x20 /* (outbound) interrupt status */
-#define HARRIER_PMEP_MGMS_OFF 0x24 /* (outbound) interrupt mask */
-#define HARRIER_MG_OMI0 (1<<4)
-#define HARRIER_MG_OMI1 (1<<5)
-
-#define HARRIER_PMEP_MGODM_OFF 0x28 /* outbound doorbell mask */
-
-/*
- * Define PCI configuration space register offsets
- */
-#define HARRIER_XCSR_TO_PCFS_OFF 0x300
-
-/*
- * Define message passing attribute register offset
- */
-#define HARRIER_MPAT_OFF 0x44
-
-/*
- * Define inbound attribute register offsets.
- */
-#define HARRIER_ITSZ0_OFF 0x48
-#define HARRIER_ITAT0_OFF 0x4c
-
-#define HARRIER_ITSZ1_OFF 0x50
-#define HARRIER_ITAT1_OFF 0x54
-
-#define HARRIER_ITSZ2_OFF 0x58
-#define HARRIER_ITAT2_OFF 0x5c
-
-#define HARRIER_ITSZ3_OFF 0x60
-#define HARRIER_ITAT3_OFF 0x64
-
-/* inbound translation size constants */
-#define HARRIER_ITSZ_MSK 0xff
-#define HARRIER_ITSZ_4KB 0x00
-#define HARRIER_ITSZ_8KB 0x01
-#define HARRIER_ITSZ_16KB 0x02
-#define HARRIER_ITSZ_32KB 0x03
-#define HARRIER_ITSZ_64KB 0x04
-#define HARRIER_ITSZ_128KB 0x05
-#define HARRIER_ITSZ_256KB 0x06
-#define HARRIER_ITSZ_512KB 0x07
-#define HARRIER_ITSZ_1MB 0x08
-#define HARRIER_ITSZ_2MB 0x09
-#define HARRIER_ITSZ_4MB 0x0A
-#define HARRIER_ITSZ_8MB 0x0B
-#define HARRIER_ITSZ_16MB 0x0C
-#define HARRIER_ITSZ_32MB 0x0D
-#define HARRIER_ITSZ_64MB 0x0E
-#define HARRIER_ITSZ_128MB 0x0F
-#define HARRIER_ITSZ_256MB 0x10
-#define HARRIER_ITSZ_512MB 0x11
-#define HARRIER_ITSZ_1GB 0x12
-#define HARRIER_ITSZ_2GB 0x13
-
-/* inbound translation offset */
-#define HARRIER_ITOF_SHIFT 0x10
-#define HARRIER_ITOF_MSK 0xffff
-
-/* inbound translation atttributes */
-#define HARRIER_ITAT_PRE (1<<3)
-#define HARRIER_ITAT_RAE (1<<4)
-#define HARRIER_ITAT_WPE (1<<5)
-#define HARRIER_ITAT_MEM (1<<6)
-#define HARRIER_ITAT_ENA (1<<7)
-#define HARRIER_ITAT_GBL (1<<16)
-
-#define HARRIER_LBA_OFF 0x80
-#define HARRIER_LBA_MSK (1<<31)
-
-#define HARRIER_XCSR_SIZE 1024
-
-/* macros to calculate message passing register offsets */
-#define HARRIER_MP_XCSR(x) ((u32)HARRIER_XCSR_MP_BASE_OFF + (u32)x)
-
-#define HARRIER_MP_PMEP(x) ((u32)HARRIER_PMEP_MP_BASE_OFF + (u32)x)
-
-/*
- * Define PCI configuration space register offsets
- */
-#define HARRIER_MPBAR_OFF PCI_BASE_ADDRESS_0
-#define HARRIER_ITBAR0_OFF PCI_BASE_ADDRESS_1
-#define HARRIER_ITBAR1_OFF PCI_BASE_ADDRESS_2
-#define HARRIER_ITBAR2_OFF PCI_BASE_ADDRESS_3
-#define HARRIER_ITBAR3_OFF PCI_BASE_ADDRESS_4
-
-#define HARRIER_XCSR_CONFIG(x) ((u32)HARRIER_XCSR_TO_PCFS_OFF + (u32)x)
-
-#endif /* __ASMPPC_HARRIER_DEFS_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 825be3878f6..c0e14008a3c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -641,6 +641,7 @@ int pci_restore_state(struct pci_dev *dev);
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
+void pci_pme_active(struct pci_dev *dev, bool enable);
int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
pci_power_t pci_target_state(struct pci_dev *dev);
int pci_prepare_to_sleep(struct pci_dev *dev);
@@ -680,10 +681,12 @@ void pci_enable_bridges(struct pci_bus *bus);
/* Proper probing supporting hot-pluggable devices */
int __must_check __pci_register_driver(struct pci_driver *, struct module *,
const char *mod_name);
-static inline int __must_check pci_register_driver(struct pci_driver *driver)
-{
- return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
-}
+
+/*
+ * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
+ */
+#define pci_register_driver(driver) \
+ __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
void pci_unregister_driver(struct pci_driver *dev);
void pci_remove_behind_bridge(struct pci_dev *dev);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 35a78415acc..9ec2bcce8e8 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2177,8 +2177,6 @@
#define PCI_DEVICE_ID_HERC_WIN 0x5732
#define PCI_DEVICE_ID_HERC_UNI 0x5832
-#define PCI_VENDOR_ID_RDC 0x17f3
-
#define PCI_VENDOR_ID_SITECOM 0x182d
#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index 5bad61a93f6..2f5c16b1aac 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -46,6 +46,7 @@ struct kmem_cache_cpu {
struct kmem_cache_node {
spinlock_t list_lock; /* Protect partial list and nr_partial */
unsigned long nr_partial;
+ unsigned long min_partial;
struct list_head partial;
#ifdef CONFIG_SLUB_DEBUG
atomic_long_t nr_slabs;