diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/jbt6k74.h | 21 | ||||
| -rw-r--r-- | include/linux/mfd/pcf50606/adc.h | 72 | ||||
| -rw-r--r-- | include/linux/mfd/pcf50606/core.h | 172 | ||||
| -rw-r--r-- | include/linux/mfd/pcf50606/gpo.h | 42 | ||||
| -rw-r--r-- | include/linux/mfd/pcf50606/mbc.h | 52 | ||||
| -rw-r--r-- | include/linux/mfd/pcf50606/pmic.h | 73 | ||||
| -rw-r--r-- | include/sound/ac97_codec.h | 6 | ||||
| -rw-r--r-- | include/sound/soc-dai.h | 27 | ||||
| -rw-r--r-- | include/sound/soc-dapm.h | 1 | ||||
| -rw-r--r-- | include/sound/soc.h | 35 | ||||
| -rw-r--r-- | include/sound/uda1380.h | 22 | ||||
| -rw-r--r-- | include/sound/wm8993.h | 44 |
12 files changed, 550 insertions, 17 deletions
diff --git a/include/linux/jbt6k74.h b/include/linux/jbt6k74.h new file mode 100644 index 00000000000..75488c41136 --- /dev/null +++ b/include/linux/jbt6k74.h @@ -0,0 +1,21 @@ +#ifndef __JBT6K74_H__ +#define __JBT6K74_H__ + +#include <linux/spi/spi.h> + +/* + * struct jbt6k74_platform_data - Platform data for jbt6k74 driver + * @probe_completed: Callback to be called when the driver has been + * successfully probed. + * @enable_pixel_clock: Callback to enable or disable the pixelclock of the + * gpu. + * @gpio_reset: Reset gpio pin number. + */ +struct jbt6k74_platform_data { + void (*probe_completed)(struct device *dev); + void (*enable_pixel_clock)(struct device *dev, int enable); + + int gpio_reset; +}; + +#endif diff --git a/include/linux/mfd/pcf50606/adc.h b/include/linux/mfd/pcf50606/adc.h new file mode 100644 index 00000000000..fd4840300dd --- /dev/null +++ b/include/linux/mfd/pcf50606/adc.h @@ -0,0 +1,72 @@ +/* + * adc.h -- Driver for NXP PCF50606 ADC + * + * (C) 2006-2008 by Openmoko, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __LINUX_MFD_PCF50606_ADC_H +#define __LINUX_MFD_PCF50606_ADC_H + +#include <linux/mfd/pcf50633/core.h> +#include <linux/platform_device.h> + +/* ADC Registers */ +#define PCF50606_REG_ADCC1 0x2e +#define PCF50606_REG_ADCC2 0x2f +#define PCF50606_REG_ADCS1 0x30 +#define PCF50606_REG_ADCS2 0x31 +#define PCF50606_REG_ADCS3 0x32 + +#define PCF50606_ADCC1_TSCMODACT 0x01 +#define PCF50606_ADCC1_TSCMODSTB 0x02 +#define PCF50606_ADCC1_TRATSET 0x04 +#define PCF50606_ADCC1_NTCSWAPE 0x08 +#define PCF50606_ADCC1_NTCSWAOFF 0x10 +#define PCF50606_ADCC1_EXTSYNCBREAK 0x20 + /* reserved */ +#define PCF50606_ADCC1_TSCINT 0x80 + +#define PCF50606_ADCC2_ADCSTART 0x01 + /* see enum pcf50606_adcc2_adcmux */ +#define PCF50606_ADCC2_SYNC_NONE 0x00 +#define PCF50606_ADCC2_SYNC_TXON 0x20 +#define PCF50606_ADCC2_SYNC_PWREN1 0x40 +#define PCF50606_ADCC2_SYNC_PWREN2 0x60 +#define PCF50606_ADCC2_RES_10BIT 0x00 +#define PCF50606_ADCC2_RES_8BIT 0x80 + +#define PCF50606_ADCC2_ADCMUX_MASK (0xf << 1) + +#define ADCMUX_SHIFT 1 +#define PCF50606_ADCMUX_BATVOLT_RES (0x0 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_BATVOLT_SUBTR (0x1 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_ADCIN1_RES (0x2 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_ADCIN1_SUBTR (0x3 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_BATTEMP (0x4 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_ADCIN2 (0x5 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_ADCIN3 (0x6 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_ADCIN3_RATIO (0x7 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_XPOS (0x8 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_YPOS (0x9 << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_P1 (0xa << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_P2 (0xb << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_BATVOLT_ADCIN1 (0xc << ADCMUX_SHIFT) +#define PCF50606_ADCMUX_XY_SEQUENCE (0xe << ADCMUX_SHIFT) +#define PCF50606_P1_P2_RESISTANCE (0xf << ADCMUX_SHIFT) + +#define PCF50606_ADCS2_ADCRDY 0x80 + +extern int +pcf50606_adc_async_read(struct pcf50606 *pcf, int mux, + void (*callback)(struct pcf50606 *, void *, int), + void *callback_param); +extern int +pcf50606_adc_sync_read(struct pcf50606 *pcf, int mux); + +#endif /* __LINUX_PCF50606_ADC_H */ diff --git a/include/linux/mfd/pcf50606/core.h b/include/linux/mfd/pcf50606/core.h new file mode 100644 index 00000000000..e036e07064c --- /dev/null +++ b/include/linux/mfd/pcf50606/core.h @@ -0,0 +1,172 @@ +/* + * core.h -- Core driver for NXP PCF50606 + * + * (C) 2006-2008 by Openmoko, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __LINUX_MFD_PCF50606_CORE_H +#define __LINUX_MFD_PCF50606_CORE_H + +#include <linux/i2c.h> +#include <linux/workqueue.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/machine.h> +#include <linux/power_supply.h> + +struct pcf50606; + +#define PCF50606_NUM_REGULATORS 8 + +struct pcf50606_platform_data { + struct regulator_init_data reg_init_data[PCF50606_NUM_REGULATORS]; + + char **batteries; + int num_batteries; + + /* Callbacks */ + void (*probe_done)(struct pcf50606 *); + void (*mbc_event_callback)(struct pcf50606 *, int); + void (*regulator_registered)(struct pcf50606 *, int); + void (*force_shutdown)(struct pcf50606 *); + + u8 resumers[3]; +}; + +struct pcf50606_irq { + void (*handler)(int, void *); + void *data; +}; + +int pcf50606_register_irq(struct pcf50606 *pcf, int irq, + void (*handler) (int, void *), void *data); +int pcf50606_free_irq(struct pcf50606 *pcf, int irq); + +int pcf50606_irq_mask(struct pcf50606 *pcf, int irq); +int pcf50606_irq_unmask(struct pcf50606 *pcf, int irq); +int pcf50606_irq_mask_get(struct pcf50606 *pcf, int irq); + +int pcf50606_read_block(struct pcf50606 *, u8 reg, + int nr_regs, u8 *data); +int pcf50606_write_block(struct pcf50606 *pcf, u8 reg, + int nr_regs, u8 *data); +u8 pcf50606_reg_read(struct pcf50606 *, u8 reg); +int pcf50606_reg_write(struct pcf50606 *pcf, u8 reg, u8 val); + +int pcf50606_reg_set_bit_mask(struct pcf50606 *pcf, u8 reg, u8 mask, u8 val); +int pcf50606_reg_clear_bits(struct pcf50606 *pcf, u8 reg, u8 bits); + +/* Interrupt registers */ + +#define PCF50606_REG_INT1 0x02 +#define PCF50606_REG_INT2 0x03 +#define PCF50606_REG_INT3 0x04 + +#define PCF50606_REG_INT1M 0x05 +#define PCF50606_REG_INT2M 0x06 +#define PCF50606_REG_INT3M 0x07 + +enum { + /* Chip IRQs */ + PCF50606_IRQ_ONKEYR, + PCF50606_IRQ_ONKEYF, + PCF50606_IRQ_ONKEY1S, + PCF50606_IRQ_EXTONR, + PCF50606_IRQ_EXTONF, + PCF50606_IRQ_RESERVED_1, + PCF50606_IRQ_SECOND, + PCF50606_IRQ_ALARM, + PCF50606_IRQ_CHGINS, + PCF50606_IRQ_CHGRM, + PCF50606_IRQ_CHGFOK, + PCF50606_IRQ_CHGERR, + PCF50606_IRQ_CHGFRDY, + PCF50606_IRQ_CHGPROT, + PCF50606_IRQ_CHGWD10S, + PCF50606_IRQ_CHGWDEXP, + PCF50606_IRQ_ADCRDY, + PCF50606_IRQ_ACDINS, + PCF50606_IRQ_ACDREM, + PCF50606_IRQ_TSCPRES, + PCF50606_IRQ_RESERVED_2, + PCF50606_IRQ_RESERVED_3, + PCF50606_IRQ_LOWBAT, + PCF50606_IRQ_HIGHTMP, + + /* Always last */ + PCF50606_NUM_IRQ, +}; + +struct pcf50606 { + struct device *dev; + struct i2c_client *i2c_client; + + struct pcf50606_platform_data *pdata; + int irq; + struct pcf50606_irq irq_handler[PCF50606_NUM_IRQ]; + struct work_struct irq_work; + struct mutex lock; + + u8 mask_regs[3]; + + u8 suspend_irq_masks[3]; + u8 resume_reason[3]; + int is_suspended; + + int onkey1s_held; + + struct platform_device *rtc_pdev; + struct platform_device *mbc_pdev; + struct platform_device *adc_pdev; + struct platform_device *input_pdev; + struct platform_device *wdt_pdev; + struct platform_device *regulator_pdev[PCF50606_NUM_REGULATORS]; +}; + +enum pcf50606_reg_int1 { + PCF50606_INT1_ONKEYR = 0x01, /* ONKEY rising edge */ + PCF50606_INT1_ONKEYF = 0x02, /* ONKEY falling edge */ + PCF50606_INT1_ONKEY1S = 0x04, /* OMKEY at least 1sec low */ + PCF50606_INT1_EXTONR = 0x08, /* EXTON rising edge */ + PCF50606_INT1_EXTONF = 0x10, /* EXTON falling edge */ + PCF50606_INT1_SECOND = 0x40, /* RTC periodic second interrupt */ + PCF50606_INT1_ALARM = 0x80, /* RTC alarm time is reached */ +}; + +enum pcf50606_reg_int2 { + PCF50606_INT2_CHGINS = 0x01, /* Charger inserted */ + PCF50606_INT2_CHGRM = 0x02, /* Charger removed */ + PCF50606_INT2_CHGFOK = 0x04, /* Fast charging OK */ + PCF50606_INT2_CHGERR = 0x08, /* Error in charging mode */ + PCF50606_INT2_CHGFRDY = 0x10, /* Fast charge completed */ + PCF50606_INT2_CHGPROT = 0x20, /* Charging protection interrupt */ + PCF50606_INT2_CHGWD10S = 0x40, /* Charger watchdig expires in 10s */ + PCF50606_INT2_CHGWDEXP = 0x80, /* Charger watchdog expires */ +}; + +enum pcf50606_reg_int3 { + PCF50606_INT3_ADCRDY = 0x01, /* ADC conversion finished */ + PCF50606_INT3_ACDINS = 0x02, /* Accessory inserted */ + PCF50606_INT3_ACDREM = 0x04, /* Accessory removed */ + PCF50606_INT3_TSCPRES = 0x08, /* Touch screen pressed */ + PCF50606_INT3_LOWBAT = 0x40, /* Low battery voltage */ + PCF50606_INT3_HIGHTMP = 0x80, /* High temperature */ +}; + +/* Misc regs */ + +#define PCF50606_REG_OOCC1 0x08 +#define PCF50606_OOCC1_GOSTDBY 0x01 + +static inline struct pcf50606 *dev_to_pcf50606(struct device *dev) +{ + return dev_get_drvdata(dev); +} + +#endif + diff --git a/include/linux/mfd/pcf50606/gpo.h b/include/linux/mfd/pcf50606/gpo.h new file mode 100644 index 00000000000..081b127d754 --- /dev/null +++ b/include/linux/mfd/pcf50606/gpo.h @@ -0,0 +1,42 @@ +/* + * gpo.h -- GPO driver for NXP PCF50606 + * + * (C) 2006-2008 by Openmoko, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __LINUX_MFD_PCF50606_GPO_H +#define __LINUX_MFD_PCF50606_GPO_H + +#include <linux/mfd/pcf50633/core.h> + +#define PCF50606_REG_GPOC1 0x38 +#define PCF50606_REG_GPOC2 0x39 +#define PCF50606_REG_GPOC3 0x3a +#define PCF50606_REG_GPOC4 0x3b +#define PCF50606_REG_GPOC5 0x3c + +#define PCF50606_GPO1 PCF50606_REG_GPOC1 +#define PCF50606_GPO2 PCF50606_REG_GPOC1 +#define PCF50606_GPOOD1 PCF50606_REG_GPOC2 +#define PCF50606_GPOOD2 PCF50606_REG_GPOC3 +#define PCF50606_GPOOD3 PCF50606_REG_GPOC4 +#define PCF50606_GPOOD4 PCF50606_REG_GPOC5 + +#define PCF50606_GPOCFG_GPOSEL_MASK 0x07 + +void pcf50606_gpo_set_active(struct pcf50606 *pcf, int gpo, int value); +int pcf50606_gpo_get_active(struct pcf50606 *pcf, int gpo); +void pcf50606_gpo_set_standby(struct pcf50606 *pcf, int gpo, int value); +int pcf50606_gpo_get_standby(struct pcf50606 *pcf, int gpo); + +void pcf50606_gpo_invert_set(struct pcf50606 *, int gpo, int invert); +int pcf50606_gpo_invert_get(struct pcf50606 *pcf, int gpo); + +#endif /* __LINUX_MFD_PCF50606_GPIO_H */ + diff --git a/include/linux/mfd/pcf50606/mbc.h b/include/linux/mfd/pcf50606/mbc.h new file mode 100644 index 00000000000..b793d703a64 --- /dev/null +++ b/include/linux/mfd/pcf50606/mbc.h @@ -0,0 +1,52 @@ +/* + * mbc.h -- Driver for NXP PCF50606 Main Battery Charger + * + * (C) 2006-2008 by Openmoko, Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __LINUX_MFD_PCF50606_MBC_H +#define __LINUX_MFD_PCF50606_MBC_H + +#include <linux/mfd/pcf50606/core.h> +#include <linux/platform_device.h> + +#define PCF50606_REG_OOCS 0x01 + +/* Charger OK */ +#define PCF50606_OOCS_CHGOK 0x20 + +#define PCF50606_REG_MBCC1 0x29 +#define PCF50606_REG_MBCC2 0x2a +#define PCF50606_REG_MBCC3 0x2b +#define PCF50606_REG_MBCS1 0x2c + +#define PCF50606_MBCC1_CHGAPE 0x01 +#define PCF50606_MBCC1_AUTOFST 0x02 +#define PCF50606_MBCC1_CHGMOD_MASK 0x1c +#define PCF50606_MBCC1_CHGMOD_QUAL 0x00 +#define PCF50606_MBCC1_CHGMOD_PRE 0x04 +#define PCF50606_MBCC1_CHGMOD_TRICKLE 0x08 +#define PCF50606_MBCC1_CHGMOD_FAST_CCCV 0x0c +#define PCF50606_MBCC1_CHGMOD_FAST_NOCC 0x10 +#define PCF50606_MBCC1_CHGMOD_FAST_NOCV 0x14 +#define PCF50606_MBCC1_CHGMOD_FAST_SW 0x18 +#define PCF50606_MBCC1_CHGMOD_IDLE 0x1c +#define PCF50606_MBCC1_DETMOD_LOWCHG 0x20 +#define PCF50606_MBCC1_DETMOD_WDRST 0x40 + +#define PCF50606_MBCC1_CHGMOD_SHIFT 2 + +/* Charger status */ +#define PCF50606_MBC_CHARGER_ONLINE 0x01 +#define PCF50606_MBC_CHARGER_ACTIVE 0x02 + +void pcf50606_charge_fast(struct pcf50606 *pcf, int on); + +#endif + diff --git a/include/linux/mfd/pcf50606/pmic.h b/include/linux/mfd/pcf50606/pmic.h new file mode 100644 index 00000000000..1bcfe39025b --- /dev/null +++ b/include/linux/mfd/pcf50606/pmic.h @@ -0,0 +1,73 @@ +#ifndef __LINUX_MFD_PCF50606_PMIC_H +#define __LINUX_MFD_PCF50606_PMIC_H + +#define PCF50606_REG_DCDC1 0x1b +#define PCF50606_REG_DCDC2 0x1c +#define PCF50606_REG_DCDC3 0x1d +#define PCF50606_REG_DCDC4 0x1e +#define PCF50606_REG_DCDEC1 0x1f +#define PCF50606_REG_DCDEC2 0x20 +#define PCF50606_REG_DCUDC1 0x21 +#define PCF50606_REG_DCUDC2 0x22 +#define PCF50606_REG_IOREGC 0x23 +#define PCF50606_REG_D1REGC1 0x24 +#define PCF50606_REG_D2REGC1 0x25 +#define PCF50606_REG_D3REGC1 0x26 +#define PCF50606_REG_LPREGC1 0x27 +#define PCF50606_REG_LPREGC2 0x28 + +/* used by PSSC, PWROKM, PWROKS, */ +enum pcf50606_regu { + PCF50606_REGU_DCD = 0x01, /* DCD in phase 2 */ + PCF50606_REGU_DCDE = 0x02, /* DCDE in phase 2 */ + PCF50606_REGU_DCUD = 0x04, /* DCDU in phase 2 */ + PCF50606_REGU_IO = 0x08, /* IO in phase 2 */ + PCF50606_REGU_D1 = 0x10, /* D1 in phase 2 */ + PCF50606_REGU_D2 = 0x20, /* D2 in phase 2 */ + PCF50606_REGU_D3 = 0x40, /* D3 in phase 2 */ + PCF50606_REGU_LP = 0x80, /* LP in phase 2 */ +}; + +enum pcf50606_reg_dcdc4 { + PCF50606_DCDC4_MODE_AUTO = 0x00, + PCF50606_DCDC4_MODE_PWM = 0x01, + PCF50606_DCDC4_MODE_PCF = 0x02, + PCF50606_DCDC4_OFF_FLOAT = 0x00, + PCF50606_DCDC4_OFF_BYPASS = 0x04, + PCF50606_DCDC4_OFF_PULLDOWN = 0x08, + PCF50606_DCDC4_CURLIM_500mA = 0x00, + PCF50606_DCDC4_CURLIM_750mA = 0x10, + PCF50606_DCDC4_CURLIM_1000mA = 0x20, + PCF50606_DCDC4_CURLIM_1250mA = 0x30, + PCF50606_DCDC4_TOGGLE = 0x40, + PCF50606_DCDC4_REGSEL_DCDC2 = 0x80, +}; + +enum pcf50606_reg_dcdec2 { + PCF50606_DCDEC2_MODE_AUTO = 0x00, + PCF50606_DCDEC2_MODE_PWM = 0x01, + PCF50606_DCDEC2_MODE_PCF = 0x02, + PCF50606_DCDEC2_OFF_FLOAT = 0x00, + PCF50606_DCDEC2_OFF_BYPASS = 0x04, +}; + +enum pcf50606_reg_dcudc2 { + PCF50606_DCUDC2_MODE_AUTO = 0x00, + PCF50606_DCUDC2_MODE_PWM = 0x01, + PCF50606_DCUDC2_MODE_PCF = 0x02, + PCF50606_DCUDC2_OFF_FLOAT = 0x00, + PCF50606_DCUDC2_OFF_BYPASS = 0x04, +}; + +enum pcf50606_regulator_id { + PCF50606_REGULATOR_DCD, + PCF50606_REGULATOR_DCDE, + PCF50606_REGULATOR_DCUD, + PCF50606_REGULATOR_D1REG, + PCF50606_REGULATOR_D2REG, + PCF50606_REGULATOR_D3REG, + PCF50606_REGULATOR_LPREG, + PCF50606_REGULATOR_IOREG, +}; + +#endif diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h index 251fc1cd500..9b1c0985480 100644 --- a/include/sound/ac97_codec.h +++ b/include/sound/ac97_codec.h @@ -642,4 +642,10 @@ int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime); /* ad hoc AC97 device driver access */ extern struct bus_type ac97_bus_type; +/* AC97 platform_data adding function */ +static inline void snd_ac97_dev_add_pdata(struct snd_ac97 *ac97, void *data) +{ + ac97->dev.platform_data = data; +} + #endif /* __SOUND_AC97_CODEC_H */ diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 352d7eee9b6..25d62ac53fc 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -27,8 +27,8 @@ struct snd_pcm_substream; #define SND_SOC_DAIFMT_I2S 0 /* I2S mode */ #define SND_SOC_DAIFMT_RIGHT_J 1 /* Right Justified mode */ #define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */ -#define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM LRC */ -#define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM LRC */ +#define SND_SOC_DAIFMT_DSP_A 3 /* L data MSB after FRM LRC */ +#define SND_SOC_DAIFMT_DSP_B 4 /* L data MSB during FRM LRC */ #define SND_SOC_DAIFMT_AC97 5 /* AC97 */ /* left and right justified also known as MSB and LSB respectively */ @@ -38,7 +38,7 @@ struct snd_pcm_substream; /* * DAI Clock gating. * - * DAI bit clocks can be be gated (disabled) when not the DAI is not + * DAI bit clocks can be be gated (disabled) when the DAI is not * sending or receiving PCM data in a frame. This can be used to save power. */ #define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */ @@ -51,21 +51,21 @@ struct snd_pcm_substream; * format. */ #define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */ -#define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */ -#define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */ -#define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */ +#define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal BCLK + inv FRM */ +#define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert BCLK + nor FRM */ +#define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert BCLK + FRM */ /* * DAI hardware clock masters. * * This is wrt the codec, the inverse is true for the interface - * i.e. if the codec is clk and frm master then the interface is + * i.e. if the codec is clk and FRM master then the interface is * clk and frame slave. */ -#define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */ -#define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */ +#define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & FRM master */ +#define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & FRM master */ #define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */ -#define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */ +#define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & FRM slave */ #define SND_SOC_DAIFMT_FORMAT_MASK 0x000f #define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 @@ -116,12 +116,12 @@ int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute); /* * Digital Audio Interface. * - * Describes the Digital Audio Interface in terms of it's ALSA, DAI and AC97 - * operations an capabilities. Codec and platfom drivers will register a this + * Describes the Digital Audio Interface in terms of its ALSA, DAI and AC97 + * operations and capabilities. Codec and platform drivers will register this * structure for every DAI they have. * * This structure covers the clocking, formating and ALSA operations for each - * interface a + * interface. */ struct snd_soc_dai_ops { /* @@ -179,6 +179,7 @@ struct snd_soc_dai { int ac97_control; struct device *dev; + void *ac97_pdata; /* platform_data for the ac97 codec */ /* DAI callbacks */ int (*probe)(struct platform_device *pdev, diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index ec8a45f9a06..35814ced2d2 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -279,6 +279,7 @@ int snd_soc_dapm_add_routes(struct snd_soc_codec *codec, /* dapm events */ int snd_soc_dapm_stream_event(struct snd_soc_codec *codec, char *stream, int event); +void snd_soc_dapm_shutdown(struct snd_soc_device *socdev); /* dapm sys fs - used by the core */ int snd_soc_dapm_sys_add(struct device *dev); diff --git a/include/sound/soc.h b/include/sound/soc.h index cf6111d72b1..756fb59772d 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -135,6 +135,28 @@ .info = snd_soc_info_volsw, \ .get = xhandler_get, .put = xhandler_put, \ .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } +#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\ + xhandler_get, xhandler_put, tlv_array) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ + .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ + SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .tlv.p = (tlv_array), \ + .info = snd_soc_info_volsw, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = (unsigned long)&(struct soc_mixer_control) \ + {.reg = xreg, .shift = shift_left, .rshift = shift_right, \ + .max = xmax, .invert = xinvert} } +#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\ + xhandler_get, xhandler_put, tlv_array) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ + .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ + SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .tlv.p = (tlv_array), \ + .info = snd_soc_info_volsw_2r, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = (unsigned long)&(struct soc_mixer_control) \ + {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ + .max = xmax, .invert = xinvert} } #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ .info = snd_soc_info_bool_ext, \ @@ -191,6 +213,12 @@ int snd_soc_register_platform(struct snd_soc_platform *platform); void snd_soc_unregister_platform(struct snd_soc_platform *platform); int snd_soc_register_codec(struct snd_soc_codec *codec); void snd_soc_unregister_codec(struct snd_soc_codec *codec); +int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, int reg); + +#ifdef CONFIG_PM +int snd_soc_suspend_device(struct device *dev); +int snd_soc_resume_device(struct device *dev); +#endif /* pcm <-> DAI connect */ void snd_soc_free_pcms(struct snd_soc_device *socdev); @@ -216,9 +244,9 @@ void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, /* codec register bit access */ int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, - unsigned short mask, unsigned short value); + unsigned int mask, unsigned int value); int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, - unsigned short mask, unsigned short value); + unsigned int mask, unsigned int value); int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, struct snd_ac97_bus_ops *ops, int num); @@ -356,6 +384,7 @@ struct snd_soc_codec { int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); int (*display_register)(struct snd_soc_codec *, char *, size_t, unsigned int); + int (*volatile_register)(unsigned int); hw_write_t hw_write; hw_read_t hw_read; void *reg_cache; @@ -369,8 +398,6 @@ struct snd_soc_codec { enum snd_soc_bias_level bias_level; enum snd_soc_bias_level suspend_bias_level; struct delayed_work delayed_work; - struct list_head up_list; - struct list_head down_list; /* codec DAI's */ struct snd_soc_dai *dai; diff --git a/include/sound/uda1380.h b/include/sound/uda1380.h new file mode 100644 index 00000000000..381319c7000 --- /dev/null +++ b/include/sound/uda1380.h @@ -0,0 +1,22 @@ +/* + * UDA1380 ALSA SoC Codec driver + * + * Copyright 2009 Philipp Zabel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UDA1380_H +#define __UDA1380_H + +struct uda1380_platform_data { + int gpio_power; + int gpio_reset; + int dac_clk; +#define UDA1380_DAC_CLK_SYSCLK 0 +#define UDA1380_DAC_CLK_WSPLL 1 +}; + +#endif /* __UDA1380_H */ diff --git a/include/sound/wm8993.h b/include/sound/wm8993.h new file mode 100644 index 00000000000..9c661f2f8cd --- /dev/null +++ b/include/sound/wm8993.h @@ -0,0 +1,44 @@ +/* + * linux/sound/wm8993.h -- Platform data for WM8993 + * + * Copyright 2009 Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_WM8993_H +#define __LINUX_SND_WM8993_H + +/* Note that EQ1 only contains the enable/disable bit so will be + ignored but is included for simplicity. + */ +struct wm8993_retune_mobile_setting { + const char *name; + unsigned int rate; + u16 config[24]; +}; + +struct wm8993_platform_data { + struct wm8993_retune_mobile_setting *retune_configs; + int num_retune_configs; + + /* LINEOUT can be differential or single ended */ + unsigned int lineout1_diff:1; + unsigned int lineout2_diff:1; + + /* Common mode feedback */ + unsigned int lineout1fb:1; + unsigned int lineout2fb:1; + + /* Microphone biases: 0=0.9*AVDD1 1=0.65*AVVD1 */ + unsigned int micbias1_lvl:1; + unsigned int micbias2_lvl:1; + + /* Jack detect threashold levels, see datasheet for values */ + unsigned int jd_scthr:2; + unsigned int jd_thr:2; +}; + +#endif |