diff options
Diffstat (limited to 'include')
117 files changed, 3006 insertions, 2051 deletions
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index 740c297eb11..46a0402696d 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -38,8 +38,6 @@ struct clk { struct clk_functions { int (*clk_enable)(struct clk *clk); void (*clk_disable)(struct clk *clk); - int (*clk_use)(struct clk *clk); - void (*clk_unuse)(struct clk *clk); long (*clk_round_rate)(struct clk *clk, unsigned long rate); int (*clk_set_rate)(struct clk *clk, unsigned long rate); int (*clk_set_parent)(struct clk *clk, struct clk *parent); diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index dae138b9cac..1409c5bd703 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -108,6 +108,7 @@ #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ #define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ +#define DALGN __REG(0x400000a0) /* DMA Alignment Register */ #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ #define DRCMR(n) __REG2(0x40000100, (n)<<2) @@ -1614,8 +1615,21 @@ #define SSCR0_National (0x2 << 4) /* National Microwire */ #define SSCR0_ECS (1 << 6) /* External clock select */ #define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ +#if defined(CONFIG_PXA25x) #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ +#elif defined(CONFIG_PXA27x) +#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ +#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ +#define SSCR0_EDSS (1 << 20) /* Extended data size select */ +#define SSCR0_NCS (1 << 21) /* Network clock select */ +#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ +#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ +#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ +#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_ADC (1 << 30) /* Audio clock select */ +#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ +#endif #define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ diff --git a/include/asm-arm/arch-s3c2410/debug-macro.S b/include/asm-arm/arch-s3c2410/debug-macro.S index abfbe45cd17..5f8223e700d 100644 --- a/include/asm-arm/arch-s3c2410/debug-macro.S +++ b/include/asm-arm/arch-s3c2410/debug-macro.S @@ -25,7 +25,7 @@ .macro addruart, rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 - ldreq \rx, = S3C2410_PA_UART + ldreq \rx, = S3C24XX_PA_UART ldrne \rx, = S3C24XX_VA_UART #if CONFIG_DEBUG_S3C2410_UART != 0 add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART) @@ -44,7 +44,7 @@ 1003: mrc p15, 0, \rd, c1, c0 tst \rd, #1 - addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) + addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) bic \rd, \rd, #0xff000 ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] @@ -75,7 +75,7 @@ 1003: mrc p15, 0, \rd, c1, c0 tst \rd, #1 - addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) + addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) bic \rd, \rd, #0xff000 ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 1833ea5c422..c380d264a84 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -14,6 +14,7 @@ * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out * 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv * 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names + * 15-Jan-2006 LCVR Added S3C24XX_PA macros for common S3C24XX resources */ #ifndef __ASM_ARCH_MAP_H @@ -188,5 +189,42 @@ #define S3C2400_SDRAM_PA (S3C2400_CS6) +/* Use a single interface for common resources between S3C24XX cpus */ + +#ifdef CONFIG_CPU_S3C2400 +#define S3C24XX_PA_IRQ S3C2400_PA_IRQ +#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL +#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST +#define S3C24XX_PA_DMA S3C2400_PA_DMA +#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR +#define S3C24XX_PA_LCD S3C2400_PA_LCD +#define S3C24XX_PA_UART S3C2400_PA_UART +#define S3C24XX_PA_TIMER S3C2400_PA_TIMER +#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV +#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG +#define S3C24XX_PA_IIC S3C2400_PA_IIC +#define S3C24XX_PA_IIS S3C2400_PA_IIS +#define S3C24XX_PA_GPIO S3C2400_PA_GPIO +#define S3C24XX_PA_RTC S3C2400_PA_RTC +#define S3C24XX_PA_ADC S3C2400_PA_ADC +#define S3C24XX_PA_SPI S3C2400_PA_SPI +#else +#define S3C24XX_PA_IRQ S3C2410_PA_IRQ +#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL +#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST +#define S3C24XX_PA_DMA S3C2410_PA_DMA +#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR +#define S3C24XX_PA_LCD S3C2410_PA_LCD +#define S3C24XX_PA_UART S3C2410_PA_UART +#define S3C24XX_PA_TIMER S3C2410_PA_TIMER +#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV +#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG +#define S3C24XX_PA_IIC S3C2410_PA_IIC +#define S3C24XX_PA_IIS S3C2410_PA_IIS +#define S3C24XX_PA_GPIO S3C2410_PA_GPIO +#define S3C24XX_PA_RTC S3C2410_PA_RTC +#define S3C24XX_PA_ADC S3C2410_PA_ADC +#define S3C24XX_PA_SPI S3C2410_PA_SPI +#endif #endif /* __ASM_ARCH_MAP_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h index ce1bbbaad6d..83b01254c4a 100644 --- a/include/asm-arm/arch-s3c2410/regs-serial.h +++ b/include/asm-arm/arch-s3c2410/regs-serial.h @@ -39,9 +39,9 @@ #define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 ) #define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 ) -#define S3C2410_PA_UART0 (S3C2410_PA_UART) -#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 ) -#define S3C2410_PA_UART2 (S3C2410_PA_UART + 0x8000 ) +#define S3C2410_PA_UART0 (S3C24XX_PA_UART) +#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) +#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) #define S3C2410_URXH (0x24) #define S3C2410_UTXH (0x20) diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index ddd1578a7ee..4367ec054b5 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -35,13 +35,13 @@ #undef S3C2410_GPIOREG #undef S3C2410_WDOGREG -#define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x))) -#define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x))) +#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) +#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x))) /* how many bytes we allow into the FIFO at a time in FIFO mode */ #define FIFO_MAX (14) -#define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT) +#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT) static __inline__ void uart_wr(unsigned int reg, unsigned int val) diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index 3351b77fab3..e8ea67c97c7 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -26,6 +26,7 @@ struct meminfo; #define MT_MEMORY 5 #define MT_ROM 6 #define MT_IXP2000_DEVICE 7 +#define MT_NONSHARED_DEVICE 8 extern void create_memmap_holes(struct meminfo *); extern void memtable_init(struct meminfo *); diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 5a0d19b466b..70e00d08345 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -168,6 +168,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val); #define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) #define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) #define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) +#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) /* * - coarse table (not used) diff --git a/include/asm-arm26/cache.h b/include/asm-arm26/cache.h index f52ca1b808c..8c3abcf728f 100644 --- a/include/asm-arm26/cache.h +++ b/include/asm-arm26/cache.h @@ -4,7 +4,8 @@ #ifndef __ASMARM_CACHE_H #define __ASMARM_CACHE_H -#define L1_CACHE_BYTES 32 +#define L1_CACHE_SHIFT 5 +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define SMP_CACHE_BYTES L1_CACHE_BYTES diff --git a/include/asm-arm26/thread_info.h b/include/asm-arm26/thread_info.h index a65e58a0a76..9b367ebe515 100644 --- a/include/asm-arm26/thread_info.h +++ b/include/asm-arm26/thread_info.h @@ -80,8 +80,7 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)(sp & ~0x1fff); } -/* FIXME - PAGE_SIZE < 32K */ -#define THREAD_SIZE (8*32768) // FIXME - this needs attention (see kernel/fork.c which gets a nice div by zero if this is lower than 8*32768 +#define THREAD_SIZE PAGE_SIZE #define task_pt_regs(task) ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE - 8) - 1) extern struct thread_info *alloc_thread_info(struct task_struct *task); diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h index a5576e02dd1..ea426abf01d 100644 --- a/include/asm-frv/thread_info.h +++ b/include/asm-frv/thread_info.h @@ -129,6 +129,7 @@ register struct thread_info *__current_thread_info asm("gr15"); #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ #define TIF_IRET 5 /* return with iret */ +#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 17 /* OOM killer killed process */ @@ -138,6 +139,7 @@ register struct thread_info *__current_thread_info asm("gr15"); #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) #define _TIF_IRET (1 << TIF_IRET) +#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h index cde376a7a85..4d994d2e99e 100644 --- a/include/asm-frv/unistd.h +++ b/include/asm-frv/unistd.h @@ -486,6 +486,7 @@ static inline pid_t wait(int * wait_stat) /* #define __ARCH_WANT_SYS_SIGPENDING */ #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #endif /* diff --git a/include/asm-i386/edac.h b/include/asm-i386/edac.h new file mode 100644 index 00000000000..3e7dd0ab68c --- /dev/null +++ b/include/asm-i386/edac.h @@ -0,0 +1,18 @@ +#ifndef ASM_EDAC_H +#define ASM_EDAC_H + +/* ECC atomic, DMA, SMP and interrupt safe scrub function */ + +static __inline__ void atomic_scrub(void *va, u32 size) +{ + unsigned long *virt_addr = va; + u32 i; + + for (i = 0; i < size / 4; i++, virt_addr++) + /* Very carefully read and write to memory atomically + * so we are interrupt, DMA and SMP safe. + */ + __asm__ __volatile__("lock; addl $0, %0"::"m"(*virt_addr)); +} + +#endif diff --git a/include/asm-i386/futex.h b/include/asm-i386/futex.h index e7a271d3930..44b9db80647 100644 --- a/include/asm-i386/futex.h +++ b/include/asm-i386/futex.h @@ -61,7 +61,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (op == FUTEX_OP_SET) __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg); else { -#if !defined(CONFIG_X86_BSWAP) && !defined(CONFIG_UML) +#ifndef CONFIG_X86_BSWAP if (boot_cpu_data.x86 == 3) ret = -ENOSYS; else diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h index 76524b4052a..026fd231488 100644 --- a/include/asm-i386/signal.h +++ b/include/asm-i386/signal.h @@ -218,7 +218,6 @@ static __inline__ int sigfindinword(unsigned long word) } struct pt_regs; -extern int FASTCALL(do_signal(struct pt_regs *regs, sigset_t *oldset)); #define ptrace_signal_deliver(regs, cookie) \ do { \ diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h index 2493e77e8c3..e20e99551d7 100644 --- a/include/asm-i386/thread_info.h +++ b/include/asm-i386/thread_info.h @@ -140,6 +140,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__; #define TIF_SYSCALL_EMU 6 /* syscall emulation active */ #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ #define TIF_SECCOMP 8 /* secure computing */ +#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 17 @@ -152,6 +153,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__; #define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU) #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) #define _TIF_SECCOMP (1<<TIF_SECCOMP) +#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) /* work to do on interrupt/exception return */ diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index 481c3c0ea72..597496ed2ae 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -300,8 +300,23 @@ #define __NR_inotify_add_watch 292 #define __NR_inotify_rm_watch 293 #define __NR_migrate_pages 294 +#define __NR_openat 295 +#define __NR_mkdirat 296 +#define __NR_mknodat 297 +#define __NR_fchownat 298 +#define __NR_futimesat 299 +#define __NR_newfstatat 300 +#define __NR_unlinkat 301 +#define __NR_renameat 302 +#define __NR_linkat 303 +#define __NR_symlinkat 304 +#define __NR_readlinkat 305 +#define __NR_fchmodat 306 +#define __NR_faccessat 307 +#define __NR_pselect6 308 +#define __NR_ppoll 309 -#define NR_syscalls 295 +#define NR_syscalls 310 /* * user-visible error numbers are in the range -1 - -128: see @@ -417,6 +432,7 @@ __syscall_return(type,__res); \ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #endif #ifdef __KERNEL_SYSCALLS__ diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index e828377ad29..7708ec669a3 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -927,7 +927,7 @@ static inline s64 ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) { struct ia64_pal_retval iprv; - PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); + PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); if (vector) *vector = iprv.v0; *progress = iprv.v1; diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index 8c648bf72bb..09b99029ac1 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h @@ -25,8 +25,8 @@ * Limits for PMC and PMD are set to less than maximum architected values * but should be sufficient for a while */ -#define IA64_NUM_PMC_REGS 32 -#define IA64_NUM_PMD_REGS 32 +#define IA64_NUM_PMC_REGS 64 +#define IA64_NUM_PMD_REGS 64 #define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000) #define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000) diff --git a/include/asm-ia64/semaphore.h b/include/asm-ia64/semaphore.h index bb8906285fa..f483eeb95dd 100644 --- a/include/asm-ia64/semaphore.h +++ b/include/asm-ia64/semaphore.h @@ -61,7 +61,7 @@ static inline void down (struct semaphore *sem) { might_sleep(); - if (atomic_dec_return(&sem->count) < 0) + if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1) __down(sem); } @@ -75,7 +75,7 @@ down_interruptible (struct semaphore * sem) int ret = 0; might_sleep(); - if (atomic_dec_return(&sem->count) < 0) + if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1) ret = __down_interruptible(sem); return ret; } @@ -85,7 +85,7 @@ down_trylock (struct semaphore *sem) { int ret = 0; - if (atomic_dec_return(&sem->count) < 0) + if (ia64_fetchadd(-1, &sem->count.counter, acq) < 1) ret = __down_trylock(sem); return ret; } @@ -93,7 +93,7 @@ down_trylock (struct semaphore *sem) static inline void up (struct semaphore * sem) { - if (atomic_inc_return(&sem->count) <= 0) + if (ia64_fetchadd(1, &sem->count.counter, rel) <= -1) __up(sem); } diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h index e35074f526d..a3431372c6e 100644 --- a/include/asm-ia64/sn/intr.h +++ b/include/asm-ia64/sn/intr.h @@ -40,7 +40,7 @@ struct sn_irq_info { int irq_cpuid; /* kernel logical cpuid */ int irq_irq; /* the IRQ number */ int irq_int_bit; /* Bridge interrupt pin */ - uint64_t irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ + u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ int irq_bridge_type;/* pciio asic type (pciio.h) */ void *irq_bridge; /* bridge generating irq */ void *irq_pciioinfo; /* associated pciio_info_t */ diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h index 2b42d9ece26..9334078b089 100644 --- a/include/asm-ia64/sn/pcibr_provider.h +++ b/include/asm-ia64/sn/pcibr_provider.h @@ -44,9 +44,9 @@ #define PCI32_MAPPED_BASE 0x40000000 #define PCI32_DIRECT_BASE 0x80000000 -#define IS_PCI32_MAPPED(x) ((uint64_t)(x) < PCI32_DIRECT_BASE && \ - (uint64_t)(x) >= PCI32_MAPPED_BASE) -#define IS_PCI32_DIRECT(x) ((uint64_t)(x) >= PCI32_MAPPED_BASE) +#define IS_PCI32_MAPPED(x) ((u64)(x) < PCI32_DIRECT_BASE && \ + (u64)(x) >= PCI32_MAPPED_BASE) +#define IS_PCI32_DIRECT(x) ((u64)(x) >= PCI32_MAPPED_BASE) /* @@ -63,7 +63,7 @@ (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1)) #define MINIMAL_ATE_FLAG(addr, size) \ - (MINIMAL_ATES_REQUIRED((uint64_t)addr, size) ? 1 : 0) + (MINIMAL_ATES_REQUIRED((u64)addr, size) ? 1 : 0) /* bit 29 of the pci address is the SWAP bit */ #define ATE_SWAPSHIFT 29 @@ -90,27 +90,27 @@ * PMU resources. */ struct ate_resource{ - uint64_t *ate; - uint64_t num_ate; - uint64_t lowest_free_index; + u64 *ate; + u64 num_ate; + u64 lowest_free_index; }; struct pcibus_info { struct pcibus_bussoft pbi_buscommon; /* common header */ - uint32_t pbi_moduleid; + u32 pbi_moduleid; short pbi_bridge_type; short pbi_bridge_mode; struct ate_resource pbi_int_ate_resource; - uint64_t pbi_int_ate_size; + u64 pbi_int_ate_size; - uint64_t pbi_dir_xbase; + u64 pbi_dir_xbase; char pbi_hub_xid; - uint64_t pbi_devreg[8]; + u64 pbi_devreg[8]; - uint32_t pbi_valid_devices; - uint32_t pbi_enabled_devices; + u32 pbi_valid_devices; + u32 pbi_enabled_devices; spinlock_t pbi_lock; }; @@ -136,22 +136,22 @@ extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int); /* * prototypes for the bridge asic register access routines in pcibr_reg.c */ -extern void pcireg_control_bit_clr(struct pcibus_info *, uint64_t); -extern void pcireg_control_bit_set(struct pcibus_info *, uint64_t); -extern uint64_t pcireg_tflush_get(struct pcibus_info *); -extern uint64_t pcireg_intr_status_get(struct pcibus_info *); -extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, uint64_t); -extern void pcireg_intr_enable_bit_set(struct pcibus_info *, uint64_t); -extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, uint64_t); +extern void pcireg_control_bit_clr(struct pcibus_info *, u64); +extern void pcireg_control_bit_set(struct pcibus_info *, u64); +extern u64 pcireg_tflush_get(struct pcibus_info *); +extern u64 pcireg_intr_status_get(struct pcibus_info *); +extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, u64); +extern void pcireg_intr_enable_bit_set(struct pcibus_info *, u64); +extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, u64); extern void pcireg_force_intr_set(struct pcibus_info *, int); -extern uint64_t pcireg_wrb_flush_get(struct pcibus_info *, int); -extern void pcireg_int_ate_set(struct pcibus_info *, int, uint64_t); -extern uint64_t * pcireg_int_ate_addr(struct pcibus_info *, int); +extern u64 pcireg_wrb_flush_get(struct pcibus_info *, int); +extern void pcireg_int_ate_set(struct pcibus_info *, int, u64); +extern u64 * pcireg_int_ate_addr(struct pcibus_info *, int); extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info); extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info); extern int pcibr_ate_alloc(struct pcibus_info *, int); extern void pcibr_ate_free(struct pcibus_info *, int); -extern void ate_write(struct pcibus_info *, int, int, uint64_t); +extern void ate_write(struct pcibus_info *, int, int, u64); extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp); extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device, diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h index ad0e8e8ae53..ce3f6c32824 100644 --- a/include/asm-ia64/sn/pcibus_provider_defs.h +++ b/include/asm-ia64/sn/pcibus_provider_defs.h @@ -29,13 +29,13 @@ */ struct pcibus_bussoft { - uint32_t bs_asic_type; /* chipset type */ - uint32_t bs_xid; /* xwidget id */ - uint32_t bs_persist_busnum; /* Persistent Bus Number */ - uint32_t bs_persist_segment; /* Segment Number */ - uint64_t bs_legacy_io; /* legacy io pio addr */ - uint64_t bs_legacy_mem; /* legacy mem pio addr */ - uint64_t bs_base; /* widget base */ + u32 bs_asic_type; /* chipset type */ + u32 bs_xid; /* xwidget id */ + u32 bs_persist_busnum; /* Persistent Bus Number */ + u32 bs_persist_segment; /* Segment Number */ + u64 bs_legacy_io; /* legacy io pio addr */ + u64 bs_legacy_mem; /* legacy mem pio addr */ + u64 bs_base; /* widget base */ struct xwidget_info *bs_xwidget_info; }; diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h index f65d222ca5e..38cdffbc4c7 100644 --- a/include/asm-ia64/sn/pcidev.h +++ b/include/asm-ia64/sn/pcidev.h @@ -55,8 +55,8 @@ struct sn_pci_controller { #define PCIIO_VENDOR_ID_NONE (-1) struct pcidev_info { - uint64_t pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */ - uint64_t pdi_slot_host_handle; /* Bus and devfn Host pci_dev */ + u64 pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */ + u64 pdi_slot_host_handle; /* Bus and devfn Host pci_dev */ struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */ struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */ diff --git a/include/asm-ia64/sn/pic.h b/include/asm-ia64/sn/pic.h index 0de82e6b089..5f9da5fd6e5 100644 --- a/include/asm-ia64/sn/pic.h +++ b/include/asm-ia64/sn/pic.h @@ -74,120 +74,120 @@ struct pic { /* 0x000000-0x00FFFF -- Local Registers */ /* 0x000000-0x000057 -- Standard Widget Configuration */ - uint64_t p_wid_id; /* 0x000000 */ - uint64_t p_wid_stat; /* 0x000008 */ - uint64_t p_wid_err_upper; /* 0x000010 */ - uint64_t p_wid_err_lower; /* 0x000018 */ + u64 p_wid_id; /* 0x000000 */ + u64 p_wid_stat; /* 0x000008 */ + u64 p_wid_err_upper; /* 0x000010 */ + u64 p_wid_err_lower; /* 0x000018 */ #define p_wid_err p_wid_err_lower - uint64_t p_wid_control; /* 0x000020 */ - uint64_t p_wid_req_timeout; /* 0x000028 */ - uint64_t p_wid_int_upper; /* 0x000030 */ - uint64_t p_wid_int_lower; /* 0x000038 */ + u64 p_wid_control; /* 0x000020 */ + u64 p_wid_req_timeout; /* 0x000028 */ + u64 p_wid_int_upper; /* 0x000030 */ + u64 p_wid_int_lower; /* 0x000038 */ #define p_wid_int p_wid_int_lower - uint64_t p_wid_err_cmdword; /* 0x000040 */ - uint64_t p_wid_llp; /* 0x000048 */ - uint64_t p_wid_tflush; /* 0x000050 */ + u64 p_wid_err_cmdword; /* 0x000040 */ + u64 p_wid_llp; /* 0x000048 */ + u64 p_wid_tflush; /* 0x000050 */ /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */ - uint64_t p_wid_aux_err; /* 0x000058 */ - uint64_t p_wid_resp_upper; /* 0x000060 */ - uint64_t p_wid_resp_lower; /* 0x000068 */ + u64 p_wid_aux_err; /* 0x000058 */ + u64 p_wid_resp_upper; /* 0x000060 */ + u64 p_wid_resp_lower; /* 0x000068 */ #define p_wid_resp p_wid_resp_lower - uint64_t p_wid_tst_pin_ctrl; /* 0x000070 */ - uint64_t p_wid_addr_lkerr; /* 0x000078 */ + u64 p_wid_tst_pin_ctrl; /* 0x000070 */ + u64 p_wid_addr_lkerr; /* 0x000078 */ /* 0x000080-0x00008F -- PMU & MAP */ - uint64_t p_dir_map; /* 0x000080 */ - uint64_t _pad_000088; /* 0x000088 */ + u64 p_dir_map; /* 0x000080 */ + u64 _pad_000088; /* 0x000088 */ /* 0x000090-0x00009F -- SSRAM */ - uint64_t p_map_fault; /* 0x000090 */ - uint64_t _pad_000098; /* 0x000098 */ + u64 p_map_fault; /* 0x000090 */ + u64 _pad_000098; /* 0x000098 */ /* 0x0000A0-0x0000AF -- Arbitration */ - uint64_t p_arb; /* 0x0000A0 */ - uint64_t _pad_0000A8; /* 0x0000A8 */ + u64 p_arb; /* 0x0000A0 */ + u64 _pad_0000A8; /* 0x0000A8 */ /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ - uint64_t p_ate_parity_err; /* 0x0000B0 */ - uint64_t _pad_0000B8; /* 0x0000B8 */ + u64 p_ate_parity_err; /* 0x0000B0 */ + u64 _pad_0000B8; /* 0x0000B8 */ /* 0x0000C0-0x0000FF -- PCI/GIO */ - uint64_t p_bus_timeout; /* 0x0000C0 */ - uint64_t p_pci_cfg; /* 0x0000C8 */ - uint64_t p_pci_err_upper; /* 0x0000D0 */ - uint64_t p_pci_err_lower; /* 0x0000D8 */ + u64 p_bus_timeout; /* 0x0000C0 */ + u64 p_pci_cfg; /* 0x0000C8 */ + u64 p_pci_err_upper; /* 0x0000D0 */ + u64 p_pci_err_lower; /* 0x0000D8 */ #define p_pci_err p_pci_err_lower - uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */ + u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ /* 0x000100-0x0001FF -- Interrupt */ - uint64_t p_int_status; /* 0x000100 */ - uint64_t p_int_enable; /* 0x000108 */ - uint64_t p_int_rst_stat; /* 0x000110 */ - uint64_t p_int_mode; /* 0x000118 */ - uint64_t p_int_device; /* 0x000120 */ - uint64_t p_int_host_err; /* 0x000128 */ - uint64_t p_int_addr[8]; /* 0x0001{30,,,68} */ - uint64_t p_err_int_view; /* 0x000170 */ - uint64_t p_mult_int; /* 0x000178 */ - uint64_t p_force_always[8]; /* 0x0001{80,,,B8} */ - uint64_t p_force_pin[8]; /* 0x0001{C0,,,F8} */ + u64 p_int_status; /* 0x000100 */ + u64 p_int_enable; /* 0x000108 */ + u64 p_int_rst_stat; /* 0x000110 */ + u64 p_int_mode; /* 0x000118 */ + u64 p_int_device; /* 0x000120 */ + u64 p_int_host_err; /* 0x000128 */ + u64 p_int_addr[8]; /* 0x0001{30,,,68} */ + u64 p_err_int_view; /* 0x000170 */ + u64 p_mult_int; /* 0x000178 */ + u64 p_force_always[8]; /* 0x0001{80,,,B8} */ + u64 p_force_pin[8]; /* 0x0001{C0,,,F8} */ /* 0x000200-0x000298 -- Device */ - uint64_t p_device[4]; /* 0x0002{00,,,18} */ - uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */ - uint64_t p_wr_req_buf[4]; /* 0x0002{40,,,58} */ - uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */ - uint64_t p_rrb_map[2]; /* 0x0002{80,,,88} */ + u64 p_device[4]; /* 0x0002{00,,,18} */ + u64 _pad_000220[4]; /* 0x0002{20,,,38} */ + u64 p_wr_req_buf[4]; /* 0x0002{40,,,58} */ + u64 _pad_000260[4]; /* 0x0002{60,,,78} */ + u64 p_rrb_map[2]; /* 0x0002{80,,,88} */ #define p_even_resp p_rrb_map[0] /* 0x000280 */ #define p_odd_resp p_rrb_map[1] /* 0x000288 */ - uint64_t p_resp_status; /* 0x000290 */ - uint64_t p_resp_clear; /* 0x000298 */ + u64 p_resp_status; /* 0x000290 */ + u64 p_resp_clear; /* 0x000298 */ - uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */ + u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ struct { - uint64_t upper; /* 0x0003{00,,,F0} */ - uint64_t lower; /* 0x0003{08,,,F8} */ + u64 upper; /* 0x0003{00,,,F0} */ + u64 lower; /* 0x0003{08,,,F8} */ } p_buf_addr_match[16]; /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ struct { - uint64_t flush_w_touch; /* 0x000{400,,,5C0} */ - uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */ - uint64_t inflight; /* 0x000{410,,,5D0} */ - uint64_t prefetch; /* 0x000{418,,,5D8} */ - uint64_t total_pci_retry; /* 0x000{420,,,5E0} */ - uint64_t max_pci_retry; /* 0x000{428,,,5E8} */ - uint64_t max_latency; /* 0x000{430,,,5F0} */ - uint64_t clear_all; /* 0x000{438,,,5F8} */ + u64 flush_w_touch; /* 0x000{400,,,5C0} */ + u64 flush_wo_touch; /* 0x000{408,,,5C8} */ + u64 inflight; /* 0x000{410,,,5D0} */ + u64 prefetch; /* 0x000{418,,,5D8} */ + u64 total_pci_retry; /* 0x000{420,,,5E0} */ + u64 max_pci_retry; /* 0x000{428,,,5E8} */ + u64 max_latency; /* 0x000{430,,,5F0} */ + u64 clear_all; /* 0x000{438,,,5F8} */ } p_buf_count[8]; /* 0x000600-0x0009FF -- PCI/X registers */ - uint64_t p_pcix_bus_err_addr; /* 0x000600 */ - uint64_t p_pcix_bus_err_attr; /* 0x000608 */ - uint64_t p_pcix_bus_err_data; /* 0x000610 */ - uint64_t p_pcix_pio_split_addr; /* 0x000618 */ - uint64_t p_pcix_pio_split_attr; /* 0x000620 */ - uint64_t p_pcix_dma_req_err_attr; /* 0x000628 */ - uint64_t p_pcix_dma_req_err_addr; /* 0x000630 */ - uint64_t p_pcix_timeout; /* 0x000638 */ + u64 p_pcix_bus_err_addr; /* 0x000600 */ + u64 p_pcix_bus_err_attr; /* 0x000608 */ + u64 p_pcix_bus_err_data; /* 0x000610 */ + u64 p_pcix_pio_split_addr; /* 0x000618 */ + u64 p_pcix_pio_split_attr; /* 0x000620 */ + u64 p_pcix_dma_req_err_attr; /* 0x000628 */ + u64 p_pcix_dma_req_err_addr; /* 0x000630 */ + u64 p_pcix_timeout; /* 0x000638 */ - uint64_t _pad_000640[120]; /* 0x000{640,,,9F8} */ + u64 _pad_000640[120]; /* 0x000{640,,,9F8} */ /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ struct { - uint64_t p_buf_addr; /* 0x000{A00,,,AF0} */ - uint64_t p_buf_attr; /* 0X000{A08,,,AF8} */ + u64 p_buf_addr; /* 0x000{A00,,,AF0} */ + u64 p_buf_attr; /* 0X000{A08,,,AF8} */ } p_pcix_read_buf_64[16]; struct { - uint64_t p_buf_addr; /* 0x000{B00,,,BE0} */ - uint64_t p_buf_attr; /* 0x000{B08,,,BE8} */ - uint64_t p_buf_valid; /* 0x000{B10,,,BF0} */ - uint64_t __pad1; /* 0x000{B18,,,BF8} */ + u64 p_buf_addr; /* 0x000{B00,,,BE0} */ + u64 p_buf_attr; /* 0x000{B08,,,BE8} */ + u64 p_buf_valid; /* 0x000{B10,,,BF0} */ + u64 __pad1; /* 0x000{B18,,,BF8} */ } p_pcix_write_buf_64[8]; /* End of Local Registers -- Start of Address Map space */ @@ -195,45 +195,45 @@ struct pic { char _pad_000c00[0x010000 - 0x000c00]; /* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */ - uint64_t p_int_ate_ram[1024]; /* 0x010000-0x011fff */ + u64 p_int_ate_ram[1024]; /* 0x010000-0x011fff */ /* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */ - uint64_t p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */ + u64 p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */ char _pad_014000[0x18000 - 0x014000]; /* 0x18000-0x197F8 -- PIC Write Request Ram */ - uint64_t p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ - uint64_t p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ - uint64_t p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ + u64 p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ + u64 p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ + u64 p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ char _pad_019800[0x20000 - 0x019800]; /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */ union { - uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ - uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ - uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ - uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ + u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ + u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ + u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ + u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ union { - uint8_t c[0x100 / 1]; - uint16_t s[0x100 / 2]; - uint32_t l[0x100 / 4]; - uint64_t d[0x100 / 8]; + u8 c[0x100 / 1]; + u16 s[0x100 / 2]; + u32 l[0x100 / 4]; + u64 d[0x100 / 8]; } f[8]; } p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */ /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ union { - uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */ - uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */ - uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */ - uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */ + u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ + u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ + u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ + u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ union { - uint8_t c[0x100 / 1]; - uint16_t s[0x100 / 2]; - uint32_t l[0x100 / 4]; - uint64_t d[0x100 / 8]; + u8 c[0x100 / 1]; + u16 s[0x100 / 2]; + u32 l[0x100 / 4]; + u64 d[0x100 / 8]; } f[8]; } p_type1_cfg; /* 0x028000-0x029000 */ @@ -241,20 +241,20 @@ struct pic { /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ union { - uint8_t c[8 / 1]; - uint16_t s[8 / 2]; - uint32_t l[8 / 4]; - uint64_t d[8 / 8]; + u8 c[8 / 1]; + u16 s[8 / 2]; + u32 l[8 / 4]; + u64 d[8 / 8]; } p_pci_iack; /* 0x030000-0x030007 */ char _pad_030007[0x040000-0x030008]; /* 0x040000-0x030007 -- PCIX Special Cycle */ union { - uint8_t c[8 / 1]; - uint16_t s[8 / 2]; - uint32_t l[8 / 4]; - uint64_t d[8 / 8]; + u8 c[8 / 1]; + u16 s[8 / 2]; + u32 l[8 / 4]; + u64 d[8 / 8]; } p_pcix_cycle; /* 0x040000-0x040007 */ }; diff --git a/include/asm-ia64/sn/shubio.h b/include/asm-ia64/sn/shubio.h index 831b72111fd..22a6f18a531 100644 --- a/include/asm-ia64/sn/shubio.h +++ b/include/asm-ia64/sn/shubio.h @@ -227,13 +227,13 @@ ************************************************************************/ typedef union ii_wid_u { - uint64_t ii_wid_regval; + u64 ii_wid_regval; struct { - uint64_t w_rsvd_1:1; - uint64_t w_mfg_num:11; - uint64_t w_part_num:16; - uint64_t w_rev_num:4; - uint64_t w_rsvd:32; + u64 w_rsvd_1:1; + u64 w_mfg_num:11; + u64 w_part_num:16; + u64 w_rev_num:4; + u64 w_rsvd:32; } ii_wid_fld_s; } ii_wid_u_t; @@ -246,18 +246,18 @@ typedef union ii_wid_u { ************************************************************************/ typedef union ii_wstat_u { - uint64_t ii_wstat_regval; - struct { - uint64_t w_pending:4; - uint64_t w_xt_crd_to:1; - uint64_t w_xt_tail_to:1; - uint64_t w_rsvd_3:3; - uint64_t w_tx_mx_rty:1; - uint64_t w_rsvd_2:6; - uint64_t w_llp_tx_cnt:8; - uint64_t w_rsvd_1:8; - uint64_t w_crazy:1; - uint64_t w_rsvd:31; + u64 ii_wstat_regval; + struct { + u64 w_pending:4; + u64 w_xt_crd_to:1; + u64 w_xt_tail_to:1; + u64 w_rsvd_3:3; + u64 w_tx_mx_rty:1; + u64 w_rsvd_2:6; + u64 w_llp_tx_cnt:8; + u64 w_rsvd_1:8; + u64 w_crazy:1; + u64 w_rsvd:31; } ii_wstat_fld_s; } ii_wstat_u_t; @@ -269,16 +269,16 @@ typedef union ii_wstat_u { ************************************************************************/ typedef union ii_wcr_u { - uint64_t ii_wcr_regval; - struct { - uint64_t w_wid:4; - uint64_t w_tag:1; - uint64_t w_rsvd_1:8; - uint64_t w_dst_crd:3; - uint64_t w_f_bad_pkt:1; - uint64_t w_dir_con:1; - uint64_t w_e_thresh:5; - uint64_t w_rsvd:41; + u64 ii_wcr_regval; + struct { + u64 w_wid:4; + u64 w_tag:1; + u64 w_rsvd_1:8; + u64 w_dst_crd:3; + u64 w_f_bad_pkt:1; + u64 w_dir_con:1; + u64 w_e_thresh:5; + u64 w_rsvd:41; } ii_wcr_fld_s; } ii_wcr_u_t; @@ -310,9 +310,9 @@ typedef union ii_wcr_u { ************************************************************************/ typedef union ii_ilapr_u { - uint64_t ii_ilapr_regval; + u64 ii_ilapr_regval; struct { - uint64_t i_region:64; + u64 i_region:64; } ii_ilapr_fld_s; } ii_ilapr_u_t; @@ -330,9 +330,9 @@ typedef union ii_ilapr_u { ************************************************************************/ typedef union ii_ilapo_u { - uint64_t ii_ilapo_regval; + u64 ii_ilapo_regval; struct { - uint64_t i_io_ovrride:64; + u64 i_io_ovrride:64; } ii_ilapo_fld_s; } ii_ilapo_u_t; @@ -344,12 +344,12 @@ typedef union ii_ilapo_u { ************************************************************************/ typedef union ii_iowa_u { - uint64_t ii_iowa_regval; + u64 ii_iowa_regval; struct { - uint64_t i_w0_oac:1; - uint64_t i_rsvd_1:7; - uint64_t i_wx_oac:8; - uint64_t i_rsvd:48; + u64 i_w0_oac:1; + u64 i_rsvd_1:7; + u64 i_wx_oac:8; + u64 i_rsvd:48; } ii_iowa_fld_s; } ii_iowa_u_t; @@ -363,12 +363,12 @@ typedef union ii_iowa_u { ************************************************************************/ typedef union ii_iiwa_u { - uint64_t ii_iiwa_regval; + u64 ii_iiwa_regval; struct { - uint64_t i_w0_iac:1; - uint64_t i_rsvd_1:7; - uint64_t i_wx_iac:8; - uint64_t i_rsvd:48; + u64 i_w0_iac:1; + u64 i_rsvd_1:7; + u64 i_wx_iac:8; + u64 i_rsvd:48; } ii_iiwa_fld_s; } ii_iiwa_u_t; @@ -392,16 +392,16 @@ typedef union ii_iiwa_u { ************************************************************************/ typedef union ii_iidem_u { - uint64_t ii_iidem_regval; - struct { - uint64_t i_w8_dxs:8; - uint64_t i_w9_dxs:8; - uint64_t i_wa_dxs:8; - uint64_t i_wb_dxs:8; - uint64_t i_wc_dxs:8; - uint64_t i_wd_dxs:8; - uint64_t i_we_dxs:8; - uint64_t i_wf_dxs:8; + u64 ii_iidem_regval; + struct { + u64 i_w8_dxs:8; + u64 i_w9_dxs:8; + u64 i_wa_dxs:8; + u64 i_wb_dxs:8; + u64 i_wc_dxs:8; + u64 i_wd_dxs:8; + u64 i_we_dxs:8; + u64 i_wf_dxs:8; } ii_iidem_fld_s; } ii_iidem_u_t; @@ -413,22 +413,22 @@ typedef union ii_iidem_u { ************************************************************************/ typedef union ii_ilcsr_u { - uint64_t ii_ilcsr_regval; - struct { - uint64_t i_nullto:6; - uint64_t i_rsvd_4:2; - uint64_t i_wrmrst:1; - uint64_t i_rsvd_3:1; - uint64_t i_llp_en:1; - uint64_t i_bm8:1; - uint64_t i_llp_stat:2; - uint64_t i_remote_power:1; - uint64_t i_rsvd_2:1; - uint64_t i_maxrtry:10; - uint64_t i_d_avail_sel:2; - uint64_t i_rsvd_1:4; - uint64_t i_maxbrst:10; - uint64_t i_rsvd:22; + u64 ii_ilcsr_regval; + struct { + u64 i_nullto:6; + u64 i_rsvd_4:2; + u64 i_wrmrst:1; + u64 i_rsvd_3:1; + u64 i_llp_en:1; + u64 i_bm8:1; + u64 i_llp_stat:2; + u64 i_remote_power:1; + u64 i_rsvd_2:1; + u64 i_maxrtry:10; + u64 i_d_avail_sel:2; + u64 i_rsvd_1:4; + u64 i_maxbrst:10; + u64 i_rsvd:22; } ii_ilcsr_fld_s; } ii_ilcsr_u_t; @@ -441,11 +441,11 @@ typedef union ii_ilcsr_u { ************************************************************************/ typedef union ii_illr_u { - uint64_t ii_illr_regval; + u64 ii_illr_regval; struct { - uint64_t i_sn_cnt:16; - uint64_t i_cb_cnt:16; - uint64_t i_rsvd:32; + u64 i_sn_cnt:16; + u64 i_cb_cnt:16; + u64 i_rsvd:32; } ii_illr_fld_s; } ii_illr_u_t; @@ -464,19 +464,19 @@ typedef union ii_illr_u { ************************************************************************/ typedef union ii_iidsr_u { - uint64_t ii_iidsr_regval; - struct { - uint64_t i_level:8; - uint64_t i_pi_id:1; - uint64_t i_node:11; - uint64_t i_rsvd_3:4; - uint64_t i_enable:1; - uint64_t i_rsvd_2:3; - uint64_t i_int_sent:2; - uint64_t i_rsvd_1:2; - uint64_t i_pi0_forward_int:1; - uint64_t i_pi1_forward_int:1; - uint64_t i_rsvd:30; + u64 ii_iidsr_regval; + struct { + u64 i_level:8; + u64 i_pi_id:1; + u64 i_node:11; + u64 i_rsvd_3:4; + u64 i_enable:1; + u64 i_rsvd_2:3; + u64 i_int_sent:2; + u64 i_rsvd_1:2; + u64 i_pi0_forward_int:1; + u64 i_pi1_forward_int:1; + u64 i_rsvd:30; } ii_iidsr_fld_s; } ii_iidsr_u_t; @@ -492,13 +492,13 @@ typedef union ii_iidsr_u { ************************************************************************/ typedef union ii_igfx0_u { - uint64_t ii_igfx0_regval; + u64 ii_igfx0_regval; struct { - uint64_t i_w_num:4; - uint64_t i_pi_id:1; - uint64_t i_n_num:12; - uint64_t i_p_num:1; - uint64_t i_rsvd:46; + u64 i_w_num:4; + u64 i_pi_id:1; + u64 i_n_num:12; + u64 i_p_num:1; + u64 i_rsvd:46; } ii_igfx0_fld_s; } ii_igfx0_u_t; @@ -514,13 +514,13 @@ typedef union ii_igfx0_u { ************************************************************************/ typedef union ii_igfx1_u { - uint64_t ii_igfx1_regval; + u64 ii_igfx1_regval; struct { - uint64_t i_w_num:4; - uint64_t i_pi_id:1; - uint64_t i_n_num:12; - uint64_t i_p_num:1; - uint64_t i_rsvd:46; + u64 i_w_num:4; + u64 i_pi_id:1; + u64 i_n_num:12; + u64 i_p_num:1; + u64 i_rsvd:46; } ii_igfx1_fld_s; } ii_igfx1_u_t; @@ -532,9 +532,9 @@ typedef union ii_igfx1_u { ************************************************************************/ typedef union ii_iscr0_u { - uint64_t ii_iscr0_regval; + u64 ii_iscr0_regval; struct { - uint64_t i_scratch:64; + u64 i_scratch:64; } ii_iscr0_fld_s; } ii_iscr0_u_t; @@ -546,9 +546,9 @@ typedef union ii_iscr0_u { ************************************************************************/ typedef union ii_iscr1_u { - uint64_t ii_iscr1_regval; + u64 ii_iscr1_regval; struct { - uint64_t i_scratch:64; + u64 i_scratch:64; } ii_iscr1_fld_s; } ii_iscr1_u_t; @@ -580,13 +580,13 @@ typedef union ii_iscr1_u { ************************************************************************/ typedef union ii_itte1_u { - uint64_t ii_itte1_regval; + u64 ii_itte1_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte1_fld_s; } ii_itte1_u_t; @@ -618,13 +618,13 @@ typedef union ii_itte1_u { ************************************************************************/ typedef union ii_itte2_u { - uint64_t ii_itte2_regval; + u64 ii_itte2_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte2_fld_s; } ii_itte2_u_t; @@ -656,13 +656,13 @@ typedef union ii_itte2_u { ************************************************************************/ typedef union ii_itte3_u { - uint64_t ii_itte3_regval; + u64 ii_itte3_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte3_fld_s; } ii_itte3_u_t; @@ -694,13 +694,13 @@ typedef union ii_itte3_u { ************************************************************************/ typedef union ii_itte4_u { - uint64_t ii_itte4_regval; + u64 ii_itte4_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte4_fld_s; } ii_itte4_u_t; @@ -732,13 +732,13 @@ typedef union ii_itte4_u { ************************************************************************/ typedef union ii_itte5_u { - uint64_t ii_itte5_regval; + u64 ii_itte5_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte5_fld_s; } ii_itte5_u_t; @@ -770,13 +770,13 @@ typedef union ii_itte5_u { ************************************************************************/ typedef union ii_itte6_u { - uint64_t ii_itte6_regval; + u64 ii_itte6_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte6_fld_s; } ii_itte6_u_t; @@ -808,13 +808,13 @@ typedef union ii_itte6_u { ************************************************************************/ typedef union ii_itte7_u { - uint64_t ii_itte7_regval; + u64 ii_itte7_regval; struct { - uint64_t i_offset:5; - uint64_t i_rsvd_1:3; - uint64_t i_w_num:4; - uint64_t i_iosp:1; - uint64_t i_rsvd:51; + u64 i_offset:5; + u64 i_rsvd_1:3; + u64 i_w_num:4; + u64 i_iosp:1; + u64 i_rsvd:51; } ii_itte7_fld_s; } ii_itte7_u_t; @@ -843,22 +843,22 @@ typedef union ii_itte7_u { ************************************************************************/ typedef union ii_iprb0_u { - uint64_t ii_iprb0_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprb0_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprb0_fld_s; } ii_iprb0_u_t; @@ -887,22 +887,22 @@ typedef union ii_iprb0_u { ************************************************************************/ typedef union ii_iprb8_u { - uint64_t ii_iprb8_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprb8_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprb8_fld_s; } ii_iprb8_u_t; @@ -931,22 +931,22 @@ typedef union ii_iprb8_u { ************************************************************************/ typedef union ii_iprb9_u { - uint64_t ii_iprb9_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprb9_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprb9_fld_s; } ii_iprb9_u_t; @@ -975,22 +975,22 @@ typedef union ii_iprb9_u { ************************************************************************/ typedef union ii_iprba_u { - uint64_t ii_iprba_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprba_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprba_fld_s; } ii_iprba_u_t; @@ -1019,22 +1019,22 @@ typedef union ii_iprba_u { ************************************************************************/ typedef union ii_iprbb_u { - uint64_t ii_iprbb_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprbb_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprbb_fld_s; } ii_iprbb_u_t; @@ -1063,22 +1063,22 @@ typedef union ii_iprbb_u { ************************************************************************/ typedef union ii_iprbc_u { - uint64_t ii_iprbc_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprbc_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprbc_fld_s; } ii_iprbc_u_t; @@ -1107,22 +1107,22 @@ typedef union ii_iprbc_u { ************************************************************************/ typedef union ii_iprbd_u { - uint64_t ii_iprbd_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprbd_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprbd_fld_s; } ii_iprbd_u_t; @@ -1151,22 +1151,22 @@ typedef union ii_iprbd_u { ************************************************************************/ typedef union ii_iprbe_u { - uint64_t ii_iprbe_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprbe_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprbe_fld_s; } ii_iprbe_u_t; @@ -1195,22 +1195,22 @@ typedef union ii_iprbe_u { ************************************************************************/ typedef union ii_iprbf_u { - uint64_t ii_iprbf_regval; - struct { - uint64_t i_c:8; - uint64_t i_na:14; - uint64_t i_rsvd_2:2; - uint64_t i_nb:14; - uint64_t i_rsvd_1:2; - uint64_t i_m:2; - uint64_t i_f:1; - uint64_t i_of_cnt:5; - uint64_t i_error:1; - uint64_t i_rd_to:1; - uint64_t i_spur_wr:1; - uint64_t i_spur_rd:1; - uint64_t i_rsvd:11; - uint64_t i_mult_err:1; + u64 ii_iprbf_regval; + struct { + u64 i_c:8; + u64 i_na:14; + u64 i_rsvd_2:2; + u64 i_nb:14; + u64 i_rsvd_1:2; + u64 i_m:2; + u64 i_f:1; + u64 i_of_cnt:5; + u64 i_error:1; + u64 i_rd_to:1; + u64 i_spur_wr:1; + u64 i_spur_rd:1; + u64 i_rsvd:11; + u64 i_mult_err:1; } ii_iprbe_fld_s; } ii_iprbf_u_t; @@ -1232,10 +1232,10 @@ typedef union ii_iprbf_u { ************************************************************************/ typedef union ii_ixcc_u { - uint64_t ii_ixcc_regval; + u64 ii_ixcc_regval; struct { - uint64_t i_time_out:26; - uint64_t i_rsvd:38; + u64 i_time_out:26; + u64 i_rsvd:38; } ii_ixcc_fld_s; } ii_ixcc_u_t; @@ -1256,16 +1256,16 @@ typedef union ii_ixcc_u { ************************************************************************/ typedef union ii_imem_u { - uint64_t ii_imem_regval; - struct { - uint64_t i_w0_esd:1; - uint64_t i_rsvd_3:3; - uint64_t i_b0_esd:1; - uint64_t i_rsvd_2:3; - uint64_t i_b1_esd:1; - uint64_t i_rsvd_1:3; - uint64_t i_clr_precise:1; - uint64_t i_rsvd:51; + u64 ii_imem_regval; + struct { + u64 i_w0_esd:1; + u64 i_rsvd_3:3; + u64 i_b0_esd:1; + u64 i_rsvd_2:3; + u64 i_b1_esd:1; + u64 i_rsvd_1:3; + u64 i_clr_precise:1; + u64 i_rsvd:51; } ii_imem_fld_s; } ii_imem_u_t; @@ -1294,13 +1294,13 @@ typedef union ii_imem_u { ************************************************************************/ typedef union ii_ixtt_u { - uint64_t ii_ixtt_regval; + u64 ii_ixtt_regval; struct { - uint64_t i_tail_to:26; - uint64_t i_rsvd_1:6; - uint64_t i_rrsp_ps:23; - uint64_t i_rrsp_to:5; - uint64_t i_rsvd:4; + u64 i_tail_to:26; + u64 i_rsvd_1:6; + u64 i_rrsp_ps:23; + u64 i_rrsp_to:5; + u64 i_rsvd:4; } ii_ixtt_fld_s; } ii_ixtt_u_t; @@ -1316,37 +1316,37 @@ typedef union ii_ixtt_u { ************************************************************************/ typedef union ii_ieclr_u { - uint64_t ii_ieclr_regval; - struct { - uint64_t i_e_prb_0:1; - uint64_t i_rsvd:7; - uint64_t i_e_prb_8:1; - uint64_t i_e_prb_9:1; - uint64_t i_e_prb_a:1; - uint64_t i_e_prb_b:1; - uint64_t i_e_prb_c:1; - uint64_t i_e_prb_d:1; - uint64_t i_e_prb_e:1; - uint64_t i_e_prb_f:1; - uint64_t i_e_crazy:1; - uint64_t i_e_bte_0:1; - uint64_t i_e_bte_1:1; - uint64_t i_reserved_1:10; - uint64_t i_spur_rd_hdr:1; - uint64_t i_cam_intr_to:1; - uint64_t i_cam_overflow:1; - uint64_t i_cam_read_miss:1; - uint64_t i_ioq_rep_underflow:1; - uint64_t i_ioq_req_underflow:1; - uint64_t i_ioq_rep_overflow:1; - uint64_t i_ioq_req_overflow:1; - uint64_t i_iiq_rep_overflow:1; - uint64_t i_iiq_req_overflow:1; - uint64_t i_ii_xn_rep_cred_overflow:1; - uint64_t i_ii_xn_req_cred_overflow:1; - uint64_t i_ii_xn_invalid_cmd:1; - uint64_t i_xn_ii_invalid_cmd:1; - uint64_t i_reserved_2:21; + u64 ii_ieclr_regval; + struct { + u64 i_e_prb_0:1; + u64 i_rsvd:7; + u64 i_e_prb_8:1; + u64 i_e_prb_9:1; + u64 i_e_prb_a:1; + u64 i_e_prb_b:1; + u64 i_e_prb_c:1; + u64 i_e_prb_d:1; + u64 i_e_prb_e:1; + u64 i_e_prb_f:1; + u64 i_e_crazy:1; + u64 i_e_bte_0:1; + u64 i_e_bte_1:1; + u64 i_reserved_1:10; + u64 i_spur_rd_hdr:1; + u64 i_cam_intr_to:1; + u64 i_cam_overflow:1; + u64 i_cam_read_miss:1; + u64 i_ioq_rep_underflow:1; + u64 i_ioq_req_underflow:1; + u64 i_ioq_rep_overflow:1; + u64 i_ioq_req_overflow:1; + u64 i_iiq_rep_overflow:1; + u64 i_iiq_req_overflow:1; + u64 i_ii_xn_rep_cred_overflow:1; + u64 i_ii_xn_req_cred_overflow:1; + u64 i_ii_xn_invalid_cmd:1; + u64 i_xn_ii_invalid_cmd:1; + u64 i_reserved_2:21; } ii_ieclr_fld_s; } ii_ieclr_u_t; @@ -1360,12 +1360,12 @@ typedef union ii_ieclr_u { ************************************************************************/ typedef union ii_ibcr_u { - uint64_t ii_ibcr_regval; + u64 ii_ibcr_regval; struct { - uint64_t i_count:4; - uint64_t i_rsvd_1:4; - uint64_t i_soft_reset:1; - uint64_t i_rsvd:55; + u64 i_count:4; + u64 i_rsvd_1:4; + u64 i_soft_reset:1; + u64 i_rsvd:55; } ii_ibcr_fld_s; } ii_ibcr_u_t; @@ -1399,22 +1399,22 @@ typedef union ii_ibcr_u { ************************************************************************/ typedef union ii_ixsm_u { - uint64_t ii_ixsm_regval; - struct { - uint64_t i_byte_en:32; - uint64_t i_reserved:1; - uint64_t i_tag:3; - uint64_t i_alt_pactyp:4; - uint64_t i_bo:1; - uint64_t i_error:1; - uint64_t i_vbpm:1; - uint64_t i_gbr:1; - uint64_t i_ds:2; - uint64_t i_ct:1; - uint64_t i_tnum:5; - uint64_t i_pactyp:4; - uint64_t i_sidn:4; - uint64_t i_didn:4; + u64 ii_ixsm_regval; + struct { + u64 i_byte_en:32; + u64 i_reserved:1; + u64 i_tag:3; + u64 i_alt_pactyp:4; + u64 i_bo:1; + u64 i_error:1; + u64 i_vbpm:1; + u64 i_gbr:1; + u64 i_ds:2; + u64 i_ct:1; + u64 i_tnum:5; + u64 i_pactyp:4; + u64 i_sidn:4; + u64 i_didn:4; } ii_ixsm_fld_s; } ii_ixsm_u_t; @@ -1426,11 +1426,11 @@ typedef union ii_ixsm_u { ************************************************************************/ typedef union ii_ixss_u { - uint64_t ii_ixss_regval; + u64 ii_ixss_regval; struct { - uint64_t i_sideband:8; - uint64_t i_rsvd:55; - uint64_t i_valid:1; + u64 i_sideband:8; + u64 i_rsvd:55; + u64 i_valid:1; } ii_ixss_fld_s; } ii_ixss_u_t; @@ -1447,17 +1447,17 @@ typedef union ii_ixss_u { ************************************************************************/ typedef union ii_ilct_u { - uint64_t ii_ilct_regval; - struct { - uint64_t i_test_seed:20; - uint64_t i_test_mask:8; - uint64_t i_test_data:20; - uint64_t i_test_valid:1; - uint64_t i_test_cberr:1; - uint64_t i_test_flit:3; - uint64_t i_test_clear:1; - uint64_t i_test_err_capture:1; - uint64_t i_rsvd:9; + u64 ii_ilct_regval; + struct { + u64 i_test_seed:20; + u64 i_test_mask:8; + u64 i_test_data:20; + u64 i_test_valid:1; + u64 i_test_cberr:1; + u64 i_test_flit:3; + u64 i_test_clear:1; + u64 i_test_err_capture:1; + u64 i_rsvd:9; } ii_ilct_fld_s; } ii_ilct_u_t; @@ -1482,20 +1482,20 @@ typedef union ii_ilct_u { ************************************************************************/ typedef union ii_iieph1_u { - uint64_t ii_iieph1_regval; - struct { - uint64_t i_command:7; - uint64_t i_rsvd_5:1; - uint64_t i_suppl:14; - uint64_t i_rsvd_4:1; - uint64_t i_source:14; - uint64_t i_rsvd_3:1; - uint64_t i_err_type:4; - uint64_t i_rsvd_2:4; - uint64_t i_overrun:1; - uint64_t i_rsvd_1:3; - uint64_t i_valid:1; - uint64_t i_rsvd:13; + u64 ii_iieph1_regval; + struct { + u64 i_command:7; + u64 i_rsvd_5:1; + u64 i_suppl:14; + u64 i_rsvd_4:1; + u64 i_source:14; + u64 i_rsvd_3:1; + u64 i_err_type:4; + u64 i_rsvd_2:4; + u64 i_overrun:1; + u64 i_rsvd_1:3; + u64 i_valid:1; + u64 i_rsvd:13; } ii_iieph1_fld_s; } ii_iieph1_u_t; @@ -1511,13 +1511,13 @@ typedef union ii_iieph1_u { ************************************************************************/ typedef union ii_iieph2_u { - uint64_t ii_iieph2_regval; + u64 ii_iieph2_regval; struct { - uint64_t i_rsvd_0:3; - uint64_t i_address:47; - uint64_t i_rsvd_1:10; - uint64_t i_tail:1; - uint64_t i_rsvd:3; + u64 i_rsvd_0:3; + u64 i_address:47; + u64 i_rsvd_1:10; + u64 i_tail:1; + u64 i_rsvd:3; } ii_iieph2_fld_s; } ii_iieph2_u_t; @@ -1532,9 +1532,9 @@ typedef union ii_iieph2_u { ************************************************************************/ typedef union ii_islapr_u { - uint64_t ii_islapr_regval; + u64 ii_islapr_regval; struct { - uint64_t i_region:64; + u64 i_region:64; } ii_islapr_fld_s; } ii_islapr_u_t; @@ -1547,10 +1547,10 @@ typedef union ii_islapr_u { ************************************************************************/ typedef union ii_islapo_u { - uint64_t ii_islapo_regval; + u64 ii_islapo_regval; struct { - uint64_t i_io_sbx_ovrride:56; - uint64_t i_rsvd:8; + u64 i_io_sbx_ovrride:56; + u64 i_rsvd:8; } ii_islapo_fld_s; } ii_islapo_u_t; @@ -1563,14 +1563,14 @@ typedef union ii_islapo_u { ************************************************************************/ typedef union ii_iwi_u { - uint64_t ii_iwi_regval; - struct { - uint64_t i_prescale:24; - uint64_t i_rsvd:8; - uint64_t i_timeout:8; - uint64_t i_rsvd1:8; - uint64_t i_intrpt_retry_period:8; - uint64_t i_rsvd2:8; + u64 ii_iwi_regval; + struct { + u64 i_prescale:24; + u64 i_rsvd:8; + u64 i_timeout:8; + u64 i_rsvd1:8; + u64 i_intrpt_retry_period:8; + u64 i_rsvd2:8; } ii_iwi_fld_s; } ii_iwi_u_t; @@ -1582,26 +1582,26 @@ typedef union ii_iwi_u { ************************************************************************/ typedef union ii_iwel_u { - uint64_t ii_iwel_regval; - struct { - uint64_t i_intr_timed_out:1; - uint64_t i_rsvd:7; - uint64_t i_cam_overflow:1; - uint64_t i_cam_read_miss:1; - uint64_t i_rsvd1:2; - uint64_t i_ioq_rep_underflow:1; - uint64_t i_ioq_req_underflow:1; - uint64_t i_ioq_rep_overflow:1; - uint64_t i_ioq_req_overflow:1; - uint64_t i_iiq_rep_overflow:1; - uint64_t i_iiq_req_overflow:1; - uint64_t i_rsvd2:6; - uint64_t i_ii_xn_rep_cred_over_under:1; - uint64_t i_ii_xn_req_cred_over_under:1; - uint64_t i_rsvd3:6; - uint64_t i_ii_xn_invalid_cmd:1; - uint64_t i_xn_ii_invalid_cmd:1; - uint64_t i_rsvd4:30; + u64 ii_iwel_regval; + struct { + u64 i_intr_timed_out:1; + u64 i_rsvd:7; + u64 i_cam_overflow:1; + u64 i_cam_read_miss:1; + u64 i_rsvd1:2; + u64 i_ioq_rep_underflow:1; + u64 i_ioq_req_underflow:1; + u64 i_ioq_rep_overflow:1; + u64 i_ioq_req_overflow:1; + u64 i_iiq_rep_overflow:1; + u64 i_iiq_req_overflow:1; + u64 i_rsvd2:6; + u64 i_ii_xn_rep_cred_over_under:1; + u64 i_ii_xn_req_cred_over_under:1; + u64 i_rsvd3:6; + u64 i_ii_xn_invalid_cmd:1; + u64 i_xn_ii_invalid_cmd:1; + u64 i_rsvd4:30; } ii_iwel_fld_s; } ii_iwel_u_t; @@ -1612,22 +1612,22 @@ typedef union ii_iwel_u { ************************************************************************/ typedef union ii_iwc_u { - uint64_t ii_iwc_regval; - struct { - uint64_t i_dma_byte_swap:1; - uint64_t i_rsvd:3; - uint64_t i_cam_read_lines_reset:1; - uint64_t i_rsvd1:3; - uint64_t i_ii_xn_cred_over_under_log:1; - uint64_t i_rsvd2:19; - uint64_t i_xn_rep_iq_depth:5; - uint64_t i_rsvd3:3; - uint64_t i_xn_req_iq_depth:5; - uint64_t i_rsvd4:3; - uint64_t i_iiq_depth:6; - uint64_t i_rsvd5:12; - uint64_t i_force_rep_cred:1; - uint64_t i_force_req_cred:1; + u64 ii_iwc_regval; + struct { + u64 i_dma_byte_swap:1; + u64 i_rsvd:3; + u64 i_cam_read_lines_reset:1; + u64 i_rsvd1:3; + u64 i_ii_xn_cred_over_under_log:1; + u64 i_rsvd2:19; + u64 i_xn_rep_iq_depth:5; + u64 i_rsvd3:3; + u64 i_xn_req_iq_depth:5; + u64 i_rsvd4:3; + u64 i_iiq_depth:6; + u64 i_rsvd5:12; + u64 i_force_rep_cred:1; + u64 i_force_req_cred:1; } ii_iwc_fld_s; } ii_iwc_u_t; @@ -1638,12 +1638,12 @@ typedef union ii_iwc_u { ************************************************************************/ typedef union ii_iws_u { - uint64_t ii_iws_regval; + u64 ii_iws_regval; struct { - uint64_t i_xn_rep_iq_credits:5; - uint64_t i_rsvd:3; - uint64_t i_xn_req_iq_credits:5; - uint64_t i_rsvd1:51; + u64 i_xn_rep_iq_credits:5; + u64 i_rsvd:3; + u64 i_xn_req_iq_credits:5; + u64 i_rsvd1:51; } ii_iws_fld_s; } ii_iws_u_t; @@ -1654,26 +1654,26 @@ typedef union ii_iws_u { ************************************************************************/ typedef union ii_iweim_u { - uint64_t ii_iweim_regval; - struct { - uint64_t i_intr_timed_out:1; - uint64_t i_rsvd:7; - uint64_t i_cam_overflow:1; - uint64_t i_cam_read_miss:1; - uint64_t i_rsvd1:2; - uint64_t i_ioq_rep_underflow:1; - uint64_t i_ioq_req_underflow:1; - uint64_t i_ioq_rep_overflow:1; - uint64_t i_ioq_req_overflow:1; - uint64_t i_iiq_rep_overflow:1; - uint64_t i_iiq_req_overflow:1; - uint64_t i_rsvd2:6; - uint64_t i_ii_xn_rep_cred_overflow:1; - uint64_t i_ii_xn_req_cred_overflow:1; - uint64_t i_rsvd3:6; - uint64_t i_ii_xn_invalid_cmd:1; - uint64_t i_xn_ii_invalid_cmd:1; - uint64_t i_rsvd4:30; + u64 ii_iweim_regval; + struct { + u64 i_intr_timed_out:1; + u64 i_rsvd:7; + u64 i_cam_overflow:1; + u64 i_cam_read_miss:1; + u64 i_rsvd1:2; + u64 i_ioq_rep_underflow:1; + u64 i_ioq_req_underflow:1; + u64 i_ioq_rep_overflow:1; + u64 i_ioq_req_overflow:1; + u64 i_iiq_rep_overflow:1; + u64 i_iiq_req_overflow:1; + u64 i_rsvd2:6; + u64 i_ii_xn_rep_cred_overflow:1; + u64 i_ii_xn_req_cred_overflow:1; + u64 i_rsvd3:6; + u64 i_ii_xn_invalid_cmd:1; + u64 i_xn_ii_invalid_cmd:1; + u64 i_rsvd4:30; } ii_iweim_fld_s; } ii_iweim_u_t; @@ -1688,13 +1688,13 @@ typedef union ii_iweim_u { ************************************************************************/ typedef union ii_ipca_u { - uint64_t ii_ipca_regval; + u64 ii_ipca_regval; struct { - uint64_t i_wid:4; - uint64_t i_adjust:1; - uint64_t i_rsvd_1:3; - uint64_t i_field:2; - uint64_t i_rsvd:54; + u64 i_wid:4; + u64 i_adjust:1; + u64 i_rsvd_1:3; + u64 i_field:2; + u64 i_rsvd:54; } ii_ipca_fld_s; } ii_ipca_u_t; @@ -1709,12 +1709,12 @@ typedef union ii_ipca_u { ************************************************************************/ typedef union ii_iprte0a_u { - uint64_t ii_iprte0a_regval; + u64 ii_iprte0a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte0a_fld_s; } ii_iprte0a_u_t; @@ -1729,12 +1729,12 @@ typedef union ii_iprte0a_u { ************************************************************************/ typedef union ii_iprte1a_u { - uint64_t ii_iprte1a_regval; + u64 ii_iprte1a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte1a_fld_s; } ii_iprte1a_u_t; @@ -1749,12 +1749,12 @@ typedef union ii_iprte1a_u { ************************************************************************/ typedef union ii_iprte2a_u { - uint64_t ii_iprte2a_regval; + u64 ii_iprte2a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte2a_fld_s; } ii_iprte2a_u_t; @@ -1769,12 +1769,12 @@ typedef union ii_iprte2a_u { ************************************************************************/ typedef union ii_iprte3a_u { - uint64_t ii_iprte3a_regval; + u64 ii_iprte3a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte3a_fld_s; } ii_iprte3a_u_t; @@ -1789,12 +1789,12 @@ typedef union ii_iprte3a_u { ************************************************************************/ typedef union ii_iprte4a_u { - uint64_t ii_iprte4a_regval; + u64 ii_iprte4a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte4a_fld_s; } ii_iprte4a_u_t; @@ -1809,12 +1809,12 @@ typedef union ii_iprte4a_u { ************************************************************************/ typedef union ii_iprte5a_u { - uint64_t ii_iprte5a_regval; + u64 ii_iprte5a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte5a_fld_s; } ii_iprte5a_u_t; @@ -1829,12 +1829,12 @@ typedef union ii_iprte5a_u { ************************************************************************/ typedef union ii_iprte6a_u { - uint64_t ii_iprte6a_regval; + u64 ii_iprte6a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprte6a_fld_s; } ii_iprte6a_u_t; @@ -1849,12 +1849,12 @@ typedef union ii_iprte6a_u { ************************************************************************/ typedef union ii_iprte7a_u { - uint64_t ii_iprte7a_regval; + u64 ii_iprte7a_regval; struct { - uint64_t i_rsvd_1:54; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 i_rsvd_1:54; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } ii_iprtea7_fld_s; } ii_iprte7a_u_t; @@ -1869,12 +1869,12 @@ typedef union ii_iprte7a_u { ************************************************************************/ typedef union ii_iprte0b_u { - uint64_t ii_iprte0b_regval; + u64 ii_iprte0b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte0b_fld_s; } ii_iprte0b_u_t; @@ -1889,12 +1889,12 @@ typedef union ii_iprte0b_u { ************************************************************************/ typedef union ii_iprte1b_u { - uint64_t ii_iprte1b_regval; + u64 ii_iprte1b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte1b_fld_s; } ii_iprte1b_u_t; @@ -1909,12 +1909,12 @@ typedef union ii_iprte1b_u { ************************************************************************/ typedef union ii_iprte2b_u { - uint64_t ii_iprte2b_regval; + u64 ii_iprte2b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte2b_fld_s; } ii_iprte2b_u_t; @@ -1929,12 +1929,12 @@ typedef union ii_iprte2b_u { ************************************************************************/ typedef union ii_iprte3b_u { - uint64_t ii_iprte3b_regval; + u64 ii_iprte3b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte3b_fld_s; } ii_iprte3b_u_t; @@ -1949,12 +1949,12 @@ typedef union ii_iprte3b_u { ************************************************************************/ typedef union ii_iprte4b_u { - uint64_t ii_iprte4b_regval; + u64 ii_iprte4b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte4b_fld_s; } ii_iprte4b_u_t; @@ -1969,12 +1969,12 @@ typedef union ii_iprte4b_u { ************************************************************************/ typedef union ii_iprte5b_u { - uint64_t ii_iprte5b_regval; + u64 ii_iprte5b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte5b_fld_s; } ii_iprte5b_u_t; @@ -1989,12 +1989,12 @@ typedef union ii_iprte5b_u { ************************************************************************/ typedef union ii_iprte6b_u { - uint64_t ii_iprte6b_regval; + u64 ii_iprte6b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte6b_fld_s; } ii_iprte6b_u_t; @@ -2010,12 +2010,12 @@ typedef union ii_iprte6b_u { ************************************************************************/ typedef union ii_iprte7b_u { - uint64_t ii_iprte7b_regval; + u64 ii_iprte7b_regval; struct { - uint64_t i_rsvd_1:3; - uint64_t i_address:47; - uint64_t i_init:3; - uint64_t i_source:11; + u64 i_rsvd_1:3; + u64 i_address:47; + u64 i_init:3; + u64 i_source:11; } ii_iprte7b_fld_s; } ii_iprte7b_u_t; @@ -2038,13 +2038,13 @@ typedef union ii_iprte7b_u { ************************************************************************/ typedef union ii_ipdr_u { - uint64_t ii_ipdr_regval; + u64 ii_ipdr_regval; struct { - uint64_t i_te:3; - uint64_t i_rsvd_1:1; - uint64_t i_pnd:1; - uint64_t i_init_rpcnt:1; - uint64_t i_rsvd:58; + u64 i_te:3; + u64 i_rsvd_1:1; + u64 i_pnd:1; + u64 i_init_rpcnt:1; + u64 i_rsvd:58; } ii_ipdr_fld_s; } ii_ipdr_u_t; @@ -2066,11 +2066,11 @@ typedef union ii_ipdr_u { ************************************************************************/ typedef union ii_icdr_u { - uint64_t ii_icdr_regval; + u64 ii_icdr_regval; struct { - uint64_t i_crb_num:4; - uint64_t i_pnd:1; - uint64_t i_rsvd:59; + u64 i_crb_num:4; + u64 i_pnd:1; + u64 i_rsvd:59; } ii_icdr_fld_s; } ii_icdr_u_t; @@ -2092,13 +2092,13 @@ typedef union ii_icdr_u { ************************************************************************/ typedef union ii_ifdr_u { - uint64_t ii_ifdr_regval; + u64 ii_ifdr_regval; struct { - uint64_t i_ioq_max_rq:7; - uint64_t i_set_ioq_rq:1; - uint64_t i_ioq_max_rp:7; - uint64_t i_set_ioq_rp:1; - uint64_t i_rsvd:48; + u64 i_ioq_max_rq:7; + u64 i_set_ioq_rq:1; + u64 i_ioq_max_rp:7; + u64 i_set_ioq_rp:1; + u64 i_rsvd:48; } ii_ifdr_fld_s; } ii_ifdr_u_t; @@ -2114,12 +2114,12 @@ typedef union ii_ifdr_u { ************************************************************************/ typedef union ii_iiap_u { - uint64_t ii_iiap_regval; + u64 ii_iiap_regval; struct { - uint64_t i_rq_mls:6; - uint64_t i_rsvd_1:2; - uint64_t i_rp_mls:6; - uint64_t i_rsvd:50; + u64 i_rq_mls:6; + u64 i_rsvd_1:2; + u64 i_rp_mls:6; + u64 i_rsvd:50; } ii_iiap_fld_s; } ii_iiap_u_t; @@ -2133,22 +2133,22 @@ typedef union ii_iiap_u { ************************************************************************/ typedef union ii_icmr_u { - uint64_t ii_icmr_regval; - struct { - uint64_t i_sp_msg:1; - uint64_t i_rd_hdr:1; - uint64_t i_rsvd_4:2; - uint64_t i_c_cnt:4; - uint64_t i_rsvd_3:4; - uint64_t i_clr_rqpd:1; - uint64_t i_clr_rppd:1; - uint64_t i_rsvd_2:2; - uint64_t i_fc_cnt:4; - uint64_t i_crb_vld:15; - uint64_t i_crb_mark:15; - uint64_t i_rsvd_1:2; - uint64_t i_precise:1; - uint64_t i_rsvd:11; + u64 ii_icmr_regval; + struct { + u64 i_sp_msg:1; + u64 i_rd_hdr:1; + u64 i_rsvd_4:2; + u64 i_c_cnt:4; + u64 i_rsvd_3:4; + u64 i_clr_rqpd:1; + u64 i_clr_rppd:1; + u64 i_rsvd_2:2; + u64 i_fc_cnt:4; + u64 i_crb_vld:15; + u64 i_crb_mark:15; + u64 i_rsvd_1:2; + u64 i_precise:1; + u64 i_rsvd:11; } ii_icmr_fld_s; } ii_icmr_u_t; @@ -2161,13 +2161,13 @@ typedef union ii_icmr_u { ************************************************************************/ typedef union ii_iccr_u { - uint64_t ii_iccr_regval; + u64 ii_iccr_regval; struct { - uint64_t i_crb_num:4; - uint64_t i_rsvd_1:4; - uint64_t i_cmd:8; - uint64_t i_pending:1; - uint64_t i_rsvd:47; + u64 i_crb_num:4; + u64 i_rsvd_1:4; + u64 i_cmd:8; + u64 i_pending:1; + u64 i_rsvd:47; } ii_iccr_fld_s; } ii_iccr_u_t; @@ -2178,10 +2178,10 @@ typedef union ii_iccr_u { ************************************************************************/ typedef union ii_icto_u { - uint64_t ii_icto_regval; + u64 ii_icto_regval; struct { - uint64_t i_timeout:8; - uint64_t i_rsvd:56; + u64 i_timeout:8; + u64 i_rsvd:56; } ii_icto_fld_s; } ii_icto_u_t; @@ -2197,10 +2197,10 @@ typedef union ii_icto_u { ************************************************************************/ typedef union ii_ictp_u { - uint64_t ii_ictp_regval; + u64 ii_ictp_regval; struct { - uint64_t i_prescale:24; - uint64_t i_rsvd:40; + u64 i_prescale:24; + u64 i_rsvd:40; } ii_ictp_fld_s; } ii_ictp_u_t; @@ -2228,14 +2228,14 @@ typedef union ii_ictp_u { ************************************************************************/ typedef union ii_icrb0_a_u { - uint64_t ii_icrb0_a_regval; - struct { - uint64_t ia_iow:1; - uint64_t ia_vld:1; - uint64_t ia_addr:47; - uint64_t ia_tnum:5; - uint64_t ia_sidn:4; - uint64_t ia_rsvd:6; + u64 ii_icrb0_a_regval; + struct { + u64 ia_iow:1; + u64 ia_vld:1; + u64 ia_addr:47; + u64 ia_tnum:5; + u64 ia_sidn:4; + u64 ia_rsvd:6; } ii_icrb0_a_fld_s; } ii_icrb0_a_u_t; @@ -2249,30 +2249,30 @@ typedef union ii_icrb0_a_u { ************************************************************************/ typedef union ii_icrb0_b_u { - uint64_t ii_icrb0_b_regval; - struct { - uint64_t ib_xt_err:1; - uint64_t ib_mark:1; - uint64_t ib_ln_uce:1; - uint64_t ib_errcode:3; - uint64_t ib_error:1; - uint64_t ib_stall__bte_1:1; - uint64_t ib_stall__bte_0:1; - uint64_t ib_stall__intr:1; - uint64_t ib_stall_ib:1; - uint64_t ib_intvn:1; - uint64_t ib_wb:1; - uint64_t ib_hold:1; - uint64_t ib_ack:1; - uint64_t ib_resp:1; - uint64_t ib_ack_cnt:11; - uint64_t ib_rsvd:7; - uint64_t ib_exc:5; - uint64_t ib_init:3; - uint64_t ib_imsg:8; - uint64_t ib_imsgtype:2; - uint64_t ib_use_old:1; - uint64_t ib_rsvd_1:11; + u64 ii_icrb0_b_regval; + struct { + u64 ib_xt_err:1; + u64 ib_mark:1; + u64 ib_ln_uce:1; + u64 ib_errcode:3; + u64 ib_error:1; + u64 ib_stall__bte_1:1; + u64 ib_stall__bte_0:1; + u64 ib_stall__intr:1; + u64 ib_stall_ib:1; + u64 ib_intvn:1; + u64 ib_wb:1; + u64 ib_hold:1; + u64 ib_ack:1; + u64 ib_resp:1; + u64 ib_ack_cnt:11; + u64 ib_rsvd:7; + u64 ib_exc:5; + u64 ib_init:3; + u64 ib_imsg:8; + u64 ib_imsgtype:2; + u64 ib_use_old:1; + u64 ib_rsvd_1:11; } ii_icrb0_b_fld_s; } ii_icrb0_b_u_t; @@ -2286,17 +2286,17 @@ typedef union ii_icrb0_b_u { ************************************************************************/ typedef union ii_icrb0_c_u { - uint64_t ii_icrb0_c_regval; - struct { - uint64_t ic_source:15; - uint64_t ic_size:2; - uint64_t ic_ct:1; - uint64_t ic_bte_num:1; - uint64_t ic_gbr:1; - uint64_t ic_resprqd:1; - uint64_t ic_bo:1; - uint64_t ic_suppl:15; - uint64_t ic_rsvd:27; + u64 ii_icrb0_c_regval; + struct { + u64 ic_source:15; + u64 ic_size:2; + u64 ic_ct:1; + u64 ic_bte_num:1; + u64 ic_gbr:1; + u64 ic_resprqd:1; + u64 ic_bo:1; + u64 ic_suppl:15; + u64 ic_rsvd:27; } ii_icrb0_c_fld_s; } ii_icrb0_c_u_t; @@ -2310,14 +2310,14 @@ typedef union ii_icrb0_c_u { ************************************************************************/ typedef union ii_icrb0_d_u { - uint64_t ii_icrb0_d_regval; - struct { - uint64_t id_pa_be:43; - uint64_t id_bte_op:1; - uint64_t id_pr_psc:4; - uint64_t id_pr_cnt:4; - uint64_t id_sleep:1; - uint64_t id_rsvd:11; + u64 ii_icrb0_d_regval; + struct { + u64 id_pa_be:43; + u64 id_bte_op:1; + u64 id_pr_psc:4; + u64 id_pr_cnt:4; + u64 id_sleep:1; + u64 id_rsvd:11; } ii_icrb0_d_fld_s; } ii_icrb0_d_u_t; @@ -2331,14 +2331,14 @@ typedef union ii_icrb0_d_u { ************************************************************************/ typedef union ii_icrb0_e_u { - uint64_t ii_icrb0_e_regval; - struct { - uint64_t ie_timeout:8; - uint64_t ie_context:15; - uint64_t ie_rsvd:1; - uint64_t ie_tvld:1; - uint64_t ie_cvld:1; - uint64_t ie_rsvd_0:38; + u64 ii_icrb0_e_regval; + struct { + u64 ie_timeout:8; + u64 ie_context:15; + u64 ie_rsvd:1; + u64 ie_tvld:1; + u64 ie_cvld:1; + u64 ie_rsvd_0:38; } ii_icrb0_e_fld_s; } ii_icrb0_e_u_t; @@ -2351,12 +2351,12 @@ typedef union ii_icrb0_e_u { ************************************************************************/ typedef union ii_icsml_u { - uint64_t ii_icsml_regval; + u64 ii_icsml_regval; struct { - uint64_t i_tt_addr:47; - uint64_t i_newsuppl_ex:14; - uint64_t i_reserved:2; - uint64_t i_overflow:1; + u64 i_tt_addr:47; + u64 i_newsuppl_ex:14; + u64 i_reserved:2; + u64 i_overflow:1; } ii_icsml_fld_s; } ii_icsml_u_t; @@ -2369,10 +2369,10 @@ typedef union ii_icsml_u { ************************************************************************/ typedef union ii_icsmm_u { - uint64_t ii_icsmm_regval; + u64 ii_icsmm_regval; struct { - uint64_t i_tt_ack_cnt:11; - uint64_t i_reserved:53; + u64 i_tt_ack_cnt:11; + u64 i_reserved:53; } ii_icsmm_fld_s; } ii_icsmm_u_t; @@ -2385,48 +2385,48 @@ typedef union ii_icsmm_u { ************************************************************************/ typedef union ii_icsmh_u { - uint64_t ii_icsmh_regval; - struct { - uint64_t i_tt_vld:1; - uint64_t i_xerr:1; - uint64_t i_ft_cwact_o:1; - uint64_t i_ft_wact_o:1; - uint64_t i_ft_active_o:1; - uint64_t i_sync:1; - uint64_t i_mnusg:1; - uint64_t i_mnusz:1; - uint64_t i_plusz:1; - uint64_t i_plusg:1; - uint64_t i_tt_exc:5; - uint64_t i_tt_wb:1; - uint64_t i_tt_hold:1; - uint64_t i_tt_ack:1; - uint64_t i_tt_resp:1; - uint64_t i_tt_intvn:1; - uint64_t i_g_stall_bte1:1; - uint64_t i_g_stall_bte0:1; - uint64_t i_g_stall_il:1; - uint64_t i_g_stall_ib:1; - uint64_t i_tt_imsg:8; - uint64_t i_tt_imsgtype:2; - uint64_t i_tt_use_old:1; - uint64_t i_tt_respreqd:1; - uint64_t i_tt_bte_num:1; - uint64_t i_cbn:1; - uint64_t i_match:1; - uint64_t i_rpcnt_lt_34:1; - uint64_t i_rpcnt_ge_34:1; - uint64_t i_rpcnt_lt_18:1; - uint64_t i_rpcnt_ge_18:1; - uint64_t i_rpcnt_lt_2:1; - uint64_t i_rpcnt_ge_2:1; - uint64_t i_rqcnt_lt_18:1; - uint64_t i_rqcnt_ge_18:1; - uint64_t i_rqcnt_lt_2:1; - uint64_t i_rqcnt_ge_2:1; - uint64_t i_tt_device:7; - uint64_t i_tt_init:3; - uint64_t i_reserved:5; + u64 ii_icsmh_regval; + struct { + u64 i_tt_vld:1; + u64 i_xerr:1; + u64 i_ft_cwact_o:1; + u64 i_ft_wact_o:1; + u64 i_ft_active_o:1; + u64 i_sync:1; + u64 i_mnusg:1; + u64 i_mnusz:1; + u64 i_plusz:1; + u64 i_plusg:1; + u64 i_tt_exc:5; + u64 i_tt_wb:1; + u64 i_tt_hold:1; + u64 i_tt_ack:1; + u64 i_tt_resp:1; + u64 i_tt_intvn:1; + u64 i_g_stall_bte1:1; + u64 i_g_stall_bte0:1; + u64 i_g_stall_il:1; + u64 i_g_stall_ib:1; + u64 i_tt_imsg:8; + u64 i_tt_imsgtype:2; + u64 i_tt_use_old:1; + u64 i_tt_respreqd:1; + u64 i_tt_bte_num:1; + u64 i_cbn:1; + u64 i_match:1; + u64 i_rpcnt_lt_34:1; + u64 i_rpcnt_ge_34:1; + u64 i_rpcnt_lt_18:1; + u64 i_rpcnt_ge_18:1; + u64 i_rpcnt_lt_2:1; + u64 i_rpcnt_ge_2:1; + u64 i_rqcnt_lt_18:1; + u64 i_rqcnt_ge_18:1; + u64 i_rqcnt_lt_2:1; + u64 i_rqcnt_ge_2:1; + u64 i_tt_device:7; + u64 i_tt_init:3; + u64 i_reserved:5; } ii_icsmh_fld_s; } ii_icsmh_u_t; @@ -2439,14 +2439,14 @@ typedef union ii_icsmh_u { ************************************************************************/ typedef union ii_idbss_u { - uint64_t ii_idbss_regval; - struct { - uint64_t i_iioclk_core_submenu:3; - uint64_t i_rsvd:5; - uint64_t i_fsbclk_wrapper_submenu:3; - uint64_t i_rsvd_1:5; - uint64_t i_iioclk_menu:5; - uint64_t i_rsvd_2:43; + u64 ii_idbss_regval; + struct { + u64 i_iioclk_core_submenu:3; + u64 i_rsvd:5; + u64 i_fsbclk_wrapper_submenu:3; + u64 i_rsvd_1:5; + u64 i_iioclk_menu:5; + u64 i_rsvd_2:43; } ii_idbss_fld_s; } ii_idbss_u_t; @@ -2466,13 +2466,13 @@ typedef union ii_idbss_u { ************************************************************************/ typedef union ii_ibls0_u { - uint64_t ii_ibls0_regval; + u64 ii_ibls0_regval; struct { - uint64_t i_length:16; - uint64_t i_error:1; - uint64_t i_rsvd_1:3; - uint64_t i_busy:1; - uint64_t i_rsvd:43; + u64 i_length:16; + u64 i_error:1; + u64 i_rsvd_1:3; + u64 i_busy:1; + u64 i_rsvd:43; } ii_ibls0_fld_s; } ii_ibls0_u_t; @@ -2487,11 +2487,11 @@ typedef union ii_ibls0_u { ************************************************************************/ typedef union ii_ibsa0_u { - uint64_t ii_ibsa0_regval; + u64 ii_ibsa0_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:42; - uint64_t i_rsvd:15; + u64 i_rsvd_1:7; + u64 i_addr:42; + u64 i_rsvd:15; } ii_ibsa0_fld_s; } ii_ibsa0_u_t; @@ -2506,11 +2506,11 @@ typedef union ii_ibsa0_u { ************************************************************************/ typedef union ii_ibda0_u { - uint64_t ii_ibda0_regval; + u64 ii_ibda0_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:42; - uint64_t i_rsvd:15; + u64 i_rsvd_1:7; + u64 i_addr:42; + u64 i_rsvd:15; } ii_ibda0_fld_s; } ii_ibda0_u_t; @@ -2527,14 +2527,14 @@ typedef union ii_ibda0_u { ************************************************************************/ typedef union ii_ibct0_u { - uint64_t ii_ibct0_regval; - struct { - uint64_t i_zerofill:1; - uint64_t i_rsvd_2:3; - uint64_t i_notify:1; - uint64_t i_rsvd_1:3; - uint64_t i_poison:1; - uint64_t i_rsvd:55; + u64 ii_ibct0_regval; + struct { + u64 i_zerofill:1; + u64 i_rsvd_2:3; + u64 i_notify:1; + u64 i_rsvd_1:3; + u64 i_poison:1; + u64 i_rsvd:55; } ii_ibct0_fld_s; } ii_ibct0_u_t; @@ -2546,11 +2546,11 @@ typedef union ii_ibct0_u { ************************************************************************/ typedef union ii_ibna0_u { - uint64_t ii_ibna0_regval; + u64 ii_ibna0_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:42; - uint64_t i_rsvd:15; + u64 i_rsvd_1:7; + u64 i_addr:42; + u64 i_rsvd:15; } ii_ibna0_fld_s; } ii_ibna0_u_t; @@ -2563,13 +2563,13 @@ typedef union ii_ibna0_u { ************************************************************************/ typedef union ii_ibia0_u { - uint64_t ii_ibia0_regval; + u64 ii_ibia0_regval; struct { - uint64_t i_rsvd_2:1; - uint64_t i_node_id:11; - uint64_t i_rsvd_1:4; - uint64_t i_level:7; - uint64_t i_rsvd:41; + u64 i_rsvd_2:1; + u64 i_node_id:11; + u64 i_rsvd_1:4; + u64 i_level:7; + u64 i_rsvd:41; } ii_ibia0_fld_s; } ii_ibia0_u_t; @@ -2589,13 +2589,13 @@ typedef union ii_ibia0_u { ************************************************************************/ typedef union ii_ibls1_u { - uint64_t ii_ibls1_regval; + u64 ii_ibls1_regval; struct { - uint64_t i_length:16; - uint64_t i_error:1; - uint64_t i_rsvd_1:3; - uint64_t i_busy:1; - uint64_t i_rsvd:43; + u64 i_length:16; + u64 i_error:1; + u64 i_rsvd_1:3; + u64 i_busy:1; + u64 i_rsvd:43; } ii_ibls1_fld_s; } ii_ibls1_u_t; @@ -2610,11 +2610,11 @@ typedef union ii_ibls1_u { ************************************************************************/ typedef union ii_ibsa1_u { - uint64_t ii_ibsa1_regval; + u64 ii_ibsa1_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:33; - uint64_t i_rsvd:24; + u64 i_rsvd_1:7; + u64 i_addr:33; + u64 i_rsvd:24; } ii_ibsa1_fld_s; } ii_ibsa1_u_t; @@ -2629,11 +2629,11 @@ typedef union ii_ibsa1_u { ************************************************************************/ typedef union ii_ibda1_u { - uint64_t ii_ibda1_regval; + u64 ii_ibda1_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:33; - uint64_t i_rsvd:24; + u64 i_rsvd_1:7; + u64 i_addr:33; + u64 i_rsvd:24; } ii_ibda1_fld_s; } ii_ibda1_u_t; @@ -2650,14 +2650,14 @@ typedef union ii_ibda1_u { ************************************************************************/ typedef union ii_ibct1_u { - uint64_t ii_ibct1_regval; - struct { - uint64_t i_zerofill:1; - uint64_t i_rsvd_2:3; - uint64_t i_notify:1; - uint64_t i_rsvd_1:3; - uint64_t i_poison:1; - uint64_t i_rsvd:55; + u64 ii_ibct1_regval; + struct { + u64 i_zerofill:1; + u64 i_rsvd_2:3; + u64 i_notify:1; + u64 i_rsvd_1:3; + u64 i_poison:1; + u64 i_rsvd:55; } ii_ibct1_fld_s; } ii_ibct1_u_t; @@ -2669,11 +2669,11 @@ typedef union ii_ibct1_u { ************************************************************************/ typedef union ii_ibna1_u { - uint64_t ii_ibna1_regval; + u64 ii_ibna1_regval; struct { - uint64_t i_rsvd_1:7; - uint64_t i_addr:33; - uint64_t i_rsvd:24; + u64 i_rsvd_1:7; + u64 i_addr:33; + u64 i_rsvd:24; } ii_ibna1_fld_s; } ii_ibna1_u_t; @@ -2686,13 +2686,13 @@ typedef union ii_ibna1_u { ************************************************************************/ typedef union ii_ibia1_u { - uint64_t ii_ibia1_regval; + u64 ii_ibia1_regval; struct { - uint64_t i_pi_id:1; - uint64_t i_node_id:8; - uint64_t i_rsvd_1:7; - uint64_t i_level:7; - uint64_t i_rsvd:41; + u64 i_pi_id:1; + u64 i_node_id:8; + u64 i_rsvd_1:7; + u64 i_level:7; + u64 i_rsvd:41; } ii_ibia1_fld_s; } ii_ibia1_u_t; @@ -2712,12 +2712,12 @@ typedef union ii_ibia1_u { ************************************************************************/ typedef union ii_ipcr_u { - uint64_t ii_ipcr_regval; + u64 ii_ipcr_regval; struct { - uint64_t i_ippr0_c:4; - uint64_t i_ippr1_c:4; - uint64_t i_icct:8; - uint64_t i_rsvd:48; + u64 i_ippr0_c:4; + u64 i_ippr1_c:4; + u64 i_icct:8; + u64 i_rsvd:48; } ii_ipcr_fld_s; } ii_ipcr_u_t; @@ -2728,10 +2728,10 @@ typedef union ii_ipcr_u { ************************************************************************/ typedef union ii_ippr_u { - uint64_t ii_ippr_regval; + u64 ii_ippr_regval; struct { - uint64_t i_ippr0:32; - uint64_t i_ippr1:32; + u64 i_ippr0:32; + u64 i_ippr1:32; } ii_ippr_fld_s; } ii_ippr_u_t; @@ -3267,15 +3267,15 @@ typedef ii_icrb0_e_u_t icrbe_t; #define IO_PERF_SETS 32 /* Bit for the widget in inbound access register */ -#define IIO_IIWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) +#define IIO_IIWA_WIDGET(_w) ((u64)(1ULL << _w)) /* Bit for the widget in outbound access register */ -#define IIO_IOWA_WIDGET(_w) ((uint64_t)(1ULL << _w)) +#define IIO_IOWA_WIDGET(_w) ((u64)(1ULL << _w)) /* NOTE: The following define assumes that we are going to get * widget numbers from 8 thru F and the device numbers within * widget from 0 thru 7. */ -#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((uint64_t)(1ULL << (8 * ((w) - 8) + (d)))) +#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((u64)(1ULL << (8 * ((w) - 8) + (d)))) /* IO Interrupt Destination Register */ #define IIO_IIDSR_SENT_SHIFT 28 @@ -3302,9 +3302,9 @@ typedef ii_icrb0_e_u_t icrbe_t; */ typedef union hubii_wcr_u { - uint64_t wcr_reg_value; + u64 wcr_reg_value; struct { - uint64_t wcr_widget_id:4, /* LLP crossbar credit */ + u64 wcr_widget_id:4, /* LLP crossbar credit */ wcr_tag_mode:1, /* Tag mode */ wcr_rsvd1:8, /* Reserved */ wcr_xbar_crd:3, /* LLP crossbar credit */ @@ -3324,9 +3324,9 @@ performance registers */ performed */ typedef union io_perf_sel { - uint64_t perf_sel_reg; + u64 perf_sel_reg; struct { - uint64_t perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48; + u64 perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48; } perf_sel_bits; } io_perf_sel_t; @@ -3334,24 +3334,24 @@ typedef union io_perf_sel { hardware problems there is only one counter, not two. */ typedef union io_perf_cnt { - uint64_t perf_cnt; + u64 perf_cnt; struct { - uint64_t perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32; + u64 perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32; } perf_cnt_bits; } io_perf_cnt_t; typedef union iprte_a { - uint64_t entry; - struct { - uint64_t i_rsvd_1:3; - uint64_t i_addr:38; - uint64_t i_init:3; - uint64_t i_source:8; - uint64_t i_rsvd:2; - uint64_t i_widget:4; - uint64_t i_to_cnt:5; - uint64_t i_vld:1; + u64 entry; + struct { + u64 i_rsvd_1:3; + u64 i_addr:38; + u64 i_init:3; + u64 i_source:8; + u64 i_rsvd:2; + u64 i_widget:4; + u64 i_to_cnt:5; + u64 i_vld:1; } iprte_fields; } iprte_a_t; diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h index e68a80853d5..9ca642cad33 100644 --- a/include/asm-ia64/sn/sn_feature_sets.h +++ b/include/asm-ia64/sn/sn_feature_sets.h @@ -8,7 +8,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2005-2006 Silicon Graphics, Inc. All rights reserved. */ @@ -27,14 +27,12 @@ extern int sn_prom_feature_available(int id); * "false" for new features. * * Use: - * if (sn_prom_feature_available(PRF_FEATURE_XXX)) + * if (sn_prom_feature_available(PRF_XXX)) * ... */ -/* - * Example: feature XXX - */ -#define PRF_FEATURE_XXX 0 +#define PRF_PAL_CACHE_FLUSH_SAFE 0 +#define PRF_DEVICE_FLUSH_LIST 1 @@ -51,7 +49,7 @@ extern int sn_prom_feature_available(int id); * * By default, features are disabled unless explicitly enabled. */ -#define OSF_MCA_SLV_TO_OS_INIT_SLV 0 -#define OSF_FEAT_LOG_SBES 1 +#define OSF_MCA_SLV_TO_OS_INIT_SLV 0 +#define OSF_FEAT_LOG_SBES 1 #endif /* _ASM_IA64_SN_FEATURE_SETS_H */ diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index 8b9e10e7cdb..e77f0c9b7d3 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h @@ -273,7 +273,7 @@ ia64_sn_console_putc(char ch) ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0); + SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0); return ret_stuff.status; } @@ -290,7 +290,7 @@ ia64_sn_console_putb(const char *buf, int len) ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0); + SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0); if ( ret_stuff.status == 0 ) { return ret_stuff.v0; @@ -310,7 +310,7 @@ ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec) ret_stuff.v0 = 0; ret_stuff.v1 = 0; ret_stuff.v2 = 0; - SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0); + SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0); return ret_stuff.status; } @@ -398,7 +398,7 @@ ia64_sn_console_intr_status(void) * Enable an interrupt on the SAL console device. */ static inline void -ia64_sn_console_intr_enable(uint64_t intr) +ia64_sn_console_intr_enable(u64 intr) { struct ia64_sal_retval ret_stuff; @@ -415,7 +415,7 @@ ia64_sn_console_intr_enable(uint64_t intr) * Disable an interrupt on the SAL console device. */ static inline void -ia64_sn_console_intr_disable(uint64_t intr) +ia64_sn_console_intr_disable(u64 intr) { struct ia64_sal_retval ret_stuff; @@ -441,7 +441,7 @@ ia64_sn_console_xmit_chars(char *buf, int len) ret_stuff.v1 = 0; ret_stuff.v2 = 0; SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, - (uint64_t)buf, (uint64_t)len, + (u64)buf, (u64)len, 0, 0, 0, 0, 0); if (ret_stuff.status == 0) { diff --git a/include/asm-ia64/sn/tioca.h b/include/asm-ia64/sn/tioca.h index bc1aacfb948..666222d7f0f 100644 --- a/include/asm-ia64/sn/tioca.h +++ b/include/asm-ia64/sn/tioca.h @@ -19,47 +19,47 @@ */ struct tioca { - uint64_t ca_id; /* 0x000000 */ - uint64_t ca_control1; /* 0x000008 */ - uint64_t ca_control2; /* 0x000010 */ - uint64_t ca_status1; /* 0x000018 */ - uint64_t ca_status2; /* 0x000020 */ - uint64_t ca_gart_aperature; /* 0x000028 */ - uint64_t ca_gfx_detach; /* 0x000030 */ - uint64_t ca_inta_dest_addr; /* 0x000038 */ - uint64_t ca_intb_dest_addr; /* 0x000040 */ - uint64_t ca_err_int_dest_addr; /* 0x000048 */ - uint64_t ca_int_status; /* 0x000050 */ - uint64_t ca_int_status_alias; /* 0x000058 */ - uint64_t ca_mult_error; /* 0x000060 */ - uint64_t ca_mult_error_alias; /* 0x000068 */ - uint64_t ca_first_error; /* 0x000070 */ - uint64_t ca_int_mask; /* 0x000078 */ - uint64_t ca_crm_pkterr_type; /* 0x000080 */ - uint64_t ca_crm_pkterr_type_alias; /* 0x000088 */ - uint64_t ca_crm_ct_error_detail_1; /* 0x000090 */ - uint64_t ca_crm_ct_error_detail_2; /* 0x000098 */ - uint64_t ca_crm_tnumto; /* 0x0000A0 */ - uint64_t ca_gart_err; /* 0x0000A8 */ - uint64_t ca_pcierr_type; /* 0x0000B0 */ - uint64_t ca_pcierr_addr; /* 0x0000B8 */ - - uint64_t ca_pad_0000C0[3]; /* 0x0000{C0..D0} */ - - uint64_t ca_pci_rd_buf_flush; /* 0x0000D8 */ - uint64_t ca_pci_dma_addr_extn; /* 0x0000E0 */ - uint64_t ca_agp_dma_addr_extn; /* 0x0000E8 */ - uint64_t ca_force_inta; /* 0x0000F0 */ - uint64_t ca_force_intb; /* 0x0000F8 */ - uint64_t ca_debug_vector_sel; /* 0x000100 */ - uint64_t ca_debug_mux_core_sel; /* 0x000108 */ - uint64_t ca_debug_mux_pci_sel; /* 0x000110 */ - uint64_t ca_debug_domain_sel; /* 0x000118 */ - - uint64_t ca_pad_000120[28]; /* 0x0001{20..F8} */ - - uint64_t ca_gart_ptr_table; /* 0x200 */ - uint64_t ca_gart_tlb_addr[8]; /* 0x2{08..40} */ + u64 ca_id; /* 0x000000 */ + u64 ca_control1; /* 0x000008 */ + u64 ca_control2; /* 0x000010 */ + u64 ca_status1; /* 0x000018 */ + u64 ca_status2; /* 0x000020 */ + u64 ca_gart_aperature; /* 0x000028 */ + u64 ca_gfx_detach; /* 0x000030 */ + u64 ca_inta_dest_addr; /* 0x000038 */ + u64 ca_intb_dest_addr; /* 0x000040 */ + u64 ca_err_int_dest_addr; /* 0x000048 */ + u64 ca_int_status; /* 0x000050 */ + u64 ca_int_status_alias; /* 0x000058 */ + u64 ca_mult_error; /* 0x000060 */ + u64 ca_mult_error_alias; /* 0x000068 */ + u64 ca_first_error; /* 0x000070 */ + u64 ca_int_mask; /* 0x000078 */ + u64 ca_crm_pkterr_type; /* 0x000080 */ + u64 ca_crm_pkterr_type_alias; /* 0x000088 */ + u64 ca_crm_ct_error_detail_1; /* 0x000090 */ + u64 ca_crm_ct_error_detail_2; /* 0x000098 */ + u64 ca_crm_tnumto; /* 0x0000A0 */ + u64 ca_gart_err; /* 0x0000A8 */ + u64 ca_pcierr_type; /* 0x0000B0 */ + u64 ca_pcierr_addr; /* 0x0000B8 */ + + u64 ca_pad_0000C0[3]; /* 0x0000{C0..D0} */ + + u64 ca_pci_rd_buf_flush; /* 0x0000D8 */ + u64 ca_pci_dma_addr_extn; /* 0x0000E0 */ + u64 ca_agp_dma_addr_extn; /* 0x0000E8 */ + u64 ca_force_inta; /* 0x0000F0 */ + u64 ca_force_intb; /* 0x0000F8 */ + u64 ca_debug_vector_sel; /* 0x000100 */ + u64 ca_debug_mux_core_sel; /* 0x000108 */ + u64 ca_debug_mux_pci_sel; /* 0x000110 */ + u64 ca_debug_domain_sel; /* 0x000118 */ + + u64 ca_pad_000120[28]; /* 0x0001{20..F8} */ + + u64 ca_gart_ptr_table; /* 0x200 */ + u64 ca_gart_tlb_addr[8]; /* 0x2{08..40} */ }; /* diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h index b532ef6148e..ab7fe246346 100644 --- a/include/asm-ia64/sn/tioca_provider.h +++ b/include/asm-ia64/sn/tioca_provider.h @@ -56,31 +56,31 @@ struct tioca_kernel { /* * General GART stuff */ - uint64_t ca_ap_size; /* size of aperature in bytes */ - uint32_t ca_gart_entries; /* # uint64_t entries in gart */ - uint32_t ca_ap_pagesize; /* aperature page size in bytes */ - uint64_t ca_ap_bus_base; /* bus address of CA aperature */ - uint64_t ca_gart_size; /* gart size in bytes */ - uint64_t *ca_gart; /* gart table vaddr */ - uint64_t ca_gart_coretalk_addr; /* gart coretalk addr */ - uint8_t ca_gart_iscoherent; /* used in tioca_tlbflush */ + u64 ca_ap_size; /* size of aperature in bytes */ + u32 ca_gart_entries; /* # u64 entries in gart */ + u32 ca_ap_pagesize; /* aperature page size in bytes */ + u64 ca_ap_bus_base; /* bus address of CA aperature */ + u64 ca_gart_size; /* gart size in bytes */ + u64 *ca_gart; /* gart table vaddr */ + u64 ca_gart_coretalk_addr; /* gart coretalk addr */ + u8 ca_gart_iscoherent; /* used in tioca_tlbflush */ /* PCI GART convenience values */ - uint64_t ca_pciap_base; /* pci aperature bus base address */ - uint64_t ca_pciap_size; /* pci aperature size (bytes) */ - uint64_t ca_pcigart_base; /* gfx GART bus base address */ - uint64_t *ca_pcigart; /* gfx GART vm address */ - uint32_t ca_pcigart_entries; - uint32_t ca_pcigart_start; /* PCI start index in ca_gart */ + u64 ca_pciap_base; /* pci aperature bus base address */ + u64 ca_pciap_size; /* pci aperature size (bytes) */ + u64 ca_pcigart_base; /* gfx GART bus base address */ + u64 *ca_pcigart; /* gfx GART vm address */ + u32 ca_pcigart_entries; + u32 ca_pcigart_start; /* PCI start index in ca_gart */ void *ca_pcigart_pagemap; /* AGP GART convenience values */ - uint64_t ca_gfxap_base; /* gfx aperature bus base address */ - uint64_t ca_gfxap_size; /* gfx aperature size (bytes) */ - uint64_t ca_gfxgart_base; /* gfx GART bus base address */ - uint64_t *ca_gfxgart; /* gfx GART vm address */ - uint32_t ca_gfxgart_entries; - uint32_t ca_gfxgart_start; /* agpgart start index in ca_gart */ + u64 ca_gfxap_base; /* gfx aperature bus base address */ + u64 ca_gfxap_size; /* gfx aperature size (bytes) */ + u64 ca_gfxgart_base; /* gfx GART bus base address */ + u64 *ca_gfxgart; /* gfx GART vm address */ + u32 ca_gfxgart_entries; + u32 ca_gfxgart_start; /* agpgart start index in ca_gart */ }; /* @@ -93,11 +93,11 @@ struct tioca_kernel { struct tioca_common { struct pcibus_bussoft ca_common; /* common pciio header */ - uint32_t ca_rev; - uint32_t ca_closest_nasid; + u32 ca_rev; + u32 ca_closest_nasid; - uint64_t ca_prom_private; - uint64_t ca_kernel_private; + u64 ca_prom_private; + u64 ca_kernel_private; }; /** @@ -139,9 +139,9 @@ tioca_paddr_to_gart(unsigned long paddr) */ static inline unsigned long -tioca_physpage_to_gart(uint64_t page_addr) +tioca_physpage_to_gart(u64 page_addr) { - uint64_t coretalk_addr; + u64 coretalk_addr; coretalk_addr = PHYS_TO_TIODMA(page_addr); if (!coretalk_addr) { @@ -161,7 +161,7 @@ tioca_physpage_to_gart(uint64_t page_addr) static inline void tioca_tlbflush(struct tioca_kernel *tioca_kernel) { - volatile uint64_t tmp; + volatile u64 tmp; volatile struct tioca *ca_base; struct tioca_common *tioca_common; @@ -200,7 +200,7 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel) tmp = __sn_readq_relaxed(&ca_base->ca_control2); } -extern uint32_t tioca_gart_found; +extern u32 tioca_gart_found; extern struct list_head tioca_list; extern int tioca_init_provider(void); extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern); diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h index ecaddf96008..d4c990712ea 100644 --- a/include/asm-ia64/sn/tioce.h +++ b/include/asm-ia64/sn/tioce.h @@ -35,72 +35,72 @@ typedef volatile struct tioce { /* * ADMIN : Administration Registers */ - uint64_t ce_adm_id; /* 0x000000 */ - uint64_t ce_pad_000008; /* 0x000008 */ - uint64_t ce_adm_dyn_credit_status; /* 0x000010 */ - uint64_t ce_adm_last_credit_status; /* 0x000018 */ - uint64_t ce_adm_credit_limit; /* 0x000020 */ - uint64_t ce_adm_force_credit; /* 0x000028 */ - uint64_t ce_adm_control; /* 0x000030 */ - uint64_t ce_adm_mmr_chn_timeout; /* 0x000038 */ - uint64_t ce_adm_ssp_ure_timeout; /* 0x000040 */ - uint64_t ce_adm_ssp_dre_timeout; /* 0x000048 */ - uint64_t ce_adm_ssp_debug_sel; /* 0x000050 */ - uint64_t ce_adm_int_status; /* 0x000058 */ - uint64_t ce_adm_int_status_alias; /* 0x000060 */ - uint64_t ce_adm_int_mask; /* 0x000068 */ - uint64_t ce_adm_int_pending; /* 0x000070 */ - uint64_t ce_adm_force_int; /* 0x000078 */ - uint64_t ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ - uint64_t ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ - uint64_t ce_adm_error_summary; /* 0x000100 */ - uint64_t ce_adm_error_summary_alias; /* 0x000108 */ - uint64_t ce_adm_error_mask; /* 0x000110 */ - uint64_t ce_adm_first_error; /* 0x000118 */ - uint64_t ce_adm_error_overflow; /* 0x000120 */ - uint64_t ce_adm_error_overflow_alias; /* 0x000128 */ - uint64_t ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ - uint64_t ce_adm_tnum_error; /* 0x000140 */ - uint64_t ce_adm_mmr_err_detail; /* 0x000148 */ - uint64_t ce_adm_msg_sram_perr_detail; /* 0x000150 */ - uint64_t ce_adm_bap_sram_perr_detail; /* 0x000158 */ - uint64_t ce_adm_ce_sram_perr_detail; /* 0x000160 */ - uint64_t ce_adm_ce_credit_oflow_detail; /* 0x000168 */ - uint64_t ce_adm_tx_link_idle_max_timer; /* 0x000170 */ - uint64_t ce_adm_pcie_debug_sel; /* 0x000178 */ - uint64_t ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ - - uint64_t ce_adm_pcie_debug_sel_top; /* 0x000200 */ - uint64_t ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ - uint64_t ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ - uint64_t ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ - uint64_t ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ - uint64_t ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ - uint64_t ce_adm_pcie_trig_compare_top; /* 0x000230 */ - uint64_t ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ - uint64_t ce_adm_ssp_debug_sel_top; /* 0x000240 */ - uint64_t ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ - uint64_t ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ - uint64_t ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ - uint64_t ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ - uint64_t ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ - uint64_t ce_adm_ssp_trig_compare_top; /* 0x000270 */ - uint64_t ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ - uint64_t ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ - - uint64_t ce_adm_bap_ctrl; /* 0x000400 */ - uint64_t ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ - - uint64_t ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ - uint64_t ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ - - uint64_t ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ - uint64_t ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ - - uint64_t ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ - uint64_t ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ - - uint64_t ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ + u64 ce_adm_id; /* 0x000000 */ + u64 ce_pad_000008; /* 0x000008 */ + u64 ce_adm_dyn_credit_status; /* 0x000010 */ + u64 ce_adm_last_credit_status; /* 0x000018 */ + u64 ce_adm_credit_limit; /* 0x000020 */ + u64 ce_adm_force_credit; /* 0x000028 */ + u64 ce_adm_control; /* 0x000030 */ + u64 ce_adm_mmr_chn_timeout; /* 0x000038 */ + u64 ce_adm_ssp_ure_timeout; /* 0x000040 */ + u64 ce_adm_ssp_dre_timeout; /* 0x000048 */ + u64 ce_adm_ssp_debug_sel; /* 0x000050 */ + u64 ce_adm_int_status; /* 0x000058 */ + u64 ce_adm_int_status_alias; /* 0x000060 */ + u64 ce_adm_int_mask; /* 0x000068 */ + u64 ce_adm_int_pending; /* 0x000070 */ + u64 ce_adm_force_int; /* 0x000078 */ + u64 ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ + u64 ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ + u64 ce_adm_error_summary; /* 0x000100 */ + u64 ce_adm_error_summary_alias; /* 0x000108 */ + u64 ce_adm_error_mask; /* 0x000110 */ + u64 ce_adm_first_error; /* 0x000118 */ + u64 ce_adm_error_overflow; /* 0x000120 */ + u64 ce_adm_error_overflow_alias; /* 0x000128 */ + u64 ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ + u64 ce_adm_tnum_error; /* 0x000140 */ + u64 ce_adm_mmr_err_detail; /* 0x000148 */ + u64 ce_adm_msg_sram_perr_detail; /* 0x000150 */ + u64 ce_adm_bap_sram_perr_detail; /* 0x000158 */ + u64 ce_adm_ce_sram_perr_detail; /* 0x000160 */ + u64 ce_adm_ce_credit_oflow_detail; /* 0x000168 */ + u64 ce_adm_tx_link_idle_max_timer; /* 0x000170 */ + u64 ce_adm_pcie_debug_sel; /* 0x000178 */ + u64 ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ + + u64 ce_adm_pcie_debug_sel_top; /* 0x000200 */ + u64 ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ + u64 ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ + u64 ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ + u64 ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ + u64 ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ + u64 ce_adm_pcie_trig_compare_top; /* 0x000230 */ + u64 ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ + u64 ce_adm_ssp_debug_sel_top; /* 0x000240 */ + u64 ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ + u64 ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ + u64 ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ + u64 ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ + u64 ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ + u64 ce_adm_ssp_trig_compare_top; /* 0x000270 */ + u64 ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ + u64 ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ + + u64 ce_adm_bap_ctrl; /* 0x000400 */ + u64 ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ + + u64 ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ + u64 ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ + + u64 ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ + u64 ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ + + u64 ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ + u64 ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ + + u64 ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ /* * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2) @@ -109,141 +109,141 @@ typedef volatile struct tioce { */ #define ce_lsi(link_num) ce_lsi[link_num-1] struct ce_lsi_reg { - uint64_t ce_lsi_lpu_id; /* 0x00z000 */ - uint64_t ce_lsi_rst; /* 0x00z008 */ - uint64_t ce_lsi_dbg_stat; /* 0x00z010 */ - uint64_t ce_lsi_dbg_cfg; /* 0x00z018 */ - uint64_t ce_lsi_ltssm_ctrl; /* 0x00z020 */ - uint64_t ce_lsi_lk_stat; /* 0x00z028 */ - uint64_t ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ - uint64_t ce_lsi_int_and_stat; /* 0x00z040 */ - uint64_t ce_lsi_int_mask; /* 0x00z048 */ - uint64_t ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ - uint64_t ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ - uint64_t ce_pad_00z108; /* 0x00z108 */ - uint64_t ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ - uint64_t ce_pad_00z118; /* 0x00z118 */ - uint64_t ce_lsi_lk_perf_cnt1; /* 0x00z120 */ - uint64_t ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ - uint64_t ce_lsi_lk_perf_cnt2; /* 0x00z130 */ - uint64_t ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ - uint64_t ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ - uint64_t ce_lsi_lk_lyr_cfg; /* 0x00z200 */ - uint64_t ce_lsi_lk_lyr_status; /* 0x00z208 */ - uint64_t ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ - uint64_t ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ - uint64_t ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ - uint64_t ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ - uint64_t ce_lsi_fc_upd_ctl; /* 0x00z240 */ - uint64_t ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ - uint64_t ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ - uint64_t ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ - uint64_t ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ - uint64_t ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ - uint64_t ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ - uint64_t ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ - uint64_t ce_lsi_rply_tmr_thr; /* 0x00z410 */ - uint64_t ce_lsi_rply_tmr; /* 0x00z418 */ - uint64_t ce_lsi_rply_num_stat; /* 0x00z420 */ - uint64_t ce_lsi_rty_buf_max_addr; /* 0x00z428 */ - uint64_t ce_lsi_rty_fifo_ptr; /* 0x00z430 */ - uint64_t ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ - uint64_t ce_lsi_rty_fifo_cred; /* 0x00z440 */ - uint64_t ce_lsi_seq_cnt; /* 0x00z448 */ - uint64_t ce_lsi_ack_sent_seq_num; /* 0x00z450 */ - uint64_t ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ - uint64_t ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ - uint64_t ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ - uint64_t ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ - uint64_t ce_pad_00z478; /* 0x00z478 */ - uint64_t ce_lsi_mem_addr_ctl; /* 0x00z480 */ - uint64_t ce_lsi_mem_d_ld0; /* 0x00z488 */ - uint64_t ce_lsi_mem_d_ld1; /* 0x00z490 */ - uint64_t ce_lsi_mem_d_ld2; /* 0x00z498 */ - uint64_t ce_lsi_mem_d_ld3; /* 0x00z4A0 */ - uint64_t ce_lsi_mem_d_ld4; /* 0x00z4A8 */ - uint64_t ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ - uint64_t ce_lsi_rty_d_cnt; /* 0x00z4C0 */ - uint64_t ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ - uint64_t ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ - uint64_t ce_pad_00z4D8; /* 0x00z4D8 */ - uint64_t ce_lsi_ack_lat_thr; /* 0x00z4E0 */ - uint64_t ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ - uint64_t ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ - uint64_t ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ - uint64_t ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ - uint64_t ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ - uint64_t ce_lsi_phy_lyr_cfg; /* 0x00z600 */ - uint64_t ce_pad_00z608; /* 0x00z608 */ - uint64_t ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ - uint64_t ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ - uint64_t ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ - uint64_t ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ - uint64_t ce_lsi_rcv_phy_cfg; /* 0x00z680 */ - uint64_t ce_lsi_rcv_phy_stat1; /* 0x00z688 */ - uint64_t ce_lsi_rcv_phy_stat2; /* 0x00z690 */ - uint64_t ce_lsi_rcv_phy_stat3; /* 0x00z698 */ - uint64_t ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ - uint64_t ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ - uint64_t ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ - uint64_t ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ - uint64_t ce_lsi_tx_phy_cfg; /* 0x00z700 */ - uint64_t ce_lsi_tx_phy_stat; /* 0x00z708 */ - uint64_t ce_lsi_tx_phy_int_stat; /* 0x00z710 */ - uint64_t ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ - uint64_t ce_lsi_tx_phy_int_mask; /* 0x00z720 */ - uint64_t ce_lsi_tx_phy_stat2; /* 0x00z728 */ - uint64_t ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ - uint64_t ce_lsi_ltssm_cfg1; /* 0x00z780 */ - uint64_t ce_lsi_ltssm_cfg2; /* 0x00z788 */ - uint64_t ce_lsi_ltssm_cfg3; /* 0x00z790 */ - uint64_t ce_lsi_ltssm_cfg4; /* 0x00z798 */ - uint64_t ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ - uint64_t ce_lsi_ltssm_stat1; /* 0x00z7A8 */ - uint64_t ce_lsi_ltssm_stat2; /* 0x00z7B0 */ - uint64_t ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ - uint64_t ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ - uint64_t ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ - uint64_t ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ - uint64_t ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ - uint64_t ce_lsi_gb_cfg1; /* 0x00z800 */ - uint64_t ce_lsi_gb_cfg2; /* 0x00z808 */ - uint64_t ce_lsi_gb_cfg3; /* 0x00z810 */ - uint64_t ce_lsi_gb_cfg4; /* 0x00z818 */ - uint64_t ce_lsi_gb_stat; /* 0x00z820 */ - uint64_t ce_lsi_gb_int_stat; /* 0x00z828 */ - uint64_t ce_lsi_gb_int_stat_test; /* 0x00z830 */ - uint64_t ce_lsi_gb_int_mask; /* 0x00z838 */ - uint64_t ce_lsi_gb_pwr_dn1; /* 0x00z840 */ - uint64_t ce_lsi_gb_pwr_dn2; /* 0x00z848 */ - uint64_t ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ + u64 ce_lsi_lpu_id; /* 0x00z000 */ + u64 ce_lsi_rst; /* 0x00z008 */ + u64 ce_lsi_dbg_stat; /* 0x00z010 */ + u64 ce_lsi_dbg_cfg; /* 0x00z018 */ + u64 ce_lsi_ltssm_ctrl; /* 0x00z020 */ + u64 ce_lsi_lk_stat; /* 0x00z028 */ + u64 ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ + u64 ce_lsi_int_and_stat; /* 0x00z040 */ + u64 ce_lsi_int_mask; /* 0x00z048 */ + u64 ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ + u64 ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ + u64 ce_pad_00z108; /* 0x00z108 */ + u64 ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ + u64 ce_pad_00z118; /* 0x00z118 */ + u64 ce_lsi_lk_perf_cnt1; /* 0x00z120 */ + u64 ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ + u64 ce_lsi_lk_perf_cnt2; /* 0x00z130 */ + u64 ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ + u64 ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ + u64 ce_lsi_lk_lyr_cfg; /* 0x00z200 */ + u64 ce_lsi_lk_lyr_status; /* 0x00z208 */ + u64 ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ + u64 ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ + u64 ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ + u64 ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ + u64 ce_lsi_fc_upd_ctl; /* 0x00z240 */ + u64 ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ + u64 ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ + u64 ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ + u64 ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ + u64 ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ + u64 ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ + u64 ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ + u64 ce_lsi_rply_tmr_thr; /* 0x00z410 */ + u64 ce_lsi_rply_tmr; /* 0x00z418 */ + u64 ce_lsi_rply_num_stat; /* 0x00z420 */ + u64 ce_lsi_rty_buf_max_addr; /* 0x00z428 */ + u64 ce_lsi_rty_fifo_ptr; /* 0x00z430 */ + u64 ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ + u64 ce_lsi_rty_fifo_cred; /* 0x00z440 */ + u64 ce_lsi_seq_cnt; /* 0x00z448 */ + u64 ce_lsi_ack_sent_seq_num; /* 0x00z450 */ + u64 ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ + u64 ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ + u64 ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ + u64 ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ + u64 ce_pad_00z478; /* 0x00z478 */ + u64 ce_lsi_mem_addr_ctl; /* 0x00z480 */ + u64 ce_lsi_mem_d_ld0; /* 0x00z488 */ + u64 ce_lsi_mem_d_ld1; /* 0x00z490 */ + u64 ce_lsi_mem_d_ld2; /* 0x00z498 */ + u64 ce_lsi_mem_d_ld3; /* 0x00z4A0 */ + u64 ce_lsi_mem_d_ld4; /* 0x00z4A8 */ + u64 ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ + u64 ce_lsi_rty_d_cnt; /* 0x00z4C0 */ + u64 ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ + u64 ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ + u64 ce_pad_00z4D8; /* 0x00z4D8 */ + u64 ce_lsi_ack_lat_thr; /* 0x00z4E0 */ + u64 ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ + u64 ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ + u64 ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ + u64 ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ + u64 ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ + u64 ce_lsi_phy_lyr_cfg; /* 0x00z600 */ + u64 ce_pad_00z608; /* 0x00z608 */ + u64 ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ + u64 ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ + u64 ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ + u64 ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ + u64 ce_lsi_rcv_phy_cfg; /* 0x00z680 */ + u64 ce_lsi_rcv_phy_stat1; /* 0x00z688 */ + u64 ce_lsi_rcv_phy_stat2; /* 0x00z690 */ + u64 ce_lsi_rcv_phy_stat3; /* 0x00z698 */ + u64 ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ + u64 ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ + u64 ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ + u64 ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ + u64 ce_lsi_tx_phy_cfg; /* 0x00z700 */ + u64 ce_lsi_tx_phy_stat; /* 0x00z708 */ + u64 ce_lsi_tx_phy_int_stat; /* 0x00z710 */ + u64 ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ + u64 ce_lsi_tx_phy_int_mask; /* 0x00z720 */ + u64 ce_lsi_tx_phy_stat2; /* 0x00z728 */ + u64 ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ + u64 ce_lsi_ltssm_cfg1; /* 0x00z780 */ + u64 ce_lsi_ltssm_cfg2; /* 0x00z788 */ + u64 ce_lsi_ltssm_cfg3; /* 0x00z790 */ + u64 ce_lsi_ltssm_cfg4; /* 0x00z798 */ + u64 ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ + u64 ce_lsi_ltssm_stat1; /* 0x00z7A8 */ + u64 ce_lsi_ltssm_stat2; /* 0x00z7B0 */ + u64 ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ + u64 ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ + u64 ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ + u64 ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ + u64 ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ + u64 ce_lsi_gb_cfg1; /* 0x00z800 */ + u64 ce_lsi_gb_cfg2; /* 0x00z808 */ + u64 ce_lsi_gb_cfg3; /* 0x00z810 */ + u64 ce_lsi_gb_cfg4; /* 0x00z818 */ + u64 ce_lsi_gb_stat; /* 0x00z820 */ + u64 ce_lsi_gb_int_stat; /* 0x00z828 */ + u64 ce_lsi_gb_int_stat_test; /* 0x00z830 */ + u64 ce_lsi_gb_int_mask; /* 0x00z838 */ + u64 ce_lsi_gb_pwr_dn1; /* 0x00z840 */ + u64 ce_lsi_gb_pwr_dn2; /* 0x00z848 */ + u64 ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ } ce_lsi[2]; - uint64_t ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ + u64 ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ /* * CRM: Coretalk Receive Module Registers */ - uint64_t ce_crm_debug_mux; /* 0x004050 */ - uint64_t ce_pad_004058; /* 0x004058 */ - uint64_t ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ - uint64_t ce_crm_ssp_err_addr; /* 0x004068 */ - uint64_t ce_crm_ssp_err_syn; /* 0x004070 */ + u64 ce_crm_debug_mux; /* 0x004050 */ + u64 ce_pad_004058; /* 0x004058 */ + u64 ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ + u64 ce_crm_ssp_err_addr; /* 0x004068 */ + u64 ce_crm_ssp_err_syn; /* 0x004070 */ - uint64_t ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ + u64 ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ /* * CXM: Coretalk Xmit Module Registers */ - uint64_t ce_cxm_dyn_credit_status; /* 0x005010 */ - uint64_t ce_cxm_last_credit_status; /* 0x005018 */ - uint64_t ce_cxm_credit_limit; /* 0x005020 */ - uint64_t ce_cxm_force_credit; /* 0x005028 */ - uint64_t ce_cxm_disable_bypass; /* 0x005030 */ - uint64_t ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ - uint64_t ce_cxm_debug_mux; /* 0x005050 */ + u64 ce_cxm_dyn_credit_status; /* 0x005010 */ + u64 ce_cxm_last_credit_status; /* 0x005018 */ + u64 ce_cxm_credit_limit; /* 0x005020 */ + u64 ce_cxm_force_credit; /* 0x005028 */ + u64 ce_cxm_disable_bypass; /* 0x005030 */ + u64 ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ + u64 ce_cxm_debug_mux; /* 0x005050 */ - uint64_t ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ + u64 ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ /* * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2) @@ -258,209 +258,209 @@ typedef volatile struct tioce { #define ce_utl(link_num) ce_dtl_utl[link_num-1] struct ce_dtl_utl_reg { /* DTL */ - uint64_t ce_dtl_dtdr_credit_limit; /* 0x00y000 */ - uint64_t ce_dtl_dtdr_credit_force; /* 0x00y008 */ - uint64_t ce_dtl_dyn_credit_status; /* 0x00y010 */ - uint64_t ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ - uint64_t ce_dtl_dtl_ctrl; /* 0x00y020 */ - uint64_t ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ - uint64_t ce_dtl_debug_sel; /* 0x00y050 */ - uint64_t ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ + u64 ce_dtl_dtdr_credit_limit; /* 0x00y000 */ + u64 ce_dtl_dtdr_credit_force; /* 0x00y008 */ + u64 ce_dtl_dyn_credit_status; /* 0x00y010 */ + u64 ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ + u64 ce_dtl_dtl_ctrl; /* 0x00y020 */ + u64 ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ + u64 ce_dtl_debug_sel; /* 0x00y050 */ + u64 ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ /* UTL */ - uint64_t ce_utl_utl_ctrl; /* 0x00z000 */ - uint64_t ce_utl_debug_sel; /* 0x00z008 */ - uint64_t ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ + u64 ce_utl_utl_ctrl; /* 0x00z000 */ + u64 ce_utl_debug_sel; /* 0x00z008 */ + u64 ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ } ce_dtl_utl[2]; - uint64_t ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ + u64 ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ /* * URE: Upstream Request Engine */ - uint64_t ce_ure_dyn_credit_status; /* 0x00B010 */ - uint64_t ce_ure_last_credit_status; /* 0x00B018 */ - uint64_t ce_ure_credit_limit; /* 0x00B020 */ - uint64_t ce_pad_00B028; /* 0x00B028 */ - uint64_t ce_ure_control; /* 0x00B030 */ - uint64_t ce_ure_status; /* 0x00B038 */ - uint64_t ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ - uint64_t ce_ure_debug_sel; /* 0x00B050 */ - uint64_t ce_ure_pcie_debug_sel; /* 0x00B058 */ - uint64_t ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ - uint64_t ce_ure_ssp_err_addr; /* 0x00B068 */ - uint64_t ce_ure_page_map; /* 0x00B070 */ - uint64_t ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ - uint64_t ce_ure_pipe_sel1; /* 0x00B088 */ - uint64_t ce_ure_pipe_mask1; /* 0x00B090 */ - uint64_t ce_ure_pipe_sel2; /* 0x00B098 */ - uint64_t ce_ure_pipe_mask2; /* 0x00B0A0 */ - uint64_t ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ - uint64_t ce_ure_pcie1_credits_used; /* 0x00B0B0 */ - uint64_t ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ - uint64_t ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ - uint64_t ce_ure_pcie2_credits_used; /* 0x00B0C8 */ - uint64_t ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ - uint64_t ce_ure_pcie_force_credit; /* 0x00B0D8 */ - uint64_t ce_ure_rd_tnum_val; /* 0x00B0E0 */ - uint64_t ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ - uint64_t ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ - uint64_t ce_ure_rd_tnum_error; /* 0x00B0F8 */ - uint64_t ce_ure_rd_tnum_first_cl; /* 0x00B100 */ - uint64_t ce_ure_rd_tnum_link_buf; /* 0x00B108 */ - uint64_t ce_ure_wr_tnum_val; /* 0x00B110 */ - uint64_t ce_ure_sram_err_addr0; /* 0x00B118 */ - uint64_t ce_ure_sram_err_addr1; /* 0x00B120 */ - uint64_t ce_ure_sram_err_addr2; /* 0x00B128 */ - uint64_t ce_ure_sram_rd_addr0; /* 0x00B130 */ - uint64_t ce_ure_sram_rd_addr1; /* 0x00B138 */ - uint64_t ce_ure_sram_rd_addr2; /* 0x00B140 */ - uint64_t ce_ure_sram_wr_addr0; /* 0x00B148 */ - uint64_t ce_ure_sram_wr_addr1; /* 0x00B150 */ - uint64_t ce_ure_sram_wr_addr2; /* 0x00B158 */ - uint64_t ce_ure_buf_flush10; /* 0x00B160 */ - uint64_t ce_ure_buf_flush11; /* 0x00B168 */ - uint64_t ce_ure_buf_flush12; /* 0x00B170 */ - uint64_t ce_ure_buf_flush13; /* 0x00B178 */ - uint64_t ce_ure_buf_flush20; /* 0x00B180 */ - uint64_t ce_ure_buf_flush21; /* 0x00B188 */ - uint64_t ce_ure_buf_flush22; /* 0x00B190 */ - uint64_t ce_ure_buf_flush23; /* 0x00B198 */ - uint64_t ce_ure_pcie_control1; /* 0x00B1A0 */ - uint64_t ce_ure_pcie_control2; /* 0x00B1A8 */ - - uint64_t ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ + u64 ce_ure_dyn_credit_status; /* 0x00B010 */ + u64 ce_ure_last_credit_status; /* 0x00B018 */ + u64 ce_ure_credit_limit; /* 0x00B020 */ + u64 ce_pad_00B028; /* 0x00B028 */ + u64 ce_ure_control; /* 0x00B030 */ + u64 ce_ure_status; /* 0x00B038 */ + u64 ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ + u64 ce_ure_debug_sel; /* 0x00B050 */ + u64 ce_ure_pcie_debug_sel; /* 0x00B058 */ + u64 ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ + u64 ce_ure_ssp_err_addr; /* 0x00B068 */ + u64 ce_ure_page_map; /* 0x00B070 */ + u64 ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ + u64 ce_ure_pipe_sel1; /* 0x00B088 */ + u64 ce_ure_pipe_mask1; /* 0x00B090 */ + u64 ce_ure_pipe_sel2; /* 0x00B098 */ + u64 ce_ure_pipe_mask2; /* 0x00B0A0 */ + u64 ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ + u64 ce_ure_pcie1_credits_used; /* 0x00B0B0 */ + u64 ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ + u64 ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ + u64 ce_ure_pcie2_credits_used; /* 0x00B0C8 */ + u64 ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ + u64 ce_ure_pcie_force_credit; /* 0x00B0D8 */ + u64 ce_ure_rd_tnum_val; /* 0x00B0E0 */ + u64 ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ + u64 ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ + u64 ce_ure_rd_tnum_error; /* 0x00B0F8 */ + u64 ce_ure_rd_tnum_first_cl; /* 0x00B100 */ + u64 ce_ure_rd_tnum_link_buf; /* 0x00B108 */ + u64 ce_ure_wr_tnum_val; /* 0x00B110 */ + u64 ce_ure_sram_err_addr0; /* 0x00B118 */ + u64 ce_ure_sram_err_addr1; /* 0x00B120 */ + u64 ce_ure_sram_err_addr2; /* 0x00B128 */ + u64 ce_ure_sram_rd_addr0; /* 0x00B130 */ + u64 ce_ure_sram_rd_addr1; /* 0x00B138 */ + u64 ce_ure_sram_rd_addr2; /* 0x00B140 */ + u64 ce_ure_sram_wr_addr0; /* 0x00B148 */ + u64 ce_ure_sram_wr_addr1; /* 0x00B150 */ + u64 ce_ure_sram_wr_addr2; /* 0x00B158 */ + u64 ce_ure_buf_flush10; /* 0x00B160 */ + u64 ce_ure_buf_flush11; /* 0x00B168 */ + u64 ce_ure_buf_flush12; /* 0x00B170 */ + u64 ce_ure_buf_flush13; /* 0x00B178 */ + u64 ce_ure_buf_flush20; /* 0x00B180 */ + u64 ce_ure_buf_flush21; /* 0x00B188 */ + u64 ce_ure_buf_flush22; /* 0x00B190 */ + u64 ce_ure_buf_flush23; /* 0x00B198 */ + u64 ce_ure_pcie_control1; /* 0x00B1A0 */ + u64 ce_ure_pcie_control2; /* 0x00B1A8 */ + + u64 ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ /* Upstream Data Buffer, Port1 */ struct ce_ure_maint_ups_dat1_data { - uint64_t data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ - uint64_t data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ - uint64_t parity[512]; /* 0x00E000 -- 0x00EFF8 */ + u64 data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ + u64 data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ + u64 parity[512]; /* 0x00E000 -- 0x00EFF8 */ } ce_ure_maint_ups_dat1; /* Upstream Header Buffer, Port1 */ struct ce_ure_maint_ups_hdr1_data { - uint64_t data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ - uint64_t data127_64[512]; /* 0x010000 -- 0x010FF8 */ - uint64_t parity[512]; /* 0x011000 -- 0x011FF8 */ + u64 data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ + u64 data127_64[512]; /* 0x010000 -- 0x010FF8 */ + u64 parity[512]; /* 0x011000 -- 0x011FF8 */ } ce_ure_maint_ups_hdr1; /* Upstream Data Buffer, Port2 */ struct ce_ure_maint_ups_dat2_data { - uint64_t data63_0[512]; /* 0x012000 -- 0x012FF8 */ - uint64_t data127_64[512]; /* 0x013000 -- 0x013FF8 */ - uint64_t parity[512]; /* 0x014000 -- 0x014FF8 */ + u64 data63_0[512]; /* 0x012000 -- 0x012FF8 */ + u64 data127_64[512]; /* 0x013000 -- 0x013FF8 */ + u64 parity[512]; /* 0x014000 -- 0x014FF8 */ } ce_ure_maint_ups_dat2; /* Upstream Header Buffer, Port2 */ struct ce_ure_maint_ups_hdr2_data { - uint64_t data63_0[512]; /* 0x015000 -- 0x015FF8 */ - uint64_t data127_64[512]; /* 0x016000 -- 0x016FF8 */ - uint64_t parity[512]; /* 0x017000 -- 0x017FF8 */ + u64 data63_0[512]; /* 0x015000 -- 0x015FF8 */ + u64 data127_64[512]; /* 0x016000 -- 0x016FF8 */ + u64 parity[512]; /* 0x017000 -- 0x017FF8 */ } ce_ure_maint_ups_hdr2; /* Downstream Data Buffer */ struct ce_ure_maint_dns_dat_data { - uint64_t data63_0[512]; /* 0x018000 -- 0x018FF8 */ - uint64_t data127_64[512]; /* 0x019000 -- 0x019FF8 */ - uint64_t parity[512]; /* 0x01A000 -- 0x01AFF8 */ + u64 data63_0[512]; /* 0x018000 -- 0x018FF8 */ + u64 data127_64[512]; /* 0x019000 -- 0x019FF8 */ + u64 parity[512]; /* 0x01A000 -- 0x01AFF8 */ } ce_ure_maint_dns_dat; /* Downstream Header Buffer */ struct ce_ure_maint_dns_hdr_data { - uint64_t data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ - uint64_t data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ - uint64_t parity[64]; /* 0x01B400 -- 0x01B5F8 */ + u64 data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ + u64 data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ + u64 parity[64]; /* 0x01B400 -- 0x01B5F8 */ } ce_ure_maint_dns_hdr; /* RCI Buffer Data */ struct ce_ure_maint_rci_data { - uint64_t data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ - uint64_t data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ + u64 data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ + u64 data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ } ce_ure_maint_rci; /* Response Queue */ - uint64_t ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ + u64 ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ - uint64_t ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ + u64 ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ /* Admin Build-a-Packet Buffer */ struct ce_adm_maint_bap_buf_data { - uint64_t data63_0[258]; /* 0x024000 -- 0x024808 */ - uint64_t data127_64[258]; /* 0x024810 -- 0x025018 */ - uint64_t parity[258]; /* 0x025020 -- 0x025828 */ + u64 data63_0[258]; /* 0x024000 -- 0x024808 */ + u64 data127_64[258]; /* 0x024810 -- 0x025018 */ + u64 parity[258]; /* 0x025020 -- 0x025828 */ } ce_adm_maint_bap_buf; - uint64_t ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ + u64 ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */ - uint64_t ce_ure_ate40[TIOCE_NUM_M40_ATES]; + u64 ce_ure_ate40[TIOCE_NUM_M40_ATES]; /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */ - uint64_t ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; + u64 ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; - uint64_t ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ + u64 ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ /* * DRE: Down Stream Request Engine */ - uint64_t ce_dre_dyn_credit_status1; /* 0x040010 */ - uint64_t ce_dre_dyn_credit_status2; /* 0x040018 */ - uint64_t ce_dre_last_credit_status1; /* 0x040020 */ - uint64_t ce_dre_last_credit_status2; /* 0x040028 */ - uint64_t ce_dre_credit_limit1; /* 0x040030 */ - uint64_t ce_dre_credit_limit2; /* 0x040038 */ - uint64_t ce_dre_force_credit1; /* 0x040040 */ - uint64_t ce_dre_force_credit2; /* 0x040048 */ - uint64_t ce_dre_debug_mux1; /* 0x040050 */ - uint64_t ce_dre_debug_mux2; /* 0x040058 */ - uint64_t ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ - uint64_t ce_dre_ssp_err_addr; /* 0x040068 */ - uint64_t ce_dre_comp_err_cmd_wrd; /* 0x040070 */ - uint64_t ce_dre_comp_err_addr; /* 0x040078 */ - uint64_t ce_dre_req_status; /* 0x040080 */ - uint64_t ce_dre_config1; /* 0x040088 */ - uint64_t ce_dre_config2; /* 0x040090 */ - uint64_t ce_dre_config_req_status; /* 0x040098 */ - uint64_t ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ - uint64_t ce_dre_dyn_fifo; /* 0x040100 */ - uint64_t ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ - uint64_t ce_dre_last_fifo; /* 0x040120 */ - - uint64_t ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ + u64 ce_dre_dyn_credit_status1; /* 0x040010 */ + u64 ce_dre_dyn_credit_status2; /* 0x040018 */ + u64 ce_dre_last_credit_status1; /* 0x040020 */ + u64 ce_dre_last_credit_status2; /* 0x040028 */ + u64 ce_dre_credit_limit1; /* 0x040030 */ + u64 ce_dre_credit_limit2; /* 0x040038 */ + u64 ce_dre_force_credit1; /* 0x040040 */ + u64 ce_dre_force_credit2; /* 0x040048 */ + u64 ce_dre_debug_mux1; /* 0x040050 */ + u64 ce_dre_debug_mux2; /* 0x040058 */ + u64 ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ + u64 ce_dre_ssp_err_addr; /* 0x040068 */ + u64 ce_dre_comp_err_cmd_wrd; /* 0x040070 */ + u64 ce_dre_comp_err_addr; /* 0x040078 */ + u64 ce_dre_req_status; /* 0x040080 */ + u64 ce_dre_config1; /* 0x040088 */ + u64 ce_dre_config2; /* 0x040090 */ + u64 ce_dre_config_req_status; /* 0x040098 */ + u64 ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ + u64 ce_dre_dyn_fifo; /* 0x040100 */ + u64 ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ + u64 ce_dre_last_fifo; /* 0x040120 */ + + u64 ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ /* DRE Downstream Head Queue */ struct ce_dre_maint_ds_head_queue { - uint64_t data63_0[32]; /* 0x040200 -- 0x0402F8 */ - uint64_t data127_64[32]; /* 0x040300 -- 0x0403F8 */ - uint64_t parity[32]; /* 0x040400 -- 0x0404F8 */ + u64 data63_0[32]; /* 0x040200 -- 0x0402F8 */ + u64 data127_64[32]; /* 0x040300 -- 0x0403F8 */ + u64 parity[32]; /* 0x040400 -- 0x0404F8 */ } ce_dre_maint_ds_head_q; - uint64_t ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ + u64 ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ /* DRE Downstream Data Queue */ struct ce_dre_maint_ds_data_queue { - uint64_t data63_0[256]; /* 0x041000 -- 0x0417F8 */ - uint64_t ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ - uint64_t data127_64[256]; /* 0x042000 -- 0x0427F8 */ - uint64_t ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ - uint64_t parity[256]; /* 0x043000 -- 0x0437F8 */ - uint64_t ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ + u64 data63_0[256]; /* 0x041000 -- 0x0417F8 */ + u64 ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ + u64 data127_64[256]; /* 0x042000 -- 0x0427F8 */ + u64 ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ + u64 parity[256]; /* 0x043000 -- 0x0437F8 */ + u64 ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ } ce_dre_maint_ds_data_q; /* DRE URE Upstream Response Queue */ struct ce_dre_maint_ure_us_rsp_queue { - uint64_t data63_0[8]; /* 0x044000 -- 0x044038 */ - uint64_t ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ - uint64_t data127_64[8]; /* 0x044100 -- 0x044138 */ - uint64_t ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ - uint64_t parity[8]; /* 0x044200 -- 0x044238 */ - uint64_t ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ + u64 data63_0[8]; /* 0x044000 -- 0x044038 */ + u64 ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ + u64 data127_64[8]; /* 0x044100 -- 0x044138 */ + u64 ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ + u64 parity[8]; /* 0x044200 -- 0x044238 */ + u64 ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ } ce_dre_maint_ure_us_rsp_q; - uint64_t ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ + u64 ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ - uint64_t ce_end_of_struct; /* 0x044400 */ + u64 ce_end_of_struct; /* 0x044400 */ } tioce_t; @@ -625,11 +625,11 @@ typedef volatile struct tioce { #define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT) #define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT) #define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT) -#define CE_URE_PIPE_BUS(b) (((uint64_t)(b) << BUS_SRC_ID_SHFT) & \ +#define CE_URE_PIPE_BUS(b) (((u64)(b) << BUS_SRC_ID_SHFT) & \ CE_URE_BUS_MASK) -#define CE_URE_PIPE_DEV(d) (((uint64_t)(d) << DEV_SRC_ID_SHFT) & \ +#define CE_URE_PIPE_DEV(d) (((u64)(d) << DEV_SRC_ID_SHFT) & \ CE_URE_DEV_MASK) -#define CE_URE_PIPE_FNC(f) (((uint64_t)(f) << FNC_SRC_ID_SHFT) & \ +#define CE_URE_PIPE_FNC(f) (((u64)(f) << FNC_SRC_ID_SHFT) & \ CE_URE_FNC_MASK) #define CE_URE_SEL1_SHFT 0 @@ -660,9 +660,9 @@ typedef volatile struct tioce { #define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT) #define CE_URE_PN2_SHFT 24 #define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT) -#define CE_URE_PN1_SET(n) (((uint64_t)(n) << CE_URE_PN1_SHFT) & \ +#define CE_URE_PN1_SET(n) (((u64)(n) << CE_URE_PN1_SHFT) & \ CE_URE_PN1_MASK) -#define CE_URE_PN2_SET(n) (((uint64_t)(n) << CE_URE_PN2_SHFT) & \ +#define CE_URE_PN2_SET(n) (((u64)(n) << CE_URE_PN2_SHFT) & \ CE_URE_PN2_MASK) /* ce_ure_pcie_control2 register bit masks & shifts */ @@ -681,9 +681,9 @@ typedef volatile struct tioce { #define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT) #define CE_URE_PSN2_SHFT 32 #define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT) -#define CE_URE_PSN1_SET(n) (((uint64_t)(n) << CE_URE_PSN1_SHFT) & \ +#define CE_URE_PSN1_SET(n) (((u64)(n) << CE_URE_PSN1_SHFT) & \ CE_URE_PSN1_MASK) -#define CE_URE_PSN2_SET(n) (((uint64_t)(n) << CE_URE_PSN2_SHFT) & \ +#define CE_URE_PSN2_SET(n) (((u64)(n) << CE_URE_PSN2_SHFT) & \ CE_URE_PSN2_MASK) /* diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h index cb414908671..6d62b13f7ae 100644 --- a/include/asm-ia64/sn/tioce_provider.h +++ b/include/asm-ia64/sn/tioce_provider.h @@ -21,9 +21,9 @@ struct tioce_common { struct pcibus_bussoft ce_pcibus; /* common pciio header */ - uint32_t ce_rev; - uint64_t ce_kernel_private; - uint64_t ce_prom_private; + u32 ce_rev; + u64 ce_kernel_private; + u64 ce_prom_private; }; struct tioce_kernel { @@ -31,31 +31,31 @@ struct tioce_kernel { spinlock_t ce_lock; struct list_head ce_dmamap_list; - uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES]; - uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; - uint32_t ce_ate3240_pagesize; + u64 ce_ate40_shadow[TIOCE_NUM_M40_ATES]; + u64 ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; + u32 ce_ate3240_pagesize; - uint8_t ce_port1_secondary; + u8 ce_port1_secondary; /* per-port resources */ struct { int dirmap_refcnt; - uint64_t dirmap_shadow; + u64 dirmap_shadow; } ce_port[TIOCE_NUM_PORTS]; }; struct tioce_dmamap { struct list_head ce_dmamap_list; /* headed by tioce_kernel */ - uint32_t refcnt; + u32 refcnt; - uint64_t nbytes; /* # bytes mapped */ + u64 nbytes; /* # bytes mapped */ - uint64_t ct_start; /* coretalk start address */ - uint64_t pci_start; /* bus start address */ + u64 ct_start; /* coretalk start address */ + u64 pci_start; /* bus start address */ - uint64_t *ate_hw; /* hw ptr of first ate in map */ - uint64_t *ate_shadow; /* shadow ptr of firat ate */ - uint16_t ate_count; /* # ate's in the map */ + u64 *ate_hw; /* hw ptr of first ate in map */ + u64 *ate_shadow; /* shadow ptr of firat ate */ + u16 ate_count; /* # ate's in the map */ }; extern int tioce_init_provider(void); diff --git a/include/asm-ia64/sn/tiocp.h b/include/asm-ia64/sn/tiocp.h index 5f2489c9d2d..f47c08ab483 100644 --- a/include/asm-ia64/sn/tiocp.h +++ b/include/asm-ia64/sn/tiocp.h @@ -21,189 +21,189 @@ struct tiocp{ /* 0x000000-0x00FFFF -- Local Registers */ /* 0x000000-0x000057 -- (Legacy Widget Space) Configuration */ - uint64_t cp_id; /* 0x000000 */ - uint64_t cp_stat; /* 0x000008 */ - uint64_t cp_err_upper; /* 0x000010 */ - uint64_t cp_err_lower; /* 0x000018 */ + u64 cp_id; /* 0x000000 */ + u64 cp_stat; /* 0x000008 */ + u64 cp_err_upper; /* 0x000010 */ + u64 cp_err_lower; /* 0x000018 */ #define cp_err cp_err_lower - uint64_t cp_control; /* 0x000020 */ - uint64_t cp_req_timeout; /* 0x000028 */ - uint64_t cp_intr_upper; /* 0x000030 */ - uint64_t cp_intr_lower; /* 0x000038 */ + u64 cp_control; /* 0x000020 */ + u64 cp_req_timeout; /* 0x000028 */ + u64 cp_intr_upper; /* 0x000030 */ + u64 cp_intr_lower; /* 0x000038 */ #define cp_intr cp_intr_lower - uint64_t cp_err_cmdword; /* 0x000040 */ - uint64_t _pad_000048; /* 0x000048 */ - uint64_t cp_tflush; /* 0x000050 */ + u64 cp_err_cmdword; /* 0x000040 */ + u64 _pad_000048; /* 0x000048 */ + u64 cp_tflush; /* 0x000050 */ /* 0x000058-0x00007F -- Bridge-specific Configuration */ - uint64_t cp_aux_err; /* 0x000058 */ - uint64_t cp_resp_upper; /* 0x000060 */ - uint64_t cp_resp_lower; /* 0x000068 */ + u64 cp_aux_err; /* 0x000058 */ + u64 cp_resp_upper; /* 0x000060 */ + u64 cp_resp_lower; /* 0x000068 */ #define cp_resp cp_resp_lower - uint64_t cp_tst_pin_ctrl; /* 0x000070 */ - uint64_t cp_addr_lkerr; /* 0x000078 */ + u64 cp_tst_pin_ctrl; /* 0x000070 */ + u64 cp_addr_lkerr; /* 0x000078 */ /* 0x000080-0x00008F -- PMU & MAP */ - uint64_t cp_dir_map; /* 0x000080 */ - uint64_t _pad_000088; /* 0x000088 */ + u64 cp_dir_map; /* 0x000080 */ + u64 _pad_000088; /* 0x000088 */ /* 0x000090-0x00009F -- SSRAM */ - uint64_t cp_map_fault; /* 0x000090 */ - uint64_t _pad_000098; /* 0x000098 */ + u64 cp_map_fault; /* 0x000090 */ + u64 _pad_000098; /* 0x000098 */ /* 0x0000A0-0x0000AF -- Arbitration */ - uint64_t cp_arb; /* 0x0000A0 */ - uint64_t _pad_0000A8; /* 0x0000A8 */ + u64 cp_arb; /* 0x0000A0 */ + u64 _pad_0000A8; /* 0x0000A8 */ /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ - uint64_t cp_ate_parity_err; /* 0x0000B0 */ - uint64_t _pad_0000B8; /* 0x0000B8 */ + u64 cp_ate_parity_err; /* 0x0000B0 */ + u64 _pad_0000B8; /* 0x0000B8 */ /* 0x0000C0-0x0000FF -- PCI/GIO */ - uint64_t cp_bus_timeout; /* 0x0000C0 */ - uint64_t cp_pci_cfg; /* 0x0000C8 */ - uint64_t cp_pci_err_upper; /* 0x0000D0 */ - uint64_t cp_pci_err_lower; /* 0x0000D8 */ + u64 cp_bus_timeout; /* 0x0000C0 */ + u64 cp_pci_cfg; /* 0x0000C8 */ + u64 cp_pci_err_upper; /* 0x0000D0 */ + u64 cp_pci_err_lower; /* 0x0000D8 */ #define cp_pci_err cp_pci_err_lower - uint64_t _pad_0000E0[4]; /* 0x0000{E0..F8} */ + u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ /* 0x000100-0x0001FF -- Interrupt */ - uint64_t cp_int_status; /* 0x000100 */ - uint64_t cp_int_enable; /* 0x000108 */ - uint64_t cp_int_rst_stat; /* 0x000110 */ - uint64_t cp_int_mode; /* 0x000118 */ - uint64_t cp_int_device; /* 0x000120 */ - uint64_t cp_int_host_err; /* 0x000128 */ - uint64_t cp_int_addr[8]; /* 0x0001{30,,,68} */ - uint64_t cp_err_int_view; /* 0x000170 */ - uint64_t cp_mult_int; /* 0x000178 */ - uint64_t cp_force_always[8]; /* 0x0001{80,,,B8} */ - uint64_t cp_force_pin[8]; /* 0x0001{C0,,,F8} */ + u64 cp_int_status; /* 0x000100 */ + u64 cp_int_enable; /* 0x000108 */ + u64 cp_int_rst_stat; /* 0x000110 */ + u64 cp_int_mode; /* 0x000118 */ + u64 cp_int_device; /* 0x000120 */ + u64 cp_int_host_err; /* 0x000128 */ + u64 cp_int_addr[8]; /* 0x0001{30,,,68} */ + u64 cp_err_int_view; /* 0x000170 */ + u64 cp_mult_int; /* 0x000178 */ + u64 cp_force_always[8]; /* 0x0001{80,,,B8} */ + u64 cp_force_pin[8]; /* 0x0001{C0,,,F8} */ /* 0x000200-0x000298 -- Device */ - uint64_t cp_device[4]; /* 0x0002{00,,,18} */ - uint64_t _pad_000220[4]; /* 0x0002{20,,,38} */ - uint64_t cp_wr_req_buf[4]; /* 0x0002{40,,,58} */ - uint64_t _pad_000260[4]; /* 0x0002{60,,,78} */ - uint64_t cp_rrb_map[2]; /* 0x0002{80,,,88} */ + u64 cp_device[4]; /* 0x0002{00,,,18} */ + u64 _pad_000220[4]; /* 0x0002{20,,,38} */ + u64 cp_wr_req_buf[4]; /* 0x0002{40,,,58} */ + u64 _pad_000260[4]; /* 0x0002{60,,,78} */ + u64 cp_rrb_map[2]; /* 0x0002{80,,,88} */ #define cp_even_resp cp_rrb_map[0] /* 0x000280 */ #define cp_odd_resp cp_rrb_map[1] /* 0x000288 */ - uint64_t cp_resp_status; /* 0x000290 */ - uint64_t cp_resp_clear; /* 0x000298 */ + u64 cp_resp_status; /* 0x000290 */ + u64 cp_resp_clear; /* 0x000298 */ - uint64_t _pad_0002A0[12]; /* 0x0002{A0..F8} */ + u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ struct { - uint64_t upper; /* 0x0003{00,,,F0} */ - uint64_t lower; /* 0x0003{08,,,F8} */ + u64 upper; /* 0x0003{00,,,F0} */ + u64 lower; /* 0x0003{08,,,F8} */ } cp_buf_addr_match[16]; /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ struct { - uint64_t flush_w_touch; /* 0x000{400,,,5C0} */ - uint64_t flush_wo_touch; /* 0x000{408,,,5C8} */ - uint64_t inflight; /* 0x000{410,,,5D0} */ - uint64_t prefetch; /* 0x000{418,,,5D8} */ - uint64_t total_pci_retry; /* 0x000{420,,,5E0} */ - uint64_t max_pci_retry; /* 0x000{428,,,5E8} */ - uint64_t max_latency; /* 0x000{430,,,5F0} */ - uint64_t clear_all; /* 0x000{438,,,5F8} */ + u64 flush_w_touch; /* 0x000{400,,,5C0} */ + u64 flush_wo_touch; /* 0x000{408,,,5C8} */ + u64 inflight; /* 0x000{410,,,5D0} */ + u64 prefetch; /* 0x000{418,,,5D8} */ + u64 total_pci_retry; /* 0x000{420,,,5E0} */ + u64 max_pci_retry; /* 0x000{428,,,5E8} */ + u64 max_latency; /* 0x000{430,,,5F0} */ + u64 clear_all; /* 0x000{438,,,5F8} */ } cp_buf_count[8]; /* 0x000600-0x0009FF -- PCI/X registers */ - uint64_t cp_pcix_bus_err_addr; /* 0x000600 */ - uint64_t cp_pcix_bus_err_attr; /* 0x000608 */ - uint64_t cp_pcix_bus_err_data; /* 0x000610 */ - uint64_t cp_pcix_pio_split_addr; /* 0x000618 */ - uint64_t cp_pcix_pio_split_attr; /* 0x000620 */ - uint64_t cp_pcix_dma_req_err_attr; /* 0x000628 */ - uint64_t cp_pcix_dma_req_err_addr; /* 0x000630 */ - uint64_t cp_pcix_timeout; /* 0x000638 */ + u64 cp_pcix_bus_err_addr; /* 0x000600 */ + u64 cp_pcix_bus_err_attr; /* 0x000608 */ + u64 cp_pcix_bus_err_data; /* 0x000610 */ + u64 cp_pcix_pio_split_addr; /* 0x000618 */ + u64 cp_pcix_pio_split_attr; /* 0x000620 */ + u64 cp_pcix_dma_req_err_attr; /* 0x000628 */ + u64 cp_pcix_dma_req_err_addr; /* 0x000630 */ + u64 cp_pcix_timeout; /* 0x000638 */ - uint64_t _pad_000640[24]; /* 0x000{640,,,6F8} */ + u64 _pad_000640[24]; /* 0x000{640,,,6F8} */ /* 0x000700-0x000737 -- Debug Registers */ - uint64_t cp_ct_debug_ctl; /* 0x000700 */ - uint64_t cp_br_debug_ctl; /* 0x000708 */ - uint64_t cp_mux3_debug_ctl; /* 0x000710 */ - uint64_t cp_mux4_debug_ctl; /* 0x000718 */ - uint64_t cp_mux5_debug_ctl; /* 0x000720 */ - uint64_t cp_mux6_debug_ctl; /* 0x000728 */ - uint64_t cp_mux7_debug_ctl; /* 0x000730 */ + u64 cp_ct_debug_ctl; /* 0x000700 */ + u64 cp_br_debug_ctl; /* 0x000708 */ + u64 cp_mux3_debug_ctl; /* 0x000710 */ + u64 cp_mux4_debug_ctl; /* 0x000718 */ + u64 cp_mux5_debug_ctl; /* 0x000720 */ + u64 cp_mux6_debug_ctl; /* 0x000728 */ + u64 cp_mux7_debug_ctl; /* 0x000730 */ - uint64_t _pad_000738[89]; /* 0x000{738,,,9F8} */ + u64 _pad_000738[89]; /* 0x000{738,,,9F8} */ /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ struct { - uint64_t cp_buf_addr; /* 0x000{A00,,,AF0} */ - uint64_t cp_buf_attr; /* 0X000{A08,,,AF8} */ + u64 cp_buf_addr; /* 0x000{A00,,,AF0} */ + u64 cp_buf_attr; /* 0X000{A08,,,AF8} */ } cp_pcix_read_buf_64[16]; struct { - uint64_t cp_buf_addr; /* 0x000{B00,,,BE0} */ - uint64_t cp_buf_attr; /* 0x000{B08,,,BE8} */ - uint64_t cp_buf_valid; /* 0x000{B10,,,BF0} */ - uint64_t __pad1; /* 0x000{B18,,,BF8} */ + u64 cp_buf_addr; /* 0x000{B00,,,BE0} */ + u64 cp_buf_attr; /* 0x000{B08,,,BE8} */ + u64 cp_buf_valid; /* 0x000{B10,,,BF0} */ + u64 __pad1; /* 0x000{B18,,,BF8} */ } cp_pcix_write_buf_64[8]; /* End of Local Registers -- Start of Address Map space */ - char _pad_000c00[0x010000 - 0x000c00]; + char _pad_000c00[0x010000 - 0x000c00]; /* 0x010000-0x011FF8 -- Internal ATE RAM (Auto Parity Generation) */ - uint64_t cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */ + u64 cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */ - char _pad_012000[0x14000 - 0x012000]; + char _pad_012000[0x14000 - 0x012000]; /* 0x014000-0x015FF8 -- Internal ATE RAM (Manual Parity Generation) */ - uint64_t cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */ + u64 cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */ - char _pad_016000[0x18000 - 0x016000]; + char _pad_016000[0x18000 - 0x016000]; /* 0x18000-0x197F8 -- TIOCP Write Request Ram */ - uint64_t cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ - uint64_t cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ - uint64_t cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ + u64 cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ + u64 cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ + u64 cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ - char _pad_019800[0x1C000 - 0x019800]; + char _pad_019800[0x1C000 - 0x019800]; /* 0x1C000-0x1EFF8 -- TIOCP Read Response Ram */ - uint64_t cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */ - uint64_t cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */ - uint64_t cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */ + u64 cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */ + u64 cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */ + u64 cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */ - char _pad_01F000[0x20000 - 0x01F000]; + char _pad_01F000[0x20000 - 0x01F000]; /* 0x020000-0x021FFF -- Host Device (CP) Configuration Space (not used) */ - char _pad_020000[0x021000 - 0x20000]; + char _pad_020000[0x021000 - 0x20000]; /* 0x021000-0x027FFF -- PCI Device Configuration Spaces */ union { - uint8_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ - uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ - uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ - uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ + u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ + u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ + u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ + u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ union { - uint8_t c[0x100 / 1]; - uint16_t s[0x100 / 2]; - uint32_t l[0x100 / 4]; - uint64_t d[0x100 / 8]; + u8 c[0x100 / 1]; + u16 s[0x100 / 2]; + u32 l[0x100 / 4]; + u64 d[0x100 / 8]; } f[8]; } cp_type0_cfg_dev[7]; /* 0x02{1000,,,7FFF} */ /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ union { - uint8_t c[0x1000 / 1]; /* 0x028000-0x029000 */ - uint16_t s[0x1000 / 2]; /* 0x028000-0x029000 */ - uint32_t l[0x1000 / 4]; /* 0x028000-0x029000 */ - uint64_t d[0x1000 / 8]; /* 0x028000-0x029000 */ + u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ + u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ + u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ + u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ union { - uint8_t c[0x100 / 1]; - uint16_t s[0x100 / 2]; - uint32_t l[0x100 / 4]; - uint64_t d[0x100 / 8]; + u8 c[0x100 / 1]; + u16 s[0x100 / 2]; + u32 l[0x100 / 4]; + u64 d[0x100 / 8]; } f[8]; } cp_type1_cfg; /* 0x028000-0x029000 */ @@ -211,30 +211,30 @@ struct tiocp{ /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ union { - uint8_t c[8 / 1]; - uint16_t s[8 / 2]; - uint32_t l[8 / 4]; - uint64_t d[8 / 8]; + u8 c[8 / 1]; + u16 s[8 / 2]; + u32 l[8 / 4]; + u64 d[8 / 8]; } cp_pci_iack; /* 0x030000-0x030007 */ char _pad_030007[0x040000-0x030008]; /* 0x040000-0x040007 -- PCIX Special Cycle */ union { - uint8_t c[8 / 1]; - uint16_t s[8 / 2]; - uint32_t l[8 / 4]; - uint64_t d[8 / 8]; + u8 c[8 / 1]; + u16 s[8 / 2]; + u32 l[8 / 4]; + u64 d[8 / 8]; } cp_pcix_cycle; /* 0x040000-0x040007 */ char _pad_040007[0x200000-0x040008]; /* 0x200000-0x7FFFFF -- PCI/GIO Device Spaces */ union { - uint8_t c[0x100000 / 1]; - uint16_t s[0x100000 / 2]; - uint32_t l[0x100000 / 4]; - uint64_t d[0x100000 / 8]; + u8 c[0x100000 / 1]; + u16 s[0x100000 / 2]; + u32 l[0x100000 / 4]; + u64 d[0x100000 / 8]; } cp_devio_raw[6]; /* 0x200000-0x7FFFFF */ #define cp_devio(n) cp_devio_raw[((n)<2)?(n*2):(n+2)] @@ -243,10 +243,10 @@ struct tiocp{ /* 0xA00000-0xBFFFFF -- PCI/GIO Device Spaces w/flush */ union { - uint8_t c[0x100000 / 1]; - uint16_t s[0x100000 / 2]; - uint32_t l[0x100000 / 4]; - uint64_t d[0x100000 / 8]; + u8 c[0x100000 / 1]; + u16 s[0x100000 / 2]; + u32 l[0x100000 / 4]; + u64 d[0x100000 / 8]; } cp_devio_raw_flush[6]; /* 0xA00000-0xBFFFFF */ #define cp_devio_flush(n) cp_devio_raw_flush[((n)<2)?(n*2):(n+2)] diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h index 5699e75e502..d29728492f3 100644 --- a/include/asm-ia64/sn/tiocx.h +++ b/include/asm-ia64/sn/tiocx.h @@ -40,10 +40,10 @@ struct cx_drv { }; /* create DMA address by stripping AS bits */ -#define TIOCX_DMA_ADDR(a) (uint64_t)((uint64_t)(a) & 0xffffcfffffffffUL) +#define TIOCX_DMA_ADDR(a) (u64)((u64)(a) & 0xffffcfffffffffUL) -#define TIOCX_TO_TIOCX_DMA_ADDR(a) (uint64_t)(((uint64_t)(a) & 0xfffffffff) | \ - ((((uint64_t)(a)) & 0xffffc000000000UL) <<2)) +#define TIOCX_TO_TIOCX_DMA_ADDR(a) (u64)(((u64)(a) & 0xfffffffff) | \ + ((((u64)(a)) & 0xffffc000000000UL) <<2)) #define TIO_CE_ASIC_PARTNUM 0xce00 #define TIOCX_CORELET 3 @@ -63,10 +63,10 @@ extern int cx_device_unregister(struct cx_dev *); extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int); extern int cx_driver_unregister(struct cx_drv *); extern int cx_driver_register(struct cx_drv *); -extern uint64_t tiocx_dma_addr(uint64_t addr); -extern uint64_t tiocx_swin_base(int nasid); -extern void tiocx_mmr_store(int nasid, uint64_t offset, uint64_t value); -extern uint64_t tiocx_mmr_load(int nasid, uint64_t offset); +extern u64 tiocx_dma_addr(u64 addr); +extern u64 tiocx_swin_base(int nasid); +extern void tiocx_mmr_store(int nasid, u64 offset, u64 value); +extern u64 tiocx_mmr_load(int nasid, u64 offset); #endif // __KERNEL__ #endif // _ASM_IA64_SN_TIO_TIOCX__ diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h index 203945ae034..9bd2f9bf329 100644 --- a/include/asm-ia64/sn/xp.h +++ b/include/asm-ia64/sn/xp.h @@ -18,6 +18,7 @@ #include <linux/cache.h> #include <linux/hardirq.h> +#include <linux/mutex.h> #include <asm/sn/types.h> #include <asm/sn/bte.h> @@ -359,7 +360,7 @@ typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid, * the channel. */ struct xpc_registration { - struct semaphore sema; + struct mutex mutex; xpc_channel_func func; /* function to call */ void *key; /* pointer to user's key */ u16 nentries; /* #of msg entries in local msg queue */ diff --git a/include/asm-ia64/sn/xpc.h b/include/asm-ia64/sn/xpc.h index 87e9cd58851..0c36928ffd8 100644 --- a/include/asm-ia64/sn/xpc.h +++ b/include/asm-ia64/sn/xpc.h @@ -19,6 +19,8 @@ #include <linux/interrupt.h> #include <linux/sysctl.h> #include <linux/device.h> +#include <linux/mutex.h> +#include <linux/completion.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/sn/bte.h> @@ -335,8 +337,7 @@ struct xpc_openclose_args { * and consumed by the intended recipient. */ struct xpc_notify { - struct semaphore sema; /* notify semaphore */ - volatile u8 type; /* type of notification */ + volatile u8 type; /* type of notification */ /* the following two fields are only used if type == XPC_N_CALL */ xpc_notify_func func; /* user's notify function */ @@ -465,8 +466,8 @@ struct xpc_channel { xpc_channel_func func; /* user's channel function */ void *key; /* pointer to user's key */ - struct semaphore msg_to_pull_sema; /* next msg to pull serialization */ - struct semaphore wdisconnect_sema; /* wait for channel disconnect */ + struct mutex msg_to_pull_mutex; /* next msg to pull serialization */ + struct completion wdisconnect_wait; /* wait for channel disconnect */ struct xpc_openclose_args *local_openclose_args; /* args passed on */ /* opening or closing of channel */ diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h index d8aae4da397..412ef8e493a 100644 --- a/include/asm-ia64/topology.h +++ b/include/asm-ia64/topology.h @@ -18,6 +18,10 @@ #include <asm/smp.h> #ifdef CONFIG_NUMA + +/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */ +#define PENALTY_FOR_NODE_WITH_CPUS 255 + /* * Returns the number of the node containing CPU 'cpu' */ diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h index cd9f11f1ef1..4dc514aabfe 100644 --- a/include/asm-powerpc/lppaca.h +++ b/include/asm-powerpc/lppaca.h @@ -31,7 +31,7 @@ /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k * alignment is sufficient to prevent this */ -struct __attribute__((__aligned__(0x400))) lppaca { +struct lppaca { //============================================================================= // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data // NOTE: The xDynXyz fields are fields that will be dynamically changed by @@ -129,7 +129,7 @@ struct __attribute__((__aligned__(0x400))) lppaca { // CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data //============================================================================= u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF -}; +} __attribute__((__aligned__(0x400))); extern struct lppaca lppaca[]; diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index 7e09d7cda93..67cdaf3ae9f 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTOREALL 12 /* Restore all regs (implies NOERROR) */ #define TIF_SAVE_NVGPRS 13 /* Save r14-r31 in signal frame */ #define TIF_NOERROR 14 /* Force successful syscall return */ +#define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) @@ -138,10 +139,12 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_RESTOREALL (1<<TIF_RESTOREALL) #define _TIF_SAVE_NVGPRS (1<<TIF_SAVE_NVGPRS) #define _TIF_NOERROR (1<<TIF_NOERROR) +#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) #define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ - _TIF_NEED_RESCHED | _TIF_RESTOREALL) + _TIF_NEED_RESCHED | _TIF_RESTOREALL | \ + _TIF_RESTORE_SIGMASK) #define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR|_TIF_SAVE_NVGPRS) #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h index 19eaac3fbbf..a40cdff21a8 100644 --- a/include/asm-powerpc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -298,8 +298,10 @@ #define __NR_inotify_rm_watch 277 #define __NR_spu_run 278 #define __NR_spu_create 279 +#define __NR_pselect6 280 +#define __NR_ppoll 281 -#define __NR_syscalls 280 +#define __NR_syscalls 282 #ifdef __KERNEL__ #define __NR__exit __NR_exit @@ -444,11 +446,13 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #ifdef CONFIG_PPC32 #define __ARCH_WANT_OLD_STAT #endif #ifdef CONFIG_PPC64 #define __ARCH_WANT_COMPAT_SYS_TIME +#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND #endif /* diff --git a/include/asm-sh/bus-sh.h b/include/asm-sh/bus-sh.h index 83c5d2fd057..e42d63b65cb 100644 --- a/include/asm-sh/bus-sh.h +++ b/include/asm-sh/bus-sh.h @@ -21,6 +21,7 @@ struct sh_dev { void *mapbase; unsigned int irq[6]; u64 *dma_mask; + u64 coherent_dma_mask; }; #define to_sh_dev(d) container_of((d), struct sh_dev, dev) diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h new file mode 100644 index 00000000000..fdfb75b30f0 --- /dev/null +++ b/include/asm-sh/clock.h @@ -0,0 +1,61 @@ +#ifndef __ASM_SH_CLOCK_H +#define __ASM_SH_CLOCK_H + +#include <linux/kref.h> +#include <linux/list.h> +#include <linux/seq_file.h> + +struct clk; + +struct clk_ops { + void (*init)(struct clk *clk); + void (*enable)(struct clk *clk); + void (*disable)(struct clk *clk); + void (*recalc)(struct clk *clk); + int (*set_rate)(struct clk *clk, unsigned long rate); +}; + +struct clk { + struct list_head node; + const char *name; + + struct module *owner; + + struct clk *parent; + struct clk_ops *ops; + + struct kref kref; + + unsigned long rate; + unsigned long flags; +}; + +#define CLK_ALWAYS_ENABLED (1 << 0) +#define CLK_RATE_PROPAGATES (1 << 1) + +/* Should be defined by processor-specific code */ +void arch_init_clk_ops(struct clk_ops **, int type); + +/* arch/sh/kernel/cpu/clock.c */ +int clk_init(void); + +int __clk_enable(struct clk *); +int clk_enable(struct clk *); + +void __clk_disable(struct clk *); +void clk_disable(struct clk *); + +int clk_set_rate(struct clk *, unsigned long rate); +unsigned long clk_get_rate(struct clk *); +void clk_recalc_rate(struct clk *); + +struct clk *clk_get(const char *id); +void clk_put(struct clk *); + +int clk_register(struct clk *); +void clk_unregister(struct clk *); + +int show_clocks(struct seq_file *m); + +#endif /* __ASM_SH_CLOCK_H */ + diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h index b972e715f9e..954801b4602 100644 --- a/include/asm-sh/cpu-sh3/dma.h +++ b/include/asm-sh/cpu-sh3/dma.h @@ -3,5 +3,34 @@ #define SH_DMAC_BASE 0xa4000020 -#endif /* __ASM_CPU_SH3_DMA_H */ +/* Definitions for the SuperH DMAC */ +#define TM_BURST 0x00000020 +#define TS_8 0x00000000 +#define TS_16 0x00000008 +#define TS_32 0x00000010 +#define TS_128 0x00000018 + +#define CHCR_TS_MASK 0x18 +#define CHCR_TS_SHIFT 3 + +#define DMAOR_INIT DMAOR_DME +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + */ +enum { + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_128BIT, +}; + +static unsigned int ts_shift[] __attribute__ ((used)) = { + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_128BIT] = 4, +}; + +#endif /* __ASM_CPU_SH3_DMA_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index e2b91adf821..0dfe61f1480 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -1,17 +1,49 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H +#ifdef CONFIG_CPU_SH4A +#define SH_DMAC_BASE 0xfc808020 +#else #define SH_DMAC_BASE 0xffa00000 +#endif -#define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \ - SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30}) -#define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \ - SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34}) -#define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \ - SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38}) -#define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \ - SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c}) -#define DMAOR (SH_DMAC_BASE + 0x40) +/* Definitions for the SuperH DMAC */ +#define TM_BURST 0x0000080 +#define TS_8 0x00000010 +#define TS_16 0x00000020 +#define TS_32 0x00000030 +#define TS_64 0x00000000 -#endif /* __ASM_CPU_SH4_DMA_H */ +#define CHCR_TS_MASK 0x30 +#define CHCR_TS_SHIFT 4 + +#define DMAOR_COD 0x00000008 + +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_64BIT, + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int ts_shift[] __attribute__ ((used)) = { + [XMIT_SZ_64BIT] = 3, + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_256BIT] = 5, +}; + +#endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 201d94fd214..ef2b9b1ae41 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -12,6 +12,8 @@ #if defined(CONFIG_CPU_SUBTYPE_SH73180) #define FRQCR 0xa4150000 +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#define FRQCR 0xffc80000 #else #define FRQCR 0xffc00000 #endif diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index d3fa5c2b889..48f1f42c5d1 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -4,6 +4,7 @@ #include <linux/config.h> #include <linux/mm.h> #include <asm/scatterlist.h> +#include <asm/cacheflush.h> #include <asm/io.h> extern struct bus_type pci_bus_type; @@ -141,24 +142,24 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, } } -static inline void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) +static void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) __attribute__ ((alias("dma_sync_single"))); -static inline void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) +static void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) __attribute__ ((alias("dma_sync_single"))); -static inline void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) +static void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction dir) __attribute__ ((alias("dma_sync_sg"))); -static inline void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) +static void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction dir) __attribute__ ((alias("dma_sync_sg"))); static inline int dma_get_cache_alignment(void) diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index 8e9436093ca..a118a0d4305 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -15,6 +15,7 @@ #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/sysdev.h> +#include <linux/device.h> #include <asm/cpu/dma.h> #include <asm/semaphore.h> @@ -54,8 +55,8 @@ enum { * DMA channel capabilities / flags */ enum { - DMA_CONFIGURED = 0x00, DMA_TEI_CAPABLE = 0x01, + DMA_CONFIGURED = 0x02, }; extern spinlock_t dma_spin_lock; @@ -74,7 +75,8 @@ struct dma_ops { struct dma_channel { char dev_id[16]; - unsigned int chan; + unsigned int chan; /* Physical channel number */ + unsigned int vchan; /* Virtual channel number */ unsigned int mode; unsigned int count; @@ -91,6 +93,8 @@ struct dma_channel { }; struct dma_info { + struct platform_device *pdev; + const char *name; unsigned int nr_channels; unsigned long flags; @@ -130,7 +134,11 @@ extern void unregister_dmac(struct dma_info *info); #ifdef CONFIG_SYSFS /* arch/sh/drivers/dma/dma-sysfs.c */ -extern int dma_create_sysfs_files(struct dma_channel *); +extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); +extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); +#else +#define dma_create_sysfs_file(channel, info) do { } while (0) +#define dma_remove_sysfs_file(channel, info) do { } while (0) #endif #ifdef CONFIG_PCI diff --git a/include/asm-sh/freq.h b/include/asm-sh/freq.h index 2c0fde46a0e..39c0e091cf5 100644 --- a/include/asm-sh/freq.h +++ b/include/asm-sh/freq.h @@ -14,16 +14,5 @@ #include <asm/cpu/freq.h> -/* arch/sh/kernel/time.c */ -extern void get_current_frequency_divisors(unsigned int *ifc, unsigned int *pfc, unsigned int *bfc); - -extern unsigned int get_ifc_divisor(unsigned int value); -extern unsigned int get_ifc_divisor(unsigned int value); -extern unsigned int get_ifc_divisor(unsigned int value); - -extern unsigned int get_ifc_value(unsigned int divisor); -extern unsigned int get_pfc_value(unsigned int divisor); -extern unsigned int get_bfc_value(unsigned int divisor); - #endif /* __KERNEL__ */ #endif /* __ASM_SH_FREQ_H */ diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 6bc343fee7a..b0b2937b6f8 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -11,7 +11,7 @@ * For read{b,w,l} and write{b,w,l} there are also __raw versions, which * do not have a memory barrier after them. * - * In addition, we have + * In addition, we have * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. * which are processor specific. */ @@ -23,19 +23,27 @@ * inb by default expands to _inb, but the machine specific code may * define it to __inb if it chooses. */ - +#include <linux/config.h> #include <asm/cache.h> #include <asm/system.h> #include <asm/addrspace.h> #include <asm/machvec.h> -#include <linux/config.h> +#include <asm/pgtable.h> +#include <asm-generic/iomap.h> + +#ifdef __KERNEL__ /* * Depending on which platform we are running on, we need different * I/O functions. */ +#define __IO_PREFIX generic +#include <asm/io_generic.h> + +#define maybebadio(port) \ + printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ + __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) -#ifdef __KERNEL__ /* * Since boards are able to define their own set of I/O routines through * their respective machine vector, we always wrap through the mv. @@ -44,113 +52,120 @@ * a given routine, it will be wrapped to generic code at run-time. */ -# define __inb(p) sh_mv.mv_inb((p)) -# define __inw(p) sh_mv.mv_inw((p)) -# define __inl(p) sh_mv.mv_inl((p)) -# define __outb(x,p) sh_mv.mv_outb((x),(p)) -# define __outw(x,p) sh_mv.mv_outw((x),(p)) -# define __outl(x,p) sh_mv.mv_outl((x),(p)) - -# define __inb_p(p) sh_mv.mv_inb_p((p)) -# define __inw_p(p) sh_mv.mv_inw_p((p)) -# define __inl_p(p) sh_mv.mv_inl_p((p)) -# define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) -# define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) -# define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) - -# define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) -# define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) -# define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) -# define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) -# define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) -# define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) - -# define __readb(a) sh_mv.mv_readb((a)) -# define __readw(a) sh_mv.mv_readw((a)) -# define __readl(a) sh_mv.mv_readl((a)) -# define __writeb(v,a) sh_mv.mv_writeb((v),(a)) -# define __writew(v,a) sh_mv.mv_writew((v),(a)) -# define __writel(v,a) sh_mv.mv_writel((v),(a)) - -# define __ioremap(a,s) sh_mv.mv_ioremap((a), (s)) -# define __iounmap(a) sh_mv.mv_iounmap((a)) - -# define __isa_port2addr(a) sh_mv.mv_isa_port2addr(a) - -# define inb __inb -# define inw __inw -# define inl __inl -# define outb __outb -# define outw __outw -# define outl __outl - -# define inb_p __inb_p -# define inw_p __inw_p -# define inl_p __inl_p -# define outb_p __outb_p -# define outw_p __outw_p -# define outl_p __outl_p - -# define insb __insb -# define insw __insw -# define insl __insl -# define outsb __outsb -# define outsw __outsw -# define outsl __outsl - -# define __raw_readb __readb -# define __raw_readw __readw -# define __raw_readl __readl -# define __raw_writeb __writeb -# define __raw_writew __writew -# define __raw_writel __writel +#define __inb(p) sh_mv.mv_inb((p)) +#define __inw(p) sh_mv.mv_inw((p)) +#define __inl(p) sh_mv.mv_inl((p)) +#define __outb(x,p) sh_mv.mv_outb((x),(p)) +#define __outw(x,p) sh_mv.mv_outw((x),(p)) +#define __outl(x,p) sh_mv.mv_outl((x),(p)) + +#define __inb_p(p) sh_mv.mv_inb_p((p)) +#define __inw_p(p) sh_mv.mv_inw_p((p)) +#define __inl_p(p) sh_mv.mv_inl_p((p)) +#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) +#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) +#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) + +#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) +#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) +#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) +#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) +#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) +#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) + +#define __readb(a) sh_mv.mv_readb((a)) +#define __readw(a) sh_mv.mv_readw((a)) +#define __readl(a) sh_mv.mv_readl((a)) +#define __writeb(v,a) sh_mv.mv_writeb((v),(a)) +#define __writew(v,a) sh_mv.mv_writew((v),(a)) +#define __writel(v,a) sh_mv.mv_writel((v),(a)) + +#define inb __inb +#define inw __inw +#define inl __inl +#define outb __outb +#define outw __outw +#define outl __outl + +#define inb_p __inb_p +#define inw_p __inw_p +#define inl_p __inl_p +#define outb_p __outb_p +#define outw_p __outw_p +#define outl_p __outl_p + +#define insb __insb +#define insw __insw +#define insl __insl +#define outsb __outsb +#define outsw __outsw +#define outsl __outsl + +#define __raw_readb(a) __readb((void __iomem *)(a)) +#define __raw_readw(a) __readw((void __iomem *)(a)) +#define __raw_readl(a) __readl((void __iomem *)(a)) +#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a)) +#define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) +#define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) /* * The platform header files may define some of these macros to use * the inlined versions where appropriate. These macros may also be * redefined by userlevel programs. */ -#ifdef __raw_readb -# define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; }) +#ifdef __readb +# define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; }) #endif #ifdef __raw_readw -# define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; }) +# define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; }) #endif #ifdef __raw_readl -# define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; }) +# define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; }) #endif #ifdef __raw_writeb -# define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); }) +# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) #endif #ifdef __raw_writew -# define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); }) +# define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) #endif #ifdef __raw_writel -# define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); }) +# define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) #endif #define readb_relaxed(a) readb(a) #define readw_relaxed(a) readw(a) #define readl_relaxed(a) readl(a) -#define mmiowb() +/* Simple MMIO */ +#define ioread8(a) readb(a) +#define ioread16(a) readw(a) +#define ioread16be(a) be16_to_cpu(__raw_readw((a))) +#define ioread32(a) readl(a) +#define ioread32be(a) be32_to_cpu(__raw_readl((a))) -/* - * If the platform has PC-like I/O, this function converts the offset into - * an address. - */ -static __inline__ unsigned long isa_port2addr(unsigned long offset) -{ - return __isa_port2addr(offset); -} +#define iowrite8(v,a) writeb((v),(a)) +#define iowrite16(v,a) writew((v),(a)) +#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) +#define iowrite32(v,a) writel((v),(a)) +#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) + +#define ioread8_rep(a,d,c) insb((a),(d),(c)) +#define ioread16_rep(a,d,c) insw((a),(d),(c)) +#define ioread32_rep(a,d,c) insl((a),(d),(c)) + +#define iowrite8_rep(a,s,c) outsb((a),(s),(c)) +#define iowrite16_rep(a,s,c) outsw((a),(s),(c)) +#define iowrite32_rep(a,s,c) outsl((a),(s),(c)) + +#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ /* * This function provides a method for the generic case where a board-specific - * isa_port2addr simply needs to return the port + some arbitrary port base. + * ioport_map simply needs to return the port + some arbitrary port base. * * We use this at board setup time to implicitly set the port base, and - * as a result, we can use the generic isa_port2addr. + * as a result, we can use the generic ioport_map. */ static inline void __set_io_port_base(unsigned long pbase) { @@ -159,51 +174,52 @@ static inline void __set_io_port_base(unsigned long pbase) generic_io_base = pbase; } -#define isa_readb(a) readb(isa_port2addr(a)) -#define isa_readw(a) readw(isa_port2addr(a)) -#define isa_readl(a) readl(isa_port2addr(a)) -#define isa_writeb(b,a) writeb(b,isa_port2addr(a)) -#define isa_writew(w,a) writew(w,isa_port2addr(a)) -#define isa_writel(l,a) writel(l,isa_port2addr(a)) +#define isa_readb(a) readb(ioport_map(a, 1)) +#define isa_readw(a) readw(ioport_map(a, 2)) +#define isa_readl(a) readl(ioport_map(a, 4)) +#define isa_writeb(b,a) writeb(b,ioport_map(a, 1)) +#define isa_writew(w,a) writew(w,ioport_map(a, 2)) +#define isa_writel(l,a) writel(l,ioport_map(a, 4)) + #define isa_memset_io(a,b,c) \ - memset((void *)(isa_port2addr((unsigned long)a)),(b),(c)) + memset((void *)(ioport_map((unsigned long)(a), 1)),(b),(c)) #define isa_memcpy_fromio(a,b,c) \ - memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c)) + memcpy((a),(void *)(ioport_map((unsigned long)(b), 1)),(c)) #define isa_memcpy_toio(a,b,c) \ - memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c)) + memcpy((void *)(ioport_map((unsigned long)(a), 1)),(b),(c)) /* We really want to try and get these to memcpy etc */ -extern void memcpy_fromio(void *, unsigned long, unsigned long); -extern void memcpy_toio(unsigned long, const void *, unsigned long); -extern void memset_io(unsigned long, int, unsigned long); +extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); +extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); +extern void memset_io(volatile void __iomem *, int, unsigned long); /* SuperH on-chip I/O functions */ -static __inline__ unsigned char ctrl_inb(unsigned long addr) +static inline unsigned char ctrl_inb(unsigned long addr) { return *(volatile unsigned char*)addr; } -static __inline__ unsigned short ctrl_inw(unsigned long addr) +static inline unsigned short ctrl_inw(unsigned long addr) { return *(volatile unsigned short*)addr; } -static __inline__ unsigned int ctrl_inl(unsigned long addr) +static inline unsigned int ctrl_inl(unsigned long addr) { return *(volatile unsigned long*)addr; } -static __inline__ void ctrl_outb(unsigned char b, unsigned long addr) +static inline void ctrl_outb(unsigned char b, unsigned long addr) { *(volatile unsigned char*)addr = b; } -static __inline__ void ctrl_outw(unsigned short b, unsigned long addr) +static inline void ctrl_outw(unsigned short b, unsigned long addr) { *(volatile unsigned short*)addr = b; } -static __inline__ void ctrl_outl(unsigned int b, unsigned long addr) +static inline void ctrl_outl(unsigned int b, unsigned long addr) { *(volatile unsigned long*)addr = b; } @@ -214,12 +230,12 @@ static __inline__ void ctrl_outl(unsigned int b, unsigned long addr) * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/SuperH mapping */ -static __inline__ unsigned long virt_to_phys(volatile void * address) +static inline unsigned long virt_to_phys(volatile void *address) { return PHYSADDR(address); } -static __inline__ void * phys_to_virt(unsigned long address) +static inline void *phys_to_virt(unsigned long address) { return (void *)P1SEGADDR(address); } @@ -234,27 +250,60 @@ static __inline__ void * phys_to_virt(unsigned long address) * differently. On the x86 architecture, we just read/write the * memory location directly. * - * On SH, we have the whole physical address space mapped at all times - * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do - * anything. (This isn't true for all machines but we still handle - * these cases with wired TLB entries anyway ...) + * On SH, we traditionally have the whole physical address space mapped + * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not + * need to do anything but place the address in the proper segment. This + * is true for P1 and P2 addresses, as well as some P3 ones. However, + * most of the P3 addresses and newer cores using extended addressing + * need to map through page tables, so the ioremap() implementation + * becomes a bit more complicated. See arch/sh/mm/ioremap.c for + * additional notes on this. * * We cheat a bit and always return uncachable areas until we've fixed - * the drivers to handle caching properly. + * the drivers to handle caching properly. */ -static __inline__ void * ioremap(unsigned long offset, unsigned long size) +#ifdef CONFIG_MMU +void __iomem *__ioremap(unsigned long offset, unsigned long size, + unsigned long flags); +void __iounmap(void __iomem *addr); +#else +#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) +#define __iounmap(addr) do { } while (0) +#endif /* CONFIG_MMU */ + +static inline void __iomem * +__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) { - return __ioremap(offset, size); + unsigned long last_addr = offset + size - 1; + + /* + * For P1 and P2 space this is trivial, as everything is already + * mapped. Uncached access for P1 addresses are done through P2. + * In the P3 case or for addresses outside of the 29-bit space, + * mapping must be done by the PMB or by using page tables. + */ + if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { + if (unlikely(flags & _PAGE_CACHABLE)) + return (void __iomem *)P1SEGADDR(offset); + + return (void __iomem *)P2SEGADDR(offset); + } + + return __ioremap(offset, size, flags); } -static __inline__ void iounmap(void *addr) -{ - return __iounmap(addr); -} - -#define ioremap_nocache(off,size) ioremap(off,size) - -static __inline__ int check_signature(unsigned long io_addr, +#define ioremap(offset, size) \ + __ioremap_mode((offset), (size), 0) +#define ioremap_nocache(offset, size) \ + __ioremap_mode((offset), (size), 0) +#define ioremap_cache(offset, size) \ + __ioremap_mode((offset), (size), _PAGE_CACHABLE) +#define p3_ioremap(offset, size, flags) \ + __ioremap((offset), (size), (flags)) +#define iounmap(addr) \ + __iounmap((addr)) + +static inline int check_signature(char __iomem *io_addr, const unsigned char *signature, int length) { int retval = 0; diff --git a/include/asm-sh/io_generic.h b/include/asm-sh/io_generic.h index be14587342f..92fc6070d7b 100644 --- a/include/asm-sh/io_generic.h +++ b/include/asm-sh/io_generic.h @@ -1,51 +1,49 @@ /* - * include/asm-sh/io_generic.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Generic IO functions + * Trivial I/O routine definitions, intentionally meant to be included + * multiple times. Ugly I/O routine concatenation helpers taken from + * alpha. Must be included _before_ io.h to avoid preprocessor-induced + * routine mismatch. */ - -#ifndef _ASM_SH_IO_GENERIC_H -#define _ASM_SH_IO_GENERIC_H - -extern unsigned long generic_io_base; - -extern unsigned char generic_inb(unsigned long port); -extern unsigned short generic_inw(unsigned long port); -extern unsigned int generic_inl(unsigned long port); - -extern void generic_outb(unsigned char value, unsigned long port); -extern void generic_outw(unsigned short value, unsigned long port); -extern void generic_outl(unsigned int value, unsigned long port); - -extern unsigned char generic_inb_p(unsigned long port); -extern unsigned short generic_inw_p(unsigned long port); -extern unsigned int generic_inl_p(unsigned long port); -extern void generic_outb_p(unsigned char value, unsigned long port); -extern void generic_outw_p(unsigned short value, unsigned long port); -extern void generic_outl_p(unsigned int value, unsigned long port); - -extern void generic_insb(unsigned long port, void *addr, unsigned long count); -extern void generic_insw(unsigned long port, void *addr, unsigned long count); -extern void generic_insl(unsigned long port, void *addr, unsigned long count); -extern void generic_outsb(unsigned long port, const void *addr, unsigned long count); -extern void generic_outsw(unsigned long port, const void *addr, unsigned long count); -extern void generic_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char generic_readb(unsigned long addr); -extern unsigned short generic_readw(unsigned long addr); -extern unsigned int generic_readl(unsigned long addr); -extern void generic_writeb(unsigned char b, unsigned long addr); -extern void generic_writew(unsigned short b, unsigned long addr); -extern void generic_writel(unsigned int b, unsigned long addr); - -extern void *generic_ioremap(unsigned long offset, unsigned long size); -extern void generic_iounmap(void *addr); - -extern unsigned long generic_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_GENERIC_H */ +#define IO_CONCAT(a,b) _IO_CONCAT(a,b) +#define _IO_CONCAT(a,b) a ## _ ## b + +#ifndef __IO_PREFIX +#error "Don't include this header without a valid system prefix" +#endif + +u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); +u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); +u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); + +void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); +void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); +void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); + +u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); +u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); +u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); +void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); +void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); +void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); + +void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); +void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); +void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); +void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); +void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); +void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); + +u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *); +u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *); +u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *); +void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *); +void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *); +void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *); + +void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); +void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); + +void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); +void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); + +#undef __IO_PREFIX diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h new file mode 100644 index 00000000000..8c8ca128108 --- /dev/null +++ b/include/asm-sh/irq-sh7780.h @@ -0,0 +1,349 @@ +#ifndef __ASM_SH_IRQ_SH7780_H +#define __ASM_SH_IRQ_SH7780_H + +/* + * linux/include/asm-sh/irq-sh7780.h + * + * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp> + */ + +#ifdef CONFIG_IDE +# ifndef IRQ_CFCARD +# define IRQ_CFCARD 14 +# endif +# ifndef IRQ_PCMCIA +# define IRQ_PCMCIA 15 +# endif +#endif + +#define INTC_BASE 0xffd00000 +#define INTC_ICR0 (INTC_BASE+0x0) +#define INTC_ICR1 (INTC_BASE+0x1c) +#define INTC_INTPRI (INTC_BASE+0x10) +#define INTC_INTREQ (INTC_BASE+0x24) +#define INTC_INTMSK0 (INTC_BASE+0x44) +#define INTC_INTMSK1 (INTC_BASE+0x48) +#define INTC_INTMSK2 (INTC_BASE+0x40080) +#define INTC_INTMSKCLR0 (INTC_BASE+0x64) +#define INTC_INTMSKCLR1 (INTC_BASE+0x68) +#define INTC_INTMSKCLR2 (INTC_BASE+0x40084) +#define INTC_NMIFCR (INTC_BASE+0xc0) +#define INTC_USERIMASK (INTC_BASE+0x30000) + +#define INTC_INT2PRI0 (INTC_BASE+0x40000) +#define INTC_INT2PRI1 (INTC_BASE+0x40004) +#define INTC_INT2PRI2 (INTC_BASE+0x40008) +#define INTC_INT2PRI3 (INTC_BASE+0x4000c) +#define INTC_INT2PRI4 (INTC_BASE+0x40010) +#define INTC_INT2PRI5 (INTC_BASE+0x40014) +#define INTC_INT2PRI6 (INTC_BASE+0x40018) +#define INTC_INT2PRI7 (INTC_BASE+0x4001c) +#define INTC_INT2A0 (INTC_BASE+0x40030) +#define INTC_INT2A1 (INTC_BASE+0x40034) +#define INTC_INT2MSKR (INTC_BASE+0x40038) +#define INTC_INT2MSKCR (INTC_BASE+0x4003c) +#define INTC_INT2B0 (INTC_BASE+0x40040) +#define INTC_INT2B1 (INTC_BASE+0x40044) +#define INTC_INT2B2 (INTC_BASE+0x40048) +#define INTC_INT2B3 (INTC_BASE+0x4004c) +#define INTC_INT2B4 (INTC_BASE+0x40050) +#define INTC_INT2B5 (INTC_BASE+0x40054) +#define INTC_INT2B6 (INTC_BASE+0x40058) +#define INTC_INT2B7 (INTC_BASE+0x4005c) +#define INTC_INT2GPIC (INTC_BASE+0x40090) +/* + NOTE: + *_IRQ = (INTEVT2 - 0x200)/0x20 +*/ +/* IRQ 0-7 line external int*/ +#define IRQ0_IRQ 2 +#define IRQ0_IPR_ADDR INTC_INTPRI +#define IRQ0_IPR_POS 7 +#define IRQ0_PRIORITY 2 + +#define IRQ1_IRQ 4 +#define IRQ1_IPR_ADDR INTC_INTPRI +#define IRQ1_IPR_POS 6 +#define IRQ1_PRIORITY 2 + +#define IRQ2_IRQ 6 +#define IRQ2_IPR_ADDR INTC_INTPRI +#define IRQ2_IPR_POS 5 +#define IRQ2_PRIORITY 2 + +#define IRQ3_IRQ 8 +#define IRQ3_IPR_ADDR INTC_INTPRI +#define IRQ3_IPR_POS 4 +#define IRQ3_PRIORITY 2 + +#define IRQ4_IRQ 10 +#define IRQ4_IPR_ADDR INTC_INTPRI +#define IRQ4_IPR_POS 3 +#define IRQ4_PRIORITY 2 + +#define IRQ5_IRQ 12 +#define IRQ5_IPR_ADDR INTC_INTPRI +#define IRQ5_IPR_POS 2 +#define IRQ5_PRIORITY 2 + +#define IRQ6_IRQ 14 +#define IRQ6_IPR_ADDR INTC_INTPRI +#define IRQ6_IPR_POS 1 +#define IRQ6_PRIORITY 2 + +#define IRQ7_IRQ 0 +#define IRQ7_IPR_ADDR INTC_INTPRI +#define IRQ7_IPR_POS 0 +#define IRQ7_PRIORITY 2 + +/* TMU */ +/* ch0 */ +#define TMU_IRQ 28 +#define TMU_IPR_ADDR INTC_INT2PRI0 +#define TMU_IPR_POS 3 +#define TMU_PRIORITY 2 + +#define TIMER_IRQ 28 +#define TIMER_IPR_ADDR INTC_INT2PRI0 +#define TIMER_IPR_POS 3 +#define TIMER_PRIORITY 2 + +/* ch 1*/ +#define TMU_CH1_IRQ 29 +#define TMU_CH1_IPR_ADDR INTC_INT2PRI0 +#define TMU_CH1_IPR_POS 2 +#define TMU_CH1_PRIORITY 2 + +#define TIMER1_IRQ 29 +#define TIMER1_IPR_ADDR INTC_INT2PRI0 +#define TIMER1_IPR_POS 2 +#define TIMER1_PRIORITY 2 + +/* ch 2*/ +#define TMU_CH2_IRQ 30 +#define TMU_CH2_IPR_ADDR INTC_INT2PRI0 +#define TMU_CH2_IPR_POS 1 +#define TMU_CH2_PRIORITY 2 +/* ch 2 Input capture */ +#define TMU_CH2IC_IRQ 31 +#define TMU_CH2IC_IPR_ADDR INTC_INT2PRI0 +#define TMU_CH2IC_IPR_POS 0 +#define TMU_CH2IC_PRIORITY 2 +/* ch 3 */ +#define TMU_CH3_IRQ 96 +#define TMU_CH3_IPR_ADDR INTC_INT2PRI1 +#define TMU_CH3_IPR_POS 3 +#define TMU_CH3_PRIORITY 2 +/* ch 4 */ +#define TMU_CH4_IRQ 97 +#define TMU_CH4_IPR_ADDR INTC_INT2PRI1 +#define TMU_CH4_IPR_POS 2 +#define TMU_CH4_PRIORITY 2 +/* ch 5*/ +#define TMU_CH5_IRQ 98 +#define TMU_CH5_IPR_ADDR INTC_INT2PRI1 +#define TMU_CH5_IPR_POS 1 +#define TMU_CH5_PRIORITY 2 + +#define RTC_IRQ 22 +#define RTC_IPR_ADDR INTC_INT2PRI1 +#define RTC_IPR_POS 0 +#define RTC_PRIORITY TIMER_PRIORITY + +/* SCIF0 */ +#define SCIF0_ERI_IRQ 40 +#define SCIF0_RXI_IRQ 41 +#define SCIF0_BRI_IRQ 42 +#define SCIF0_TXI_IRQ 43 +#define SCIF0_IPR_ADDR INTC_INT2PRI2 +#define SCIF0_IPR_POS 3 +#define SCIF0_PRIORITY 3 + +/* SCIF1 */ +#define SCIF1_ERI_IRQ 76 +#define SCIF1_RXI_IRQ 77 +#define SCIF1_BRI_IRQ 78 +#define SCIF1_TXI_IRQ 79 +#define SCIF1_IPR_ADDR INTC_INT2PRI2 +#define SCIF1_IPR_POS 2 +#define SCIF1_PRIORITY 3 + +#define WDT_IRQ 27 +#define WDT_IPR_ADDR INTC_INT2PRI2 +#define WDT_IPR_POS 1 +#define WDT_PRIORITY 2 + +/* DMAC(0) */ +#define DMINT0_IRQ 34 +#define DMINT1_IRQ 35 +#define DMINT2_IRQ 36 +#define DMINT3_IRQ 37 +#define DMINT4_IRQ 44 +#define DMINT5_IRQ 45 +#define DMINT6_IRQ 46 +#define DMINT7_IRQ 47 +#define DMAE_IRQ 38 +#define DMA0_IPR_ADDR INTC_INT2PRI3 +#define DMA0_IPR_POS 2 +#define DMA0_PRIORITY 7 + +/* DMAC(1) */ +#define DMINT8_IRQ 92 +#define DMINT9_IRQ 93 +#define DMINT10_IRQ 94 +#define DMINT11_IRQ 95 +#define DMA1_IPR_ADDR INTC_INT2PRI3 +#define DMA1_IPR_POS 1 +#define DMA1_PRIORITY 7 + +#define DMTE0_IRQ DMINT0_IRQ +#define DMTE4_IRQ DMINT4_IRQ +#define DMA_IPR_ADDR DMA0_IPR_ADDR +#define DMA_IPR_POS DMA0_IPR_POS +#define DMA_PRIORITY DMA0_PRIORITY + +/* CMT */ +#define CMT_IRQ 56 +#define CMT_IPR_ADDR INTC_INT2PRI4 +#define CMT_IPR_POS 3 +#define CMT_PRIORITY 0 + +/* HAC */ +#define HAC_IRQ 60 +#define HAC_IPR_ADDR INTC_INT2PRI4 +#define HAC_IPR_POS 2 +#define CMT_PRIORITY 0 + +/* PCIC(0) */ +#define PCIC0_IRQ 64 +#define PCIC0_IPR_ADDR INTC_INT2PRI4 +#define PCIC0_IPR_POS 1 +#define PCIC0_PRIORITY 2 + +/* PCIC(1) */ +#define PCIC1_IRQ 65 +#define PCIC1_IPR_ADDR INTC_INT2PRI4 +#define PCIC1_IPR_POS 0 +#define PCIC1_PRIORITY 2 + +/* PCIC(2) */ +#define PCIC2_IRQ 66 +#define PCIC2_IPR_ADDR INTC_INT2PRI5 +#define PCIC2_IPR_POS 3 +#define PCIC2_PRIORITY 2 + +/* PCIC(3) */ +#define PCIC3_IRQ 67 +#define PCIC3_IPR_ADDR INTC_INT2PRI5 +#define PCIC3_IPR_POS 2 +#define PCIC3_PRIORITY 2 + +/* PCIC(4) */ +#define PCIC4_IRQ 68 +#define PCIC4_IPR_ADDR INTC_INT2PRI5 +#define PCIC4_IPR_POS 1 +#define PCIC4_PRIORITY 2 + +/* PCIC(5) */ +#define PCICERR_IRQ 69 +#define PCICPWD3_IRQ 70 +#define PCICPWD2_IRQ 71 +#define PCICPWD1_IRQ 72 +#define PCICPWD0_IRQ 73 +#define PCIC5_IPR_ADDR INTC_INT2PRI5 +#define PCIC5_IPR_POS 0 +#define PCIC5_PRIORITY 2 + +/* SIOF */ +#define SIOF_IRQ 80 +#define SIOF_IPR_ADDR INTC_INT2PRI6 +#define SIOF_IPR_POS 3 +#define SIOF_PRIORITY 3 + +/* HSPI */ +#define HSPI_IRQ 84 +#define HSPI_IPR_ADDR INTC_INT2PRI6 +#define HSPI_IPR_POS 2 +#define HSPI_PRIORITY 3 + +/* MMCIF */ +#define MMCIF_FSTAT_IRQ 88 +#define MMCIF_TRAN_IRQ 89 +#define MMCIF_ERR_IRQ 90 +#define MMCIF_FRDY_IRQ 91 +#define MMCIF_IPR_ADDR INTC_INT2PRI6 +#define MMCIF_IPR_POS 1 +#define HSPI_PRIORITY 3 + +/* SSI */ +#define SSI_IRQ 100 +#define SSI_IPR_ADDR INTC_INT2PRI6 +#define SSI_IPR_POS 0 +#define SSI_PRIORITY 3 + +/* FLCTL */ +#define FLCTL_FLSTE_IRQ 104 +#define FLCTL_FLTEND_IRQ 105 +#define FLCTL_FLTRQ0_IRQ 106 +#define FLCTL_FLTRQ1_IRQ 107 +#define FLCTL_IPR_ADDR INTC_INT2PRI7 +#define FLCTL_IPR_POS 3 +#define FLCTL_PRIORITY 3 + +/* GPIO */ +#define GPIO0_IRQ 108 +#define GPIO1_IRQ 109 +#define GPIO2_IRQ 110 +#define GPIO3_IRQ 111 +#define GPIO_IPR_ADDR INTC_INT2PRI7 +#define GPIO_IPR_POS 2 +#define GPIO_PRIORITY 3 + +/* ONCHIP_NR_IRQS */ +#define NR_IRQS 150 /* 111 + 16 */ + +/* In a generic kernel, NR_IRQS is an upper bound, and we should use + * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value. + */ +#define ACTUAL_NR_IRQS NR_IRQS + +extern void disable_irq(unsigned int); +extern void disable_irq_nosync(unsigned int); +extern void enable_irq(unsigned int); + +/* + * Simple Mask Register Support + */ +extern void make_maskreg_irq(unsigned int irq); +extern unsigned short *irq_mask_register; + +/* + * Function for "on chip support modules". + */ +extern void make_imask_irq(unsigned int irq); + +#define INTC_TMU0_MSK 0 +#define INTC_TMU3_MSK 1 +#define INTC_RTC_MSK 2 +#define INTC_SCIF0_MSK 3 +#define INTC_SCIF1_MSK 4 +#define INTC_WDT_MSK 5 +#define INTC_HUID_MSK 7 +#define INTC_DMAC0_MSK 8 +#define INTC_DMAC1_MSK 9 +#define INTC_CMT_MSK 12 +#define INTC_HAC_MSK 13 +#define INTC_PCIC0_MSK 14 +#define INTC_PCIC1_MSK 15 +#define INTC_PCIC2_MSK 16 +#define INTC_PCIC3_MSK 17 +#define INTC_PCIC4_MSK 18 +#define INTC_PCIC5_MSK 19 +#define INTC_SIOF_MSK 20 +#define INTC_HSPI_MSK 21 +#define INTC_MMCIF_MSK 22 +#define INTC_SSI_MSK 23 +#define INTC_FLCTL_MSK 24 +#define INTC_GPIO_MSK 25 + +#endif /* __ASM_SH_IRQ_SH7780_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 614a8c13b72..060ec3c2720 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -15,13 +15,20 @@ #include <asm/machvec.h> #include <asm/ptrace.h> /* for pt_regs */ -#if defined(CONFIG_SH_HP600) || \ +#if defined(CONFIG_SH_HP6XX) || \ defined(CONFIG_SH_RTS7751R2D) || \ defined(CONFIG_SH_HS7751RVOIP) || \ - defined(CONFIG_SH_SH03) + defined(CONFIG_SH_HS7751RVOIP) || \ + defined(CONFIG_SH_SH03) || \ + defined(CONFIG_SH_R7780RP) || \ + defined(CONFIG_SH_LANDISK) #include <asm/mach/ide.h> #endif +#ifndef CONFIG_CPU_SUBTYPE_SH7780 + +#define INTC_DMAC0_MSK 0 + #if defined(CONFIG_CPU_SH3) #define INTC_IPRA 0xfffffee2UL #define INTC_IPRB 0xfffffee4UL @@ -235,8 +242,9 @@ #define SCIF1_IPR_ADDR INTC_IPRB #define SCIF1_IPR_POS 1 #define SCIF1_PRIORITY 3 -#endif -#endif +#endif /* ST40STB1 */ + +#endif /* 775x / SH4-202 / ST40STB1 */ /* NR_IRQS is made from three components: * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules @@ -245,37 +253,35 @@ */ /* 1. ONCHIP_NR_IRQS */ -#ifdef CONFIG_SH_GENERIC +#if defined(CONFIG_CPU_SUBTYPE_SH7604) +# define ONCHIP_NR_IRQS 24 // Actually 21 +#elif defined(CONFIG_CPU_SUBTYPE_SH7707) +# define ONCHIP_NR_IRQS 64 +# define PINT_NR_IRQS 16 +#elif defined(CONFIG_CPU_SUBTYPE_SH7708) +# define ONCHIP_NR_IRQS 32 +#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) +# define ONCHIP_NR_IRQS 64 // Actually 61 +# define PINT_NR_IRQS 16 +#elif defined(CONFIG_CPU_SUBTYPE_SH7750) +# define ONCHIP_NR_IRQS 48 // Actually 44 +#elif defined(CONFIG_CPU_SUBTYPE_SH7751) +# define ONCHIP_NR_IRQS 72 +#elif defined(CONFIG_CPU_SUBTYPE_SH7760) +# define ONCHIP_NR_IRQS 112 /* XXX */ +#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) +# define ONCHIP_NR_IRQS 72 +#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) +# define ONCHIP_NR_IRQS 144 +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) +# define ONCHIP_NR_IRQS 109 +#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ # define ONCHIP_NR_IRQS 144 -#else -# if defined(CONFIG_CPU_SUBTYPE_SH7604) -# define ONCHIP_NR_IRQS 24 // Actually 21 -# elif defined(CONFIG_CPU_SUBTYPE_SH7707) -# define ONCHIP_NR_IRQS 64 -# define PINT_NR_IRQS 16 -# elif defined(CONFIG_CPU_SUBTYPE_SH7708) -# define ONCHIP_NR_IRQS 32 -# elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) -# define ONCHIP_NR_IRQS 64 // Actually 61 -# define PINT_NR_IRQS 16 -# elif defined(CONFIG_CPU_SUBTYPE_SH7750) -# define ONCHIP_NR_IRQS 48 // Actually 44 -# elif defined(CONFIG_CPU_SUBTYPE_SH7751) -# define ONCHIP_NR_IRQS 72 -# elif defined(CONFIG_CPU_SUBTYPE_SH7760) -# define ONCHIP_NR_IRQS 110 -# elif defined(CONFIG_CPU_SUBTYPE_SH4_202) -# define ONCHIP_NR_IRQS 72 -# elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) -# define ONCHIP_NR_IRQS 144 -# elif defined(CONFIG_CPU_SUBTYPE_SH7300) -# define ONCHIP_NR_IRQS 109 -# endif #endif /* 2. PINT_NR_IRQS */ -#ifdef CONFIG_SH_GENERIC +#ifdef CONFIG_SH_UNKNOWN # define PINT_NR_IRQS 16 #else # ifndef PINT_NR_IRQS @@ -288,22 +294,22 @@ #endif /* 3. OFFCHIP_NR_IRQS */ -#ifdef CONFIG_SH_GENERIC +#if defined(CONFIG_HD64461) +# define OFFCHIP_NR_IRQS 18 +#elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */ +# define OFFCHIP_NR_IRQS 48 +#elif defined(CONFIG_HD64465) # define OFFCHIP_NR_IRQS 16 +#elif defined (CONFIG_SH_EC3104) +# define OFFCHIP_NR_IRQS 16 +#elif defined (CONFIG_SH_DREAMCAST) +# define OFFCHIP_NR_IRQS 96 +#elif defined (CONFIG_SH_TITAN) +# define OFFCHIP_NR_IRQS 4 +#elif defined(CONFIG_SH_UNKNOWN) +# define OFFCHIP_NR_IRQS 16 /* Must also be last */ #else -# if defined(CONFIG_HD64461) -# define OFFCHIP_NR_IRQS 18 -# elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */ -# define OFFCHIP_NR_IRQS 48 -# elif defined(CONFIG_HD64465) -# define OFFCHIP_NR_IRQS 16 -# elif defined (CONFIG_SH_EC3104) -# define OFFCHIP_NR_IRQS 16 -# elif defined (CONFIG_SH_DREAMCAST) -# define OFFCHIP_NR_IRQS 96 -# else -# define OFFCHIP_NR_IRQS 0 -# endif +# define OFFCHIP_NR_IRQS 0 #endif #if OFFCHIP_NR_IRQS > 0 @@ -313,16 +319,6 @@ /* NR_IRQS. 1+2+3 */ #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) -/* In a generic kernel, NR_IRQS is an upper bound, and we should use - * ACTUAL_NR_IRQS (which uses the machine vector) to get the correct value. - */ -#ifdef CONFIG_SH_GENERIC -# define ACTUAL_NR_IRQS (sh_mv.mv_nr_irqs) -#else -# define ACTUAL_NR_IRQS NR_IRQS -#endif - - extern void disable_irq(unsigned int); extern void disable_irq_nosync(unsigned int); extern void enable_irq(unsigned int); @@ -542,9 +538,6 @@ extern int ipr_irq_demux(int irq); extern int ipr_irq_demux(int irq); #define __irq_demux(irq) ipr_irq_demux(irq) - -#else -#define __irq_demux(irq) irq #endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */ #if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \ @@ -557,18 +550,35 @@ extern int ipr_irq_demux(int irq); #define INTC_ICR_IRLM (1<<7) #endif -#ifdef CONFIG_CPU_SUBTYPE_ST40STB1 +#else +#include <asm/irq-sh7780.h> +#endif +/* SH with INTC2-style interrupts */ +#ifdef CONFIG_CPU_HAS_INTC2_IRQ +#if defined(CONFIG_CPU_SUBTYPE_ST40STB1) +#define INTC2_BASE 0xfe080000 #define INTC2_FIRST_IRQ 64 -#define NR_INTC2_IRQS 25 - +#define INTC2_INTREQ_OFFSET 0x20 +#define INTC2_INTMSK_OFFSET 0x40 +#define INTC2_INTMSKCLR_OFFSET 0x60 +#define NR_INTC2_IRQS 25 +#elif defined(CONFIG_CPU_SUBTYPE_SH7760) #define INTC2_BASE 0xfe080000 -#define INTC2_INTC2MODE (INTC2_BASE+0x80) - -#define INTC2_INTPRI_OFFSET 0x00 +#define INTC2_FIRST_IRQ 48 /* INTEVT 0x800 */ #define INTC2_INTREQ_OFFSET 0x20 #define INTC2_INTMSK_OFFSET 0x40 #define INTC2_INTMSKCLR_OFFSET 0x60 +#define NR_INTC2_IRQS 64 +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#define INTC2_BASE 0xffd40000 +#define INTC2_FIRST_IRQ 22 +#define INTC2_INTMSK_OFFSET (0x38) +#define INTC2_INTMSKCLR_OFFSET (0x3c) +#define NR_INTC2_IRQS 60 +#endif + +#define INTC2_INTPRI_OFFSET 0x00 void make_intc2_irq(unsigned int irq, unsigned int ipr_offset, unsigned int ipr_shift, @@ -577,13 +587,16 @@ void make_intc2_irq(unsigned int irq, void init_IRQ_intc2(void); void intc2_add_clear_irq(int irq, int (*fn)(int)); -#endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */ +#endif static inline int generic_irq_demux(int irq) { return irq; } +#ifndef __irq_demux +#define __irq_demux(irq) (irq) +#endif #define irq_canonicalize(irq) (irq) #define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h new file mode 100644 index 00000000000..9dfe59f6fcb --- /dev/null +++ b/include/asm-sh/kexec.h @@ -0,0 +1,33 @@ +#ifndef _SH_KEXEC_H +#define _SH_KEXEC_H + +/* + * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. + * I.e. Maximum page that is mapped directly into kernel memory, + * and kmap is not required. + * + * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct + * calculation for the amount of memory directly mappable into the + * kernel memory space. + */ + +/* Maximum physical address we can use pages from */ +#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) +/* Maximum address we can reach in physical address mode */ +#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) +/* Maximum address we can use for the control code buffer */ +#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE + +#define KEXEC_CONTROL_CODE_SIZE 4096 + +/* The native architecture */ +#define KEXEC_ARCH KEXEC_ARCH_SH + +#ifndef __ASSEMBLY__ + +extern void machine_shutdown(void); +extern void *crash_notes; + +#endif /* __ASSEMBLY__ */ + +#endif /* _SH_KEXEC_H */ diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 3f18aa18051..550c50a7359 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -18,44 +18,37 @@ #include <asm/machvec_init.h> struct device; -struct timeval; -struct sh_machine_vector -{ +struct sh_machine_vector { int mv_nr_irqs; - unsigned char (*mv_inb)(unsigned long); - unsigned short (*mv_inw)(unsigned long); - unsigned int (*mv_inl)(unsigned long); - void (*mv_outb)(unsigned char, unsigned long); - void (*mv_outw)(unsigned short, unsigned long); - void (*mv_outl)(unsigned int, unsigned long); - - unsigned char (*mv_inb_p)(unsigned long); - unsigned short (*mv_inw_p)(unsigned long); - unsigned int (*mv_inl_p)(unsigned long); - void (*mv_outb_p)(unsigned char, unsigned long); - void (*mv_outw_p)(unsigned short, unsigned long); - void (*mv_outl_p)(unsigned int, unsigned long); - - void (*mv_insb)(unsigned long port, void *addr, unsigned long count); - void (*mv_insw)(unsigned long port, void *addr, unsigned long count); - void (*mv_insl)(unsigned long port, void *addr, unsigned long count); - void (*mv_outsb)(unsigned long port, const void *addr, unsigned long count); - void (*mv_outsw)(unsigned long port, const void *addr, unsigned long count); - void (*mv_outsl)(unsigned long port, const void *addr, unsigned long count); - - unsigned char (*mv_readb)(unsigned long); - unsigned short (*mv_readw)(unsigned long); - unsigned int (*mv_readl)(unsigned long); - void (*mv_writeb)(unsigned char, unsigned long); - void (*mv_writew)(unsigned short, unsigned long); - void (*mv_writel)(unsigned int, unsigned long); - - void* (*mv_ioremap)(unsigned long offset, unsigned long size); - void (*mv_iounmap)(void *addr); - - unsigned long (*mv_isa_port2addr)(unsigned long offset); + u8 (*mv_inb)(unsigned long); + u16 (*mv_inw)(unsigned long); + u32 (*mv_inl)(unsigned long); + void (*mv_outb)(u8, unsigned long); + void (*mv_outw)(u16, unsigned long); + void (*mv_outl)(u32, unsigned long); + + u8 (*mv_inb_p)(unsigned long); + u16 (*mv_inw_p)(unsigned long); + u32 (*mv_inl_p)(unsigned long); + void (*mv_outb_p)(u8, unsigned long); + void (*mv_outw_p)(u16, unsigned long); + void (*mv_outl_p)(u32, unsigned long); + + void (*mv_insb)(unsigned long, void *dst, unsigned long count); + void (*mv_insw)(unsigned long, void *dst, unsigned long count); + void (*mv_insl)(unsigned long, void *dst, unsigned long count); + void (*mv_outsb)(unsigned long, const void *src, unsigned long count); + void (*mv_outsw)(unsigned long, const void *src, unsigned long count); + void (*mv_outsl)(unsigned long, const void *src, unsigned long count); + + u8 (*mv_readb)(void __iomem *); + u16 (*mv_readw)(void __iomem *); + u32 (*mv_readl)(void __iomem *); + void (*mv_writeb)(u8, void __iomem *); + void (*mv_writew)(u16, void __iomem *); + void (*mv_writel)(u32, void __iomem *); int (*mv_irq_demux)(int irq); @@ -66,6 +59,9 @@ struct sh_machine_vector void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t); int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t); + + void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); + void (*mv_ioport_unmap)(void __iomem *); }; extern struct sh_machine_vector sh_mv; diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h new file mode 100644 index 00000000000..dd6579c0b04 --- /dev/null +++ b/include/asm-sh/timer.h @@ -0,0 +1,42 @@ +#ifndef __ASM_SH_TIMER_H +#define __ASM_SH_TIMER_H + +#include <linux/sysdev.h> +#include <asm/cpu/timer.h> + +struct sys_timer_ops { + int (*init)(void); + unsigned long (*get_offset)(void); + unsigned long (*get_frequency)(void); +}; + +struct sys_timer { + const char *name; + + struct sys_device dev; + struct sys_timer_ops *ops; +}; + +#define TICK_SIZE (tick_nsec / 1000) + +extern struct sys_timer tmu_timer; +extern struct sys_timer *sys_timer; + +static inline unsigned long get_timer_offset(void) +{ + return sys_timer->ops->get_offset(); +} + +static inline unsigned long get_timer_frequency(void) +{ + return sys_timer->ops->get_frequency(); +} + +/* arch/sh/kernel/timers/timer.c */ +struct sys_timer *get_sys_timer(void); + +/* arch/sh/kernel/time.c */ +void handle_timer_tick(struct pt_regs *); + +#endif /* __ASM_SH_TIMER_H */ + diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h index 95944556d8b..d0d76b30eb4 100644 --- a/include/asm-sparc/oplib.h +++ b/include/asm-sparc/oplib.h @@ -164,6 +164,7 @@ enum prom_input_device { PROMDEV_IKBD, /* input from keyboard */ PROMDEV_ITTYA, /* input from ttya */ PROMDEV_ITTYB, /* input from ttyb */ + PROMDEV_IRSC, /* input from rsc */ PROMDEV_I_UNK, }; @@ -175,6 +176,7 @@ enum prom_output_device { PROMDEV_OSCREEN, /* to screen */ PROMDEV_OTTYA, /* to ttya */ PROMDEV_OTTYB, /* to ttyb */ + PROMDEV_ORSC, /* to rsc */ PROMDEV_O_UNK, }; diff --git a/include/asm-sparc/thread_info.h b/include/asm-sparc/thread_info.h index 65f060b040a..91b9f5888c8 100644 --- a/include/asm-sparc/thread_info.h +++ b/include/asm-sparc/thread_info.h @@ -128,9 +128,10 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) * thread information flag bit numbers */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ +/* flag bit 1 is available */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ #define TIF_USEDFPU 8 /* FPU was used by this task * this quantum (SMP) */ #define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling @@ -139,9 +140,9 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) -#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) +#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_USEDFPU (1<<TIF_USEDFPU) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h index 58dba518239..2ac64e65e33 100644 --- a/include/asm-sparc/unistd.h +++ b/include/asm-sparc/unistd.h @@ -300,11 +300,26 @@ #define __NR_add_key 281 #define __NR_request_key 282 #define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_newfstatat 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 -/* WARNING: You MAY NOT add syscall numbers larger than 283, since +/* WARNING: You MAY NOT add syscall numbers larger than 298, since * all of the syscall tables in the Sparc kernel are - * sized to have 283 entries (starting at zero). Therefore - * find a free slot in the 0-282 range. + * sized to have 298 entries (starting at zero). Therefore + * find a free slot in the 0-298 range. */ #define _syscall0(type,name) \ @@ -458,6 +473,7 @@ return -1; \ #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #endif #ifdef __KERNEL_SYSCALLS__ diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index d02f1e8ae1a..3c59b2693fb 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h @@ -163,6 +163,7 @@ enum prom_input_device { PROMDEV_IKBD, /* input from keyboard */ PROMDEV_ITTYA, /* input from ttya */ PROMDEV_ITTYB, /* input from ttyb */ + PROMDEV_IRSC, /* input from rsc */ PROMDEV_I_UNK, }; @@ -174,6 +175,7 @@ enum prom_output_device { PROMDEV_OSCREEN, /* to screen */ PROMDEV_OTTYA, /* to ttya */ PROMDEV_OTTYB, /* to ttyb */ + PROMDEV_ORSC, /* to rsc */ PROMDEV_O_UNK, }; diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h index ec85d12d73b..508c416e9d6 100644 --- a/include/asm-sparc64/spinlock.h +++ b/include/asm-sparc64/spinlock.h @@ -131,6 +131,28 @@ static void inline __read_lock(raw_rwlock_t *lock) : "memory"); } +static int inline __read_trylock(raw_rwlock_t *lock) +{ + int tmp1, tmp2; + + __asm__ __volatile__ ( +"1: ldsw [%2], %0\n" +" brlz,a,pn %0, 2f\n" +" mov 0, %0\n" +" add %0, 1, %1\n" +" cas [%2], %0, %1\n" +" cmp %0, %1\n" +" membar #StoreLoad | #StoreStore\n" +" bne,pn %%icc, 1b\n" +" mov 1, %0\n" +"2:" + : "=&r" (tmp1), "=&r" (tmp2) + : "r" (lock) + : "memory"); + + return tmp1; +} + static void inline __read_unlock(raw_rwlock_t *lock) { unsigned long tmp1, tmp2; @@ -211,12 +233,12 @@ static int inline __write_trylock(raw_rwlock_t *lock) } #define __raw_read_lock(p) __read_lock(p) +#define __raw_read_trylock(p) __read_trylock(p) #define __raw_read_unlock(p) __read_unlock(p) #define __raw_write_lock(p) __write_lock(p) #define __raw_write_unlock(p) __write_unlock(p) #define __raw_write_trylock(p) __write_trylock(p) -#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) #define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) #define __raw_write_can_lock(rw) (!(rw)->lock) diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h index c94d8b3991b..ac9d068aab4 100644 --- a/include/asm-sparc64/thread_info.h +++ b/include/asm-sparc64/thread_info.h @@ -221,7 +221,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); * nop */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ +#define TIF_RESTORE_SIGMASK 1 /* restore signal mask in do_signal() */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_PERFCTR 4 /* performance counters active */ @@ -241,7 +241,6 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define TIF_POLLING_NRFLAG 14 #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) -#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) #define _TIF_PERFCTR (1<<TIF_PERFCTR) @@ -250,11 +249,12 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define _TIF_32BIT (1<<TIF_32BIT) #define _TIF_SECCOMP (1<<TIF_SECCOMP) #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) +#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) #define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ - (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ + (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | \ _TIF_NEED_RESCHED | _TIF_PERFCTR)) #endif /* __KERNEL__ */ diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h index 51ec2879b88..84ac2bdb090 100644 --- a/include/asm-sparc64/unistd.h +++ b/include/asm-sparc64/unistd.h @@ -302,11 +302,26 @@ #define __NR_add_key 281 #define __NR_request_key 282 #define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_newfstatat 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 -/* WARNING: You MAY NOT add syscall numbers larger than 283, since +/* WARNING: You MAY NOT add syscall numbers larger than 298, since * all of the syscall tables in the Sparc kernel are - * sized to have 283 entries (starting at zero). Therefore - * find a free slot in the 0-282 range. + * sized to have 298 entries (starting at zero). Therefore + * find a free slot in the 0-298 range. */ #define _syscall0(type,name) \ @@ -501,6 +516,8 @@ asmlinkage long sys_rt_sigaction(int sig, #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND +#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND #endif /* diff --git a/include/asm-um/io.h b/include/asm-um/io.h index 90674056dce..1934d9340e2 100644 --- a/include/asm-um/io.h +++ b/include/asm-um/io.h @@ -33,4 +33,20 @@ static inline void * phys_to_virt(unsigned long address) */ #define xlate_dev_kmem_ptr(p) p +static inline void writeb(unsigned char b, volatile void __iomem *addr) +{ + *(volatile unsigned char __force *) addr = b; +} +static inline void writew(unsigned short b, volatile void __iomem *addr) +{ + *(volatile unsigned short __force *) addr = b; +} +static inline void writel(unsigned int b, volatile void __iomem *addr) +{ + *(volatile unsigned int __force *) addr = b; +} +#define __raw_writeb writeb +#define __raw_writew writew +#define __raw_writel writel + #endif diff --git a/include/asm-um/thread_info.h b/include/asm-um/thread_info.h index 705c71972c3..17b6b07c433 100644 --- a/include/asm-um/thread_info.h +++ b/include/asm-um/thread_info.h @@ -69,6 +69,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTART_BLOCK 4 #define TIF_MEMDIE 5 #define TIF_SYSCALL_AUDIT 6 +#define TIF_RESTORE_SIGMASK 7 #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) @@ -76,16 +77,6 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_MEMDIE (1 << TIF_MEMDIE) #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) #endif - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff --git a/include/asm-um/unistd.h b/include/asm-um/unistd.h index 6fdde45cc05..afccfcaa9ea 100644 --- a/include/asm-um/unistd.h +++ b/include/asm-um/unistd.h @@ -34,6 +34,7 @@ extern int um_execve(const char *file, char *const argv[], char *const env[]); #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #endif #ifdef __KERNEL_SYSCALLS__ diff --git a/include/asm-x86_64/edac.h b/include/asm-x86_64/edac.h new file mode 100644 index 00000000000..cad1cd42b4e --- /dev/null +++ b/include/asm-x86_64/edac.h @@ -0,0 +1,18 @@ +#ifndef ASM_EDAC_H +#define ASM_EDAC_H + +/* ECC atomic, DMA, SMP and interrupt safe scrub function */ + +static __inline__ void atomic_scrub(void *va, u32 size) +{ + unsigned int *virt_addr = va; + u32 i; + + for (i = 0; i < size / 4; i++, virt_addr++) + /* Very carefully read and write to memory atomically + * so we are interrupt, DMA and SMP safe. + */ + __asm__ __volatile__("lock; addl $0, %0"::"m"(*virt_addr)); +} + +#endif diff --git a/include/asm-x86_64/ia32.h b/include/asm-x86_64/ia32.h index c7bc9c0525b..e6b7f2234e4 100644 --- a/include/asm-x86_64/ia32.h +++ b/include/asm-x86_64/ia32.h @@ -169,6 +169,8 @@ int ia32_child_tls(struct task_struct *p, struct pt_regs *childregs); struct linux_binprm; extern int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top, int exec_stack); +struct mm_struct; +extern void ia32_pick_mmap_layout(struct mm_struct *mm); #endif diff --git a/include/asm-x86_64/ia32_unistd.h b/include/asm-x86_64/ia32_unistd.h index e8843362a6c..e87cd83a0e8 100644 --- a/include/asm-x86_64/ia32_unistd.h +++ b/include/asm-x86_64/ia32_unistd.h @@ -300,7 +300,20 @@ #define __NR_ia32_inotify_add_watch 292 #define __NR_ia32_inotify_rm_watch 293 #define __NR_ia32_migrate_pages 294 +#define __NR_ia32_opanat 295 +#define __NR_ia32_mkdirat 296 +#define __NR_ia32_mknodat 297 +#define __NR_ia32_fchownat 298 +#define __NR_ia32_futimesat 299 +#define __NR_ia32_newfstatat 300 +#define __NR_ia32_unlinkat 301 +#define __NR_ia32_renameat 302 +#define __NR_ia32_linkat 303 +#define __NR_ia32_symlinkat 304 +#define __NR_ia32_readlinkat 305 +#define __NR_ia32_fchmodat 306 +#define __NR_ia32_faccessat 307 -#define IA32_NR_syscalls 295 /* must be > than biggest syscall! */ +#define IA32_NR_syscalls 308 /* must be > than biggest syscall! */ #endif /* _ASM_X86_64_IA32_UNISTD_H_ */ diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index a1ba7c97465..8c8d88c036e 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -477,4 +477,6 @@ extern unsigned long boot_option_idle_override; /* Boot loader type from the setup header */ extern int bootloader_type; +#define HAVE_ARCH_PICK_MMAP_LAYOUT 1 + #endif /* __ASM_X86_64_PROCESSOR_H */ diff --git a/include/asm-x86_64/system.h b/include/asm-x86_64/system.h index 0eacbefb7dd..a73f0c789d8 100644 --- a/include/asm-x86_64/system.h +++ b/include/asm-x86_64/system.h @@ -354,11 +354,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, #define local_irq_disable() __asm__ __volatile__("cli": : :"memory") #define local_irq_enable() __asm__ __volatile__("sti": : :"memory") -/* used in the idle loop; sti takes one instruction cycle to complete */ -#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") -/* used when interrupts are already enabled or to shutdown the processor */ -#define halt() __asm__ __volatile__("hlt": : :"memory") - #define irqs_disabled() \ ({ \ unsigned long flags; \ @@ -370,6 +365,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, #define local_irq_save(x) do { warn_if_not_ulong(x); __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0) #endif +/* used in the idle loop; sti takes one instruction cycle to complete */ +#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") +/* used when interrupts are already enabled or to shutdown the processor */ +#define halt() __asm__ __volatile__("hlt": : :"memory") + void cpu_idle_wait(void); extern unsigned long arch_align_stack(unsigned long sp); diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index e6f896161c1..436d099b5b6 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -573,8 +573,35 @@ __SYSCALL(__NR_inotify_add_watch, sys_inotify_add_watch) __SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch) #define __NR_migrate_pages 256 __SYSCALL(__NR_migrate_pages, sys_migrate_pages) +#define __NR_openat 257 +__SYSCALL(__NR_openat, sys_openat) +#define __NR_mkdirat 258 +__SYSCALL(__NR_mkdirat, sys_mkdirat) +#define __NR_mknodat 259 +__SYSCALL(__NR_mknodat, sys_mknodat) +#define __NR_fchownat 260 +__SYSCALL(__NR_fchownat, sys_fchownat) +#define __NR_futimesat 261 +__SYSCALL(__NR_futimesat, sys_futimesat) +#define __NR_newfstatat 262 +__SYSCALL(__NR_newfstatat, sys_newfstatat) +#define __NR_unlinkat 263 +__SYSCALL(__NR_unlinkat, sys_unlinkat) +#define __NR_renameat 264 +__SYSCALL(__NR_renameat, sys_renameat) +#define __NR_linkat 265 +__SYSCALL(__NR_linkat, sys_linkat) +#define __NR_symlinkat 266 +__SYSCALL(__NR_symlinkat, sys_symlinkat) +#define __NR_readlinkat 267 +__SYSCALL(__NR_readlinkat, sys_readlinkat) +#define __NR_fchmodat 268 +__SYSCALL(__NR_fchmodat, sys_fchmodat) +#define __NR_faccessat 269 +__SYSCALL(__NR_faccessat, sys_faccessat) + +#define __NR_syscall_max __NR_faccessat -#define __NR_syscall_max __NR_migrate_pages #ifndef __NO_STUBS /* user-visible error numbers are in the range -1 - -4095 */ diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 02a585faa62..860e7a485a5 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -392,8 +392,8 @@ struct request_queue unsigned int nr_congestion_off; unsigned int nr_batching; - unsigned short max_sectors; - unsigned short max_hw_sectors; + unsigned int max_sectors; + unsigned int max_hw_sectors; unsigned short max_phys_segments; unsigned short max_hw_segments; unsigned short hardsect_size; @@ -697,7 +697,7 @@ extern request_queue_t *blk_init_queue(request_fn_proc *, spinlock_t *); extern void blk_cleanup_queue(request_queue_t *); extern void blk_queue_make_request(request_queue_t *, make_request_fn *); extern void blk_queue_bounce_limit(request_queue_t *, u64); -extern void blk_queue_max_sectors(request_queue_t *, unsigned short); +extern void blk_queue_max_sectors(request_queue_t *, unsigned int); extern void blk_queue_max_phys_segments(request_queue_t *, unsigned short); extern void blk_queue_max_hw_segments(request_queue_t *, unsigned short); extern void blk_queue_max_segment_size(request_queue_t *, unsigned int); diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index c31650df924..17866d7e2b7 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -14,6 +14,7 @@ #ifndef _LINUX_CPUFREQ_H #define _LINUX_CPUFREQ_H +#include <linux/mutex.h> #include <linux/config.h> #include <linux/notifier.h> #include <linux/threads.h> @@ -82,7 +83,7 @@ struct cpufreq_policy { unsigned int policy; /* see above */ struct cpufreq_governor *governor; /* see below */ - struct semaphore lock; /* CPU ->setpolicy or ->target may + struct mutex lock; /* CPU ->setpolicy or ->target may only be called once a time */ struct work_struct update; /* if update_policy() needs to be diff --git a/include/linux/fcntl.h b/include/linux/fcntl.h index 8a7c82151de..c52a63755fd 100644 --- a/include/linux/fcntl.h +++ b/include/linux/fcntl.h @@ -23,6 +23,13 @@ #define DN_ATTRIB 0x00000020 /* File changed attibutes */ #define DN_MULTISHOT 0x80000000 /* Don't remove notifier */ +#define AT_FDCWD -100 /* Special value used to indicate + openat should use the current + working directory. */ +#define AT_SYMLINK_NOFOLLOW 0x100 /* Do not follow symbolic links. */ +#define AT_REMOVEDIR 0x200 /* Remove directory instead of + unlinking file. */ + #ifdef __KERNEL__ #ifndef force_o_largefile diff --git a/include/linux/fs.h b/include/linux/fs.h index 552cedfa606..84bb449b9b0 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1290,6 +1290,9 @@ extern void mnt_set_mountpoint(struct vfsmount *, struct dentry *, extern int vfs_statfs(struct super_block *, struct kstatfs *); +/* /sys/fs */ +extern struct subsystem fs_subsys; + #define FLOCK_VERIFY_READ 1 #define FLOCK_VERIFY_WRITE 2 @@ -1337,7 +1340,8 @@ static inline int break_lease(struct inode *inode, unsigned int mode) extern int do_truncate(struct dentry *, loff_t start, unsigned int time_attrs, struct file *filp); -extern long do_sys_open(const char __user *filename, int flags, int mode); +extern long do_sys_open(int fdf, const char __user *filename, int flags, + int mode); extern struct file *filp_open(const char *, int, int); extern struct file * dentry_open(struct dentry *, struct vfsmount *, int); extern int filp_close(struct file *, fl_owner_t id); @@ -1476,7 +1480,7 @@ static inline void allow_write_access(struct file *file) } extern int do_pipe(int *); -extern int open_namei(const char *, int, int, struct nameidata *); +extern int open_namei(int dfd, const char *, int, int, struct nameidata *); extern int may_open(struct nameidata *, int, int); extern int kernel_read(struct file *, unsigned long, char *, unsigned long); @@ -1674,6 +1678,8 @@ extern int vfs_readdir(struct file *, filldir_t, void *); extern int vfs_stat(char __user *, struct kstat *); extern int vfs_lstat(char __user *, struct kstat *); +extern int vfs_stat_fd(int dfd, char __user *, struct kstat *); +extern int vfs_lstat_fd(int dfd, char __user *, struct kstat *); extern int vfs_fstat(unsigned int, struct kstat *); extern int vfs_ioctl(struct file *, unsigned int, unsigned int, unsigned long); diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 6ff2d365895..474c8f4f5d4 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -104,6 +104,10 @@ #define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ #define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */ #define I2C_DRIVERID_TVP5150 76 /* TVP5150 video decoder */ +#define I2C_DRIVERID_WM8739 77 /* wm8739 audio processor */ +#define I2C_DRIVERID_UPD64083 78 /* upd64083 video processor */ +#define I2C_DRIVERID_UPD64031A 79 /* upd64031a video processor */ +#define I2C_DRIVERID_SAA717X 80 /* saa717x video encoder */ #define I2C_DRIVERID_I2CDEV 900 #define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */ diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h index fe26d431de8..7a92c1ce145 100644 --- a/include/linux/if_ether.h +++ b/include/linux/if_ether.h @@ -72,6 +72,7 @@ * over Ethernet */ #define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ +#define ETH_P_TIPC 0x88CA /* TIPC */ /* * Non DIX types. Won't clash for 1500 types. diff --git a/include/linux/init.h b/include/linux/init.h index 59008c3826c..ff8d8b8632f 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -241,6 +241,18 @@ void __init parse_early_param(void); #define __cpuexitdata __exitdata #endif +#ifdef CONFIG_MEMORY_HOTPLUG +#define __meminit +#define __meminitdata +#define __memexit +#define __memexitdata +#else +#define __meminit __init +#define __meminitdata __initdata +#define __memexit __exit +#define __memexitdata __exitdata +#endif + /* Functions marked as __devexit may be discarded at kernel link time, depending on config options. Newer versions of binutils detect references from retained sections to discarded sections and flag an error. Pointers to diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 323924edb26..a5363324cf9 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -228,6 +228,7 @@ extern void dump_stack(void); ntohs((addr).s6_addr16[6]), \ ntohs((addr).s6_addr16[7]) #define NIP6_FMT "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x" +#define NIP6_SEQFMT "%04x%04x%04x%04x%04x%04x%04x%04x" #if defined(__LITTLE_ENDIAN) #define HIPQUAD(addr) \ diff --git a/include/linux/kexec.h b/include/linux/kexec.h index 94abc07cb16..a311f58c8a7 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h @@ -119,6 +119,7 @@ extern struct kimage *kexec_image; #define KEXEC_ARCH_PPC64 (21 << 16) #define KEXEC_ARCH_IA_64 (50 << 16) #define KEXEC_ARCH_S390 (22 << 16) +#define KEXEC_ARCH_SH (42 << 16) #define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */ diff --git a/include/linux/libata.h b/include/linux/libata.h index a43c95f8f96..9e5db2949c5 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -126,16 +126,19 @@ enum { ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */ + ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */ + ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */ + ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */ ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, /* various lengths of time */ - ATA_TMOUT_EDD = 5 * HZ, /* hueristic */ + ATA_TMOUT_EDD = 5 * HZ, /* heuristic */ ATA_TMOUT_PIO = 30 * HZ, - ATA_TMOUT_BOOT = 30 * HZ, /* hueristic */ - ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* hueristic */ + ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ + ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ ATA_TMOUT_CDB = 30 * HZ, ATA_TMOUT_CDB_QUICK = 5 * HZ, ATA_TMOUT_INTERNAL = 30 * HZ, @@ -499,6 +502,8 @@ extern int ata_scsi_slave_config(struct scsi_device *sdev); /* * Timing helpers */ + +extern unsigned int ata_pio_need_iordy(const struct ata_device *); extern int ata_timing_compute(struct ata_device *, unsigned short, struct ata_timing *, int, int); extern void ata_timing_merge(const struct ata_timing *, diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h index d6a53ed6ab6..bbd2221923c 100644 --- a/include/linux/mempolicy.h +++ b/include/linux/mempolicy.h @@ -159,6 +159,7 @@ extern void mpol_rebind_mm(struct mm_struct *mm, nodemask_t *new); extern struct mempolicy default_policy; extern struct zonelist *huge_zonelist(struct vm_area_struct *vma, unsigned long addr); +extern unsigned slab_node(struct mempolicy *policy); extern int policy_zone; diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h index 49cc68af01f..8ac854f7f19 100644 --- a/include/linux/mm_inline.h +++ b/include/linux/mm_inline.h @@ -39,24 +39,3 @@ del_page_from_lru(struct zone *zone, struct page *page) } } -/* - * Isolate one page from the LRU lists. - * - * - zone->lru_lock must be held - */ -static inline int __isolate_lru_page(struct page *page) -{ - if (unlikely(!TestClearPageLRU(page))) - return 0; - - if (get_page_testone(page)) { - /* - * It is being freed elsewhere - */ - __put_page(page); - SetPageLRU(page); - return -ENOENT; - } - - return 1; -} diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 34cbefd2ebd..93a849f742d 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -149,15 +149,17 @@ struct zone { unsigned long pages_scanned; /* since last reclaim */ int all_unreclaimable; /* All pages pinned */ - /* - * Does the allocator try to reclaim pages from the zone as soon - * as it fails a watermark_ok() in __alloc_pages? - */ - int reclaim_pages; /* A count of how many reclaimers are scanning this zone */ atomic_t reclaim_in_progress; /* + * timestamp (in jiffies) of the last zone reclaim that did not + * result in freeing of pages. This is used to avoid repeated scans + * if all memory in the zone is in use. + */ + unsigned long last_unsuccessful_zone_reclaim; + + /* * prev_priority holds the scanning priority for this zone. It is * defined as the scanning priority at which we achieved our reclaim * target at the previous try_to_free_pages() or balance_pgdat() diff --git a/include/linux/namei.h b/include/linux/namei.h index b699e427c00..e6698013e4d 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -56,10 +56,11 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_ACCESS (0x0400) extern int FASTCALL(__user_walk(const char __user *, unsigned, struct nameidata *)); +extern int FASTCALL(__user_walk_fd(int dfd, const char __user *, unsigned, struct nameidata *)); #define user_path_walk(name,nd) \ - __user_walk(name, LOOKUP_FOLLOW, nd) + __user_walk_fd(AT_FDCWD, name, LOOKUP_FOLLOW, nd) #define user_path_walk_link(name,nd) \ - __user_walk(name, 0, nd) + __user_walk_fd(AT_FDCWD, name, 0, nd) extern int FASTCALL(path_lookup(const char *, unsigned, struct nameidata *)); extern int FASTCALL(path_walk(const char *, struct nameidata *)); extern int FASTCALL(link_path_walk(const char *, struct nameidata *)); @@ -67,7 +68,7 @@ extern void path_release(struct nameidata *); extern void path_release_on_umount(struct nameidata *); extern int __user_path_lookup_open(const char __user *, unsigned lookup_flags, struct nameidata *nd, int open_flags); -extern int path_lookup_open(const char *, unsigned lookup_flags, struct nameidata *, int open_flags); +extern int path_lookup_open(int dfd, const char *name, unsigned lookup_flags, struct nameidata *, int open_flags); extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry, int (*open)(struct inode *, struct file *)); extern struct file *nameidata_to_filp(struct nameidata *nd, int flags); diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h index 472f0483480..6500d4e59d4 100644 --- a/include/linux/netfilter/x_tables.h +++ b/include/linux/netfilter/x_tables.h @@ -19,7 +19,21 @@ struct xt_get_revision /* For standard target */ #define XT_RETURN (-NF_REPEAT - 1) -#define XT_ALIGN(s) (((s) + (__alignof__(void *)-1)) & ~(__alignof__(void *)-1)) +/* this is a dummy structure to find out the alignment requirement for a struct + * containing all the fundamental data types that are used in ipt_entry, + * ip6t_entry and arpt_entry. This sucks, and it is a hack. It will be my + * personal pleasure to remove it -HW + */ +struct _xt_align +{ + u_int8_t u8; + u_int16_t u16; + u_int32_t u32; + u_int64_t u64; +}; + +#define XT_ALIGN(s) (((s) + (__alignof__(struct _xt_align)-1)) \ + & ~(__alignof__(struct _xt_align)-1)) /* Standard return verdict, or do jump. */ #define XT_STANDARD_TARGET "" diff --git a/include/linux/netfilter_ipv6/ip6t_ah.h b/include/linux/netfilter_ipv6/ip6t_ah.h index c4f0793a0a9..8531879eb46 100644 --- a/include/linux/netfilter_ipv6/ip6t_ah.h +++ b/include/linux/netfilter_ipv6/ip6t_ah.h @@ -18,13 +18,4 @@ struct ip6t_ah #define IP6T_AH_INV_LEN 0x02 /* Invert the sense of length. */ #define IP6T_AH_INV_MASK 0x03 /* All possible flags. */ -#define MASK_HOPOPTS 128 -#define MASK_DSTOPTS 64 -#define MASK_ROUTING 32 -#define MASK_FRAGMENT 16 -#define MASK_AH 8 -#define MASK_ESP 4 -#define MASK_NONE 2 -#define MASK_PROTO 1 - #endif /*_IP6T_AH_H*/ diff --git a/include/linux/netfilter_ipv6/ip6t_esp.h b/include/linux/netfilter_ipv6/ip6t_esp.h index 01142b98a23..a91b6abc807 100644 --- a/include/linux/netfilter_ipv6/ip6t_esp.h +++ b/include/linux/netfilter_ipv6/ip6t_esp.h @@ -7,15 +7,6 @@ struct ip6t_esp u_int8_t invflags; /* Inverse flags */ }; -#define MASK_HOPOPTS 128 -#define MASK_DSTOPTS 64 -#define MASK_ROUTING 32 -#define MASK_FRAGMENT 16 -#define MASK_AH 8 -#define MASK_ESP 4 -#define MASK_NONE 2 -#define MASK_PROTO 1 - /* Values for "invflags" field in struct ip6t_esp. */ #define IP6T_ESP_INV_SPI 0x01 /* Invert the sense of spi. */ #define IP6T_ESP_INV_MASK 0x01 /* All possible flags. */ diff --git a/include/linux/netfilter_ipv6/ip6t_frag.h b/include/linux/netfilter_ipv6/ip6t_frag.h index 449a57eca7d..66070a0d6df 100644 --- a/include/linux/netfilter_ipv6/ip6t_frag.h +++ b/include/linux/netfilter_ipv6/ip6t_frag.h @@ -21,13 +21,4 @@ struct ip6t_frag #define IP6T_FRAG_INV_LEN 0x02 /* Invert the sense of length. */ #define IP6T_FRAG_INV_MASK 0x03 /* All possible flags. */ -#define MASK_HOPOPTS 128 -#define MASK_DSTOPTS 64 -#define MASK_ROUTING 32 -#define MASK_FRAGMENT 16 -#define MASK_AH 8 -#define MASK_ESP 4 -#define MASK_NONE 2 -#define MASK_PROTO 1 - #endif /*_IP6T_FRAG_H*/ diff --git a/include/linux/netfilter_ipv6/ip6t_opts.h b/include/linux/netfilter_ipv6/ip6t_opts.h index e259b6275bd..a07e36380ae 100644 --- a/include/linux/netfilter_ipv6/ip6t_opts.h +++ b/include/linux/netfilter_ipv6/ip6t_opts.h @@ -20,13 +20,4 @@ struct ip6t_opts #define IP6T_OPTS_INV_LEN 0x01 /* Invert the sense of length. */ #define IP6T_OPTS_INV_MASK 0x01 /* All possible flags. */ -#define MASK_HOPOPTS 128 -#define MASK_DSTOPTS 64 -#define MASK_ROUTING 32 -#define MASK_FRAGMENT 16 -#define MASK_AH 8 -#define MASK_ESP 4 -#define MASK_NONE 2 -#define MASK_PROTO 1 - #endif /*_IP6T_OPTS_H*/ diff --git a/include/linux/netfilter_ipv6/ip6t_rt.h b/include/linux/netfilter_ipv6/ip6t_rt.h index f1070fbf275..52156023e8d 100644 --- a/include/linux/netfilter_ipv6/ip6t_rt.h +++ b/include/linux/netfilter_ipv6/ip6t_rt.h @@ -30,13 +30,4 @@ struct ip6t_rt #define IP6T_RT_INV_LEN 0x04 /* Invert the sense of length. */ #define IP6T_RT_INV_MASK 0x07 /* All possible flags. */ -#define MASK_HOPOPTS 128 -#define MASK_DSTOPTS 64 -#define MASK_ROUTING 32 -#define MASK_FRAGMENT 16 -#define MASK_AH 8 -#define MASK_ESP 4 -#define MASK_NONE 2 -#define MASK_PROTO 1 - #endif /*_IP6T_RT_H*/ diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h index 51c231a1e5a..ec7c2e872d7 100644 --- a/include/linux/nfsd/nfsd.h +++ b/include/linux/nfsd/nfsd.h @@ -124,7 +124,7 @@ int nfsd_statfs(struct svc_rqst *, struct svc_fh *, int nfsd_notify_change(struct inode *, struct iattr *); int nfsd_permission(struct svc_export *, struct dentry *, int); -void nfsd_sync_dir(struct dentry *dp); +int nfsd_sync_dir(struct dentry *dp); #if defined(CONFIG_NFSD_V2_ACL) || defined(CONFIG_NFSD_V3_ACL) #ifdef CONFIG_NFSD_V2_ACL diff --git a/include/linux/nfsd/xdr4.h b/include/linux/nfsd/xdr4.h index 8903688890c..77adba7d228 100644 --- a/include/linux/nfsd/xdr4.h +++ b/include/linux/nfsd/xdr4.h @@ -145,8 +145,9 @@ struct nfsd4_lock { } ok; struct nfsd4_lock_denied denied; } u; - - struct nfs4_stateowner *lk_stateowner; + /* The lk_replay_owner is the open owner in the open_to_lock_owner + * case and the lock owner otherwise: */ + struct nfs4_stateowner *lk_replay_owner; }; #define lk_new_open_seqid v.new.open_seqid #define lk_new_open_stateid v.new.open_stateid diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 2726140a673..4401a7e0605 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1992,6 +1992,7 @@ #define PCI_VENDOR_ID_DCI 0x6666 #define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 #define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 +#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004 #define PCI_VENDOR_ID_INTEL 0x8086 #define PCI_DEVICE_ID_INTEL_EESSC 0x0008 diff --git a/include/linux/poll.h b/include/linux/poll.h index f6da702088f..8e8f6098508 100644 --- a/include/linux/poll.h +++ b/include/linux/poll.h @@ -92,7 +92,11 @@ void zero_fd_set(unsigned long nr, unsigned long *fdset) memset(fdset, 0, FDS_BYTES(nr)); } -extern int do_select(int n, fd_set_bits *fds, long *timeout); +#define MAX_INT64_SECONDS (((s64)(~((u64)0)>>1)/HZ)-1) + +extern int do_select(int n, fd_set_bits *fds, s64 *timeout); +extern int do_sys_poll(struct pollfd __user * ufds, unsigned int nfds, + s64 *timeout); #endif /* KERNEL */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 2df1a1a2fee..0cfcd1c7865 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -809,6 +809,7 @@ struct task_struct { struct sighand_struct *sighand; sigset_t blocked, real_blocked; + sigset_t saved_sigmask; /* To be restored with TIF_RESTORE_SIGMASK */ struct sigpending pending; unsigned long sas_ss_sp; diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index cee302aefdb..73b464f0926 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h @@ -26,7 +26,7 @@ struct plat_serial8250_port { unsigned char regshift; /* register shift */ unsigned char iotype; /* UPIO_* */ unsigned char hub6; - unsigned int flags; /* UPF_* flags */ + upf_t flags; /* UPF_* flags */ }; /* diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index ec351005bf9..4041122dabf 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -203,6 +203,8 @@ struct uart_icount { __u32 buf_overrun; }; +typedef unsigned int __bitwise__ upf_t; + struct uart_port { spinlock_t lock; /* port lock */ unsigned int iobase; /* in/out[bwl] */ @@ -230,36 +232,34 @@ struct uart_port { unsigned long sysrq; /* sysrq timeout */ #endif - unsigned int flags; - -#define UPF_FOURPORT (1 << 1) -#define UPF_SAK (1 << 2) -#define UPF_SPD_MASK (0x1030) -#define UPF_SPD_HI (0x0010) -#define UPF_SPD_VHI (0x0020) -#define UPF_SPD_CUST (0x0030) -#define UPF_SPD_SHI (0x1000) -#define UPF_SPD_WARP (0x1010) -#define UPF_SKIP_TEST (1 << 6) -#define UPF_AUTO_IRQ (1 << 7) -#define UPF_HARDPPS_CD (1 << 11) -#define UPF_LOW_LATENCY (1 << 13) -#define UPF_BUGGY_UART (1 << 14) -#define UPF_AUTOPROBE (1 << 15) -#define UPF_MAGIC_MULTIPLIER (1 << 16) -#define UPF_BOOT_ONLYMCA (1 << 22) -#define UPF_CONS_FLOW (1 << 23) -#define UPF_SHARE_IRQ (1 << 24) -#define UPF_BOOT_AUTOCONF (1 << 28) -#define UPF_IOREMAP (1 << 31) - -#define UPF_CHANGE_MASK (0x17fff) -#define UPF_USR_MASK (UPF_SPD_MASK|UPF_LOW_LATENCY) + upf_t flags; + +#define UPF_FOURPORT ((__force upf_t) (1 << 1)) +#define UPF_SAK ((__force upf_t) (1 << 2)) +#define UPF_SPD_MASK ((__force upf_t) (0x1030)) +#define UPF_SPD_HI ((__force upf_t) (0x0010)) +#define UPF_SPD_VHI ((__force upf_t) (0x0020)) +#define UPF_SPD_CUST ((__force upf_t) (0x0030)) +#define UPF_SPD_SHI ((__force upf_t) (0x1000)) +#define UPF_SPD_WARP ((__force upf_t) (0x1010)) +#define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) +#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) +#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) +#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) +#define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) +#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) +#define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) +#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) +#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) +#define UPF_IOREMAP ((__force upf_t) (1 << 31)) + +#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) +#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) unsigned int mctrl; /* current modem ctrl settings */ unsigned int timeout; /* character-based timeout */ unsigned int type; /* port type */ - struct uart_ops *ops; + const struct uart_ops *ops; unsigned int custom_divisor; unsigned int line; /* port index */ unsigned long mapbase; /* for ioremap */ @@ -289,6 +289,9 @@ struct uart_state { }; #define UART_XMIT_SIZE PAGE_SIZE + +typedef unsigned int __bitwise__ uif_t; + /* * This is the state information which is only valid when the port * is open; it may be freed by the core driver once the device has @@ -298,17 +301,16 @@ struct uart_state { struct uart_info { struct tty_struct *tty; struct circ_buf xmit; - unsigned int flags; + uif_t flags; /* - * These are the flags that specific to info->flags, and reflect our - * internal state. They can not be accessed via port->flags. Low - * level drivers must not change these, but may query them instead. + * Definitions for info->flags. These are _private_ to serial_core, and + * are specific to this structure. They may be queried by low level drivers. */ -#define UIF_CHECK_CD (1 << 25) -#define UIF_CTS_FLOW (1 << 26) -#define UIF_NORMAL_ACTIVE (1 << 29) -#define UIF_INITIALIZED (1 << 31) +#define UIF_CHECK_CD ((__force uif_t) (1 << 25)) +#define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) +#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) +#define UIF_INITIALIZED ((__force uif_t) (1 << 31)) int blocked_open; @@ -430,7 +432,7 @@ static inline int uart_handle_break(struct uart_port *port) port->sysrq = 0; } #endif - if (info->flags & UPF_SAK) + if (port->flags & UPF_SAK) do_SAK(info->tty); return 0; } diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index e5fd66c5650..ad7cc22bd42 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -926,7 +926,7 @@ static inline int skb_tailroom(const struct sk_buff *skb) * Increase the headroom of an empty &sk_buff by reducing the tail * room. This is only allowed for an empty buffer. */ -static inline void skb_reserve(struct sk_buff *skb, unsigned int len) +static inline void skb_reserve(struct sk_buff *skb, int len) { skb->data += len; skb->tail += len; diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h index e4086ec8b95..50cab2a09f2 100644 --- a/include/linux/sunrpc/svc.h +++ b/include/linux/sunrpc/svc.h @@ -246,6 +246,7 @@ struct svc_deferred_req { u32 prot; /* protocol (UDP or TCP) */ struct sockaddr_in addr; struct svc_sock *svsk; /* where reply must go */ + u32 daddr; /* where reply must come from */ struct cache_deferred_req handle; int argslen; u32 args[0]; diff --git a/include/linux/swap.h b/include/linux/swap.h index e92054d6530..4a99e4a7fbf 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -167,6 +167,7 @@ extern void FASTCALL(lru_cache_add_active(struct page *)); extern void FASTCALL(activate_page(struct page *)); extern void FASTCALL(mark_page_accessed(struct page *)); extern void lru_add_drain(void); +extern int lru_add_drain_all(void); extern int rotate_reclaimable_page(struct page *page); extern void swap_setup(void); @@ -175,6 +176,17 @@ extern int try_to_free_pages(struct zone **, gfp_t); extern int shrink_all_memory(int); extern int vm_swappiness; +#ifdef CONFIG_NUMA +extern int zone_reclaim_mode; +extern int zone_reclaim(struct zone *, gfp_t, unsigned int); +#else +#define zone_reclaim_mode 0 +static inline int zone_reclaim(struct zone *z, gfp_t mask, unsigned int order) +{ + return 0; +} +#endif + #ifdef CONFIG_MIGRATION extern int isolate_lru_page(struct page *p); extern int putback_lru_pages(struct list_head *l); diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index 3eed4734701..e666d607056 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h @@ -510,9 +510,24 @@ asmlinkage long sys_keyctl(int cmd, unsigned long arg2, unsigned long arg3, asmlinkage long sys_ioprio_set(int which, int who, int ioprio); asmlinkage long sys_ioprio_get(int which, int who); asmlinkage long sys_set_mempolicy(int mode, unsigned long __user *nmask, - unsigned long maxnode); + unsigned long maxnode); asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode, - const unsigned long __user *from, const unsigned long __user *to); + const unsigned long __user *from, + const unsigned long __user *to); +asmlinkage long sys_mbind(unsigned long start, unsigned long len, + unsigned long mode, + unsigned long __user *nmask, + unsigned long maxnode, + unsigned flags); +asmlinkage long sys_get_mempolicy(int __user *policy, + unsigned long __user *nmask, + unsigned long maxnode, + unsigned long addr, unsigned long flags); + +asmlinkage long sys_inotify_init(void); +asmlinkage long sys_inotify_add_watch(int fd, const char __user *path, + u32 mask); +asmlinkage long sys_inotify_rm_watch(int fd, u32 wd); asmlinkage long sys_spu_run(int fd, __u32 __user *unpc, __u32 __user *ustatus); diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 7f472127b7b..8352a7ce589 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -182,6 +182,7 @@ enum VM_SWAP_TOKEN_TIMEOUT=28, /* default time for token time out */ VM_DROP_PAGECACHE=29, /* int: nuke lots of pagecache */ VM_PERCPU_PAGELIST_FRACTION=30,/* int: fraction of pages in each percpu_pagelist */ + VM_ZONE_RECLAIM_MODE=31,/* reclaim local zone memory before going off node */ }; diff --git a/include/linux/time.h b/include/linux/time.h index f2aca7ec632..614dd846583 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -74,7 +74,7 @@ extern void do_gettimeofday(struct timeval *tv); extern int do_settimeofday(struct timespec *tv); extern int do_sys_settimeofday(struct timespec *tv, struct timezone *tz); #define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts) -extern long do_utimes(char __user *filename, struct timeval *times); +extern long do_utimes(int dfd, char __user *filename, struct timeval *times); struct itimerval; extern int do_setitimer(int which, struct itimerval *value, struct itimerval *ovalue); diff --git a/include/linux/tipc_config.h b/include/linux/tipc_config.h index a52c8c64a5a..33a653913d9 100644 --- a/include/linux/tipc_config.h +++ b/include/linux/tipc_config.h @@ -168,10 +168,13 @@ #define TIPC_MAX_LINK_NAME 60 /* format = Z.C.N:interface-Z.C.N:interface */ /* - * Link priority limits (range from 0 to # priorities - 1) + * Link priority limits (min, default, max, media default) */ -#define TIPC_NUM_LINK_PRI 32 +#define TIPC_MIN_LINK_PRI 0 +#define TIPC_DEF_LINK_PRI 10 +#define TIPC_MAX_LINK_PRI 31 +#define TIPC_MEDIA_LINK_PRI (TIPC_MAX_LINK_PRI + 1) /* * Link tolerance limits (min, default, max), in ms diff --git a/include/linux/topology.h b/include/linux/topology.h index 315a5163d6a..e8eb0040ce3 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h @@ -56,6 +56,14 @@ #define REMOTE_DISTANCE 20 #define node_distance(from,to) ((from) == (to) ? LOCAL_DISTANCE : REMOTE_DISTANCE) #endif +#ifndef RECLAIM_DISTANCE +/* + * If the distance between nodes in a system is larger than RECLAIM_DISTANCE + * (in whatever arch specific measurement units returned by node_distance()) + * then switch on zone reclaim on boot. + */ +#define RECLAIM_DISTANCE 20 +#endif #ifndef PENALTY_FOR_NODE_WITH_CPUS #define PENALTY_FOR_NODE_WITH_CPUS (1) #endif diff --git a/include/media/tuner-types.h b/include/media/tuner-types.h new file mode 100644 index 00000000000..15821ab14a9 --- /dev/null +++ b/include/media/tuner-types.h @@ -0,0 +1,55 @@ +/* + * descriptions for simple tuners. + */ + +#ifndef __TUNER_TYPES_H__ +#define __TUNER_TYPES_H__ + +enum param_type { + TUNER_PARAM_TYPE_RADIO, \ + TUNER_PARAM_TYPE_PAL, \ + TUNER_PARAM_TYPE_SECAM, \ + TUNER_PARAM_TYPE_NTSC +}; + +struct tuner_range { + unsigned short limit; + unsigned char cb; +}; + +struct tuner_params { + enum param_type type; + /* Many Philips based tuners have a comment like this in their + * datasheet: + * + * For channel selection involving band switching, and to ensure + * smooth tuning to the desired channel without causing + * unnecessary charge pump action, it is recommended to consider + * the difference between wanted channel frequency and the + * current channel frequency. Unnecessary charge pump action + * will result in very low tuning voltage which may drive the + * oscillator to extreme conditions. + * + * Set cb_first_if_lower_freq to 1, if this check is + * required for this tuner. + * + * I tested this for PAL by first setting the TV frequency to + * 203 MHz and then switching to 96.6 MHz FM radio. The result was + * static unless the control byte was sent first. + */ + unsigned int cb_first_if_lower_freq:1; + unsigned char config; /* to be moved into struct tuner_range for dvb-pll merge */ + + unsigned int count; + struct tuner_range *ranges; +}; + +struct tunertype { + char *name; + struct tuner_params *params; +}; + +extern struct tunertype tuners[]; +extern unsigned const int tuner_count; + +#endif diff --git a/include/media/tuner.h b/include/media/tuner.h index 27cbf08c931..a5beeac495c 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h @@ -23,6 +23,7 @@ #define _TUNER_H #include <linux/videodev2.h> +#include <media/tuner-types.h> #define ADDR_UNSET (255) @@ -114,6 +115,7 @@ #define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */ #define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */ +#define TUNER_SAMSUNG_TCPN_2121P30A 70 /* Hauppauge PVR-500MCE NTSC */ /* tv card specific */ #define TDA9887_PRESENT (1<<0) @@ -177,7 +179,9 @@ struct tuner { unsigned int mode; unsigned int mode_mask; /* Combination of allowable modes */ - unsigned int freq; /* keep track of the current settings */ + unsigned int tv_freq; /* keep track of the current settings */ + unsigned int radio_freq; + u16 last_div; unsigned int audmode; v4l2_std_id std; @@ -195,8 +199,8 @@ struct tuner { unsigned int sgIF; /* function ptrs */ - void (*tv_freq)(struct i2c_client *c, unsigned int freq); - void (*radio_freq)(struct i2c_client *c, unsigned int freq); + void (*set_tv_freq)(struct i2c_client *c, unsigned int freq); + void (*set_radio_freq)(struct i2c_client *c, unsigned int freq); int (*has_signal)(struct i2c_client *c); int (*is_stereo)(struct i2c_client *c); void (*standby)(struct i2c_client *c); diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index c74052abb18..d4030a7e16e 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h @@ -120,6 +120,13 @@ enum v4l2_chip_ident { /* select from TV,radio,extern,MUTE */ #define AUDC_SET_INPUT _IOW('d',89,int) +/* msp3400 ioctl: will be removed in the near future */ +struct msp_matrix { + int input; + int output; +}; +#define MSP_SET_MATRIX _IOW('m',17,struct msp_matrix) + /* tuner ioctls */ /* Sets tuner type and its I2C addr */ #define TUNER_SET_TYPE_ADDR _IOW('d',90,int) diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h index df05f468fa5..9a92aef8b0b 100644 --- a/include/net/ieee80211.h +++ b/include/net/ieee80211.h @@ -803,9 +803,9 @@ enum ieee80211_state { #define IEEE80211_24GHZ_MAX_CHANNEL 14 #define IEEE80211_24GHZ_CHANNELS 14 -#define IEEE80211_52GHZ_MIN_CHANNEL 36 +#define IEEE80211_52GHZ_MIN_CHANNEL 34 #define IEEE80211_52GHZ_MAX_CHANNEL 165 -#define IEEE80211_52GHZ_CHANNELS 32 +#define IEEE80211_52GHZ_CHANNELS 131 enum { IEEE80211_CH_PASSIVE_ONLY = (1 << 0), diff --git a/include/net/ieee80211_crypt.h b/include/net/ieee80211_crypt.h index 03b766afdc3..cd82c3e998e 100644 --- a/include/net/ieee80211_crypt.h +++ b/include/net/ieee80211_crypt.h @@ -25,6 +25,7 @@ #include <linux/types.h> #include <linux/list.h> +#include <net/ieee80211.h> #include <asm/atomic.h> enum { diff --git a/include/net/iw_handler.h b/include/net/iw_handler.h index d67c8393a34..a2c5e0b8842 100644 --- a/include/net/iw_handler.h +++ b/include/net/iw_handler.h @@ -327,7 +327,7 @@ struct iw_handler_def __u16 num_private_args; /* Array of handlers for standard ioctls - * We will call dev->wireless_handlers->standard[ioctl - SIOCSIWNAME] + * We will call dev->wireless_handlers->standard[ioctl - SIOCSIWCOMMIT] */ const iw_handler * standard; diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index a553f39f6ae..e673b2c984e 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -175,6 +175,8 @@ void sctp_icmp_frag_needed(struct sock *, struct sctp_association *, void sctp_icmp_proto_unreachable(struct sock *sk, struct sctp_association *asoc, struct sctp_transport *t); +void sctp_backlog_migrate(struct sctp_association *assoc, + struct sock *oldsk, struct sock *newsk); /* * Section: Macros, externs, and inlines diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index f5c22d77fea..8c522ae031b 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -127,9 +127,9 @@ extern struct sctp_globals { * RTO.Alpha - 1/8 (3 when converted to right shifts.) * RTO.Beta - 1/4 (2 when converted to right shifts.) */ - __u32 rto_initial; - __u32 rto_min; - __u32 rto_max; + unsigned long rto_initial; + unsigned long rto_min; + unsigned long rto_max; /* Note: rto_alpha and rto_beta are really defined as inverse * powers of two to facilitate integer operations. @@ -140,12 +140,18 @@ extern struct sctp_globals { /* Max.Burst - 4 */ int max_burst; - /* Valid.Cookie.Life - 60 seconds */ - int valid_cookie_life; - /* Whether Cookie Preservative is enabled(1) or not(0) */ int cookie_preserve_enable; + /* Valid.Cookie.Life - 60 seconds */ + unsigned long valid_cookie_life; + + /* Delayed SACK timeout 200ms default*/ + unsigned long sack_timeout; + + /* HB.interval - 30 seconds */ + unsigned long hb_interval; + /* Association.Max.Retrans - 10 attempts * Path.Max.Retrans - 5 attempts (per destination address) * Max.Init.Retransmits - 8 attempts @@ -168,12 +174,6 @@ extern struct sctp_globals { */ int rcvbuf_policy; - /* Delayed SACK timeout 200ms default*/ - int sack_timeout; - - /* HB.interval - 30 seconds */ - int hb_interval; - /* The following variables are implementation specific. */ /* Default initialization values to be applied to new associations. */ @@ -405,8 +405,9 @@ struct sctp_cookie { /* The format of our cookie that we send to our peer. */ struct sctp_signed_cookie { __u8 signature[SCTP_SECRET_SIZE]; + __u32 __pad; /* force sctp_cookie alignment to 64 bits */ struct sctp_cookie c; -}; +} __attribute__((packed)); /* This is another convenience type to allocate memory for address * params for the maximum size and pass such structures around @@ -827,7 +828,7 @@ struct sctp_transport { __u32 rtt; /* This is the most recent RTT. */ /* RTO : The current retransmission timeout value. */ - __u32 rto; + unsigned long rto; /* RTTVAR : The current RTT variation. */ __u32 rttvar; @@ -877,22 +878,10 @@ struct sctp_transport { /* Heartbeat interval: The endpoint sends out a Heartbeat chunk to * the destination address every heartbeat interval. */ - __u32 hbinterval; - - /* This is the max_retrans value for the transport and will - * be initialized from the assocs value. This can be changed - * using SCTP_SET_PEER_ADDR_PARAMS socket option. - */ - __u16 pathmaxrxt; - - /* PMTU : The current known path MTU. */ - __u32 pathmtu; + unsigned long hbinterval; /* SACK delay timeout */ - __u32 sackdelay; - - /* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */ - __u32 param_flags; + unsigned long sackdelay; /* When was the last time (in jiffies) that we heard from this * transport? We use this to pick new active and retran paths. @@ -904,6 +893,18 @@ struct sctp_transport { */ unsigned long last_time_ecne_reduced; + /* This is the max_retrans value for the transport and will + * be initialized from the assocs value. This can be changed + * using SCTP_SET_PEER_ADDR_PARAMS socket option. + */ + __u16 pathmaxrxt; + + /* PMTU : The current known path MTU. */ + __u32 pathmtu; + + /* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */ + __u32 param_flags; + /* The number of times INIT has been sent on this transport. */ int init_sent_count; @@ -1249,6 +1250,14 @@ struct sctp_endpoint { int last_key; int key_changed_at; + /* digest: This is a digest of the sctp cookie. This field is + * only used on the receive path when we try to validate + * that the cookie has not been tampered with. We put + * this here so we pre-allocate this once and can re-use + * on every receive. + */ + __u8 digest[SCTP_SIGNATURE_SIZE]; + /* sendbuf acct. policy. */ __u32 sndbuf_policy; @@ -1499,9 +1508,9 @@ struct sctp_association { * These values will be initialized by system defaults, but can * be modified via the SCTP_RTOINFO socket option. */ - __u32 rto_initial; - __u32 rto_max; - __u32 rto_min; + unsigned long rto_initial; + unsigned long rto_max; + unsigned long rto_min; /* Maximum number of new data packets that can be sent in a burst. */ int max_burst; @@ -1519,13 +1528,13 @@ struct sctp_association { __u16 init_retries; /* The largest timeout or RTO value to use in attempting an INIT */ - __u16 max_init_timeo; + unsigned long max_init_timeo; /* Heartbeat interval: The endpoint sends out a Heartbeat chunk to * the destination address every heartbeat interval. This value * will be inherited by all new transports. */ - __u32 hbinterval; + unsigned long hbinterval; /* This is the max_retrans value for new transports in the * association. @@ -1537,13 +1546,14 @@ struct sctp_association { */ __u32 pathmtu; - /* SACK delay timeout */ - __u32 sackdelay; - /* Flags controling Heartbeat, SACK delay, and Path MTU Discovery. */ __u32 param_flags; - int timeouts[SCTP_NUM_TIMEOUT_TYPES]; + /* SACK delay timeout */ + unsigned long sackdelay; + + + unsigned long timeouts[SCTP_NUM_TIMEOUT_TYPES]; struct timer_list timers[SCTP_NUM_TIMEOUT_TYPES]; /* Transport to which SHUTDOWN chunk was last sent. */ @@ -1648,7 +1658,10 @@ struct sctp_association { /* How many duplicated TSNs have we seen? */ int numduptsns; - /* Number of seconds of idle time before an association is closed. */ + /* Number of seconds of idle time before an association is closed. + * In the association context, this is really used as a boolean + * since the real timeout is stored in the timeouts array + */ __u32 autoclose; /* These are to support diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index e94ca4d3603..290e3b4d2ae 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -275,7 +275,7 @@ extern int scsi_execute_req(struct scsi_device *sdev, const unsigned char *cmd, int data_direction, void *buffer, unsigned bufflen, struct scsi_sense_hdr *, int timeout, int retries); extern int scsi_execute_async(struct scsi_device *sdev, - const unsigned char *cmd, int data_direction, + const unsigned char *cmd, int cmd_len, int data_direction, void *buffer, unsigned bufflen, int use_sg, int timeout, int retries, void *privdata, void (*done)(void *, char *, int, int), diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 467274a764d..827992949c4 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -554,7 +554,6 @@ struct Scsi_Host { /* * ordered write support */ - unsigned ordered_flush:1; unsigned ordered_tag:1; /* diff --git a/include/scsi/scsi_transport_spi.h b/include/scsi/scsi_transport_spi.h index 2b5930ba69e..fb5a2ffae93 100644 --- a/include/scsi/scsi_transport_spi.h +++ b/include/scsi/scsi_transport_spi.h @@ -22,6 +22,7 @@ #include <linux/config.h> #include <linux/transport_class.h> +#include <linux/mutex.h> struct scsi_transport_template; struct scsi_target; |